Commit | Line | Data |
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9260ad98 MO |
1 | /* |
2 | * tps65912.c -- TI tps65912 | |
3 | * | |
4 | * Copyright 2011 Texas Instruments Inc. | |
5 | * | |
6 | * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | * | |
13 | * This driver is based on wm8350 implementation. | |
14 | */ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/err.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/regulator/driver.h> | |
22 | #include <linux/regulator/machine.h> | |
9260ad98 MO |
23 | #include <linux/slab.h> |
24 | #include <linux/gpio.h> | |
25 | #include <linux/mfd/tps65912.h> | |
26 | ||
27 | /* DCDC's */ | |
28 | #define TPS65912_REG_DCDC1 0 | |
29 | #define TPS65912_REG_DCDC2 1 | |
30 | #define TPS65912_REG_DCDC3 2 | |
31 | #define TPS65912_REG_DCDC4 3 | |
32 | ||
33 | /* LDOs */ | |
34 | #define TPS65912_REG_LDO1 4 | |
35 | #define TPS65912_REG_LDO2 5 | |
36 | #define TPS65912_REG_LDO3 6 | |
37 | #define TPS65912_REG_LDO4 7 | |
38 | #define TPS65912_REG_LDO5 8 | |
39 | #define TPS65912_REG_LDO6 9 | |
40 | #define TPS65912_REG_LDO7 10 | |
41 | #define TPS65912_REG_LDO8 11 | |
42 | #define TPS65912_REG_LDO9 12 | |
43 | #define TPS65912_REG_LDO10 13 | |
44 | ||
9260ad98 MO |
45 | /* Number of step-down converters available */ |
46 | #define TPS65912_NUM_DCDC 4 | |
47 | ||
48 | /* Number of LDO voltage regulators available */ | |
49 | #define TPS65912_NUM_LDO 10 | |
50 | ||
51 | /* Number of total regulators available */ | |
52 | #define TPS65912_NUM_REGULATOR (TPS65912_NUM_DCDC + TPS65912_NUM_LDO) | |
53 | ||
54 | #define TPS65912_REG_ENABLED 0x80 | |
55 | #define OP_SELREG_MASK 0x40 | |
56 | #define OP_SELREG_SHIFT 6 | |
57 | ||
58 | struct tps_info { | |
59 | const char *name; | |
60 | }; | |
61 | ||
62 | static struct tps_info tps65912_regs[] = { | |
63 | { | |
64 | .name = "DCDC1", | |
65 | }, | |
66 | { | |
67 | .name = "DCDC2", | |
68 | }, | |
69 | { | |
70 | .name = "DCDC3", | |
71 | }, | |
72 | { | |
73 | .name = "DCDC4", | |
74 | }, | |
75 | { | |
76 | .name = "LDO1", | |
77 | }, | |
78 | { | |
79 | .name = "LDO2", | |
80 | }, | |
81 | { | |
82 | .name = "LDO3", | |
83 | }, | |
84 | { | |
85 | .name = "LDO4", | |
86 | }, | |
87 | { | |
88 | .name = "LDO5", | |
89 | }, | |
90 | { | |
91 | .name = "LDO6", | |
92 | }, | |
93 | { | |
94 | .name = "LDO7", | |
95 | }, | |
96 | { | |
97 | .name = "LDO8", | |
98 | }, | |
99 | { | |
100 | .name = "LDO9", | |
101 | }, | |
102 | { | |
103 | .name = "LDO10", | |
104 | }, | |
105 | }; | |
106 | ||
107 | struct tps65912_reg { | |
108 | struct regulator_desc desc[TPS65912_NUM_REGULATOR]; | |
109 | struct tps65912 *mfd; | |
110 | struct regulator_dev *rdev[TPS65912_NUM_REGULATOR]; | |
111 | struct tps_info *info[TPS65912_NUM_REGULATOR]; | |
112 | /* for read/write access */ | |
113 | struct mutex io_lock; | |
114 | int mode; | |
115 | int (*get_ctrl_reg)(int); | |
85c5d86d | 116 | int dcdc_range[TPS65912_NUM_DCDC]; |
9260ad98 MO |
117 | int pwm_mode_reg; |
118 | int eco_reg; | |
119 | }; | |
120 | ||
fba6583b | 121 | static const struct regulator_linear_range tps65912_ldo_ranges[] = { |
8828bae4 AL |
122 | REGULATOR_LINEAR_RANGE(800000, 0, 32, 25000), |
123 | REGULATOR_LINEAR_RANGE(1650000, 33, 60, 50000), | |
124 | REGULATOR_LINEAR_RANGE(3100000, 61, 63, 100000), | |
fba6583b AL |
125 | }; |
126 | ||
9260ad98 MO |
127 | static int tps65912_get_range(struct tps65912_reg *pmic, int id) |
128 | { | |
129 | struct tps65912 *mfd = pmic->mfd; | |
85c5d86d | 130 | int range; |
9260ad98 MO |
131 | |
132 | switch (id) { | |
133 | case TPS65912_REG_DCDC1: | |
85c5d86d AL |
134 | range = tps65912_reg_read(mfd, TPS65912_DCDC1_LIMIT); |
135 | break; | |
9260ad98 | 136 | case TPS65912_REG_DCDC2: |
85c5d86d AL |
137 | range = tps65912_reg_read(mfd, TPS65912_DCDC2_LIMIT); |
138 | break; | |
9260ad98 | 139 | case TPS65912_REG_DCDC3: |
85c5d86d AL |
140 | range = tps65912_reg_read(mfd, TPS65912_DCDC3_LIMIT); |
141 | break; | |
9260ad98 | 142 | case TPS65912_REG_DCDC4: |
85c5d86d AL |
143 | range = tps65912_reg_read(mfd, TPS65912_DCDC4_LIMIT); |
144 | break; | |
9260ad98 MO |
145 | default: |
146 | return 0; | |
147 | } | |
85c5d86d AL |
148 | |
149 | if (range >= 0) | |
150 | range = (range & DCDC_LIMIT_RANGE_MASK) | |
151 | >> DCDC_LIMIT_RANGE_SHIFT; | |
152 | ||
153 | pmic->dcdc_range[id] = range; | |
154 | return range; | |
9260ad98 MO |
155 | } |
156 | ||
157 | static unsigned long tps65912_vsel_to_uv_range0(u8 vsel) | |
158 | { | |
159 | unsigned long uv; | |
160 | ||
161 | uv = ((vsel * 12500) + 500000); | |
162 | return uv; | |
163 | } | |
164 | ||
165 | static unsigned long tps65912_vsel_to_uv_range1(u8 vsel) | |
166 | { | |
167 | unsigned long uv; | |
168 | ||
169 | uv = ((vsel * 12500) + 700000); | |
170 | return uv; | |
171 | } | |
172 | ||
173 | static unsigned long tps65912_vsel_to_uv_range2(u8 vsel) | |
174 | { | |
175 | unsigned long uv; | |
176 | ||
177 | uv = ((vsel * 25000) + 500000); | |
178 | return uv; | |
179 | } | |
180 | ||
181 | static unsigned long tps65912_vsel_to_uv_range3(u8 vsel) | |
182 | { | |
183 | unsigned long uv; | |
184 | ||
185 | if (vsel == 0x3f) | |
186 | uv = 3800000; | |
187 | else | |
188 | uv = ((vsel * 50000) + 500000); | |
189 | ||
190 | return uv; | |
191 | } | |
192 | ||
9260ad98 MO |
193 | static int tps65912_get_ctrl_register(int id) |
194 | { | |
42b5efe4 AL |
195 | if (id >= TPS65912_REG_DCDC1 && id <= TPS65912_REG_LDO4) |
196 | return id * 3 + TPS65912_DCDC1_AVS; | |
197 | else if (id >= TPS65912_REG_LDO5 && id <= TPS65912_REG_LDO10) | |
198 | return id - TPS65912_REG_LDO5 + TPS65912_LDO5; | |
199 | else | |
9260ad98 | 200 | return -EINVAL; |
9260ad98 MO |
201 | } |
202 | ||
42b5efe4 | 203 | static int tps65912_get_sel_register(struct tps65912_reg *pmic, int id) |
9260ad98 MO |
204 | { |
205 | struct tps65912 *mfd = pmic->mfd; | |
42b5efe4 | 206 | int opvsel; |
9260ad98 MO |
207 | u8 reg = 0; |
208 | ||
42b5efe4 AL |
209 | if (id >= TPS65912_REG_DCDC1 && id <= TPS65912_REG_LDO4) { |
210 | opvsel = tps65912_reg_read(mfd, id * 3 + TPS65912_DCDC1_OP); | |
211 | if (opvsel & OP_SELREG_MASK) | |
212 | reg = id * 3 + TPS65912_DCDC1_AVS; | |
9260ad98 | 213 | else |
42b5efe4 AL |
214 | reg = id * 3 + TPS65912_DCDC1_OP; |
215 | } else if (id >= TPS65912_REG_LDO5 && id <= TPS65912_REG_LDO10) { | |
216 | reg = id - TPS65912_REG_LDO5 + TPS65912_LDO5; | |
217 | } else { | |
9260ad98 | 218 | return -EINVAL; |
9260ad98 MO |
219 | } |
220 | ||
221 | return reg; | |
222 | } | |
223 | ||
224 | static int tps65912_get_mode_regiters(struct tps65912_reg *pmic, int id) | |
225 | { | |
226 | switch (id) { | |
227 | case TPS65912_REG_DCDC1: | |
228 | pmic->pwm_mode_reg = TPS65912_DCDC1_CTRL; | |
229 | pmic->eco_reg = TPS65912_DCDC1_AVS; | |
230 | break; | |
231 | case TPS65912_REG_DCDC2: | |
232 | pmic->pwm_mode_reg = TPS65912_DCDC2_CTRL; | |
233 | pmic->eco_reg = TPS65912_DCDC2_AVS; | |
234 | break; | |
235 | case TPS65912_REG_DCDC3: | |
236 | pmic->pwm_mode_reg = TPS65912_DCDC3_CTRL; | |
237 | pmic->eco_reg = TPS65912_DCDC3_AVS; | |
238 | break; | |
239 | case TPS65912_REG_DCDC4: | |
240 | pmic->pwm_mode_reg = TPS65912_DCDC4_CTRL; | |
241 | pmic->eco_reg = TPS65912_DCDC4_AVS; | |
242 | break; | |
243 | default: | |
244 | return -EINVAL; | |
245 | } | |
246 | ||
247 | return 0; | |
248 | } | |
249 | ||
250 | static int tps65912_reg_is_enabled(struct regulator_dev *dev) | |
251 | { | |
252 | struct tps65912_reg *pmic = rdev_get_drvdata(dev); | |
253 | struct tps65912 *mfd = pmic->mfd; | |
254 | int reg, value, id = rdev_get_id(dev); | |
255 | ||
256 | if (id < TPS65912_REG_DCDC1 || id > TPS65912_REG_LDO10) | |
257 | return -EINVAL; | |
258 | ||
259 | reg = pmic->get_ctrl_reg(id); | |
260 | if (reg < 0) | |
261 | return reg; | |
262 | ||
263 | value = tps65912_reg_read(mfd, reg); | |
264 | if (value < 0) | |
265 | return value; | |
266 | ||
267 | return value & TPS65912_REG_ENABLED; | |
268 | } | |
269 | ||
270 | static int tps65912_reg_enable(struct regulator_dev *dev) | |
271 | { | |
272 | struct tps65912_reg *pmic = rdev_get_drvdata(dev); | |
273 | struct tps65912 *mfd = pmic->mfd; | |
274 | int id = rdev_get_id(dev); | |
6daa663d | 275 | int reg; |
9260ad98 MO |
276 | |
277 | if (id < TPS65912_REG_DCDC1 || id > TPS65912_REG_LDO10) | |
278 | return -EINVAL; | |
279 | ||
280 | reg = pmic->get_ctrl_reg(id); | |
281 | if (reg < 0) | |
282 | return reg; | |
283 | ||
284 | return tps65912_set_bits(mfd, reg, TPS65912_REG_ENABLED); | |
285 | } | |
286 | ||
287 | static int tps65912_reg_disable(struct regulator_dev *dev) | |
288 | { | |
289 | struct tps65912_reg *pmic = rdev_get_drvdata(dev); | |
290 | struct tps65912 *mfd = pmic->mfd; | |
291 | int id = rdev_get_id(dev), reg; | |
292 | ||
293 | reg = pmic->get_ctrl_reg(id); | |
294 | if (reg < 0) | |
295 | return reg; | |
296 | ||
297 | return tps65912_clear_bits(mfd, reg, TPS65912_REG_ENABLED); | |
298 | } | |
299 | ||
300 | static int tps65912_set_mode(struct regulator_dev *dev, unsigned int mode) | |
301 | { | |
302 | struct tps65912_reg *pmic = rdev_get_drvdata(dev); | |
303 | struct tps65912 *mfd = pmic->mfd; | |
304 | int pwm_mode, eco, id = rdev_get_id(dev); | |
305 | ||
306 | tps65912_get_mode_regiters(pmic, id); | |
307 | ||
308 | pwm_mode = tps65912_reg_read(mfd, pmic->pwm_mode_reg); | |
309 | eco = tps65912_reg_read(mfd, pmic->eco_reg); | |
310 | ||
311 | pwm_mode &= DCDCCTRL_DCDC_MODE_MASK; | |
312 | eco &= DCDC_AVS_ECO_MASK; | |
313 | ||
314 | switch (mode) { | |
315 | case REGULATOR_MODE_FAST: | |
316 | /* Verify if mode alredy set */ | |
317 | if (pwm_mode && !eco) | |
318 | break; | |
319 | tps65912_set_bits(mfd, pmic->pwm_mode_reg, DCDCCTRL_DCDC_MODE_MASK); | |
320 | tps65912_clear_bits(mfd, pmic->eco_reg, DCDC_AVS_ECO_MASK); | |
321 | break; | |
322 | case REGULATOR_MODE_NORMAL: | |
323 | case REGULATOR_MODE_IDLE: | |
324 | if (!pwm_mode && !eco) | |
325 | break; | |
326 | tps65912_clear_bits(mfd, pmic->pwm_mode_reg, DCDCCTRL_DCDC_MODE_MASK); | |
327 | tps65912_clear_bits(mfd, pmic->eco_reg, DCDC_AVS_ECO_MASK); | |
328 | break; | |
329 | case REGULATOR_MODE_STANDBY: | |
330 | if (!pwm_mode && eco) | |
331 | break; | |
332 | tps65912_clear_bits(mfd, pmic->pwm_mode_reg, DCDCCTRL_DCDC_MODE_MASK); | |
333 | tps65912_set_bits(mfd, pmic->eco_reg, DCDC_AVS_ECO_MASK); | |
334 | break; | |
335 | default: | |
336 | return -EINVAL; | |
337 | } | |
338 | ||
339 | return 0; | |
340 | } | |
341 | ||
342 | static unsigned int tps65912_get_mode(struct regulator_dev *dev) | |
343 | { | |
344 | struct tps65912_reg *pmic = rdev_get_drvdata(dev); | |
345 | struct tps65912 *mfd = pmic->mfd; | |
346 | int pwm_mode, eco, mode = 0, id = rdev_get_id(dev); | |
347 | ||
348 | tps65912_get_mode_regiters(pmic, id); | |
349 | ||
350 | pwm_mode = tps65912_reg_read(mfd, pmic->pwm_mode_reg); | |
351 | eco = tps65912_reg_read(mfd, pmic->eco_reg); | |
352 | ||
353 | pwm_mode &= DCDCCTRL_DCDC_MODE_MASK; | |
354 | eco &= DCDC_AVS_ECO_MASK; | |
355 | ||
356 | if (pwm_mode && !eco) | |
357 | mode = REGULATOR_MODE_FAST; | |
358 | else if (!pwm_mode && !eco) | |
359 | mode = REGULATOR_MODE_NORMAL; | |
360 | else if (!pwm_mode && eco) | |
361 | mode = REGULATOR_MODE_STANDBY; | |
362 | ||
363 | return mode; | |
364 | } | |
365 | ||
f72d643e | 366 | static int tps65912_list_voltage(struct regulator_dev *dev, unsigned selector) |
9260ad98 MO |
367 | { |
368 | struct tps65912_reg *pmic = rdev_get_drvdata(dev); | |
844775ef | 369 | int range, voltage = 0, id = rdev_get_id(dev); |
9260ad98 | 370 | |
85c5d86d | 371 | if (id > TPS65912_REG_DCDC4) |
9260ad98 | 372 | return -EINVAL; |
85c5d86d AL |
373 | |
374 | range = pmic->dcdc_range[id]; | |
9260ad98 | 375 | |
9260ad98 MO |
376 | switch (range) { |
377 | case 0: | |
378 | /* 0.5 - 1.2875V in 12.5mV steps */ | |
844775ef | 379 | voltage = tps65912_vsel_to_uv_range0(selector); |
9260ad98 MO |
380 | break; |
381 | case 1: | |
382 | /* 0.7 - 1.4875V in 12.5mV steps */ | |
844775ef | 383 | voltage = tps65912_vsel_to_uv_range1(selector); |
9260ad98 MO |
384 | break; |
385 | case 2: | |
386 | /* 0.5 - 2.075V in 25mV steps */ | |
844775ef | 387 | voltage = tps65912_vsel_to_uv_range2(selector); |
9260ad98 MO |
388 | break; |
389 | case 3: | |
390 | /* 0.5 - 3.8V in 50mV steps */ | |
844775ef | 391 | voltage = tps65912_vsel_to_uv_range3(selector); |
9260ad98 MO |
392 | break; |
393 | } | |
394 | return voltage; | |
395 | } | |
396 | ||
9db7f056 | 397 | static int tps65912_get_voltage_sel(struct regulator_dev *dev) |
844775ef AL |
398 | { |
399 | struct tps65912_reg *pmic = rdev_get_drvdata(dev); | |
400 | struct tps65912 *mfd = pmic->mfd; | |
401 | int id = rdev_get_id(dev); | |
c567556e | 402 | int reg, vsel; |
844775ef | 403 | |
c567556e AL |
404 | reg = tps65912_get_sel_register(pmic, id); |
405 | if (reg < 0) | |
406 | return reg; | |
844775ef | 407 | |
c567556e | 408 | vsel = tps65912_reg_read(mfd, reg); |
844775ef AL |
409 | vsel &= 0x3F; |
410 | ||
9db7f056 | 411 | return vsel; |
844775ef AL |
412 | } |
413 | ||
831c986f | 414 | static int tps65912_set_voltage_sel(struct regulator_dev *dev, |
94732b97 | 415 | unsigned selector) |
9260ad98 MO |
416 | { |
417 | struct tps65912_reg *pmic = rdev_get_drvdata(dev); | |
418 | struct tps65912 *mfd = pmic->mfd; | |
419 | int id = rdev_get_id(dev); | |
420 | int value; | |
421 | u8 reg; | |
422 | ||
42b5efe4 | 423 | reg = tps65912_get_sel_register(pmic, id); |
9260ad98 MO |
424 | value = tps65912_reg_read(mfd, reg); |
425 | value &= 0xC0; | |
426 | return tps65912_reg_write(mfd, reg, selector | value); | |
427 | } | |
428 | ||
9260ad98 MO |
429 | /* Operations permitted on DCDCx */ |
430 | static struct regulator_ops tps65912_ops_dcdc = { | |
431 | .is_enabled = tps65912_reg_is_enabled, | |
432 | .enable = tps65912_reg_enable, | |
433 | .disable = tps65912_reg_disable, | |
434 | .set_mode = tps65912_set_mode, | |
435 | .get_mode = tps65912_get_mode, | |
9db7f056 | 436 | .get_voltage_sel = tps65912_get_voltage_sel, |
831c986f | 437 | .set_voltage_sel = tps65912_set_voltage_sel, |
f72d643e | 438 | .list_voltage = tps65912_list_voltage, |
9260ad98 MO |
439 | }; |
440 | ||
441 | /* Operations permitted on LDOx */ | |
442 | static struct regulator_ops tps65912_ops_ldo = { | |
443 | .is_enabled = tps65912_reg_is_enabled, | |
444 | .enable = tps65912_reg_enable, | |
445 | .disable = tps65912_reg_disable, | |
9db7f056 | 446 | .get_voltage_sel = tps65912_get_voltage_sel, |
831c986f | 447 | .set_voltage_sel = tps65912_set_voltage_sel, |
fba6583b AL |
448 | .list_voltage = regulator_list_voltage_linear_range, |
449 | .map_voltage = regulator_map_voltage_linear_range, | |
9260ad98 MO |
450 | }; |
451 | ||
a5023574 | 452 | static int tps65912_probe(struct platform_device *pdev) |
9260ad98 MO |
453 | { |
454 | struct tps65912 *tps65912 = dev_get_drvdata(pdev->dev.parent); | |
c172708d | 455 | struct regulator_config config = { }; |
9260ad98 MO |
456 | struct tps_info *info; |
457 | struct regulator_init_data *reg_data; | |
458 | struct regulator_dev *rdev; | |
459 | struct tps65912_reg *pmic; | |
460 | struct tps65912_board *pmic_plat_data; | |
ab1d65e0 | 461 | int i; |
9260ad98 MO |
462 | |
463 | pmic_plat_data = dev_get_platdata(tps65912->dev); | |
464 | if (!pmic_plat_data) | |
465 | return -EINVAL; | |
466 | ||
467 | reg_data = pmic_plat_data->tps65912_pmic_init_data; | |
468 | ||
9eb0c421 | 469 | pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); |
9260ad98 MO |
470 | if (!pmic) |
471 | return -ENOMEM; | |
472 | ||
473 | mutex_init(&pmic->io_lock); | |
474 | pmic->mfd = tps65912; | |
475 | platform_set_drvdata(pdev, pmic); | |
476 | ||
477 | pmic->get_ctrl_reg = &tps65912_get_ctrl_register; | |
478 | info = tps65912_regs; | |
479 | ||
480 | for (i = 0; i < TPS65912_NUM_REGULATOR; i++, info++, reg_data++) { | |
481 | int range = 0; | |
482 | /* Register the regulators */ | |
483 | pmic->info[i] = info; | |
484 | ||
485 | pmic->desc[i].name = info->name; | |
486 | pmic->desc[i].id = i; | |
487 | pmic->desc[i].n_voltages = 64; | |
fba6583b AL |
488 | if (i > TPS65912_REG_DCDC4) { |
489 | pmic->desc[i].ops = &tps65912_ops_ldo; | |
490 | pmic->desc[i].linear_ranges = tps65912_ldo_ranges; | |
491 | pmic->desc[i].n_linear_ranges = | |
492 | ARRAY_SIZE(tps65912_ldo_ranges); | |
493 | } else { | |
494 | pmic->desc[i].ops = &tps65912_ops_dcdc; | |
495 | } | |
9260ad98 MO |
496 | pmic->desc[i].type = REGULATOR_VOLTAGE; |
497 | pmic->desc[i].owner = THIS_MODULE; | |
498 | range = tps65912_get_range(pmic, i); | |
c172708d MB |
499 | |
500 | config.dev = tps65912->dev; | |
501 | config.init_data = reg_data; | |
502 | config.driver_data = pmic; | |
503 | ||
ab1d65e0 SK |
504 | rdev = devm_regulator_register(&pdev->dev, &pmic->desc[i], |
505 | &config); | |
9260ad98 MO |
506 | if (IS_ERR(rdev)) { |
507 | dev_err(tps65912->dev, | |
508 | "failed to register %s regulator\n", | |
509 | pdev->name); | |
ab1d65e0 | 510 | return PTR_ERR(rdev); |
9260ad98 MO |
511 | } |
512 | ||
513 | /* Save regulator for cleanup */ | |
514 | pmic->rdev[i] = rdev; | |
515 | } | |
516 | return 0; | |
9260ad98 MO |
517 | } |
518 | ||
519 | static struct platform_driver tps65912_driver = { | |
520 | .driver = { | |
521 | .name = "tps65912-pmic", | |
522 | .owner = THIS_MODULE, | |
523 | }, | |
524 | .probe = tps65912_probe, | |
9260ad98 MO |
525 | }; |
526 | ||
9260ad98 MO |
527 | static int __init tps65912_init(void) |
528 | { | |
529 | return platform_driver_register(&tps65912_driver); | |
530 | } | |
531 | subsys_initcall(tps65912_init); | |
532 | ||
9260ad98 MO |
533 | static void __exit tps65912_cleanup(void) |
534 | { | |
535 | platform_driver_unregister(&tps65912_driver); | |
536 | } | |
537 | module_exit(tps65912_cleanup); | |
538 | ||
539 | MODULE_AUTHOR("Margarita Olaya Cabrera <magi@slimlogic.co.uk>"); | |
540 | MODULE_DESCRIPTION("TPS65912 voltage regulator driver"); | |
541 | MODULE_LICENSE("GPL v2"); | |
542 | MODULE_ALIAS("platform:tps65912-pmic"); |