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Merge tag 'perf-core-for-mingo-20160803' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / drivers / regulator / twl-regulator.c
CommitLineData
fa16a5c1 1/*
c4aa6f31 2 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
fa16a5c1
DB		 3 *
4 * Copyright (C) 2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
8f52a580
SR		 13#include <linux/string.h>
14#include <linux/slab.h>
fa16a5c1
DB		 15#include <linux/init.h>
16#include <linux/err.h>
17#include <linux/platform_device.h>
2098e95c
RN		 18#include <linux/of.h>
19#include <linux/of_device.h>
fa16a5c1
DB		 20#include <linux/regulator/driver.h>
21#include <linux/regulator/machine.h>
2098e95c 22#include <linux/regulator/of_regulator.h>
b07682b6 23#include <linux/i2c/twl.h>
2330b05c 24#include <linux/delay.h>
fa16a5c1
DB		 25
26/*
c4aa6f31 27 * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a
fa16a5c1
DB		 28 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
29 * include an audio codec, battery charger, and more voltage regulators.
30 * These chips are often used in OMAP-based systems.
31 *
32 * This driver implements software-based resource control for various
33 * voltage regulators. This is usually augmented with state machine
34 * based control.
35 */
36
37struct twlreg_info {
38 /* start of regulator's PM_RECEIVER control register bank */
39 u8 base;
40
c4aa6f31 41 /* twl resource ID, for resource control state machine */
fa16a5c1
DB		 42 u8 id;
43
44 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
45 u8 table_len;
46 const u16 *table;
47
045f972f
JKS		 48 /* State REMAP default configuration */
49 u8 remap;
50
fa16a5c1
DB		 51 /* chip constraints on regulator behavior */
52 u16 min_mV;
3e3d3be7 53 u16 max_mV;
fa16a5c1 54
4d94aee5
GG		 55 u8 flags;
56
fa16a5c1
DB		 57 /* used by regulator core */
58 struct regulator_desc desc;
4d94aee5
GG		 59
60 /* chip specific features */
3db39885 61 unsigned long features;
63bfff4e
TK		 62
63 /*
64 * optional override functions for voltage set/get
65 * these are currently only used for SMPS regulators
66 */
67 int (*get_voltage)(void *data);
68 int (*set_voltage)(void *data, int target_uV);
69
70 /* data passed from board for external get/set voltage */
71 void *data;
fa16a5c1
DB		 72};
73
74
75/* LDO control registers ... offset is from the base of its register bank.
76 * The first three registers of all power resource banks help hardware to
77 * manage the various resource groups.
78 */
441a4505 79/* Common offset in TWL4030/6030 */
fa16a5c1 80#define VREG_GRP 0
441a4505 81/* TWL4030 register offsets */
fa16a5c1
DB		 82#define VREG_TYPE 1
83#define VREG_REMAP 2
84#define VREG_DEDICATED 3 /* LDO control */
ba305e31 85#define VREG_VOLTAGE_SMPS_4030 9
441a4505
RN		 86/* TWL6030 register offsets */
87#define VREG_TRANS 1
88#define VREG_STATE 2
89#define VREG_VOLTAGE 3
4d94aee5 90#define VREG_VOLTAGE_SMPS 4
441a4505
RN		 91/* TWL6030 Misc register offsets */
92#define VREG_BC_ALL 1
93#define VREG_BC_REF 2
94#define VREG_BC_PROC 3
95#define VREG_BC_CLK_RST 4
fa16a5c1 96
21657ebf
SH		 97/* TWL6030 LDO register values for CFG_STATE */
98#define TWL6030_CFG_STATE_OFF 0x00
99#define TWL6030_CFG_STATE_ON 0x01
9a0244ad
SH		 100#define TWL6030_CFG_STATE_OFF2 0x02
101#define TWL6030_CFG_STATE_SLEEP 0x03
21657ebf 102#define TWL6030_CFG_STATE_GRP_SHIFT 5
b2456779
SH		 103#define TWL6030_CFG_STATE_APP_SHIFT 2
104#define TWL6030_CFG_STATE_APP_MASK (0x03 << TWL6030_CFG_STATE_APP_SHIFT)
105#define TWL6030_CFG_STATE_APP(v) (((v) & TWL6030_CFG_STATE_APP_MASK) >>\
106 TWL6030_CFG_STATE_APP_SHIFT)
21657ebf 107
4d94aee5
GG		 108/* Flags for SMPS Voltage reading */
109#define SMPS_OFFSET_EN BIT(0)
110#define SMPS_EXTENDED_EN BIT(1)
111
89ce43fb 112/* twl6032 SMPS EPROM values */
4d94aee5
GG		 113#define TWL6030_SMPS_OFFSET 0xB0
114#define TWL6030_SMPS_MULT 0xB3
115#define SMPS_MULTOFFSET_SMPS4 BIT(0)
116#define SMPS_MULTOFFSET_VIO BIT(1)
117#define SMPS_MULTOFFSET_SMPS3 BIT(6)
118
fa16a5c1 119static inline int
441a4505 120twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
fa16a5c1
DB		 121{
122 u8 value;
123 int status;
124
441a4505 125 status = twl_i2c_read_u8(slave_subgp,
fa16a5c1
DB		 126 &value, info->base + offset);
127 return (status < 0) ? status : value;
128}
129
130static inline int
441a4505
RN		 131twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
132 u8 value)
fa16a5c1 133{
441a4505 134 return twl_i2c_write_u8(slave_subgp,
fa16a5c1
DB		 135 value, info->base + offset);
136}
137
138/*----------------------------------------------------------------------*/
139
140/* generic power resource operations, which work on all regulators */
141
c4aa6f31 142static int twlreg_grp(struct regulator_dev *rdev)
fa16a5c1 143{
441a4505
RN		 144 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
145 VREG_GRP);
fa16a5c1
DB		 146}
147
148/*
149 * Enable/disable regulators by joining/leaving the P1 (processor) group.
150 * We assume nobody else is updating the DEV_GRP registers.
151 */
441a4505
RN		 152/* definition for 4030 family */
153#define P3_GRP_4030 BIT(7) /* "peripherals" */
154#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
155#define P1_GRP_4030 BIT(5) /* CPU/Linux */
156/* definition for 6030 family */
157#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
158#define P2_GRP_6030 BIT(1) /* "peripherals" */
159#define P1_GRP_6030 BIT(0) /* CPU/Linux */
fa16a5c1 160
b2456779 161static int twl4030reg_is_enabled(struct regulator_dev *rdev)
fa16a5c1 162{
c4aa6f31 163 int state = twlreg_grp(rdev);
fa16a5c1
DB		 164
165 if (state < 0)
166 return state;
167
b2456779
SH		 168 return state & P1_GRP_4030;
169}
170
171static int twl6030reg_is_enabled(struct regulator_dev *rdev)
172{
173 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 174 int grp = 0, val;
b2456779 175
89ce43fb 176 if (!(twl_class_is_6030() && (info->features & TWL6032_SUBCLASS))) {
b6f476c2
AL		 177 grp = twlreg_grp(rdev);
178 if (grp < 0)
179 return grp;
4d94aee5 180 grp &= P1_GRP_6030;
b6f476c2 181 } else {
4d94aee5 182 grp = 1;
b6f476c2 183 }
b2456779
SH		 184
185 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
186 val = TWL6030_CFG_STATE_APP(val);
187
188 return grp && (val == TWL6030_CFG_STATE_ON);
fa16a5c1
DB		 189}
190
2330b05c
ID		 191#define PB_I2C_BUSY BIT(0)
192#define PB_I2C_BWEN BIT(1)
193
194/* Wait until buffer empty/ready to send a word on power bus. */
195static int twl4030_wait_pb_ready(void)
196{
197
198 int ret;
199 int timeout = 10;
200 u8 val;
201
202 do {
203 ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val,
204 TWL4030_PM_MASTER_PB_CFG);
205 if (ret < 0)
206 return ret;
207
208 if (!(val & PB_I2C_BUSY))
209 return 0;
210
211 mdelay(1);
212 timeout--;
213 } while (timeout);
214
215 return -ETIMEDOUT;
216}
217
218/* Send a word over the powerbus */
219static int twl4030_send_pb_msg(unsigned msg)
220{
221 u8 val;
222 int ret;
223
224 /* save powerbus configuration */
225 ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val,
226 TWL4030_PM_MASTER_PB_CFG);
227 if (ret < 0)
228 return ret;
229
230 /* Enable i2c access to powerbus */
231 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val | PB_I2C_BWEN,
232 TWL4030_PM_MASTER_PB_CFG);
233 if (ret < 0)
234 return ret;
235
236 ret = twl4030_wait_pb_ready();
237 if (ret < 0)
238 return ret;
239
240 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg >> 8,
241 TWL4030_PM_MASTER_PB_WORD_MSB);
242 if (ret < 0)
243 return ret;
244
245 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg & 0xff,
246 TWL4030_PM_MASTER_PB_WORD_LSB);
247 if (ret < 0)
248 return ret;
249
250 ret = twl4030_wait_pb_ready();
251 if (ret < 0)
252 return ret;
253
254 /* Restore powerbus configuration */
255 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val,
74d8b45f 256 TWL4030_PM_MASTER_PB_CFG);
2330b05c
ID		 257}
258
f8c2940b 259static int twl4030reg_enable(struct regulator_dev *rdev)
fa16a5c1
DB		 260{
261 struct twlreg_info *info = rdev_get_drvdata(rdev);
262 int grp;
53b8a9d9 263 int ret;
fa16a5c1 264
b6f476c2 265 grp = twlreg_grp(rdev);
fa16a5c1
DB		 266 if (grp < 0)
267 return grp;
268
f8c2940b 269 grp |= P1_GRP_4030;
441a4505 270
53b8a9d9
JKS		 271 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
272
f8c2940b
B		 273 return ret;
274}
275
276static int twl6030reg_enable(struct regulator_dev *rdev)
277{
278 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 279 int grp = 0;
f8c2940b
B		 280 int ret;
281
89ce43fb 282 if (!(twl_class_is_6030() && (info->features & TWL6032_SUBCLASS)))
b6f476c2 283 grp = twlreg_grp(rdev);
f8c2940b
B		 284 if (grp < 0)
285 return grp;
286
287 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
288 grp << TWL6030_CFG_STATE_GRP_SHIFT |
289 TWL6030_CFG_STATE_ON);
48c936d6
AL		 290 return ret;
291}
21657ebf 292
0ff3897d 293static int twl4030reg_disable(struct regulator_dev *rdev)
fa16a5c1
DB		 294{
295 struct twlreg_info *info = rdev_get_drvdata(rdev);
296 int grp;
21657ebf 297 int ret;
fa16a5c1 298
b6f476c2 299 grp = twlreg_grp(rdev);
fa16a5c1
DB		 300 if (grp < 0)
301 return grp;
302
0ff3897d 303 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
441a4505 304
21657ebf
SH		 305 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
306
0ff3897d
B		 307 return ret;
308}
309
310static int twl6030reg_disable(struct regulator_dev *rdev)
311{
312 struct twlreg_info *info = rdev_get_drvdata(rdev);
313 int grp = 0;
314 int ret;
315
89ce43fb 316 if (!(twl_class_is_6030() && (info->features & TWL6032_SUBCLASS)))
4d94aee5 317 grp = P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030;
0ff3897d
B		 318
319 /* For 6030, set the off state for all grps enabled */
320 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
321 (grp) << TWL6030_CFG_STATE_GRP_SHIFT |
322 TWL6030_CFG_STATE_OFF);
21657ebf
SH		 323
324 return ret;
fa16a5c1
DB		 325}
326
9a0244ad 327static int twl4030reg_get_status(struct regulator_dev *rdev)
fa16a5c1 328{
c4aa6f31 329 int state = twlreg_grp(rdev);
fa16a5c1
DB		 330
331 if (state < 0)
332 return state;
333 state &= 0x0f;
334
335 /* assume state != WARM_RESET; we'd not be running... */
336 if (!state)
337 return REGULATOR_STATUS_OFF;
338 return (state & BIT(3))
339 ? REGULATOR_STATUS_NORMAL
340 : REGULATOR_STATUS_STANDBY;
341}
342
9a0244ad
SH		 343static int twl6030reg_get_status(struct regulator_dev *rdev)
344{
345 struct twlreg_info *info = rdev_get_drvdata(rdev);
346 int val;
347
348 val = twlreg_grp(rdev);
349 if (val < 0)
350 return val;
351
352 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
353
354 switch (TWL6030_CFG_STATE_APP(val)) {
355 case TWL6030_CFG_STATE_ON:
356 return REGULATOR_STATUS_NORMAL;
357
358 case TWL6030_CFG_STATE_SLEEP:
359 return REGULATOR_STATUS_STANDBY;
360
361 case TWL6030_CFG_STATE_OFF:
362 case TWL6030_CFG_STATE_OFF2:
363 default:
364 break;
365 }
366
367 return REGULATOR_STATUS_OFF;
368}
369
1a39962f 370static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
fa16a5c1
DB		 371{
372 struct twlreg_info *info = rdev_get_drvdata(rdev);
373 unsigned message;
fa16a5c1
DB		 374
375 /* We can only set the mode through state machine commands... */
376 switch (mode) {
377 case REGULATOR_MODE_NORMAL:
378 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
379 break;
380 case REGULATOR_MODE_STANDBY:
381 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
382 break;
383 default:
384 return -EINVAL;
385 }
386
2330b05c 387 return twl4030_send_pb_msg(message);
fa16a5c1
DB		 388}
389
a221f95e
ID		 390static inline unsigned int twl4030reg_map_mode(unsigned int mode)
391{
392 switch (mode) {
393 case RES_STATE_ACTIVE:
394 return REGULATOR_MODE_NORMAL;
395 case RES_STATE_SLEEP:
396 return REGULATOR_MODE_STANDBY;
397 default:
398 return -EINVAL;
399 }
400}
401
1a39962f
SH		 402static int twl6030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
403{
404 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 405 int grp = 0;
1a39962f
SH		 406 int val;
407
89ce43fb 408 if (!(twl_class_is_6030() && (info->features & TWL6032_SUBCLASS)))
b6f476c2 409 grp = twlreg_grp(rdev);
1a39962f
SH		 410
411 if (grp < 0)
412 return grp;
413
414 /* Compose the state register settings */
415 val = grp << TWL6030_CFG_STATE_GRP_SHIFT;
416 /* We can only set the mode through state machine commands... */
417 switch (mode) {
418 case REGULATOR_MODE_NORMAL:
419 val |= TWL6030_CFG_STATE_ON;
420 break;
421 case REGULATOR_MODE_STANDBY:
422 val |= TWL6030_CFG_STATE_SLEEP;
423 break;
424
425 default:
426 return -EINVAL;
427 }
428
429 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, val);
430}
431
fa16a5c1
DB		 432/*----------------------------------------------------------------------*/
433
434/*
435 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
436 * select field in its control register. We use tables indexed by VSEL
437 * to record voltages in milliVolts. (Accuracy is about three percent.)
438 *
439 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
440 * currently handled by listing two slightly different VAUX2 regulators,
441 * only one of which will be configured.
442 *
443 * VSEL values documented as "TI cannot support these values" are flagged
444 * in these tables as UNSUP() values; we normally won't assign them.
d6bb69cf
AH		 445 *
446 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
447 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
fa16a5c1 448 */
fa16a5c1 449#define UNSUP_MASK 0x8000
fa16a5c1
DB		 450
451#define UNSUP(x) (UNSUP_MASK | (x))
411a2df5
N		 452#define IS_UNSUP(info, x) \
453 ((UNSUP_MASK & (x)) && \
454 !((info)->features & TWL4030_ALLOW_UNSUPPORTED))
fa16a5c1
DB		 455#define LDO_MV(x) (~UNSUP_MASK & (x))
456
457
458static const u16 VAUX1_VSEL_table[] = {
459 UNSUP(1500), UNSUP(1800), 2500, 2800,
460 3000, 3000, 3000, 3000,
461};
462static const u16 VAUX2_4030_VSEL_table[] = {
463 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
464 1500, 1800, UNSUP(1850), 2500,
465 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
466 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
467};
468static const u16 VAUX2_VSEL_table[] = {
469 1700, 1700, 1900, 1300,
470 1500, 1800, 2000, 2500,
471 2100, 2800, 2200, 2300,
472 2400, 2400, 2400, 2400,
473};
474static const u16 VAUX3_VSEL_table[] = {
475 1500, 1800, 2500, 2800,
d6bb69cf 476 3000, 3000, 3000, 3000,
fa16a5c1
DB		 477};
478static const u16 VAUX4_VSEL_table[] = {
479 700, 1000, 1200, UNSUP(1300),
480 1500, 1800, UNSUP(1850), 2500,
1897e742
DB		 481 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
482 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
fa16a5c1
DB		 483};
484static const u16 VMMC1_VSEL_table[] = {
485 1850, 2850, 3000, 3150,
486};
487static const u16 VMMC2_VSEL_table[] = {
488 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
489 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
490 2600, 2800, 2850, 3000,
491 3150, 3150, 3150, 3150,
492};
493static const u16 VPLL1_VSEL_table[] = {
494 1000, 1200, 1300, 1800,
495 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
496};
497static const u16 VPLL2_VSEL_table[] = {
498 700, 1000, 1200, 1300,
499 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
500 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
501 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
502};
503static const u16 VSIM_VSEL_table[] = {
504 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
505 2800, 3000, 3000, 3000,
506};
507static const u16 VDAC_VSEL_table[] = {
508 1200, 1300, 1800, 1800,
509};
07fc493f
JKS		 510static const u16 VIO_VSEL_table[] = {
511 1800, 1850,
512};
513static const u16 VINTANA2_VSEL_table[] = {
514 2500, 2750,
515};
fa16a5c1 516
3e3d3be7 517static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB		 518{
519 struct twlreg_info *info = rdev_get_drvdata(rdev);
520 int mV = info->table[index];
521
411a2df5 522 return IS_UNSUP(info, mV) ? 0 : (LDO_MV(mV) * 1000);
66b659e6
DB		 523}
524
fa16a5c1 525static int
dd16b1f8 526twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
fa16a5c1
DB		 527{
528 struct twlreg_info *info = rdev_get_drvdata(rdev);
fa16a5c1 529
dd16b1f8
AL		 530 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
531 selector);
fa16a5c1
DB		 532}
533
6949fbe5 534static int twl4030ldo_get_voltage_sel(struct regulator_dev *rdev)
fa16a5c1
DB		 535{
536 struct twlreg_info *info = rdev_get_drvdata(rdev);
6949fbe5 537 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE);
fa16a5c1
DB		 538
539 if (vsel < 0)
540 return vsel;
541
542 vsel &= info->table_len - 1;
6949fbe5 543 return vsel;
fa16a5c1
DB		 544}
545
3e3d3be7
RN		 546static struct regulator_ops twl4030ldo_ops = {
547 .list_voltage = twl4030ldo_list_voltage,
66b659e6 548
dd16b1f8 549 .set_voltage_sel = twl4030ldo_set_voltage_sel,
6949fbe5 550 .get_voltage_sel = twl4030ldo_get_voltage_sel,
3e3d3be7 551
f8c2940b 552 .enable = twl4030reg_enable,
0ff3897d 553 .disable = twl4030reg_disable,
b2456779 554 .is_enabled = twl4030reg_is_enabled,
3e3d3be7 555
1a39962f 556 .set_mode = twl4030reg_set_mode,
3e3d3be7 557
9a0244ad 558 .get_status = twl4030reg_get_status,
3e3d3be7
RN		 559};
560
ba305e31
TK		 561static int
562twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
563 unsigned *selector)
564{
565 struct twlreg_info *info = rdev_get_drvdata(rdev);
566 int vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
567
63bfff4e
TK		 568 if (info->set_voltage) {
569 return info->set_voltage(info->data, min_uV);
570 } else {
571 twlreg_write(info, TWL_MODULE_PM_RECEIVER,
572 VREG_VOLTAGE_SMPS_4030, vsel);
573 }
574
ba305e31
TK		 575 return 0;
576}
577
578static int twl4030smps_get_voltage(struct regulator_dev *rdev)
579{
580 struct twlreg_info *info = rdev_get_drvdata(rdev);
63bfff4e
TK		 581 int vsel;
582
583 if (info->get_voltage)
584 return info->get_voltage(info->data);
585
586 vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
ba305e31
TK		 587 VREG_VOLTAGE_SMPS_4030);
588
589 return vsel * 12500 + 600000;
590}
591
592static struct regulator_ops twl4030smps_ops = {
593 .set_voltage = twl4030smps_set_voltage,
594 .get_voltage = twl4030smps_get_voltage,
595};
596
34a38440
TK		 597static int twl6030coresmps_set_voltage(struct regulator_dev *rdev, int min_uV,
598 int max_uV, unsigned *selector)
599{
600 struct twlreg_info *info = rdev_get_drvdata(rdev);
601
602 if (info->set_voltage)
603 return info->set_voltage(info->data, min_uV);
604
605 return -ENODEV;
606}
607
608static int twl6030coresmps_get_voltage(struct regulator_dev *rdev)
609{
610 struct twlreg_info *info = rdev_get_drvdata(rdev);
611
612 if (info->get_voltage)
613 return info->get_voltage(info->data);
614
615 return -ENODEV;
616}
617
618static struct regulator_ops twl6030coresmps_ops = {
619 .set_voltage = twl6030coresmps_set_voltage,
620 .get_voltage = twl6030coresmps_get_voltage,
621};
622
c6a717c9
AL		 623static int twl6030ldo_list_voltage(struct regulator_dev *rdev, unsigned sel)
624{
625 struct twlreg_info *info = rdev_get_drvdata(rdev);
626
627 switch (sel) {
628 case 0:
629 return 0;
630 case 1 ... 24:
631 /* Linear mapping from 00000001 to 00011000:
632 * Absolute voltage value = 1.0 V + 0.1 V × (sel – 00000001)
633 */
634 return (info->min_mV + 100 * (sel - 1)) * 1000;
635 case 25 ... 30:
636 return -EINVAL;
637 case 31:
638 return 2750000;
639 default:
640 return -EINVAL;
641 }
642}
643
3e3d3be7 644static int
4bcb9f43 645twl6030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
3e3d3be7
RN		 646{
647 struct twlreg_info *info = rdev_get_drvdata(rdev);
3e3d3be7 648
4bcb9f43
AL		 649 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
650 selector);
3e3d3be7
RN		 651}
652
4bcb9f43 653static int twl6030ldo_get_voltage_sel(struct regulator_dev *rdev)
3e3d3be7
RN		 654{
655 struct twlreg_info *info = rdev_get_drvdata(rdev);
a3cb80f4 656 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE);
3e3d3be7 657
4bcb9f43 658 return vsel;
3e3d3be7
RN		 659}
660
661static struct regulator_ops twl6030ldo_ops = {
c6a717c9 662 .list_voltage = twl6030ldo_list_voltage,
3e3d3be7 663
4bcb9f43
AL		 664 .set_voltage_sel = twl6030ldo_set_voltage_sel,
665 .get_voltage_sel = twl6030ldo_get_voltage_sel,
fa16a5c1 666
f8c2940b 667 .enable = twl6030reg_enable,
0ff3897d 668 .disable = twl6030reg_disable,
b2456779 669 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 670
1a39962f 671 .set_mode = twl6030reg_set_mode,
fa16a5c1 672
9a0244ad 673 .get_status = twl6030reg_get_status,
fa16a5c1
DB		 674};
675
676/*----------------------------------------------------------------------*/
677
b2456779 678static struct regulator_ops twl4030fixed_ops = {
b3816d50 679 .list_voltage = regulator_list_voltage_linear,
b2456779 680
f8c2940b 681 .enable = twl4030reg_enable,
0ff3897d 682 .disable = twl4030reg_disable,
b2456779
SH		 683 .is_enabled = twl4030reg_is_enabled,
684
1a39962f 685 .set_mode = twl4030reg_set_mode,
b2456779 686
9a0244ad 687 .get_status = twl4030reg_get_status,
b2456779
SH		 688};
689
690static struct regulator_ops twl6030fixed_ops = {
b3816d50 691 .list_voltage = regulator_list_voltage_linear,
66b659e6 692
f8c2940b 693 .enable = twl6030reg_enable,
0ff3897d 694 .disable = twl6030reg_disable,
b2456779 695 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 696
1a39962f 697 .set_mode = twl6030reg_set_mode,
fa16a5c1 698
9a0244ad 699 .get_status = twl6030reg_get_status,
fa16a5c1
DB		 700};
701
4d94aee5
GG		 702/*
703 * SMPS status and control
704 */
705
706static int twl6030smps_list_voltage(struct regulator_dev *rdev, unsigned index)
707{
708 struct twlreg_info *info = rdev_get_drvdata(rdev);
709
710 int voltage = 0;
711
712 switch (info->flags) {
713 case SMPS_OFFSET_EN:
714 voltage = 100000;
715 /* fall through */
716 case 0:
717 switch (index) {
718 case 0:
719 voltage = 0;
720 break;
721 case 58:
722 voltage = 1350 * 1000;
723 break;
724 case 59:
725 voltage = 1500 * 1000;
726 break;
727 case 60:
728 voltage = 1800 * 1000;
729 break;
730 case 61:
731 voltage = 1900 * 1000;
732 break;
733 case 62:
734 voltage = 2100 * 1000;
735 break;
736 default:
737 voltage += (600000 + (12500 * (index - 1)));
738 }
739 break;
740 case SMPS_EXTENDED_EN:
741 switch (index) {
742 case 0:
743 voltage = 0;
744 break;
745 case 58:
746 voltage = 2084 * 1000;
747 break;
748 case 59:
749 voltage = 2315 * 1000;
750 break;
751 case 60:
752 voltage = 2778 * 1000;
753 break;
754 case 61:
755 voltage = 2932 * 1000;
756 break;
757 case 62:
758 voltage = 3241 * 1000;
759 break;
760 default:
761 voltage = (1852000 + (38600 * (index - 1)));
762 }
763 break;
764 case SMPS_OFFSET_EN | SMPS_EXTENDED_EN:
765 switch (index) {
766 case 0:
767 voltage = 0;
768 break;
769 case 58:
770 voltage = 4167 * 1000;
771 break;
772 case 59:
773 voltage = 2315 * 1000;
774 break;
775 case 60:
776 voltage = 2778 * 1000;
777 break;
778 case 61:
779 voltage = 2932 * 1000;
780 break;
781 case 62:
782 voltage = 3241 * 1000;
783 break;
784 default:
785 voltage = (2161000 + (38600 * (index - 1)));
786 }
787 break;
788 }
789
790 return voltage;
791}
792
38f8f43c
AL		 793static int twl6030smps_map_voltage(struct regulator_dev *rdev, int min_uV,
794 int max_uV)
4d94aee5 795{
38f8f43c
AL		 796 struct twlreg_info *info = rdev_get_drvdata(rdev);
797 int vsel = 0;
4d94aee5
GG		 798
799 switch (info->flags) {
800 case 0:
801 if (min_uV == 0)
802 vsel = 0;
a33b6e5a 803 else if ((min_uV >= 600000) && (min_uV <= 1300000)) {
268a1641 804 vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
0cb2f123 805 vsel++;
4d94aee5
GG		 806 }
807 /* Values 1..57 for vsel are linear and can be calculated
808 * values 58..62 are non linear.
809 */
78292f4e 810 else if ((min_uV > 1900000) && (min_uV <= 2100000))
4d94aee5 811 vsel = 62;
78292f4e 812 else if ((min_uV > 1800000) && (min_uV <= 1900000))
4d94aee5 813 vsel = 61;
78292f4e 814 else if ((min_uV > 1500000) && (min_uV <= 1800000))
4d94aee5 815 vsel = 60;
78292f4e 816 else if ((min_uV > 1350000) && (min_uV <= 1500000))
4d94aee5 817 vsel = 59;
78292f4e 818 else if ((min_uV > 1300000) && (min_uV <= 1350000))
4d94aee5
GG		 819 vsel = 58;
820 else
821 return -EINVAL;
822 break;
823 case SMPS_OFFSET_EN:
824 if (min_uV == 0)
825 vsel = 0;
a33b6e5a 826 else if ((min_uV >= 700000) && (min_uV <= 1420000)) {
268a1641 827 vsel = DIV_ROUND_UP(min_uV - 700000, 12500);
0cb2f123 828 vsel++;
4d94aee5
GG		 829 }
830 /* Values 1..57 for vsel are linear and can be calculated
831 * values 58..62 are non linear.
832 */
78292f4e 833 else if ((min_uV > 1900000) && (min_uV <= 2100000))
4d94aee5 834 vsel = 62;
78292f4e 835 else if ((min_uV > 1800000) && (min_uV <= 1900000))
4d94aee5 836 vsel = 61;
78292f4e 837 else if ((min_uV > 1350000) && (min_uV <= 1800000))
4d94aee5 838 vsel = 60;
78292f4e 839 else if ((min_uV > 1350000) && (min_uV <= 1500000))
4d94aee5 840 vsel = 59;
78292f4e 841 else if ((min_uV > 1300000) && (min_uV <= 1350000))
4d94aee5
GG		 842 vsel = 58;
843 else
844 return -EINVAL;
845 break;
846 case SMPS_EXTENDED_EN:
0cb2f123 847 if (min_uV == 0) {
4d94aee5 848 vsel = 0;
0cb2f123 849 } else if ((min_uV >= 1852000) && (max_uV <= 4013600)) {
268a1641 850 vsel = DIV_ROUND_UP(min_uV - 1852000, 38600);
0cb2f123
AL		 851 vsel++;
852 }
4d94aee5
GG		 853 break;
854 case SMPS_OFFSET_EN|SMPS_EXTENDED_EN:
0cb2f123 855 if (min_uV == 0) {
4d94aee5 856 vsel = 0;
78292f4e 857 } else if ((min_uV >= 2161000) && (min_uV <= 4321000)) {
268a1641 858 vsel = DIV_ROUND_UP(min_uV - 2161000, 38600);
0cb2f123
AL		 859 vsel++;
860 }
4d94aee5
GG		 861 break;
862 }
863
38f8f43c
AL		 864 return vsel;
865}
78292f4e 866
38f8f43c
AL		 867static int twl6030smps_set_voltage_sel(struct regulator_dev *rdev,
868 unsigned int selector)
869{
870 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5
GG		 871
872 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS,
38f8f43c 873 selector);
4d94aee5
GG		 874}
875
876static int twl6030smps_get_voltage_sel(struct regulator_dev *rdev)
877{
878 struct twlreg_info *info = rdev_get_drvdata(rdev);
879
880 return twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS);
881}
882
883static struct regulator_ops twlsmps_ops = {
884 .list_voltage = twl6030smps_list_voltage,
38f8f43c 885 .map_voltage = twl6030smps_map_voltage,
4d94aee5 886
38f8f43c 887 .set_voltage_sel = twl6030smps_set_voltage_sel,
4d94aee5
GG		 888 .get_voltage_sel = twl6030smps_get_voltage_sel,
889
890 .enable = twl6030reg_enable,
891 .disable = twl6030reg_disable,
892 .is_enabled = twl6030reg_is_enabled,
893
894 .set_mode = twl6030reg_set_mode,
895
896 .get_status = twl6030reg_get_status,
897};
898
fa16a5c1
DB		 899/*----------------------------------------------------------------------*/
900
045f972f
JKS		 901#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
902 remap_conf) \
903 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
a221f95e
ID		 904 remap_conf, TWL4030, twl4030fixed_ops, \
905 twl4030reg_map_mode)
af8b244f
A		 906#define TWL6030_FIXED_LDO(label, offset, mVolts, turnon_delay) \
907 TWL_FIXED_LDO(label, offset, mVolts, 0x0, turnon_delay, \
2ac1ea2c 908 0x0, TWL6030, twl6030fixed_ops, NULL)
045f972f 909
2098e95c 910#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
0ffff5a6 911static const struct twlreg_info TWL4030_INFO_##label = { \
fa16a5c1
DB		 912 .base = offset, \
913 .id = num, \
914 .table_len = ARRAY_SIZE(label##_VSEL_table), \
915 .table = label##_VSEL_table, \
045f972f 916 .remap = remap_conf, \
fa16a5c1
DB		 917 .desc = { \
918 .name = #label, \
3e3d3be7 919 .id = TWL4030_REG_##label, \
66b659e6 920 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
3e3d3be7
RN		 921 .ops = &twl4030ldo_ops, \
922 .type = REGULATOR_VOLTAGE, \
923 .owner = THIS_MODULE, \
fca53d86 924 .enable_time = turnon_delay, \
a221f95e 925 .of_map_mode = twl4030reg_map_mode, \
3e3d3be7
RN		 926 }, \
927 }
928
ba305e31 929#define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf) \
0ffff5a6 930static const struct twlreg_info TWL4030_INFO_##label = { \
ba305e31
TK		 931 .base = offset, \
932 .id = num, \
ba305e31
TK		 933 .remap = remap_conf, \
934 .desc = { \
935 .name = #label, \
936 .id = TWL4030_REG_##label, \
937 .ops = &twl4030smps_ops, \
938 .type = REGULATOR_VOLTAGE, \
939 .owner = THIS_MODULE, \
fca53d86 940 .enable_time = turnon_delay, \
a221f95e 941 .of_map_mode = twl4030reg_map_mode, \
ba305e31
TK		 942 }, \
943 }
944
2098e95c 945#define TWL6030_ADJUSTABLE_SMPS(label) \
0ffff5a6 946static const struct twlreg_info TWL6030_INFO_##label = { \
34a38440
TK		 947 .desc = { \
948 .name = #label, \
949 .id = TWL6030_REG_##label, \
950 .ops = &twl6030coresmps_ops, \
951 .type = REGULATOR_VOLTAGE, \
952 .owner = THIS_MODULE, \
953 }, \
954 }
955
2098e95c 956#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
0ffff5a6 957static const struct twlreg_info TWL6030_INFO_##label = { \
3e3d3be7 958 .base = offset, \
3e3d3be7
RN		 959 .min_mV = min_mVolts, \
960 .max_mV = max_mVolts, \
3e3d3be7
RN		 961 .desc = { \
962 .name = #label, \
963 .id = TWL6030_REG_##label, \
c6a717c9 964 .n_voltages = 32, \
3e3d3be7 965 .ops = &twl6030ldo_ops, \
fa16a5c1
DB		 966 .type = REGULATOR_VOLTAGE, \
967 .owner = THIS_MODULE, \
968 }, \
969 }
970
89ce43fb
GG		 971#define TWL6032_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
972static const struct twlreg_info TWL6032_INFO_##label = { \
4d94aee5 973 .base = offset, \
4d94aee5
GG		 974 .min_mV = min_mVolts, \
975 .max_mV = max_mVolts, \
976 .desc = { \
977 .name = #label, \
89ce43fb 978 .id = TWL6032_REG_##label, \
c6a717c9 979 .n_voltages = 32, \
4d94aee5
GG		 980 .ops = &twl6030ldo_ops, \
981 .type = REGULATOR_VOLTAGE, \
982 .owner = THIS_MODULE, \
983 }, \
984 }
3e3d3be7 985
045f972f 986#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
a221f95e 987 family, operations, map_mode) \
0ffff5a6 988static const struct twlreg_info TWLFIXED_INFO_##label = { \
fa16a5c1
DB		 989 .base = offset, \
990 .id = num, \
991 .min_mV = mVolts, \
045f972f 992 .remap = remap_conf, \
fa16a5c1
DB		 993 .desc = { \
994 .name = #label, \
c4aa6f31 995 .id = family##_REG_##label, \
66b659e6 996 .n_voltages = 1, \
b2456779 997 .ops = &operations, \
fa16a5c1
DB		 998 .type = REGULATOR_VOLTAGE, \
999 .owner = THIS_MODULE, \
b3816d50 1000 .min_uV = mVolts * 1000, \
fca53d86 1001 .enable_time = turnon_delay, \
a221f95e 1002 .of_map_mode = map_mode, \
8e6de4a3
B		 1003 }, \
1004 }
1005
89ce43fb 1006#define TWL6032_ADJUSTABLE_SMPS(label, offset) \
0ffff5a6 1007static const struct twlreg_info TWLSMPS_INFO_##label = { \
4d94aee5 1008 .base = offset, \
4d94aee5
GG		 1009 .min_mV = 600, \
1010 .max_mV = 2100, \
1011 .desc = { \
1012 .name = #label, \
89ce43fb 1013 .id = TWL6032_REG_##label, \
4d94aee5
GG		 1014 .n_voltages = 63, \
1015 .ops = &twlsmps_ops, \
1016 .type = REGULATOR_VOLTAGE, \
1017 .owner = THIS_MODULE, \
1018 }, \
1019 }
1020
fa16a5c1
DB		 1021/*
1022 * We list regulators here if systems need some level of
1023 * software control over them after boot.
1024 */
2098e95c
RN		 1025TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08);
1026TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08);
1027TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08);
1028TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08);
1029TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08);
1030TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08);
1031TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08);
1032TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00);
1033TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08);
1034TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00);
1035TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08);
1036TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08);
1037TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08);
1038TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08);
1039TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08);
1040/* VUSBCP is managed *only* by the USB subchip */
1041/* 6030 REG with base as PMC Slave Misc : 0x0030 */
1042/* Turnon-delay and remap configuration values for 6030 are not
1043 verified since the specification is not public */
1044TWL6030_ADJUSTABLE_SMPS(VDD1);
1045TWL6030_ADJUSTABLE_SMPS(VDD2);
1046TWL6030_ADJUSTABLE_SMPS(VDD3);
1047TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1000, 3300);
1048TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 1000, 3300);
1049TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 1000, 3300);
1050TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 1000, 3300);
1051TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 1000, 3300);
1052TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 1000, 3300);
1053/* 6025 are renamed compared to 6030 versions */
89ce43fb
GG		 1054TWL6032_ADJUSTABLE_LDO(LDO2, 0x54, 1000, 3300);
1055TWL6032_ADJUSTABLE_LDO(LDO4, 0x58, 1000, 3300);
1056TWL6032_ADJUSTABLE_LDO(LDO3, 0x5c, 1000, 3300);
1057TWL6032_ADJUSTABLE_LDO(LDO5, 0x68, 1000, 3300);
1058TWL6032_ADJUSTABLE_LDO(LDO1, 0x6c, 1000, 3300);
1059TWL6032_ADJUSTABLE_LDO(LDO7, 0x74, 1000, 3300);
1060TWL6032_ADJUSTABLE_LDO(LDO6, 0x60, 1000, 3300);
1061TWL6032_ADJUSTABLE_LDO(LDOLN, 0x64, 1000, 3300);
1062TWL6032_ADJUSTABLE_LDO(LDOUSB, 0x70, 1000, 3300);
908d6d52 1063TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08);
2098e95c
RN		 1064TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08);
1065TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08);
1066TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08);
1067TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08);
1068TWL6030_FIXED_LDO(VANA, 0x50, 2100, 0);
1069TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 0);
1070TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 0);
1071TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 0);
e9d47fa4
PU		 1072TWL6030_FIXED_LDO(V1V8, 0x16, 1800, 0);
1073TWL6030_FIXED_LDO(V2V1, 0x1c, 2100, 0);
89ce43fb
GG		 1074TWL6032_ADJUSTABLE_SMPS(SMPS3, 0x34);
1075TWL6032_ADJUSTABLE_SMPS(SMPS4, 0x10);
1076TWL6032_ADJUSTABLE_SMPS(VIO, 0x16);
fa16a5c1 1077
4d94aee5
GG		 1078static u8 twl_get_smps_offset(void)
1079{
1080 u8 value;
1081
1082 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1083 TWL6030_SMPS_OFFSET);
1084 return value;
1085}
1086
1087static u8 twl_get_smps_mult(void)
1088{
1089 u8 value;
1090
1091 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1092 TWL6030_SMPS_MULT);
1093 return value;
1094}
1095
2098e95c
RN		 1096#define TWL_OF_MATCH(comp, family, label) \
1097 { \
1098 .compatible = comp, \
1099 .data = &family##_INFO_##label, \
1100 }
1101
1102#define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label)
1103#define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label)
89ce43fb 1104#define TWL6032_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6032, label)
2098e95c 1105#define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label)
2098e95c
RN		 1106#define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label)
1107
3d68dfe3 1108static const struct of_device_id twl_of_match[] = {
2098e95c
RN		 1109 TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1),
1110 TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030),
1111 TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2),
1112 TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3),
1113 TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4),
1114 TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1),
1115 TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2),
1116 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1),
1117 TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2),
1118 TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM),
1119 TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC),
1120 TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
1121 TWL4030_OF_MATCH("ti,twl4030-vio", VIO),
1122 TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1),
1123 TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2),
1124 TWL6030_OF_MATCH("ti,twl6030-vdd1", VDD1),
1125 TWL6030_OF_MATCH("ti,twl6030-vdd2", VDD2),
1126 TWL6030_OF_MATCH("ti,twl6030-vdd3", VDD3),
1127 TWL6030_OF_MATCH("ti,twl6030-vaux1", VAUX1_6030),
1128 TWL6030_OF_MATCH("ti,twl6030-vaux2", VAUX2_6030),
1129 TWL6030_OF_MATCH("ti,twl6030-vaux3", VAUX3_6030),
1130 TWL6030_OF_MATCH("ti,twl6030-vmmc", VMMC),
1131 TWL6030_OF_MATCH("ti,twl6030-vpp", VPP),
1132 TWL6030_OF_MATCH("ti,twl6030-vusim", VUSIM),
89ce43fb
GG		 1133 TWL6032_OF_MATCH("ti,twl6032-ldo2", LDO2),
1134 TWL6032_OF_MATCH("ti,twl6032-ldo4", LDO4),
1135 TWL6032_OF_MATCH("ti,twl6032-ldo3", LDO3),
1136 TWL6032_OF_MATCH("ti,twl6032-ldo5", LDO5),
1137 TWL6032_OF_MATCH("ti,twl6032-ldo1", LDO1),
1138 TWL6032_OF_MATCH("ti,twl6032-ldo7", LDO7),
1139 TWL6032_OF_MATCH("ti,twl6032-ldo6", LDO6),
1140 TWL6032_OF_MATCH("ti,twl6032-ldoln", LDOLN),
1141 TWL6032_OF_MATCH("ti,twl6032-ldousb", LDOUSB),
908d6d52 1142 TWLFIXED_OF_MATCH("ti,twl4030-vintana1", VINTANA1),
2098e95c
RN		 1143 TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG),
1144 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5),
1145 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8),
1146 TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1),
1147 TWLFIXED_OF_MATCH("ti,twl6030-vana", VANA),
1148 TWLFIXED_OF_MATCH("ti,twl6030-vcxio", VCXIO),
1149 TWLFIXED_OF_MATCH("ti,twl6030-vdac", VDAC),
1150 TWLFIXED_OF_MATCH("ti,twl6030-vusb", VUSB),
e9d47fa4
PU		 1151 TWLFIXED_OF_MATCH("ti,twl6030-v1v8", V1V8),
1152 TWLFIXED_OF_MATCH("ti,twl6030-v2v1", V2V1),
89ce43fb
GG		 1153 TWLSMPS_OF_MATCH("ti,twl6032-smps3", SMPS3),
1154 TWLSMPS_OF_MATCH("ti,twl6032-smps4", SMPS4),
1155 TWLSMPS_OF_MATCH("ti,twl6032-vio", VIO),
2098e95c
RN		 1156 {},
1157};
1158MODULE_DEVICE_TABLE(of, twl_of_match);
1159
a5023574 1160static int twlreg_probe(struct platform_device *pdev)
fa16a5c1 1161{
2098e95c 1162 int i, id;
fa16a5c1 1163 struct twlreg_info *info;
0ffff5a6 1164 const struct twlreg_info *template;
fa16a5c1
DB		 1165 struct regulator_init_data *initdata;
1166 struct regulation_constraints *c;
1167 struct regulator_dev *rdev;
63bfff4e 1168 struct twl_regulator_driver_data *drvdata;
2098e95c 1169 const struct of_device_id *match;
c172708d 1170 struct regulator_config config = { };
2098e95c
RN		 1171
1172 match = of_match_device(twl_of_match, &pdev->dev);
1173 if (match) {
0ffff5a6
AB		 1174 template = match->data;
1175 id = template->desc.id;
2098e95c 1176 initdata = of_get_regulator_init_data(&pdev->dev,
072e78b1
JMC		 1177 pdev->dev.of_node,
1178 &template->desc);
2098e95c
RN		 1179 drvdata = NULL;
1180 } else {
1181 id = pdev->id;
dff91d0b 1182 initdata = dev_get_platdata(&pdev->dev);
0ffff5a6
AB		 1183 for (i = 0, template = NULL; i < ARRAY_SIZE(twl_of_match); i++) {
1184 template = twl_of_match[i].data;
1185 if (template && template->desc.id == id)
5ade3935 1186 break;
2098e95c 1187 }
5ade3935
AL		 1188 if (i == ARRAY_SIZE(twl_of_match))
1189 return -ENODEV;
1190
2098e95c
RN		 1191 drvdata = initdata->driver_data;
1192 if (!drvdata)
1193 return -EINVAL;
fa16a5c1 1194 }
2098e95c 1195
0ffff5a6 1196 if (!template)
fa16a5c1
DB		 1197 return -ENODEV;
1198
fa16a5c1
DB		 1199 if (!initdata)
1200 return -EINVAL;
1201
cd01e32d 1202 info = devm_kmemdup(&pdev->dev, template, sizeof(*info), GFP_KERNEL);
0ffff5a6
AB		 1203 if (!info)
1204 return -ENOMEM;
1205
2098e95c
RN		 1206 if (drvdata) {
1207 /* copy the driver data into regulator data */
1208 info->features = drvdata->features;
1209 info->data = drvdata->data;
1210 info->set_voltage = drvdata->set_voltage;
1211 info->get_voltage = drvdata->get_voltage;
1212 }
4d94aee5 1213
fa16a5c1
DB		 1214 /* Constrain board-specific capabilities according to what
1215 * this driver and the chip itself can actually do.
1216 */
1217 c = &initdata->constraints;
fa16a5c1
DB		 1218 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
1219 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
1220 | REGULATOR_CHANGE_MODE
1221 | REGULATOR_CHANGE_STATUS;
2098e95c 1222 switch (id) {
205e5cd3
JKS		 1223 case TWL4030_REG_VIO:
1224 case TWL4030_REG_VDD1:
1225 case TWL4030_REG_VDD2:
1226 case TWL4030_REG_VPLL1:
1227 case TWL4030_REG_VINTANA1:
1228 case TWL4030_REG_VINTANA2:
1229 case TWL4030_REG_VINTDIG:
1230 c->always_on = true;
1231 break;
1232 default:
1233 break;
1234 }
fa16a5c1 1235
2098e95c 1236 switch (id) {
89ce43fb 1237 case TWL6032_REG_SMPS3:
4d94aee5
GG		 1238 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS3)
1239 info->flags |= SMPS_EXTENDED_EN;
1240 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS3)
1241 info->flags |= SMPS_OFFSET_EN;
1242 break;
89ce43fb 1243 case TWL6032_REG_SMPS4:
4d94aee5
GG		 1244 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS4)
1245 info->flags |= SMPS_EXTENDED_EN;
1246 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS4)
1247 info->flags |= SMPS_OFFSET_EN;
1248 break;
89ce43fb 1249 case TWL6032_REG_VIO:
4d94aee5
GG		 1250 if (twl_get_smps_mult() & SMPS_MULTOFFSET_VIO)
1251 info->flags |= SMPS_EXTENDED_EN;
1252 if (twl_get_smps_offset() & SMPS_MULTOFFSET_VIO)
1253 info->flags |= SMPS_OFFSET_EN;
1254 break;
1255 }
1256
c172708d
MB		 1257 config.dev = &pdev->dev;
1258 config.init_data = initdata;
1259 config.driver_data = info;
1260 config.of_node = pdev->dev.of_node;
1261
00ce070e 1262 rdev = devm_regulator_register(&pdev->dev, &info->desc, &config);
fa16a5c1
DB		 1263 if (IS_ERR(rdev)) {
1264 dev_err(&pdev->dev, "can't register %s, %ld\n",
1265 info->desc.name, PTR_ERR(rdev));
1266 return PTR_ERR(rdev);
1267 }
1268 platform_set_drvdata(pdev, rdev);
1269
776dc923
SH		 1270 if (twl_class_is_4030())
1271 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
30010fa5
JKS		 1272 info->remap);
1273
fa16a5c1
DB		 1274 /* NOTE: many regulators support short-circuit IRQs (presentable
1275 * as REGULATOR_OVER_CURRENT notifications?) configured via:
1276 * - SC_CONFIG
1277 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
1278 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
1279 * - IT_CONFIG
1280 */
1281
1282 return 0;
1283}
1284
c4aa6f31 1285MODULE_ALIAS("platform:twl_reg");
fa16a5c1 1286
c4aa6f31
RN		 1287static struct platform_driver twlreg_driver = {
1288 .probe = twlreg_probe,
fa16a5c1 1289 /* NOTE: short name, to work around driver model truncation of
c4aa6f31 1290 * "twl_regulator.12" (and friends) to "twl_regulator.1".
fa16a5c1 1291 */
2098e95c
RN		 1292 .driver = {
1293 .name = "twl_reg",
2098e95c
RN		 1294 .of_match_table = of_match_ptr(twl_of_match),
1295 },
fa16a5c1
DB		 1296};
1297
c4aa6f31 1298static int __init twlreg_init(void)
fa16a5c1 1299{
c4aa6f31 1300 return platform_driver_register(&twlreg_driver);
fa16a5c1 1301}
c4aa6f31 1302subsys_initcall(twlreg_init);
fa16a5c1 1303
c4aa6f31 1304static void __exit twlreg_exit(void)
fa16a5c1 1305{
c4aa6f31 1306 platform_driver_unregister(&twlreg_driver);
fa16a5c1 1307}
c4aa6f31 1308module_exit(twlreg_exit)
fa16a5c1 1309
c4aa6f31 1310MODULE_DESCRIPTION("TWL regulator driver");
fa16a5c1 1311MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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