Commit | Line | Data |
---|---|---|
fa16a5c1 | 1 | /* |
c4aa6f31 | 2 | * twl-regulator.c -- support regulators in twl4030/twl6030 family chips |
fa16a5c1 DB |
3 | * |
4 | * Copyright (C) 2008 David Brownell | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/err.h> | |
53b8a9d9 | 15 | #include <linux/delay.h> |
fa16a5c1 | 16 | #include <linux/platform_device.h> |
2098e95c RN |
17 | #include <linux/of.h> |
18 | #include <linux/of_device.h> | |
fa16a5c1 DB |
19 | #include <linux/regulator/driver.h> |
20 | #include <linux/regulator/machine.h> | |
2098e95c | 21 | #include <linux/regulator/of_regulator.h> |
b07682b6 | 22 | #include <linux/i2c/twl.h> |
fa16a5c1 DB |
23 | |
24 | ||
25 | /* | |
c4aa6f31 | 26 | * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a |
fa16a5c1 DB |
27 | * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions |
28 | * include an audio codec, battery charger, and more voltage regulators. | |
29 | * These chips are often used in OMAP-based systems. | |
30 | * | |
31 | * This driver implements software-based resource control for various | |
32 | * voltage regulators. This is usually augmented with state machine | |
33 | * based control. | |
34 | */ | |
35 | ||
36 | struct twlreg_info { | |
37 | /* start of regulator's PM_RECEIVER control register bank */ | |
38 | u8 base; | |
39 | ||
c4aa6f31 | 40 | /* twl resource ID, for resource control state machine */ |
fa16a5c1 DB |
41 | u8 id; |
42 | ||
43 | /* voltage in mV = table[VSEL]; table_len must be a power-of-two */ | |
44 | u8 table_len; | |
45 | const u16 *table; | |
46 | ||
045f972f JKS |
47 | /* regulator specific turn-on delay */ |
48 | u16 delay; | |
49 | ||
50 | /* State REMAP default configuration */ | |
51 | u8 remap; | |
52 | ||
fa16a5c1 DB |
53 | /* chip constraints on regulator behavior */ |
54 | u16 min_mV; | |
3e3d3be7 | 55 | u16 max_mV; |
fa16a5c1 | 56 | |
4d94aee5 GG |
57 | u8 flags; |
58 | ||
fa16a5c1 DB |
59 | /* used by regulator core */ |
60 | struct regulator_desc desc; | |
4d94aee5 GG |
61 | |
62 | /* chip specific features */ | |
63 | unsigned long features; | |
63bfff4e TK |
64 | |
65 | /* | |
66 | * optional override functions for voltage set/get | |
67 | * these are currently only used for SMPS regulators | |
68 | */ | |
69 | int (*get_voltage)(void *data); | |
70 | int (*set_voltage)(void *data, int target_uV); | |
71 | ||
72 | /* data passed from board for external get/set voltage */ | |
73 | void *data; | |
fa16a5c1 DB |
74 | }; |
75 | ||
76 | ||
77 | /* LDO control registers ... offset is from the base of its register bank. | |
78 | * The first three registers of all power resource banks help hardware to | |
79 | * manage the various resource groups. | |
80 | */ | |
441a4505 | 81 | /* Common offset in TWL4030/6030 */ |
fa16a5c1 | 82 | #define VREG_GRP 0 |
441a4505 | 83 | /* TWL4030 register offsets */ |
fa16a5c1 DB |
84 | #define VREG_TYPE 1 |
85 | #define VREG_REMAP 2 | |
86 | #define VREG_DEDICATED 3 /* LDO control */ | |
ba305e31 | 87 | #define VREG_VOLTAGE_SMPS_4030 9 |
441a4505 RN |
88 | /* TWL6030 register offsets */ |
89 | #define VREG_TRANS 1 | |
90 | #define VREG_STATE 2 | |
91 | #define VREG_VOLTAGE 3 | |
4d94aee5 | 92 | #define VREG_VOLTAGE_SMPS 4 |
441a4505 RN |
93 | /* TWL6030 Misc register offsets */ |
94 | #define VREG_BC_ALL 1 | |
95 | #define VREG_BC_REF 2 | |
96 | #define VREG_BC_PROC 3 | |
97 | #define VREG_BC_CLK_RST 4 | |
fa16a5c1 | 98 | |
21657ebf SH |
99 | /* TWL6030 LDO register values for CFG_STATE */ |
100 | #define TWL6030_CFG_STATE_OFF 0x00 | |
101 | #define TWL6030_CFG_STATE_ON 0x01 | |
9a0244ad SH |
102 | #define TWL6030_CFG_STATE_OFF2 0x02 |
103 | #define TWL6030_CFG_STATE_SLEEP 0x03 | |
21657ebf | 104 | #define TWL6030_CFG_STATE_GRP_SHIFT 5 |
b2456779 SH |
105 | #define TWL6030_CFG_STATE_APP_SHIFT 2 |
106 | #define TWL6030_CFG_STATE_APP_MASK (0x03 << TWL6030_CFG_STATE_APP_SHIFT) | |
107 | #define TWL6030_CFG_STATE_APP(v) (((v) & TWL6030_CFG_STATE_APP_MASK) >>\ | |
108 | TWL6030_CFG_STATE_APP_SHIFT) | |
21657ebf | 109 | |
4d94aee5 GG |
110 | /* Flags for SMPS Voltage reading */ |
111 | #define SMPS_OFFSET_EN BIT(0) | |
112 | #define SMPS_EXTENDED_EN BIT(1) | |
113 | ||
114 | /* twl6025 SMPS EPROM values */ | |
115 | #define TWL6030_SMPS_OFFSET 0xB0 | |
116 | #define TWL6030_SMPS_MULT 0xB3 | |
117 | #define SMPS_MULTOFFSET_SMPS4 BIT(0) | |
118 | #define SMPS_MULTOFFSET_VIO BIT(1) | |
119 | #define SMPS_MULTOFFSET_SMPS3 BIT(6) | |
120 | ||
fa16a5c1 | 121 | static inline int |
441a4505 | 122 | twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset) |
fa16a5c1 DB |
123 | { |
124 | u8 value; | |
125 | int status; | |
126 | ||
441a4505 | 127 | status = twl_i2c_read_u8(slave_subgp, |
fa16a5c1 DB |
128 | &value, info->base + offset); |
129 | return (status < 0) ? status : value; | |
130 | } | |
131 | ||
132 | static inline int | |
441a4505 RN |
133 | twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset, |
134 | u8 value) | |
fa16a5c1 | 135 | { |
441a4505 | 136 | return twl_i2c_write_u8(slave_subgp, |
fa16a5c1 DB |
137 | value, info->base + offset); |
138 | } | |
139 | ||
140 | /*----------------------------------------------------------------------*/ | |
141 | ||
142 | /* generic power resource operations, which work on all regulators */ | |
143 | ||
c4aa6f31 | 144 | static int twlreg_grp(struct regulator_dev *rdev) |
fa16a5c1 | 145 | { |
441a4505 RN |
146 | return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER, |
147 | VREG_GRP); | |
fa16a5c1 DB |
148 | } |
149 | ||
150 | /* | |
151 | * Enable/disable regulators by joining/leaving the P1 (processor) group. | |
152 | * We assume nobody else is updating the DEV_GRP registers. | |
153 | */ | |
441a4505 RN |
154 | /* definition for 4030 family */ |
155 | #define P3_GRP_4030 BIT(7) /* "peripherals" */ | |
156 | #define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */ | |
157 | #define P1_GRP_4030 BIT(5) /* CPU/Linux */ | |
158 | /* definition for 6030 family */ | |
159 | #define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */ | |
160 | #define P2_GRP_6030 BIT(1) /* "peripherals" */ | |
161 | #define P1_GRP_6030 BIT(0) /* CPU/Linux */ | |
fa16a5c1 | 162 | |
b2456779 | 163 | static int twl4030reg_is_enabled(struct regulator_dev *rdev) |
fa16a5c1 | 164 | { |
c4aa6f31 | 165 | int state = twlreg_grp(rdev); |
fa16a5c1 DB |
166 | |
167 | if (state < 0) | |
168 | return state; | |
169 | ||
b2456779 SH |
170 | return state & P1_GRP_4030; |
171 | } | |
172 | ||
173 | static int twl6030reg_is_enabled(struct regulator_dev *rdev) | |
174 | { | |
175 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
4d94aee5 | 176 | int grp = 0, val; |
b2456779 | 177 | |
4d94aee5 GG |
178 | if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS))) |
179 | grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP); | |
b2456779 SH |
180 | if (grp < 0) |
181 | return grp; | |
182 | ||
4d94aee5 GG |
183 | if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS))) |
184 | grp &= P1_GRP_6030; | |
185 | else | |
186 | grp = 1; | |
b2456779 SH |
187 | |
188 | val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE); | |
189 | val = TWL6030_CFG_STATE_APP(val); | |
190 | ||
191 | return grp && (val == TWL6030_CFG_STATE_ON); | |
fa16a5c1 DB |
192 | } |
193 | ||
f8c2940b | 194 | static int twl4030reg_enable(struct regulator_dev *rdev) |
fa16a5c1 DB |
195 | { |
196 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
197 | int grp; | |
53b8a9d9 | 198 | int ret; |
fa16a5c1 | 199 | |
441a4505 | 200 | grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP); |
fa16a5c1 DB |
201 | if (grp < 0) |
202 | return grp; | |
203 | ||
f8c2940b | 204 | grp |= P1_GRP_4030; |
441a4505 | 205 | |
53b8a9d9 JKS |
206 | ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); |
207 | ||
f8c2940b B |
208 | udelay(info->delay); |
209 | ||
210 | return ret; | |
211 | } | |
212 | ||
213 | static int twl6030reg_enable(struct regulator_dev *rdev) | |
214 | { | |
215 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
4d94aee5 | 216 | int grp = 0; |
f8c2940b B |
217 | int ret; |
218 | ||
4d94aee5 GG |
219 | if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS))) |
220 | grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP); | |
f8c2940b B |
221 | if (grp < 0) |
222 | return grp; | |
223 | ||
224 | ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, | |
225 | grp << TWL6030_CFG_STATE_GRP_SHIFT | | |
226 | TWL6030_CFG_STATE_ON); | |
21657ebf | 227 | |
53b8a9d9 JKS |
228 | udelay(info->delay); |
229 | ||
230 | return ret; | |
fa16a5c1 DB |
231 | } |
232 | ||
0ff3897d | 233 | static int twl4030reg_disable(struct regulator_dev *rdev) |
fa16a5c1 DB |
234 | { |
235 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
236 | int grp; | |
21657ebf | 237 | int ret; |
fa16a5c1 | 238 | |
441a4505 | 239 | grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP); |
fa16a5c1 DB |
240 | if (grp < 0) |
241 | return grp; | |
242 | ||
0ff3897d | 243 | grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030); |
441a4505 | 244 | |
21657ebf SH |
245 | ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); |
246 | ||
0ff3897d B |
247 | return ret; |
248 | } | |
249 | ||
250 | static int twl6030reg_disable(struct regulator_dev *rdev) | |
251 | { | |
252 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
253 | int grp = 0; | |
254 | int ret; | |
255 | ||
4d94aee5 GG |
256 | if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS))) |
257 | grp = P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030; | |
0ff3897d B |
258 | |
259 | /* For 6030, set the off state for all grps enabled */ | |
260 | ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, | |
261 | (grp) << TWL6030_CFG_STATE_GRP_SHIFT | | |
262 | TWL6030_CFG_STATE_OFF); | |
21657ebf SH |
263 | |
264 | return ret; | |
fa16a5c1 DB |
265 | } |
266 | ||
9a0244ad | 267 | static int twl4030reg_get_status(struct regulator_dev *rdev) |
fa16a5c1 | 268 | { |
c4aa6f31 | 269 | int state = twlreg_grp(rdev); |
fa16a5c1 DB |
270 | |
271 | if (state < 0) | |
272 | return state; | |
273 | state &= 0x0f; | |
274 | ||
275 | /* assume state != WARM_RESET; we'd not be running... */ | |
276 | if (!state) | |
277 | return REGULATOR_STATUS_OFF; | |
278 | return (state & BIT(3)) | |
279 | ? REGULATOR_STATUS_NORMAL | |
280 | : REGULATOR_STATUS_STANDBY; | |
281 | } | |
282 | ||
9a0244ad SH |
283 | static int twl6030reg_get_status(struct regulator_dev *rdev) |
284 | { | |
285 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
286 | int val; | |
287 | ||
288 | val = twlreg_grp(rdev); | |
289 | if (val < 0) | |
290 | return val; | |
291 | ||
292 | val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE); | |
293 | ||
294 | switch (TWL6030_CFG_STATE_APP(val)) { | |
295 | case TWL6030_CFG_STATE_ON: | |
296 | return REGULATOR_STATUS_NORMAL; | |
297 | ||
298 | case TWL6030_CFG_STATE_SLEEP: | |
299 | return REGULATOR_STATUS_STANDBY; | |
300 | ||
301 | case TWL6030_CFG_STATE_OFF: | |
302 | case TWL6030_CFG_STATE_OFF2: | |
303 | default: | |
304 | break; | |
305 | } | |
306 | ||
307 | return REGULATOR_STATUS_OFF; | |
308 | } | |
309 | ||
1a39962f | 310 | static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode) |
fa16a5c1 DB |
311 | { |
312 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
313 | unsigned message; | |
314 | int status; | |
315 | ||
316 | /* We can only set the mode through state machine commands... */ | |
317 | switch (mode) { | |
318 | case REGULATOR_MODE_NORMAL: | |
319 | message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE); | |
320 | break; | |
321 | case REGULATOR_MODE_STANDBY: | |
322 | message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP); | |
323 | break; | |
324 | default: | |
325 | return -EINVAL; | |
326 | } | |
327 | ||
328 | /* Ensure the resource is associated with some group */ | |
c4aa6f31 | 329 | status = twlreg_grp(rdev); |
fa16a5c1 DB |
330 | if (status < 0) |
331 | return status; | |
441a4505 | 332 | if (!(status & (P3_GRP_4030 | P2_GRP_4030 | P1_GRP_4030))) |
fa16a5c1 DB |
333 | return -EACCES; |
334 | ||
c4aa6f31 | 335 | status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, |
b9e26bc8 AL |
336 | message >> 8, TWL4030_PM_MASTER_PB_WORD_MSB); |
337 | if (status < 0) | |
fa16a5c1 DB |
338 | return status; |
339 | ||
c4aa6f31 | 340 | return twl_i2c_write_u8(TWL_MODULE_PM_MASTER, |
b9e26bc8 | 341 | message & 0xff, TWL4030_PM_MASTER_PB_WORD_LSB); |
fa16a5c1 DB |
342 | } |
343 | ||
1a39962f SH |
344 | static int twl6030reg_set_mode(struct regulator_dev *rdev, unsigned mode) |
345 | { | |
346 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
4d94aee5 | 347 | int grp = 0; |
1a39962f SH |
348 | int val; |
349 | ||
4d94aee5 GG |
350 | if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS))) |
351 | grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP); | |
1a39962f SH |
352 | |
353 | if (grp < 0) | |
354 | return grp; | |
355 | ||
356 | /* Compose the state register settings */ | |
357 | val = grp << TWL6030_CFG_STATE_GRP_SHIFT; | |
358 | /* We can only set the mode through state machine commands... */ | |
359 | switch (mode) { | |
360 | case REGULATOR_MODE_NORMAL: | |
361 | val |= TWL6030_CFG_STATE_ON; | |
362 | break; | |
363 | case REGULATOR_MODE_STANDBY: | |
364 | val |= TWL6030_CFG_STATE_SLEEP; | |
365 | break; | |
366 | ||
367 | default: | |
368 | return -EINVAL; | |
369 | } | |
370 | ||
371 | return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, val); | |
372 | } | |
373 | ||
fa16a5c1 DB |
374 | /*----------------------------------------------------------------------*/ |
375 | ||
376 | /* | |
377 | * Support for adjustable-voltage LDOs uses a four bit (or less) voltage | |
378 | * select field in its control register. We use tables indexed by VSEL | |
379 | * to record voltages in milliVolts. (Accuracy is about three percent.) | |
380 | * | |
381 | * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon; | |
382 | * currently handled by listing two slightly different VAUX2 regulators, | |
383 | * only one of which will be configured. | |
384 | * | |
385 | * VSEL values documented as "TI cannot support these values" are flagged | |
386 | * in these tables as UNSUP() values; we normally won't assign them. | |
d6bb69cf AH |
387 | * |
388 | * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported. | |
389 | * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting. | |
fa16a5c1 DB |
390 | */ |
391 | #ifdef CONFIG_TWL4030_ALLOW_UNSUPPORTED | |
392 | #define UNSUP_MASK 0x0000 | |
393 | #else | |
394 | #define UNSUP_MASK 0x8000 | |
395 | #endif | |
396 | ||
397 | #define UNSUP(x) (UNSUP_MASK | (x)) | |
398 | #define IS_UNSUP(x) (UNSUP_MASK & (x)) | |
399 | #define LDO_MV(x) (~UNSUP_MASK & (x)) | |
400 | ||
401 | ||
402 | static const u16 VAUX1_VSEL_table[] = { | |
403 | UNSUP(1500), UNSUP(1800), 2500, 2800, | |
404 | 3000, 3000, 3000, 3000, | |
405 | }; | |
406 | static const u16 VAUX2_4030_VSEL_table[] = { | |
407 | UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300, | |
408 | 1500, 1800, UNSUP(1850), 2500, | |
409 | UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000), | |
410 | UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), | |
411 | }; | |
412 | static const u16 VAUX2_VSEL_table[] = { | |
413 | 1700, 1700, 1900, 1300, | |
414 | 1500, 1800, 2000, 2500, | |
415 | 2100, 2800, 2200, 2300, | |
416 | 2400, 2400, 2400, 2400, | |
417 | }; | |
418 | static const u16 VAUX3_VSEL_table[] = { | |
419 | 1500, 1800, 2500, 2800, | |
d6bb69cf | 420 | 3000, 3000, 3000, 3000, |
fa16a5c1 DB |
421 | }; |
422 | static const u16 VAUX4_VSEL_table[] = { | |
423 | 700, 1000, 1200, UNSUP(1300), | |
424 | 1500, 1800, UNSUP(1850), 2500, | |
1897e742 DB |
425 | UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000), |
426 | UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), | |
fa16a5c1 DB |
427 | }; |
428 | static const u16 VMMC1_VSEL_table[] = { | |
429 | 1850, 2850, 3000, 3150, | |
430 | }; | |
431 | static const u16 VMMC2_VSEL_table[] = { | |
432 | UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300), | |
433 | UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500), | |
434 | 2600, 2800, 2850, 3000, | |
435 | 3150, 3150, 3150, 3150, | |
436 | }; | |
437 | static const u16 VPLL1_VSEL_table[] = { | |
438 | 1000, 1200, 1300, 1800, | |
439 | UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000), | |
440 | }; | |
441 | static const u16 VPLL2_VSEL_table[] = { | |
442 | 700, 1000, 1200, 1300, | |
443 | UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500), | |
444 | UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000), | |
445 | UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), | |
446 | }; | |
447 | static const u16 VSIM_VSEL_table[] = { | |
448 | UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800, | |
449 | 2800, 3000, 3000, 3000, | |
450 | }; | |
451 | static const u16 VDAC_VSEL_table[] = { | |
452 | 1200, 1300, 1800, 1800, | |
453 | }; | |
07fc493f JKS |
454 | static const u16 VDD1_VSEL_table[] = { |
455 | 800, 1450, | |
456 | }; | |
457 | static const u16 VDD2_VSEL_table[] = { | |
458 | 800, 1450, 1500, | |
459 | }; | |
460 | static const u16 VIO_VSEL_table[] = { | |
461 | 1800, 1850, | |
462 | }; | |
463 | static const u16 VINTANA2_VSEL_table[] = { | |
464 | 2500, 2750, | |
465 | }; | |
fa16a5c1 | 466 | |
3e3d3be7 | 467 | static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index) |
66b659e6 DB |
468 | { |
469 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
470 | int mV = info->table[index]; | |
471 | ||
472 | return IS_UNSUP(mV) ? 0 : (LDO_MV(mV) * 1000); | |
473 | } | |
474 | ||
fa16a5c1 | 475 | static int |
3a93f2a9 MB |
476 | twl4030ldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV, |
477 | unsigned *selector) | |
fa16a5c1 DB |
478 | { |
479 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
480 | int vsel; | |
481 | ||
482 | for (vsel = 0; vsel < info->table_len; vsel++) { | |
483 | int mV = info->table[vsel]; | |
484 | int uV; | |
485 | ||
486 | if (IS_UNSUP(mV)) | |
487 | continue; | |
488 | uV = LDO_MV(mV) * 1000; | |
489 | ||
66b659e6 DB |
490 | /* REVISIT for VAUX2, first match may not be best/lowest */ |
491 | ||
fa16a5c1 | 492 | /* use the first in-range value */ |
3a93f2a9 MB |
493 | if (min_uV <= uV && uV <= max_uV) { |
494 | *selector = vsel; | |
441a4505 RN |
495 | return twlreg_write(info, TWL_MODULE_PM_RECEIVER, |
496 | VREG_VOLTAGE, vsel); | |
3a93f2a9 | 497 | } |
fa16a5c1 DB |
498 | } |
499 | ||
500 | return -EDOM; | |
501 | } | |
502 | ||
3e3d3be7 | 503 | static int twl4030ldo_get_voltage(struct regulator_dev *rdev) |
fa16a5c1 DB |
504 | { |
505 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
441a4505 RN |
506 | int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, |
507 | VREG_VOLTAGE); | |
fa16a5c1 DB |
508 | |
509 | if (vsel < 0) | |
510 | return vsel; | |
511 | ||
512 | vsel &= info->table_len - 1; | |
513 | return LDO_MV(info->table[vsel]) * 1000; | |
514 | } | |
515 | ||
3e3d3be7 RN |
516 | static struct regulator_ops twl4030ldo_ops = { |
517 | .list_voltage = twl4030ldo_list_voltage, | |
66b659e6 | 518 | |
3e3d3be7 RN |
519 | .set_voltage = twl4030ldo_set_voltage, |
520 | .get_voltage = twl4030ldo_get_voltage, | |
521 | ||
f8c2940b | 522 | .enable = twl4030reg_enable, |
0ff3897d | 523 | .disable = twl4030reg_disable, |
b2456779 | 524 | .is_enabled = twl4030reg_is_enabled, |
3e3d3be7 | 525 | |
1a39962f | 526 | .set_mode = twl4030reg_set_mode, |
3e3d3be7 | 527 | |
9a0244ad | 528 | .get_status = twl4030reg_get_status, |
3e3d3be7 RN |
529 | }; |
530 | ||
ba305e31 TK |
531 | static int |
532 | twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV, | |
533 | unsigned *selector) | |
534 | { | |
535 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
536 | int vsel = DIV_ROUND_UP(min_uV - 600000, 12500); | |
537 | ||
63bfff4e TK |
538 | if (info->set_voltage) { |
539 | return info->set_voltage(info->data, min_uV); | |
540 | } else { | |
541 | twlreg_write(info, TWL_MODULE_PM_RECEIVER, | |
542 | VREG_VOLTAGE_SMPS_4030, vsel); | |
543 | } | |
544 | ||
ba305e31 TK |
545 | return 0; |
546 | } | |
547 | ||
548 | static int twl4030smps_get_voltage(struct regulator_dev *rdev) | |
549 | { | |
550 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
63bfff4e TK |
551 | int vsel; |
552 | ||
553 | if (info->get_voltage) | |
554 | return info->get_voltage(info->data); | |
555 | ||
556 | vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, | |
ba305e31 TK |
557 | VREG_VOLTAGE_SMPS_4030); |
558 | ||
559 | return vsel * 12500 + 600000; | |
560 | } | |
561 | ||
562 | static struct regulator_ops twl4030smps_ops = { | |
563 | .set_voltage = twl4030smps_set_voltage, | |
564 | .get_voltage = twl4030smps_get_voltage, | |
565 | }; | |
566 | ||
34a38440 TK |
567 | static int twl6030coresmps_set_voltage(struct regulator_dev *rdev, int min_uV, |
568 | int max_uV, unsigned *selector) | |
569 | { | |
570 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
571 | ||
572 | if (info->set_voltage) | |
573 | return info->set_voltage(info->data, min_uV); | |
574 | ||
575 | return -ENODEV; | |
576 | } | |
577 | ||
578 | static int twl6030coresmps_get_voltage(struct regulator_dev *rdev) | |
579 | { | |
580 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
581 | ||
582 | if (info->get_voltage) | |
583 | return info->get_voltage(info->data); | |
584 | ||
585 | return -ENODEV; | |
586 | } | |
587 | ||
588 | static struct regulator_ops twl6030coresmps_ops = { | |
589 | .set_voltage = twl6030coresmps_set_voltage, | |
590 | .get_voltage = twl6030coresmps_get_voltage, | |
591 | }; | |
592 | ||
3e3d3be7 RN |
593 | static int twl6030ldo_list_voltage(struct regulator_dev *rdev, unsigned index) |
594 | { | |
595 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
596 | ||
597 | return ((info->min_mV + (index * 100)) * 1000); | |
598 | } | |
599 | ||
600 | static int | |
3a93f2a9 MB |
601 | twl6030ldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV, |
602 | unsigned *selector) | |
3e3d3be7 RN |
603 | { |
604 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
605 | int vsel; | |
606 | ||
607 | if ((min_uV/1000 < info->min_mV) || (max_uV/1000 > info->max_mV)) | |
608 | return -EDOM; | |
609 | ||
610 | /* | |
611 | * Use the below formula to calculate vsel | |
612 | * mV = 1000mv + 100mv * (vsel - 1) | |
613 | */ | |
614 | vsel = (min_uV/1000 - 1000)/100 + 1; | |
3a93f2a9 | 615 | *selector = vsel; |
3e3d3be7 RN |
616 | return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE, vsel); |
617 | ||
618 | } | |
619 | ||
620 | static int twl6030ldo_get_voltage(struct regulator_dev *rdev) | |
621 | { | |
622 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
623 | int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, | |
624 | VREG_VOLTAGE); | |
625 | ||
626 | if (vsel < 0) | |
627 | return vsel; | |
628 | ||
629 | /* | |
630 | * Use the below formula to calculate vsel | |
631 | * mV = 1000mv + 100mv * (vsel - 1) | |
632 | */ | |
633 | return (1000 + (100 * (vsel - 1))) * 1000; | |
634 | } | |
635 | ||
636 | static struct regulator_ops twl6030ldo_ops = { | |
637 | .list_voltage = twl6030ldo_list_voltage, | |
638 | ||
639 | .set_voltage = twl6030ldo_set_voltage, | |
640 | .get_voltage = twl6030ldo_get_voltage, | |
fa16a5c1 | 641 | |
f8c2940b | 642 | .enable = twl6030reg_enable, |
0ff3897d | 643 | .disable = twl6030reg_disable, |
b2456779 | 644 | .is_enabled = twl6030reg_is_enabled, |
fa16a5c1 | 645 | |
1a39962f | 646 | .set_mode = twl6030reg_set_mode, |
fa16a5c1 | 647 | |
9a0244ad | 648 | .get_status = twl6030reg_get_status, |
fa16a5c1 DB |
649 | }; |
650 | ||
651 | /*----------------------------------------------------------------------*/ | |
652 | ||
653 | /* | |
654 | * Fixed voltage LDOs don't have a VSEL field to update. | |
655 | */ | |
c4aa6f31 | 656 | static int twlfixed_list_voltage(struct regulator_dev *rdev, unsigned index) |
66b659e6 DB |
657 | { |
658 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
659 | ||
660 | return info->min_mV * 1000; | |
661 | } | |
662 | ||
c4aa6f31 | 663 | static int twlfixed_get_voltage(struct regulator_dev *rdev) |
fa16a5c1 DB |
664 | { |
665 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
666 | ||
667 | return info->min_mV * 1000; | |
668 | } | |
669 | ||
b2456779 SH |
670 | static struct regulator_ops twl4030fixed_ops = { |
671 | .list_voltage = twlfixed_list_voltage, | |
672 | ||
673 | .get_voltage = twlfixed_get_voltage, | |
674 | ||
f8c2940b | 675 | .enable = twl4030reg_enable, |
0ff3897d | 676 | .disable = twl4030reg_disable, |
b2456779 SH |
677 | .is_enabled = twl4030reg_is_enabled, |
678 | ||
1a39962f | 679 | .set_mode = twl4030reg_set_mode, |
b2456779 | 680 | |
9a0244ad | 681 | .get_status = twl4030reg_get_status, |
b2456779 SH |
682 | }; |
683 | ||
684 | static struct regulator_ops twl6030fixed_ops = { | |
c4aa6f31 | 685 | .list_voltage = twlfixed_list_voltage, |
66b659e6 | 686 | |
c4aa6f31 | 687 | .get_voltage = twlfixed_get_voltage, |
fa16a5c1 | 688 | |
f8c2940b | 689 | .enable = twl6030reg_enable, |
0ff3897d | 690 | .disable = twl6030reg_disable, |
b2456779 | 691 | .is_enabled = twl6030reg_is_enabled, |
fa16a5c1 | 692 | |
1a39962f | 693 | .set_mode = twl6030reg_set_mode, |
fa16a5c1 | 694 | |
9a0244ad | 695 | .get_status = twl6030reg_get_status, |
fa16a5c1 DB |
696 | }; |
697 | ||
8e6de4a3 | 698 | static struct regulator_ops twl6030_fixed_resource = { |
f8c2940b | 699 | .enable = twl6030reg_enable, |
0ff3897d | 700 | .disable = twl6030reg_disable, |
b2456779 | 701 | .is_enabled = twl6030reg_is_enabled, |
9a0244ad | 702 | .get_status = twl6030reg_get_status, |
8e6de4a3 B |
703 | }; |
704 | ||
4d94aee5 GG |
705 | /* |
706 | * SMPS status and control | |
707 | */ | |
708 | ||
709 | static int twl6030smps_list_voltage(struct regulator_dev *rdev, unsigned index) | |
710 | { | |
711 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
712 | ||
713 | int voltage = 0; | |
714 | ||
715 | switch (info->flags) { | |
716 | case SMPS_OFFSET_EN: | |
717 | voltage = 100000; | |
718 | /* fall through */ | |
719 | case 0: | |
720 | switch (index) { | |
721 | case 0: | |
722 | voltage = 0; | |
723 | break; | |
724 | case 58: | |
725 | voltage = 1350 * 1000; | |
726 | break; | |
727 | case 59: | |
728 | voltage = 1500 * 1000; | |
729 | break; | |
730 | case 60: | |
731 | voltage = 1800 * 1000; | |
732 | break; | |
733 | case 61: | |
734 | voltage = 1900 * 1000; | |
735 | break; | |
736 | case 62: | |
737 | voltage = 2100 * 1000; | |
738 | break; | |
739 | default: | |
740 | voltage += (600000 + (12500 * (index - 1))); | |
741 | } | |
742 | break; | |
743 | case SMPS_EXTENDED_EN: | |
744 | switch (index) { | |
745 | case 0: | |
746 | voltage = 0; | |
747 | break; | |
748 | case 58: | |
749 | voltage = 2084 * 1000; | |
750 | break; | |
751 | case 59: | |
752 | voltage = 2315 * 1000; | |
753 | break; | |
754 | case 60: | |
755 | voltage = 2778 * 1000; | |
756 | break; | |
757 | case 61: | |
758 | voltage = 2932 * 1000; | |
759 | break; | |
760 | case 62: | |
761 | voltage = 3241 * 1000; | |
762 | break; | |
763 | default: | |
764 | voltage = (1852000 + (38600 * (index - 1))); | |
765 | } | |
766 | break; | |
767 | case SMPS_OFFSET_EN | SMPS_EXTENDED_EN: | |
768 | switch (index) { | |
769 | case 0: | |
770 | voltage = 0; | |
771 | break; | |
772 | case 58: | |
773 | voltage = 4167 * 1000; | |
774 | break; | |
775 | case 59: | |
776 | voltage = 2315 * 1000; | |
777 | break; | |
778 | case 60: | |
779 | voltage = 2778 * 1000; | |
780 | break; | |
781 | case 61: | |
782 | voltage = 2932 * 1000; | |
783 | break; | |
784 | case 62: | |
785 | voltage = 3241 * 1000; | |
786 | break; | |
787 | default: | |
788 | voltage = (2161000 + (38600 * (index - 1))); | |
789 | } | |
790 | break; | |
791 | } | |
792 | ||
793 | return voltage; | |
794 | } | |
795 | ||
796 | static int | |
797 | twl6030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV, | |
798 | unsigned int *selector) | |
799 | { | |
800 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
801 | int vsel = 0; | |
802 | ||
803 | switch (info->flags) { | |
804 | case 0: | |
805 | if (min_uV == 0) | |
806 | vsel = 0; | |
a33b6e5a LD |
807 | else if ((min_uV >= 600000) && (min_uV <= 1300000)) { |
808 | int calc_uV; | |
4d94aee5 GG |
809 | vsel = (min_uV - 600000) / 125; |
810 | if (vsel % 100) | |
811 | vsel += 100; | |
812 | vsel /= 100; | |
813 | vsel++; | |
a33b6e5a LD |
814 | calc_uV = twl6030smps_list_voltage(rdev, vsel); |
815 | if (calc_uV > max_uV) | |
816 | return -EINVAL; | |
4d94aee5 GG |
817 | } |
818 | /* Values 1..57 for vsel are linear and can be calculated | |
819 | * values 58..62 are non linear. | |
820 | */ | |
821 | else if ((min_uV > 1900000) && (max_uV >= 2100000)) | |
822 | vsel = 62; | |
823 | else if ((min_uV > 1800000) && (max_uV >= 1900000)) | |
824 | vsel = 61; | |
825 | else if ((min_uV > 1500000) && (max_uV >= 1800000)) | |
826 | vsel = 60; | |
827 | else if ((min_uV > 1350000) && (max_uV >= 1500000)) | |
828 | vsel = 59; | |
829 | else if ((min_uV > 1300000) && (max_uV >= 1350000)) | |
830 | vsel = 58; | |
831 | else | |
832 | return -EINVAL; | |
833 | break; | |
834 | case SMPS_OFFSET_EN: | |
835 | if (min_uV == 0) | |
836 | vsel = 0; | |
a33b6e5a LD |
837 | else if ((min_uV >= 700000) && (min_uV <= 1420000)) { |
838 | int calc_uV; | |
4d94aee5 GG |
839 | vsel = (min_uV - 700000) / 125; |
840 | if (vsel % 100) | |
841 | vsel += 100; | |
842 | vsel /= 100; | |
843 | vsel++; | |
a33b6e5a LD |
844 | calc_uV = twl6030smps_list_voltage(rdev, vsel); |
845 | if (calc_uV > max_uV) | |
846 | return -EINVAL; | |
4d94aee5 GG |
847 | } |
848 | /* Values 1..57 for vsel are linear and can be calculated | |
849 | * values 58..62 are non linear. | |
850 | */ | |
851 | else if ((min_uV > 1900000) && (max_uV >= 2100000)) | |
852 | vsel = 62; | |
853 | else if ((min_uV > 1800000) && (max_uV >= 1900000)) | |
854 | vsel = 61; | |
855 | else if ((min_uV > 1350000) && (max_uV >= 1800000)) | |
856 | vsel = 60; | |
857 | else if ((min_uV > 1350000) && (max_uV >= 1500000)) | |
858 | vsel = 59; | |
859 | else if ((min_uV > 1300000) && (max_uV >= 1350000)) | |
860 | vsel = 58; | |
861 | else | |
862 | return -EINVAL; | |
863 | break; | |
864 | case SMPS_EXTENDED_EN: | |
865 | if (min_uV == 0) | |
866 | vsel = 0; | |
867 | else if ((min_uV >= 1852000) && (max_uV <= 4013600)) { | |
868 | vsel = (min_uV - 1852000) / 386; | |
869 | if (vsel % 100) | |
870 | vsel += 100; | |
871 | vsel /= 100; | |
872 | vsel++; | |
873 | } | |
874 | break; | |
875 | case SMPS_OFFSET_EN|SMPS_EXTENDED_EN: | |
876 | if (min_uV == 0) | |
877 | vsel = 0; | |
878 | else if ((min_uV >= 2161000) && (max_uV <= 4321000)) { | |
a33b6e5a | 879 | vsel = (min_uV - 2161000) / 386; |
4d94aee5 GG |
880 | if (vsel % 100) |
881 | vsel += 100; | |
882 | vsel /= 100; | |
883 | vsel++; | |
884 | } | |
885 | break; | |
886 | } | |
887 | ||
888 | *selector = vsel; | |
889 | ||
890 | return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS, | |
891 | vsel); | |
892 | } | |
893 | ||
894 | static int twl6030smps_get_voltage_sel(struct regulator_dev *rdev) | |
895 | { | |
896 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
897 | ||
898 | return twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS); | |
899 | } | |
900 | ||
901 | static struct regulator_ops twlsmps_ops = { | |
902 | .list_voltage = twl6030smps_list_voltage, | |
903 | ||
904 | .set_voltage = twl6030smps_set_voltage, | |
905 | .get_voltage_sel = twl6030smps_get_voltage_sel, | |
906 | ||
907 | .enable = twl6030reg_enable, | |
908 | .disable = twl6030reg_disable, | |
909 | .is_enabled = twl6030reg_is_enabled, | |
910 | ||
911 | .set_mode = twl6030reg_set_mode, | |
912 | ||
913 | .get_status = twl6030reg_get_status, | |
914 | }; | |
915 | ||
fa16a5c1 DB |
916 | /*----------------------------------------------------------------------*/ |
917 | ||
045f972f JKS |
918 | #define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \ |
919 | remap_conf) \ | |
920 | TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \ | |
b2456779 | 921 | remap_conf, TWL4030, twl4030fixed_ops) |
af8b244f A |
922 | #define TWL6030_FIXED_LDO(label, offset, mVolts, turnon_delay) \ |
923 | TWL_FIXED_LDO(label, offset, mVolts, 0x0, turnon_delay, \ | |
b2456779 | 924 | 0x0, TWL6030, twl6030fixed_ops) |
045f972f | 925 | |
2098e95c RN |
926 | #define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \ |
927 | static struct twlreg_info TWL4030_INFO_##label = { \ | |
fa16a5c1 DB |
928 | .base = offset, \ |
929 | .id = num, \ | |
930 | .table_len = ARRAY_SIZE(label##_VSEL_table), \ | |
931 | .table = label##_VSEL_table, \ | |
045f972f JKS |
932 | .delay = turnon_delay, \ |
933 | .remap = remap_conf, \ | |
fa16a5c1 DB |
934 | .desc = { \ |
935 | .name = #label, \ | |
3e3d3be7 | 936 | .id = TWL4030_REG_##label, \ |
66b659e6 | 937 | .n_voltages = ARRAY_SIZE(label##_VSEL_table), \ |
3e3d3be7 RN |
938 | .ops = &twl4030ldo_ops, \ |
939 | .type = REGULATOR_VOLTAGE, \ | |
940 | .owner = THIS_MODULE, \ | |
941 | }, \ | |
942 | } | |
943 | ||
ba305e31 | 944 | #define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf) \ |
2098e95c | 945 | static struct twlreg_info TWL4030_INFO_##label = { \ |
ba305e31 TK |
946 | .base = offset, \ |
947 | .id = num, \ | |
948 | .delay = turnon_delay, \ | |
949 | .remap = remap_conf, \ | |
950 | .desc = { \ | |
951 | .name = #label, \ | |
952 | .id = TWL4030_REG_##label, \ | |
953 | .ops = &twl4030smps_ops, \ | |
954 | .type = REGULATOR_VOLTAGE, \ | |
955 | .owner = THIS_MODULE, \ | |
956 | }, \ | |
957 | } | |
958 | ||
2098e95c RN |
959 | #define TWL6030_ADJUSTABLE_SMPS(label) \ |
960 | static struct twlreg_info TWL6030_INFO_##label = { \ | |
34a38440 TK |
961 | .desc = { \ |
962 | .name = #label, \ | |
963 | .id = TWL6030_REG_##label, \ | |
964 | .ops = &twl6030coresmps_ops, \ | |
965 | .type = REGULATOR_VOLTAGE, \ | |
966 | .owner = THIS_MODULE, \ | |
967 | }, \ | |
968 | } | |
969 | ||
2098e95c RN |
970 | #define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \ |
971 | static struct twlreg_info TWL6030_INFO_##label = { \ | |
3e3d3be7 | 972 | .base = offset, \ |
3e3d3be7 RN |
973 | .min_mV = min_mVolts, \ |
974 | .max_mV = max_mVolts, \ | |
3e3d3be7 RN |
975 | .desc = { \ |
976 | .name = #label, \ | |
977 | .id = TWL6030_REG_##label, \ | |
7736f11d | 978 | .n_voltages = (max_mVolts - min_mVolts)/100 + 1, \ |
3e3d3be7 | 979 | .ops = &twl6030ldo_ops, \ |
fa16a5c1 DB |
980 | .type = REGULATOR_VOLTAGE, \ |
981 | .owner = THIS_MODULE, \ | |
982 | }, \ | |
983 | } | |
984 | ||
2098e95c RN |
985 | #define TWL6025_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \ |
986 | static struct twlreg_info TWL6025_INFO_##label = { \ | |
4d94aee5 | 987 | .base = offset, \ |
4d94aee5 GG |
988 | .min_mV = min_mVolts, \ |
989 | .max_mV = max_mVolts, \ | |
990 | .desc = { \ | |
991 | .name = #label, \ | |
992 | .id = TWL6025_REG_##label, \ | |
993 | .n_voltages = ((max_mVolts - min_mVolts)/100) + 1, \ | |
994 | .ops = &twl6030ldo_ops, \ | |
995 | .type = REGULATOR_VOLTAGE, \ | |
996 | .owner = THIS_MODULE, \ | |
997 | }, \ | |
998 | } | |
3e3d3be7 | 999 | |
045f972f | 1000 | #define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \ |
2098e95c RN |
1001 | family, operations) \ |
1002 | static struct twlreg_info TWLFIXED_INFO_##label = { \ | |
fa16a5c1 DB |
1003 | .base = offset, \ |
1004 | .id = num, \ | |
1005 | .min_mV = mVolts, \ | |
045f972f JKS |
1006 | .delay = turnon_delay, \ |
1007 | .remap = remap_conf, \ | |
fa16a5c1 DB |
1008 | .desc = { \ |
1009 | .name = #label, \ | |
c4aa6f31 | 1010 | .id = family##_REG_##label, \ |
66b659e6 | 1011 | .n_voltages = 1, \ |
b2456779 | 1012 | .ops = &operations, \ |
fa16a5c1 DB |
1013 | .type = REGULATOR_VOLTAGE, \ |
1014 | .owner = THIS_MODULE, \ | |
1015 | }, \ | |
1016 | } | |
1017 | ||
2098e95c RN |
1018 | #define TWL6030_FIXED_RESOURCE(label, offset, turnon_delay) \ |
1019 | static struct twlreg_info TWLRES_INFO_##label = { \ | |
8e6de4a3 | 1020 | .base = offset, \ |
8e6de4a3 | 1021 | .delay = turnon_delay, \ |
8e6de4a3 B |
1022 | .desc = { \ |
1023 | .name = #label, \ | |
1024 | .id = TWL6030_REG_##label, \ | |
1025 | .ops = &twl6030_fixed_resource, \ | |
1026 | .type = REGULATOR_VOLTAGE, \ | |
1027 | .owner = THIS_MODULE, \ | |
1028 | }, \ | |
1029 | } | |
1030 | ||
2098e95c RN |
1031 | #define TWL6025_ADJUSTABLE_SMPS(label, offset) \ |
1032 | static struct twlreg_info TWLSMPS_INFO_##label = { \ | |
4d94aee5 | 1033 | .base = offset, \ |
4d94aee5 GG |
1034 | .min_mV = 600, \ |
1035 | .max_mV = 2100, \ | |
1036 | .desc = { \ | |
1037 | .name = #label, \ | |
1038 | .id = TWL6025_REG_##label, \ | |
1039 | .n_voltages = 63, \ | |
1040 | .ops = &twlsmps_ops, \ | |
1041 | .type = REGULATOR_VOLTAGE, \ | |
1042 | .owner = THIS_MODULE, \ | |
1043 | }, \ | |
1044 | } | |
1045 | ||
fa16a5c1 DB |
1046 | /* |
1047 | * We list regulators here if systems need some level of | |
1048 | * software control over them after boot. | |
1049 | */ | |
2098e95c RN |
1050 | TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08); |
1051 | TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08); | |
1052 | TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08); | |
1053 | TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08); | |
1054 | TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08); | |
1055 | TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08); | |
1056 | TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08); | |
1057 | TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00); | |
1058 | TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08); | |
1059 | TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00); | |
1060 | TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08); | |
1061 | TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08); | |
1062 | TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08); | |
1063 | TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08); | |
1064 | TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08); | |
1065 | /* VUSBCP is managed *only* by the USB subchip */ | |
1066 | /* 6030 REG with base as PMC Slave Misc : 0x0030 */ | |
1067 | /* Turnon-delay and remap configuration values for 6030 are not | |
1068 | verified since the specification is not public */ | |
1069 | TWL6030_ADJUSTABLE_SMPS(VDD1); | |
1070 | TWL6030_ADJUSTABLE_SMPS(VDD2); | |
1071 | TWL6030_ADJUSTABLE_SMPS(VDD3); | |
1072 | TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1000, 3300); | |
1073 | TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 1000, 3300); | |
1074 | TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 1000, 3300); | |
1075 | TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 1000, 3300); | |
1076 | TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 1000, 3300); | |
1077 | TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 1000, 3300); | |
1078 | /* 6025 are renamed compared to 6030 versions */ | |
1079 | TWL6025_ADJUSTABLE_LDO(LDO2, 0x54, 1000, 3300); | |
1080 | TWL6025_ADJUSTABLE_LDO(LDO4, 0x58, 1000, 3300); | |
1081 | TWL6025_ADJUSTABLE_LDO(LDO3, 0x5c, 1000, 3300); | |
1082 | TWL6025_ADJUSTABLE_LDO(LDO5, 0x68, 1000, 3300); | |
1083 | TWL6025_ADJUSTABLE_LDO(LDO1, 0x6c, 1000, 3300); | |
1084 | TWL6025_ADJUSTABLE_LDO(LDO7, 0x74, 1000, 3300); | |
1085 | TWL6025_ADJUSTABLE_LDO(LDO6, 0x60, 1000, 3300); | |
1086 | TWL6025_ADJUSTABLE_LDO(LDOLN, 0x64, 1000, 3300); | |
1087 | TWL6025_ADJUSTABLE_LDO(LDOUSB, 0x70, 1000, 3300); | |
1088 | TWL4030_FIXED_LDO(VINTANA2, 0x3f, 1500, 11, 100, 0x08); | |
1089 | TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08); | |
1090 | TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08); | |
1091 | TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08); | |
1092 | TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08); | |
1093 | TWL6030_FIXED_LDO(VANA, 0x50, 2100, 0); | |
1094 | TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 0); | |
1095 | TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 0); | |
1096 | TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 0); | |
e9d47fa4 PU |
1097 | TWL6030_FIXED_LDO(V1V8, 0x16, 1800, 0); |
1098 | TWL6030_FIXED_LDO(V2V1, 0x1c, 2100, 0); | |
2098e95c RN |
1099 | TWL6030_FIXED_RESOURCE(CLK32KG, 0x8C, 0); |
1100 | TWL6025_ADJUSTABLE_SMPS(SMPS3, 0x34); | |
1101 | TWL6025_ADJUSTABLE_SMPS(SMPS4, 0x10); | |
1102 | TWL6025_ADJUSTABLE_SMPS(VIO, 0x16); | |
fa16a5c1 | 1103 | |
4d94aee5 GG |
1104 | static u8 twl_get_smps_offset(void) |
1105 | { | |
1106 | u8 value; | |
1107 | ||
1108 | twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value, | |
1109 | TWL6030_SMPS_OFFSET); | |
1110 | return value; | |
1111 | } | |
1112 | ||
1113 | static u8 twl_get_smps_mult(void) | |
1114 | { | |
1115 | u8 value; | |
1116 | ||
1117 | twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value, | |
1118 | TWL6030_SMPS_MULT); | |
1119 | return value; | |
1120 | } | |
1121 | ||
2098e95c RN |
1122 | #define TWL_OF_MATCH(comp, family, label) \ |
1123 | { \ | |
1124 | .compatible = comp, \ | |
1125 | .data = &family##_INFO_##label, \ | |
1126 | } | |
1127 | ||
1128 | #define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label) | |
1129 | #define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label) | |
1130 | #define TWL6025_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6025, label) | |
1131 | #define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label) | |
1132 | #define TWLRES_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLRES, label) | |
1133 | #define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label) | |
1134 | ||
1135 | static const struct of_device_id twl_of_match[] __devinitconst = { | |
1136 | TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1), | |
1137 | TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030), | |
1138 | TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2), | |
1139 | TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3), | |
1140 | TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4), | |
1141 | TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1), | |
1142 | TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2), | |
1143 | TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1), | |
1144 | TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2), | |
1145 | TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM), | |
1146 | TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC), | |
1147 | TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2), | |
1148 | TWL4030_OF_MATCH("ti,twl4030-vio", VIO), | |
1149 | TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1), | |
1150 | TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2), | |
1151 | TWL6030_OF_MATCH("ti,twl6030-vdd1", VDD1), | |
1152 | TWL6030_OF_MATCH("ti,twl6030-vdd2", VDD2), | |
1153 | TWL6030_OF_MATCH("ti,twl6030-vdd3", VDD3), | |
1154 | TWL6030_OF_MATCH("ti,twl6030-vaux1", VAUX1_6030), | |
1155 | TWL6030_OF_MATCH("ti,twl6030-vaux2", VAUX2_6030), | |
1156 | TWL6030_OF_MATCH("ti,twl6030-vaux3", VAUX3_6030), | |
1157 | TWL6030_OF_MATCH("ti,twl6030-vmmc", VMMC), | |
1158 | TWL6030_OF_MATCH("ti,twl6030-vpp", VPP), | |
1159 | TWL6030_OF_MATCH("ti,twl6030-vusim", VUSIM), | |
1160 | TWL6025_OF_MATCH("ti,twl6025-ldo2", LDO2), | |
1161 | TWL6025_OF_MATCH("ti,twl6025-ldo4", LDO4), | |
1162 | TWL6025_OF_MATCH("ti,twl6025-ldo3", LDO3), | |
1163 | TWL6025_OF_MATCH("ti,twl6025-ldo5", LDO5), | |
1164 | TWL6025_OF_MATCH("ti,twl6025-ldo1", LDO1), | |
1165 | TWL6025_OF_MATCH("ti,twl6025-ldo7", LDO7), | |
1166 | TWL6025_OF_MATCH("ti,twl6025-ldo6", LDO6), | |
1167 | TWL6025_OF_MATCH("ti,twl6025-ldoln", LDOLN), | |
1168 | TWL6025_OF_MATCH("ti,twl6025-ldousb", LDOUSB), | |
1169 | TWLFIXED_OF_MATCH("ti,twl4030-vintana2", VINTANA2), | |
1170 | TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG), | |
1171 | TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5), | |
1172 | TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8), | |
1173 | TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1), | |
1174 | TWLFIXED_OF_MATCH("ti,twl6030-vana", VANA), | |
1175 | TWLFIXED_OF_MATCH("ti,twl6030-vcxio", VCXIO), | |
1176 | TWLFIXED_OF_MATCH("ti,twl6030-vdac", VDAC), | |
1177 | TWLFIXED_OF_MATCH("ti,twl6030-vusb", VUSB), | |
e9d47fa4 PU |
1178 | TWLFIXED_OF_MATCH("ti,twl6030-v1v8", V1V8), |
1179 | TWLFIXED_OF_MATCH("ti,twl6030-v2v1", V2V1), | |
2098e95c RN |
1180 | TWLRES_OF_MATCH("ti,twl6030-clk32kg", CLK32KG), |
1181 | TWLSMPS_OF_MATCH("ti,twl6025-smps3", SMPS3), | |
1182 | TWLSMPS_OF_MATCH("ti,twl6025-smps4", SMPS4), | |
1183 | TWLSMPS_OF_MATCH("ti,twl6025-vio", VIO), | |
1184 | {}, | |
1185 | }; | |
1186 | MODULE_DEVICE_TABLE(of, twl_of_match); | |
1187 | ||
24c29020 | 1188 | static int __devinit twlreg_probe(struct platform_device *pdev) |
fa16a5c1 | 1189 | { |
2098e95c | 1190 | int i, id; |
fa16a5c1 DB |
1191 | struct twlreg_info *info; |
1192 | struct regulator_init_data *initdata; | |
1193 | struct regulation_constraints *c; | |
1194 | struct regulator_dev *rdev; | |
63bfff4e | 1195 | struct twl_regulator_driver_data *drvdata; |
2098e95c RN |
1196 | const struct of_device_id *match; |
1197 | ||
1198 | match = of_match_device(twl_of_match, &pdev->dev); | |
1199 | if (match) { | |
1200 | info = match->data; | |
1201 | id = info->desc.id; | |
1202 | initdata = of_get_regulator_init_data(&pdev->dev, | |
1203 | pdev->dev.of_node); | |
1204 | drvdata = NULL; | |
1205 | } else { | |
1206 | id = pdev->id; | |
1207 | initdata = pdev->dev.platform_data; | |
1208 | for (i = 0, info = NULL; i < ARRAY_SIZE(twl_of_match); i++) { | |
1209 | info = twl_of_match[i].data; | |
1210 | if (!info || info->desc.id != id) | |
1211 | continue; | |
1212 | break; | |
1213 | } | |
1214 | drvdata = initdata->driver_data; | |
1215 | if (!drvdata) | |
1216 | return -EINVAL; | |
fa16a5c1 | 1217 | } |
2098e95c | 1218 | |
fa16a5c1 DB |
1219 | if (!info) |
1220 | return -ENODEV; | |
1221 | ||
fa16a5c1 DB |
1222 | if (!initdata) |
1223 | return -EINVAL; | |
1224 | ||
2098e95c RN |
1225 | if (drvdata) { |
1226 | /* copy the driver data into regulator data */ | |
1227 | info->features = drvdata->features; | |
1228 | info->data = drvdata->data; | |
1229 | info->set_voltage = drvdata->set_voltage; | |
1230 | info->get_voltage = drvdata->get_voltage; | |
1231 | } | |
4d94aee5 | 1232 | |
fa16a5c1 DB |
1233 | /* Constrain board-specific capabilities according to what |
1234 | * this driver and the chip itself can actually do. | |
1235 | */ | |
1236 | c = &initdata->constraints; | |
fa16a5c1 DB |
1237 | c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY; |
1238 | c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE | |
1239 | | REGULATOR_CHANGE_MODE | |
1240 | | REGULATOR_CHANGE_STATUS; | |
2098e95c | 1241 | switch (id) { |
205e5cd3 JKS |
1242 | case TWL4030_REG_VIO: |
1243 | case TWL4030_REG_VDD1: | |
1244 | case TWL4030_REG_VDD2: | |
1245 | case TWL4030_REG_VPLL1: | |
1246 | case TWL4030_REG_VINTANA1: | |
1247 | case TWL4030_REG_VINTANA2: | |
1248 | case TWL4030_REG_VINTDIG: | |
1249 | c->always_on = true; | |
1250 | break; | |
1251 | default: | |
1252 | break; | |
1253 | } | |
fa16a5c1 | 1254 | |
2098e95c | 1255 | switch (id) { |
4d94aee5 GG |
1256 | case TWL6025_REG_SMPS3: |
1257 | if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS3) | |
1258 | info->flags |= SMPS_EXTENDED_EN; | |
1259 | if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS3) | |
1260 | info->flags |= SMPS_OFFSET_EN; | |
1261 | break; | |
1262 | case TWL6025_REG_SMPS4: | |
1263 | if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS4) | |
1264 | info->flags |= SMPS_EXTENDED_EN; | |
1265 | if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS4) | |
1266 | info->flags |= SMPS_OFFSET_EN; | |
1267 | break; | |
1268 | case TWL6025_REG_VIO: | |
1269 | if (twl_get_smps_mult() & SMPS_MULTOFFSET_VIO) | |
1270 | info->flags |= SMPS_EXTENDED_EN; | |
1271 | if (twl_get_smps_offset() & SMPS_MULTOFFSET_VIO) | |
1272 | info->flags |= SMPS_OFFSET_EN; | |
1273 | break; | |
1274 | } | |
1275 | ||
2098e95c RN |
1276 | rdev = regulator_register(&info->desc, &pdev->dev, initdata, info, |
1277 | pdev->dev.of_node); | |
fa16a5c1 DB |
1278 | if (IS_ERR(rdev)) { |
1279 | dev_err(&pdev->dev, "can't register %s, %ld\n", | |
1280 | info->desc.name, PTR_ERR(rdev)); | |
1281 | return PTR_ERR(rdev); | |
1282 | } | |
1283 | platform_set_drvdata(pdev, rdev); | |
1284 | ||
776dc923 SH |
1285 | if (twl_class_is_4030()) |
1286 | twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP, | |
30010fa5 JKS |
1287 | info->remap); |
1288 | ||
fa16a5c1 DB |
1289 | /* NOTE: many regulators support short-circuit IRQs (presentable |
1290 | * as REGULATOR_OVER_CURRENT notifications?) configured via: | |
1291 | * - SC_CONFIG | |
1292 | * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4) | |
1293 | * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2) | |
1294 | * - IT_CONFIG | |
1295 | */ | |
1296 | ||
1297 | return 0; | |
1298 | } | |
1299 | ||
c4aa6f31 | 1300 | static int __devexit twlreg_remove(struct platform_device *pdev) |
fa16a5c1 DB |
1301 | { |
1302 | regulator_unregister(platform_get_drvdata(pdev)); | |
1303 | return 0; | |
1304 | } | |
1305 | ||
c4aa6f31 | 1306 | MODULE_ALIAS("platform:twl_reg"); |
fa16a5c1 | 1307 | |
c4aa6f31 RN |
1308 | static struct platform_driver twlreg_driver = { |
1309 | .probe = twlreg_probe, | |
1310 | .remove = __devexit_p(twlreg_remove), | |
fa16a5c1 | 1311 | /* NOTE: short name, to work around driver model truncation of |
c4aa6f31 | 1312 | * "twl_regulator.12" (and friends) to "twl_regulator.1". |
fa16a5c1 | 1313 | */ |
2098e95c RN |
1314 | .driver = { |
1315 | .name = "twl_reg", | |
1316 | .owner = THIS_MODULE, | |
1317 | .of_match_table = of_match_ptr(twl_of_match), | |
1318 | }, | |
fa16a5c1 DB |
1319 | }; |
1320 | ||
c4aa6f31 | 1321 | static int __init twlreg_init(void) |
fa16a5c1 | 1322 | { |
c4aa6f31 | 1323 | return platform_driver_register(&twlreg_driver); |
fa16a5c1 | 1324 | } |
c4aa6f31 | 1325 | subsys_initcall(twlreg_init); |
fa16a5c1 | 1326 | |
c4aa6f31 | 1327 | static void __exit twlreg_exit(void) |
fa16a5c1 | 1328 | { |
c4aa6f31 | 1329 | platform_driver_unregister(&twlreg_driver); |
fa16a5c1 | 1330 | } |
c4aa6f31 | 1331 | module_exit(twlreg_exit) |
fa16a5c1 | 1332 | |
c4aa6f31 | 1333 | MODULE_DESCRIPTION("TWL regulator driver"); |
fa16a5c1 | 1334 | MODULE_LICENSE("GPL"); |