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e4ee831f MB |
1 | /* |
2 | * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series | |
3 | * | |
4 | * Copyright 2009 Wolfson Microelectronics PLC. | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/moduleparam.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/bitops.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/i2c.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/regulator/driver.h> | |
e24a04c4 MB |
22 | #include <linux/regulator/machine.h> |
23 | #include <linux/gpio.h> | |
5a0e3ad6 | 24 | #include <linux/slab.h> |
e4ee831f MB |
25 | |
26 | #include <linux/mfd/wm831x/core.h> | |
27 | #include <linux/mfd/wm831x/regulator.h> | |
28 | #include <linux/mfd/wm831x/pdata.h> | |
29 | ||
30 | #define WM831X_BUCKV_MAX_SELECTOR 0x68 | |
31 | #define WM831X_BUCKP_MAX_SELECTOR 0x66 | |
32 | ||
33 | #define WM831X_DCDC_MODE_FAST 0 | |
34 | #define WM831X_DCDC_MODE_NORMAL 1 | |
35 | #define WM831X_DCDC_MODE_IDLE 2 | |
36 | #define WM831X_DCDC_MODE_STANDBY 3 | |
37 | ||
38 | #define WM831X_DCDC_MAX_NAME 6 | |
39 | ||
40 | /* Register offsets in control block */ | |
41 | #define WM831X_DCDC_CONTROL_1 0 | |
42 | #define WM831X_DCDC_CONTROL_2 1 | |
43 | #define WM831X_DCDC_ON_CONFIG 2 | |
44 | #define WM831X_DCDC_SLEEP_CONTROL 3 | |
e24a04c4 | 45 | #define WM831X_DCDC_DVS_CONTROL 4 |
e4ee831f MB |
46 | |
47 | /* | |
48 | * Shared | |
49 | */ | |
50 | ||
51 | struct wm831x_dcdc { | |
52 | char name[WM831X_DCDC_MAX_NAME]; | |
53 | struct regulator_desc desc; | |
54 | int base; | |
55 | struct wm831x *wm831x; | |
56 | struct regulator_dev *regulator; | |
e24a04c4 MB |
57 | int dvs_gpio; |
58 | int dvs_gpio_state; | |
59 | int on_vsel; | |
60 | int dvs_vsel; | |
e4ee831f MB |
61 | }; |
62 | ||
63 | static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev) | |
64 | { | |
65 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
66 | struct wm831x *wm831x = dcdc->wm831x; | |
67 | int mask = 1 << rdev_get_id(rdev); | |
68 | int reg; | |
69 | ||
70 | reg = wm831x_reg_read(wm831x, WM831X_DCDC_ENABLE); | |
71 | if (reg < 0) | |
72 | return reg; | |
73 | ||
74 | if (reg & mask) | |
75 | return 1; | |
76 | else | |
77 | return 0; | |
78 | } | |
79 | ||
80 | static int wm831x_dcdc_enable(struct regulator_dev *rdev) | |
81 | { | |
82 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
83 | struct wm831x *wm831x = dcdc->wm831x; | |
84 | int mask = 1 << rdev_get_id(rdev); | |
85 | ||
86 | return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, mask); | |
87 | } | |
88 | ||
89 | static int wm831x_dcdc_disable(struct regulator_dev *rdev) | |
90 | { | |
91 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
92 | struct wm831x *wm831x = dcdc->wm831x; | |
93 | int mask = 1 << rdev_get_id(rdev); | |
94 | ||
95 | return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, 0); | |
96 | } | |
97 | ||
98 | static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev) | |
99 | ||
100 | { | |
101 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
102 | struct wm831x *wm831x = dcdc->wm831x; | |
103 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | |
104 | int val; | |
105 | ||
106 | val = wm831x_reg_read(wm831x, reg); | |
107 | if (val < 0) | |
108 | return val; | |
109 | ||
110 | val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT; | |
111 | ||
112 | switch (val) { | |
113 | case WM831X_DCDC_MODE_FAST: | |
114 | return REGULATOR_MODE_FAST; | |
115 | case WM831X_DCDC_MODE_NORMAL: | |
116 | return REGULATOR_MODE_NORMAL; | |
117 | case WM831X_DCDC_MODE_STANDBY: | |
118 | return REGULATOR_MODE_STANDBY; | |
119 | case WM831X_DCDC_MODE_IDLE: | |
120 | return REGULATOR_MODE_IDLE; | |
121 | default: | |
122 | BUG(); | |
9ee291a4 | 123 | return -EINVAL; |
e4ee831f MB |
124 | } |
125 | } | |
126 | ||
127 | static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg, | |
128 | unsigned int mode) | |
129 | { | |
130 | int val; | |
131 | ||
132 | switch (mode) { | |
133 | case REGULATOR_MODE_FAST: | |
134 | val = WM831X_DCDC_MODE_FAST; | |
135 | break; | |
136 | case REGULATOR_MODE_NORMAL: | |
137 | val = WM831X_DCDC_MODE_NORMAL; | |
138 | break; | |
139 | case REGULATOR_MODE_STANDBY: | |
140 | val = WM831X_DCDC_MODE_STANDBY; | |
141 | break; | |
142 | case REGULATOR_MODE_IDLE: | |
143 | val = WM831X_DCDC_MODE_IDLE; | |
144 | break; | |
145 | default: | |
146 | return -EINVAL; | |
147 | } | |
148 | ||
149 | return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK, | |
150 | val << WM831X_DC1_ON_MODE_SHIFT); | |
151 | } | |
152 | ||
153 | static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode) | |
154 | { | |
155 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
156 | struct wm831x *wm831x = dcdc->wm831x; | |
157 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | |
158 | ||
159 | return wm831x_dcdc_set_mode_int(wm831x, reg, mode); | |
160 | } | |
161 | ||
162 | static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev, | |
163 | unsigned int mode) | |
164 | { | |
165 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
166 | struct wm831x *wm831x = dcdc->wm831x; | |
167 | u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; | |
168 | ||
169 | return wm831x_dcdc_set_mode_int(wm831x, reg, mode); | |
170 | } | |
171 | ||
172 | static int wm831x_dcdc_get_status(struct regulator_dev *rdev) | |
173 | { | |
174 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
175 | struct wm831x *wm831x = dcdc->wm831x; | |
176 | int ret; | |
177 | ||
178 | /* First, check for errors */ | |
179 | ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS); | |
180 | if (ret < 0) | |
181 | return ret; | |
182 | ||
183 | if (ret & (1 << rdev_get_id(rdev))) { | |
184 | dev_dbg(wm831x->dev, "DCDC%d under voltage\n", | |
185 | rdev_get_id(rdev) + 1); | |
186 | return REGULATOR_STATUS_ERROR; | |
187 | } | |
188 | ||
189 | /* DCDC1 and DCDC2 can additionally detect high voltage/current */ | |
190 | if (rdev_get_id(rdev) < 2) { | |
191 | if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) { | |
192 | dev_dbg(wm831x->dev, "DCDC%d over voltage\n", | |
193 | rdev_get_id(rdev) + 1); | |
194 | return REGULATOR_STATUS_ERROR; | |
195 | } | |
196 | ||
197 | if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) { | |
198 | dev_dbg(wm831x->dev, "DCDC%d over current\n", | |
199 | rdev_get_id(rdev) + 1); | |
200 | return REGULATOR_STATUS_ERROR; | |
201 | } | |
202 | } | |
203 | ||
204 | /* Is the regulator on? */ | |
205 | ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS); | |
206 | if (ret < 0) | |
207 | return ret; | |
208 | if (!(ret & (1 << rdev_get_id(rdev)))) | |
209 | return REGULATOR_STATUS_OFF; | |
210 | ||
211 | /* TODO: When we handle hardware control modes so we can report the | |
212 | * current mode. */ | |
213 | return REGULATOR_STATUS_ON; | |
214 | } | |
215 | ||
216 | static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data) | |
217 | { | |
218 | struct wm831x_dcdc *dcdc = data; | |
219 | ||
220 | regulator_notifier_call_chain(dcdc->regulator, | |
221 | REGULATOR_EVENT_UNDER_VOLTAGE, | |
222 | NULL); | |
223 | ||
224 | return IRQ_HANDLED; | |
225 | } | |
226 | ||
227 | static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data) | |
228 | { | |
229 | struct wm831x_dcdc *dcdc = data; | |
230 | ||
231 | regulator_notifier_call_chain(dcdc->regulator, | |
232 | REGULATOR_EVENT_OVER_CURRENT, | |
233 | NULL); | |
234 | ||
235 | return IRQ_HANDLED; | |
236 | } | |
237 | ||
238 | /* | |
239 | * BUCKV specifics | |
240 | */ | |
241 | ||
242 | static int wm831x_buckv_list_voltage(struct regulator_dev *rdev, | |
243 | unsigned selector) | |
244 | { | |
245 | if (selector <= 0x8) | |
246 | return 600000; | |
247 | if (selector <= WM831X_BUCKV_MAX_SELECTOR) | |
248 | return 600000 + ((selector - 0x8) * 12500); | |
249 | return -EINVAL; | |
250 | } | |
251 | ||
e24a04c4 MB |
252 | static int wm831x_buckv_select_min_voltage(struct regulator_dev *rdev, |
253 | int min_uV, int max_uV) | |
e4ee831f | 254 | { |
e4ee831f MB |
255 | u16 vsel; |
256 | ||
257 | if (min_uV < 600000) | |
258 | vsel = 0; | |
259 | else if (min_uV <= 1800000) | |
260 | vsel = ((min_uV - 600000) / 12500) + 8; | |
261 | else | |
262 | return -EINVAL; | |
263 | ||
264 | if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV) | |
265 | return -EINVAL; | |
266 | ||
e24a04c4 MB |
267 | return vsel; |
268 | } | |
269 | ||
270 | static int wm831x_buckv_select_max_voltage(struct regulator_dev *rdev, | |
271 | int min_uV, int max_uV) | |
272 | { | |
273 | u16 vsel; | |
274 | ||
275 | if (max_uV < 600000 || max_uV > 1800000) | |
276 | return -EINVAL; | |
277 | ||
278 | vsel = ((max_uV - 600000) / 12500) + 8; | |
279 | ||
280 | if (wm831x_buckv_list_voltage(rdev, vsel) < min_uV || | |
281 | wm831x_buckv_list_voltage(rdev, vsel) < max_uV) | |
282 | return -EINVAL; | |
283 | ||
284 | return vsel; | |
285 | } | |
286 | ||
287 | static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state) | |
288 | { | |
289 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
290 | ||
291 | if (state == dcdc->dvs_gpio_state) | |
292 | return 0; | |
293 | ||
294 | dcdc->dvs_gpio_state = state; | |
295 | gpio_set_value(dcdc->dvs_gpio, state); | |
296 | ||
297 | /* Should wait for DVS state change to be asserted if we have | |
298 | * a GPIO for it, for now assume the device is configured | |
299 | * for the fastest possible transition. | |
300 | */ | |
301 | ||
302 | return 0; | |
e4ee831f MB |
303 | } |
304 | ||
305 | static int wm831x_buckv_set_voltage(struct regulator_dev *rdev, | |
3a93f2a9 | 306 | int min_uV, int max_uV, unsigned *selector) |
e4ee831f MB |
307 | { |
308 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
e24a04c4 MB |
309 | struct wm831x *wm831x = dcdc->wm831x; |
310 | int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | |
311 | int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL; | |
312 | int vsel, ret; | |
313 | ||
314 | vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV); | |
315 | if (vsel < 0) | |
316 | return vsel; | |
317 | ||
3a93f2a9 MB |
318 | *selector = vsel; |
319 | ||
e24a04c4 MB |
320 | /* If this value is already set then do a GPIO update if we can */ |
321 | if (dcdc->dvs_gpio && dcdc->on_vsel == vsel) | |
322 | return wm831x_buckv_set_dvs(rdev, 0); | |
323 | ||
324 | if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel) | |
325 | return wm831x_buckv_set_dvs(rdev, 1); | |
326 | ||
327 | /* Always set the ON status to the minimum voltage */ | |
328 | ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel); | |
329 | if (ret < 0) | |
330 | return ret; | |
331 | dcdc->on_vsel = vsel; | |
332 | ||
333 | if (!dcdc->dvs_gpio) | |
334 | return ret; | |
335 | ||
336 | /* Kick the voltage transition now */ | |
337 | ret = wm831x_buckv_set_dvs(rdev, 0); | |
338 | if (ret < 0) | |
339 | return ret; | |
340 | ||
341 | /* Set the high voltage as the DVS voltage. This is optimised | |
342 | * for CPUfreq usage, most processors will keep the maximum | |
343 | * voltage constant and lower the minimum with the frequency. */ | |
344 | vsel = wm831x_buckv_select_max_voltage(rdev, min_uV, max_uV); | |
345 | if (vsel < 0) { | |
346 | /* This should never happen - at worst the same vsel | |
347 | * should be chosen */ | |
348 | WARN_ON(vsel < 0); | |
349 | return 0; | |
350 | } | |
351 | ||
352 | /* Don't bother if it's the same VSEL we're already using */ | |
353 | if (vsel == dcdc->on_vsel) | |
354 | return 0; | |
e4ee831f | 355 | |
e24a04c4 MB |
356 | ret = wm831x_set_bits(wm831x, dvs_reg, WM831X_DC1_DVS_VSEL_MASK, vsel); |
357 | if (ret == 0) | |
358 | dcdc->dvs_vsel = vsel; | |
359 | else | |
360 | dev_warn(wm831x->dev, "Failed to set DCDC DVS VSEL: %d\n", | |
361 | ret); | |
362 | ||
363 | return 0; | |
e4ee831f MB |
364 | } |
365 | ||
366 | static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev, | |
e24a04c4 | 367 | int uV) |
e4ee831f MB |
368 | { |
369 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
e24a04c4 | 370 | struct wm831x *wm831x = dcdc->wm831x; |
e4ee831f | 371 | u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; |
e24a04c4 MB |
372 | int vsel; |
373 | ||
374 | vsel = wm831x_buckv_select_min_voltage(rdev, uV, uV); | |
375 | if (vsel < 0) | |
376 | return vsel; | |
e4ee831f | 377 | |
e24a04c4 | 378 | return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel); |
e4ee831f MB |
379 | } |
380 | ||
afb8bb80 | 381 | static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev) |
e4ee831f MB |
382 | { |
383 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
e4ee831f | 384 | |
e24a04c4 | 385 | if (dcdc->dvs_gpio && dcdc->dvs_gpio_state) |
afb8bb80 | 386 | return dcdc->dvs_vsel; |
e24a04c4 | 387 | else |
afb8bb80 | 388 | return dcdc->on_vsel; |
e4ee831f MB |
389 | } |
390 | ||
391 | /* Current limit options */ | |
392 | static u16 wm831x_dcdc_ilim[] = { | |
393 | 125, 250, 375, 500, 625, 750, 875, 1000 | |
394 | }; | |
395 | ||
396 | static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev, | |
397 | int min_uA, int max_uA) | |
398 | { | |
399 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
400 | struct wm831x *wm831x = dcdc->wm831x; | |
401 | u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2; | |
402 | int i; | |
403 | ||
404 | for (i = 0; i < ARRAY_SIZE(wm831x_dcdc_ilim); i++) { | |
405 | if (max_uA <= wm831x_dcdc_ilim[i]) | |
406 | break; | |
407 | } | |
408 | if (i == ARRAY_SIZE(wm831x_dcdc_ilim)) | |
409 | return -EINVAL; | |
410 | ||
411 | return wm831x_set_bits(wm831x, reg, WM831X_DC1_HC_THR_MASK, i); | |
412 | } | |
413 | ||
414 | static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev) | |
415 | { | |
416 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
417 | struct wm831x *wm831x = dcdc->wm831x; | |
418 | u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2; | |
419 | int val; | |
420 | ||
421 | val = wm831x_reg_read(wm831x, reg); | |
422 | if (val < 0) | |
423 | return val; | |
424 | ||
425 | return wm831x_dcdc_ilim[val & WM831X_DC1_HC_THR_MASK]; | |
426 | } | |
427 | ||
428 | static struct regulator_ops wm831x_buckv_ops = { | |
429 | .set_voltage = wm831x_buckv_set_voltage, | |
afb8bb80 | 430 | .get_voltage_sel = wm831x_buckv_get_voltage_sel, |
e4ee831f MB |
431 | .list_voltage = wm831x_buckv_list_voltage, |
432 | .set_suspend_voltage = wm831x_buckv_set_suspend_voltage, | |
433 | .set_current_limit = wm831x_buckv_set_current_limit, | |
434 | .get_current_limit = wm831x_buckv_get_current_limit, | |
435 | ||
436 | .is_enabled = wm831x_dcdc_is_enabled, | |
437 | .enable = wm831x_dcdc_enable, | |
438 | .disable = wm831x_dcdc_disable, | |
439 | .get_status = wm831x_dcdc_get_status, | |
440 | .get_mode = wm831x_dcdc_get_mode, | |
441 | .set_mode = wm831x_dcdc_set_mode, | |
442 | .set_suspend_mode = wm831x_dcdc_set_suspend_mode, | |
443 | }; | |
444 | ||
e24a04c4 MB |
445 | /* |
446 | * Set up DVS control. We just log errors since we can still run | |
447 | * (with reduced performance) if we fail. | |
448 | */ | |
449 | static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc, | |
450 | struct wm831x_buckv_pdata *pdata) | |
451 | { | |
452 | struct wm831x *wm831x = dcdc->wm831x; | |
453 | int ret; | |
454 | u16 ctrl; | |
455 | ||
456 | if (!pdata || !pdata->dvs_gpio) | |
457 | return; | |
458 | ||
e24a04c4 MB |
459 | ret = gpio_request(pdata->dvs_gpio, "DCDC DVS"); |
460 | if (ret < 0) { | |
461 | dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n", | |
462 | dcdc->name, ret); | |
463 | return; | |
464 | } | |
465 | ||
466 | /* gpiolib won't let us read the GPIO status so pick the higher | |
467 | * of the two existing voltages so we take it as platform data. | |
468 | */ | |
469 | dcdc->dvs_gpio_state = pdata->dvs_init_state; | |
470 | ||
471 | ret = gpio_direction_output(pdata->dvs_gpio, dcdc->dvs_gpio_state); | |
472 | if (ret < 0) { | |
473 | dev_err(wm831x->dev, "Failed to enable %s DVS GPIO: %d\n", | |
474 | dcdc->name, ret); | |
475 | gpio_free(pdata->dvs_gpio); | |
476 | return; | |
477 | } | |
478 | ||
479 | dcdc->dvs_gpio = pdata->dvs_gpio; | |
b47ba9fd MB |
480 | |
481 | switch (pdata->dvs_control_src) { | |
482 | case 1: | |
483 | ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT; | |
484 | break; | |
485 | case 2: | |
486 | ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT; | |
487 | break; | |
488 | default: | |
489 | dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n", | |
490 | pdata->dvs_control_src, dcdc->name); | |
491 | return; | |
492 | } | |
493 | ||
494 | ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL, | |
495 | WM831X_DC1_DVS_SRC_MASK, ctrl); | |
496 | if (ret < 0) { | |
497 | dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n", | |
498 | dcdc->name, ret); | |
499 | } | |
e24a04c4 MB |
500 | } |
501 | ||
e4ee831f MB |
502 | static __devinit int wm831x_buckv_probe(struct platform_device *pdev) |
503 | { | |
504 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | |
505 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | |
137a6354 | 506 | int id; |
e4ee831f MB |
507 | struct wm831x_dcdc *dcdc; |
508 | struct resource *res; | |
509 | int ret, irq; | |
510 | ||
137a6354 MB |
511 | if (pdata && pdata->wm831x_num) |
512 | id = (pdata->wm831x_num * 10) + 1; | |
513 | else | |
514 | id = 0; | |
515 | id = pdev->id - id; | |
516 | ||
e4ee831f MB |
517 | dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1); |
518 | ||
519 | if (pdata == NULL || pdata->dcdc[id] == NULL) | |
520 | return -ENODEV; | |
521 | ||
522 | dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL); | |
523 | if (dcdc == NULL) { | |
524 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | |
525 | return -ENOMEM; | |
526 | } | |
527 | ||
528 | dcdc->wm831x = wm831x; | |
529 | ||
530 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
531 | if (res == NULL) { | |
532 | dev_err(&pdev->dev, "No I/O resource\n"); | |
533 | ret = -EINVAL; | |
534 | goto err; | |
535 | } | |
536 | dcdc->base = res->start; | |
537 | ||
538 | snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1); | |
539 | dcdc->desc.name = dcdc->name; | |
540 | dcdc->desc.id = id; | |
541 | dcdc->desc.type = REGULATOR_VOLTAGE; | |
542 | dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1; | |
543 | dcdc->desc.ops = &wm831x_buckv_ops; | |
544 | dcdc->desc.owner = THIS_MODULE; | |
545 | ||
e24a04c4 MB |
546 | ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG); |
547 | if (ret < 0) { | |
548 | dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret); | |
549 | goto err; | |
550 | } | |
551 | dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK; | |
552 | ||
a1b81dd3 | 553 | ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL); |
e24a04c4 MB |
554 | if (ret < 0) { |
555 | dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret); | |
556 | goto err; | |
557 | } | |
558 | dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK; | |
559 | ||
560 | if (pdata->dcdc[id]) | |
561 | wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data); | |
562 | ||
e4ee831f MB |
563 | dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev, |
564 | pdata->dcdc[id], dcdc); | |
565 | if (IS_ERR(dcdc->regulator)) { | |
566 | ret = PTR_ERR(dcdc->regulator); | |
567 | dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n", | |
568 | id + 1, ret); | |
569 | goto err; | |
570 | } | |
571 | ||
572 | irq = platform_get_irq_byname(pdev, "UV"); | |
dfda9c27 MB |
573 | ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq, |
574 | IRQF_TRIGGER_RISING, dcdc->name, dcdc); | |
e4ee831f MB |
575 | if (ret != 0) { |
576 | dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", | |
577 | irq, ret); | |
578 | goto err_regulator; | |
579 | } | |
580 | ||
581 | irq = platform_get_irq_byname(pdev, "HC"); | |
dfda9c27 MB |
582 | ret = request_threaded_irq(irq, NULL, wm831x_dcdc_oc_irq, |
583 | IRQF_TRIGGER_RISING, dcdc->name, dcdc); | |
e4ee831f MB |
584 | if (ret != 0) { |
585 | dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n", | |
586 | irq, ret); | |
587 | goto err_uv; | |
588 | } | |
589 | ||
590 | platform_set_drvdata(pdev, dcdc); | |
591 | ||
592 | return 0; | |
593 | ||
594 | err_uv: | |
dfda9c27 | 595 | free_irq(platform_get_irq_byname(pdev, "UV"), dcdc); |
e4ee831f MB |
596 | err_regulator: |
597 | regulator_unregister(dcdc->regulator); | |
598 | err: | |
e24a04c4 MB |
599 | if (dcdc->dvs_gpio) |
600 | gpio_free(dcdc->dvs_gpio); | |
e4ee831f MB |
601 | kfree(dcdc); |
602 | return ret; | |
603 | } | |
604 | ||
605 | static __devexit int wm831x_buckv_remove(struct platform_device *pdev) | |
606 | { | |
607 | struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); | |
e4ee831f | 608 | |
eb66d565 DT |
609 | platform_set_drvdata(pdev, NULL); |
610 | ||
69952369 MB |
611 | free_irq(platform_get_irq_byname(pdev, "HC"), dcdc); |
612 | free_irq(platform_get_irq_byname(pdev, "UV"), dcdc); | |
e4ee831f | 613 | regulator_unregister(dcdc->regulator); |
e24a04c4 MB |
614 | if (dcdc->dvs_gpio) |
615 | gpio_free(dcdc->dvs_gpio); | |
e4ee831f MB |
616 | kfree(dcdc); |
617 | ||
618 | return 0; | |
619 | } | |
620 | ||
621 | static struct platform_driver wm831x_buckv_driver = { | |
622 | .probe = wm831x_buckv_probe, | |
623 | .remove = __devexit_p(wm831x_buckv_remove), | |
624 | .driver = { | |
625 | .name = "wm831x-buckv", | |
eb66d565 | 626 | .owner = THIS_MODULE, |
e4ee831f MB |
627 | }, |
628 | }; | |
629 | ||
630 | /* | |
631 | * BUCKP specifics | |
632 | */ | |
633 | ||
634 | static int wm831x_buckp_list_voltage(struct regulator_dev *rdev, | |
635 | unsigned selector) | |
636 | { | |
637 | if (selector <= WM831X_BUCKP_MAX_SELECTOR) | |
638 | return 850000 + (selector * 25000); | |
639 | else | |
640 | return -EINVAL; | |
641 | } | |
642 | ||
643 | static int wm831x_buckp_set_voltage_int(struct regulator_dev *rdev, int reg, | |
3a93f2a9 | 644 | int min_uV, int max_uV, int *selector) |
e4ee831f MB |
645 | { |
646 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
647 | struct wm831x *wm831x = dcdc->wm831x; | |
648 | u16 vsel; | |
649 | ||
650 | if (min_uV <= 34000000) | |
651 | vsel = (min_uV - 850000) / 25000; | |
652 | else | |
653 | return -EINVAL; | |
654 | ||
655 | if (wm831x_buckp_list_voltage(rdev, vsel) > max_uV) | |
656 | return -EINVAL; | |
657 | ||
3a93f2a9 MB |
658 | *selector = vsel; |
659 | ||
e4ee831f MB |
660 | return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, vsel); |
661 | } | |
662 | ||
663 | static int wm831x_buckp_set_voltage(struct regulator_dev *rdev, | |
3a93f2a9 MB |
664 | int min_uV, int max_uV, |
665 | unsigned *selector) | |
e4ee831f MB |
666 | { |
667 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
668 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | |
669 | ||
3a93f2a9 MB |
670 | return wm831x_buckp_set_voltage_int(rdev, reg, min_uV, max_uV, |
671 | selector); | |
e4ee831f MB |
672 | } |
673 | ||
674 | static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, | |
675 | int uV) | |
676 | { | |
677 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
678 | u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; | |
3a93f2a9 | 679 | unsigned selector; |
e4ee831f | 680 | |
3a93f2a9 | 681 | return wm831x_buckp_set_voltage_int(rdev, reg, uV, uV, &selector); |
e4ee831f MB |
682 | } |
683 | ||
afb8bb80 | 684 | static int wm831x_buckp_get_voltage_sel(struct regulator_dev *rdev) |
e4ee831f MB |
685 | { |
686 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
687 | struct wm831x *wm831x = dcdc->wm831x; | |
688 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | |
689 | int val; | |
690 | ||
691 | val = wm831x_reg_read(wm831x, reg); | |
692 | if (val < 0) | |
693 | return val; | |
694 | ||
afb8bb80 | 695 | return val & WM831X_DC3_ON_VSEL_MASK; |
e4ee831f MB |
696 | } |
697 | ||
698 | static struct regulator_ops wm831x_buckp_ops = { | |
699 | .set_voltage = wm831x_buckp_set_voltage, | |
afb8bb80 | 700 | .get_voltage_sel = wm831x_buckp_get_voltage_sel, |
e4ee831f MB |
701 | .list_voltage = wm831x_buckp_list_voltage, |
702 | .set_suspend_voltage = wm831x_buckp_set_suspend_voltage, | |
703 | ||
704 | .is_enabled = wm831x_dcdc_is_enabled, | |
705 | .enable = wm831x_dcdc_enable, | |
706 | .disable = wm831x_dcdc_disable, | |
707 | .get_status = wm831x_dcdc_get_status, | |
708 | .get_mode = wm831x_dcdc_get_mode, | |
709 | .set_mode = wm831x_dcdc_set_mode, | |
710 | .set_suspend_mode = wm831x_dcdc_set_suspend_mode, | |
711 | }; | |
712 | ||
713 | static __devinit int wm831x_buckp_probe(struct platform_device *pdev) | |
714 | { | |
715 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | |
716 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | |
137a6354 | 717 | int id; |
e4ee831f MB |
718 | struct wm831x_dcdc *dcdc; |
719 | struct resource *res; | |
720 | int ret, irq; | |
721 | ||
137a6354 MB |
722 | if (pdata && pdata->wm831x_num) |
723 | id = (pdata->wm831x_num * 10) + 1; | |
724 | else | |
725 | id = 0; | |
726 | id = pdev->id - id; | |
727 | ||
e4ee831f MB |
728 | dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1); |
729 | ||
730 | if (pdata == NULL || pdata->dcdc[id] == NULL) | |
731 | return -ENODEV; | |
732 | ||
733 | dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL); | |
734 | if (dcdc == NULL) { | |
735 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | |
736 | return -ENOMEM; | |
737 | } | |
738 | ||
739 | dcdc->wm831x = wm831x; | |
740 | ||
741 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
742 | if (res == NULL) { | |
743 | dev_err(&pdev->dev, "No I/O resource\n"); | |
744 | ret = -EINVAL; | |
745 | goto err; | |
746 | } | |
747 | dcdc->base = res->start; | |
748 | ||
749 | snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1); | |
750 | dcdc->desc.name = dcdc->name; | |
751 | dcdc->desc.id = id; | |
752 | dcdc->desc.type = REGULATOR_VOLTAGE; | |
753 | dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1; | |
754 | dcdc->desc.ops = &wm831x_buckp_ops; | |
755 | dcdc->desc.owner = THIS_MODULE; | |
756 | ||
757 | dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev, | |
758 | pdata->dcdc[id], dcdc); | |
759 | if (IS_ERR(dcdc->regulator)) { | |
760 | ret = PTR_ERR(dcdc->regulator); | |
761 | dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n", | |
762 | id + 1, ret); | |
763 | goto err; | |
764 | } | |
765 | ||
766 | irq = platform_get_irq_byname(pdev, "UV"); | |
dfda9c27 MB |
767 | ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq, |
768 | IRQF_TRIGGER_RISING, dcdc->name, dcdc); | |
e4ee831f MB |
769 | if (ret != 0) { |
770 | dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", | |
771 | irq, ret); | |
772 | goto err_regulator; | |
773 | } | |
774 | ||
775 | platform_set_drvdata(pdev, dcdc); | |
776 | ||
777 | return 0; | |
778 | ||
779 | err_regulator: | |
780 | regulator_unregister(dcdc->regulator); | |
781 | err: | |
782 | kfree(dcdc); | |
783 | return ret; | |
784 | } | |
785 | ||
786 | static __devexit int wm831x_buckp_remove(struct platform_device *pdev) | |
787 | { | |
788 | struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); | |
e4ee831f | 789 | |
eb66d565 DT |
790 | platform_set_drvdata(pdev, NULL); |
791 | ||
69952369 | 792 | free_irq(platform_get_irq_byname(pdev, "UV"), dcdc); |
e4ee831f MB |
793 | regulator_unregister(dcdc->regulator); |
794 | kfree(dcdc); | |
795 | ||
796 | return 0; | |
797 | } | |
798 | ||
799 | static struct platform_driver wm831x_buckp_driver = { | |
800 | .probe = wm831x_buckp_probe, | |
801 | .remove = __devexit_p(wm831x_buckp_remove), | |
802 | .driver = { | |
803 | .name = "wm831x-buckp", | |
eb66d565 | 804 | .owner = THIS_MODULE, |
e4ee831f MB |
805 | }, |
806 | }; | |
807 | ||
1304850d MB |
808 | /* |
809 | * DCDC boost convertors | |
810 | */ | |
811 | ||
812 | static int wm831x_boostp_get_status(struct regulator_dev *rdev) | |
813 | { | |
814 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
815 | struct wm831x *wm831x = dcdc->wm831x; | |
816 | int ret; | |
817 | ||
818 | /* First, check for errors */ | |
819 | ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS); | |
820 | if (ret < 0) | |
821 | return ret; | |
822 | ||
823 | if (ret & (1 << rdev_get_id(rdev))) { | |
824 | dev_dbg(wm831x->dev, "DCDC%d under voltage\n", | |
825 | rdev_get_id(rdev) + 1); | |
826 | return REGULATOR_STATUS_ERROR; | |
827 | } | |
828 | ||
829 | /* Is the regulator on? */ | |
830 | ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS); | |
831 | if (ret < 0) | |
832 | return ret; | |
833 | if (ret & (1 << rdev_get_id(rdev))) | |
834 | return REGULATOR_STATUS_ON; | |
835 | else | |
836 | return REGULATOR_STATUS_OFF; | |
837 | } | |
838 | ||
839 | static struct regulator_ops wm831x_boostp_ops = { | |
840 | .get_status = wm831x_boostp_get_status, | |
841 | ||
842 | .is_enabled = wm831x_dcdc_is_enabled, | |
843 | .enable = wm831x_dcdc_enable, | |
844 | .disable = wm831x_dcdc_disable, | |
845 | }; | |
846 | ||
847 | static __devinit int wm831x_boostp_probe(struct platform_device *pdev) | |
848 | { | |
849 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | |
850 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | |
851 | int id = pdev->id % ARRAY_SIZE(pdata->dcdc); | |
852 | struct wm831x_dcdc *dcdc; | |
853 | struct resource *res; | |
854 | int ret, irq; | |
855 | ||
856 | dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1); | |
857 | ||
858 | if (pdata == NULL || pdata->dcdc[id] == NULL) | |
859 | return -ENODEV; | |
860 | ||
861 | dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL); | |
862 | if (dcdc == NULL) { | |
863 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | |
864 | return -ENOMEM; | |
865 | } | |
866 | ||
867 | dcdc->wm831x = wm831x; | |
868 | ||
869 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
870 | if (res == NULL) { | |
871 | dev_err(&pdev->dev, "No I/O resource\n"); | |
872 | ret = -EINVAL; | |
873 | goto err; | |
874 | } | |
875 | dcdc->base = res->start; | |
876 | ||
877 | snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1); | |
878 | dcdc->desc.name = dcdc->name; | |
879 | dcdc->desc.id = id; | |
880 | dcdc->desc.type = REGULATOR_VOLTAGE; | |
881 | dcdc->desc.ops = &wm831x_boostp_ops; | |
882 | dcdc->desc.owner = THIS_MODULE; | |
883 | ||
884 | dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev, | |
885 | pdata->dcdc[id], dcdc); | |
886 | if (IS_ERR(dcdc->regulator)) { | |
887 | ret = PTR_ERR(dcdc->regulator); | |
888 | dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n", | |
889 | id + 1, ret); | |
890 | goto err; | |
891 | } | |
892 | ||
893 | irq = platform_get_irq_byname(pdev, "UV"); | |
dfda9c27 MB |
894 | ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq, |
895 | IRQF_TRIGGER_RISING, dcdc->name, | |
896 | dcdc); | |
1304850d MB |
897 | if (ret != 0) { |
898 | dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", | |
899 | irq, ret); | |
900 | goto err_regulator; | |
901 | } | |
902 | ||
903 | platform_set_drvdata(pdev, dcdc); | |
904 | ||
905 | return 0; | |
906 | ||
907 | err_regulator: | |
908 | regulator_unregister(dcdc->regulator); | |
909 | err: | |
910 | kfree(dcdc); | |
911 | return ret; | |
912 | } | |
913 | ||
914 | static __devexit int wm831x_boostp_remove(struct platform_device *pdev) | |
915 | { | |
916 | struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); | |
1304850d | 917 | |
eb66d565 DT |
918 | platform_set_drvdata(pdev, NULL); |
919 | ||
dfda9c27 | 920 | free_irq(platform_get_irq_byname(pdev, "UV"), dcdc); |
1304850d MB |
921 | regulator_unregister(dcdc->regulator); |
922 | kfree(dcdc); | |
923 | ||
924 | return 0; | |
925 | } | |
926 | ||
927 | static struct platform_driver wm831x_boostp_driver = { | |
928 | .probe = wm831x_boostp_probe, | |
929 | .remove = __devexit_p(wm831x_boostp_remove), | |
930 | .driver = { | |
931 | .name = "wm831x-boostp", | |
eb66d565 | 932 | .owner = THIS_MODULE, |
1304850d MB |
933 | }, |
934 | }; | |
935 | ||
8267a9ba MB |
936 | /* |
937 | * External Power Enable | |
938 | * | |
939 | * These aren't actually DCDCs but look like them in hardware so share | |
940 | * code. | |
941 | */ | |
942 | ||
943 | #define WM831X_EPE_BASE 6 | |
944 | ||
945 | static struct regulator_ops wm831x_epe_ops = { | |
946 | .is_enabled = wm831x_dcdc_is_enabled, | |
947 | .enable = wm831x_dcdc_enable, | |
948 | .disable = wm831x_dcdc_disable, | |
949 | .get_status = wm831x_dcdc_get_status, | |
950 | }; | |
951 | ||
952 | static __devinit int wm831x_epe_probe(struct platform_device *pdev) | |
953 | { | |
954 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | |
955 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | |
956 | int id = pdev->id % ARRAY_SIZE(pdata->epe); | |
957 | struct wm831x_dcdc *dcdc; | |
958 | int ret; | |
959 | ||
960 | dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1); | |
961 | ||
962 | if (pdata == NULL || pdata->epe[id] == NULL) | |
963 | return -ENODEV; | |
964 | ||
965 | dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL); | |
966 | if (dcdc == NULL) { | |
967 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | |
968 | return -ENOMEM; | |
969 | } | |
970 | ||
971 | dcdc->wm831x = wm831x; | |
972 | ||
973 | /* For current parts this is correct; probably need to revisit | |
974 | * in future. | |
975 | */ | |
976 | snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1); | |
977 | dcdc->desc.name = dcdc->name; | |
978 | dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */ | |
979 | dcdc->desc.ops = &wm831x_epe_ops; | |
980 | dcdc->desc.type = REGULATOR_VOLTAGE; | |
981 | dcdc->desc.owner = THIS_MODULE; | |
982 | ||
983 | dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev, | |
984 | pdata->epe[id], dcdc); | |
985 | if (IS_ERR(dcdc->regulator)) { | |
986 | ret = PTR_ERR(dcdc->regulator); | |
987 | dev_err(wm831x->dev, "Failed to register EPE%d: %d\n", | |
988 | id + 1, ret); | |
989 | goto err; | |
990 | } | |
991 | ||
992 | platform_set_drvdata(pdev, dcdc); | |
993 | ||
994 | return 0; | |
995 | ||
996 | err: | |
997 | kfree(dcdc); | |
998 | return ret; | |
999 | } | |
1000 | ||
1001 | static __devexit int wm831x_epe_remove(struct platform_device *pdev) | |
1002 | { | |
1003 | struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); | |
1004 | ||
eb66d565 DT |
1005 | platform_set_drvdata(pdev, NULL); |
1006 | ||
8267a9ba MB |
1007 | regulator_unregister(dcdc->regulator); |
1008 | kfree(dcdc); | |
1009 | ||
1010 | return 0; | |
1011 | } | |
1012 | ||
1013 | static struct platform_driver wm831x_epe_driver = { | |
1014 | .probe = wm831x_epe_probe, | |
1015 | .remove = __devexit_p(wm831x_epe_remove), | |
1016 | .driver = { | |
1017 | .name = "wm831x-epe", | |
eb66d565 | 1018 | .owner = THIS_MODULE, |
8267a9ba MB |
1019 | }, |
1020 | }; | |
1021 | ||
e4ee831f MB |
1022 | static int __init wm831x_dcdc_init(void) |
1023 | { | |
1024 | int ret; | |
1025 | ret = platform_driver_register(&wm831x_buckv_driver); | |
1026 | if (ret != 0) | |
1027 | pr_err("Failed to register WM831x BUCKV driver: %d\n", ret); | |
1028 | ||
1029 | ret = platform_driver_register(&wm831x_buckp_driver); | |
1030 | if (ret != 0) | |
1031 | pr_err("Failed to register WM831x BUCKP driver: %d\n", ret); | |
1032 | ||
1304850d MB |
1033 | ret = platform_driver_register(&wm831x_boostp_driver); |
1034 | if (ret != 0) | |
1035 | pr_err("Failed to register WM831x BOOST driver: %d\n", ret); | |
1036 | ||
8267a9ba MB |
1037 | ret = platform_driver_register(&wm831x_epe_driver); |
1038 | if (ret != 0) | |
1039 | pr_err("Failed to register WM831x EPE driver: %d\n", ret); | |
1040 | ||
e4ee831f MB |
1041 | return 0; |
1042 | } | |
1043 | subsys_initcall(wm831x_dcdc_init); | |
1044 | ||
1045 | static void __exit wm831x_dcdc_exit(void) | |
1046 | { | |
8267a9ba | 1047 | platform_driver_unregister(&wm831x_epe_driver); |
1304850d | 1048 | platform_driver_unregister(&wm831x_boostp_driver); |
e4ee831f MB |
1049 | platform_driver_unregister(&wm831x_buckp_driver); |
1050 | platform_driver_unregister(&wm831x_buckv_driver); | |
1051 | } | |
1052 | module_exit(wm831x_dcdc_exit); | |
1053 | ||
1054 | /* Module information */ | |
1055 | MODULE_AUTHOR("Mark Brown"); | |
1056 | MODULE_DESCRIPTION("WM831x DC-DC convertor driver"); | |
1057 | MODULE_LICENSE("GPL"); | |
1058 | MODULE_ALIAS("platform:wm831x-buckv"); | |
1059 | MODULE_ALIAS("platform:wm831x-buckp"); | |
24b43150 | 1060 | MODULE_ALIAS("platform:wm831x-epe"); |