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1abb0dc9 DB |
1 | /* |
2 | * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips. | |
3 | * | |
4 | * Copyright (C) 2005 James Chapman (ds1337 core) | |
5 | * Copyright (C) 2006 David Brownell | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/slab.h> | |
15 | #include <linux/i2c.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/rtc.h> | |
18 | #include <linux/bcd.h> | |
19 | ||
20 | ||
21 | ||
22 | /* We can't determine type by probing, but if we expect pre-Linux code | |
23 | * to have set the chip up as a clock (turning on the oscillator and | |
24 | * setting the date and time), Linux can ignore the non-clock features. | |
25 | * That's a natural job for a factory or repair bench. | |
1abb0dc9 DB |
26 | */ |
27 | enum ds_type { | |
045e0e85 DB |
28 | ds_1307, |
29 | ds_1337, | |
30 | ds_1338, | |
31 | ds_1339, | |
32 | ds_1340, | |
33 | m41t00, | |
1abb0dc9 DB |
34 | // rs5c372 too? different address... |
35 | }; | |
36 | ||
1abb0dc9 DB |
37 | |
38 | /* RTC registers don't differ much, except for the century flag */ | |
39 | #define DS1307_REG_SECS 0x00 /* 00-59 */ | |
40 | # define DS1307_BIT_CH 0x80 | |
be5f59f4 | 41 | # define DS1340_BIT_nEOSC 0x80 |
1abb0dc9 DB |
42 | #define DS1307_REG_MIN 0x01 /* 00-59 */ |
43 | #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */ | |
c065f35c DB |
44 | # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */ |
45 | # define DS1307_BIT_PM 0x20 /* in REG_HOUR */ | |
1abb0dc9 DB |
46 | # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */ |
47 | # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */ | |
48 | #define DS1307_REG_WDAY 0x03 /* 01-07 */ | |
49 | #define DS1307_REG_MDAY 0x04 /* 01-31 */ | |
50 | #define DS1307_REG_MONTH 0x05 /* 01-12 */ | |
51 | # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */ | |
52 | #define DS1307_REG_YEAR 0x06 /* 00-99 */ | |
53 | ||
54 | /* Other registers (control, status, alarms, trickle charge, NVRAM, etc) | |
045e0e85 DB |
55 | * start at 7, and they differ a LOT. Only control and status matter for |
56 | * basic RTC date and time functionality; be careful using them. | |
1abb0dc9 | 57 | */ |
045e0e85 | 58 | #define DS1307_REG_CONTROL 0x07 /* or ds1338 */ |
1abb0dc9 | 59 | # define DS1307_BIT_OUT 0x80 |
be5f59f4 | 60 | # define DS1338_BIT_OSF 0x20 |
1abb0dc9 DB |
61 | # define DS1307_BIT_SQWE 0x10 |
62 | # define DS1307_BIT_RS1 0x02 | |
63 | # define DS1307_BIT_RS0 0x01 | |
64 | #define DS1337_REG_CONTROL 0x0e | |
65 | # define DS1337_BIT_nEOSC 0x80 | |
cb49a5e9 | 66 | # define DS1339_BIT_BBSQI 0x20 |
1abb0dc9 DB |
67 | # define DS1337_BIT_RS2 0x10 |
68 | # define DS1337_BIT_RS1 0x08 | |
69 | # define DS1337_BIT_INTCN 0x04 | |
70 | # define DS1337_BIT_A2IE 0x02 | |
71 | # define DS1337_BIT_A1IE 0x01 | |
045e0e85 DB |
72 | #define DS1340_REG_CONTROL 0x07 |
73 | # define DS1340_BIT_OUT 0x80 | |
74 | # define DS1340_BIT_FT 0x40 | |
75 | # define DS1340_BIT_CALIB_SIGN 0x20 | |
76 | # define DS1340_M_CALIBRATION 0x1f | |
be5f59f4 RG |
77 | #define DS1340_REG_FLAG 0x09 |
78 | # define DS1340_BIT_OSF 0x80 | |
1abb0dc9 DB |
79 | #define DS1337_REG_STATUS 0x0f |
80 | # define DS1337_BIT_OSF 0x80 | |
81 | # define DS1337_BIT_A2I 0x02 | |
82 | # define DS1337_BIT_A1I 0x01 | |
cb49a5e9 | 83 | #define DS1339_REG_ALARM1_SECS 0x07 |
1abb0dc9 DB |
84 | #define DS1339_REG_TRICKLE 0x10 |
85 | ||
86 | ||
87 | ||
88 | struct ds1307 { | |
89 | u8 reg_addr; | |
cb49a5e9 | 90 | u8 regs[11]; |
1abb0dc9 | 91 | enum ds_type type; |
cb49a5e9 RG |
92 | unsigned long flags; |
93 | #define HAS_NVRAM 0 /* bit 0 == sysfs file active */ | |
94 | #define HAS_ALARM 1 /* bit 1 == irq claimed */ | |
1abb0dc9 | 95 | struct i2c_msg msg[2]; |
045e0e85 | 96 | struct i2c_client *client; |
1abb0dc9 | 97 | struct rtc_device *rtc; |
cb49a5e9 | 98 | struct work_struct work; |
1abb0dc9 DB |
99 | }; |
100 | ||
045e0e85 | 101 | struct chip_desc { |
045e0e85 DB |
102 | unsigned nvram56:1; |
103 | unsigned alarm:1; | |
045e0e85 DB |
104 | }; |
105 | ||
3760f736 JD |
106 | static const struct chip_desc chips[] = { |
107 | [ds_1307] = { | |
045e0e85 | 108 | .nvram56 = 1, |
3760f736 JD |
109 | }, |
110 | [ds_1337] = { | |
045e0e85 | 111 | .alarm = 1, |
3760f736 JD |
112 | }, |
113 | [ds_1338] = { | |
045e0e85 | 114 | .nvram56 = 1, |
3760f736 JD |
115 | }, |
116 | [ds_1339] = { | |
045e0e85 | 117 | .alarm = 1, |
3760f736 JD |
118 | }, |
119 | [ds_1340] = { | |
120 | }, | |
121 | [m41t00] = { | |
045e0e85 DB |
122 | }, }; |
123 | ||
3760f736 JD |
124 | static const struct i2c_device_id ds1307_id[] = { |
125 | { "ds1307", ds_1307 }, | |
126 | { "ds1337", ds_1337 }, | |
127 | { "ds1338", ds_1338 }, | |
128 | { "ds1339", ds_1339 }, | |
129 | { "ds1340", ds_1340 }, | |
130 | { "m41t00", m41t00 }, | |
131 | { } | |
132 | }; | |
133 | MODULE_DEVICE_TABLE(i2c, ds1307_id); | |
1abb0dc9 | 134 | |
cb49a5e9 RG |
135 | /*----------------------------------------------------------------------*/ |
136 | ||
137 | /* | |
138 | * The IRQ logic includes a "real" handler running in IRQ context just | |
139 | * long enough to schedule this workqueue entry. We need a task context | |
140 | * to talk to the RTC, since I2C I/O calls require that; and disable the | |
141 | * IRQ until we clear its status on the chip, so that this handler can | |
142 | * work with any type of triggering (not just falling edge). | |
143 | * | |
144 | * The ds1337 and ds1339 both have two alarms, but we only use the first | |
145 | * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm | |
146 | * signal; ds1339 chips have only one alarm signal. | |
147 | */ | |
148 | static void ds1307_work(struct work_struct *work) | |
149 | { | |
150 | struct ds1307 *ds1307; | |
151 | struct i2c_client *client; | |
152 | struct mutex *lock; | |
153 | int stat, control; | |
154 | ||
155 | ds1307 = container_of(work, struct ds1307, work); | |
156 | client = ds1307->client; | |
157 | lock = &ds1307->rtc->ops_lock; | |
158 | ||
159 | mutex_lock(lock); | |
160 | stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS); | |
161 | if (stat < 0) | |
162 | goto out; | |
163 | ||
164 | if (stat & DS1337_BIT_A1I) { | |
165 | stat &= ~DS1337_BIT_A1I; | |
166 | i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat); | |
167 | ||
168 | control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); | |
169 | if (control < 0) | |
170 | goto out; | |
171 | ||
172 | control &= ~DS1337_BIT_A1IE; | |
173 | i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control); | |
174 | ||
175 | /* rtc_update_irq() assumes that it is called | |
176 | * from IRQ-disabled context. | |
177 | */ | |
178 | local_irq_disable(); | |
179 | rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); | |
180 | local_irq_enable(); | |
181 | } | |
182 | ||
183 | out: | |
184 | if (test_bit(HAS_ALARM, &ds1307->flags)) | |
185 | enable_irq(client->irq); | |
186 | mutex_unlock(lock); | |
187 | } | |
188 | ||
189 | static irqreturn_t ds1307_irq(int irq, void *dev_id) | |
190 | { | |
191 | struct i2c_client *client = dev_id; | |
192 | struct ds1307 *ds1307 = i2c_get_clientdata(client); | |
193 | ||
194 | disable_irq_nosync(irq); | |
195 | schedule_work(&ds1307->work); | |
196 | return IRQ_HANDLED; | |
197 | } | |
198 | ||
199 | /*----------------------------------------------------------------------*/ | |
200 | ||
1abb0dc9 DB |
201 | static int ds1307_get_time(struct device *dev, struct rtc_time *t) |
202 | { | |
203 | struct ds1307 *ds1307 = dev_get_drvdata(dev); | |
204 | int tmp; | |
205 | ||
045e0e85 | 206 | /* read the RTC date and time registers all at once */ |
cb49a5e9 | 207 | ds1307->reg_addr = 0; |
1abb0dc9 DB |
208 | ds1307->msg[1].flags = I2C_M_RD; |
209 | ds1307->msg[1].len = 7; | |
210 | ||
045e0e85 DB |
211 | tmp = i2c_transfer(to_i2c_adapter(ds1307->client->dev.parent), |
212 | ds1307->msg, 2); | |
1abb0dc9 DB |
213 | if (tmp != 2) { |
214 | dev_err(dev, "%s error %d\n", "read", tmp); | |
215 | return -EIO; | |
216 | } | |
217 | ||
218 | dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", | |
219 | "read", | |
220 | ds1307->regs[0], ds1307->regs[1], | |
221 | ds1307->regs[2], ds1307->regs[3], | |
222 | ds1307->regs[4], ds1307->regs[5], | |
223 | ds1307->regs[6]); | |
224 | ||
225 | t->tm_sec = BCD2BIN(ds1307->regs[DS1307_REG_SECS] & 0x7f); | |
226 | t->tm_min = BCD2BIN(ds1307->regs[DS1307_REG_MIN] & 0x7f); | |
227 | tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f; | |
228 | t->tm_hour = BCD2BIN(tmp); | |
229 | t->tm_wday = BCD2BIN(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1; | |
230 | t->tm_mday = BCD2BIN(ds1307->regs[DS1307_REG_MDAY] & 0x3f); | |
231 | tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f; | |
232 | t->tm_mon = BCD2BIN(tmp) - 1; | |
233 | ||
234 | /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */ | |
235 | t->tm_year = BCD2BIN(ds1307->regs[DS1307_REG_YEAR]) + 100; | |
236 | ||
237 | dev_dbg(dev, "%s secs=%d, mins=%d, " | |
238 | "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", | |
239 | "read", t->tm_sec, t->tm_min, | |
240 | t->tm_hour, t->tm_mday, | |
241 | t->tm_mon, t->tm_year, t->tm_wday); | |
242 | ||
045e0e85 DB |
243 | /* initial clock setting can be undefined */ |
244 | return rtc_valid_tm(t); | |
1abb0dc9 DB |
245 | } |
246 | ||
247 | static int ds1307_set_time(struct device *dev, struct rtc_time *t) | |
248 | { | |
249 | struct ds1307 *ds1307 = dev_get_drvdata(dev); | |
250 | int result; | |
251 | int tmp; | |
252 | u8 *buf = ds1307->regs; | |
253 | ||
254 | dev_dbg(dev, "%s secs=%d, mins=%d, " | |
255 | "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", | |
11966adc JG |
256 | "write", t->tm_sec, t->tm_min, |
257 | t->tm_hour, t->tm_mday, | |
258 | t->tm_mon, t->tm_year, t->tm_wday); | |
1abb0dc9 DB |
259 | |
260 | *buf++ = 0; /* first register addr */ | |
261 | buf[DS1307_REG_SECS] = BIN2BCD(t->tm_sec); | |
262 | buf[DS1307_REG_MIN] = BIN2BCD(t->tm_min); | |
263 | buf[DS1307_REG_HOUR] = BIN2BCD(t->tm_hour); | |
264 | buf[DS1307_REG_WDAY] = BIN2BCD(t->tm_wday + 1); | |
265 | buf[DS1307_REG_MDAY] = BIN2BCD(t->tm_mday); | |
266 | buf[DS1307_REG_MONTH] = BIN2BCD(t->tm_mon + 1); | |
267 | ||
268 | /* assume 20YY not 19YY */ | |
269 | tmp = t->tm_year - 100; | |
270 | buf[DS1307_REG_YEAR] = BIN2BCD(tmp); | |
271 | ||
be5f59f4 RG |
272 | switch (ds1307->type) { |
273 | case ds_1337: | |
274 | case ds_1339: | |
1abb0dc9 | 275 | buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY; |
be5f59f4 RG |
276 | break; |
277 | case ds_1340: | |
1abb0dc9 DB |
278 | buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN |
279 | | DS1340_BIT_CENTURY; | |
be5f59f4 RG |
280 | break; |
281 | default: | |
282 | break; | |
283 | } | |
1abb0dc9 DB |
284 | |
285 | ds1307->msg[1].flags = 0; | |
286 | ds1307->msg[1].len = 8; | |
287 | ||
288 | dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", | |
289 | "write", buf[0], buf[1], buf[2], buf[3], | |
290 | buf[4], buf[5], buf[6]); | |
291 | ||
045e0e85 DB |
292 | result = i2c_transfer(to_i2c_adapter(ds1307->client->dev.parent), |
293 | &ds1307->msg[1], 1); | |
1abb0dc9 DB |
294 | if (result != 1) { |
295 | dev_err(dev, "%s error %d\n", "write", tmp); | |
296 | return -EIO; | |
297 | } | |
298 | return 0; | |
299 | } | |
300 | ||
cb49a5e9 RG |
301 | static int ds1307_read_alarm(struct device *dev, struct rtc_wkalrm *t) |
302 | { | |
303 | struct i2c_client *client = to_i2c_client(dev); | |
304 | struct ds1307 *ds1307 = i2c_get_clientdata(client); | |
305 | int ret; | |
306 | ||
307 | if (!test_bit(HAS_ALARM, &ds1307->flags)) | |
308 | return -EINVAL; | |
309 | ||
310 | /* read all ALARM1, ALARM2, and status registers at once */ | |
311 | ds1307->reg_addr = DS1339_REG_ALARM1_SECS; | |
312 | ds1307->msg[1].flags = I2C_M_RD; | |
313 | ds1307->msg[1].len = 9; | |
314 | ||
315 | ret = i2c_transfer(to_i2c_adapter(client->dev.parent), | |
316 | ds1307->msg, 2); | |
317 | if (ret != 2) { | |
318 | dev_err(dev, "%s error %d\n", "alarm read", ret); | |
319 | return -EIO; | |
320 | } | |
321 | ||
322 | dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", | |
323 | "alarm read", | |
324 | ds1307->regs[0], ds1307->regs[1], | |
325 | ds1307->regs[2], ds1307->regs[3], | |
326 | ds1307->regs[4], ds1307->regs[5], | |
327 | ds1307->regs[6], ds1307->regs[7], | |
328 | ds1307->regs[8]); | |
329 | ||
330 | /* report alarm time (ALARM1); assume 24 hour and day-of-month modes, | |
331 | * and that all four fields are checked matches | |
332 | */ | |
333 | t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f); | |
334 | t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f); | |
335 | t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f); | |
336 | t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f); | |
337 | t->time.tm_mon = -1; | |
338 | t->time.tm_year = -1; | |
339 | t->time.tm_wday = -1; | |
340 | t->time.tm_yday = -1; | |
341 | t->time.tm_isdst = -1; | |
342 | ||
343 | /* ... and status */ | |
344 | t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE); | |
345 | t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I); | |
346 | ||
347 | dev_dbg(dev, "%s secs=%d, mins=%d, " | |
348 | "hours=%d, mday=%d, enabled=%d, pending=%d\n", | |
349 | "alarm read", t->time.tm_sec, t->time.tm_min, | |
350 | t->time.tm_hour, t->time.tm_mday, | |
351 | t->enabled, t->pending); | |
352 | ||
353 | return 0; | |
354 | } | |
355 | ||
356 | static int ds1307_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |
357 | { | |
358 | struct i2c_client *client = to_i2c_client(dev); | |
359 | struct ds1307 *ds1307 = i2c_get_clientdata(client); | |
360 | unsigned char *buf = ds1307->regs; | |
361 | u8 control, status; | |
362 | int ret; | |
363 | ||
364 | if (!test_bit(HAS_ALARM, &ds1307->flags)) | |
365 | return -EINVAL; | |
366 | ||
367 | dev_dbg(dev, "%s secs=%d, mins=%d, " | |
368 | "hours=%d, mday=%d, enabled=%d, pending=%d\n", | |
369 | "alarm set", t->time.tm_sec, t->time.tm_min, | |
370 | t->time.tm_hour, t->time.tm_mday, | |
371 | t->enabled, t->pending); | |
372 | ||
373 | /* read current status of both alarms and the chip */ | |
374 | ds1307->reg_addr = DS1339_REG_ALARM1_SECS; | |
375 | ds1307->msg[1].flags = I2C_M_RD; | |
376 | ds1307->msg[1].len = 9; | |
377 | ||
378 | ret = i2c_transfer(to_i2c_adapter(client->dev.parent), | |
379 | ds1307->msg, 2); | |
380 | if (ret != 2) { | |
381 | dev_err(dev, "%s error %d\n", "alarm write", ret); | |
382 | return -EIO; | |
383 | } | |
384 | control = ds1307->regs[7]; | |
385 | status = ds1307->regs[8]; | |
386 | ||
387 | dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", | |
388 | "alarm set (old status)", | |
389 | ds1307->regs[0], ds1307->regs[1], | |
390 | ds1307->regs[2], ds1307->regs[3], | |
391 | ds1307->regs[4], ds1307->regs[5], | |
392 | ds1307->regs[6], control, status); | |
393 | ||
394 | /* set ALARM1, using 24 hour and day-of-month modes */ | |
395 | *buf++ = DS1339_REG_ALARM1_SECS; /* first register addr */ | |
396 | buf[0] = bin2bcd(t->time.tm_sec); | |
397 | buf[1] = bin2bcd(t->time.tm_min); | |
398 | buf[2] = bin2bcd(t->time.tm_hour); | |
399 | buf[3] = bin2bcd(t->time.tm_mday); | |
400 | ||
401 | /* set ALARM2 to non-garbage */ | |
402 | buf[4] = 0; | |
403 | buf[5] = 0; | |
404 | buf[6] = 0; | |
405 | ||
406 | /* optionally enable ALARM1 */ | |
407 | buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE); | |
408 | if (t->enabled) { | |
409 | dev_dbg(dev, "alarm IRQ armed\n"); | |
410 | buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */ | |
411 | } | |
412 | buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I); | |
413 | ||
414 | ds1307->msg[1].flags = 0; | |
415 | ds1307->msg[1].len = 10; | |
416 | ||
417 | ret = i2c_transfer(to_i2c_adapter(client->dev.parent), | |
418 | &ds1307->msg[1], 1); | |
419 | if (ret != 1) { | |
420 | dev_err(dev, "can't set alarm time\n"); | |
421 | return -EIO; | |
422 | } | |
423 | ||
424 | return 0; | |
425 | } | |
426 | ||
427 | static int ds1307_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |
428 | { | |
429 | struct i2c_client *client = to_i2c_client(dev); | |
430 | struct ds1307 *ds1307 = i2c_get_clientdata(client); | |
431 | int ret; | |
432 | ||
433 | switch (cmd) { | |
434 | case RTC_AIE_OFF: | |
435 | if (!test_bit(HAS_ALARM, &ds1307->flags)) | |
436 | return -ENOTTY; | |
437 | ||
438 | ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); | |
439 | if (ret < 0) | |
440 | return ret; | |
441 | ||
442 | ret &= ~DS1337_BIT_A1IE; | |
443 | ||
444 | ret = i2c_smbus_write_byte_data(client, | |
445 | DS1337_REG_CONTROL, ret); | |
446 | if (ret < 0) | |
447 | return ret; | |
448 | ||
449 | break; | |
450 | ||
451 | case RTC_AIE_ON: | |
452 | if (!test_bit(HAS_ALARM, &ds1307->flags)) | |
453 | return -ENOTTY; | |
454 | ||
455 | ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); | |
456 | if (ret < 0) | |
457 | return ret; | |
458 | ||
459 | ret |= DS1337_BIT_A1IE; | |
460 | ||
461 | ret = i2c_smbus_write_byte_data(client, | |
462 | DS1337_REG_CONTROL, ret); | |
463 | if (ret < 0) | |
464 | return ret; | |
465 | ||
466 | break; | |
467 | ||
468 | default: | |
469 | return -ENOIOCTLCMD; | |
470 | } | |
471 | ||
472 | return 0; | |
473 | } | |
474 | ||
ff8371ac | 475 | static const struct rtc_class_ops ds13xx_rtc_ops = { |
1abb0dc9 DB |
476 | .read_time = ds1307_get_time, |
477 | .set_time = ds1307_set_time, | |
cb49a5e9 RG |
478 | .read_alarm = ds1307_read_alarm, |
479 | .set_alarm = ds1307_set_alarm, | |
480 | .ioctl = ds1307_ioctl, | |
1abb0dc9 DB |
481 | }; |
482 | ||
682d73f6 DB |
483 | /*----------------------------------------------------------------------*/ |
484 | ||
485 | #define NVRAM_SIZE 56 | |
486 | ||
487 | static ssize_t | |
488 | ds1307_nvram_read(struct kobject *kobj, struct bin_attribute *attr, | |
489 | char *buf, loff_t off, size_t count) | |
490 | { | |
491 | struct i2c_client *client; | |
492 | struct ds1307 *ds1307; | |
493 | struct i2c_msg msg[2]; | |
494 | int result; | |
495 | ||
fcd8db00 | 496 | client = kobj_to_i2c_client(kobj); |
682d73f6 DB |
497 | ds1307 = i2c_get_clientdata(client); |
498 | ||
499 | if (unlikely(off >= NVRAM_SIZE)) | |
500 | return 0; | |
501 | if ((off + count) > NVRAM_SIZE) | |
502 | count = NVRAM_SIZE - off; | |
503 | if (unlikely(!count)) | |
504 | return count; | |
505 | ||
506 | msg[0].addr = client->addr; | |
507 | msg[0].flags = 0; | |
508 | msg[0].len = 1; | |
509 | msg[0].buf = buf; | |
510 | ||
511 | buf[0] = 8 + off; | |
512 | ||
513 | msg[1].addr = client->addr; | |
514 | msg[1].flags = I2C_M_RD; | |
515 | msg[1].len = count; | |
516 | msg[1].buf = buf; | |
517 | ||
518 | result = i2c_transfer(to_i2c_adapter(client->dev.parent), msg, 2); | |
519 | if (result != 2) { | |
520 | dev_err(&client->dev, "%s error %d\n", "nvram read", result); | |
521 | return -EIO; | |
522 | } | |
523 | return count; | |
524 | } | |
525 | ||
526 | static ssize_t | |
527 | ds1307_nvram_write(struct kobject *kobj, struct bin_attribute *attr, | |
528 | char *buf, loff_t off, size_t count) | |
529 | { | |
530 | struct i2c_client *client; | |
531 | u8 buffer[NVRAM_SIZE + 1]; | |
532 | int ret; | |
533 | ||
fcd8db00 | 534 | client = kobj_to_i2c_client(kobj); |
682d73f6 DB |
535 | |
536 | if (unlikely(off >= NVRAM_SIZE)) | |
537 | return -EFBIG; | |
538 | if ((off + count) > NVRAM_SIZE) | |
539 | count = NVRAM_SIZE - off; | |
540 | if (unlikely(!count)) | |
541 | return count; | |
542 | ||
543 | buffer[0] = 8 + off; | |
544 | memcpy(buffer + 1, buf, count); | |
545 | ||
546 | ret = i2c_master_send(client, buffer, count + 1); | |
547 | return (ret < 0) ? ret : (ret - 1); | |
548 | } | |
549 | ||
550 | static struct bin_attribute nvram = { | |
551 | .attr = { | |
552 | .name = "nvram", | |
553 | .mode = S_IRUGO | S_IWUSR, | |
554 | .owner = THIS_MODULE, | |
555 | }, | |
556 | ||
557 | .read = ds1307_nvram_read, | |
558 | .write = ds1307_nvram_write, | |
559 | .size = NVRAM_SIZE, | |
560 | }; | |
561 | ||
562 | /*----------------------------------------------------------------------*/ | |
563 | ||
1abb0dc9 DB |
564 | static struct i2c_driver ds1307_driver; |
565 | ||
d2653e92 JD |
566 | static int __devinit ds1307_probe(struct i2c_client *client, |
567 | const struct i2c_device_id *id) | |
1abb0dc9 DB |
568 | { |
569 | struct ds1307 *ds1307; | |
570 | int err = -ENODEV; | |
1abb0dc9 | 571 | int tmp; |
3760f736 | 572 | const struct chip_desc *chip = &chips[id->driver_data]; |
c065f35c | 573 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); |
cb49a5e9 | 574 | int want_irq = false; |
1abb0dc9 | 575 | |
c065f35c DB |
576 | if (!i2c_check_functionality(adapter, |
577 | I2C_FUNC_I2C | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) | |
578 | return -EIO; | |
579 | ||
580 | if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL))) | |
581 | return -ENOMEM; | |
045e0e85 DB |
582 | |
583 | ds1307->client = client; | |
1abb0dc9 DB |
584 | i2c_set_clientdata(client, ds1307); |
585 | ||
586 | ds1307->msg[0].addr = client->addr; | |
587 | ds1307->msg[0].flags = 0; | |
588 | ds1307->msg[0].len = 1; | |
589 | ds1307->msg[0].buf = &ds1307->reg_addr; | |
590 | ||
591 | ds1307->msg[1].addr = client->addr; | |
592 | ds1307->msg[1].flags = I2C_M_RD; | |
593 | ds1307->msg[1].len = sizeof(ds1307->regs); | |
594 | ds1307->msg[1].buf = ds1307->regs; | |
595 | ||
3760f736 | 596 | ds1307->type = id->driver_data; |
045e0e85 DB |
597 | |
598 | switch (ds1307->type) { | |
599 | case ds_1337: | |
600 | case ds_1339: | |
cb49a5e9 RG |
601 | /* has IRQ? */ |
602 | if (ds1307->client->irq > 0 && chip->alarm) { | |
603 | INIT_WORK(&ds1307->work, ds1307_work); | |
604 | want_irq = true; | |
605 | } | |
606 | ||
1abb0dc9 DB |
607 | ds1307->reg_addr = DS1337_REG_CONTROL; |
608 | ds1307->msg[1].len = 2; | |
609 | ||
be5f59f4 | 610 | /* get registers that the "rtc" read below won't read... */ |
045e0e85 | 611 | tmp = i2c_transfer(adapter, ds1307->msg, 2); |
1abb0dc9 DB |
612 | if (tmp != 2) { |
613 | pr_debug("read error %d\n", tmp); | |
614 | err = -EIO; | |
615 | goto exit_free; | |
616 | } | |
617 | ||
618 | ds1307->reg_addr = 0; | |
619 | ds1307->msg[1].len = sizeof(ds1307->regs); | |
620 | ||
be5f59f4 RG |
621 | /* oscillator off? turn it on, so clock can tick. */ |
622 | if (ds1307->regs[0] & DS1337_BIT_nEOSC) | |
cb49a5e9 RG |
623 | ds1307->regs[0] &= ~DS1337_BIT_nEOSC; |
624 | ||
625 | /* Using IRQ? Disable the square wave and both alarms. | |
626 | * For ds1339, be sure alarms can trigger when we're | |
627 | * running on Vbackup (BBSQI); we assume ds1337 will | |
628 | * ignore that bit | |
629 | */ | |
630 | if (want_irq) { | |
631 | ds1307->regs[0] |= DS1337_BIT_INTCN | DS1339_BIT_BBSQI; | |
632 | ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE); | |
633 | } | |
634 | ||
635 | i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, | |
636 | ds1307->regs[0]); | |
be5f59f4 RG |
637 | |
638 | /* oscillator fault? clear flag, and warn */ | |
639 | if (ds1307->regs[1] & DS1337_BIT_OSF) { | |
640 | i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, | |
641 | ds1307->regs[1] & ~DS1337_BIT_OSF); | |
642 | dev_warn(&client->dev, "SET TIME!\n"); | |
1abb0dc9 | 643 | } |
045e0e85 DB |
644 | break; |
645 | default: | |
646 | break; | |
647 | } | |
1abb0dc9 DB |
648 | |
649 | read_rtc: | |
650 | /* read RTC registers */ | |
651 | ||
045e0e85 | 652 | tmp = i2c_transfer(adapter, ds1307->msg, 2); |
1abb0dc9 DB |
653 | if (tmp != 2) { |
654 | pr_debug("read error %d\n", tmp); | |
655 | err = -EIO; | |
656 | goto exit_free; | |
657 | } | |
658 | ||
659 | /* minimal sanity checking; some chips (like DS1340) don't | |
660 | * specify the extra bits as must-be-zero, but there are | |
661 | * still a few values that are clearly out-of-range. | |
662 | */ | |
663 | tmp = ds1307->regs[DS1307_REG_SECS]; | |
045e0e85 DB |
664 | switch (ds1307->type) { |
665 | case ds_1307: | |
045e0e85 | 666 | case m41t00: |
be5f59f4 | 667 | /* clock halted? turn it on, so clock can tick. */ |
045e0e85 | 668 | if (tmp & DS1307_BIT_CH) { |
be5f59f4 RG |
669 | i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); |
670 | dev_warn(&client->dev, "SET TIME!\n"); | |
045e0e85 | 671 | goto read_rtc; |
1abb0dc9 | 672 | } |
045e0e85 | 673 | break; |
be5f59f4 RG |
674 | case ds_1338: |
675 | /* clock halted? turn it on, so clock can tick. */ | |
045e0e85 | 676 | if (tmp & DS1307_BIT_CH) |
be5f59f4 RG |
677 | i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); |
678 | ||
679 | /* oscillator fault? clear flag, and warn */ | |
680 | if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) { | |
681 | i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL, | |
bd16f9eb | 682 | ds1307->regs[DS1307_REG_CONTROL] |
be5f59f4 RG |
683 | & ~DS1338_BIT_OSF); |
684 | dev_warn(&client->dev, "SET TIME!\n"); | |
685 | goto read_rtc; | |
686 | } | |
045e0e85 | 687 | break; |
fcd8db00 R |
688 | case ds_1340: |
689 | /* clock halted? turn it on, so clock can tick. */ | |
690 | if (tmp & DS1340_BIT_nEOSC) | |
691 | i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); | |
692 | ||
693 | tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG); | |
694 | if (tmp < 0) { | |
695 | pr_debug("read error %d\n", tmp); | |
696 | err = -EIO; | |
697 | goto exit_free; | |
698 | } | |
699 | ||
700 | /* oscillator fault? clear flag, and warn */ | |
701 | if (tmp & DS1340_BIT_OSF) { | |
702 | i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0); | |
703 | dev_warn(&client->dev, "SET TIME!\n"); | |
704 | } | |
705 | break; | |
c065f35c DB |
706 | case ds_1337: |
707 | case ds_1339: | |
045e0e85 | 708 | break; |
1abb0dc9 | 709 | } |
045e0e85 DB |
710 | |
711 | tmp = ds1307->regs[DS1307_REG_SECS]; | |
1abb0dc9 DB |
712 | tmp = BCD2BIN(tmp & 0x7f); |
713 | if (tmp > 60) | |
c065f35c | 714 | goto exit_bad; |
1abb0dc9 DB |
715 | tmp = BCD2BIN(ds1307->regs[DS1307_REG_MIN] & 0x7f); |
716 | if (tmp > 60) | |
c065f35c | 717 | goto exit_bad; |
1abb0dc9 DB |
718 | |
719 | tmp = BCD2BIN(ds1307->regs[DS1307_REG_MDAY] & 0x3f); | |
720 | if (tmp == 0 || tmp > 31) | |
c065f35c | 721 | goto exit_bad; |
1abb0dc9 DB |
722 | |
723 | tmp = BCD2BIN(ds1307->regs[DS1307_REG_MONTH] & 0x1f); | |
724 | if (tmp == 0 || tmp > 12) | |
c065f35c | 725 | goto exit_bad; |
1abb0dc9 | 726 | |
1abb0dc9 | 727 | tmp = ds1307->regs[DS1307_REG_HOUR]; |
c065f35c DB |
728 | switch (ds1307->type) { |
729 | case ds_1340: | |
730 | case m41t00: | |
731 | /* NOTE: ignores century bits; fix before deploying | |
732 | * systems that will run through year 2100. | |
733 | */ | |
734 | break; | |
735 | default: | |
736 | if (!(tmp & DS1307_BIT_12HR)) | |
737 | break; | |
738 | ||
739 | /* Be sure we're in 24 hour mode. Multi-master systems | |
740 | * take note... | |
741 | */ | |
742 | tmp = BCD2BIN(tmp & 0x1f); | |
743 | if (tmp == 12) | |
744 | tmp = 0; | |
745 | if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) | |
746 | tmp += 12; | |
1abb0dc9 DB |
747 | i2c_smbus_write_byte_data(client, |
748 | DS1307_REG_HOUR, | |
749 | BIN2BCD(tmp)); | |
750 | } | |
751 | ||
1abb0dc9 DB |
752 | ds1307->rtc = rtc_device_register(client->name, &client->dev, |
753 | &ds13xx_rtc_ops, THIS_MODULE); | |
754 | if (IS_ERR(ds1307->rtc)) { | |
755 | err = PTR_ERR(ds1307->rtc); | |
756 | dev_err(&client->dev, | |
757 | "unable to register the class device\n"); | |
c065f35c | 758 | goto exit_free; |
1abb0dc9 DB |
759 | } |
760 | ||
cb49a5e9 RG |
761 | if (want_irq) { |
762 | err = request_irq(client->irq, ds1307_irq, 0, | |
763 | ds1307->rtc->name, client); | |
764 | if (err) { | |
765 | dev_err(&client->dev, | |
766 | "unable to request IRQ!\n"); | |
767 | goto exit_irq; | |
768 | } | |
769 | set_bit(HAS_ALARM, &ds1307->flags); | |
770 | dev_dbg(&client->dev, "got IRQ %d\n", client->irq); | |
771 | } | |
772 | ||
682d73f6 DB |
773 | if (chip->nvram56) { |
774 | err = sysfs_create_bin_file(&client->dev.kobj, &nvram); | |
775 | if (err == 0) { | |
cb49a5e9 | 776 | set_bit(HAS_NVRAM, &ds1307->flags); |
682d73f6 DB |
777 | dev_info(&client->dev, "56 bytes nvram\n"); |
778 | } | |
779 | } | |
780 | ||
1abb0dc9 DB |
781 | return 0; |
782 | ||
c065f35c DB |
783 | exit_bad: |
784 | dev_dbg(&client->dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", | |
785 | "bogus register", | |
786 | ds1307->regs[0], ds1307->regs[1], | |
787 | ds1307->regs[2], ds1307->regs[3], | |
788 | ds1307->regs[4], ds1307->regs[5], | |
789 | ds1307->regs[6]); | |
cb49a5e9 RG |
790 | exit_irq: |
791 | if (ds1307->rtc) | |
792 | rtc_device_unregister(ds1307->rtc); | |
1abb0dc9 DB |
793 | exit_free: |
794 | kfree(ds1307); | |
1abb0dc9 DB |
795 | return err; |
796 | } | |
797 | ||
c065f35c | 798 | static int __devexit ds1307_remove(struct i2c_client *client) |
1abb0dc9 | 799 | { |
cb49a5e9 RG |
800 | struct ds1307 *ds1307 = i2c_get_clientdata(client); |
801 | ||
802 | if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) { | |
803 | free_irq(client->irq, client); | |
804 | cancel_work_sync(&ds1307->work); | |
805 | } | |
1abb0dc9 | 806 | |
cb49a5e9 | 807 | if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags)) |
682d73f6 DB |
808 | sysfs_remove_bin_file(&client->dev.kobj, &nvram); |
809 | ||
1abb0dc9 | 810 | rtc_device_unregister(ds1307->rtc); |
1abb0dc9 DB |
811 | kfree(ds1307); |
812 | return 0; | |
813 | } | |
814 | ||
815 | static struct i2c_driver ds1307_driver = { | |
816 | .driver = { | |
c065f35c | 817 | .name = "rtc-ds1307", |
1abb0dc9 DB |
818 | .owner = THIS_MODULE, |
819 | }, | |
c065f35c DB |
820 | .probe = ds1307_probe, |
821 | .remove = __devexit_p(ds1307_remove), | |
3760f736 | 822 | .id_table = ds1307_id, |
1abb0dc9 DB |
823 | }; |
824 | ||
825 | static int __init ds1307_init(void) | |
826 | { | |
827 | return i2c_add_driver(&ds1307_driver); | |
828 | } | |
829 | module_init(ds1307_init); | |
830 | ||
831 | static void __exit ds1307_exit(void) | |
832 | { | |
833 | i2c_del_driver(&ds1307_driver); | |
834 | } | |
835 | module_exit(ds1307_exit); | |
836 | ||
837 | MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips"); | |
838 | MODULE_LICENSE("GPL"); |