Commit | Line | Data |
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1abb0dc9 DB |
1 | /* |
2 | * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips. | |
3 | * | |
4 | * Copyright (C) 2005 James Chapman (ds1337 core) | |
5 | * Copyright (C) 2006 David Brownell | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/slab.h> | |
15 | #include <linux/i2c.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/rtc.h> | |
18 | #include <linux/bcd.h> | |
19 | ||
20 | ||
21 | ||
22 | /* We can't determine type by probing, but if we expect pre-Linux code | |
23 | * to have set the chip up as a clock (turning on the oscillator and | |
24 | * setting the date and time), Linux can ignore the non-clock features. | |
25 | * That's a natural job for a factory or repair bench. | |
26 | * | |
045e0e85 DB |
27 | * This is currently a simple no-alarms driver. If your board has the |
28 | * alarm irq wired up on a ds1337 or ds1339, and you want to use that, | |
29 | * then look at the rtc-rs5c372 driver for code to steal... | |
1abb0dc9 DB |
30 | */ |
31 | enum ds_type { | |
045e0e85 DB |
32 | ds_1307, |
33 | ds_1337, | |
34 | ds_1338, | |
35 | ds_1339, | |
36 | ds_1340, | |
37 | m41t00, | |
1abb0dc9 DB |
38 | // rs5c372 too? different address... |
39 | }; | |
40 | ||
1abb0dc9 DB |
41 | |
42 | /* RTC registers don't differ much, except for the century flag */ | |
43 | #define DS1307_REG_SECS 0x00 /* 00-59 */ | |
44 | # define DS1307_BIT_CH 0x80 | |
be5f59f4 | 45 | # define DS1340_BIT_nEOSC 0x80 |
1abb0dc9 DB |
46 | #define DS1307_REG_MIN 0x01 /* 00-59 */ |
47 | #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */ | |
c065f35c DB |
48 | # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */ |
49 | # define DS1307_BIT_PM 0x20 /* in REG_HOUR */ | |
1abb0dc9 DB |
50 | # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */ |
51 | # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */ | |
52 | #define DS1307_REG_WDAY 0x03 /* 01-07 */ | |
53 | #define DS1307_REG_MDAY 0x04 /* 01-31 */ | |
54 | #define DS1307_REG_MONTH 0x05 /* 01-12 */ | |
55 | # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */ | |
56 | #define DS1307_REG_YEAR 0x06 /* 00-99 */ | |
57 | ||
58 | /* Other registers (control, status, alarms, trickle charge, NVRAM, etc) | |
045e0e85 DB |
59 | * start at 7, and they differ a LOT. Only control and status matter for |
60 | * basic RTC date and time functionality; be careful using them. | |
1abb0dc9 | 61 | */ |
045e0e85 | 62 | #define DS1307_REG_CONTROL 0x07 /* or ds1338 */ |
1abb0dc9 | 63 | # define DS1307_BIT_OUT 0x80 |
be5f59f4 | 64 | # define DS1338_BIT_OSF 0x20 |
1abb0dc9 DB |
65 | # define DS1307_BIT_SQWE 0x10 |
66 | # define DS1307_BIT_RS1 0x02 | |
67 | # define DS1307_BIT_RS0 0x01 | |
68 | #define DS1337_REG_CONTROL 0x0e | |
69 | # define DS1337_BIT_nEOSC 0x80 | |
70 | # define DS1337_BIT_RS2 0x10 | |
71 | # define DS1337_BIT_RS1 0x08 | |
72 | # define DS1337_BIT_INTCN 0x04 | |
73 | # define DS1337_BIT_A2IE 0x02 | |
74 | # define DS1337_BIT_A1IE 0x01 | |
045e0e85 DB |
75 | #define DS1340_REG_CONTROL 0x07 |
76 | # define DS1340_BIT_OUT 0x80 | |
77 | # define DS1340_BIT_FT 0x40 | |
78 | # define DS1340_BIT_CALIB_SIGN 0x20 | |
79 | # define DS1340_M_CALIBRATION 0x1f | |
be5f59f4 RG |
80 | #define DS1340_REG_FLAG 0x09 |
81 | # define DS1340_BIT_OSF 0x80 | |
1abb0dc9 DB |
82 | #define DS1337_REG_STATUS 0x0f |
83 | # define DS1337_BIT_OSF 0x80 | |
84 | # define DS1337_BIT_A2I 0x02 | |
85 | # define DS1337_BIT_A1I 0x01 | |
86 | #define DS1339_REG_TRICKLE 0x10 | |
87 | ||
88 | ||
89 | ||
90 | struct ds1307 { | |
91 | u8 reg_addr; | |
682d73f6 | 92 | bool has_nvram; |
1abb0dc9 DB |
93 | u8 regs[8]; |
94 | enum ds_type type; | |
95 | struct i2c_msg msg[2]; | |
045e0e85 DB |
96 | struct i2c_client *client; |
97 | struct i2c_client dev; | |
1abb0dc9 DB |
98 | struct rtc_device *rtc; |
99 | }; | |
100 | ||
045e0e85 DB |
101 | struct chip_desc { |
102 | char name[9]; | |
103 | unsigned nvram56:1; | |
104 | unsigned alarm:1; | |
105 | enum ds_type type; | |
106 | }; | |
107 | ||
108 | static const struct chip_desc chips[] = { { | |
109 | .name = "ds1307", | |
110 | .type = ds_1307, | |
111 | .nvram56 = 1, | |
112 | }, { | |
113 | .name = "ds1337", | |
114 | .type = ds_1337, | |
115 | .alarm = 1, | |
116 | }, { | |
117 | .name = "ds1338", | |
118 | .type = ds_1338, | |
119 | .nvram56 = 1, | |
120 | }, { | |
121 | .name = "ds1339", | |
122 | .type = ds_1339, | |
123 | .alarm = 1, | |
124 | }, { | |
125 | .name = "ds1340", | |
126 | .type = ds_1340, | |
127 | }, { | |
128 | .name = "m41t00", | |
129 | .type = m41t00, | |
130 | }, }; | |
131 | ||
132 | static inline const struct chip_desc *find_chip(const char *s) | |
133 | { | |
134 | unsigned i; | |
135 | ||
136 | for (i = 0; i < ARRAY_SIZE(chips); i++) | |
137 | if (strnicmp(s, chips[i].name, sizeof chips[i].name) == 0) | |
138 | return &chips[i]; | |
139 | return NULL; | |
140 | } | |
1abb0dc9 DB |
141 | |
142 | static int ds1307_get_time(struct device *dev, struct rtc_time *t) | |
143 | { | |
144 | struct ds1307 *ds1307 = dev_get_drvdata(dev); | |
145 | int tmp; | |
146 | ||
045e0e85 | 147 | /* read the RTC date and time registers all at once */ |
1abb0dc9 DB |
148 | ds1307->msg[1].flags = I2C_M_RD; |
149 | ds1307->msg[1].len = 7; | |
150 | ||
045e0e85 DB |
151 | tmp = i2c_transfer(to_i2c_adapter(ds1307->client->dev.parent), |
152 | ds1307->msg, 2); | |
1abb0dc9 DB |
153 | if (tmp != 2) { |
154 | dev_err(dev, "%s error %d\n", "read", tmp); | |
155 | return -EIO; | |
156 | } | |
157 | ||
158 | dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", | |
159 | "read", | |
160 | ds1307->regs[0], ds1307->regs[1], | |
161 | ds1307->regs[2], ds1307->regs[3], | |
162 | ds1307->regs[4], ds1307->regs[5], | |
163 | ds1307->regs[6]); | |
164 | ||
165 | t->tm_sec = BCD2BIN(ds1307->regs[DS1307_REG_SECS] & 0x7f); | |
166 | t->tm_min = BCD2BIN(ds1307->regs[DS1307_REG_MIN] & 0x7f); | |
167 | tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f; | |
168 | t->tm_hour = BCD2BIN(tmp); | |
169 | t->tm_wday = BCD2BIN(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1; | |
170 | t->tm_mday = BCD2BIN(ds1307->regs[DS1307_REG_MDAY] & 0x3f); | |
171 | tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f; | |
172 | t->tm_mon = BCD2BIN(tmp) - 1; | |
173 | ||
174 | /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */ | |
175 | t->tm_year = BCD2BIN(ds1307->regs[DS1307_REG_YEAR]) + 100; | |
176 | ||
177 | dev_dbg(dev, "%s secs=%d, mins=%d, " | |
178 | "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", | |
179 | "read", t->tm_sec, t->tm_min, | |
180 | t->tm_hour, t->tm_mday, | |
181 | t->tm_mon, t->tm_year, t->tm_wday); | |
182 | ||
045e0e85 DB |
183 | /* initial clock setting can be undefined */ |
184 | return rtc_valid_tm(t); | |
1abb0dc9 DB |
185 | } |
186 | ||
187 | static int ds1307_set_time(struct device *dev, struct rtc_time *t) | |
188 | { | |
189 | struct ds1307 *ds1307 = dev_get_drvdata(dev); | |
190 | int result; | |
191 | int tmp; | |
192 | u8 *buf = ds1307->regs; | |
193 | ||
194 | dev_dbg(dev, "%s secs=%d, mins=%d, " | |
195 | "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", | |
11966adc JG |
196 | "write", t->tm_sec, t->tm_min, |
197 | t->tm_hour, t->tm_mday, | |
198 | t->tm_mon, t->tm_year, t->tm_wday); | |
1abb0dc9 DB |
199 | |
200 | *buf++ = 0; /* first register addr */ | |
201 | buf[DS1307_REG_SECS] = BIN2BCD(t->tm_sec); | |
202 | buf[DS1307_REG_MIN] = BIN2BCD(t->tm_min); | |
203 | buf[DS1307_REG_HOUR] = BIN2BCD(t->tm_hour); | |
204 | buf[DS1307_REG_WDAY] = BIN2BCD(t->tm_wday + 1); | |
205 | buf[DS1307_REG_MDAY] = BIN2BCD(t->tm_mday); | |
206 | buf[DS1307_REG_MONTH] = BIN2BCD(t->tm_mon + 1); | |
207 | ||
208 | /* assume 20YY not 19YY */ | |
209 | tmp = t->tm_year - 100; | |
210 | buf[DS1307_REG_YEAR] = BIN2BCD(tmp); | |
211 | ||
be5f59f4 RG |
212 | switch (ds1307->type) { |
213 | case ds_1337: | |
214 | case ds_1339: | |
1abb0dc9 | 215 | buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY; |
be5f59f4 RG |
216 | break; |
217 | case ds_1340: | |
1abb0dc9 DB |
218 | buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN |
219 | | DS1340_BIT_CENTURY; | |
be5f59f4 RG |
220 | break; |
221 | default: | |
222 | break; | |
223 | } | |
1abb0dc9 DB |
224 | |
225 | ds1307->msg[1].flags = 0; | |
226 | ds1307->msg[1].len = 8; | |
227 | ||
228 | dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", | |
229 | "write", buf[0], buf[1], buf[2], buf[3], | |
230 | buf[4], buf[5], buf[6]); | |
231 | ||
045e0e85 DB |
232 | result = i2c_transfer(to_i2c_adapter(ds1307->client->dev.parent), |
233 | &ds1307->msg[1], 1); | |
1abb0dc9 DB |
234 | if (result != 1) { |
235 | dev_err(dev, "%s error %d\n", "write", tmp); | |
236 | return -EIO; | |
237 | } | |
238 | return 0; | |
239 | } | |
240 | ||
ff8371ac | 241 | static const struct rtc_class_ops ds13xx_rtc_ops = { |
1abb0dc9 DB |
242 | .read_time = ds1307_get_time, |
243 | .set_time = ds1307_set_time, | |
244 | }; | |
245 | ||
682d73f6 DB |
246 | /*----------------------------------------------------------------------*/ |
247 | ||
248 | #define NVRAM_SIZE 56 | |
249 | ||
250 | static ssize_t | |
251 | ds1307_nvram_read(struct kobject *kobj, struct bin_attribute *attr, | |
252 | char *buf, loff_t off, size_t count) | |
253 | { | |
254 | struct i2c_client *client; | |
255 | struct ds1307 *ds1307; | |
256 | struct i2c_msg msg[2]; | |
257 | int result; | |
258 | ||
fcd8db00 | 259 | client = kobj_to_i2c_client(kobj); |
682d73f6 DB |
260 | ds1307 = i2c_get_clientdata(client); |
261 | ||
262 | if (unlikely(off >= NVRAM_SIZE)) | |
263 | return 0; | |
264 | if ((off + count) > NVRAM_SIZE) | |
265 | count = NVRAM_SIZE - off; | |
266 | if (unlikely(!count)) | |
267 | return count; | |
268 | ||
269 | msg[0].addr = client->addr; | |
270 | msg[0].flags = 0; | |
271 | msg[0].len = 1; | |
272 | msg[0].buf = buf; | |
273 | ||
274 | buf[0] = 8 + off; | |
275 | ||
276 | msg[1].addr = client->addr; | |
277 | msg[1].flags = I2C_M_RD; | |
278 | msg[1].len = count; | |
279 | msg[1].buf = buf; | |
280 | ||
281 | result = i2c_transfer(to_i2c_adapter(client->dev.parent), msg, 2); | |
282 | if (result != 2) { | |
283 | dev_err(&client->dev, "%s error %d\n", "nvram read", result); | |
284 | return -EIO; | |
285 | } | |
286 | return count; | |
287 | } | |
288 | ||
289 | static ssize_t | |
290 | ds1307_nvram_write(struct kobject *kobj, struct bin_attribute *attr, | |
291 | char *buf, loff_t off, size_t count) | |
292 | { | |
293 | struct i2c_client *client; | |
294 | u8 buffer[NVRAM_SIZE + 1]; | |
295 | int ret; | |
296 | ||
fcd8db00 | 297 | client = kobj_to_i2c_client(kobj); |
682d73f6 DB |
298 | |
299 | if (unlikely(off >= NVRAM_SIZE)) | |
300 | return -EFBIG; | |
301 | if ((off + count) > NVRAM_SIZE) | |
302 | count = NVRAM_SIZE - off; | |
303 | if (unlikely(!count)) | |
304 | return count; | |
305 | ||
306 | buffer[0] = 8 + off; | |
307 | memcpy(buffer + 1, buf, count); | |
308 | ||
309 | ret = i2c_master_send(client, buffer, count + 1); | |
310 | return (ret < 0) ? ret : (ret - 1); | |
311 | } | |
312 | ||
313 | static struct bin_attribute nvram = { | |
314 | .attr = { | |
315 | .name = "nvram", | |
316 | .mode = S_IRUGO | S_IWUSR, | |
317 | .owner = THIS_MODULE, | |
318 | }, | |
319 | ||
320 | .read = ds1307_nvram_read, | |
321 | .write = ds1307_nvram_write, | |
322 | .size = NVRAM_SIZE, | |
323 | }; | |
324 | ||
325 | /*----------------------------------------------------------------------*/ | |
326 | ||
1abb0dc9 DB |
327 | static struct i2c_driver ds1307_driver; |
328 | ||
c065f35c | 329 | static int __devinit ds1307_probe(struct i2c_client *client) |
1abb0dc9 DB |
330 | { |
331 | struct ds1307 *ds1307; | |
332 | int err = -ENODEV; | |
1abb0dc9 | 333 | int tmp; |
045e0e85 | 334 | const struct chip_desc *chip; |
c065f35c | 335 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); |
1abb0dc9 | 336 | |
c065f35c DB |
337 | chip = find_chip(client->name); |
338 | if (!chip) { | |
339 | dev_err(&client->dev, "unknown chip type '%s'\n", | |
340 | client->name); | |
341 | return -ENODEV; | |
1abb0dc9 DB |
342 | } |
343 | ||
c065f35c DB |
344 | if (!i2c_check_functionality(adapter, |
345 | I2C_FUNC_I2C | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) | |
346 | return -EIO; | |
347 | ||
348 | if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL))) | |
349 | return -ENOMEM; | |
045e0e85 DB |
350 | |
351 | ds1307->client = client; | |
1abb0dc9 DB |
352 | i2c_set_clientdata(client, ds1307); |
353 | ||
354 | ds1307->msg[0].addr = client->addr; | |
355 | ds1307->msg[0].flags = 0; | |
356 | ds1307->msg[0].len = 1; | |
357 | ds1307->msg[0].buf = &ds1307->reg_addr; | |
358 | ||
359 | ds1307->msg[1].addr = client->addr; | |
360 | ds1307->msg[1].flags = I2C_M_RD; | |
361 | ds1307->msg[1].len = sizeof(ds1307->regs); | |
362 | ds1307->msg[1].buf = ds1307->regs; | |
363 | ||
045e0e85 DB |
364 | ds1307->type = chip->type; |
365 | ||
366 | switch (ds1307->type) { | |
367 | case ds_1337: | |
368 | case ds_1339: | |
1abb0dc9 DB |
369 | ds1307->reg_addr = DS1337_REG_CONTROL; |
370 | ds1307->msg[1].len = 2; | |
371 | ||
be5f59f4 | 372 | /* get registers that the "rtc" read below won't read... */ |
045e0e85 | 373 | tmp = i2c_transfer(adapter, ds1307->msg, 2); |
1abb0dc9 DB |
374 | if (tmp != 2) { |
375 | pr_debug("read error %d\n", tmp); | |
376 | err = -EIO; | |
377 | goto exit_free; | |
378 | } | |
379 | ||
380 | ds1307->reg_addr = 0; | |
381 | ds1307->msg[1].len = sizeof(ds1307->regs); | |
382 | ||
be5f59f4 RG |
383 | /* oscillator off? turn it on, so clock can tick. */ |
384 | if (ds1307->regs[0] & DS1337_BIT_nEOSC) | |
385 | i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, | |
386 | ds1307->regs[0] & ~DS1337_BIT_nEOSC); | |
387 | ||
388 | /* oscillator fault? clear flag, and warn */ | |
389 | if (ds1307->regs[1] & DS1337_BIT_OSF) { | |
390 | i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, | |
391 | ds1307->regs[1] & ~DS1337_BIT_OSF); | |
392 | dev_warn(&client->dev, "SET TIME!\n"); | |
1abb0dc9 | 393 | } |
045e0e85 DB |
394 | break; |
395 | default: | |
396 | break; | |
397 | } | |
1abb0dc9 DB |
398 | |
399 | read_rtc: | |
400 | /* read RTC registers */ | |
401 | ||
045e0e85 | 402 | tmp = i2c_transfer(adapter, ds1307->msg, 2); |
1abb0dc9 DB |
403 | if (tmp != 2) { |
404 | pr_debug("read error %d\n", tmp); | |
405 | err = -EIO; | |
406 | goto exit_free; | |
407 | } | |
408 | ||
409 | /* minimal sanity checking; some chips (like DS1340) don't | |
410 | * specify the extra bits as must-be-zero, but there are | |
411 | * still a few values that are clearly out-of-range. | |
412 | */ | |
413 | tmp = ds1307->regs[DS1307_REG_SECS]; | |
045e0e85 DB |
414 | switch (ds1307->type) { |
415 | case ds_1307: | |
045e0e85 | 416 | case m41t00: |
be5f59f4 | 417 | /* clock halted? turn it on, so clock can tick. */ |
045e0e85 | 418 | if (tmp & DS1307_BIT_CH) { |
be5f59f4 RG |
419 | i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); |
420 | dev_warn(&client->dev, "SET TIME!\n"); | |
045e0e85 | 421 | goto read_rtc; |
1abb0dc9 | 422 | } |
045e0e85 | 423 | break; |
be5f59f4 RG |
424 | case ds_1338: |
425 | /* clock halted? turn it on, so clock can tick. */ | |
045e0e85 | 426 | if (tmp & DS1307_BIT_CH) |
be5f59f4 RG |
427 | i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); |
428 | ||
429 | /* oscillator fault? clear flag, and warn */ | |
430 | if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) { | |
431 | i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL, | |
bd16f9eb | 432 | ds1307->regs[DS1307_REG_CONTROL] |
be5f59f4 RG |
433 | & ~DS1338_BIT_OSF); |
434 | dev_warn(&client->dev, "SET TIME!\n"); | |
435 | goto read_rtc; | |
436 | } | |
045e0e85 | 437 | break; |
fcd8db00 R |
438 | case ds_1340: |
439 | /* clock halted? turn it on, so clock can tick. */ | |
440 | if (tmp & DS1340_BIT_nEOSC) | |
441 | i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); | |
442 | ||
443 | tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG); | |
444 | if (tmp < 0) { | |
445 | pr_debug("read error %d\n", tmp); | |
446 | err = -EIO; | |
447 | goto exit_free; | |
448 | } | |
449 | ||
450 | /* oscillator fault? clear flag, and warn */ | |
451 | if (tmp & DS1340_BIT_OSF) { | |
452 | i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0); | |
453 | dev_warn(&client->dev, "SET TIME!\n"); | |
454 | } | |
455 | break; | |
c065f35c DB |
456 | case ds_1337: |
457 | case ds_1339: | |
045e0e85 | 458 | break; |
1abb0dc9 | 459 | } |
045e0e85 DB |
460 | |
461 | tmp = ds1307->regs[DS1307_REG_SECS]; | |
1abb0dc9 DB |
462 | tmp = BCD2BIN(tmp & 0x7f); |
463 | if (tmp > 60) | |
c065f35c | 464 | goto exit_bad; |
1abb0dc9 DB |
465 | tmp = BCD2BIN(ds1307->regs[DS1307_REG_MIN] & 0x7f); |
466 | if (tmp > 60) | |
c065f35c | 467 | goto exit_bad; |
1abb0dc9 DB |
468 | |
469 | tmp = BCD2BIN(ds1307->regs[DS1307_REG_MDAY] & 0x3f); | |
470 | if (tmp == 0 || tmp > 31) | |
c065f35c | 471 | goto exit_bad; |
1abb0dc9 DB |
472 | |
473 | tmp = BCD2BIN(ds1307->regs[DS1307_REG_MONTH] & 0x1f); | |
474 | if (tmp == 0 || tmp > 12) | |
c065f35c | 475 | goto exit_bad; |
1abb0dc9 | 476 | |
1abb0dc9 | 477 | tmp = ds1307->regs[DS1307_REG_HOUR]; |
c065f35c DB |
478 | switch (ds1307->type) { |
479 | case ds_1340: | |
480 | case m41t00: | |
481 | /* NOTE: ignores century bits; fix before deploying | |
482 | * systems that will run through year 2100. | |
483 | */ | |
484 | break; | |
485 | default: | |
486 | if (!(tmp & DS1307_BIT_12HR)) | |
487 | break; | |
488 | ||
489 | /* Be sure we're in 24 hour mode. Multi-master systems | |
490 | * take note... | |
491 | */ | |
492 | tmp = BCD2BIN(tmp & 0x1f); | |
493 | if (tmp == 12) | |
494 | tmp = 0; | |
495 | if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) | |
496 | tmp += 12; | |
1abb0dc9 DB |
497 | i2c_smbus_write_byte_data(client, |
498 | DS1307_REG_HOUR, | |
499 | BIN2BCD(tmp)); | |
500 | } | |
501 | ||
1abb0dc9 DB |
502 | ds1307->rtc = rtc_device_register(client->name, &client->dev, |
503 | &ds13xx_rtc_ops, THIS_MODULE); | |
504 | if (IS_ERR(ds1307->rtc)) { | |
505 | err = PTR_ERR(ds1307->rtc); | |
506 | dev_err(&client->dev, | |
507 | "unable to register the class device\n"); | |
c065f35c | 508 | goto exit_free; |
1abb0dc9 DB |
509 | } |
510 | ||
682d73f6 DB |
511 | if (chip->nvram56) { |
512 | err = sysfs_create_bin_file(&client->dev.kobj, &nvram); | |
513 | if (err == 0) { | |
514 | ds1307->has_nvram = true; | |
515 | dev_info(&client->dev, "56 bytes nvram\n"); | |
516 | } | |
517 | } | |
518 | ||
1abb0dc9 DB |
519 | return 0; |
520 | ||
c065f35c DB |
521 | exit_bad: |
522 | dev_dbg(&client->dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", | |
523 | "bogus register", | |
524 | ds1307->regs[0], ds1307->regs[1], | |
525 | ds1307->regs[2], ds1307->regs[3], | |
526 | ds1307->regs[4], ds1307->regs[5], | |
527 | ds1307->regs[6]); | |
528 | ||
1abb0dc9 DB |
529 | exit_free: |
530 | kfree(ds1307); | |
1abb0dc9 DB |
531 | return err; |
532 | } | |
533 | ||
c065f35c | 534 | static int __devexit ds1307_remove(struct i2c_client *client) |
1abb0dc9 | 535 | { |
1abb0dc9 DB |
536 | struct ds1307 *ds1307 = i2c_get_clientdata(client); |
537 | ||
682d73f6 DB |
538 | if (ds1307->has_nvram) |
539 | sysfs_remove_bin_file(&client->dev.kobj, &nvram); | |
540 | ||
1abb0dc9 | 541 | rtc_device_unregister(ds1307->rtc); |
1abb0dc9 DB |
542 | kfree(ds1307); |
543 | return 0; | |
544 | } | |
545 | ||
546 | static struct i2c_driver ds1307_driver = { | |
547 | .driver = { | |
c065f35c | 548 | .name = "rtc-ds1307", |
1abb0dc9 DB |
549 | .owner = THIS_MODULE, |
550 | }, | |
c065f35c DB |
551 | .probe = ds1307_probe, |
552 | .remove = __devexit_p(ds1307_remove), | |
1abb0dc9 DB |
553 | }; |
554 | ||
555 | static int __init ds1307_init(void) | |
556 | { | |
557 | return i2c_add_driver(&ds1307_driver); | |
558 | } | |
559 | module_init(ds1307_init); | |
560 | ||
561 | static void __exit ds1307_exit(void) | |
562 | { | |
563 | i2c_del_driver(&ds1307_driver); | |
564 | } | |
565 | module_exit(ds1307_exit); | |
566 | ||
567 | MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips"); | |
568 | MODULE_LICENSE("GPL"); |