Commit | Line | Data |
---|---|---|
2e774c7c MZ |
1 | /* |
2 | * ST M48T59 RTC driver | |
3 | * | |
4 | * Copyright (c) 2007 Wind River Systems, Inc. | |
5 | * | |
6 | * Author: Mark Zhan <rongkai.zhan@windriver.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/kernel.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/io.h> | |
17 | #include <linux/device.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/rtc.h> | |
20 | #include <linux/rtc/m48t59.h> | |
21 | #include <linux/bcd.h> | |
5a0e3ad6 | 22 | #include <linux/slab.h> |
2e774c7c MZ |
23 | |
24 | #ifndef NO_IRQ | |
25 | #define NO_IRQ (-1) | |
26 | #endif | |
27 | ||
94fe7424 KH |
28 | #define M48T59_READ(reg) (pdata->read_byte(dev, pdata->offset + reg)) |
29 | #define M48T59_WRITE(val, reg) \ | |
30 | (pdata->write_byte(dev, pdata->offset + reg, val)) | |
2e774c7c MZ |
31 | |
32 | #define M48T59_SET_BITS(mask, reg) \ | |
33 | M48T59_WRITE((M48T59_READ(reg) | (mask)), (reg)) | |
34 | #define M48T59_CLEAR_BITS(mask, reg) \ | |
35 | M48T59_WRITE((M48T59_READ(reg) & ~(mask)), (reg)) | |
36 | ||
37 | struct m48t59_private { | |
38 | void __iomem *ioaddr; | |
0439208a | 39 | int irq; |
2e774c7c MZ |
40 | struct rtc_device *rtc; |
41 | spinlock_t lock; /* serialize the NVRAM and RTC access */ | |
42 | }; | |
43 | ||
44 | /* | |
45 | * This is the generic access method when the chip is memory-mapped | |
46 | */ | |
47 | static void | |
48 | m48t59_mem_writeb(struct device *dev, u32 ofs, u8 val) | |
49 | { | |
50 | struct platform_device *pdev = to_platform_device(dev); | |
51 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); | |
52 | ||
53 | writeb(val, m48t59->ioaddr+ofs); | |
54 | } | |
55 | ||
56 | static u8 | |
57 | m48t59_mem_readb(struct device *dev, u32 ofs) | |
58 | { | |
59 | struct platform_device *pdev = to_platform_device(dev); | |
60 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); | |
61 | ||
62 | return readb(m48t59->ioaddr+ofs); | |
63 | } | |
64 | ||
65 | /* | |
66 | * NOTE: M48T59 only uses BCD mode | |
67 | */ | |
68 | static int m48t59_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
69 | { | |
70 | struct platform_device *pdev = to_platform_device(dev); | |
8136032b | 71 | struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev); |
2e774c7c MZ |
72 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); |
73 | unsigned long flags; | |
74 | u8 val; | |
75 | ||
76 | spin_lock_irqsave(&m48t59->lock, flags); | |
77 | /* Issue the READ command */ | |
78 | M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL); | |
79 | ||
fe20ba70 | 80 | tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR)); |
2e774c7c | 81 | /* tm_mon is 0-11 */ |
fe20ba70 AB |
82 | tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1; |
83 | tm->tm_mday = bcd2bin(M48T59_READ(M48T59_MDAY)); | |
2e774c7c MZ |
84 | |
85 | val = M48T59_READ(M48T59_WDAY); | |
833be4e1 RR |
86 | if ((pdata->type == M48T59RTC_TYPE_M48T59) && |
87 | (val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB)) { | |
2e774c7c MZ |
88 | dev_dbg(dev, "Century bit is enabled\n"); |
89 | tm->tm_year += 100; /* one century */ | |
90 | } | |
12a9ee3c KH |
91 | #ifdef CONFIG_SPARC |
92 | /* Sun SPARC machines count years since 1968 */ | |
93 | tm->tm_year += 68; | |
94 | #endif | |
2e774c7c | 95 | |
fe20ba70 AB |
96 | tm->tm_wday = bcd2bin(val & 0x07); |
97 | tm->tm_hour = bcd2bin(M48T59_READ(M48T59_HOUR) & 0x3F); | |
98 | tm->tm_min = bcd2bin(M48T59_READ(M48T59_MIN) & 0x7F); | |
99 | tm->tm_sec = bcd2bin(M48T59_READ(M48T59_SEC) & 0x7F); | |
2e774c7c MZ |
100 | |
101 | /* Clear the READ bit */ | |
102 | M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL); | |
103 | spin_unlock_irqrestore(&m48t59->lock, flags); | |
104 | ||
105 | dev_dbg(dev, "RTC read time %04d-%02d-%02d %02d/%02d/%02d\n", | |
106 | tm->tm_year + 1900, tm->tm_mon, tm->tm_mday, | |
107 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
caf1e106 | 108 | return rtc_valid_tm(tm); |
2e774c7c MZ |
109 | } |
110 | ||
111 | static int m48t59_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
112 | { | |
113 | struct platform_device *pdev = to_platform_device(dev); | |
8136032b | 114 | struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev); |
2e774c7c MZ |
115 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); |
116 | unsigned long flags; | |
117 | u8 val = 0; | |
12a9ee3c KH |
118 | int year = tm->tm_year; |
119 | ||
120 | #ifdef CONFIG_SPARC | |
121 | /* Sun SPARC machines count years since 1968 */ | |
122 | year -= 68; | |
123 | #endif | |
2e774c7c MZ |
124 | |
125 | dev_dbg(dev, "RTC set time %04d-%02d-%02d %02d/%02d/%02d\n", | |
12a9ee3c | 126 | year + 1900, tm->tm_mon, tm->tm_mday, |
2e774c7c MZ |
127 | tm->tm_hour, tm->tm_min, tm->tm_sec); |
128 | ||
12a9ee3c KH |
129 | if (year < 0) |
130 | return -EINVAL; | |
131 | ||
2e774c7c MZ |
132 | spin_lock_irqsave(&m48t59->lock, flags); |
133 | /* Issue the WRITE command */ | |
134 | M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); | |
135 | ||
fe20ba70 AB |
136 | M48T59_WRITE((bin2bcd(tm->tm_sec) & 0x7F), M48T59_SEC); |
137 | M48T59_WRITE((bin2bcd(tm->tm_min) & 0x7F), M48T59_MIN); | |
138 | M48T59_WRITE((bin2bcd(tm->tm_hour) & 0x3F), M48T59_HOUR); | |
139 | M48T59_WRITE((bin2bcd(tm->tm_mday) & 0x3F), M48T59_MDAY); | |
2e774c7c | 140 | /* tm_mon is 0-11 */ |
fe20ba70 | 141 | M48T59_WRITE((bin2bcd(tm->tm_mon + 1) & 0x1F), M48T59_MONTH); |
12a9ee3c | 142 | M48T59_WRITE(bin2bcd(year % 100), M48T59_YEAR); |
2e774c7c | 143 | |
12a9ee3c | 144 | if (pdata->type == M48T59RTC_TYPE_M48T59 && (year / 100)) |
2e774c7c | 145 | val = (M48T59_WDAY_CEB | M48T59_WDAY_CB); |
fe20ba70 | 146 | val |= (bin2bcd(tm->tm_wday) & 0x07); |
2e774c7c MZ |
147 | M48T59_WRITE(val, M48T59_WDAY); |
148 | ||
149 | /* Clear the WRITE bit */ | |
150 | M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); | |
151 | spin_unlock_irqrestore(&m48t59->lock, flags); | |
152 | return 0; | |
153 | } | |
154 | ||
155 | /* | |
156 | * Read alarm time and date in RTC | |
157 | */ | |
158 | static int m48t59_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
159 | { | |
160 | struct platform_device *pdev = to_platform_device(dev); | |
8136032b | 161 | struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev); |
2e774c7c MZ |
162 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); |
163 | struct rtc_time *tm = &alrm->time; | |
164 | unsigned long flags; | |
165 | u8 val; | |
166 | ||
167 | /* If no irq, we don't support ALARM */ | |
168 | if (m48t59->irq == NO_IRQ) | |
169 | return -EIO; | |
170 | ||
171 | spin_lock_irqsave(&m48t59->lock, flags); | |
172 | /* Issue the READ command */ | |
173 | M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL); | |
174 | ||
fe20ba70 | 175 | tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR)); |
12a9ee3c KH |
176 | #ifdef CONFIG_SPARC |
177 | /* Sun SPARC machines count years since 1968 */ | |
178 | tm->tm_year += 68; | |
179 | #endif | |
2e774c7c | 180 | /* tm_mon is 0-11 */ |
fe20ba70 | 181 | tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1; |
2e774c7c MZ |
182 | |
183 | val = M48T59_READ(M48T59_WDAY); | |
184 | if ((val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB)) | |
185 | tm->tm_year += 100; /* one century */ | |
186 | ||
fe20ba70 AB |
187 | tm->tm_mday = bcd2bin(M48T59_READ(M48T59_ALARM_DATE)); |
188 | tm->tm_hour = bcd2bin(M48T59_READ(M48T59_ALARM_HOUR)); | |
189 | tm->tm_min = bcd2bin(M48T59_READ(M48T59_ALARM_MIN)); | |
190 | tm->tm_sec = bcd2bin(M48T59_READ(M48T59_ALARM_SEC)); | |
2e774c7c MZ |
191 | |
192 | /* Clear the READ bit */ | |
193 | M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL); | |
194 | spin_unlock_irqrestore(&m48t59->lock, flags); | |
195 | ||
196 | dev_dbg(dev, "RTC read alarm time %04d-%02d-%02d %02d/%02d/%02d\n", | |
197 | tm->tm_year + 1900, tm->tm_mon, tm->tm_mday, | |
198 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
caf1e106 | 199 | return rtc_valid_tm(tm); |
2e774c7c MZ |
200 | } |
201 | ||
202 | /* | |
203 | * Set alarm time and date in RTC | |
204 | */ | |
205 | static int m48t59_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
206 | { | |
207 | struct platform_device *pdev = to_platform_device(dev); | |
8136032b | 208 | struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev); |
2e774c7c MZ |
209 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); |
210 | struct rtc_time *tm = &alrm->time; | |
211 | u8 mday, hour, min, sec; | |
212 | unsigned long flags; | |
12a9ee3c KH |
213 | int year = tm->tm_year; |
214 | ||
215 | #ifdef CONFIG_SPARC | |
216 | /* Sun SPARC machines count years since 1968 */ | |
217 | year -= 68; | |
218 | #endif | |
2e774c7c MZ |
219 | |
220 | /* If no irq, we don't support ALARM */ | |
221 | if (m48t59->irq == NO_IRQ) | |
222 | return -EIO; | |
223 | ||
12a9ee3c KH |
224 | if (year < 0) |
225 | return -EINVAL; | |
226 | ||
2e774c7c MZ |
227 | /* |
228 | * 0xff means "always match" | |
229 | */ | |
230 | mday = tm->tm_mday; | |
fe20ba70 | 231 | mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff; |
2e774c7c MZ |
232 | if (mday == 0xff) |
233 | mday = M48T59_READ(M48T59_MDAY); | |
234 | ||
235 | hour = tm->tm_hour; | |
fe20ba70 | 236 | hour = (hour < 24) ? bin2bcd(hour) : 0x00; |
2e774c7c MZ |
237 | |
238 | min = tm->tm_min; | |
fe20ba70 | 239 | min = (min < 60) ? bin2bcd(min) : 0x00; |
2e774c7c MZ |
240 | |
241 | sec = tm->tm_sec; | |
fe20ba70 | 242 | sec = (sec < 60) ? bin2bcd(sec) : 0x00; |
2e774c7c MZ |
243 | |
244 | spin_lock_irqsave(&m48t59->lock, flags); | |
245 | /* Issue the WRITE command */ | |
246 | M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); | |
247 | ||
248 | M48T59_WRITE(mday, M48T59_ALARM_DATE); | |
249 | M48T59_WRITE(hour, M48T59_ALARM_HOUR); | |
250 | M48T59_WRITE(min, M48T59_ALARM_MIN); | |
251 | M48T59_WRITE(sec, M48T59_ALARM_SEC); | |
252 | ||
253 | /* Clear the WRITE bit */ | |
254 | M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); | |
255 | spin_unlock_irqrestore(&m48t59->lock, flags); | |
256 | ||
257 | dev_dbg(dev, "RTC set alarm time %04d-%02d-%02d %02d/%02d/%02d\n", | |
12a9ee3c | 258 | year + 1900, tm->tm_mon, tm->tm_mday, |
2e774c7c MZ |
259 | tm->tm_hour, tm->tm_min, tm->tm_sec); |
260 | return 0; | |
261 | } | |
262 | ||
263 | /* | |
264 | * Handle commands from user-space | |
265 | */ | |
16380c15 | 266 | static int m48t59_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
2e774c7c MZ |
267 | { |
268 | struct platform_device *pdev = to_platform_device(dev); | |
8136032b | 269 | struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev); |
2e774c7c MZ |
270 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); |
271 | unsigned long flags; | |
2e774c7c MZ |
272 | |
273 | spin_lock_irqsave(&m48t59->lock, flags); | |
16380c15 | 274 | if (enabled) |
2e774c7c | 275 | M48T59_WRITE(M48T59_INTR_AFE, M48T59_INTR); |
16380c15 JS |
276 | else |
277 | M48T59_WRITE(0x00, M48T59_INTR); | |
2e774c7c MZ |
278 | spin_unlock_irqrestore(&m48t59->lock, flags); |
279 | ||
16380c15 | 280 | return 0; |
2e774c7c MZ |
281 | } |
282 | ||
283 | static int m48t59_rtc_proc(struct device *dev, struct seq_file *seq) | |
284 | { | |
285 | struct platform_device *pdev = to_platform_device(dev); | |
8136032b | 286 | struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev); |
2e774c7c MZ |
287 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); |
288 | unsigned long flags; | |
289 | u8 val; | |
290 | ||
291 | spin_lock_irqsave(&m48t59->lock, flags); | |
292 | val = M48T59_READ(M48T59_FLAGS); | |
293 | spin_unlock_irqrestore(&m48t59->lock, flags); | |
294 | ||
295 | seq_printf(seq, "battery\t\t: %s\n", | |
296 | (val & M48T59_FLAGS_BF) ? "low" : "normal"); | |
297 | return 0; | |
298 | } | |
299 | ||
300 | /* | |
301 | * IRQ handler for the RTC | |
302 | */ | |
303 | static irqreturn_t m48t59_rtc_interrupt(int irq, void *dev_id) | |
304 | { | |
305 | struct device *dev = (struct device *)dev_id; | |
306 | struct platform_device *pdev = to_platform_device(dev); | |
8136032b | 307 | struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev); |
2e774c7c MZ |
308 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); |
309 | u8 event; | |
310 | ||
311 | spin_lock(&m48t59->lock); | |
312 | event = M48T59_READ(M48T59_FLAGS); | |
313 | spin_unlock(&m48t59->lock); | |
314 | ||
315 | if (event & M48T59_FLAGS_AF) { | |
316 | rtc_update_irq(m48t59->rtc, 1, (RTC_AF | RTC_IRQF)); | |
317 | return IRQ_HANDLED; | |
318 | } | |
319 | ||
320 | return IRQ_NONE; | |
321 | } | |
322 | ||
323 | static const struct rtc_class_ops m48t59_rtc_ops = { | |
2e774c7c MZ |
324 | .read_time = m48t59_rtc_read_time, |
325 | .set_time = m48t59_rtc_set_time, | |
326 | .read_alarm = m48t59_rtc_readalarm, | |
327 | .set_alarm = m48t59_rtc_setalarm, | |
328 | .proc = m48t59_rtc_proc, | |
16380c15 | 329 | .alarm_irq_enable = m48t59_rtc_alarm_irq_enable, |
2e774c7c MZ |
330 | }; |
331 | ||
94fe7424 KH |
332 | static const struct rtc_class_ops m48t02_rtc_ops = { |
333 | .read_time = m48t59_rtc_read_time, | |
334 | .set_time = m48t59_rtc_set_time, | |
335 | }; | |
336 | ||
2c3c8bea | 337 | static ssize_t m48t59_nvram_read(struct file *filp, struct kobject *kobj, |
2e774c7c MZ |
338 | struct bin_attribute *bin_attr, |
339 | char *buf, loff_t pos, size_t size) | |
340 | { | |
341 | struct device *dev = container_of(kobj, struct device, kobj); | |
342 | struct platform_device *pdev = to_platform_device(dev); | |
8136032b | 343 | struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev); |
2e774c7c MZ |
344 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); |
345 | ssize_t cnt = 0; | |
346 | unsigned long flags; | |
347 | ||
94fe7424 | 348 | for (; size > 0 && pos < pdata->offset; cnt++, size--) { |
2e774c7c MZ |
349 | spin_lock_irqsave(&m48t59->lock, flags); |
350 | *buf++ = M48T59_READ(cnt); | |
351 | spin_unlock_irqrestore(&m48t59->lock, flags); | |
352 | } | |
353 | ||
354 | return cnt; | |
355 | } | |
356 | ||
2c3c8bea | 357 | static ssize_t m48t59_nvram_write(struct file *filp, struct kobject *kobj, |
2e774c7c MZ |
358 | struct bin_attribute *bin_attr, |
359 | char *buf, loff_t pos, size_t size) | |
360 | { | |
361 | struct device *dev = container_of(kobj, struct device, kobj); | |
362 | struct platform_device *pdev = to_platform_device(dev); | |
8136032b | 363 | struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev); |
2e774c7c MZ |
364 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); |
365 | ssize_t cnt = 0; | |
366 | unsigned long flags; | |
367 | ||
94fe7424 | 368 | for (; size > 0 && pos < pdata->offset; cnt++, size--) { |
2e774c7c MZ |
369 | spin_lock_irqsave(&m48t59->lock, flags); |
370 | M48T59_WRITE(*buf++, cnt); | |
371 | spin_unlock_irqrestore(&m48t59->lock, flags); | |
372 | } | |
373 | ||
374 | return cnt; | |
375 | } | |
376 | ||
377 | static struct bin_attribute m48t59_nvram_attr = { | |
378 | .attr = { | |
379 | .name = "nvram", | |
a4b1d50e | 380 | .mode = S_IRUGO | S_IWUSR, |
2e774c7c MZ |
381 | }, |
382 | .read = m48t59_nvram_read, | |
383 | .write = m48t59_nvram_write, | |
384 | }; | |
385 | ||
5a167f45 | 386 | static int m48t59_rtc_probe(struct platform_device *pdev) |
2e774c7c | 387 | { |
8136032b | 388 | struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev); |
2e774c7c MZ |
389 | struct m48t59_private *m48t59 = NULL; |
390 | struct resource *res; | |
391 | int ret = -ENOMEM; | |
94fe7424 KH |
392 | char *name; |
393 | const struct rtc_class_ops *ops; | |
2e774c7c MZ |
394 | |
395 | /* This chip could be memory-mapped or I/O-mapped */ | |
396 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
397 | if (!res) { | |
398 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
399 | if (!res) | |
400 | return -EINVAL; | |
401 | } | |
402 | ||
403 | if (res->flags & IORESOURCE_IO) { | |
404 | /* If we are I/O-mapped, the platform should provide | |
405 | * the operations accessing chip registers. | |
406 | */ | |
407 | if (!pdata || !pdata->write_byte || !pdata->read_byte) | |
408 | return -EINVAL; | |
409 | } else if (res->flags & IORESOURCE_MEM) { | |
410 | /* we are memory-mapped */ | |
411 | if (!pdata) { | |
19b8d887 JH |
412 | pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), |
413 | GFP_KERNEL); | |
2e774c7c MZ |
414 | if (!pdata) |
415 | return -ENOMEM; | |
416 | /* Ensure we only kmalloc platform data once */ | |
417 | pdev->dev.platform_data = pdata; | |
418 | } | |
94fe7424 KH |
419 | if (!pdata->type) |
420 | pdata->type = M48T59RTC_TYPE_M48T59; | |
2e774c7c MZ |
421 | |
422 | /* Try to use the generic memory read/write ops */ | |
423 | if (!pdata->write_byte) | |
424 | pdata->write_byte = m48t59_mem_writeb; | |
425 | if (!pdata->read_byte) | |
426 | pdata->read_byte = m48t59_mem_readb; | |
427 | } | |
428 | ||
19b8d887 | 429 | m48t59 = devm_kzalloc(&pdev->dev, sizeof(*m48t59), GFP_KERNEL); |
2e774c7c MZ |
430 | if (!m48t59) |
431 | return -ENOMEM; | |
432 | ||
64151ad5 KH |
433 | m48t59->ioaddr = pdata->ioaddr; |
434 | ||
435 | if (!m48t59->ioaddr) { | |
436 | /* ioaddr not mapped externally */ | |
19b8d887 JH |
437 | m48t59->ioaddr = devm_ioremap(&pdev->dev, res->start, |
438 | resource_size(res)); | |
64151ad5 | 439 | if (!m48t59->ioaddr) |
19b8d887 | 440 | return ret; |
64151ad5 | 441 | } |
2e774c7c MZ |
442 | |
443 | /* Try to get irq number. We also can work in | |
444 | * the mode without IRQ. | |
445 | */ | |
446 | m48t59->irq = platform_get_irq(pdev, 0); | |
2fac6674 | 447 | if (m48t59->irq <= 0) |
2e774c7c MZ |
448 | m48t59->irq = NO_IRQ; |
449 | ||
450 | if (m48t59->irq != NO_IRQ) { | |
19b8d887 JH |
451 | ret = devm_request_irq(&pdev->dev, m48t59->irq, |
452 | m48t59_rtc_interrupt, IRQF_SHARED, | |
453 | "rtc-m48t59", &pdev->dev); | |
2e774c7c | 454 | if (ret) |
19b8d887 | 455 | return ret; |
2e774c7c | 456 | } |
94fe7424 KH |
457 | switch (pdata->type) { |
458 | case M48T59RTC_TYPE_M48T59: | |
459 | name = "m48t59"; | |
460 | ops = &m48t59_rtc_ops; | |
461 | pdata->offset = 0x1ff0; | |
462 | break; | |
463 | case M48T59RTC_TYPE_M48T02: | |
464 | name = "m48t02"; | |
465 | ops = &m48t02_rtc_ops; | |
466 | pdata->offset = 0x7f0; | |
467 | break; | |
468 | case M48T59RTC_TYPE_M48T08: | |
469 | name = "m48t08"; | |
470 | ops = &m48t02_rtc_ops; | |
471 | pdata->offset = 0x1ff0; | |
472 | break; | |
473 | default: | |
474 | dev_err(&pdev->dev, "Unknown RTC type\n"); | |
19b8d887 | 475 | return -ENODEV; |
94fe7424 | 476 | } |
2e774c7c | 477 | |
b74d2caa AZ |
478 | spin_lock_init(&m48t59->lock); |
479 | platform_set_drvdata(pdev, m48t59); | |
480 | ||
19b8d887 JH |
481 | m48t59->rtc = devm_rtc_device_register(&pdev->dev, name, ops, |
482 | THIS_MODULE); | |
483 | if (IS_ERR(m48t59->rtc)) | |
484 | return PTR_ERR(m48t59->rtc); | |
2e774c7c | 485 | |
94fe7424 KH |
486 | m48t59_nvram_attr.size = pdata->offset; |
487 | ||
2e774c7c | 488 | ret = sysfs_create_bin_file(&pdev->dev.kobj, &m48t59_nvram_attr); |
19b8d887 JH |
489 | if (ret) |
490 | return ret; | |
2e774c7c | 491 | |
2e774c7c | 492 | return 0; |
2e774c7c MZ |
493 | } |
494 | ||
5a167f45 | 495 | static int m48t59_rtc_remove(struct platform_device *pdev) |
2e774c7c | 496 | { |
2e774c7c | 497 | sysfs_remove_bin_file(&pdev->dev.kobj, &m48t59_nvram_attr); |
2e774c7c MZ |
498 | return 0; |
499 | } | |
500 | ||
ad28a07b KS |
501 | /* work with hotplug and coldplug */ |
502 | MODULE_ALIAS("platform:rtc-m48t59"); | |
503 | ||
12730926 | 504 | static struct platform_driver m48t59_rtc_driver = { |
2e774c7c MZ |
505 | .driver = { |
506 | .name = "rtc-m48t59", | |
507 | .owner = THIS_MODULE, | |
508 | }, | |
509 | .probe = m48t59_rtc_probe, | |
5a167f45 | 510 | .remove = m48t59_rtc_remove, |
2e774c7c MZ |
511 | }; |
512 | ||
0c4eae66 | 513 | module_platform_driver(m48t59_rtc_driver); |
2e774c7c MZ |
514 | |
515 | MODULE_AUTHOR("Mark Zhan <rongkai.zhan@windriver.com>"); | |
94fe7424 | 516 | MODULE_DESCRIPTION("M48T59/M48T02/M48T08 RTC driver"); |
2e774c7c | 517 | MODULE_LICENSE("GPL"); |