Commit | Line | Data |
---|---|---|
7520b94d | 1 | /* |
cb26b572 | 2 | * An I2C driver for Ricoh RS5C372 and RV5C38[67] RTCs |
7520b94d AZ |
3 | * |
4 | * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net> | |
5 | * Copyright (C) 2006 Tower Technologies | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/i2c.h> | |
13 | #include <linux/rtc.h> | |
14 | #include <linux/bcd.h> | |
15 | ||
d815461c | 16 | #define DRV_VERSION "0.5" |
7520b94d | 17 | |
cb26b572 DB |
18 | |
19 | /* | |
20 | * Ricoh has a family of I2C based RTCs, which differ only slightly from | |
21 | * each other. Differences center on pinout (e.g. how many interrupts, | |
22 | * output clock, etc) and how the control registers are used. The '372 | |
23 | * is significant only because that's the one this driver first supported. | |
24 | */ | |
7520b94d AZ |
25 | #define RS5C372_REG_SECS 0 |
26 | #define RS5C372_REG_MINS 1 | |
27 | #define RS5C372_REG_HOURS 2 | |
28 | #define RS5C372_REG_WDAY 3 | |
29 | #define RS5C372_REG_DAY 4 | |
30 | #define RS5C372_REG_MONTH 5 | |
31 | #define RS5C372_REG_YEAR 6 | |
32 | #define RS5C372_REG_TRIM 7 | |
cb26b572 DB |
33 | # define RS5C372_TRIM_XSL 0x80 |
34 | # define RS5C372_TRIM_MASK 0x7F | |
35 | ||
36 | #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */ | |
37 | #define RS5C_REG_ALARM_A_HOURS 9 | |
38 | #define RS5C_REG_ALARM_A_WDAY 10 | |
39 | ||
40 | #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */ | |
41 | #define RS5C_REG_ALARM_B_HOURS 12 | |
42 | #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */ | |
43 | ||
44 | #define RS5C_REG_CTRL1 14 | |
45 | # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */ | |
46 | # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */ | |
47 | # define RV5C387_CTRL1_24 (1 << 5) | |
48 | # define RS5C372A_CTRL1_SL1 (1 << 5) | |
49 | # define RS5C_CTRL1_CT_MASK (7 << 0) | |
50 | # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */ | |
51 | # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */ | |
52 | #define RS5C_REG_CTRL2 15 | |
53 | # define RS5C372_CTRL2_24 (1 << 5) | |
54 | # define RS5C_CTRL2_XSTP (1 << 4) | |
55 | # define RS5C_CTRL2_CTFG (1 << 2) | |
56 | # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */ | |
57 | # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */ | |
58 | ||
59 | ||
60 | /* to read (style 1) or write registers starting at R */ | |
61 | #define RS5C_ADDR(R) (((R) << 4) | 0) | |
62 | ||
63 | ||
64 | enum rtc_type { | |
65 | rtc_undef = 0, | |
66 | rtc_rs5c372a, | |
67 | rtc_rs5c372b, | |
68 | rtc_rv5c386, | |
69 | rtc_rv5c387a, | |
70 | }; | |
7520b94d | 71 | |
cb26b572 DB |
72 | /* REVISIT: this assumes that: |
73 | * - we're in the 21st century, so it's safe to ignore the century | |
74 | * bit for rv5c38[67] (REG_MONTH bit 7); | |
75 | * - we should use ALARM_A not ALARM_B (may be wrong on some boards) | |
76 | */ | |
77 | struct rs5c372 { | |
78 | struct i2c_client *client; | |
79 | struct rtc_device *rtc; | |
80 | enum rtc_type type; | |
81 | unsigned time24:1; | |
82 | unsigned has_irq:1; | |
83 | char buf[17]; | |
84 | char *regs; | |
cb26b572 | 85 | }; |
7520b94d | 86 | |
cb26b572 DB |
87 | static int rs5c_get_regs(struct rs5c372 *rs5c) |
88 | { | |
89 | struct i2c_client *client = rs5c->client; | |
90 | struct i2c_msg msgs[] = { | |
91 | { client->addr, I2C_M_RD, sizeof rs5c->buf, rs5c->buf }, | |
92 | }; | |
93 | ||
94 | /* This implements the third reading method from the datasheet, using | |
95 | * an internal address that's reset after each transaction (by STOP) | |
96 | * to 0x0f ... so we read extra registers, and skip the first one. | |
97 | * | |
98 | * The first method doesn't work with the iop3xx adapter driver, on at | |
99 | * least 80219 chips; this works around that bug. | |
100 | */ | |
101 | if ((i2c_transfer(client->adapter, msgs, 1)) != 1) { | |
102 | pr_debug("%s: can't read registers\n", rs5c->rtc->name); | |
103 | return -EIO; | |
104 | } | |
7520b94d | 105 | |
cb26b572 DB |
106 | dev_dbg(&client->dev, |
107 | "%02x %02x %02x (%02x) %02x %02x %02x (%02x), " | |
108 | "%02x %02x %02x, %02x %02x %02x; %02x %02x\n", | |
109 | rs5c->regs[0], rs5c->regs[1], rs5c->regs[2], rs5c->regs[3], | |
110 | rs5c->regs[4], rs5c->regs[5], rs5c->regs[6], rs5c->regs[7], | |
111 | rs5c->regs[8], rs5c->regs[9], rs5c->regs[10], rs5c->regs[11], | |
112 | rs5c->regs[12], rs5c->regs[13], rs5c->regs[14], rs5c->regs[15]); | |
7520b94d | 113 | |
cb26b572 DB |
114 | return 0; |
115 | } | |
c6f24f99 | 116 | |
cb26b572 DB |
117 | static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg) |
118 | { | |
119 | unsigned hour; | |
7520b94d | 120 | |
cb26b572 DB |
121 | if (rs5c->time24) |
122 | return BCD2BIN(reg & 0x3f); | |
123 | ||
124 | hour = BCD2BIN(reg & 0x1f); | |
125 | if (hour == 12) | |
126 | hour = 0; | |
127 | if (reg & 0x20) | |
128 | hour += 12; | |
129 | return hour; | |
130 | } | |
131 | ||
132 | static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour) | |
7520b94d | 133 | { |
cb26b572 DB |
134 | if (rs5c->time24) |
135 | return BIN2BCD(hour); | |
136 | ||
137 | if (hour > 12) | |
138 | return 0x20 | BIN2BCD(hour - 12); | |
139 | if (hour == 12) | |
140 | return 0x20 | BIN2BCD(12); | |
141 | if (hour == 0) | |
142 | return BIN2BCD(12); | |
143 | return BIN2BCD(hour); | |
144 | } | |
7520b94d | 145 | |
cb26b572 DB |
146 | static int rs5c372_get_datetime(struct i2c_client *client, struct rtc_time *tm) |
147 | { | |
148 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
149 | int status = rs5c_get_regs(rs5c); | |
c6f24f99 | 150 | |
cb26b572 DB |
151 | if (status < 0) |
152 | return status; | |
7520b94d | 153 | |
cb26b572 DB |
154 | tm->tm_sec = BCD2BIN(rs5c->regs[RS5C372_REG_SECS] & 0x7f); |
155 | tm->tm_min = BCD2BIN(rs5c->regs[RS5C372_REG_MINS] & 0x7f); | |
156 | tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]); | |
7520b94d | 157 | |
cb26b572 DB |
158 | tm->tm_wday = BCD2BIN(rs5c->regs[RS5C372_REG_WDAY] & 0x07); |
159 | tm->tm_mday = BCD2BIN(rs5c->regs[RS5C372_REG_DAY] & 0x3f); | |
7520b94d AZ |
160 | |
161 | /* tm->tm_mon is zero-based */ | |
cb26b572 | 162 | tm->tm_mon = BCD2BIN(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1; |
7520b94d AZ |
163 | |
164 | /* year is 1900 + tm->tm_year */ | |
cb26b572 | 165 | tm->tm_year = BCD2BIN(rs5c->regs[RS5C372_REG_YEAR]) + 100; |
7520b94d AZ |
166 | |
167 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, " | |
168 | "mday=%d, mon=%d, year=%d, wday=%d\n", | |
169 | __FUNCTION__, | |
170 | tm->tm_sec, tm->tm_min, tm->tm_hour, | |
171 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); | |
172 | ||
cb26b572 DB |
173 | /* rtc might need initialization */ |
174 | return rtc_valid_tm(tm); | |
7520b94d AZ |
175 | } |
176 | ||
177 | static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm) | |
178 | { | |
cb26b572 DB |
179 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
180 | unsigned char buf[8]; | |
7520b94d | 181 | |
cb26b572 | 182 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d " |
7520b94d | 183 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
cb26b572 DB |
184 | __FUNCTION__, |
185 | tm->tm_sec, tm->tm_min, tm->tm_hour, | |
7520b94d AZ |
186 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); |
187 | ||
cb26b572 | 188 | buf[0] = RS5C_ADDR(RS5C372_REG_SECS); |
7520b94d AZ |
189 | buf[1] = BIN2BCD(tm->tm_sec); |
190 | buf[2] = BIN2BCD(tm->tm_min); | |
cb26b572 | 191 | buf[3] = rs5c_hr2reg(rs5c, tm->tm_hour); |
7520b94d AZ |
192 | buf[4] = BIN2BCD(tm->tm_wday); |
193 | buf[5] = BIN2BCD(tm->tm_mday); | |
194 | buf[6] = BIN2BCD(tm->tm_mon + 1); | |
195 | buf[7] = BIN2BCD(tm->tm_year - 100); | |
196 | ||
197 | if ((i2c_master_send(client, buf, 8)) != 8) { | |
198 | dev_err(&client->dev, "%s: write error\n", __FUNCTION__); | |
199 | return -EIO; | |
200 | } | |
201 | ||
202 | return 0; | |
203 | } | |
204 | ||
cb26b572 DB |
205 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) |
206 | #define NEED_TRIM | |
207 | #endif | |
208 | ||
209 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) | |
210 | #define NEED_TRIM | |
211 | #endif | |
212 | ||
213 | #ifdef NEED_TRIM | |
7520b94d AZ |
214 | static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim) |
215 | { | |
c6f24f99 | 216 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
cb26b572 | 217 | u8 tmp = rs5c372->regs[RS5C372_REG_TRIM]; |
7520b94d | 218 | |
7520b94d | 219 | if (osc) |
c6f24f99 | 220 | *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768; |
7520b94d | 221 | |
17ad78e5 | 222 | if (trim) { |
cb26b572 DB |
223 | dev_dbg(&client->dev, "%s: raw trim=%x\n", __FUNCTION__, tmp); |
224 | tmp &= RS5C372_TRIM_MASK; | |
225 | if (tmp & 0x3e) { | |
226 | int t = tmp & 0x3f; | |
227 | ||
228 | if (tmp & 0x40) | |
229 | t = (~t | (s8)0xc0) + 1; | |
230 | else | |
231 | t = t - 1; | |
232 | ||
233 | tmp = t * 2; | |
234 | } else | |
235 | tmp = 0; | |
236 | *trim = tmp; | |
17ad78e5 | 237 | } |
7520b94d AZ |
238 | |
239 | return 0; | |
240 | } | |
cb26b572 | 241 | #endif |
7520b94d AZ |
242 | |
243 | static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
244 | { | |
245 | return rs5c372_get_datetime(to_i2c_client(dev), tm); | |
246 | } | |
247 | ||
248 | static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
249 | { | |
250 | return rs5c372_set_datetime(to_i2c_client(dev), tm); | |
251 | } | |
252 | ||
cb26b572 DB |
253 | #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE) |
254 | ||
255 | static int | |
256 | rs5c_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |
257 | { | |
258 | struct i2c_client *client = to_i2c_client(dev); | |
259 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
260 | unsigned char buf[2]; | |
261 | int status; | |
262 | ||
263 | buf[1] = rs5c->regs[RS5C_REG_CTRL1]; | |
264 | switch (cmd) { | |
265 | case RTC_UIE_OFF: | |
266 | case RTC_UIE_ON: | |
267 | /* some 327a modes use a different IRQ pin for 1Hz irqs */ | |
268 | if (rs5c->type == rtc_rs5c372a | |
269 | && (buf[1] & RS5C372A_CTRL1_SL1)) | |
270 | return -ENOIOCTLCMD; | |
271 | case RTC_AIE_OFF: | |
272 | case RTC_AIE_ON: | |
273 | /* these irq management calls only make sense for chips | |
274 | * which are wired up to an IRQ. | |
275 | */ | |
276 | if (!rs5c->has_irq) | |
277 | return -ENOIOCTLCMD; | |
278 | break; | |
279 | default: | |
280 | return -ENOIOCTLCMD; | |
281 | } | |
282 | ||
283 | status = rs5c_get_regs(rs5c); | |
284 | if (status < 0) | |
285 | return status; | |
286 | ||
287 | buf[0] = RS5C_ADDR(RS5C_REG_CTRL1); | |
288 | switch (cmd) { | |
289 | case RTC_AIE_OFF: /* alarm off */ | |
290 | buf[1] &= ~RS5C_CTRL1_AALE; | |
291 | break; | |
292 | case RTC_AIE_ON: /* alarm on */ | |
293 | buf[1] |= RS5C_CTRL1_AALE; | |
294 | break; | |
295 | case RTC_UIE_OFF: /* update off */ | |
296 | buf[1] &= ~RS5C_CTRL1_CT_MASK; | |
297 | break; | |
298 | case RTC_UIE_ON: /* update on */ | |
299 | buf[1] &= ~RS5C_CTRL1_CT_MASK; | |
300 | buf[1] |= RS5C_CTRL1_CT4; | |
301 | break; | |
302 | } | |
303 | if ((i2c_master_send(client, buf, 2)) != 2) { | |
304 | printk(KERN_WARNING "%s: can't update alarm\n", | |
305 | rs5c->rtc->name); | |
306 | status = -EIO; | |
307 | } else | |
308 | rs5c->regs[RS5C_REG_CTRL1] = buf[1]; | |
309 | return status; | |
310 | } | |
311 | ||
312 | #else | |
313 | #define rs5c_rtc_ioctl NULL | |
314 | #endif | |
315 | ||
316 | ||
317 | /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI, | |
318 | * which only exposes a polled programming interface; and since | |
319 | * these calls map directly to those EFI requests; we don't demand | |
320 | * we have an IRQ for this chip when we go through this API. | |
321 | * | |
322 | * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs | |
323 | * though, managed through RTC_AIE_{ON,OFF} requests. | |
324 | */ | |
325 | ||
326 | static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |
327 | { | |
328 | struct i2c_client *client = to_i2c_client(dev); | |
329 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
330 | int status; | |
331 | ||
332 | status = rs5c_get_regs(rs5c); | |
333 | if (status < 0) | |
334 | return status; | |
335 | ||
336 | /* report alarm time */ | |
337 | t->time.tm_sec = 0; | |
338 | t->time.tm_min = BCD2BIN(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f); | |
339 | t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]); | |
340 | t->time.tm_mday = -1; | |
341 | t->time.tm_mon = -1; | |
342 | t->time.tm_year = -1; | |
343 | t->time.tm_wday = -1; | |
344 | t->time.tm_yday = -1; | |
345 | t->time.tm_isdst = -1; | |
346 | ||
347 | /* ... and status */ | |
348 | t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE); | |
349 | t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG); | |
350 | ||
351 | return 0; | |
352 | } | |
353 | ||
354 | static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |
355 | { | |
356 | struct i2c_client *client = to_i2c_client(dev); | |
357 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
358 | int status; | |
359 | unsigned char buf[4]; | |
360 | ||
361 | /* only handle up to 24 hours in the future, like RTC_ALM_SET */ | |
362 | if (t->time.tm_mday != -1 | |
363 | || t->time.tm_mon != -1 | |
364 | || t->time.tm_year != -1) | |
365 | return -EINVAL; | |
366 | ||
367 | /* REVISIT: round up tm_sec */ | |
368 | ||
369 | /* if needed, disable irq (clears pending status) */ | |
370 | status = rs5c_get_regs(rs5c); | |
371 | if (status < 0) | |
372 | return status; | |
373 | if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) { | |
374 | buf[0] = RS5C_ADDR(RS5C_REG_CTRL1); | |
375 | buf[1] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE; | |
376 | if (i2c_master_send(client, buf, 2) != 2) { | |
377 | pr_debug("%s: can't disable alarm\n", rs5c->rtc->name); | |
378 | return -EIO; | |
379 | } | |
380 | rs5c->regs[RS5C_REG_CTRL1] = buf[1]; | |
381 | } | |
382 | ||
383 | /* set alarm */ | |
384 | buf[0] = RS5C_ADDR(RS5C_REG_ALARM_A_MIN); | |
385 | buf[1] = BIN2BCD(t->time.tm_min); | |
386 | buf[2] = rs5c_hr2reg(rs5c, t->time.tm_hour); | |
387 | buf[3] = 0x7f; /* any/all days */ | |
388 | if ((i2c_master_send(client, buf, 4)) != 4) { | |
389 | pr_debug("%s: can't set alarm time\n", rs5c->rtc->name); | |
390 | return -EIO; | |
391 | } | |
392 | ||
393 | /* ... and maybe enable its irq */ | |
394 | if (t->enabled) { | |
395 | buf[0] = RS5C_ADDR(RS5C_REG_CTRL1); | |
396 | buf[1] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE; | |
397 | if ((i2c_master_send(client, buf, 2)) != 2) | |
398 | printk(KERN_WARNING "%s: can't enable alarm\n", | |
399 | rs5c->rtc->name); | |
400 | rs5c->regs[RS5C_REG_CTRL1] = buf[1]; | |
401 | } | |
402 | ||
403 | return 0; | |
404 | } | |
405 | ||
406 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) | |
407 | ||
7520b94d AZ |
408 | static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq) |
409 | { | |
410 | int err, osc, trim; | |
411 | ||
adfb4341 AZ |
412 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim); |
413 | if (err == 0) { | |
cb26b572 DB |
414 | seq_printf(seq, "crystal\t\t: %d.%03d KHz\n", |
415 | osc / 1000, osc % 1000); | |
416 | seq_printf(seq, "trim\t\t: %d\n", trim); | |
7520b94d AZ |
417 | } |
418 | ||
419 | return 0; | |
420 | } | |
421 | ||
cb26b572 DB |
422 | #else |
423 | #define rs5c372_rtc_proc NULL | |
424 | #endif | |
425 | ||
ff8371ac | 426 | static const struct rtc_class_ops rs5c372_rtc_ops = { |
7520b94d | 427 | .proc = rs5c372_rtc_proc, |
cb26b572 | 428 | .ioctl = rs5c_rtc_ioctl, |
7520b94d AZ |
429 | .read_time = rs5c372_rtc_read_time, |
430 | .set_time = rs5c372_rtc_set_time, | |
cb26b572 DB |
431 | .read_alarm = rs5c_read_alarm, |
432 | .set_alarm = rs5c_set_alarm, | |
7520b94d AZ |
433 | }; |
434 | ||
cb26b572 DB |
435 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) |
436 | ||
7520b94d AZ |
437 | static ssize_t rs5c372_sysfs_show_trim(struct device *dev, |
438 | struct device_attribute *attr, char *buf) | |
439 | { | |
82896072 | 440 | int err, trim; |
7520b94d | 441 | |
82896072 AZ |
442 | err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim); |
443 | if (err) | |
444 | return err; | |
7520b94d | 445 | |
cb26b572 | 446 | return sprintf(buf, "%d\n", trim); |
7520b94d AZ |
447 | } |
448 | static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL); | |
449 | ||
450 | static ssize_t rs5c372_sysfs_show_osc(struct device *dev, | |
451 | struct device_attribute *attr, char *buf) | |
452 | { | |
82896072 | 453 | int err, osc; |
7520b94d | 454 | |
82896072 AZ |
455 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL); |
456 | if (err) | |
457 | return err; | |
7520b94d | 458 | |
82896072 | 459 | return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000); |
7520b94d AZ |
460 | } |
461 | static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL); | |
462 | ||
cb26b572 | 463 | static int rs5c_sysfs_register(struct device *dev) |
7520b94d | 464 | { |
cb26b572 DB |
465 | int err; |
466 | ||
467 | err = device_create_file(dev, &dev_attr_trim); | |
468 | if (err) | |
469 | return err; | |
470 | err = device_create_file(dev, &dev_attr_osc); | |
471 | if (err) | |
472 | device_remove_file(dev, &dev_attr_trim); | |
473 | ||
474 | return err; | |
475 | } | |
476 | ||
d815461c DB |
477 | static void rs5c_sysfs_unregister(struct device *dev) |
478 | { | |
479 | device_remove_file(dev, &dev_attr_trim); | |
480 | device_remove_file(dev, &dev_attr_osc); | |
481 | } | |
482 | ||
cb26b572 DB |
483 | #else |
484 | static int rs5c_sysfs_register(struct device *dev) | |
485 | { | |
486 | return 0; | |
7520b94d | 487 | } |
d815461c DB |
488 | |
489 | static void rs5c_sysfs_unregister(struct device *dev) | |
490 | { | |
491 | /* nothing */ | |
492 | } | |
cb26b572 DB |
493 | #endif /* SYSFS */ |
494 | ||
495 | static struct i2c_driver rs5c372_driver; | |
7520b94d | 496 | |
d815461c | 497 | static int rs5c372_probe(struct i2c_client *client) |
7520b94d AZ |
498 | { |
499 | int err = 0; | |
c6f24f99 | 500 | struct rs5c372 *rs5c372; |
cb26b572 | 501 | struct rtc_time tm; |
7520b94d | 502 | |
d815461c | 503 | dev_dbg(&client->dev, "%s\n", __FUNCTION__); |
7520b94d | 504 | |
d815461c | 505 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { |
7520b94d AZ |
506 | err = -ENODEV; |
507 | goto exit; | |
508 | } | |
509 | ||
c6f24f99 | 510 | if (!(rs5c372 = kzalloc(sizeof(struct rs5c372), GFP_KERNEL))) { |
7520b94d AZ |
511 | err = -ENOMEM; |
512 | goto exit; | |
513 | } | |
cb26b572 DB |
514 | |
515 | /* we read registers 0x0f then 0x00-0x0f; skip the first one */ | |
516 | rs5c372->regs=&rs5c372->buf[1]; | |
517 | ||
cb26b572 | 518 | rs5c372->client = client; |
c6f24f99 RV |
519 | i2c_set_clientdata(client, rs5c372); |
520 | ||
cb26b572 DB |
521 | err = rs5c_get_regs(rs5c372); |
522 | if (err < 0) | |
d815461c | 523 | goto exit_kfree; |
cb26b572 | 524 | |
d815461c DB |
525 | if (strcmp(client->name, "rs5c372a") == 0) |
526 | rs5c372->type = rtc_rs5c372a; | |
527 | else if (strcmp(client->name, "rs5c372b") == 0) | |
528 | rs5c372->type = rtc_rs5c372b; | |
529 | else if (strcmp(client->name, "rv5c386") == 0) | |
530 | rs5c372->type = rtc_rv5c386; | |
531 | else if (strcmp(client->name, "rv5c387a") == 0) | |
532 | rs5c372->type = rtc_rv5c387a; | |
533 | else { | |
cb26b572 DB |
534 | rs5c372->type = rtc_rs5c372b; |
535 | dev_warn(&client->dev, "assuming rs5c372b\n"); | |
536 | } | |
537 | ||
538 | /* clock may be set for am/pm or 24 hr time */ | |
539 | switch (rs5c372->type) { | |
540 | case rtc_rs5c372a: | |
541 | case rtc_rs5c372b: | |
542 | /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b. | |
543 | * so does periodic irq, except some 327a modes. | |
544 | */ | |
545 | if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24) | |
546 | rs5c372->time24 = 1; | |
547 | break; | |
548 | case rtc_rv5c386: | |
549 | case rtc_rv5c387a: | |
550 | if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24) | |
551 | rs5c372->time24 = 1; | |
552 | /* alarm uses ALARM_W; and nINTRB for alarm and periodic | |
553 | * irq, on both 386 and 387 | |
554 | */ | |
555 | break; | |
556 | default: | |
557 | dev_err(&client->dev, "unknown RTC type\n"); | |
d815461c | 558 | goto exit_kfree; |
cb26b572 DB |
559 | } |
560 | ||
561 | /* if the oscillator lost power and no other software (like | |
562 | * the bootloader) set it up, do it here. | |
563 | */ | |
564 | if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP) { | |
565 | unsigned char buf[3]; | |
566 | ||
567 | rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP; | |
568 | ||
569 | buf[0] = RS5C_ADDR(RS5C_REG_CTRL1); | |
570 | buf[1] = rs5c372->regs[RS5C_REG_CTRL1]; | |
571 | buf[2] = rs5c372->regs[RS5C_REG_CTRL2]; | |
572 | ||
573 | /* use 24hr mode */ | |
574 | switch (rs5c372->type) { | |
575 | case rtc_rs5c372a: | |
576 | case rtc_rs5c372b: | |
577 | buf[2] |= RS5C372_CTRL2_24; | |
578 | rs5c372->time24 = 1; | |
579 | break; | |
580 | case rtc_rv5c386: | |
581 | case rtc_rv5c387a: | |
582 | buf[1] |= RV5C387_CTRL1_24; | |
583 | rs5c372->time24 = 1; | |
584 | break; | |
585 | default: | |
586 | /* impossible */ | |
587 | break; | |
588 | } | |
589 | ||
590 | if ((i2c_master_send(client, buf, 3)) != 3) { | |
591 | dev_err(&client->dev, "setup error\n"); | |
d815461c | 592 | goto exit_kfree; |
cb26b572 DB |
593 | } |
594 | rs5c372->regs[RS5C_REG_CTRL1] = buf[1]; | |
595 | rs5c372->regs[RS5C_REG_CTRL2] = buf[2]; | |
596 | } | |
597 | ||
598 | if (rs5c372_get_datetime(client, &tm) < 0) | |
599 | dev_warn(&client->dev, "clock needs to be set\n"); | |
600 | ||
601 | dev_info(&client->dev, "%s found, %s, driver version " DRV_VERSION "\n", | |
602 | ({ char *s; switch (rs5c372->type) { | |
603 | case rtc_rs5c372a: s = "rs5c372a"; break; | |
604 | case rtc_rs5c372b: s = "rs5c372b"; break; | |
605 | case rtc_rv5c386: s = "rv5c386"; break; | |
606 | case rtc_rv5c387a: s = "rv5c387a"; break; | |
607 | default: s = "chip"; break; | |
608 | }; s;}), | |
609 | rs5c372->time24 ? "24hr" : "am/pm" | |
610 | ); | |
611 | ||
d815461c | 612 | /* REVISIT use client->irq to register alarm irq ... */ |
7520b94d | 613 | |
c6f24f99 RV |
614 | rs5c372->rtc = rtc_device_register(rs5c372_driver.driver.name, |
615 | &client->dev, &rs5c372_rtc_ops, THIS_MODULE); | |
7520b94d | 616 | |
c6f24f99 RV |
617 | if (IS_ERR(rs5c372->rtc)) { |
618 | err = PTR_ERR(rs5c372->rtc); | |
d815461c | 619 | goto exit_kfree; |
7520b94d AZ |
620 | } |
621 | ||
cb26b572 | 622 | err = rs5c_sysfs_register(&client->dev); |
c6f24f99 RV |
623 | if (err) |
624 | goto exit_devreg; | |
7520b94d AZ |
625 | |
626 | return 0; | |
627 | ||
91046a8a | 628 | exit_devreg: |
c6f24f99 | 629 | rtc_device_unregister(rs5c372->rtc); |
91046a8a | 630 | |
7520b94d | 631 | exit_kfree: |
c6f24f99 | 632 | kfree(rs5c372); |
7520b94d AZ |
633 | |
634 | exit: | |
635 | return err; | |
636 | } | |
637 | ||
d815461c | 638 | static int rs5c372_remove(struct i2c_client *client) |
cb26b572 | 639 | { |
c6f24f99 | 640 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
7520b94d | 641 | |
d815461c DB |
642 | rtc_device_unregister(rs5c372->rtc); |
643 | rs5c_sysfs_unregister(&client->dev); | |
c6f24f99 | 644 | kfree(rs5c372); |
7520b94d AZ |
645 | return 0; |
646 | } | |
647 | ||
cb26b572 DB |
648 | static struct i2c_driver rs5c372_driver = { |
649 | .driver = { | |
650 | .name = "rtc-rs5c372", | |
651 | }, | |
d815461c DB |
652 | .probe = rs5c372_probe, |
653 | .remove = rs5c372_remove, | |
cb26b572 DB |
654 | }; |
655 | ||
7520b94d AZ |
656 | static __init int rs5c372_init(void) |
657 | { | |
658 | return i2c_add_driver(&rs5c372_driver); | |
659 | } | |
660 | ||
661 | static __exit void rs5c372_exit(void) | |
662 | { | |
663 | i2c_del_driver(&rs5c372_driver); | |
664 | } | |
665 | ||
666 | module_init(rs5c372_init); | |
667 | module_exit(rs5c372_exit); | |
668 | ||
669 | MODULE_AUTHOR( | |
670 | "Pavel Mironchik <pmironchik@optifacio.net>, " | |
671 | "Alessandro Zummo <a.zummo@towertech.it>"); | |
672 | MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver"); | |
673 | MODULE_LICENSE("GPL"); | |
674 | MODULE_VERSION(DRV_VERSION); |