Commit | Line | Data |
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c46288b0 BB |
1 | /* |
2 | * Seiko Instruments S-35390A RTC Driver | |
3 | * | |
4 | * Copyright (c) 2007 Byron Bradley | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the License, or (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/rtc.h> | |
14 | #include <linux/i2c.h> | |
15 | #include <linux/bitrev.h> | |
16 | #include <linux/bcd.h> | |
17 | #include <linux/slab.h> | |
8e6583f1 | 18 | #include <linux/delay.h> |
c46288b0 BB |
19 | |
20 | #define S35390A_CMD_STATUS1 0 | |
21 | #define S35390A_CMD_STATUS2 1 | |
22 | #define S35390A_CMD_TIME1 2 | |
542dd33a ML |
23 | #define S35390A_CMD_TIME2 3 |
24 | #define S35390A_CMD_INT2_REG1 5 | |
c46288b0 BB |
25 | |
26 | #define S35390A_BYTE_YEAR 0 | |
27 | #define S35390A_BYTE_MONTH 1 | |
28 | #define S35390A_BYTE_DAY 2 | |
29 | #define S35390A_BYTE_WDAY 3 | |
30 | #define S35390A_BYTE_HOURS 4 | |
31 | #define S35390A_BYTE_MINS 5 | |
32 | #define S35390A_BYTE_SECS 6 | |
33 | ||
542dd33a ML |
34 | #define S35390A_ALRM_BYTE_WDAY 0 |
35 | #define S35390A_ALRM_BYTE_HOURS 1 | |
36 | #define S35390A_ALRM_BYTE_MINS 2 | |
37 | ||
3bd32722 | 38 | /* flags for STATUS1 */ |
c46288b0 BB |
39 | #define S35390A_FLAG_POC 0x01 |
40 | #define S35390A_FLAG_BLD 0x02 | |
3bd32722 | 41 | #define S35390A_FLAG_INT2 0x04 |
c46288b0 BB |
42 | #define S35390A_FLAG_24H 0x40 |
43 | #define S35390A_FLAG_RESET 0x80 | |
3bd32722 UKK |
44 | |
45 | /* flag for STATUS2 */ | |
c46288b0 BB |
46 | #define S35390A_FLAG_TEST 0x01 |
47 | ||
542dd33a ML |
48 | #define S35390A_INT2_MODE_MASK 0xF0 |
49 | ||
50 | #define S35390A_INT2_MODE_NOINTR 0x00 | |
51 | #define S35390A_INT2_MODE_FREQ 0x10 | |
52 | #define S35390A_INT2_MODE_ALARM 0x40 | |
53 | #define S35390A_INT2_MODE_PMIN_EDG 0x20 | |
54 | ||
3760f736 JD |
55 | static const struct i2c_device_id s35390a_id[] = { |
56 | { "s35390a", 0 }, | |
57 | { } | |
58 | }; | |
59 | MODULE_DEVICE_TABLE(i2c, s35390a_id); | |
60 | ||
c46288b0 BB |
61 | struct s35390a { |
62 | struct i2c_client *client[8]; | |
63 | struct rtc_device *rtc; | |
64 | int twentyfourhour; | |
65 | }; | |
66 | ||
67 | static int s35390a_set_reg(struct s35390a *s35390a, int reg, char *buf, int len) | |
68 | { | |
69 | struct i2c_client *client = s35390a->client[reg]; | |
70 | struct i2c_msg msg[] = { | |
65659f63 S |
71 | { |
72 | .addr = client->addr, | |
73 | .len = len, | |
74 | .buf = buf | |
75 | }, | |
c46288b0 BB |
76 | }; |
77 | ||
78 | if ((i2c_transfer(client->adapter, msg, 1)) != 1) | |
79 | return -EIO; | |
80 | ||
81 | return 0; | |
82 | } | |
83 | ||
84 | static int s35390a_get_reg(struct s35390a *s35390a, int reg, char *buf, int len) | |
85 | { | |
86 | struct i2c_client *client = s35390a->client[reg]; | |
87 | struct i2c_msg msg[] = { | |
65659f63 S |
88 | { |
89 | .addr = client->addr, | |
90 | .flags = I2C_M_RD, | |
91 | .len = len, | |
92 | .buf = buf | |
93 | }, | |
c46288b0 BB |
94 | }; |
95 | ||
96 | if ((i2c_transfer(client->adapter, msg, 1)) != 1) | |
97 | return -EIO; | |
98 | ||
99 | return 0; | |
100 | } | |
101 | ||
8e6583f1 UKK |
102 | /* |
103 | * Returns <0 on error, 0 if rtc is setup fine and 1 if the chip was reset. | |
104 | * To keep the information if an irq is pending, pass the value read from | |
105 | * STATUS1 to the caller. | |
106 | */ | |
107 | static int s35390a_reset(struct s35390a *s35390a, char *status1) | |
c46288b0 | 108 | { |
8e6583f1 UKK |
109 | char buf; |
110 | int ret; | |
111 | unsigned initcount = 0; | |
c46288b0 | 112 | |
8e6583f1 UKK |
113 | ret = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, status1, 1); |
114 | if (ret < 0) | |
115 | return ret; | |
c46288b0 | 116 | |
8e6583f1 UKK |
117 | if (*status1 & S35390A_FLAG_POC) |
118 | /* | |
119 | * Do not communicate for 0.5 seconds since the power-on | |
120 | * detection circuit is in operation. | |
121 | */ | |
122 | msleep(500); | |
123 | else if (!(*status1 & S35390A_FLAG_BLD)) | |
124 | /* | |
125 | * If both POC and BLD are unset everything is fine. | |
126 | */ | |
c46288b0 BB |
127 | return 0; |
128 | ||
8e6583f1 UKK |
129 | /* |
130 | * At least one of POC and BLD are set, so reinitialise chip. Keeping | |
131 | * this information in the hardware to know later that the time isn't | |
132 | * valid is unfortunately not possible because POC and BLD are cleared | |
133 | * on read. So the reset is best done now. | |
134 | * | |
135 | * The 24H bit is kept over reset, so set it already here. | |
136 | */ | |
137 | initialize: | |
138 | *status1 = S35390A_FLAG_24H; | |
139 | buf = S35390A_FLAG_RESET | S35390A_FLAG_24H; | |
140 | ret = s35390a_set_reg(s35390a, S35390A_CMD_STATUS1, &buf, 1); | |
141 | ||
142 | if (ret < 0) | |
143 | return ret; | |
144 | ||
145 | ret = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, &buf, 1); | |
146 | if (ret < 0) | |
147 | return ret; | |
148 | ||
149 | if (buf & (S35390A_FLAG_POC | S35390A_FLAG_BLD)) { | |
150 | /* Try up to five times to reset the chip */ | |
151 | if (initcount < 5) { | |
152 | ++initcount; | |
153 | goto initialize; | |
154 | } else | |
155 | return -EIO; | |
156 | } | |
157 | ||
158 | return 1; | |
c46288b0 BB |
159 | } |
160 | ||
161 | static int s35390a_disable_test_mode(struct s35390a *s35390a) | |
162 | { | |
163 | char buf[1]; | |
164 | ||
165 | if (s35390a_get_reg(s35390a, S35390A_CMD_STATUS2, buf, sizeof(buf)) < 0) | |
166 | return -EIO; | |
167 | ||
168 | if (!(buf[0] & S35390A_FLAG_TEST)) | |
169 | return 0; | |
170 | ||
171 | buf[0] &= ~S35390A_FLAG_TEST; | |
172 | return s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, buf, sizeof(buf)); | |
173 | } | |
174 | ||
175 | static char s35390a_hr2reg(struct s35390a *s35390a, int hour) | |
176 | { | |
177 | if (s35390a->twentyfourhour) | |
fe20ba70 | 178 | return bin2bcd(hour); |
c46288b0 BB |
179 | |
180 | if (hour < 12) | |
fe20ba70 | 181 | return bin2bcd(hour); |
c46288b0 | 182 | |
fe20ba70 | 183 | return 0x40 | bin2bcd(hour - 12); |
c46288b0 BB |
184 | } |
185 | ||
186 | static int s35390a_reg2hr(struct s35390a *s35390a, char reg) | |
187 | { | |
188 | unsigned hour; | |
189 | ||
190 | if (s35390a->twentyfourhour) | |
fe20ba70 | 191 | return bcd2bin(reg & 0x3f); |
c46288b0 | 192 | |
fe20ba70 | 193 | hour = bcd2bin(reg & 0x3f); |
c46288b0 BB |
194 | if (reg & 0x40) |
195 | hour += 12; | |
196 | ||
197 | return hour; | |
198 | } | |
199 | ||
200 | static int s35390a_set_datetime(struct i2c_client *client, struct rtc_time *tm) | |
201 | { | |
202 | struct s35390a *s35390a = i2c_get_clientdata(client); | |
203 | int i, err; | |
204 | char buf[7]; | |
205 | ||
206 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d mday=%d, " | |
207 | "mon=%d, year=%d, wday=%d\n", __func__, tm->tm_sec, | |
208 | tm->tm_min, tm->tm_hour, tm->tm_mday, tm->tm_mon, tm->tm_year, | |
209 | tm->tm_wday); | |
210 | ||
fe20ba70 AB |
211 | buf[S35390A_BYTE_YEAR] = bin2bcd(tm->tm_year - 100); |
212 | buf[S35390A_BYTE_MONTH] = bin2bcd(tm->tm_mon + 1); | |
213 | buf[S35390A_BYTE_DAY] = bin2bcd(tm->tm_mday); | |
214 | buf[S35390A_BYTE_WDAY] = bin2bcd(tm->tm_wday); | |
c46288b0 | 215 | buf[S35390A_BYTE_HOURS] = s35390a_hr2reg(s35390a, tm->tm_hour); |
fe20ba70 AB |
216 | buf[S35390A_BYTE_MINS] = bin2bcd(tm->tm_min); |
217 | buf[S35390A_BYTE_SECS] = bin2bcd(tm->tm_sec); | |
c46288b0 BB |
218 | |
219 | /* This chip expects the bits of each byte to be in reverse order */ | |
220 | for (i = 0; i < 7; ++i) | |
221 | buf[i] = bitrev8(buf[i]); | |
222 | ||
223 | err = s35390a_set_reg(s35390a, S35390A_CMD_TIME1, buf, sizeof(buf)); | |
224 | ||
225 | return err; | |
226 | } | |
227 | ||
228 | static int s35390a_get_datetime(struct i2c_client *client, struct rtc_time *tm) | |
229 | { | |
230 | struct s35390a *s35390a = i2c_get_clientdata(client); | |
231 | char buf[7]; | |
232 | int i, err; | |
233 | ||
234 | err = s35390a_get_reg(s35390a, S35390A_CMD_TIME1, buf, sizeof(buf)); | |
235 | if (err < 0) | |
236 | return err; | |
237 | ||
238 | /* This chip returns the bits of each byte in reverse order */ | |
239 | for (i = 0; i < 7; ++i) | |
240 | buf[i] = bitrev8(buf[i]); | |
241 | ||
fe20ba70 AB |
242 | tm->tm_sec = bcd2bin(buf[S35390A_BYTE_SECS]); |
243 | tm->tm_min = bcd2bin(buf[S35390A_BYTE_MINS]); | |
c46288b0 | 244 | tm->tm_hour = s35390a_reg2hr(s35390a, buf[S35390A_BYTE_HOURS]); |
fe20ba70 AB |
245 | tm->tm_wday = bcd2bin(buf[S35390A_BYTE_WDAY]); |
246 | tm->tm_mday = bcd2bin(buf[S35390A_BYTE_DAY]); | |
247 | tm->tm_mon = bcd2bin(buf[S35390A_BYTE_MONTH]) - 1; | |
248 | tm->tm_year = bcd2bin(buf[S35390A_BYTE_YEAR]) + 100; | |
c46288b0 BB |
249 | |
250 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, mday=%d, " | |
251 | "mon=%d, year=%d, wday=%d\n", __func__, tm->tm_sec, | |
252 | tm->tm_min, tm->tm_hour, tm->tm_mday, tm->tm_mon, tm->tm_year, | |
253 | tm->tm_wday); | |
254 | ||
255 | return rtc_valid_tm(tm); | |
256 | } | |
257 | ||
542dd33a ML |
258 | static int s35390a_set_alarm(struct i2c_client *client, struct rtc_wkalrm *alm) |
259 | { | |
260 | struct s35390a *s35390a = i2c_get_clientdata(client); | |
261 | char buf[3], sts = 0; | |
262 | int err, i; | |
263 | ||
264 | dev_dbg(&client->dev, "%s: alm is secs=%d, mins=%d, hours=%d mday=%d, "\ | |
265 | "mon=%d, year=%d, wday=%d\n", __func__, alm->time.tm_sec, | |
266 | alm->time.tm_min, alm->time.tm_hour, alm->time.tm_mday, | |
267 | alm->time.tm_mon, alm->time.tm_year, alm->time.tm_wday); | |
268 | ||
5227e8a2 | 269 | /* disable interrupt (which deasserts the irq line) */ |
542dd33a ML |
270 | err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts)); |
271 | if (err < 0) | |
272 | return err; | |
273 | ||
5227e8a2 | 274 | /* clear pending interrupt (in STATUS1 only), if any */ |
542dd33a ML |
275 | err = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, &sts, sizeof(sts)); |
276 | if (err < 0) | |
277 | return err; | |
278 | ||
279 | if (alm->enabled) | |
280 | sts = S35390A_INT2_MODE_ALARM; | |
281 | else | |
282 | sts = S35390A_INT2_MODE_NOINTR; | |
283 | ||
284 | /* This chip expects the bits of each byte to be in reverse order */ | |
285 | sts = bitrev8(sts); | |
286 | ||
287 | /* set interupt mode*/ | |
288 | err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts)); | |
289 | if (err < 0) | |
290 | return err; | |
291 | ||
292 | if (alm->time.tm_wday != -1) | |
293 | buf[S35390A_ALRM_BYTE_WDAY] = bin2bcd(alm->time.tm_wday) | 0x80; | |
f87e904d UKK |
294 | else |
295 | buf[S35390A_ALRM_BYTE_WDAY] = 0; | |
542dd33a ML |
296 | |
297 | buf[S35390A_ALRM_BYTE_HOURS] = s35390a_hr2reg(s35390a, | |
298 | alm->time.tm_hour) | 0x80; | |
299 | buf[S35390A_ALRM_BYTE_MINS] = bin2bcd(alm->time.tm_min) | 0x80; | |
300 | ||
301 | if (alm->time.tm_hour >= 12) | |
302 | buf[S35390A_ALRM_BYTE_HOURS] |= 0x40; | |
303 | ||
304 | for (i = 0; i < 3; ++i) | |
305 | buf[i] = bitrev8(buf[i]); | |
306 | ||
307 | err = s35390a_set_reg(s35390a, S35390A_CMD_INT2_REG1, buf, | |
308 | sizeof(buf)); | |
309 | ||
310 | return err; | |
311 | } | |
312 | ||
313 | static int s35390a_read_alarm(struct i2c_client *client, struct rtc_wkalrm *alm) | |
314 | { | |
315 | struct s35390a *s35390a = i2c_get_clientdata(client); | |
316 | char buf[3], sts; | |
317 | int i, err; | |
318 | ||
319 | err = s35390a_get_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts)); | |
320 | if (err < 0) | |
321 | return err; | |
322 | ||
f87e904d UKK |
323 | if ((bitrev8(sts) & S35390A_INT2_MODE_MASK) != S35390A_INT2_MODE_ALARM) { |
324 | /* | |
325 | * When the alarm isn't enabled, the register to configure | |
326 | * the alarm time isn't accessible. | |
327 | */ | |
328 | alm->enabled = 0; | |
329 | return 0; | |
330 | } else { | |
331 | alm->enabled = 1; | |
332 | } | |
542dd33a ML |
333 | |
334 | err = s35390a_get_reg(s35390a, S35390A_CMD_INT2_REG1, buf, sizeof(buf)); | |
335 | if (err < 0) | |
336 | return err; | |
337 | ||
338 | /* This chip returns the bits of each byte in reverse order */ | |
f87e904d | 339 | for (i = 0; i < 3; ++i) |
542dd33a | 340 | buf[i] = bitrev8(buf[i]); |
542dd33a | 341 | |
f87e904d UKK |
342 | /* |
343 | * B0 of the three matching registers is an enable flag. Iff it is set | |
344 | * the configured value is used for matching. | |
345 | */ | |
346 | if (buf[S35390A_ALRM_BYTE_WDAY] & 0x80) | |
347 | alm->time.tm_wday = | |
348 | bcd2bin(buf[S35390A_ALRM_BYTE_WDAY] & ~0x80); | |
349 | ||
350 | if (buf[S35390A_ALRM_BYTE_HOURS] & 0x80) | |
351 | alm->time.tm_hour = | |
352 | s35390a_reg2hr(s35390a, | |
353 | buf[S35390A_ALRM_BYTE_HOURS] & ~0x80); | |
354 | ||
355 | if (buf[S35390A_ALRM_BYTE_MINS] & 0x80) | |
356 | alm->time.tm_min = bcd2bin(buf[S35390A_ALRM_BYTE_MINS] & ~0x80); | |
357 | ||
358 | /* alarm triggers always at s=0 */ | |
359 | alm->time.tm_sec = 0; | |
542dd33a ML |
360 | |
361 | dev_dbg(&client->dev, "%s: alm is mins=%d, hours=%d, wday=%d\n", | |
362 | __func__, alm->time.tm_min, alm->time.tm_hour, | |
363 | alm->time.tm_wday); | |
364 | ||
365 | return 0; | |
366 | } | |
367 | ||
368 | static int s35390a_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) | |
369 | { | |
370 | return s35390a_read_alarm(to_i2c_client(dev), alm); | |
371 | } | |
372 | ||
373 | static int s35390a_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) | |
374 | { | |
375 | return s35390a_set_alarm(to_i2c_client(dev), alm); | |
376 | } | |
377 | ||
c46288b0 BB |
378 | static int s35390a_rtc_read_time(struct device *dev, struct rtc_time *tm) |
379 | { | |
380 | return s35390a_get_datetime(to_i2c_client(dev), tm); | |
381 | } | |
382 | ||
383 | static int s35390a_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
384 | { | |
385 | return s35390a_set_datetime(to_i2c_client(dev), tm); | |
386 | } | |
387 | ||
388 | static const struct rtc_class_ops s35390a_rtc_ops = { | |
389 | .read_time = s35390a_rtc_read_time, | |
390 | .set_time = s35390a_rtc_set_time, | |
542dd33a ML |
391 | .set_alarm = s35390a_rtc_set_alarm, |
392 | .read_alarm = s35390a_rtc_read_alarm, | |
393 | ||
c46288b0 BB |
394 | }; |
395 | ||
396 | static struct i2c_driver s35390a_driver; | |
397 | ||
d2653e92 JD |
398 | static int s35390a_probe(struct i2c_client *client, |
399 | const struct i2c_device_id *id) | |
c46288b0 | 400 | { |
3bd32722 | 401 | int err, err_reset; |
c46288b0 BB |
402 | unsigned int i; |
403 | struct s35390a *s35390a; | |
404 | struct rtc_time tm; | |
3bd32722 | 405 | char buf, status1; |
c46288b0 BB |
406 | |
407 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { | |
408 | err = -ENODEV; | |
409 | goto exit; | |
410 | } | |
411 | ||
b4cd3d6a JH |
412 | s35390a = devm_kzalloc(&client->dev, sizeof(struct s35390a), |
413 | GFP_KERNEL); | |
c46288b0 BB |
414 | if (!s35390a) { |
415 | err = -ENOMEM; | |
416 | goto exit; | |
417 | } | |
418 | ||
419 | s35390a->client[0] = client; | |
420 | i2c_set_clientdata(client, s35390a); | |
421 | ||
422 | /* This chip uses multiple addresses, use dummy devices for them */ | |
423 | for (i = 1; i < 8; ++i) { | |
424 | s35390a->client[i] = i2c_new_dummy(client->adapter, | |
60b129d7 | 425 | client->addr + i); |
c46288b0 BB |
426 | if (!s35390a->client[i]) { |
427 | dev_err(&client->dev, "Address %02x unavailable\n", | |
428 | client->addr + i); | |
429 | err = -EBUSY; | |
430 | goto exit_dummy; | |
431 | } | |
432 | } | |
433 | ||
3bd32722 UKK |
434 | err_reset = s35390a_reset(s35390a, &status1); |
435 | if (err_reset < 0) { | |
436 | err = err_reset; | |
c46288b0 BB |
437 | dev_err(&client->dev, "error resetting chip\n"); |
438 | goto exit_dummy; | |
439 | } | |
440 | ||
3bd32722 | 441 | if (status1 & S35390A_FLAG_24H) |
c46288b0 BB |
442 | s35390a->twentyfourhour = 1; |
443 | else | |
444 | s35390a->twentyfourhour = 0; | |
445 | ||
3bd32722 UKK |
446 | if (status1 & S35390A_FLAG_INT2) { |
447 | /* disable alarm (and maybe test mode) */ | |
448 | buf = 0; | |
449 | err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &buf, 1); | |
450 | if (err < 0) { | |
451 | dev_err(&client->dev, "error disabling alarm"); | |
452 | goto exit_dummy; | |
453 | } | |
454 | } else { | |
455 | err = s35390a_disable_test_mode(s35390a); | |
456 | if (err < 0) { | |
457 | dev_err(&client->dev, "error disabling test mode\n"); | |
458 | goto exit_dummy; | |
459 | } | |
460 | } | |
461 | ||
462 | if (err_reset > 0 || s35390a_get_datetime(client, &tm) < 0) | |
c46288b0 BB |
463 | dev_warn(&client->dev, "clock needs to be set\n"); |
464 | ||
542dd33a ML |
465 | device_set_wakeup_capable(&client->dev, 1); |
466 | ||
b4cd3d6a JH |
467 | s35390a->rtc = devm_rtc_device_register(&client->dev, |
468 | s35390a_driver.driver.name, | |
469 | &s35390a_rtc_ops, THIS_MODULE); | |
c46288b0 BB |
470 | |
471 | if (IS_ERR(s35390a->rtc)) { | |
472 | err = PTR_ERR(s35390a->rtc); | |
473 | goto exit_dummy; | |
474 | } | |
3bd32722 UKK |
475 | |
476 | if (status1 & S35390A_FLAG_INT2) | |
477 | rtc_update_irq(s35390a->rtc, 1, RTC_AF); | |
478 | ||
c46288b0 BB |
479 | return 0; |
480 | ||
481 | exit_dummy: | |
482 | for (i = 1; i < 8; ++i) | |
483 | if (s35390a->client[i]) | |
484 | i2c_unregister_device(s35390a->client[i]); | |
c46288b0 BB |
485 | |
486 | exit: | |
487 | return err; | |
488 | } | |
489 | ||
490 | static int s35390a_remove(struct i2c_client *client) | |
491 | { | |
492 | unsigned int i; | |
c46288b0 | 493 | struct s35390a *s35390a = i2c_get_clientdata(client); |
b4cd3d6a | 494 | |
c46288b0 BB |
495 | for (i = 1; i < 8; ++i) |
496 | if (s35390a->client[i]) | |
497 | i2c_unregister_device(s35390a->client[i]); | |
498 | ||
c46288b0 BB |
499 | return 0; |
500 | } | |
501 | ||
502 | static struct i2c_driver s35390a_driver = { | |
503 | .driver = { | |
504 | .name = "rtc-s35390a", | |
505 | }, | |
506 | .probe = s35390a_probe, | |
507 | .remove = s35390a_remove, | |
3760f736 | 508 | .id_table = s35390a_id, |
c46288b0 BB |
509 | }; |
510 | ||
0abc9201 | 511 | module_i2c_driver(s35390a_driver); |
c46288b0 BB |
512 | |
513 | MODULE_AUTHOR("Byron Bradley <byron.bbradley@gmail.com>"); | |
514 | MODULE_DESCRIPTION("S35390A RTC driver"); | |
515 | MODULE_LICENSE("GPL"); |