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1add6781 BD |
1 | /* drivers/rtc/rtc-s3c.c |
2 | * | |
3 | * Copyright (c) 2004,2006 Simtec Electronics | |
4 | * Ben Dooks, <ben@simtec.co.uk> | |
5 | * http://armlinux.simtec.co.uk/ | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * S3C2410/S3C2440/S3C24XX Internal RTC Driver | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/fs.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/rtc.h> | |
21 | #include <linux/bcd.h> | |
22 | #include <linux/clk.h> | |
9974b6ea | 23 | #include <linux/log2.h> |
5a0e3ad6 | 24 | #include <linux/slab.h> |
1add6781 | 25 | |
a09e64fb | 26 | #include <mach/hardware.h> |
1add6781 BD |
27 | #include <asm/uaccess.h> |
28 | #include <asm/io.h> | |
29 | #include <asm/irq.h> | |
e2cd00cf | 30 | #include <plat/regs-rtc.h> |
1add6781 BD |
31 | |
32 | /* I have yet to find an S3C implementation with more than one | |
33 | * of these rtc blocks in */ | |
34 | ||
35 | static struct resource *s3c_rtc_mem; | |
36 | ||
37 | static void __iomem *s3c_rtc_base; | |
38 | static int s3c_rtc_alarmno = NO_IRQ; | |
39 | static int s3c_rtc_tickno = NO_IRQ; | |
1add6781 BD |
40 | |
41 | static DEFINE_SPINLOCK(s3c_rtc_pie_lock); | |
1add6781 BD |
42 | |
43 | /* IRQ Handlers */ | |
44 | ||
7d12e780 | 45 | static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) |
1add6781 BD |
46 | { |
47 | struct rtc_device *rdev = id; | |
48 | ||
ab6a2d70 | 49 | rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF); |
1add6781 BD |
50 | return IRQ_HANDLED; |
51 | } | |
52 | ||
7d12e780 | 53 | static irqreturn_t s3c_rtc_tickirq(int irq, void *id) |
1add6781 BD |
54 | { |
55 | struct rtc_device *rdev = id; | |
56 | ||
773be7ee | 57 | rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF); |
1add6781 BD |
58 | return IRQ_HANDLED; |
59 | } | |
60 | ||
61 | /* Update control registers */ | |
62 | static void s3c_rtc_setaie(int to) | |
63 | { | |
64 | unsigned int tmp; | |
65 | ||
2a4e2b87 | 66 | pr_debug("%s: aie=%d\n", __func__, to); |
1add6781 | 67 | |
9a654518 | 68 | tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; |
1add6781 BD |
69 | |
70 | if (to) | |
71 | tmp |= S3C2410_RTCALM_ALMEN; | |
72 | ||
9a654518 | 73 | writeb(tmp, s3c_rtc_base + S3C2410_RTCALM); |
1add6781 BD |
74 | } |
75 | ||
773be7ee | 76 | static int s3c_rtc_setpie(struct device *dev, int enabled) |
1add6781 BD |
77 | { |
78 | unsigned int tmp; | |
79 | ||
773be7ee | 80 | pr_debug("%s: pie=%d\n", __func__, enabled); |
1add6781 BD |
81 | |
82 | spin_lock_irq(&s3c_rtc_pie_lock); | |
9a654518 | 83 | tmp = readb(s3c_rtc_base + S3C2410_TICNT) & ~S3C2410_TICNT_ENABLE; |
1add6781 | 84 | |
773be7ee | 85 | if (enabled) |
1add6781 BD |
86 | tmp |= S3C2410_TICNT_ENABLE; |
87 | ||
9a654518 | 88 | writeb(tmp, s3c_rtc_base + S3C2410_TICNT); |
1add6781 | 89 | spin_unlock_irq(&s3c_rtc_pie_lock); |
773be7ee BD |
90 | |
91 | return 0; | |
1add6781 BD |
92 | } |
93 | ||
773be7ee | 94 | static int s3c_rtc_setfreq(struct device *dev, int freq) |
1add6781 BD |
95 | { |
96 | unsigned int tmp; | |
97 | ||
5d2a5037 JC |
98 | if (!is_power_of_2(freq)) |
99 | return -EINVAL; | |
100 | ||
1add6781 | 101 | spin_lock_irq(&s3c_rtc_pie_lock); |
1add6781 | 102 | |
773be7ee | 103 | tmp = readb(s3c_rtc_base + S3C2410_TICNT) & S3C2410_TICNT_ENABLE; |
1add6781 BD |
104 | tmp |= (128 / freq)-1; |
105 | ||
9a654518 | 106 | writeb(tmp, s3c_rtc_base + S3C2410_TICNT); |
1add6781 | 107 | spin_unlock_irq(&s3c_rtc_pie_lock); |
773be7ee BD |
108 | |
109 | return 0; | |
1add6781 BD |
110 | } |
111 | ||
112 | /* Time read/write */ | |
113 | ||
114 | static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) | |
115 | { | |
116 | unsigned int have_retried = 0; | |
9a654518 | 117 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
118 | |
119 | retry_get_time: | |
9a654518 BD |
120 | rtc_tm->tm_min = readb(base + S3C2410_RTCMIN); |
121 | rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR); | |
122 | rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE); | |
123 | rtc_tm->tm_mon = readb(base + S3C2410_RTCMON); | |
124 | rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR); | |
125 | rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC); | |
1add6781 BD |
126 | |
127 | /* the only way to work out wether the system was mid-update | |
128 | * when we read it is to check the second counter, and if it | |
129 | * is zero, then we re-try the entire read | |
130 | */ | |
131 | ||
132 | if (rtc_tm->tm_sec == 0 && !have_retried) { | |
133 | have_retried = 1; | |
134 | goto retry_get_time; | |
135 | } | |
136 | ||
137 | pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n", | |
138 | rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday, | |
139 | rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec); | |
140 | ||
fe20ba70 AB |
141 | rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec); |
142 | rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min); | |
143 | rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour); | |
144 | rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday); | |
145 | rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon); | |
146 | rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year); | |
1add6781 BD |
147 | |
148 | rtc_tm->tm_year += 100; | |
149 | rtc_tm->tm_mon -= 1; | |
150 | ||
151 | return 0; | |
152 | } | |
153 | ||
154 | static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) | |
155 | { | |
9a654518 | 156 | void __iomem *base = s3c_rtc_base; |
641741e0 | 157 | int year = tm->tm_year - 100; |
9a654518 | 158 | |
641741e0 BD |
159 | pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n", |
160 | tm->tm_year, tm->tm_mon, tm->tm_mday, | |
161 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
162 | ||
163 | /* we get around y2k by simply not supporting it */ | |
1add6781 | 164 | |
641741e0 | 165 | if (year < 0 || year >= 100) { |
9a654518 | 166 | dev_err(dev, "rtc only supports 100 years\n"); |
1add6781 | 167 | return -EINVAL; |
9a654518 BD |
168 | } |
169 | ||
fe20ba70 AB |
170 | writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC); |
171 | writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN); | |
172 | writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR); | |
173 | writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE); | |
174 | writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON); | |
175 | writeb(bin2bcd(year), base + S3C2410_RTCYEAR); | |
1add6781 BD |
176 | |
177 | return 0; | |
178 | } | |
179 | ||
180 | static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
181 | { | |
182 | struct rtc_time *alm_tm = &alrm->time; | |
9a654518 | 183 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
184 | unsigned int alm_en; |
185 | ||
9a654518 BD |
186 | alm_tm->tm_sec = readb(base + S3C2410_ALMSEC); |
187 | alm_tm->tm_min = readb(base + S3C2410_ALMMIN); | |
188 | alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR); | |
189 | alm_tm->tm_mon = readb(base + S3C2410_ALMMON); | |
190 | alm_tm->tm_mday = readb(base + S3C2410_ALMDATE); | |
191 | alm_tm->tm_year = readb(base + S3C2410_ALMYEAR); | |
1add6781 | 192 | |
9a654518 | 193 | alm_en = readb(base + S3C2410_RTCALM); |
1add6781 | 194 | |
a2db8dfc DB |
195 | alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0; |
196 | ||
1add6781 BD |
197 | pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n", |
198 | alm_en, | |
199 | alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday, | |
200 | alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec); | |
201 | ||
202 | ||
203 | /* decode the alarm enable field */ | |
204 | ||
205 | if (alm_en & S3C2410_RTCALM_SECEN) | |
fe20ba70 | 206 | alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec); |
1add6781 BD |
207 | else |
208 | alm_tm->tm_sec = 0xff; | |
209 | ||
210 | if (alm_en & S3C2410_RTCALM_MINEN) | |
fe20ba70 | 211 | alm_tm->tm_min = bcd2bin(alm_tm->tm_min); |
1add6781 BD |
212 | else |
213 | alm_tm->tm_min = 0xff; | |
214 | ||
215 | if (alm_en & S3C2410_RTCALM_HOUREN) | |
fe20ba70 | 216 | alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour); |
1add6781 BD |
217 | else |
218 | alm_tm->tm_hour = 0xff; | |
219 | ||
220 | if (alm_en & S3C2410_RTCALM_DAYEN) | |
fe20ba70 | 221 | alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday); |
1add6781 BD |
222 | else |
223 | alm_tm->tm_mday = 0xff; | |
224 | ||
225 | if (alm_en & S3C2410_RTCALM_MONEN) { | |
fe20ba70 | 226 | alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon); |
1add6781 BD |
227 | alm_tm->tm_mon -= 1; |
228 | } else { | |
229 | alm_tm->tm_mon = 0xff; | |
230 | } | |
231 | ||
232 | if (alm_en & S3C2410_RTCALM_YEAREN) | |
fe20ba70 | 233 | alm_tm->tm_year = bcd2bin(alm_tm->tm_year); |
1add6781 BD |
234 | else |
235 | alm_tm->tm_year = 0xffff; | |
236 | ||
237 | return 0; | |
238 | } | |
239 | ||
240 | static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
241 | { | |
242 | struct rtc_time *tm = &alrm->time; | |
9a654518 | 243 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
244 | unsigned int alrm_en; |
245 | ||
246 | pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n", | |
247 | alrm->enabled, | |
248 | tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff, | |
249 | tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec); | |
250 | ||
251 | ||
9a654518 BD |
252 | alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; |
253 | writeb(0x00, base + S3C2410_RTCALM); | |
1add6781 BD |
254 | |
255 | if (tm->tm_sec < 60 && tm->tm_sec >= 0) { | |
256 | alrm_en |= S3C2410_RTCALM_SECEN; | |
fe20ba70 | 257 | writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC); |
1add6781 BD |
258 | } |
259 | ||
260 | if (tm->tm_min < 60 && tm->tm_min >= 0) { | |
261 | alrm_en |= S3C2410_RTCALM_MINEN; | |
fe20ba70 | 262 | writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN); |
1add6781 BD |
263 | } |
264 | ||
265 | if (tm->tm_hour < 24 && tm->tm_hour >= 0) { | |
266 | alrm_en |= S3C2410_RTCALM_HOUREN; | |
fe20ba70 | 267 | writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR); |
1add6781 BD |
268 | } |
269 | ||
270 | pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en); | |
271 | ||
9a654518 | 272 | writeb(alrm_en, base + S3C2410_RTCALM); |
1add6781 | 273 | |
773be7ee | 274 | s3c_rtc_setaie(alrm->enabled); |
1add6781 BD |
275 | |
276 | if (alrm->enabled) | |
277 | enable_irq_wake(s3c_rtc_alarmno); | |
278 | else | |
279 | disable_irq_wake(s3c_rtc_alarmno); | |
280 | ||
281 | return 0; | |
282 | } | |
283 | ||
1add6781 BD |
284 | static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) |
285 | { | |
9a654518 | 286 | unsigned int ticnt = readb(s3c_rtc_base + S3C2410_TICNT); |
1add6781 | 287 | |
1add6781 BD |
288 | seq_printf(seq, "periodic_IRQ\t: %s\n", |
289 | (ticnt & S3C2410_TICNT_ENABLE) ? "yes" : "no" ); | |
1add6781 BD |
290 | return 0; |
291 | } | |
292 | ||
293 | static int s3c_rtc_open(struct device *dev) | |
294 | { | |
295 | struct platform_device *pdev = to_platform_device(dev); | |
296 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | |
297 | int ret; | |
298 | ||
299 | ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq, | |
38515e90 | 300 | IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev); |
1add6781 BD |
301 | |
302 | if (ret) { | |
303 | dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret); | |
304 | return ret; | |
305 | } | |
306 | ||
307 | ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq, | |
38515e90 | 308 | IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev); |
1add6781 BD |
309 | |
310 | if (ret) { | |
311 | dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret); | |
312 | goto tick_err; | |
313 | } | |
314 | ||
315 | return ret; | |
316 | ||
317 | tick_err: | |
318 | free_irq(s3c_rtc_alarmno, rtc_dev); | |
319 | return ret; | |
320 | } | |
321 | ||
322 | static void s3c_rtc_release(struct device *dev) | |
323 | { | |
324 | struct platform_device *pdev = to_platform_device(dev); | |
325 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | |
326 | ||
327 | /* do not clear AIE here, it may be needed for wake */ | |
328 | ||
773be7ee | 329 | s3c_rtc_setpie(dev, 0); |
1add6781 BD |
330 | free_irq(s3c_rtc_alarmno, rtc_dev); |
331 | free_irq(s3c_rtc_tickno, rtc_dev); | |
332 | } | |
333 | ||
ff8371ac | 334 | static const struct rtc_class_ops s3c_rtcops = { |
1add6781 BD |
335 | .open = s3c_rtc_open, |
336 | .release = s3c_rtc_release, | |
1add6781 BD |
337 | .read_time = s3c_rtc_gettime, |
338 | .set_time = s3c_rtc_settime, | |
339 | .read_alarm = s3c_rtc_getalarm, | |
340 | .set_alarm = s3c_rtc_setalarm, | |
773be7ee BD |
341 | .irq_set_freq = s3c_rtc_setfreq, |
342 | .irq_set_state = s3c_rtc_setpie, | |
1add6781 BD |
343 | .proc = s3c_rtc_proc, |
344 | }; | |
345 | ||
346 | static void s3c_rtc_enable(struct platform_device *pdev, int en) | |
347 | { | |
9a654518 | 348 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
349 | unsigned int tmp; |
350 | ||
351 | if (s3c_rtc_base == NULL) | |
352 | return; | |
353 | ||
354 | if (!en) { | |
9a654518 BD |
355 | tmp = readb(base + S3C2410_RTCCON); |
356 | writeb(tmp & ~S3C2410_RTCCON_RTCEN, base + S3C2410_RTCCON); | |
1add6781 | 357 | |
9a654518 BD |
358 | tmp = readb(base + S3C2410_TICNT); |
359 | writeb(tmp & ~S3C2410_TICNT_ENABLE, base + S3C2410_TICNT); | |
1add6781 BD |
360 | } else { |
361 | /* re-enable the device, and check it is ok */ | |
362 | ||
9a654518 | 363 | if ((readb(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0){ |
1add6781 BD |
364 | dev_info(&pdev->dev, "rtc disabled, re-enabling\n"); |
365 | ||
9a654518 BD |
366 | tmp = readb(base + S3C2410_RTCCON); |
367 | writeb(tmp|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON); | |
1add6781 BD |
368 | } |
369 | ||
9a654518 | 370 | if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)){ |
1add6781 BD |
371 | dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n"); |
372 | ||
9a654518 BD |
373 | tmp = readb(base + S3C2410_RTCCON); |
374 | writeb(tmp& ~S3C2410_RTCCON_CNTSEL, base+S3C2410_RTCCON); | |
1add6781 BD |
375 | } |
376 | ||
9a654518 | 377 | if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)){ |
1add6781 BD |
378 | dev_info(&pdev->dev, "removing RTCCON_CLKRST\n"); |
379 | ||
9a654518 BD |
380 | tmp = readb(base + S3C2410_RTCCON); |
381 | writeb(tmp & ~S3C2410_RTCCON_CLKRST, base+S3C2410_RTCCON); | |
1add6781 BD |
382 | } |
383 | } | |
384 | } | |
385 | ||
4cd0c5c4 | 386 | static int __devexit s3c_rtc_remove(struct platform_device *dev) |
1add6781 BD |
387 | { |
388 | struct rtc_device *rtc = platform_get_drvdata(dev); | |
389 | ||
390 | platform_set_drvdata(dev, NULL); | |
391 | rtc_device_unregister(rtc); | |
392 | ||
773be7ee | 393 | s3c_rtc_setpie(&dev->dev, 0); |
1add6781 BD |
394 | s3c_rtc_setaie(0); |
395 | ||
396 | iounmap(s3c_rtc_base); | |
397 | release_resource(s3c_rtc_mem); | |
398 | kfree(s3c_rtc_mem); | |
399 | ||
400 | return 0; | |
401 | } | |
402 | ||
4cd0c5c4 | 403 | static int __devinit s3c_rtc_probe(struct platform_device *pdev) |
1add6781 BD |
404 | { |
405 | struct rtc_device *rtc; | |
406 | struct resource *res; | |
407 | int ret; | |
408 | ||
2a4e2b87 | 409 | pr_debug("%s: probe=%p\n", __func__, pdev); |
1add6781 BD |
410 | |
411 | /* find the IRQs */ | |
412 | ||
413 | s3c_rtc_tickno = platform_get_irq(pdev, 1); | |
414 | if (s3c_rtc_tickno < 0) { | |
415 | dev_err(&pdev->dev, "no irq for rtc tick\n"); | |
416 | return -ENOENT; | |
417 | } | |
418 | ||
419 | s3c_rtc_alarmno = platform_get_irq(pdev, 0); | |
420 | if (s3c_rtc_alarmno < 0) { | |
421 | dev_err(&pdev->dev, "no irq for alarm\n"); | |
422 | return -ENOENT; | |
423 | } | |
424 | ||
425 | pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n", | |
426 | s3c_rtc_tickno, s3c_rtc_alarmno); | |
427 | ||
428 | /* get the memory region */ | |
429 | ||
430 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
431 | if (res == NULL) { | |
432 | dev_err(&pdev->dev, "failed to get memory region resource\n"); | |
433 | return -ENOENT; | |
434 | } | |
435 | ||
436 | s3c_rtc_mem = request_mem_region(res->start, | |
9a654518 BD |
437 | res->end-res->start+1, |
438 | pdev->name); | |
1add6781 BD |
439 | |
440 | if (s3c_rtc_mem == NULL) { | |
441 | dev_err(&pdev->dev, "failed to reserve memory region\n"); | |
442 | ret = -ENOENT; | |
443 | goto err_nores; | |
444 | } | |
445 | ||
446 | s3c_rtc_base = ioremap(res->start, res->end - res->start + 1); | |
447 | if (s3c_rtc_base == NULL) { | |
448 | dev_err(&pdev->dev, "failed ioremap()\n"); | |
449 | ret = -EINVAL; | |
450 | goto err_nomap; | |
451 | } | |
452 | ||
453 | /* check to see if everything is setup correctly */ | |
454 | ||
455 | s3c_rtc_enable(pdev, 1); | |
456 | ||
9a654518 BD |
457 | pr_debug("s3c2410_rtc: RTCCON=%02x\n", |
458 | readb(s3c_rtc_base + S3C2410_RTCCON)); | |
1add6781 | 459 | |
773be7ee | 460 | s3c_rtc_setfreq(&pdev->dev, 1); |
1add6781 | 461 | |
51b7616e YK |
462 | device_init_wakeup(&pdev->dev, 1); |
463 | ||
1add6781 BD |
464 | /* register RTC and exit */ |
465 | ||
466 | rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops, | |
467 | THIS_MODULE); | |
468 | ||
469 | if (IS_ERR(rtc)) { | |
470 | dev_err(&pdev->dev, "cannot attach rtc\n"); | |
471 | ret = PTR_ERR(rtc); | |
472 | goto err_nortc; | |
473 | } | |
474 | ||
475 | rtc->max_user_freq = 128; | |
476 | ||
477 | platform_set_drvdata(pdev, rtc); | |
478 | return 0; | |
479 | ||
480 | err_nortc: | |
481 | s3c_rtc_enable(pdev, 0); | |
482 | iounmap(s3c_rtc_base); | |
483 | ||
484 | err_nomap: | |
485 | release_resource(s3c_rtc_mem); | |
486 | ||
487 | err_nores: | |
488 | return ret; | |
489 | } | |
490 | ||
491 | #ifdef CONFIG_PM | |
492 | ||
493 | /* RTC Power management control */ | |
494 | ||
1add6781 BD |
495 | static int ticnt_save; |
496 | ||
497 | static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state) | |
498 | { | |
1add6781 | 499 | /* save TICNT for anyone using periodic interrupts */ |
9a654518 | 500 | ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT); |
1add6781 | 501 | s3c_rtc_enable(pdev, 0); |
1add6781 BD |
502 | return 0; |
503 | } | |
504 | ||
505 | static int s3c_rtc_resume(struct platform_device *pdev) | |
506 | { | |
1add6781 | 507 | s3c_rtc_enable(pdev, 1); |
9a654518 | 508 | writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT); |
1add6781 BD |
509 | return 0; |
510 | } | |
511 | #else | |
512 | #define s3c_rtc_suspend NULL | |
513 | #define s3c_rtc_resume NULL | |
514 | #endif | |
515 | ||
eb944db0 | 516 | static struct platform_driver s3c2410_rtc_driver = { |
1add6781 | 517 | .probe = s3c_rtc_probe, |
4cd0c5c4 | 518 | .remove = __devexit_p(s3c_rtc_remove), |
1add6781 BD |
519 | .suspend = s3c_rtc_suspend, |
520 | .resume = s3c_rtc_resume, | |
521 | .driver = { | |
522 | .name = "s3c2410-rtc", | |
523 | .owner = THIS_MODULE, | |
524 | }, | |
525 | }; | |
526 | ||
527 | static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n"; | |
528 | ||
529 | static int __init s3c_rtc_init(void) | |
530 | { | |
531 | printk(banner); | |
eb944db0 | 532 | return platform_driver_register(&s3c2410_rtc_driver); |
1add6781 BD |
533 | } |
534 | ||
535 | static void __exit s3c_rtc_exit(void) | |
536 | { | |
eb944db0 | 537 | platform_driver_unregister(&s3c2410_rtc_driver); |
1add6781 BD |
538 | } |
539 | ||
540 | module_init(s3c_rtc_init); | |
541 | module_exit(s3c_rtc_exit); | |
542 | ||
543 | MODULE_DESCRIPTION("Samsung S3C RTC Driver"); | |
544 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | |
545 | MODULE_LICENSE("GPL"); | |
ad28a07b | 546 | MODULE_ALIAS("platform:s3c2410-rtc"); |