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Merge tag 'rdma-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland...
[deliverable/linux.git] / drivers / rtc / rtc-s5m.c
CommitLineData
5bccae6e 1/*
f8b23bbd 2 * Copyright (c) 2013-2014 Samsung Electronics Co., Ltd
5bccae6e
SK		 3 * http://www.samsung.com
4 *
5 * Copyright (C) 2013 Google, Inc
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#include <linux/module.h>
19#include <linux/i2c.h>
5bccae6e 20#include <linux/bcd.h>
5bccae6e
SK		 21#include <linux/regmap.h>
22#include <linux/rtc.h>
5bccae6e
SK		 23#include <linux/platform_device.h>
24#include <linux/mfd/samsung/core.h>
25#include <linux/mfd/samsung/irq.h>
26#include <linux/mfd/samsung/rtc.h>
0c5deb1e 27#include <linux/mfd/samsung/s2mps14.h>
5bccae6e 28
d73238d4
KK		 29/*
30 * Maximum number of retries for checking changes in UDR field
602cb5bb 31 * of S5M_RTC_UDR_CON register (to limit possible endless loop).
d73238d4
KK		 32 *
33 * After writing to RTC registers (setting time or alarm) read the UDR field
602cb5bb 34 * in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have
d73238d4
KK		 35 * been transferred.
36 */
37#define UDR_READ_RETRY_CNT 5
38
f8b23bbd
KK		 39/* Registers used by the driver which are different between chipsets. */
40struct s5m_rtc_reg_config {
41 /* Number of registers used for setting time/alarm0/alarm1 */
42 unsigned int regs_count;
43 /* First register for time, seconds */
44 unsigned int time;
45 /* RTC control register */
46 unsigned int ctrl;
47 /* First register for alarm 0, seconds */
48 unsigned int alarm0;
49 /* First register for alarm 1, seconds */
50 unsigned int alarm1;
51 /* SMPL/WTSR register */
52 unsigned int smpl_wtsr;
53 /*
54 * Register for update flag (UDR). Typically setting UDR field to 1
55 * will enable update of time or alarm register. Then it will be
56 * auto-cleared after successful update.
57 */
58 unsigned int rtc_udr_update;
59 /* Mask for UDR field in 'rtc_udr_update' register */
60 unsigned int rtc_udr_mask;
61};
62
63/* Register map for S5M8763 and S5M8767 */
64static const struct s5m_rtc_reg_config s5m_rtc_regs = {
65 .regs_count = 8,
66 .time = S5M_RTC_SEC,
67 .ctrl = S5M_ALARM1_CONF,
68 .alarm0 = S5M_ALARM0_SEC,
69 .alarm1 = S5M_ALARM1_SEC,
70 .smpl_wtsr = S5M_WTSR_SMPL_CNTL,
71 .rtc_udr_update = S5M_RTC_UDR_CON,
72 .rtc_udr_mask = S5M_RTC_UDR_MASK,
73};
74
0c5deb1e
KK		 75/*
76 * Register map for S2MPS14.
77 * It may be also suitable for S2MPS11 but this was not tested.
78 */
79static const struct s5m_rtc_reg_config s2mps_rtc_regs = {
80 .regs_count = 7,
81 .time = S2MPS_RTC_SEC,
82 .ctrl = S2MPS_RTC_CTRL,
83 .alarm0 = S2MPS_ALARM0_SEC,
84 .alarm1 = S2MPS_ALARM1_SEC,
85 .smpl_wtsr = S2MPS_WTSR_SMPL_CNTL,
86 .rtc_udr_update = S2MPS_RTC_UDR_CON,
87 .rtc_udr_mask = S2MPS_RTC_WUDR_MASK,
88};
89
5bccae6e
SK		 90struct s5m_rtc_info {
91 struct device *dev;
e349c910 92 struct i2c_client *i2c;
5bccae6e 93 struct sec_pmic_dev *s5m87xx;
5ccb7d71 94 struct regmap *regmap;
5bccae6e
SK		 95 struct rtc_device *rtc_dev;
96 int irq;
97 int device_type;
98 int rtc_24hr_mode;
99 bool wtsr_smpl;
f8b23bbd 100 const struct s5m_rtc_reg_config *regs;
5bccae6e
SK		 101};
102
e349c910
KK		 103static const struct regmap_config s5m_rtc_regmap_config = {
104 .reg_bits = 8,
105 .val_bits = 8,
106
602cb5bb 107 .max_register = S5M_RTC_REG_MAX,
e349c910
KK		 108};
109
110static const struct regmap_config s2mps14_rtc_regmap_config = {
111 .reg_bits = 8,
112 .val_bits = 8,
113
114 .max_register = S2MPS_RTC_REG_MAX,
115};
116
5bccae6e
SK		 117static void s5m8767_data_to_tm(u8 *data, struct rtc_time *tm,
118 int rtc_24hr_mode)
119{
120 tm->tm_sec = data[RTC_SEC] & 0x7f;
121 tm->tm_min = data[RTC_MIN] & 0x7f;
122 if (rtc_24hr_mode) {
123 tm->tm_hour = data[RTC_HOUR] & 0x1f;
124 } else {
125 tm->tm_hour = data[RTC_HOUR] & 0x0f;
126 if (data[RTC_HOUR] & HOUR_PM_MASK)
127 tm->tm_hour += 12;
128 }
129
130 tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0x7f);
131 tm->tm_mday = data[RTC_DATE] & 0x1f;
132 tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1;
133 tm->tm_year = (data[RTC_YEAR1] & 0x7f) + 100;
134 tm->tm_yday = 0;
135 tm->tm_isdst = 0;
136}
137
138static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data)
139{
140 data[RTC_SEC] = tm->tm_sec;
141 data[RTC_MIN] = tm->tm_min;
142
143 if (tm->tm_hour >= 12)
144 data[RTC_HOUR] = tm->tm_hour | HOUR_PM_MASK;
145 else
146 data[RTC_HOUR] = tm->tm_hour & ~HOUR_PM_MASK;
147
148 data[RTC_WEEKDAY] = 1 << tm->tm_wday;
149 data[RTC_DATE] = tm->tm_mday;
150 data[RTC_MONTH] = tm->tm_mon + 1;
151 data[RTC_YEAR1] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
152
153 if (tm->tm_year < 100) {
154 pr_err("s5m8767 RTC cannot handle the year %d.\n",
155 1900 + tm->tm_year);
156 return -EINVAL;
157 } else {
158 return 0;
159 }
160}
161
d73238d4
KK		 162/*
163 * Read RTC_UDR_CON register and wait till UDR field is cleared.
164 * This indicates that time/alarm update ended.
165 */
166static inline int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info)
167{
168 int ret, retry = UDR_READ_RETRY_CNT;
169 unsigned int data;
170
171 do {
f8b23bbd
KK		 172 ret = regmap_read(info->regmap, info->regs->rtc_udr_update,
173 &data);
174 } while (--retry && (data & info->regs->rtc_udr_mask) && !ret);
d73238d4
KK		 175
176 if (!retry)
177 dev_err(info->dev, "waiting for UDR update, reached max number of retries\n");
178
179 return ret;
180}
181
f8b23bbd
KK		 182static inline int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info,
183 struct rtc_wkalrm *alarm)
184{
185 int ret;
186 unsigned int val;
187
188 switch (info->device_type) {
189 case S5M8767X:
190 case S5M8763X:
191 ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val);
192 val &= S5M_ALARM0_STATUS;
193 break;
0c5deb1e
KK		 194 case S2MPS14X:
195 ret = regmap_read(info->s5m87xx->regmap_pmic, S2MPS14_REG_ST2,
196 &val);
197 val &= S2MPS_ALARM0_STATUS;
198 break;
f8b23bbd
KK		 199 default:
200 return -EINVAL;
201 }
202 if (ret < 0)
203 return ret;
204
205 if (val)
206 alarm->pending = 1;
207 else
208 alarm->pending = 0;
209
210 return 0;
211}
212
5bccae6e
SK		 213static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info)
214{
215 int ret;
216 unsigned int data;
217
f8b23bbd 218 ret = regmap_read(info->regmap, info->regs->rtc_udr_update, &data);
5bccae6e
SK		 219 if (ret < 0) {
220 dev_err(info->dev, "failed to read update reg(%d)\n", ret);
221 return ret;
222 }
223
f8b23bbd 224 data |= info->regs->rtc_udr_mask;
0c5deb1e
KK		 225 if (info->device_type == S5M8763X || info->device_type == S5M8767X)
226 data |= S5M_RTC_TIME_EN_MASK;
5bccae6e 227
f8b23bbd 228 ret = regmap_write(info->regmap, info->regs->rtc_udr_update, data);
5bccae6e
SK		 229 if (ret < 0) {
230 dev_err(info->dev, "failed to write update reg(%d)\n", ret);
231 return ret;
232 }
233
d73238d4 234 ret = s5m8767_wait_for_udr_update(info);
5bccae6e
SK		 235
236 return ret;
237}
238
239static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
240{
241 int ret;
242 unsigned int data;
243
f8b23bbd 244 ret = regmap_read(info->regmap, info->regs->rtc_udr_update, &data);
5bccae6e
SK		 245 if (ret < 0) {
246 dev_err(info->dev, "%s: fail to read update reg(%d)\n",
247 __func__, ret);
248 return ret;
249 }
250
f8b23bbd 251 data |= info->regs->rtc_udr_mask;
0c5deb1e
KK		 252 switch (info->device_type) {
253 case S5M8763X:
254 case S5M8767X:
255 data &= ~S5M_RTC_TIME_EN_MASK;
256 break;
257 case S2MPS14X:
258 data |= S2MPS_RTC_RUDR_MASK;
259 break;
260 default:
261 return -EINVAL;
262 }
5bccae6e 263
f8b23bbd 264 ret = regmap_write(info->regmap, info->regs->rtc_udr_update, data);
5bccae6e
SK		 265 if (ret < 0) {
266 dev_err(info->dev, "%s: fail to write update reg(%d)\n",
267 __func__, ret);
268 return ret;
269 }
270
d73238d4 271 ret = s5m8767_wait_for_udr_update(info);
5bccae6e
SK		 272
273 return ret;
274}
275
276static void s5m8763_data_to_tm(u8 *data, struct rtc_time *tm)
277{
278 tm->tm_sec = bcd2bin(data[RTC_SEC]);
279 tm->tm_min = bcd2bin(data[RTC_MIN]);
280
281 if (data[RTC_HOUR] & HOUR_12) {
282 tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x1f);
283 if (data[RTC_HOUR] & HOUR_PM)
284 tm->tm_hour += 12;
285 } else {
286 tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f);
287 }
288
289 tm->tm_wday = data[RTC_WEEKDAY] & 0x07;
290 tm->tm_mday = bcd2bin(data[RTC_DATE]);
291 tm->tm_mon = bcd2bin(data[RTC_MONTH]);
292 tm->tm_year = bcd2bin(data[RTC_YEAR1]) + bcd2bin(data[RTC_YEAR2]) * 100;
293 tm->tm_year -= 1900;
294}
295
296static void s5m8763_tm_to_data(struct rtc_time *tm, u8 *data)
297{
298 data[RTC_SEC] = bin2bcd(tm->tm_sec);
299 data[RTC_MIN] = bin2bcd(tm->tm_min);
300 data[RTC_HOUR] = bin2bcd(tm->tm_hour);
301 data[RTC_WEEKDAY] = tm->tm_wday;
302 data[RTC_DATE] = bin2bcd(tm->tm_mday);
303 data[RTC_MONTH] = bin2bcd(tm->tm_mon);
304 data[RTC_YEAR1] = bin2bcd(tm->tm_year % 100);
305 data[RTC_YEAR2] = bin2bcd((tm->tm_year + 1900) / 100);
306}
307
308static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)
309{
310 struct s5m_rtc_info *info = dev_get_drvdata(dev);
f8b23bbd 311 u8 data[info->regs->regs_count];
5bccae6e
SK		 312 int ret;
313
0c5deb1e
KK		 314 if (info->device_type == S2MPS14X) {
315 ret = regmap_update_bits(info->regmap,
316 info->regs->rtc_udr_update,
317 S2MPS_RTC_RUDR_MASK, S2MPS_RTC_RUDR_MASK);
318 if (ret) {
319 dev_err(dev,
320 "Failed to prepare registers for time reading: %d\n",
321 ret);
322 return ret;
323 }
324 }
f8b23bbd
KK		 325 ret = regmap_bulk_read(info->regmap, info->regs->time, data,
326 info->regs->regs_count);
5bccae6e
SK		 327 if (ret < 0)
328 return ret;
329
330 switch (info->device_type) {
331 case S5M8763X:
332 s5m8763_data_to_tm(data, tm);
333 break;
334
335 case S5M8767X:
0c5deb1e 336 case S2MPS14X:
5bccae6e
SK		 337 s5m8767_data_to_tm(data, tm, info->rtc_24hr_mode);
338 break;
339
340 default:
341 return -EINVAL;
342 }
343
344 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
345 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
346 tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
347
348 return rtc_valid_tm(tm);
349}
350
351static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm)
352{
353 struct s5m_rtc_info *info = dev_get_drvdata(dev);
f8b23bbd 354 u8 data[info->regs->regs_count];
5bccae6e
SK		 355 int ret = 0;
356
357 switch (info->device_type) {
358 case S5M8763X:
359 s5m8763_tm_to_data(tm, data);
360 break;
361 case S5M8767X:
0c5deb1e 362 case S2MPS14X:
5bccae6e
SK		 363 ret = s5m8767_tm_to_data(tm, data);
364 break;
365 default:
366 return -EINVAL;
367 }
368
369 if (ret < 0)
370 return ret;
371
372 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
373 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
374 tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
375
f8b23bbd
KK		 376 ret = regmap_raw_write(info->regmap, info->regs->time, data,
377 info->regs->regs_count);
5bccae6e
SK		 378 if (ret < 0)
379 return ret;
380
381 ret = s5m8767_rtc_set_time_reg(info);
382
383 return ret;
384}
385
386static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
387{
388 struct s5m_rtc_info *info = dev_get_drvdata(dev);
f8b23bbd 389 u8 data[info->regs->regs_count];
5bccae6e
SK		 390 unsigned int val;
391 int ret, i;
392
f8b23bbd
KK		 393 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
394 info->regs->regs_count);
5bccae6e
SK		 395 if (ret < 0)
396 return ret;
397
398 switch (info->device_type) {
399 case S5M8763X:
400 s5m8763_data_to_tm(data, &alrm->time);
602cb5bb 401 ret = regmap_read(info->regmap, S5M_ALARM0_CONF, &val);
5bccae6e
SK		 402 if (ret < 0)
403 return ret;
404
405 alrm->enabled = !!val;
5bccae6e
SK		 406 break;
407
408 case S5M8767X:
0c5deb1e 409 case S2MPS14X:
5bccae6e 410 s5m8767_data_to_tm(data, &alrm->time, info->rtc_24hr_mode);
5bccae6e 411 alrm->enabled = 0;
f8b23bbd 412 for (i = 0; i < info->regs->regs_count; i++) {
5bccae6e
SK		 413 if (data[i] & ALARM_ENABLE_MASK) {
414 alrm->enabled = 1;
415 break;
416 }
417 }
5bccae6e
SK		 418 break;
419
420 default:
421 return -EINVAL;
422 }
423
f8b23bbd
KK		 424 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
425 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon,
426 alrm->time.tm_mday, alrm->time.tm_hour,
427 alrm->time.tm_min, alrm->time.tm_sec,
428 alrm->time.tm_wday);
429
430 ret = s5m_check_peding_alarm_interrupt(info, alrm);
5bccae6e
SK		 431
432 return 0;
433}
434
435static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)
436{
f8b23bbd 437 u8 data[info->regs->regs_count];
5bccae6e
SK		 438 int ret, i;
439 struct rtc_time tm;
440
f8b23bbd
KK		 441 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
442 info->regs->regs_count);
5bccae6e
SK		 443 if (ret < 0)
444 return ret;
445
446 s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
447 dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
448 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday,
449 tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday);
450
451 switch (info->device_type) {
452 case S5M8763X:
602cb5bb 453 ret = regmap_write(info->regmap, S5M_ALARM0_CONF, 0);
5bccae6e
SK		 454 break;
455
456 case S5M8767X:
0c5deb1e 457 case S2MPS14X:
f8b23bbd 458 for (i = 0; i < info->regs->regs_count; i++)
5bccae6e
SK		 459 data[i] &= ~ALARM_ENABLE_MASK;
460
f8b23bbd
KK		 461 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
462 info->regs->regs_count);
5bccae6e
SK		 463 if (ret < 0)
464 return ret;
465
466 ret = s5m8767_rtc_set_alarm_reg(info);
467
468 break;
469
470 default:
471 return -EINVAL;
472 }
473
474 return ret;
475}
476
477static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
478{
479 int ret;
f8b23bbd 480 u8 data[info->regs->regs_count];
5bccae6e
SK		 481 u8 alarm0_conf;
482 struct rtc_time tm;
483
f8b23bbd
KK		 484 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
485 info->regs->regs_count);
5bccae6e
SK		 486 if (ret < 0)
487 return ret;
488
489 s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
490 dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
491 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday,
492 tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday);
493
494 switch (info->device_type) {
495 case S5M8763X:
496 alarm0_conf = 0x77;
602cb5bb 497 ret = regmap_write(info->regmap, S5M_ALARM0_CONF, alarm0_conf);
5bccae6e
SK		 498 break;
499
500 case S5M8767X:
0c5deb1e 501 case S2MPS14X:
5bccae6e
SK		 502 data[RTC_SEC] |= ALARM_ENABLE_MASK;
503 data[RTC_MIN] |= ALARM_ENABLE_MASK;
504 data[RTC_HOUR] |= ALARM_ENABLE_MASK;
505 data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK;
506 if (data[RTC_DATE] & 0x1f)
507 data[RTC_DATE] |= ALARM_ENABLE_MASK;
508 if (data[RTC_MONTH] & 0xf)
509 data[RTC_MONTH] |= ALARM_ENABLE_MASK;
510 if (data[RTC_YEAR1] & 0x7f)
511 data[RTC_YEAR1] |= ALARM_ENABLE_MASK;
512
f8b23bbd
KK		 513 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
514 info->regs->regs_count);
5bccae6e
SK		 515 if (ret < 0)
516 return ret;
517 ret = s5m8767_rtc_set_alarm_reg(info);
518
519 break;
520
521 default:
522 return -EINVAL;
523 }
524
525 return ret;
526}
527
528static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
529{
530 struct s5m_rtc_info *info = dev_get_drvdata(dev);
f8b23bbd 531 u8 data[info->regs->regs_count];
5bccae6e
SK		 532 int ret;
533
534 switch (info->device_type) {
535 case S5M8763X:
536 s5m8763_tm_to_data(&alrm->time, data);
537 break;
538
539 case S5M8767X:
0c5deb1e 540 case S2MPS14X:
5bccae6e
SK		 541 s5m8767_tm_to_data(&alrm->time, data);
542 break;
543
544 default:
545 return -EINVAL;
546 }
547
548 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
549 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon,
550 alrm->time.tm_mday, alrm->time.tm_hour, alrm->time.tm_min,
551 alrm->time.tm_sec, alrm->time.tm_wday);
552
553 ret = s5m_rtc_stop_alarm(info);
554 if (ret < 0)
555 return ret;
556
f8b23bbd
KK		 557 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
558 info->regs->regs_count);
5bccae6e
SK		 559 if (ret < 0)
560 return ret;
561
562 ret = s5m8767_rtc_set_alarm_reg(info);
563 if (ret < 0)
564 return ret;
565
566 if (alrm->enabled)
567 ret = s5m_rtc_start_alarm(info);
568
569 return ret;
570}
571
572static int s5m_rtc_alarm_irq_enable(struct device *dev,
573 unsigned int enabled)
574{
575 struct s5m_rtc_info *info = dev_get_drvdata(dev);
576
577 if (enabled)
578 return s5m_rtc_start_alarm(info);
579 else
580 return s5m_rtc_stop_alarm(info);
581}
582
583static irqreturn_t s5m_rtc_alarm_irq(int irq, void *data)
584{
585 struct s5m_rtc_info *info = data;
586
587 rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
588
589 return IRQ_HANDLED;
590}
591
592static const struct rtc_class_ops s5m_rtc_ops = {
593 .read_time = s5m_rtc_read_time,
594 .set_time = s5m_rtc_set_time,
595 .read_alarm = s5m_rtc_read_alarm,
596 .set_alarm = s5m_rtc_set_alarm,
597 .alarm_irq_enable = s5m_rtc_alarm_irq_enable,
598};
599
600static void s5m_rtc_enable_wtsr(struct s5m_rtc_info *info, bool enable)
601{
602 int ret;
f8b23bbd 603 ret = regmap_update_bits(info->regmap, info->regs->smpl_wtsr,
5bccae6e
SK		 604 WTSR_ENABLE_MASK,
605 enable ? WTSR_ENABLE_MASK : 0);
606 if (ret < 0)
607 dev_err(info->dev, "%s: fail to update WTSR reg(%d)\n",
608 __func__, ret);
609}
610
611static void s5m_rtc_enable_smpl(struct s5m_rtc_info *info, bool enable)
612{
613 int ret;
f8b23bbd 614 ret = regmap_update_bits(info->regmap, info->regs->smpl_wtsr,
5bccae6e
SK		 615 SMPL_ENABLE_MASK,
616 enable ? SMPL_ENABLE_MASK : 0);
617 if (ret < 0)
618 dev_err(info->dev, "%s: fail to update SMPL reg(%d)\n",
619 __func__, ret);
620}
621
622static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
623{
624 u8 data[2];
5bccae6e 625 int ret;
5bccae6e 626
0c5deb1e
KK		 627 switch (info->device_type) {
628 case S5M8763X:
629 case S5M8767X:
630 /* UDR update time. Default of 7.32 ms is too long. */
631 ret = regmap_update_bits(info->regmap, S5M_RTC_UDR_CON,
632 S5M_RTC_UDR_T_MASK, S5M_RTC_UDR_T_450_US);
633 if (ret < 0)
634 dev_err(info->dev, "%s: fail to change UDR time: %d\n",
635 __func__, ret);
0c5f5d9a 636
0c5deb1e
KK		 637 /* Set RTC control register : Binary mode, 24hour mode */
638 data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
639 data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
640
641 ret = regmap_raw_write(info->regmap, S5M_ALARM0_CONF, data, 2);
642 break;
643
644 case S2MPS14X:
645 data[0] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
646 ret = regmap_write(info->regmap, info->regs->ctrl, data[0]);
647 break;
648
649 default:
650 return -EINVAL;
651 }
5bccae6e
SK		 652
653 info->rtc_24hr_mode = 1;
5bccae6e
SK		 654 if (ret < 0) {
655 dev_err(info->dev, "%s: fail to write controlm reg(%d)\n",
656 __func__, ret);
657 return ret;
658 }
659
5bccae6e
SK		 660 return ret;
661}
662
663static int s5m_rtc_probe(struct platform_device *pdev)
664{
665 struct sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent);
666 struct sec_platform_data *pdata = s5m87xx->pdata;
667 struct s5m_rtc_info *info;
e349c910 668 const struct regmap_config *regmap_cfg;
a0347f20 669 int ret, alarm_irq;
5bccae6e
SK		 670
671 if (!pdata) {
672 dev_err(pdev->dev.parent, "Platform data not supplied\n");
673 return -ENODEV;
674 }
675
676 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
677 if (!info)
678 return -ENOMEM;
679
e349c910
KK		 680 switch (pdata->device_type) {
681 case S2MPS14X:
682 regmap_cfg = &s2mps14_rtc_regmap_config;
0c5deb1e 683 info->regs = &s2mps_rtc_regs;
a0347f20 684 alarm_irq = S2MPS14_IRQ_RTCA0;
e349c910
KK		 685 break;
686 case S5M8763X:
687 regmap_cfg = &s5m_rtc_regmap_config;
f8b23bbd 688 info->regs = &s5m_rtc_regs;
a0347f20 689 alarm_irq = S5M8763_IRQ_ALARM0;
e349c910
KK		 690 break;
691 case S5M8767X:
692 regmap_cfg = &s5m_rtc_regmap_config;
f8b23bbd 693 info->regs = &s5m_rtc_regs;
a0347f20 694 alarm_irq = S5M8767_IRQ_RTCA1;
e349c910
KK		 695 break;
696 default:
697 dev_err(&pdev->dev, "Device type is not supported by RTC driver\n");
698 return -ENODEV;
699 }
700
701 info->i2c = i2c_new_dummy(s5m87xx->i2c->adapter, RTC_I2C_ADDR);
702 if (!info->i2c) {
703 dev_err(&pdev->dev, "Failed to allocate I2C for RTC\n");
704 return -ENODEV;
705 }
706
707 info->regmap = devm_regmap_init_i2c(info->i2c, regmap_cfg);
708 if (IS_ERR(info->regmap)) {
709 ret = PTR_ERR(info->regmap);
710 dev_err(&pdev->dev, "Failed to allocate RTC register map: %d\n",
711 ret);
712 goto err;
713 }
714
5bccae6e
SK		 715 info->dev = &pdev->dev;
716 info->s5m87xx = s5m87xx;
5bccae6e
SK		 717 info->device_type = s5m87xx->device_type;
718 info->wtsr_smpl = s5m87xx->wtsr_smpl;
719
a0347f20
KK		 720 info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
721 if (info->irq <= 0) {
5bccae6e 722 ret = -EINVAL;
a0347f20
KK		 723 dev_err(&pdev->dev, "Failed to get virtual IRQ %d\n",
724 alarm_irq);
e349c910 725 goto err;
5bccae6e
SK		 726 }
727
728 platform_set_drvdata(pdev, info);
729
730 ret = s5m8767_rtc_init_reg(info);
731
732 if (info->wtsr_smpl) {
733 s5m_rtc_enable_wtsr(info, true);
734 s5m_rtc_enable_smpl(info, true);
735 }
736
737 device_init_wakeup(&pdev->dev, 1);
738
739 info->rtc_dev = devm_rtc_device_register(&pdev->dev, "s5m-rtc",
740 &s5m_rtc_ops, THIS_MODULE);
741
e349c910
KK		 742 if (IS_ERR(info->rtc_dev)) {
743 ret = PTR_ERR(info->rtc_dev);
744 goto err;
745 }
5bccae6e
SK		 746
747 ret = devm_request_threaded_irq(&pdev->dev, info->irq, NULL,
748 s5m_rtc_alarm_irq, 0, "rtc-alarm0",
749 info);
e349c910 750 if (ret < 0) {
5bccae6e
SK		 751 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
752 info->irq, ret);
e349c910
KK		 753 goto err;
754 }
755
756 return 0;
757
758err:
759 i2c_unregister_device(info->i2c);
5bccae6e
SK		 760
761 return ret;
762}
763
764static void s5m_rtc_shutdown(struct platform_device *pdev)
765{
766 struct s5m_rtc_info *info = platform_get_drvdata(pdev);
767 int i;
768 unsigned int val = 0;
769 if (info->wtsr_smpl) {
770 for (i = 0; i < 3; i++) {
771 s5m_rtc_enable_wtsr(info, false);
f8b23bbd 772 regmap_read(info->regmap, info->regs->smpl_wtsr, &val);
5bccae6e
SK		 773 pr_debug("%s: WTSR_SMPL reg(0x%02x)\n", __func__, val);
774 if (val & WTSR_ENABLE_MASK)
775 pr_emerg("%s: fail to disable WTSR\n",
776 __func__);
777 else {
778 pr_info("%s: success to disable WTSR\n",
779 __func__);
780 break;
781 }
782 }
783 }
784 /* Disable SMPL when power off */
785 s5m_rtc_enable_smpl(info, false);
786}
787
e349c910
KK		 788static int s5m_rtc_remove(struct platform_device *pdev)
789{
790 struct s5m_rtc_info *info = platform_get_drvdata(pdev);
791
792 /* Perform also all shutdown steps when removing */
793 s5m_rtc_shutdown(pdev);
794 i2c_unregister_device(info->i2c);
795
796 return 0;
797}
798
11ba5a1e 799#ifdef CONFIG_PM_SLEEP
222ead7f
KK		 800static int s5m_rtc_resume(struct device *dev)
801{
802 struct s5m_rtc_info *info = dev_get_drvdata(dev);
803 int ret = 0;
804
805 if (device_may_wakeup(dev))
806 ret = disable_irq_wake(info->irq);
807
808 return ret;
809}
810
811static int s5m_rtc_suspend(struct device *dev)
812{
813 struct s5m_rtc_info *info = dev_get_drvdata(dev);
814 int ret = 0;
815
816 if (device_may_wakeup(dev))
817 ret = enable_irq_wake(info->irq);
818
819 return ret;
820}
11ba5a1e 821#endif /* CONFIG_PM_SLEEP */
222ead7f
KK		 822
823static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops, s5m_rtc_suspend, s5m_rtc_resume);
824
5bccae6e 825static const struct platform_device_id s5m_rtc_id[] = {
0c5deb1e
KK		 826 { "s5m-rtc", S5M8767X },
827 { "s2mps14-rtc", S2MPS14X },
5bccae6e
SK		 828};
829
830static struct platform_driver s5m_rtc_driver = {
831 .driver = {
832 .name = "s5m-rtc",
833 .owner = THIS_MODULE,
222ead7f 834 .pm = &s5m_rtc_pm_ops,
5bccae6e
SK		 835 },
836 .probe = s5m_rtc_probe,
e349c910 837 .remove = s5m_rtc_remove,
5bccae6e
SK		 838 .shutdown = s5m_rtc_shutdown,
839 .id_table = s5m_rtc_id,
840};
841
842module_platform_driver(s5m_rtc_driver);
843
844/* Module information */
845MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
0c5deb1e 846MODULE_DESCRIPTION("Samsung S5M/S2MPS14 RTC driver");
5bccae6e
SK		 847MODULE_LICENSE("GPL");
848MODULE_ALIAS("platform:s5m-rtc");
Linux kernel - Deliverables
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