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35c86bf6 MB |
1 | /* |
2 | * Real Time Clock driver for Wolfson Microelectronics WM831x | |
3 | * | |
4 | * Copyright (C) 2009 Wolfson Microelectronics PLC. | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/time.h> | |
18 | #include <linux/rtc.h> | |
5a0e3ad6 | 19 | #include <linux/slab.h> |
35c86bf6 MB |
20 | #include <linux/bcd.h> |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/ioctl.h> | |
23 | #include <linux/completion.h> | |
24 | #include <linux/mfd/wm831x/core.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/platform_device.h> | |
27 | ||
28 | ||
29 | /* | |
30 | * R16416 (0x4020) - RTC Write Counter | |
31 | */ | |
32 | #define WM831X_RTC_WR_CNT_MASK 0xFFFF /* RTC_WR_CNT - [15:0] */ | |
33 | #define WM831X_RTC_WR_CNT_SHIFT 0 /* RTC_WR_CNT - [15:0] */ | |
34 | #define WM831X_RTC_WR_CNT_WIDTH 16 /* RTC_WR_CNT - [15:0] */ | |
35 | ||
36 | /* | |
37 | * R16417 (0x4021) - RTC Time 1 | |
38 | */ | |
39 | #define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */ | |
40 | #define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */ | |
41 | #define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */ | |
42 | ||
43 | /* | |
44 | * R16418 (0x4022) - RTC Time 2 | |
45 | */ | |
46 | #define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */ | |
47 | #define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */ | |
48 | #define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */ | |
49 | ||
50 | /* | |
51 | * R16419 (0x4023) - RTC Alarm 1 | |
52 | */ | |
53 | #define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */ | |
54 | #define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */ | |
55 | #define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */ | |
56 | ||
57 | /* | |
58 | * R16420 (0x4024) - RTC Alarm 2 | |
59 | */ | |
60 | #define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */ | |
61 | #define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */ | |
62 | #define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */ | |
63 | ||
64 | /* | |
65 | * R16421 (0x4025) - RTC Control | |
66 | */ | |
67 | #define WM831X_RTC_VALID 0x8000 /* RTC_VALID */ | |
68 | #define WM831X_RTC_VALID_MASK 0x8000 /* RTC_VALID */ | |
69 | #define WM831X_RTC_VALID_SHIFT 15 /* RTC_VALID */ | |
70 | #define WM831X_RTC_VALID_WIDTH 1 /* RTC_VALID */ | |
71 | #define WM831X_RTC_SYNC_BUSY 0x4000 /* RTC_SYNC_BUSY */ | |
72 | #define WM831X_RTC_SYNC_BUSY_MASK 0x4000 /* RTC_SYNC_BUSY */ | |
73 | #define WM831X_RTC_SYNC_BUSY_SHIFT 14 /* RTC_SYNC_BUSY */ | |
74 | #define WM831X_RTC_SYNC_BUSY_WIDTH 1 /* RTC_SYNC_BUSY */ | |
75 | #define WM831X_RTC_ALM_ENA 0x0400 /* RTC_ALM_ENA */ | |
76 | #define WM831X_RTC_ALM_ENA_MASK 0x0400 /* RTC_ALM_ENA */ | |
77 | #define WM831X_RTC_ALM_ENA_SHIFT 10 /* RTC_ALM_ENA */ | |
78 | #define WM831X_RTC_ALM_ENA_WIDTH 1 /* RTC_ALM_ENA */ | |
79 | #define WM831X_RTC_PINT_FREQ_MASK 0x0070 /* RTC_PINT_FREQ - [6:4] */ | |
80 | #define WM831X_RTC_PINT_FREQ_SHIFT 4 /* RTC_PINT_FREQ - [6:4] */ | |
81 | #define WM831X_RTC_PINT_FREQ_WIDTH 3 /* RTC_PINT_FREQ - [6:4] */ | |
82 | ||
83 | /* | |
84 | * R16422 (0x4026) - RTC Trim | |
85 | */ | |
86 | #define WM831X_RTC_TRIM_MASK 0x03FF /* RTC_TRIM - [9:0] */ | |
87 | #define WM831X_RTC_TRIM_SHIFT 0 /* RTC_TRIM - [9:0] */ | |
88 | #define WM831X_RTC_TRIM_WIDTH 10 /* RTC_TRIM - [9:0] */ | |
89 | ||
90 | #define WM831X_SET_TIME_RETRIES 5 | |
91 | #define WM831X_GET_TIME_RETRIES 5 | |
92 | ||
93 | struct wm831x_rtc { | |
94 | struct wm831x *wm831x; | |
95 | struct rtc_device *rtc; | |
96 | unsigned int alarm_enabled:1; | |
97 | }; | |
98 | ||
99 | /* | |
100 | * Read current time and date in RTC | |
101 | */ | |
102 | static int wm831x_rtc_readtime(struct device *dev, struct rtc_time *tm) | |
103 | { | |
104 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | |
105 | struct wm831x *wm831x = wm831x_rtc->wm831x; | |
106 | u16 time1[2], time2[2]; | |
107 | int ret; | |
108 | int count = 0; | |
109 | ||
110 | /* Has the RTC been programmed? */ | |
111 | ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL); | |
112 | if (ret < 0) { | |
113 | dev_err(dev, "Failed to read RTC control: %d\n", ret); | |
114 | return ret; | |
115 | } | |
116 | if (!(ret & WM831X_RTC_VALID)) { | |
117 | dev_dbg(dev, "RTC not yet configured\n"); | |
118 | return -EINVAL; | |
119 | } | |
120 | ||
121 | /* Read twice to make sure we don't read a corrupt, partially | |
122 | * incremented, value. | |
123 | */ | |
124 | do { | |
125 | ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1, | |
126 | 2, time1); | |
127 | if (ret != 0) | |
128 | continue; | |
129 | ||
130 | ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1, | |
131 | 2, time2); | |
132 | if (ret != 0) | |
133 | continue; | |
134 | ||
135 | if (memcmp(time1, time2, sizeof(time1)) == 0) { | |
136 | u32 time = (time1[0] << 16) | time1[1]; | |
137 | ||
138 | rtc_time_to_tm(time, tm); | |
139 | return rtc_valid_tm(tm); | |
140 | } | |
141 | ||
142 | } while (++count < WM831X_GET_TIME_RETRIES); | |
143 | ||
144 | dev_err(dev, "Timed out reading current time\n"); | |
145 | ||
146 | return -EIO; | |
147 | } | |
148 | ||
149 | /* | |
150 | * Set current time and date in RTC | |
151 | */ | |
152 | static int wm831x_rtc_set_mmss(struct device *dev, unsigned long time) | |
153 | { | |
154 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | |
155 | struct wm831x *wm831x = wm831x_rtc->wm831x; | |
156 | struct rtc_time new_tm; | |
157 | unsigned long new_time; | |
158 | int ret; | |
159 | int count = 0; | |
160 | ||
161 | ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_1, | |
162 | (time >> 16) & 0xffff); | |
163 | if (ret < 0) { | |
164 | dev_err(dev, "Failed to write TIME_1: %d\n", ret); | |
165 | return ret; | |
166 | } | |
167 | ||
168 | ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_2, time & 0xffff); | |
169 | if (ret < 0) { | |
170 | dev_err(dev, "Failed to write TIME_2: %d\n", ret); | |
171 | return ret; | |
172 | } | |
173 | ||
174 | /* Wait for the update to complete - should happen first time | |
175 | * round but be conservative. | |
176 | */ | |
177 | do { | |
178 | msleep(1); | |
179 | ||
180 | ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL); | |
181 | if (ret < 0) | |
182 | ret = WM831X_RTC_SYNC_BUSY; | |
183 | } while (!(ret & WM831X_RTC_SYNC_BUSY) && | |
184 | ++count < WM831X_SET_TIME_RETRIES); | |
185 | ||
186 | if (ret & WM831X_RTC_SYNC_BUSY) { | |
187 | dev_err(dev, "Timed out writing RTC update\n"); | |
188 | return -EIO; | |
189 | } | |
190 | ||
191 | /* Check that the update was accepted; security features may | |
192 | * have caused the update to be ignored. | |
193 | */ | |
194 | ret = wm831x_rtc_readtime(dev, &new_tm); | |
195 | if (ret < 0) | |
196 | return ret; | |
197 | ||
198 | ret = rtc_tm_to_time(&new_tm, &new_time); | |
199 | if (ret < 0) { | |
200 | dev_err(dev, "Failed to convert time: %d\n", ret); | |
201 | return ret; | |
202 | } | |
203 | ||
204 | /* Allow a second of change in case of tick */ | |
205 | if (new_time - time > 1) { | |
206 | dev_err(dev, "RTC update not permitted by hardware\n"); | |
207 | return -EPERM; | |
208 | } | |
209 | ||
210 | return 0; | |
211 | } | |
212 | ||
213 | /* | |
214 | * Read alarm time and date in RTC | |
215 | */ | |
216 | static int wm831x_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
217 | { | |
218 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | |
219 | int ret; | |
220 | u16 data[2]; | |
221 | u32 time; | |
222 | ||
223 | ret = wm831x_bulk_read(wm831x_rtc->wm831x, WM831X_RTC_ALARM_1, | |
224 | 2, data); | |
225 | if (ret != 0) { | |
226 | dev_err(dev, "Failed to read alarm time: %d\n", ret); | |
227 | return ret; | |
228 | } | |
229 | ||
230 | time = (data[0] << 16) | data[1]; | |
231 | ||
232 | rtc_time_to_tm(time, &alrm->time); | |
233 | ||
234 | ret = wm831x_reg_read(wm831x_rtc->wm831x, WM831X_RTC_CONTROL); | |
235 | if (ret < 0) { | |
236 | dev_err(dev, "Failed to read RTC control: %d\n", ret); | |
237 | return ret; | |
238 | } | |
239 | ||
240 | if (ret & WM831X_RTC_ALM_ENA) | |
241 | alrm->enabled = 1; | |
242 | else | |
243 | alrm->enabled = 0; | |
244 | ||
245 | return 0; | |
246 | } | |
247 | ||
248 | static int wm831x_rtc_stop_alarm(struct wm831x_rtc *wm831x_rtc) | |
249 | { | |
250 | wm831x_rtc->alarm_enabled = 0; | |
251 | ||
252 | return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL, | |
253 | WM831X_RTC_ALM_ENA, 0); | |
254 | } | |
255 | ||
256 | static int wm831x_rtc_start_alarm(struct wm831x_rtc *wm831x_rtc) | |
257 | { | |
258 | wm831x_rtc->alarm_enabled = 1; | |
259 | ||
260 | return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL, | |
261 | WM831X_RTC_ALM_ENA, WM831X_RTC_ALM_ENA); | |
262 | } | |
263 | ||
264 | static int wm831x_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
265 | { | |
266 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | |
267 | struct wm831x *wm831x = wm831x_rtc->wm831x; | |
268 | int ret; | |
269 | unsigned long time; | |
270 | ||
271 | ret = rtc_tm_to_time(&alrm->time, &time); | |
272 | if (ret < 0) { | |
273 | dev_err(dev, "Failed to convert time: %d\n", ret); | |
274 | return ret; | |
275 | } | |
276 | ||
277 | ret = wm831x_rtc_stop_alarm(wm831x_rtc); | |
278 | if (ret < 0) { | |
279 | dev_err(dev, "Failed to stop alarm: %d\n", ret); | |
280 | return ret; | |
281 | } | |
282 | ||
283 | ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_1, | |
284 | (time >> 16) & 0xffff); | |
285 | if (ret < 0) { | |
286 | dev_err(dev, "Failed to write ALARM_1: %d\n", ret); | |
287 | return ret; | |
288 | } | |
289 | ||
290 | ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_2, time & 0xffff); | |
291 | if (ret < 0) { | |
292 | dev_err(dev, "Failed to write ALARM_2: %d\n", ret); | |
293 | return ret; | |
294 | } | |
295 | ||
296 | if (alrm->enabled) { | |
297 | ret = wm831x_rtc_start_alarm(wm831x_rtc); | |
298 | if (ret < 0) { | |
299 | dev_err(dev, "Failed to start alarm: %d\n", ret); | |
300 | return ret; | |
301 | } | |
302 | } | |
303 | ||
304 | return 0; | |
305 | } | |
306 | ||
307 | static int wm831x_rtc_alarm_irq_enable(struct device *dev, | |
308 | unsigned int enabled) | |
309 | { | |
310 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | |
311 | ||
312 | if (enabled) | |
313 | return wm831x_rtc_start_alarm(wm831x_rtc); | |
314 | else | |
315 | return wm831x_rtc_stop_alarm(wm831x_rtc); | |
316 | } | |
317 | ||
318 | static int wm831x_rtc_update_irq_enable(struct device *dev, | |
319 | unsigned int enabled) | |
320 | { | |
321 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | |
322 | int val; | |
323 | ||
324 | if (enabled) | |
325 | val = 1 << WM831X_RTC_PINT_FREQ_SHIFT; | |
326 | else | |
327 | val = 0; | |
328 | ||
329 | return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL, | |
330 | WM831X_RTC_PINT_FREQ_MASK, val); | |
331 | } | |
332 | ||
333 | static irqreturn_t wm831x_alm_irq(int irq, void *data) | |
334 | { | |
335 | struct wm831x_rtc *wm831x_rtc = data; | |
336 | ||
337 | rtc_update_irq(wm831x_rtc->rtc, 1, RTC_IRQF | RTC_AF); | |
338 | ||
339 | return IRQ_HANDLED; | |
340 | } | |
341 | ||
342 | static irqreturn_t wm831x_per_irq(int irq, void *data) | |
343 | { | |
344 | struct wm831x_rtc *wm831x_rtc = data; | |
345 | ||
346 | rtc_update_irq(wm831x_rtc->rtc, 1, RTC_IRQF | RTC_UF); | |
347 | ||
348 | return IRQ_HANDLED; | |
349 | } | |
350 | ||
351 | static const struct rtc_class_ops wm831x_rtc_ops = { | |
352 | .read_time = wm831x_rtc_readtime, | |
353 | .set_mmss = wm831x_rtc_set_mmss, | |
354 | .read_alarm = wm831x_rtc_readalarm, | |
355 | .set_alarm = wm831x_rtc_setalarm, | |
356 | .alarm_irq_enable = wm831x_rtc_alarm_irq_enable, | |
357 | .update_irq_enable = wm831x_rtc_update_irq_enable, | |
358 | }; | |
359 | ||
360 | #ifdef CONFIG_PM | |
361 | /* Turn off the alarm if it should not be a wake source. */ | |
362 | static int wm831x_rtc_suspend(struct device *dev) | |
363 | { | |
364 | struct platform_device *pdev = to_platform_device(dev); | |
365 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev); | |
366 | int ret, enable; | |
367 | ||
368 | if (wm831x_rtc->alarm_enabled && device_may_wakeup(&pdev->dev)) | |
369 | enable = WM831X_RTC_ALM_ENA; | |
370 | else | |
371 | enable = 0; | |
372 | ||
373 | ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL, | |
374 | WM831X_RTC_ALM_ENA, enable); | |
375 | if (ret != 0) | |
376 | dev_err(&pdev->dev, "Failed to update RTC alarm: %d\n", ret); | |
377 | ||
378 | return 0; | |
379 | } | |
380 | ||
381 | /* Enable the alarm if it should be enabled (in case it was disabled to | |
382 | * prevent use as a wake source). | |
383 | */ | |
384 | static int wm831x_rtc_resume(struct device *dev) | |
385 | { | |
386 | struct platform_device *pdev = to_platform_device(dev); | |
387 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev); | |
388 | int ret; | |
389 | ||
390 | if (wm831x_rtc->alarm_enabled) { | |
391 | ret = wm831x_rtc_start_alarm(wm831x_rtc); | |
392 | if (ret != 0) | |
393 | dev_err(&pdev->dev, | |
394 | "Failed to restart RTC alarm: %d\n", ret); | |
395 | } | |
396 | ||
397 | return 0; | |
398 | } | |
399 | ||
400 | /* Unconditionally disable the alarm */ | |
401 | static int wm831x_rtc_freeze(struct device *dev) | |
402 | { | |
403 | struct platform_device *pdev = to_platform_device(dev); | |
404 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev); | |
405 | int ret; | |
406 | ||
407 | ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL, | |
408 | WM831X_RTC_ALM_ENA, 0); | |
409 | if (ret != 0) | |
410 | dev_err(&pdev->dev, "Failed to stop RTC alarm: %d\n", ret); | |
411 | ||
412 | return 0; | |
413 | } | |
414 | #else | |
415 | #define wm831x_rtc_suspend NULL | |
416 | #define wm831x_rtc_resume NULL | |
417 | #define wm831x_rtc_freeze NULL | |
418 | #endif | |
419 | ||
420 | static int wm831x_rtc_probe(struct platform_device *pdev) | |
421 | { | |
422 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | |
423 | struct wm831x_rtc *wm831x_rtc; | |
424 | int per_irq = platform_get_irq_byname(pdev, "PER"); | |
425 | int alm_irq = platform_get_irq_byname(pdev, "ALM"); | |
426 | int ret = 0; | |
427 | ||
428 | wm831x_rtc = kzalloc(sizeof(*wm831x_rtc), GFP_KERNEL); | |
429 | if (wm831x_rtc == NULL) | |
430 | return -ENOMEM; | |
431 | ||
432 | platform_set_drvdata(pdev, wm831x_rtc); | |
433 | wm831x_rtc->wm831x = wm831x; | |
434 | ||
435 | ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL); | |
436 | if (ret < 0) { | |
437 | dev_err(&pdev->dev, "Failed to read RTC control: %d\n", ret); | |
438 | goto err; | |
439 | } | |
440 | if (ret & WM831X_RTC_ALM_ENA) | |
441 | wm831x_rtc->alarm_enabled = 1; | |
442 | ||
443 | device_init_wakeup(&pdev->dev, 1); | |
444 | ||
445 | wm831x_rtc->rtc = rtc_device_register("wm831x", &pdev->dev, | |
446 | &wm831x_rtc_ops, THIS_MODULE); | |
447 | if (IS_ERR(wm831x_rtc->rtc)) { | |
448 | ret = PTR_ERR(wm831x_rtc->rtc); | |
449 | goto err; | |
450 | } | |
451 | ||
452 | ret = wm831x_request_irq(wm831x, per_irq, wm831x_per_irq, | |
453 | IRQF_TRIGGER_RISING, "wm831x_rtc_per", | |
454 | wm831x_rtc); | |
455 | if (ret != 0) { | |
456 | dev_err(&pdev->dev, "Failed to request periodic IRQ %d: %d\n", | |
457 | per_irq, ret); | |
458 | } | |
459 | ||
460 | ret = wm831x_request_irq(wm831x, alm_irq, wm831x_alm_irq, | |
461 | IRQF_TRIGGER_RISING, "wm831x_rtc_alm", | |
462 | wm831x_rtc); | |
463 | if (ret != 0) { | |
464 | dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n", | |
465 | alm_irq, ret); | |
466 | } | |
467 | ||
468 | return 0; | |
469 | ||
470 | err: | |
471 | kfree(wm831x_rtc); | |
472 | return ret; | |
473 | } | |
474 | ||
475 | static int __devexit wm831x_rtc_remove(struct platform_device *pdev) | |
476 | { | |
477 | struct wm831x_rtc *wm831x_rtc = platform_get_drvdata(pdev); | |
478 | int per_irq = platform_get_irq_byname(pdev, "PER"); | |
479 | int alm_irq = platform_get_irq_byname(pdev, "ALM"); | |
480 | ||
481 | wm831x_free_irq(wm831x_rtc->wm831x, alm_irq, wm831x_rtc); | |
482 | wm831x_free_irq(wm831x_rtc->wm831x, per_irq, wm831x_rtc); | |
483 | rtc_device_unregister(wm831x_rtc->rtc); | |
484 | kfree(wm831x_rtc); | |
485 | ||
486 | return 0; | |
487 | } | |
488 | ||
47145210 | 489 | static const struct dev_pm_ops wm831x_rtc_pm_ops = { |
35c86bf6 MB |
490 | .suspend = wm831x_rtc_suspend, |
491 | .resume = wm831x_rtc_resume, | |
492 | ||
493 | .freeze = wm831x_rtc_freeze, | |
494 | .thaw = wm831x_rtc_resume, | |
495 | .restore = wm831x_rtc_resume, | |
496 | ||
497 | .poweroff = wm831x_rtc_suspend, | |
498 | }; | |
499 | ||
500 | static struct platform_driver wm831x_rtc_driver = { | |
501 | .probe = wm831x_rtc_probe, | |
502 | .remove = __devexit_p(wm831x_rtc_remove), | |
503 | .driver = { | |
504 | .name = "wm831x-rtc", | |
505 | .pm = &wm831x_rtc_pm_ops, | |
506 | }, | |
507 | }; | |
508 | ||
509 | static int __init wm831x_rtc_init(void) | |
510 | { | |
511 | return platform_driver_register(&wm831x_rtc_driver); | |
512 | } | |
513 | module_init(wm831x_rtc_init); | |
514 | ||
515 | static void __exit wm831x_rtc_exit(void) | |
516 | { | |
517 | platform_driver_unregister(&wm831x_rtc_driver); | |
518 | } | |
519 | module_exit(wm831x_rtc_exit); | |
520 | ||
521 | MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); | |
522 | MODULE_DESCRIPTION("RTC driver for the WM831x series PMICs"); | |
523 | MODULE_LICENSE("GPL"); | |
524 | MODULE_ALIAS("platform:wm831x-rtc"); |