Merge branch 'reiserfs/kill-bkl' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / drivers / s390 / cio / qdio_main.c
CommitLineData
779e6e1c
JG
1/*
2 * linux/drivers/s390/cio/qdio_main.c
3 *
4 * Linux for s390 qdio support, buffer handling, qdio API and module support.
5 *
6 * Copyright 2000,2008 IBM Corp.
7 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
8 * Jan Glauber <jang@linux.vnet.ibm.com>
9 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
10 */
11#include <linux/module.h>
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/timer.h>
15#include <linux/delay.h>
16#include <asm/atomic.h>
17#include <asm/debug.h>
18#include <asm/qdio.h>
19
20#include "cio.h"
21#include "css.h"
22#include "device.h"
23#include "qdio.h"
24#include "qdio_debug.h"
25#include "qdio_perf.h"
26
27MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
28 "Jan Glauber <jang@linux.vnet.ibm.com>");
29MODULE_DESCRIPTION("QDIO base support");
30MODULE_LICENSE("GPL");
31
32static inline int do_siga_sync(struct subchannel_id schid,
33 unsigned int out_mask, unsigned int in_mask)
34{
35 register unsigned long __fc asm ("0") = 2;
36 register struct subchannel_id __schid asm ("1") = schid;
37 register unsigned long out asm ("2") = out_mask;
38 register unsigned long in asm ("3") = in_mask;
39 int cc;
40
41 asm volatile(
42 " siga 0\n"
43 " ipm %0\n"
44 " srl %0,28\n"
45 : "=d" (cc)
46 : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
47 return cc;
48}
49
50static inline int do_siga_input(struct subchannel_id schid, unsigned int mask)
51{
52 register unsigned long __fc asm ("0") = 1;
53 register struct subchannel_id __schid asm ("1") = schid;
54 register unsigned long __mask asm ("2") = mask;
55 int cc;
56
57 asm volatile(
58 " siga 0\n"
59 " ipm %0\n"
60 " srl %0,28\n"
61 : "=d" (cc)
62 : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory");
63 return cc;
64}
65
66/**
67 * do_siga_output - perform SIGA-w/wt function
68 * @schid: subchannel id or in case of QEBSM the subchannel token
69 * @mask: which output queues to process
70 * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
71 * @fc: function code to perform
72 *
73 * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION.
74 * Note: For IQDC unicast queues only the highest priority queue is processed.
75 */
76static inline int do_siga_output(unsigned long schid, unsigned long mask,
7a0b4cbc 77 unsigned int *bb, unsigned int fc)
779e6e1c
JG
78{
79 register unsigned long __fc asm("0") = fc;
80 register unsigned long __schid asm("1") = schid;
81 register unsigned long __mask asm("2") = mask;
82 int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION;
83
84 asm volatile(
85 " siga 0\n"
86 "0: ipm %0\n"
87 " srl %0,28\n"
88 "1:\n"
89 EX_TABLE(0b, 1b)
90 : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask)
91 : : "cc", "memory");
92 *bb = ((unsigned int) __fc) >> 31;
93 return cc;
94}
95
96static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
97{
779e6e1c
JG
98 /* all done or next buffer state different */
99 if (ccq == 0 || ccq == 32)
100 return 0;
101 /* not all buffers processed */
102 if (ccq == 96 || ccq == 97)
103 return 1;
104 /* notify devices immediately */
22f99347 105 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
779e6e1c
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106 return -EIO;
107}
108
109/**
110 * qdio_do_eqbs - extract buffer states for QEBSM
111 * @q: queue to manipulate
112 * @state: state of the extracted buffers
113 * @start: buffer number to start at
114 * @count: count of buffers to examine
50f769df 115 * @auto_ack: automatically acknowledge buffers
779e6e1c 116 *
73ac36ea 117 * Returns the number of successfully extracted equal buffer states.
779e6e1c
JG
118 * Stops processing if a state is different from the last buffers state.
119 */
120static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
50f769df 121 int start, int count, int auto_ack)
779e6e1c
JG
122{
123 unsigned int ccq = 0;
124 int tmp_count = count, tmp_start = start;
125 int nr = q->nr;
126 int rc;
779e6e1c
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127
128 BUG_ON(!q->irq_ptr->sch_token);
23589d05 129 qdio_perf_stat_inc(&perf_stats.debug_eqbs_all);
779e6e1c
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130
131 if (!q->is_input_q)
132 nr += q->irq_ptr->nr_input_qs;
133again:
50f769df
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134 ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
135 auto_ack);
779e6e1c
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136 rc = qdio_check_ccq(q, ccq);
137
138 /* At least one buffer was processed, return and extract the remaining
139 * buffers later.
140 */
23589d05
JG
141 if ((ccq == 96) && (count != tmp_count)) {
142 qdio_perf_stat_inc(&perf_stats.debug_eqbs_incomplete);
779e6e1c 143 return (count - tmp_count);
23589d05 144 }
22f99347 145
779e6e1c 146 if (rc == 1) {
22f99347 147 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
779e6e1c
JG
148 goto again;
149 }
150
151 if (rc < 0) {
22f99347
JG
152 DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
153 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
779e6e1c
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154 q->handler(q->irq_ptr->cdev,
155 QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
156 0, -1, -1, q->irq_ptr->int_parm);
157 return 0;
158 }
159 return count - tmp_count;
160}
161
162/**
163 * qdio_do_sqbs - set buffer states for QEBSM
164 * @q: queue to manipulate
165 * @state: new state of the buffers
166 * @start: first buffer number to change
167 * @count: how many buffers to change
168 *
169 * Returns the number of successfully changed buffers.
170 * Does retrying until the specified count of buffer states is set or an
171 * error occurs.
172 */
173static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
174 int count)
175{
176 unsigned int ccq = 0;
177 int tmp_count = count, tmp_start = start;
178 int nr = q->nr;
179 int rc;
779e6e1c 180
50f769df
JG
181 if (!count)
182 return 0;
183
779e6e1c 184 BUG_ON(!q->irq_ptr->sch_token);
23589d05 185 qdio_perf_stat_inc(&perf_stats.debug_sqbs_all);
779e6e1c
JG
186
187 if (!q->is_input_q)
188 nr += q->irq_ptr->nr_input_qs;
189again:
190 ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
191 rc = qdio_check_ccq(q, ccq);
192 if (rc == 1) {
22f99347 193 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
23589d05 194 qdio_perf_stat_inc(&perf_stats.debug_sqbs_incomplete);
779e6e1c
JG
195 goto again;
196 }
197 if (rc < 0) {
22f99347
JG
198 DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
199 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
779e6e1c
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200 q->handler(q->irq_ptr->cdev,
201 QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
202 0, -1, -1, q->irq_ptr->int_parm);
203 return 0;
204 }
205 WARN_ON(tmp_count);
206 return count - tmp_count;
207}
208
209/* returns number of examined buffers and their common state in *state */
210static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
50f769df
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211 unsigned char *state, unsigned int count,
212 int auto_ack)
779e6e1c
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213{
214 unsigned char __state = 0;
215 int i;
216
217 BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
218 BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
219
220 if (is_qebsm(q))
50f769df 221 return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
779e6e1c
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222
223 for (i = 0; i < count; i++) {
224 if (!__state)
225 __state = q->slsb.val[bufnr];
226 else if (q->slsb.val[bufnr] != __state)
227 break;
228 bufnr = next_buf(bufnr);
229 }
230 *state = __state;
231 return i;
232}
233
60b5df2f
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234static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
235 unsigned char *state, int auto_ack)
779e6e1c 236{
50f769df 237 return get_buf_states(q, bufnr, state, 1, auto_ack);
779e6e1c
JG
238}
239
240/* wrap-around safe setting of slsb states, returns number of changed buffers */
241static inline int set_buf_states(struct qdio_q *q, int bufnr,
242 unsigned char state, int count)
243{
244 int i;
245
246 BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
247 BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
248
249 if (is_qebsm(q))
250 return qdio_do_sqbs(q, state, bufnr, count);
251
252 for (i = 0; i < count; i++) {
253 xchg(&q->slsb.val[bufnr], state);
254 bufnr = next_buf(bufnr);
255 }
256 return count;
257}
258
259static inline int set_buf_state(struct qdio_q *q, int bufnr,
260 unsigned char state)
261{
262 return set_buf_states(q, bufnr, state, 1);
263}
264
265/* set slsb states to initial state */
266void qdio_init_buf_states(struct qdio_irq *irq_ptr)
267{
268 struct qdio_q *q;
269 int i;
270
271 for_each_input_queue(irq_ptr, q, i)
272 set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
273 QDIO_MAX_BUFFERS_PER_Q);
274 for_each_output_queue(irq_ptr, q, i)
275 set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
276 QDIO_MAX_BUFFERS_PER_Q);
277}
278
60b5df2f 279static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
779e6e1c
JG
280 unsigned int input)
281{
282 int cc;
283
284 if (!need_siga_sync(q))
285 return 0;
286
7a0b4cbc 287 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
779e6e1c
JG
288 qdio_perf_stat_inc(&perf_stats.siga_sync);
289
290 cc = do_siga_sync(q->irq_ptr->schid, output, input);
22f99347
JG
291 if (cc)
292 DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
779e6e1c
JG
293 return cc;
294}
295
60b5df2f 296static inline int qdio_siga_sync_q(struct qdio_q *q)
779e6e1c
JG
297{
298 if (q->is_input_q)
299 return qdio_siga_sync(q, 0, q->mask);
300 else
301 return qdio_siga_sync(q, q->mask, 0);
302}
303
304static inline int qdio_siga_sync_out(struct qdio_q *q)
305{
306 return qdio_siga_sync(q, ~0U, 0);
307}
308
309static inline int qdio_siga_sync_all(struct qdio_q *q)
310{
311 return qdio_siga_sync(q, ~0U, ~0U);
312}
313
7a0b4cbc 314static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit)
779e6e1c 315{
779e6e1c 316 unsigned long schid;
7a0b4cbc
JG
317 unsigned int fc = 0;
318 u64 start_time = 0;
319 int cc;
779e6e1c 320
7a0b4cbc 321 if (q->u.out.use_enh_siga)
7a0f4755 322 fc = 3;
7a0b4cbc
JG
323
324 if (is_qebsm(q)) {
779e6e1c
JG
325 schid = q->irq_ptr->sch_token;
326 fc |= 0x80;
327 }
7a0b4cbc
JG
328 else
329 schid = *((u32 *)&q->irq_ptr->schid);
779e6e1c 330
779e6e1c 331again:
7a0b4cbc
JG
332 cc = do_siga_output(schid, q->mask, busy_bit, fc);
333
334 /* hipersocket busy condition */
335 if (*busy_bit) {
336 WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2);
58eb27cd 337
7a0b4cbc 338 if (!start_time) {
779e6e1c 339 start_time = get_usecs();
7a0b4cbc
JG
340 goto again;
341 }
342 if ((get_usecs() - start_time) < QDIO_BUSY_BIT_PATIENCE)
779e6e1c
JG
343 goto again;
344 }
779e6e1c
JG
345 return cc;
346}
347
348static inline int qdio_siga_input(struct qdio_q *q)
349{
350 int cc;
351
22f99347 352 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
779e6e1c
JG
353 qdio_perf_stat_inc(&perf_stats.siga_in);
354
355 cc = do_siga_input(q->irq_ptr->schid, q->mask);
356 if (cc)
22f99347 357 DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
779e6e1c
JG
358 return cc;
359}
360
60b5df2f 361static inline void qdio_sync_after_thinint(struct qdio_q *q)
779e6e1c
JG
362{
363 if (pci_out_supported(q)) {
364 if (need_siga_sync_thinint(q))
365 qdio_siga_sync_all(q);
366 else if (need_siga_sync_out_thinint(q))
367 qdio_siga_sync_out(q);
368 } else
369 qdio_siga_sync_q(q);
370}
371
60b5df2f
JG
372int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
373 unsigned char *state)
374{
375 qdio_siga_sync_q(q);
376 return get_buf_states(q, bufnr, state, 1, 0);
377}
378
379static inline void qdio_stop_polling(struct qdio_q *q)
779e6e1c 380{
50f769df 381 if (!q->u.in.polling)
779e6e1c 382 return;
50f769df 383
779e6e1c
JG
384 q->u.in.polling = 0;
385 qdio_perf_stat_inc(&perf_stats.debug_stop_polling);
386
387 /* show the card that we are not polling anymore */
50f769df 388 if (is_qebsm(q)) {
e85dea0e 389 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
50f769df
JG
390 q->u.in.ack_count);
391 q->u.in.ack_count = 0;
392 } else
e85dea0e 393 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
779e6e1c
JG
394}
395
50f769df 396static void announce_buffer_error(struct qdio_q *q, int count)
779e6e1c 397{
7a0b4cbc 398 q->qdio_error |= QDIO_ERROR_SLSB_STATE;
50f769df
JG
399
400 /* special handling for no target buffer empty */
401 if ((!q->is_input_q &&
402 (q->sbal[q->first_to_check]->element[15].flags & 0xff) == 0x10)) {
403 qdio_perf_stat_inc(&perf_stats.outbound_target_full);
1d7e1500 404 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
50f769df
JG
405 q->first_to_check);
406 return;
407 }
408
22f99347
JG
409 DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
410 DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
50f769df 411 DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
22f99347
JG
412 DBF_ERROR("F14:%2x F15:%2x",
413 q->sbal[q->first_to_check]->element[14].flags & 0xff,
414 q->sbal[q->first_to_check]->element[15].flags & 0xff);
50f769df 415}
779e6e1c 416
50f769df
JG
417static inline void inbound_primed(struct qdio_q *q, int count)
418{
419 int new;
420
1d7e1500 421 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count);
50f769df
JG
422
423 /* for QEBSM the ACK was already set by EQBS */
424 if (is_qebsm(q)) {
425 if (!q->u.in.polling) {
426 q->u.in.polling = 1;
427 q->u.in.ack_count = count;
e85dea0e 428 q->u.in.ack_start = q->first_to_check;
50f769df
JG
429 return;
430 }
431
432 /* delete the previous ACK's */
e85dea0e 433 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
50f769df
JG
434 q->u.in.ack_count);
435 q->u.in.ack_count = count;
e85dea0e 436 q->u.in.ack_start = q->first_to_check;
50f769df
JG
437 return;
438 }
439
440 /*
441 * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
442 * or by the next inbound run.
443 */
444 new = add_buf(q->first_to_check, count - 1);
445 if (q->u.in.polling) {
446 /* reset the previous ACK but first set the new one */
447 set_buf_state(q, new, SLSB_P_INPUT_ACK);
e85dea0e 448 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
3fdf1e18 449 } else {
50f769df 450 q->u.in.polling = 1;
3fdf1e18 451 set_buf_state(q, new, SLSB_P_INPUT_ACK);
50f769df
JG
452 }
453
e85dea0e 454 q->u.in.ack_start = new;
50f769df
JG
455 count--;
456 if (!count)
457 return;
6541f7b6
JG
458 /* need to change ALL buffers to get more interrupts */
459 set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
779e6e1c
JG
460}
461
462static int get_inbound_buffer_frontier(struct qdio_q *q)
463{
464 int count, stop;
465 unsigned char state;
466
779e6e1c
JG
467 /*
468 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
469 * would return 0.
470 */
471 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
472 stop = add_buf(q->first_to_check, count);
473
779e6e1c
JG
474 if (q->first_to_check == stop)
475 goto out;
476
36e3e721
JG
477 /*
478 * No siga sync here, as a PCI or we after a thin interrupt
479 * already sync'ed the queues.
480 */
50f769df 481 count = get_buf_states(q, q->first_to_check, &state, count, 1);
779e6e1c
JG
482 if (!count)
483 goto out;
484
485 switch (state) {
486 case SLSB_P_INPUT_PRIMED:
50f769df 487 inbound_primed(q, count);
779e6e1c 488 q->first_to_check = add_buf(q->first_to_check, count);
8bcd9b04
JG
489 if (atomic_sub(count, &q->nr_buf_used) == 0)
490 qdio_perf_stat_inc(&perf_stats.inbound_queue_full);
36e3e721 491 break;
779e6e1c 492 case SLSB_P_INPUT_ERROR:
50f769df 493 announce_buffer_error(q, count);
779e6e1c
JG
494 /* process the buffer, the upper layer will take care of it */
495 q->first_to_check = add_buf(q->first_to_check, count);
496 atomic_sub(count, &q->nr_buf_used);
497 break;
498 case SLSB_CU_INPUT_EMPTY:
499 case SLSB_P_INPUT_NOT_INIT:
500 case SLSB_P_INPUT_ACK:
22f99347 501 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
779e6e1c
JG
502 break;
503 default:
504 BUG();
505 }
506out:
779e6e1c
JG
507 return q->first_to_check;
508}
509
60b5df2f 510static int qdio_inbound_q_moved(struct qdio_q *q)
779e6e1c
JG
511{
512 int bufnr;
513
514 bufnr = get_inbound_buffer_frontier(q);
515
e85dea0e
JG
516 if ((bufnr != q->last_move) || q->qdio_error) {
517 q->last_move = bufnr;
9a2c160a 518 if (!is_thinint_irq(q->irq_ptr) && !MACHINE_IS_VM)
779e6e1c 519 q->u.in.timestamp = get_usecs();
779e6e1c
JG
520 return 1;
521 } else
522 return 0;
523}
524
9a2c160a 525static inline int qdio_inbound_q_done(struct qdio_q *q)
779e6e1c 526{
9a1ce28a 527 unsigned char state = 0;
779e6e1c
JG
528
529 if (!atomic_read(&q->nr_buf_used))
530 return 1;
531
779e6e1c 532 qdio_siga_sync_q(q);
50f769df 533 get_buf_state(q, q->first_to_check, &state, 0);
9a2c160a 534
779e6e1c 535 if (state == SLSB_P_INPUT_PRIMED)
9a2c160a 536 /* more work coming */
779e6e1c
JG
537 return 0;
538
9a2c160a
JG
539 if (is_thinint_irq(q->irq_ptr))
540 return 1;
541
542 /* don't poll under z/VM */
543 if (MACHINE_IS_VM)
779e6e1c
JG
544 return 1;
545
546 /*
547 * At this point we know, that inbound first_to_check
548 * has (probably) not moved (see qdio_inbound_processing).
549 */
550 if (get_usecs() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
1d7e1500 551 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
22f99347 552 q->first_to_check);
779e6e1c 553 return 1;
9a2c160a 554 } else
60b5df2f 555 return 0;
60b5df2f
JG
556}
557
558static void qdio_kick_handler(struct qdio_q *q)
779e6e1c 559{
9c8a08d7
JG
560 int start = q->first_to_kick;
561 int end = q->first_to_check;
562 int count;
779e6e1c
JG
563
564 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
565 return;
566
9c8a08d7
JG
567 count = sub_buf(end, start);
568
569 if (q->is_input_q) {
570 qdio_perf_stat_inc(&perf_stats.inbound_handler);
1d7e1500
JG
571 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
572 } else
573 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
574 start, count);
9c8a08d7
JG
575
576 q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
577 q->irq_ptr->int_parm);
779e6e1c
JG
578
579 /* for the next time */
9c8a08d7 580 q->first_to_kick = end;
779e6e1c
JG
581 q->qdio_error = 0;
582}
583
584static void __qdio_inbound_processing(struct qdio_q *q)
585{
586 qdio_perf_stat_inc(&perf_stats.tasklet_inbound);
587again:
588 if (!qdio_inbound_q_moved(q))
589 return;
590
9c8a08d7 591 qdio_kick_handler(q);
779e6e1c
JG
592
593 if (!qdio_inbound_q_done(q))
594 /* means poll time is not yet over */
595 goto again;
596
597 qdio_stop_polling(q);
598 /*
599 * We need to check again to not lose initiative after
600 * resetting the ACK state.
601 */
602 if (!qdio_inbound_q_done(q))
603 goto again;
604}
605
779e6e1c
JG
606void qdio_inbound_processing(unsigned long data)
607{
608 struct qdio_q *q = (struct qdio_q *)data;
609 __qdio_inbound_processing(q);
610}
611
612static int get_outbound_buffer_frontier(struct qdio_q *q)
613{
614 int count, stop;
615 unsigned char state;
616
617 if (((queue_type(q) != QDIO_IQDIO_QFMT) && !pci_out_supported(q)) ||
618 (queue_type(q) == QDIO_IQDIO_QFMT && multicast_outbound(q)))
619 qdio_siga_sync_q(q);
620
621 /*
622 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
623 * would return 0.
624 */
625 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
626 stop = add_buf(q->first_to_check, count);
627
779e6e1c
JG
628 if (q->first_to_check == stop)
629 return q->first_to_check;
630
50f769df 631 count = get_buf_states(q, q->first_to_check, &state, count, 0);
779e6e1c
JG
632 if (!count)
633 return q->first_to_check;
634
635 switch (state) {
636 case SLSB_P_OUTPUT_EMPTY:
637 /* the adapter got it */
1d7e1500 638 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out empty:%1d %02x", q->nr, count);
779e6e1c
JG
639
640 atomic_sub(count, &q->nr_buf_used);
641 q->first_to_check = add_buf(q->first_to_check, count);
36e3e721 642 break;
779e6e1c 643 case SLSB_P_OUTPUT_ERROR:
50f769df 644 announce_buffer_error(q, count);
779e6e1c
JG
645 /* process the buffer, the upper layer will take care of it */
646 q->first_to_check = add_buf(q->first_to_check, count);
647 atomic_sub(count, &q->nr_buf_used);
648 break;
649 case SLSB_CU_OUTPUT_PRIMED:
650 /* the adapter has not fetched the output yet */
22f99347 651 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d", q->nr);
779e6e1c
JG
652 break;
653 case SLSB_P_OUTPUT_NOT_INIT:
654 case SLSB_P_OUTPUT_HALTED:
655 break;
656 default:
657 BUG();
658 }
659 return q->first_to_check;
660}
661
662/* all buffers processed? */
663static inline int qdio_outbound_q_done(struct qdio_q *q)
664{
665 return atomic_read(&q->nr_buf_used) == 0;
666}
667
668static inline int qdio_outbound_q_moved(struct qdio_q *q)
669{
670 int bufnr;
671
672 bufnr = get_outbound_buffer_frontier(q);
673
e85dea0e
JG
674 if ((bufnr != q->last_move) || q->qdio_error) {
675 q->last_move = bufnr;
22f99347 676 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
779e6e1c
JG
677 return 1;
678 } else
679 return 0;
680}
681
d303b6fd 682static int qdio_kick_outbound_q(struct qdio_q *q)
779e6e1c 683{
7a0b4cbc
JG
684 unsigned int busy_bit;
685 int cc;
779e6e1c
JG
686
687 if (!need_siga_out(q))
d303b6fd 688 return 0;
779e6e1c 689
7a0b4cbc
JG
690 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
691 qdio_perf_stat_inc(&perf_stats.siga_out);
692
693 cc = qdio_siga_output(q, &busy_bit);
694 switch (cc) {
779e6e1c 695 case 0:
779e6e1c 696 break;
7a0b4cbc
JG
697 case 2:
698 if (busy_bit) {
699 DBF_ERROR("%4x cc2 REP:%1d", SCH_NO(q), q->nr);
d303b6fd
JG
700 cc |= QDIO_ERROR_SIGA_BUSY;
701 } else
702 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
7a0b4cbc
JG
703 break;
704 case 1:
705 case 3:
706 DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
7a0b4cbc 707 break;
779e6e1c 708 }
d303b6fd 709 return cc;
779e6e1c
JG
710}
711
779e6e1c
JG
712static void __qdio_outbound_processing(struct qdio_q *q)
713{
779e6e1c 714 qdio_perf_stat_inc(&perf_stats.tasklet_outbound);
779e6e1c
JG
715 BUG_ON(atomic_read(&q->nr_buf_used) < 0);
716
717 if (qdio_outbound_q_moved(q))
9c8a08d7 718 qdio_kick_handler(q);
779e6e1c 719
c38f9608 720 if (queue_type(q) == QDIO_ZFCP_QFMT)
779e6e1c 721 if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
c38f9608 722 goto sched;
779e6e1c
JG
723
724 /* bail out for HiperSockets unicast queues */
725 if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q))
726 return;
727
4bcb3a37 728 if ((queue_type(q) == QDIO_IQDIO_QFMT) &&
c38f9608
JG
729 (atomic_read(&q->nr_buf_used)) > QDIO_IQDIO_POLL_LVL)
730 goto sched;
4bcb3a37 731
779e6e1c
JG
732 if (q->u.out.pci_out_enabled)
733 return;
734
735 /*
736 * Now we know that queue type is either qeth without pci enabled
737 * or HiperSockets multicast. Make sure buffer switch from PRIMED to
738 * EMPTY is noticed and outbound_handler is called after some time.
739 */
740 if (qdio_outbound_q_done(q))
741 del_timer(&q->u.out.timer);
742 else {
743 if (!timer_pending(&q->u.out.timer)) {
744 mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
745 qdio_perf_stat_inc(&perf_stats.debug_tl_out_timer);
746 }
747 }
c38f9608
JG
748 return;
749
750sched:
751 if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
752 return;
753 tasklet_schedule(&q->tasklet);
779e6e1c
JG
754}
755
756/* outbound tasklet */
757void qdio_outbound_processing(unsigned long data)
758{
759 struct qdio_q *q = (struct qdio_q *)data;
760 __qdio_outbound_processing(q);
761}
762
763void qdio_outbound_timer(unsigned long data)
764{
765 struct qdio_q *q = (struct qdio_q *)data;
c38f9608
JG
766
767 if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
768 return;
779e6e1c
JG
769 tasklet_schedule(&q->tasklet);
770}
771
60b5df2f 772static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
779e6e1c
JG
773{
774 struct qdio_q *out;
775 int i;
776
777 if (!pci_out_supported(q))
778 return;
779
780 for_each_output_queue(q->irq_ptr, out, i)
781 if (!qdio_outbound_q_done(out))
782 tasklet_schedule(&out->tasklet);
783}
784
60b5df2f
JG
785static void __tiqdio_inbound_processing(struct qdio_q *q)
786{
787 qdio_perf_stat_inc(&perf_stats.thinint_inbound);
788 qdio_sync_after_thinint(q);
789
790 /*
791 * The interrupt could be caused by a PCI request. Check the
792 * PCI capable outbound queues.
793 */
794 qdio_check_outbound_after_thinint(q);
795
796 if (!qdio_inbound_q_moved(q))
797 return;
798
799 qdio_kick_handler(q);
800
9a2c160a 801 if (!qdio_inbound_q_done(q)) {
60b5df2f 802 qdio_perf_stat_inc(&perf_stats.thinint_inbound_loop);
e2910bcf 803 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
60b5df2f 804 tasklet_schedule(&q->tasklet);
e2910bcf
JG
805 return;
806 }
60b5df2f
JG
807 }
808
809 qdio_stop_polling(q);
810 /*
811 * We need to check again to not lose initiative after
812 * resetting the ACK state.
813 */
9a2c160a 814 if (!qdio_inbound_q_done(q)) {
60b5df2f
JG
815 qdio_perf_stat_inc(&perf_stats.thinint_inbound_loop2);
816 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
817 tasklet_schedule(&q->tasklet);
818 }
819}
820
821void tiqdio_inbound_processing(unsigned long data)
822{
823 struct qdio_q *q = (struct qdio_q *)data;
824 __tiqdio_inbound_processing(q);
825}
826
779e6e1c
JG
827static inline void qdio_set_state(struct qdio_irq *irq_ptr,
828 enum qdio_irq_states state)
829{
22f99347 830 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
779e6e1c
JG
831
832 irq_ptr->state = state;
833 mb();
834}
835
22f99347 836static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
779e6e1c 837{
779e6e1c 838 if (irb->esw.esw0.erw.cons) {
22f99347
JG
839 DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
840 DBF_ERROR_HEX(irb, 64);
841 DBF_ERROR_HEX(irb->ecw, 64);
779e6e1c
JG
842 }
843}
844
845/* PCI interrupt handler */
846static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
847{
848 int i;
849 struct qdio_q *q;
850
c38f9608
JG
851 if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
852 return;
853
779e6e1c
JG
854 qdio_perf_stat_inc(&perf_stats.pci_int);
855
856 for_each_input_queue(irq_ptr, q, i)
857 tasklet_schedule(&q->tasklet);
858
859 if (!(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED))
860 return;
861
862 for_each_output_queue(irq_ptr, q, i) {
863 if (qdio_outbound_q_done(q))
864 continue;
865
866 if (!siga_syncs_out_pci(q))
867 qdio_siga_sync_q(q);
868
869 tasklet_schedule(&q->tasklet);
870 }
871}
872
873static void qdio_handle_activate_check(struct ccw_device *cdev,
874 unsigned long intparm, int cstat, int dstat)
875{
876 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
877 struct qdio_q *q;
779e6e1c 878
22f99347
JG
879 DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
880 DBF_ERROR("intp :%lx", intparm);
881 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
779e6e1c
JG
882
883 if (irq_ptr->nr_input_qs) {
884 q = irq_ptr->input_qs[0];
885 } else if (irq_ptr->nr_output_qs) {
886 q = irq_ptr->output_qs[0];
887 } else {
888 dump_stack();
889 goto no_handler;
890 }
891 q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
892 0, -1, -1, irq_ptr->int_parm);
893no_handler:
894 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
895}
896
4c575423
JG
897static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
898 int dstat)
779e6e1c
JG
899{
900 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
901
4c575423 902 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
779e6e1c 903
4c575423 904 if (cstat)
779e6e1c 905 goto error;
4c575423 906 if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
779e6e1c 907 goto error;
4c575423
JG
908 if (!(dstat & DEV_STAT_DEV_END))
909 goto error;
910 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
911 return;
912
779e6e1c 913error:
22f99347
JG
914 DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
915 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
779e6e1c 916 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
779e6e1c
JG
917}
918
919/* qdio interrupt handler */
920void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
921 struct irb *irb)
922{
923 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
924 int cstat, dstat;
779e6e1c
JG
925
926 qdio_perf_stat_inc(&perf_stats.qdio_int);
927
928 if (!intparm || !irq_ptr) {
22f99347 929 DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
779e6e1c
JG
930 return;
931 }
932
933 if (IS_ERR(irb)) {
934 switch (PTR_ERR(irb)) {
935 case -EIO:
22f99347 936 DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
75cb71f3
JG
937 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
938 wake_up(&cdev->private->wait_q);
779e6e1c
JG
939 return;
940 default:
941 WARN_ON(1);
942 return;
943 }
944 }
22f99347 945 qdio_irq_check_sense(irq_ptr, irb);
779e6e1c
JG
946 cstat = irb->scsw.cmd.cstat;
947 dstat = irb->scsw.cmd.dstat;
948
949 switch (irq_ptr->state) {
950 case QDIO_IRQ_STATE_INACTIVE:
951 qdio_establish_handle_irq(cdev, cstat, dstat);
952 break;
779e6e1c
JG
953 case QDIO_IRQ_STATE_CLEANUP:
954 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
955 break;
779e6e1c
JG
956 case QDIO_IRQ_STATE_ESTABLISHED:
957 case QDIO_IRQ_STATE_ACTIVE:
958 if (cstat & SCHN_STAT_PCI) {
959 qdio_int_handler_pci(irq_ptr);
779e6e1c
JG
960 return;
961 }
4c575423 962 if (cstat || dstat)
779e6e1c
JG
963 qdio_handle_activate_check(cdev, intparm, cstat,
964 dstat);
4c575423 965 break;
779e6e1c
JG
966 default:
967 WARN_ON(1);
968 }
969 wake_up(&cdev->private->wait_q);
970}
971
972/**
973 * qdio_get_ssqd_desc - get qdio subchannel description
974 * @cdev: ccw device to get description for
bbd50e17 975 * @data: where to store the ssqd
779e6e1c 976 *
bbd50e17
JG
977 * Returns 0 or an error code. The results of the chsc are stored in the
978 * specified structure.
779e6e1c 979 */
bbd50e17
JG
980int qdio_get_ssqd_desc(struct ccw_device *cdev,
981 struct qdio_ssqd_desc *data)
779e6e1c 982{
779e6e1c 983
bbd50e17
JG
984 if (!cdev || !cdev->private)
985 return -EINVAL;
986
22f99347 987 DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
bbd50e17 988 return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
779e6e1c
JG
989}
990EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
991
992/**
993 * qdio_cleanup - shutdown queues and free data structures
994 * @cdev: associated ccw device
995 * @how: use halt or clear to shutdown
996 *
700e982f
JG
997 * This function calls qdio_shutdown() for @cdev with method @how.
998 * and qdio_free(). The qdio_free() return value is ignored since
999 * !irq_ptr is already checked.
779e6e1c
JG
1000 */
1001int qdio_cleanup(struct ccw_device *cdev, int how)
1002{
22f99347 1003 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
779e6e1c
JG
1004 int rc;
1005
779e6e1c
JG
1006 if (!irq_ptr)
1007 return -ENODEV;
1008
779e6e1c 1009 rc = qdio_shutdown(cdev, how);
700e982f
JG
1010
1011 qdio_free(cdev);
779e6e1c
JG
1012 return rc;
1013}
1014EXPORT_SYMBOL_GPL(qdio_cleanup);
1015
1016static void qdio_shutdown_queues(struct ccw_device *cdev)
1017{
1018 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1019 struct qdio_q *q;
1020 int i;
1021
1022 for_each_input_queue(irq_ptr, q, i)
c38f9608 1023 tasklet_kill(&q->tasklet);
779e6e1c
JG
1024
1025 for_each_output_queue(irq_ptr, q, i) {
779e6e1c 1026 del_timer(&q->u.out.timer);
c38f9608 1027 tasklet_kill(&q->tasklet);
779e6e1c
JG
1028 }
1029}
1030
1031/**
1032 * qdio_shutdown - shut down a qdio subchannel
1033 * @cdev: associated ccw device
1034 * @how: use halt or clear to shutdown
1035 */
1036int qdio_shutdown(struct ccw_device *cdev, int how)
1037{
22f99347 1038 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
779e6e1c
JG
1039 int rc;
1040 unsigned long flags;
779e6e1c 1041
779e6e1c
JG
1042 if (!irq_ptr)
1043 return -ENODEV;
1044
b4547402 1045 BUG_ON(irqs_disabled());
22f99347
JG
1046 DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
1047
779e6e1c
JG
1048 mutex_lock(&irq_ptr->setup_mutex);
1049 /*
1050 * Subchannel was already shot down. We cannot prevent being called
1051 * twice since cio may trigger a shutdown asynchronously.
1052 */
1053 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1054 mutex_unlock(&irq_ptr->setup_mutex);
1055 return 0;
1056 }
1057
c38f9608
JG
1058 /*
1059 * Indicate that the device is going down. Scheduling the queue
1060 * tasklets is forbidden from here on.
1061 */
1062 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1063
779e6e1c
JG
1064 tiqdio_remove_input_queues(irq_ptr);
1065 qdio_shutdown_queues(cdev);
1066 qdio_shutdown_debug_entries(irq_ptr, cdev);
1067
1068 /* cleanup subchannel */
1069 spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
1070
1071 if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
1072 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
1073 else
1074 /* default behaviour is halt */
1075 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
1076 if (rc) {
22f99347
JG
1077 DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
1078 DBF_ERROR("rc:%4d", rc);
779e6e1c
JG
1079 goto no_cleanup;
1080 }
1081
1082 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
1083 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
1084 wait_event_interruptible_timeout(cdev->private->wait_q,
1085 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
1086 irq_ptr->state == QDIO_IRQ_STATE_ERR,
1087 10 * HZ);
1088 spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
1089
1090no_cleanup:
1091 qdio_shutdown_thinint(irq_ptr);
1092
1093 /* restore interrupt handler */
1094 if ((void *)cdev->handler == (void *)qdio_int_handler)
1095 cdev->handler = irq_ptr->orig_handler;
1096 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
1097
1098 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1099 mutex_unlock(&irq_ptr->setup_mutex);
779e6e1c
JG
1100 if (rc)
1101 return rc;
1102 return 0;
1103}
1104EXPORT_SYMBOL_GPL(qdio_shutdown);
1105
1106/**
1107 * qdio_free - free data structures for a qdio subchannel
1108 * @cdev: associated ccw device
1109 */
1110int qdio_free(struct ccw_device *cdev)
1111{
22f99347 1112 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
58eb27cd 1113
779e6e1c
JG
1114 if (!irq_ptr)
1115 return -ENODEV;
1116
22f99347 1117 DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
779e6e1c 1118 mutex_lock(&irq_ptr->setup_mutex);
22f99347
JG
1119
1120 if (irq_ptr->debug_area != NULL) {
1121 debug_unregister(irq_ptr->debug_area);
1122 irq_ptr->debug_area = NULL;
1123 }
779e6e1c
JG
1124 cdev->private->qdio_data = NULL;
1125 mutex_unlock(&irq_ptr->setup_mutex);
1126
1127 qdio_release_memory(irq_ptr);
1128 return 0;
1129}
1130EXPORT_SYMBOL_GPL(qdio_free);
1131
1132/**
1133 * qdio_initialize - allocate and establish queues for a qdio subchannel
1134 * @init_data: initialization data
1135 *
1136 * This function first allocates queues via qdio_allocate() and on success
1137 * establishes them via qdio_establish().
1138 */
1139int qdio_initialize(struct qdio_initialize *init_data)
1140{
1141 int rc;
779e6e1c
JG
1142
1143 rc = qdio_allocate(init_data);
1144 if (rc)
1145 return rc;
1146
1147 rc = qdio_establish(init_data);
1148 if (rc)
1149 qdio_free(init_data->cdev);
1150 return rc;
1151}
1152EXPORT_SYMBOL_GPL(qdio_initialize);
1153
1154/**
1155 * qdio_allocate - allocate qdio queues and associated data
1156 * @init_data: initialization data
1157 */
1158int qdio_allocate(struct qdio_initialize *init_data)
1159{
1160 struct qdio_irq *irq_ptr;
779e6e1c 1161
22f99347 1162 DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
779e6e1c
JG
1163
1164 if ((init_data->no_input_qs && !init_data->input_handler) ||
1165 (init_data->no_output_qs && !init_data->output_handler))
1166 return -EINVAL;
1167
1168 if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
1169 (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
1170 return -EINVAL;
1171
1172 if ((!init_data->input_sbal_addr_array) ||
1173 (!init_data->output_sbal_addr_array))
1174 return -EINVAL;
1175
779e6e1c
JG
1176 /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
1177 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1178 if (!irq_ptr)
1179 goto out_err;
779e6e1c
JG
1180
1181 mutex_init(&irq_ptr->setup_mutex);
22f99347 1182 qdio_allocate_dbf(init_data, irq_ptr);
779e6e1c
JG
1183
1184 /*
1185 * Allocate a page for the chsc calls in qdio_establish.
1186 * Must be pre-allocated since a zfcp recovery will call
1187 * qdio_establish. In case of low memory and swap on a zfcp disk
1188 * we may not be able to allocate memory otherwise.
1189 */
1190 irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
1191 if (!irq_ptr->chsc_page)
1192 goto out_rel;
1193
1194 /* qdr is used in ccw1.cda which is u32 */
3b8e3004 1195 irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
779e6e1c
JG
1196 if (!irq_ptr->qdr)
1197 goto out_rel;
1198 WARN_ON((unsigned long)irq_ptr->qdr & 0xfff);
1199
779e6e1c
JG
1200 if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
1201 init_data->no_output_qs))
1202 goto out_rel;
1203
1204 init_data->cdev->private->qdio_data = irq_ptr;
1205 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1206 return 0;
1207out_rel:
1208 qdio_release_memory(irq_ptr);
1209out_err:
1210 return -ENOMEM;
1211}
1212EXPORT_SYMBOL_GPL(qdio_allocate);
1213
1214/**
1215 * qdio_establish - establish queues on a qdio subchannel
1216 * @init_data: initialization data
1217 */
1218int qdio_establish(struct qdio_initialize *init_data)
1219{
779e6e1c
JG
1220 struct qdio_irq *irq_ptr;
1221 struct ccw_device *cdev = init_data->cdev;
1222 unsigned long saveflags;
1223 int rc;
1224
22f99347 1225 DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
58eb27cd 1226
779e6e1c
JG
1227 irq_ptr = cdev->private->qdio_data;
1228 if (!irq_ptr)
1229 return -ENODEV;
1230
1231 if (cdev->private->state != DEV_STATE_ONLINE)
1232 return -EINVAL;
1233
779e6e1c
JG
1234 mutex_lock(&irq_ptr->setup_mutex);
1235 qdio_setup_irq(init_data);
1236
1237 rc = qdio_establish_thinint(irq_ptr);
1238 if (rc) {
1239 mutex_unlock(&irq_ptr->setup_mutex);
1240 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1241 return rc;
1242 }
1243
1244 /* establish q */
1245 irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
1246 irq_ptr->ccw.flags = CCW_FLAG_SLI;
1247 irq_ptr->ccw.count = irq_ptr->equeue.count;
1248 irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
1249
1250 spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
1251 ccw_device_set_options_mask(cdev, 0);
1252
1253 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
1254 if (rc) {
22f99347
JG
1255 DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
1256 DBF_ERROR("rc:%4x", rc);
779e6e1c
JG
1257 }
1258 spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
1259
1260 if (rc) {
1261 mutex_unlock(&irq_ptr->setup_mutex);
1262 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1263 return rc;
1264 }
1265
1266 wait_event_interruptible_timeout(cdev->private->wait_q,
1267 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
1268 irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
1269
1270 if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
1271 mutex_unlock(&irq_ptr->setup_mutex);
1272 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1273 return -EIO;
1274 }
1275
1276 qdio_setup_ssqd_info(irq_ptr);
22f99347
JG
1277 DBF_EVENT("qDmmwc:%2x", irq_ptr->ssqd_desc.mmwc);
1278 DBF_EVENT("qib ac:%4x", irq_ptr->qib.ac);
779e6e1c
JG
1279
1280 /* qebsm is now setup if available, initialize buffer states */
1281 qdio_init_buf_states(irq_ptr);
1282
1283 mutex_unlock(&irq_ptr->setup_mutex);
1284 qdio_print_subchannel_info(irq_ptr, cdev);
1285 qdio_setup_debug_entries(irq_ptr, cdev);
1286 return 0;
1287}
1288EXPORT_SYMBOL_GPL(qdio_establish);
1289
1290/**
1291 * qdio_activate - activate queues on a qdio subchannel
1292 * @cdev: associated cdev
1293 */
1294int qdio_activate(struct ccw_device *cdev)
1295{
1296 struct qdio_irq *irq_ptr;
1297 int rc;
1298 unsigned long saveflags;
779e6e1c 1299
22f99347 1300 DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
58eb27cd 1301
779e6e1c
JG
1302 irq_ptr = cdev->private->qdio_data;
1303 if (!irq_ptr)
1304 return -ENODEV;
1305
1306 if (cdev->private->state != DEV_STATE_ONLINE)
1307 return -EINVAL;
1308
1309 mutex_lock(&irq_ptr->setup_mutex);
1310 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1311 rc = -EBUSY;
1312 goto out;
1313 }
1314
779e6e1c
JG
1315 irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
1316 irq_ptr->ccw.flags = CCW_FLAG_SLI;
1317 irq_ptr->ccw.count = irq_ptr->aqueue.count;
1318 irq_ptr->ccw.cda = 0;
1319
1320 spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
1321 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
1322
1323 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
1324 0, DOIO_DENY_PREFETCH);
1325 if (rc) {
22f99347
JG
1326 DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
1327 DBF_ERROR("rc:%4x", rc);
779e6e1c
JG
1328 }
1329 spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
1330
1331 if (rc)
1332 goto out;
1333
1334 if (is_thinint_irq(irq_ptr))
1335 tiqdio_add_input_queues(irq_ptr);
1336
1337 /* wait for subchannel to become active */
1338 msleep(5);
1339
1340 switch (irq_ptr->state) {
1341 case QDIO_IRQ_STATE_STOPPED:
1342 case QDIO_IRQ_STATE_ERR:
e4c14e20
JG
1343 rc = -EIO;
1344 break;
779e6e1c
JG
1345 default:
1346 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
1347 rc = 0;
1348 }
1349out:
1350 mutex_unlock(&irq_ptr->setup_mutex);
1351 return rc;
1352}
1353EXPORT_SYMBOL_GPL(qdio_activate);
1354
1355static inline int buf_in_between(int bufnr, int start, int count)
1356{
1357 int end = add_buf(start, count);
1358
1359 if (end > start) {
1360 if (bufnr >= start && bufnr < end)
1361 return 1;
1362 else
1363 return 0;
1364 }
1365
1366 /* wrap-around case */
1367 if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
1368 (bufnr < end))
1369 return 1;
1370 else
1371 return 0;
1372}
1373
1374/**
1375 * handle_inbound - reset processed input buffers
1376 * @q: queue containing the buffers
1377 * @callflags: flags
1378 * @bufnr: first buffer to process
1379 * @count: how many buffers are emptied
1380 */
d303b6fd
JG
1381static int handle_inbound(struct qdio_q *q, unsigned int callflags,
1382 int bufnr, int count)
779e6e1c 1383{
d303b6fd 1384 int used, diff;
779e6e1c 1385
50f769df
JG
1386 if (!q->u.in.polling)
1387 goto set;
1388
1389 /* protect against stop polling setting an ACK for an emptied slsb */
1390 if (count == QDIO_MAX_BUFFERS_PER_Q) {
1391 /* overwriting everything, just delete polling status */
1392 q->u.in.polling = 0;
1393 q->u.in.ack_count = 0;
1394 goto set;
e85dea0e 1395 } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
50f769df 1396 if (is_qebsm(q)) {
e85dea0e 1397 /* partial overwrite, just update ack_start */
50f769df 1398 diff = add_buf(bufnr, count);
e85dea0e 1399 diff = sub_buf(diff, q->u.in.ack_start);
50f769df
JG
1400 q->u.in.ack_count -= diff;
1401 if (q->u.in.ack_count <= 0) {
1402 q->u.in.polling = 0;
1403 q->u.in.ack_count = 0;
50f769df
JG
1404 goto set;
1405 }
e85dea0e 1406 q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
50f769df
JG
1407 }
1408 else
1409 /* the only ACK will be deleted, so stop polling */
779e6e1c 1410 q->u.in.polling = 0;
50f769df 1411 }
779e6e1c 1412
50f769df 1413set:
779e6e1c 1414 count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
779e6e1c
JG
1415
1416 used = atomic_add_return(count, &q->nr_buf_used) - count;
1417 BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q);
1418
1419 /* no need to signal as long as the adapter had free buffers */
1420 if (used)
d303b6fd 1421 return 0;
779e6e1c 1422
d303b6fd
JG
1423 if (need_siga_in(q))
1424 return qdio_siga_input(q);
1425 return 0;
779e6e1c
JG
1426}
1427
1428/**
1429 * handle_outbound - process filled outbound buffers
1430 * @q: queue containing the buffers
1431 * @callflags: flags
1432 * @bufnr: first buffer to process
1433 * @count: how many buffers are filled
1434 */
d303b6fd
JG
1435static int handle_outbound(struct qdio_q *q, unsigned int callflags,
1436 int bufnr, int count)
779e6e1c
JG
1437{
1438 unsigned char state;
d303b6fd 1439 int used, rc = 0;
779e6e1c
JG
1440
1441 qdio_perf_stat_inc(&perf_stats.outbound_handler);
1442
1443 count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
1444 used = atomic_add_return(count, &q->nr_buf_used);
1445 BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q);
1446
1447 if (callflags & QDIO_FLAG_PCI_OUT)
1448 q->u.out.pci_out_enabled = 1;
1449 else
1450 q->u.out.pci_out_enabled = 0;
1451
1452 if (queue_type(q) == QDIO_IQDIO_QFMT) {
1453 if (multicast_outbound(q))
d303b6fd 1454 rc = qdio_kick_outbound_q(q);
779e6e1c 1455 else
7a0f4755
KDW
1456 if ((q->irq_ptr->ssqd_desc.mmwc > 1) &&
1457 (count > 1) &&
1458 (count <= q->irq_ptr->ssqd_desc.mmwc)) {
1459 /* exploit enhanced SIGA */
1460 q->u.out.use_enh_siga = 1;
d303b6fd 1461 rc = qdio_kick_outbound_q(q);
7a0f4755
KDW
1462 } else {
1463 /*
1464 * One siga-w per buffer required for unicast
1465 * HiperSockets.
1466 */
1467 q->u.out.use_enh_siga = 0;
d303b6fd
JG
1468 while (count--) {
1469 rc = qdio_kick_outbound_q(q);
1470 if (rc)
1471 goto out;
1472 }
7a0f4755 1473 }
779e6e1c
JG
1474 goto out;
1475 }
1476
1477 if (need_siga_sync(q)) {
1478 qdio_siga_sync_q(q);
1479 goto out;
1480 }
1481
1482 /* try to fast requeue buffers */
50f769df 1483 get_buf_state(q, prev_buf(bufnr), &state, 0);
779e6e1c 1484 if (state != SLSB_CU_OUTPUT_PRIMED)
d303b6fd 1485 rc = qdio_kick_outbound_q(q);
1d7e1500 1486 else
779e6e1c 1487 qdio_perf_stat_inc(&perf_stats.fast_requeue);
1d7e1500 1488
779e6e1c 1489out:
779e6e1c 1490 tasklet_schedule(&q->tasklet);
d303b6fd 1491 return rc;
779e6e1c
JG
1492}
1493
1494/**
1495 * do_QDIO - process input or output buffers
1496 * @cdev: associated ccw_device for the qdio subchannel
1497 * @callflags: input or output and special flags from the program
1498 * @q_nr: queue number
1499 * @bufnr: buffer number
1500 * @count: how many buffers to process
1501 */
1502int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
6618241b 1503 int q_nr, unsigned int bufnr, unsigned int count)
779e6e1c
JG
1504{
1505 struct qdio_irq *irq_ptr;
779e6e1c 1506
6618241b 1507 if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
779e6e1c
JG
1508 return -EINVAL;
1509
779e6e1c
JG
1510 irq_ptr = cdev->private->qdio_data;
1511 if (!irq_ptr)
1512 return -ENODEV;
1513
1d7e1500
JG
1514 DBF_DEV_EVENT(DBF_INFO, irq_ptr,
1515 "do%02x b:%02x c:%02x", callflags, bufnr, count);
779e6e1c
JG
1516
1517 if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
1518 return -EBUSY;
1519
1520 if (callflags & QDIO_FLAG_SYNC_INPUT)
d303b6fd
JG
1521 return handle_inbound(irq_ptr->input_qs[q_nr],
1522 callflags, bufnr, count);
779e6e1c 1523 else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
d303b6fd
JG
1524 return handle_outbound(irq_ptr->output_qs[q_nr],
1525 callflags, bufnr, count);
1526 return -EINVAL;
779e6e1c
JG
1527}
1528EXPORT_SYMBOL_GPL(do_QDIO);
1529
1530static int __init init_QDIO(void)
1531{
1532 int rc;
1533
1534 rc = qdio_setup_init();
1535 if (rc)
1536 return rc;
1537 rc = tiqdio_allocate_memory();
1538 if (rc)
1539 goto out_cache;
1540 rc = qdio_debug_init();
1541 if (rc)
1542 goto out_ti;
1543 rc = qdio_setup_perf_stats();
1544 if (rc)
1545 goto out_debug;
1546 rc = tiqdio_register_thinints();
1547 if (rc)
1548 goto out_perf;
1549 return 0;
1550
1551out_perf:
1552 qdio_remove_perf_stats();
1553out_debug:
1554 qdio_debug_exit();
1555out_ti:
1556 tiqdio_free_memory();
1557out_cache:
1558 qdio_setup_exit();
1559 return rc;
1560}
1561
1562static void __exit exit_QDIO(void)
1563{
1564 tiqdio_unregister_thinints();
1565 tiqdio_free_memory();
1566 qdio_remove_perf_stats();
1567 qdio_debug_exit();
1568 qdio_setup_exit();
1569}
1570
1571module_init(init_QDIO);
1572module_exit(exit_QDIO);
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