Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * drivers/s390/s390mach.c | |
3 | * S/390 machine check handler | |
4 | * | |
c1156189 | 5 | * Copyright IBM Corp. 2000,2008 |
1da177e4 LT |
6 | * Author(s): Ingo Adlung (adlung@de.ibm.com) |
7 | * Martin Schwidefsky (schwidefsky@de.ibm.com) | |
c1156189 | 8 | * Cornelia Huck <cornelia.huck@de.ibm.com> |
1da177e4 LT |
9 | */ |
10 | ||
1da177e4 LT |
11 | #include <linux/init.h> |
12 | #include <linux/sched.h> | |
13 | #include <linux/errno.h> | |
14 | #include <linux/workqueue.h> | |
022e4fc0 | 15 | #include <linux/time.h> |
2b67fc46 | 16 | #include <linux/device.h> |
84d11c5d | 17 | #include <linux/kthread.h> |
d54853ef | 18 | #include <asm/etr.h> |
1da177e4 | 19 | #include <asm/lowcore.h> |
2b67fc46 | 20 | #include <asm/cio.h> |
1da177e4 LT |
21 | #include "s390mach.h" |
22 | ||
1da177e4 LT |
23 | static struct semaphore m_sem; |
24 | ||
77fa2245 | 25 | static NORET_TYPE void |
1da177e4 LT |
26 | s390_handle_damage(char *msg) |
27 | { | |
1da177e4 LT |
28 | #ifdef CONFIG_SMP |
29 | smp_send_stop(); | |
30 | #endif | |
31 | disabled_wait((unsigned long) __builtin_return_address(0)); | |
77fa2245 | 32 | for(;;); |
1da177e4 LT |
33 | } |
34 | ||
c1156189 CH |
35 | static crw_handler_t crw_handlers[NR_RSCS]; |
36 | ||
37 | /** | |
38 | * s390_register_crw_handler() - register a channel report word handler | |
39 | * @rsc: reporting source code to handle | |
40 | * @handler: handler to be registered | |
41 | * | |
42 | * Returns %0 on success and a negative error value otherwise. | |
43 | */ | |
44 | int s390_register_crw_handler(int rsc, crw_handler_t handler) | |
45 | { | |
46 | if ((rsc < 0) || (rsc >= NR_RSCS)) | |
47 | return -EINVAL; | |
48 | if (!cmpxchg(&crw_handlers[rsc], NULL, handler)) | |
49 | return 0; | |
50 | return -EBUSY; | |
51 | } | |
52 | ||
53 | /** | |
54 | * s390_unregister_crw_handler() - unregister a channel report word handler | |
55 | * @rsc: reporting source code to handle | |
56 | */ | |
57 | void s390_unregister_crw_handler(int rsc) | |
58 | { | |
59 | if ((rsc < 0) || (rsc >= NR_RSCS)) | |
60 | return; | |
61 | xchg(&crw_handlers[rsc], NULL); | |
62 | synchronize_sched(); | |
63 | } | |
64 | ||
1da177e4 LT |
65 | /* |
66 | * Retrieve CRWs and call function to handle event. | |
1da177e4 | 67 | */ |
c1156189 | 68 | static int s390_collect_crw_info(void *param) |
1da177e4 | 69 | { |
fb6958a5 | 70 | struct crw crw[2]; |
83b3370c | 71 | int ccode; |
1da177e4 | 72 | struct semaphore *sem; |
fb6958a5 | 73 | unsigned int chain; |
c6ca1850 | 74 | int ignore; |
1da177e4 LT |
75 | |
76 | sem = (struct semaphore *)param; | |
1da177e4 | 77 | repeat: |
c6ca1850 | 78 | ignore = down_interruptible(sem); |
fb6958a5 | 79 | chain = 0; |
1da177e4 | 80 | while (1) { |
fb6958a5 CH |
81 | if (unlikely(chain > 1)) { |
82 | struct crw tmp_crw; | |
83 | ||
84 | printk(KERN_WARNING"%s: Code does not support more " | |
85 | "than two chained crws; please report to " | |
2a2cf6b1 | 86 | "linux390@de.ibm.com!\n", __func__); |
fb6958a5 CH |
87 | ccode = stcrw(&tmp_crw); |
88 | printk(KERN_WARNING"%s: crw reports slct=%d, oflw=%d, " | |
89 | "chn=%d, rsc=%X, anc=%d, erc=%X, rsid=%X\n", | |
2a2cf6b1 | 90 | __func__, tmp_crw.slct, tmp_crw.oflw, |
fb6958a5 CH |
91 | tmp_crw.chn, tmp_crw.rsc, tmp_crw.anc, |
92 | tmp_crw.erc, tmp_crw.rsid); | |
93 | printk(KERN_WARNING"%s: This was crw number %x in the " | |
2a2cf6b1 | 94 | "chain\n", __func__, chain); |
fb6958a5 CH |
95 | if (ccode != 0) |
96 | break; | |
97 | chain = tmp_crw.chn ? chain + 1 : 0; | |
98 | continue; | |
99 | } | |
100 | ccode = stcrw(&crw[chain]); | |
1da177e4 LT |
101 | if (ccode != 0) |
102 | break; | |
250b2dc8 CH |
103 | printk(KERN_DEBUG "crw_info : CRW reports slct=%d, oflw=%d, " |
104 | "chn=%d, rsc=%X, anc=%d, erc=%X, rsid=%X\n", | |
105 | crw[chain].slct, crw[chain].oflw, crw[chain].chn, | |
106 | crw[chain].rsc, crw[chain].anc, crw[chain].erc, | |
107 | crw[chain].rsid); | |
1da177e4 | 108 | /* Check for overflows. */ |
fb6958a5 | 109 | if (crw[chain].oflw) { |
c1156189 CH |
110 | int i; |
111 | ||
2a2cf6b1 | 112 | pr_debug("%s: crw overflow detected!\n", __func__); |
c1156189 CH |
113 | for (i = 0; i < NR_RSCS; i++) { |
114 | if (crw_handlers[i]) | |
115 | crw_handlers[i](NULL, NULL, 1); | |
116 | } | |
fb6958a5 | 117 | chain = 0; |
1da177e4 LT |
118 | continue; |
119 | } | |
c1156189 CH |
120 | if (crw[0].chn && !chain) { |
121 | chain++; | |
122 | continue; | |
1da177e4 | 123 | } |
c1156189 CH |
124 | if (crw_handlers[crw[chain].rsc]) |
125 | crw_handlers[crw[chain].rsc](&crw[0], | |
126 | chain ? &crw[1] : NULL, | |
127 | 0); | |
fb6958a5 CH |
128 | /* chain is always 0 or 1 here. */ |
129 | chain = crw[chain].chn ? chain + 1 : 0; | |
1da177e4 | 130 | } |
1da177e4 LT |
131 | goto repeat; |
132 | return 0; | |
133 | } | |
134 | ||
77fa2245 HC |
135 | struct mcck_struct { |
136 | int kill_task; | |
137 | int channel_report; | |
138 | int warning; | |
139 | unsigned long long mcck_code; | |
140 | }; | |
141 | ||
142 | static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck); | |
143 | ||
1da177e4 | 144 | /* |
77fa2245 HC |
145 | * Main machine check handler function. Will be called with interrupts enabled |
146 | * or disabled and machine checks enabled or disabled. | |
1da177e4 LT |
147 | */ |
148 | void | |
77fa2245 | 149 | s390_handle_mcck(void) |
1da177e4 | 150 | { |
77fa2245 HC |
151 | unsigned long flags; |
152 | struct mcck_struct mcck; | |
1da177e4 | 153 | |
77fa2245 HC |
154 | /* |
155 | * Disable machine checks and get the current state of accumulated | |
156 | * machine checks. Afterwards delete the old state and enable machine | |
157 | * checks again. | |
158 | */ | |
159 | local_irq_save(flags); | |
160 | local_mcck_disable(); | |
161 | mcck = __get_cpu_var(cpu_mcck); | |
162 | memset(&__get_cpu_var(cpu_mcck), 0, sizeof(struct mcck_struct)); | |
163 | clear_thread_flag(TIF_MCCK_PENDING); | |
164 | local_mcck_enable(); | |
165 | local_irq_restore(flags); | |
1da177e4 | 166 | |
77fa2245 | 167 | if (mcck.channel_report) |
1da177e4 LT |
168 | up(&m_sem); |
169 | ||
170 | #ifdef CONFIG_MACHCHK_WARNING | |
171 | /* | |
172 | * The warning may remain for a prolonged period on the bare iron. | |
173 | * (actually till the machine is powered off, or until the problem is gone) | |
174 | * So we just stop listening for the WARNING MCH and prevent continuously | |
175 | * being interrupted. One caveat is however, that we must do this per | |
176 | * processor and cannot use the smp version of ctl_clear_bit(). | |
177 | * On VM we only get one interrupt per virtally presented machinecheck. | |
178 | * Though one suffices, we may get one interrupt per (virtual) processor. | |
179 | */ | |
77fa2245 | 180 | if (mcck.warning) { /* WARNING pending ? */ |
1da177e4 LT |
181 | static int mchchk_wng_posted = 0; |
182 | /* | |
183 | * Use single machine clear, as we cannot handle smp right now | |
184 | */ | |
185 | __ctl_clear_bit(14, 24); /* Disable WARNING MCH */ | |
186 | if (xchg(&mchchk_wng_posted, 1) == 0) | |
9ec52099 | 187 | kill_cad_pid(SIGPWR, 1); |
1da177e4 LT |
188 | } |
189 | #endif | |
77fa2245 HC |
190 | |
191 | if (mcck.kill_task) { | |
192 | local_irq_enable(); | |
193 | printk(KERN_EMERG "mcck: Terminating task because of machine " | |
194 | "malfunction (code 0x%016llx).\n", mcck.mcck_code); | |
195 | printk(KERN_EMERG "mcck: task: %s, pid: %d.\n", | |
196 | current->comm, current->pid); | |
197 | do_exit(SIGSEGV); | |
198 | } | |
199 | } | |
71cde587 | 200 | EXPORT_SYMBOL_GPL(s390_handle_mcck); |
77fa2245 HC |
201 | |
202 | /* | |
203 | * returns 0 if all registers could be validated | |
204 | * returns 1 otherwise | |
205 | */ | |
206 | static int | |
207 | s390_revalidate_registers(struct mci *mci) | |
208 | { | |
209 | int kill_task; | |
210 | u64 tmpclock; | |
211 | u64 zero; | |
212 | void *fpt_save_area, *fpt_creg_save_area; | |
213 | ||
214 | kill_task = 0; | |
215 | zero = 0; | |
216 | /* General purpose registers */ | |
217 | if (!mci->gr) | |
218 | /* | |
219 | * General purpose registers couldn't be restored and have | |
220 | * unknown contents. Process needs to be terminated. | |
221 | */ | |
222 | kill_task = 1; | |
223 | ||
224 | /* Revalidate floating point registers */ | |
225 | if (!mci->fp) | |
226 | /* | |
227 | * Floating point registers can't be restored and | |
228 | * therefore the process needs to be terminated. | |
229 | */ | |
230 | kill_task = 1; | |
231 | ||
347a8dc3 | 232 | #ifndef CONFIG_64BIT |
94c12cc7 MS |
233 | asm volatile( |
234 | " ld 0,0(%0)\n" | |
235 | " ld 2,8(%0)\n" | |
236 | " ld 4,16(%0)\n" | |
237 | " ld 6,24(%0)" | |
238 | : : "a" (&S390_lowcore.floating_pt_save_area)); | |
77fa2245 HC |
239 | #endif |
240 | ||
241 | if (MACHINE_HAS_IEEE) { | |
347a8dc3 | 242 | #ifdef CONFIG_64BIT |
77fa2245 HC |
243 | fpt_save_area = &S390_lowcore.floating_pt_save_area; |
244 | fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area; | |
245 | #else | |
246 | fpt_save_area = (void *) S390_lowcore.extended_save_area_addr; | |
247 | fpt_creg_save_area = fpt_save_area+128; | |
248 | #endif | |
249 | /* Floating point control register */ | |
250 | if (!mci->fc) { | |
251 | /* | |
252 | * Floating point control register can't be restored. | |
253 | * Task will be terminated. | |
254 | */ | |
94c12cc7 | 255 | asm volatile("lfpc 0(%0)" : : "a" (&zero), "m" (zero)); |
77fa2245 HC |
256 | kill_task = 1; |
257 | ||
94c12cc7 MS |
258 | } else |
259 | asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area)); | |
77fa2245 | 260 | |
94c12cc7 MS |
261 | asm volatile( |
262 | " ld 0,0(%0)\n" | |
263 | " ld 1,8(%0)\n" | |
264 | " ld 2,16(%0)\n" | |
265 | " ld 3,24(%0)\n" | |
266 | " ld 4,32(%0)\n" | |
267 | " ld 5,40(%0)\n" | |
268 | " ld 6,48(%0)\n" | |
269 | " ld 7,56(%0)\n" | |
270 | " ld 8,64(%0)\n" | |
271 | " ld 9,72(%0)\n" | |
272 | " ld 10,80(%0)\n" | |
273 | " ld 11,88(%0)\n" | |
274 | " ld 12,96(%0)\n" | |
275 | " ld 13,104(%0)\n" | |
276 | " ld 14,112(%0)\n" | |
277 | " ld 15,120(%0)\n" | |
278 | : : "a" (fpt_save_area)); | |
77fa2245 HC |
279 | } |
280 | ||
281 | /* Revalidate access registers */ | |
94c12cc7 MS |
282 | asm volatile( |
283 | " lam 0,15,0(%0)" | |
284 | : : "a" (&S390_lowcore.access_regs_save_area)); | |
77fa2245 HC |
285 | if (!mci->ar) |
286 | /* | |
287 | * Access registers have unknown contents. | |
288 | * Terminating task. | |
289 | */ | |
290 | kill_task = 1; | |
291 | ||
292 | /* Revalidate control registers */ | |
293 | if (!mci->cr) | |
294 | /* | |
295 | * Control registers have unknown contents. | |
296 | * Can't recover and therefore stopping machine. | |
297 | */ | |
298 | s390_handle_damage("invalid control registers."); | |
299 | else | |
347a8dc3 | 300 | #ifdef CONFIG_64BIT |
94c12cc7 MS |
301 | asm volatile( |
302 | " lctlg 0,15,0(%0)" | |
303 | : : "a" (&S390_lowcore.cregs_save_area)); | |
77fa2245 | 304 | #else |
94c12cc7 MS |
305 | asm volatile( |
306 | " lctl 0,15,0(%0)" | |
307 | : : "a" (&S390_lowcore.cregs_save_area)); | |
77fa2245 HC |
308 | #endif |
309 | ||
310 | /* | |
311 | * We don't even try to revalidate the TOD register, since we simply | |
312 | * can't write something sensible into that register. | |
313 | */ | |
314 | ||
347a8dc3 | 315 | #ifdef CONFIG_64BIT |
77fa2245 HC |
316 | /* |
317 | * See if we can revalidate the TOD programmable register with its | |
318 | * old contents (should be zero) otherwise set it to zero. | |
319 | */ | |
320 | if (!mci->pr) | |
94c12cc7 MS |
321 | asm volatile( |
322 | " sr 0,0\n" | |
323 | " sckpf" | |
324 | : : : "0", "cc"); | |
77fa2245 HC |
325 | else |
326 | asm volatile( | |
94c12cc7 MS |
327 | " l 0,0(%0)\n" |
328 | " sckpf" | |
329 | : : "a" (&S390_lowcore.tod_progreg_save_area) | |
330 | : "0", "cc"); | |
77fa2245 HC |
331 | #endif |
332 | ||
333 | /* Revalidate clock comparator register */ | |
94c12cc7 MS |
334 | asm volatile( |
335 | " stck 0(%1)\n" | |
336 | " sckc 0(%1)" | |
337 | : "=m" (tmpclock) : "a" (&(tmpclock)) : "cc", "memory"); | |
77fa2245 HC |
338 | |
339 | /* Check if old PSW is valid */ | |
340 | if (!mci->wp) | |
341 | /* | |
342 | * Can't tell if we come from user or kernel mode | |
343 | * -> stopping machine. | |
344 | */ | |
345 | s390_handle_damage("old psw invalid."); | |
346 | ||
347 | if (!mci->ms || !mci->pm || !mci->ia) | |
348 | kill_task = 1; | |
349 | ||
350 | return kill_task; | |
351 | } | |
352 | ||
b73d40c6 | 353 | #define MAX_IPD_COUNT 29 |
022e4fc0 | 354 | #define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */ |
b73d40c6 | 355 | |
77fa2245 HC |
356 | /* |
357 | * machine check handler. | |
358 | */ | |
359 | void | |
360 | s390_do_machine_check(struct pt_regs *regs) | |
361 | { | |
b73d40c6 HC |
362 | static DEFINE_SPINLOCK(ipd_lock); |
363 | static unsigned long long last_ipd; | |
364 | static int ipd_count; | |
365 | unsigned long long tmp; | |
77fa2245 HC |
366 | struct mci *mci; |
367 | struct mcck_struct *mcck; | |
368 | int umode; | |
369 | ||
8e9ccae6 HC |
370 | lockdep_off(); |
371 | ||
77fa2245 HC |
372 | mci = (struct mci *) &S390_lowcore.mcck_interruption_code; |
373 | mcck = &__get_cpu_var(cpu_mcck); | |
374 | umode = user_mode(regs); | |
375 | ||
376 | if (mci->sd) | |
377 | /* System damage -> stopping machine */ | |
378 | s390_handle_damage("received system damage machine check."); | |
379 | ||
380 | if (mci->pd) { | |
381 | if (mci->b) { | |
382 | /* Processing backup -> verify if we can survive this */ | |
383 | u64 z_mcic, o_mcic, t_mcic; | |
347a8dc3 | 384 | #ifdef CONFIG_64BIT |
77fa2245 HC |
385 | z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29); |
386 | o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | | |
387 | 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | | |
388 | 1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 | | |
389 | 1ULL<<16); | |
390 | #else | |
391 | z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<57 | 1ULL<<50 | | |
392 | 1ULL<<29); | |
393 | o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | | |
394 | 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | | |
395 | 1ULL<<30 | 1ULL<<20 | 1ULL<<17 | 1ULL<<16); | |
396 | #endif | |
397 | t_mcic = *(u64 *)mci; | |
398 | ||
399 | if (((t_mcic & z_mcic) != 0) || | |
400 | ((t_mcic & o_mcic) != o_mcic)) { | |
401 | s390_handle_damage("processing backup machine " | |
402 | "check with damage."); | |
403 | } | |
b73d40c6 HC |
404 | |
405 | /* | |
406 | * Nullifying exigent condition, therefore we might | |
407 | * retry this instruction. | |
408 | */ | |
409 | ||
410 | spin_lock(&ipd_lock); | |
411 | ||
412 | tmp = get_clock(); | |
413 | ||
414 | if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME) | |
415 | ipd_count++; | |
416 | else | |
417 | ipd_count = 1; | |
418 | ||
419 | last_ipd = tmp; | |
420 | ||
421 | if (ipd_count == MAX_IPD_COUNT) | |
422 | s390_handle_damage("too many ipd retries."); | |
423 | ||
424 | spin_unlock(&ipd_lock); | |
77fa2245 HC |
425 | } |
426 | else { | |
427 | /* Processing damage -> stopping machine */ | |
428 | s390_handle_damage("received instruction processing " | |
429 | "damage machine check."); | |
430 | } | |
431 | } | |
432 | if (s390_revalidate_registers(mci)) { | |
433 | if (umode) { | |
434 | /* | |
435 | * Couldn't restore all register contents while in | |
436 | * user mode -> mark task for termination. | |
437 | */ | |
438 | mcck->kill_task = 1; | |
439 | mcck->mcck_code = *(unsigned long long *) mci; | |
440 | set_thread_flag(TIF_MCCK_PENDING); | |
441 | } | |
442 | else | |
443 | /* | |
444 | * Couldn't restore all register contents while in | |
445 | * kernel mode -> stopping machine. | |
446 | */ | |
447 | s390_handle_damage("unable to revalidate registers."); | |
448 | } | |
449 | ||
d54853ef MS |
450 | if (mci->cd) { |
451 | /* Timing facility damage */ | |
452 | s390_handle_damage("TOD clock damaged"); | |
453 | } | |
454 | ||
455 | if (mci->ed && mci->ec) { | |
456 | /* External damage */ | |
457 | if (S390_lowcore.external_damage_code & (1U << ED_ETR_SYNC)) | |
458 | etr_sync_check(); | |
459 | if (S390_lowcore.external_damage_code & (1U << ED_ETR_SWITCH)) | |
460 | etr_switch_to_local(); | |
d2fec595 MS |
461 | if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC)) |
462 | stp_sync_check(); | |
463 | if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND)) | |
464 | stp_island_check(); | |
d54853ef MS |
465 | } |
466 | ||
77fa2245 HC |
467 | if (mci->se) |
468 | /* Storage error uncorrected */ | |
469 | s390_handle_damage("received storage error uncorrected " | |
470 | "machine check."); | |
471 | ||
472 | if (mci->ke) | |
473 | /* Storage key-error uncorrected */ | |
474 | s390_handle_damage("received storage key-error uncorrected " | |
475 | "machine check."); | |
476 | ||
477 | if (mci->ds && mci->fa) | |
478 | /* Storage degradation */ | |
479 | s390_handle_damage("received storage degradation machine " | |
480 | "check."); | |
481 | ||
482 | if (mci->cp) { | |
483 | /* Channel report word pending */ | |
484 | mcck->channel_report = 1; | |
485 | set_thread_flag(TIF_MCCK_PENDING); | |
486 | } | |
487 | ||
488 | if (mci->w) { | |
489 | /* Warning pending */ | |
490 | mcck->warning = 1; | |
491 | set_thread_flag(TIF_MCCK_PENDING); | |
492 | } | |
8e9ccae6 | 493 | lockdep_on(); |
1da177e4 LT |
494 | } |
495 | ||
496 | /* | |
497 | * s390_init_machine_check | |
498 | * | |
499 | * initialize machine check handling | |
500 | */ | |
501 | static int | |
502 | machine_check_init(void) | |
503 | { | |
504 | init_MUTEX_LOCKED(&m_sem); | |
d54853ef | 505 | ctl_set_bit(14, 25); /* enable external damage MCH */ |
77fa2245 | 506 | ctl_set_bit(14, 27); /* enable system recovery MCH */ |
1da177e4 LT |
507 | #ifdef CONFIG_MACHCHK_WARNING |
508 | ctl_set_bit(14, 24); /* enable warning MCH */ | |
509 | #endif | |
510 | return 0; | |
511 | } | |
512 | ||
513 | /* | |
514 | * Initialize the machine check handler really early to be able to | |
515 | * catch all machine checks that happen during boot | |
516 | */ | |
517 | arch_initcall(machine_check_init); | |
518 | ||
519 | /* | |
520 | * Machine checks for the channel subsystem must be enabled | |
521 | * after the channel subsystem is initialized | |
522 | */ | |
523 | static int __init | |
524 | machine_check_crw_init (void) | |
525 | { | |
b0f1779a AM |
526 | struct task_struct *task; |
527 | ||
528 | task = kthread_run(s390_collect_crw_info, &m_sem, "kmcheck"); | |
529 | if (IS_ERR(task)) | |
530 | return PTR_ERR(task); | |
1da177e4 LT |
531 | ctl_set_bit(14, 28); /* enable channel report MCH */ |
532 | return 0; | |
533 | } | |
534 | ||
535 | device_initcall (machine_check_crw_init); |