Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Adaptec AAC series RAID controller driver | |
3 | * (c) Copyright 2001 Red Hat Inc. <alan@redhat.com> | |
4 | * | |
5 | * based on the old aacraid driver that is.. | |
6 | * Adaptec aacraid device driver for Linux. | |
7 | * | |
912d4e88 | 8 | * Copyright (c) 2000-2007 Adaptec, Inc. (aacraid@adaptec.com) |
1da177e4 LT |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2, or (at your option) | |
13 | * any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; see the file COPYING. If not, write to | |
22 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | * | |
24 | * Module Name: | |
25 | * rx.c | |
26 | * | |
27 | * Abstract: Hardware miniport for Drawbridge specific hardware functions. | |
28 | * | |
29 | */ | |
30 | ||
31 | #include <linux/kernel.h> | |
32 | #include <linux/init.h> | |
33 | #include <linux/types.h> | |
1da177e4 LT |
34 | #include <linux/pci.h> |
35 | #include <linux/spinlock.h> | |
36 | #include <linux/slab.h> | |
37 | #include <linux/blkdev.h> | |
38 | #include <linux/delay.h> | |
39 | #include <linux/completion.h> | |
40 | #include <linux/time.h> | |
41 | #include <linux/interrupt.h> | |
42 | #include <asm/semaphore.h> | |
43 | ||
44 | #include <scsi/scsi_host.h> | |
45 | ||
46 | #include "aacraid.h" | |
47 | ||
28713324 | 48 | static irqreturn_t aac_rx_intr_producer(int irq, void *dev_id) |
1da177e4 LT |
49 | { |
50 | struct aac_dev *dev = dev_id; | |
28713324 MH |
51 | unsigned long bellbits; |
52 | u8 intstat = rx_readb(dev, MUnit.OISR); | |
8e0c5ebd | 53 | |
28713324 MH |
54 | /* |
55 | * Read mask and invert because drawbridge is reversed. | |
56 | * This allows us to only service interrupts that have | |
57 | * been enabled. | |
58 | * Check to see if this is our interrupt. If it isn't just return | |
59 | */ | |
912d4e88 | 60 | if (likely(intstat & ~(dev->OIMR))) { |
28713324 | 61 | bellbits = rx_readl(dev, OutboundDoorbellReg); |
912d4e88 | 62 | if (unlikely(bellbits & DoorBellPrintfReady)) { |
28713324 MH |
63 | aac_printf(dev, readl (&dev->IndexRegs->Mailbox[5])); |
64 | rx_writel(dev, MUnit.ODR,DoorBellPrintfReady); | |
65 | rx_writel(dev, InboundDoorbellReg,DoorBellPrintfDone); | |
1da177e4 | 66 | } |
912d4e88 | 67 | else if (unlikely(bellbits & DoorBellAdapterNormCmdReady)) { |
28713324 MH |
68 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdReady); |
69 | aac_command_normal(&dev->queues->queue[HostNormCmdQueue]); | |
70 | } | |
912d4e88 | 71 | else if (likely(bellbits & DoorBellAdapterNormRespReady)) { |
28713324 MH |
72 | rx_writel(dev, MUnit.ODR,DoorBellAdapterNormRespReady); |
73 | aac_response_normal(&dev->queues->queue[HostNormRespQueue]); | |
74 | } | |
912d4e88 | 75 | else if (unlikely(bellbits & DoorBellAdapterNormCmdNotFull)) { |
28713324 | 76 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull); |
1da177e4 | 77 | } |
912d4e88 | 78 | else if (unlikely(bellbits & DoorBellAdapterNormRespNotFull)) { |
28713324 MH |
79 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull); |
80 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespNotFull); | |
81 | } | |
82 | return IRQ_HANDLED; | |
83 | } | |
84 | return IRQ_NONE; | |
85 | } | |
86 | ||
87 | static irqreturn_t aac_rx_intr_message(int irq, void *dev_id) | |
88 | { | |
89 | struct aac_dev *dev = dev_id; | |
90 | u32 Index = rx_readl(dev, MUnit.OutboundQueue); | |
912d4e88 | 91 | if (unlikely(Index == 0xFFFFFFFFL)) |
28713324 | 92 | Index = rx_readl(dev, MUnit.OutboundQueue); |
912d4e88 | 93 | if (likely(Index != 0xFFFFFFFFL)) { |
28713324 | 94 | do { |
912d4e88 | 95 | if (unlikely(aac_intr_normal(dev, Index))) { |
28713324 MH |
96 | rx_writel(dev, MUnit.OutboundQueue, Index); |
97 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespReady); | |
98 | } | |
99 | Index = rx_readl(dev, MUnit.OutboundQueue); | |
100 | } while (Index != 0xFFFFFFFFL); | |
101 | return IRQ_HANDLED; | |
1da177e4 LT |
102 | } |
103 | return IRQ_NONE; | |
104 | } | |
105 | ||
bd1aac80 MH |
106 | /** |
107 | * aac_rx_disable_interrupt - Disable interrupts | |
108 | * @dev: Adapter | |
109 | */ | |
110 | ||
111 | static void aac_rx_disable_interrupt(struct aac_dev *dev) | |
112 | { | |
113 | rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff); | |
114 | } | |
115 | ||
28713324 MH |
116 | /** |
117 | * aac_rx_enable_interrupt_producer - Enable interrupts | |
118 | * @dev: Adapter | |
119 | */ | |
120 | ||
121 | static void aac_rx_enable_interrupt_producer(struct aac_dev *dev) | |
122 | { | |
123 | rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb); | |
124 | } | |
125 | ||
126 | /** | |
127 | * aac_rx_enable_interrupt_message - Enable interrupts | |
128 | * @dev: Adapter | |
129 | */ | |
130 | ||
131 | static void aac_rx_enable_interrupt_message(struct aac_dev *dev) | |
132 | { | |
133 | rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7); | |
134 | } | |
135 | ||
1da177e4 LT |
136 | /** |
137 | * rx_sync_cmd - send a command and wait | |
138 | * @dev: Adapter | |
139 | * @command: Command to execute | |
140 | * @p1: first parameter | |
141 | * @ret: adapter status | |
142 | * | |
143 | * This routine will send a synchronous command to the adapter and wait | |
144 | * for its completion. | |
145 | */ | |
146 | ||
7c00ffa3 MH |
147 | static int rx_sync_cmd(struct aac_dev *dev, u32 command, |
148 | u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, | |
149 | u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4) | |
1da177e4 LT |
150 | { |
151 | unsigned long start; | |
152 | int ok; | |
153 | /* | |
154 | * Write the command into Mailbox 0 | |
155 | */ | |
76a7f8fd | 156 | writel(command, &dev->IndexRegs->Mailbox[0]); |
1da177e4 | 157 | /* |
7c00ffa3 | 158 | * Write the parameters into Mailboxes 1 - 6 |
1da177e4 | 159 | */ |
76a7f8fd MH |
160 | writel(p1, &dev->IndexRegs->Mailbox[1]); |
161 | writel(p2, &dev->IndexRegs->Mailbox[2]); | |
162 | writel(p3, &dev->IndexRegs->Mailbox[3]); | |
163 | writel(p4, &dev->IndexRegs->Mailbox[4]); | |
1da177e4 LT |
164 | /* |
165 | * Clear the synch command doorbell to start on a clean slate. | |
166 | */ | |
167 | rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0); | |
168 | /* | |
169 | * Disable doorbell interrupts | |
170 | */ | |
7c00ffa3 | 171 | rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff); |
1da177e4 LT |
172 | /* |
173 | * Force the completion of the mask register write before issuing | |
174 | * the interrupt. | |
175 | */ | |
176 | rx_readb (dev, MUnit.OIMR); | |
177 | /* | |
178 | * Signal that there is a new synch command | |
179 | */ | |
180 | rx_writel(dev, InboundDoorbellReg, INBOUNDDOORBELL_0); | |
181 | ||
182 | ok = 0; | |
183 | start = jiffies; | |
184 | ||
185 | /* | |
186 | * Wait up to 30 seconds | |
187 | */ | |
188 | while (time_before(jiffies, start+30*HZ)) | |
189 | { | |
190 | udelay(5); /* Delay 5 microseconds to let Mon960 get info. */ | |
191 | /* | |
192 | * Mon960 will set doorbell0 bit when it has completed the command. | |
193 | */ | |
194 | if (rx_readl(dev, OutboundDoorbellReg) & OUTBOUNDDOORBELL_0) { | |
195 | /* | |
196 | * Clear the doorbell. | |
197 | */ | |
198 | rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0); | |
199 | ok = 1; | |
200 | break; | |
201 | } | |
202 | /* | |
203 | * Yield the processor in case we are slow | |
204 | */ | |
1241f359 | 205 | msleep(1); |
1da177e4 | 206 | } |
912d4e88 | 207 | if (unlikely(ok != 1)) { |
1da177e4 LT |
208 | /* |
209 | * Restore interrupt mask even though we timed out | |
210 | */ | |
28713324 | 211 | aac_adapter_enable_int(dev); |
1da177e4 LT |
212 | return -ETIMEDOUT; |
213 | } | |
214 | /* | |
215 | * Pull the synch status from Mailbox 0. | |
216 | */ | |
217 | if (status) | |
76a7f8fd | 218 | *status = readl(&dev->IndexRegs->Mailbox[0]); |
7c00ffa3 | 219 | if (r1) |
76a7f8fd | 220 | *r1 = readl(&dev->IndexRegs->Mailbox[1]); |
7c00ffa3 | 221 | if (r2) |
76a7f8fd | 222 | *r2 = readl(&dev->IndexRegs->Mailbox[2]); |
7c00ffa3 | 223 | if (r3) |
76a7f8fd | 224 | *r3 = readl(&dev->IndexRegs->Mailbox[3]); |
7c00ffa3 | 225 | if (r4) |
76a7f8fd | 226 | *r4 = readl(&dev->IndexRegs->Mailbox[4]); |
1da177e4 LT |
227 | /* |
228 | * Clear the synch command doorbell. | |
229 | */ | |
230 | rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0); | |
231 | /* | |
232 | * Restore interrupt mask | |
233 | */ | |
28713324 | 234 | aac_adapter_enable_int(dev); |
1da177e4 LT |
235 | return 0; |
236 | ||
237 | } | |
238 | ||
239 | /** | |
240 | * aac_rx_interrupt_adapter - interrupt adapter | |
241 | * @dev: Adapter | |
242 | * | |
243 | * Send an interrupt to the i960 and breakpoint it. | |
244 | */ | |
245 | ||
246 | static void aac_rx_interrupt_adapter(struct aac_dev *dev) | |
247 | { | |
7c00ffa3 | 248 | rx_sync_cmd(dev, BREAKPOINT_REQUEST, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL); |
1da177e4 LT |
249 | } |
250 | ||
251 | /** | |
252 | * aac_rx_notify_adapter - send an event to the adapter | |
253 | * @dev: Adapter | |
254 | * @event: Event to send | |
255 | * | |
256 | * Notify the i960 that something it probably cares about has | |
257 | * happened. | |
258 | */ | |
259 | ||
260 | static void aac_rx_notify_adapter(struct aac_dev *dev, u32 event) | |
261 | { | |
262 | switch (event) { | |
263 | ||
264 | case AdapNormCmdQue: | |
265 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_1); | |
266 | break; | |
267 | case HostNormRespNotFull: | |
268 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_4); | |
269 | break; | |
270 | case AdapNormRespQue: | |
271 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_2); | |
272 | break; | |
273 | case HostNormCmdNotFull: | |
274 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_3); | |
275 | break; | |
276 | case HostShutdown: | |
1da177e4 LT |
277 | break; |
278 | case FastIo: | |
279 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_6); | |
280 | break; | |
281 | case AdapPrintfDone: | |
282 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_5); | |
283 | break; | |
284 | default: | |
285 | BUG(); | |
286 | break; | |
287 | } | |
288 | } | |
289 | ||
290 | /** | |
291 | * aac_rx_start_adapter - activate adapter | |
292 | * @dev: Adapter | |
293 | * | |
294 | * Start up processing on an i960 based AAC adapter | |
295 | */ | |
296 | ||
9695a25d | 297 | static void aac_rx_start_adapter(struct aac_dev *dev) |
1da177e4 | 298 | { |
1da177e4 LT |
299 | struct aac_init *init; |
300 | ||
301 | init = dev->init; | |
302 | init->HostElapsedSeconds = cpu_to_le32(get_seconds()); | |
1da177e4 | 303 | // We can only use a 32 bit address here |
7c00ffa3 MH |
304 | rx_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa, |
305 | 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL); | |
1da177e4 LT |
306 | } |
307 | ||
308 | /** | |
309 | * aac_rx_check_health | |
310 | * @dev: device to check if healthy | |
311 | * | |
312 | * Will attempt to determine if the specified adapter is alive and | |
313 | * capable of handling requests, returning 0 if alive. | |
314 | */ | |
315 | static int aac_rx_check_health(struct aac_dev *dev) | |
316 | { | |
317 | u32 status = rx_readl(dev, MUnit.OMRx[0]); | |
318 | ||
319 | /* | |
320 | * Check to see if the board failed any self tests. | |
321 | */ | |
912d4e88 | 322 | if (unlikely(status & SELF_TEST_FAILED)) |
1da177e4 LT |
323 | return -1; |
324 | /* | |
325 | * Check to see if the board panic'd. | |
326 | */ | |
912d4e88 | 327 | if (unlikely(status & KERNEL_PANIC)) { |
1da177e4 LT |
328 | char * buffer; |
329 | struct POSTSTATUS { | |
56b58712 MH |
330 | __le32 Post_Command; |
331 | __le32 Post_Address; | |
1da177e4 LT |
332 | } * post; |
333 | dma_addr_t paddr, baddr; | |
334 | int ret; | |
335 | ||
912d4e88 | 336 | if (likely((status & 0xFF000000L) == 0xBC000000L)) |
1da177e4 LT |
337 | return (status >> 16) & 0xFF; |
338 | buffer = pci_alloc_consistent(dev->pdev, 512, &baddr); | |
339 | ret = -2; | |
912d4e88 | 340 | if (unlikely(buffer == NULL)) |
1da177e4 LT |
341 | return ret; |
342 | post = pci_alloc_consistent(dev->pdev, | |
343 | sizeof(struct POSTSTATUS), &paddr); | |
912d4e88 | 344 | if (unlikely(post == NULL)) { |
1da177e4 LT |
345 | pci_free_consistent(dev->pdev, 512, buffer, baddr); |
346 | return ret; | |
347 | } | |
348 | memset(buffer, 0, 512); | |
349 | post->Post_Command = cpu_to_le32(COMMAND_POST_RESULTS); | |
350 | post->Post_Address = cpu_to_le32(baddr); | |
351 | rx_writel(dev, MUnit.IMRx[0], paddr); | |
7c00ffa3 MH |
352 | rx_sync_cmd(dev, COMMAND_POST_RESULTS, baddr, 0, 0, 0, 0, 0, |
353 | NULL, NULL, NULL, NULL, NULL); | |
1da177e4 LT |
354 | pci_free_consistent(dev->pdev, sizeof(struct POSTSTATUS), |
355 | post, paddr); | |
912d4e88 | 356 | if (likely((buffer[0] == '0') && ((buffer[1] == 'x') || (buffer[1] == 'X')))) { |
1da177e4 LT |
357 | ret = (buffer[2] <= '9') ? (buffer[2] - '0') : (buffer[2] - 'A' + 10); |
358 | ret <<= 4; | |
359 | ret += (buffer[3] <= '9') ? (buffer[3] - '0') : (buffer[3] - 'A' + 10); | |
360 | } | |
361 | pci_free_consistent(dev->pdev, 512, buffer, baddr); | |
362 | return ret; | |
363 | } | |
364 | /* | |
365 | * Wait for the adapter to be up and running. | |
366 | */ | |
912d4e88 | 367 | if (unlikely(!(status & KERNEL_UP_AND_RUNNING))) |
1da177e4 LT |
368 | return -3; |
369 | /* | |
370 | * Everything is OK | |
371 | */ | |
372 | return 0; | |
373 | } | |
374 | ||
8e0c5ebd | 375 | /** |
28713324 | 376 | * aac_rx_deliver_producer |
8e0c5ebd MH |
377 | * @fib: fib to issue |
378 | * | |
379 | * Will send a fib, returning 0 if successful. | |
380 | */ | |
28713324 | 381 | static int aac_rx_deliver_producer(struct fib * fib) |
8e0c5ebd | 382 | { |
8e0c5ebd | 383 | struct aac_dev *dev = fib->dev; |
28713324 MH |
384 | struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue]; |
385 | unsigned long qflags; | |
8e0c5ebd | 386 | u32 Index; |
28713324 | 387 | unsigned long nointr = 0; |
8e0c5ebd | 388 | |
28713324 | 389 | spin_lock_irqsave(q->lock, qflags); |
a8166a52 | 390 | aac_queue_get( dev, &Index, AdapNormCmdQueue, fib->hw_fib_va, 1, fib, &nointr); |
28713324 MH |
391 | |
392 | q->numpending++; | |
393 | *(q->headers.producer) = cpu_to_le32(Index + 1); | |
394 | spin_unlock_irqrestore(q->lock, qflags); | |
395 | if (!(nointr & aac_config.irq_mod)) | |
396 | aac_adapter_notify(dev, AdapNormCmdQueue); | |
397 | ||
398 | return 0; | |
399 | } | |
400 | ||
401 | /** | |
402 | * aac_rx_deliver_message | |
403 | * @fib: fib to issue | |
404 | * | |
405 | * Will send a fib, returning 0 if successful. | |
406 | */ | |
407 | static int aac_rx_deliver_message(struct fib * fib) | |
408 | { | |
409 | struct aac_dev *dev = fib->dev; | |
410 | struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue]; | |
411 | unsigned long qflags; | |
412 | u32 Index; | |
413 | u64 addr; | |
414 | volatile void __iomem *device; | |
415 | ||
416 | unsigned long count = 10000000L; /* 50 seconds */ | |
417 | spin_lock_irqsave(q->lock, qflags); | |
418 | q->numpending++; | |
419 | spin_unlock_irqrestore(q->lock, qflags); | |
420 | for(;;) { | |
8e0c5ebd | 421 | Index = rx_readl(dev, MUnit.InboundQueue); |
912d4e88 | 422 | if (unlikely(Index == 0xFFFFFFFFL)) |
28713324 | 423 | Index = rx_readl(dev, MUnit.InboundQueue); |
912d4e88 | 424 | if (likely(Index != 0xFFFFFFFFL)) |
28713324 MH |
425 | break; |
426 | if (--count == 0) { | |
427 | spin_lock_irqsave(q->lock, qflags); | |
428 | q->numpending--; | |
429 | spin_unlock_irqrestore(q->lock, qflags); | |
430 | return -ETIMEDOUT; | |
431 | } | |
432 | udelay(5); | |
433 | } | |
76a7f8fd | 434 | device = dev->base + Index; |
28713324 | 435 | addr = fib->hw_fib_pa; |
8e0c5ebd MH |
436 | writel((u32)(addr & 0xffffffff), device); |
437 | device += sizeof(u32); | |
438 | writel((u32)(addr >> 32), device); | |
439 | device += sizeof(u32); | |
a8166a52 | 440 | writel(le16_to_cpu(fib->hw_fib_va->header.Size), device); |
8e0c5ebd | 441 | rx_writel(dev, MUnit.InboundQueue, Index); |
8e0c5ebd MH |
442 | return 0; |
443 | } | |
444 | ||
76a7f8fd MH |
445 | /** |
446 | * aac_rx_ioremap | |
447 | * @size: mapping resize request | |
448 | * | |
449 | */ | |
450 | static int aac_rx_ioremap(struct aac_dev * dev, u32 size) | |
451 | { | |
452 | if (!size) { | |
453 | iounmap(dev->regs.rx); | |
454 | return 0; | |
455 | } | |
456 | dev->base = dev->regs.rx = ioremap(dev->scsi_host_ptr->base, size); | |
457 | if (dev->base == NULL) | |
458 | return -1; | |
459 | dev->IndexRegs = &dev->regs.rx->IndexRegs; | |
460 | return 0; | |
461 | } | |
462 | ||
8418852d | 463 | static int aac_rx_restart_adapter(struct aac_dev *dev, int bled) |
8c23cd74 MH |
464 | { |
465 | u32 var; | |
466 | ||
8418852d MH |
467 | if (bled) |
468 | printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n", | |
469 | dev->name, dev->id, bled); | |
470 | else | |
471 | bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS, | |
472 | 0, 0, 0, 0, 0, 0, &var, NULL, NULL, NULL, NULL); | |
473 | if (bled) | |
474 | bled = aac_adapter_sync_cmd(dev, IOP_RESET, | |
475 | 0, 0, 0, 0, 0, 0, &var, NULL, NULL, NULL, NULL); | |
476 | ||
477 | if (bled) | |
478 | return -EINVAL; | |
479 | if (var == 0x3803000F) { /* USE_OTHER_METHOD */ | |
480 | rx_writel(dev, MUnit.reserved2, 3); | |
481 | msleep(5000); /* Delay 5 seconds */ | |
482 | var = 0x00000001; | |
483 | } | |
8c23cd74 | 484 | if (var != 0x00000001) |
8418852d | 485 | return -EINVAL; |
8c23cd74 | 486 | if (rx_readl(dev, MUnit.OMRx[0]) & KERNEL_PANIC) |
8418852d | 487 | return -ENODEV; |
8c23cd74 MH |
488 | return 0; |
489 | } | |
490 | ||
28713324 MH |
491 | /** |
492 | * aac_rx_select_comm - Select communications method | |
493 | * @dev: Adapter | |
494 | * @comm: communications method | |
495 | */ | |
496 | ||
497 | int aac_rx_select_comm(struct aac_dev *dev, int comm) | |
498 | { | |
499 | switch (comm) { | |
500 | case AAC_COMM_PRODUCER: | |
501 | dev->a_ops.adapter_enable_int = aac_rx_enable_interrupt_producer; | |
502 | dev->a_ops.adapter_intr = aac_rx_intr_producer; | |
503 | dev->a_ops.adapter_deliver = aac_rx_deliver_producer; | |
504 | break; | |
505 | case AAC_COMM_MESSAGE: | |
506 | dev->a_ops.adapter_enable_int = aac_rx_enable_interrupt_message; | |
507 | dev->a_ops.adapter_intr = aac_rx_intr_message; | |
508 | dev->a_ops.adapter_deliver = aac_rx_deliver_message; | |
509 | break; | |
510 | default: | |
511 | return 1; | |
512 | } | |
513 | return 0; | |
514 | } | |
515 | ||
1da177e4 LT |
516 | /** |
517 | * aac_rx_init - initialize an i960 based AAC card | |
518 | * @dev: device to configure | |
519 | * | |
520 | * Allocate and set up resources for the i960 based AAC variants. The | |
521 | * device_interface in the commregion will be allocated and linked | |
522 | * to the comm region. | |
523 | */ | |
524 | ||
76a7f8fd | 525 | int _aac_rx_init(struct aac_dev *dev) |
1da177e4 LT |
526 | { |
527 | unsigned long start; | |
528 | unsigned long status; | |
912d4e88 SM |
529 | int instance = dev->id; |
530 | const char * name = dev->name; | |
1da177e4 | 531 | |
76a7f8fd MH |
532 | if (aac_adapter_ioremap(dev, dev->base_size)) { |
533 | printk(KERN_WARNING "%s: unable to map adapter.\n", name); | |
534 | goto error_iounmap; | |
535 | } | |
536 | ||
1da177e4 | 537 | /* |
8e0c5ebd | 538 | * Check to see if the board panic'd while booting. |
1da177e4 | 539 | */ |
76a7f8fd | 540 | status = rx_readl(dev, MUnit.OMRx[0]); |
8418852d MH |
541 | if (status & KERNEL_PANIC) { |
542 | if ((status = aac_rx_check_health(dev)) <= 0) | |
8c23cd74 | 543 | goto error_iounmap; |
8418852d MH |
544 | if (aac_rx_restart_adapter(dev, status)) |
545 | goto error_iounmap; | |
546 | } | |
1da177e4 LT |
547 | /* |
548 | * Check to see if the board failed any self tests. | |
549 | */ | |
76a7f8fd MH |
550 | status = rx_readl(dev, MUnit.OMRx[0]); |
551 | if (status & SELF_TEST_FAILED) { | |
1da177e4 LT |
552 | printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance); |
553 | goto error_iounmap; | |
554 | } | |
1da177e4 LT |
555 | /* |
556 | * Check to see if the monitor panic'd while booting. | |
557 | */ | |
76a7f8fd | 558 | if (status & MONITOR_PANIC) { |
1da177e4 LT |
559 | printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance); |
560 | goto error_iounmap; | |
561 | } | |
562 | start = jiffies; | |
563 | /* | |
564 | * Wait for the adapter to be up and running. Wait up to 3 minutes | |
565 | */ | |
76a7f8fd | 566 | while (!((status = rx_readl(dev, MUnit.OMRx[0])) & KERNEL_UP_AND_RUNNING)) |
1da177e4 | 567 | { |
912d4e88 | 568 | if(time_after(jiffies, start+startup_timeout*HZ)) { |
1da177e4 LT |
569 | printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n", |
570 | dev->name, instance, status); | |
571 | goto error_iounmap; | |
572 | } | |
404d9a90 | 573 | msleep(1); |
1da177e4 | 574 | } |
1da177e4 | 575 | /* |
28713324 | 576 | * Fill in the common function dispatch table. |
1da177e4 LT |
577 | */ |
578 | dev->a_ops.adapter_interrupt = aac_rx_interrupt_adapter; | |
bd1aac80 | 579 | dev->a_ops.adapter_disable_int = aac_rx_disable_interrupt; |
1da177e4 LT |
580 | dev->a_ops.adapter_notify = aac_rx_notify_adapter; |
581 | dev->a_ops.adapter_sync_cmd = rx_sync_cmd; | |
582 | dev->a_ops.adapter_check_health = aac_rx_check_health; | |
8418852d | 583 | dev->a_ops.adapter_restart = aac_rx_restart_adapter; |
1da177e4 | 584 | |
bd1aac80 MH |
585 | /* |
586 | * First clear out all interrupts. Then enable the one's that we | |
587 | * can handle. | |
588 | */ | |
28713324 MH |
589 | aac_adapter_comm(dev, AAC_COMM_PRODUCER); |
590 | aac_adapter_disable_int(dev); | |
bd1aac80 | 591 | rx_writel(dev, MUnit.ODR, 0xffffffff); |
28713324 | 592 | aac_adapter_enable_int(dev); |
bd1aac80 | 593 | |
1da177e4 | 594 | if (aac_init_adapter(dev) == NULL) |
28713324 MH |
595 | goto error_iounmap; |
596 | aac_adapter_comm(dev, dev->comm_interface); | |
597 | if (request_irq(dev->scsi_host_ptr->irq, dev->a_ops.adapter_intr, | |
598 | IRQF_SHARED|IRQF_DISABLED, "aacraid", dev) < 0) { | |
599 | printk(KERN_ERR "%s%d: Interrupt unavailable.\n", | |
600 | name, instance); | |
601 | goto error_iounmap; | |
602 | } | |
603 | aac_adapter_enable_int(dev); | |
604 | /* | |
605 | * Tell the adapter that all is configured, and it can | |
606 | * start accepting requests | |
607 | */ | |
608 | aac_rx_start_adapter(dev); | |
8e0c5ebd | 609 | |
1da177e4 LT |
610 | return 0; |
611 | ||
1da177e4 | 612 | error_iounmap: |
1da177e4 LT |
613 | |
614 | return -1; | |
615 | } | |
76a7f8fd MH |
616 | |
617 | int aac_rx_init(struct aac_dev *dev) | |
618 | { | |
76a7f8fd MH |
619 | /* |
620 | * Fill in the function dispatch table. | |
621 | */ | |
622 | dev->a_ops.adapter_ioremap = aac_rx_ioremap; | |
28713324 | 623 | dev->a_ops.adapter_comm = aac_rx_select_comm; |
76a7f8fd | 624 | |
28713324 | 625 | return _aac_rx_init(dev); |
76a7f8fd | 626 | } |