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atp870u: Remove ugly gotos
[deliverable/linux.git] / drivers / scsi / atp870u.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (C) 1997 Wu Ching Chen
3 * 2.1.x update (C) 1998 Krzysztof G. Baranowski
fa195afe
AC		 4 * 2.5.x update (C) 2002 Red Hat
5 * 2.6.x update (C) 2004 Red Hat
1da177e4
LT		 6 *
7 * Marcelo Tosatti <marcelo@conectiva.com.br> : SMP fixes
8 *
9 * Wu Ching Chen : NULL pointer fixes 2000/06/02
10 * support atp876 chip
11 * enable 32 bit fifo transfer
12 * support cdrom & remove device run ultra speed
13 * fix disconnect bug 2000/12/21
14 * support atp880 chip lvd u160 2001/05/15
15 * fix prd table bug 2001/09/12 (7.1)
16 *
17 * atp885 support add by ACARD Hao Ping Lian 2005/01/05
18 */
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/kernel.h>
23#include <linux/types.h>
24#include <linux/string.h>
25#include <linux/ioport.h>
26#include <linux/delay.h>
27#include <linux/proc_fs.h>
28#include <linux/spinlock.h>
29#include <linux/pci.h>
30#include <linux/blkdev.h>
910638ae 31#include <linux/dma-mapping.h>
5a0e3ad6 32#include <linux/slab.h>
1da177e4
LT		 33#include <asm/io.h>
34
35#include <scsi/scsi.h>
36#include <scsi/scsi_cmnd.h>
37#include <scsi/scsi_device.h>
38#include <scsi/scsi_host.h>
39
40#include "atp870u.h"
41
42static struct scsi_host_template atp870u_template;
43static void send_s870(struct atp_unit *dev,unsigned char c);
44static void is885(struct atp_unit *dev, unsigned int wkport,unsigned char c);
45static void tscam_885(void);
46
7d12e780 47static irqreturn_t atp870u_intr_handle(int irq, void *dev_id)
1da177e4
LT		 48{
49 unsigned long flags;
bc0fe4c9 50 unsigned short int id;
1da177e4
LT		 51 unsigned char i, j, c, target_id, lun,cmdp;
52 unsigned char *prd;
53 struct scsi_cmnd *workreq;
1da177e4
LT		 54 unsigned long adrcnt, k;
55#ifdef ED_DBGP
56 unsigned long l;
57#endif
1da177e4
LT		 58 struct Scsi_Host *host = dev_id;
59 struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
60
61 for (c = 0; c < 2; c++) {
3a38e53e 62 j = inb(dev->ioport[c] + 0x1f);
1da177e4 63 if ((j & 0x80) != 0)
78614ecd 64 break;
1da177e4
LT		 65 dev->in_int[c] = 0;
66 }
78614ecd
OZ		 67 if ((j & 0x80) == 0)
68 return IRQ_NONE;
1da177e4
LT		 69#ifdef ED_DBGP
70 printk("atp870u_intr_handle enter\n");
71#endif
72 dev->in_int[c] = 1;
73 cmdp = inb(dev->ioport[c] + 0x10);
1da177e4
LT		 74 if (dev->working[c] != 0) {
75 if (dev->dev_id == ATP885_DEVID) {
b4263b3c
OZ		 76 if ((inb(dev->ioport[c] + 0x16) & 0x80) == 0)
77 outb((inb(dev->ioport[c] + 0x16) | 0x80), dev->ioport[c] + 0x16);
1da177e4 78 }
bc0fe4c9 79 if ((inb(dev->pciport[c]) & 0x08) != 0)
1da177e4 80 {
1da177e4 81 for (k=0; k < 1000; k++) {
78614ecd
OZ		 82 if ((inb(dev->pciport[c] + 2) & 0x08) == 0)
83 break;
84 if ((inb(dev->pciport[c] + 2) & 0x01) == 0)
85 break;
1da177e4
LT		 86 }
87 }
bc0fe4c9 88 outb(0x00, dev->pciport[c]);
1da177e4 89
3a38e53e 90 i = inb(dev->ioport[c] + 0x17);
1da177e4 91
bc0fe4c9
OZ		 92 if (dev->dev_id == ATP885_DEVID)
93 outb(0x06, dev->pciport[c] + 2);
1da177e4 94
3a38e53e 95 target_id = inb(dev->ioport[c] + 0x15);
1da177e4
LT		 96
97 /*
98 * Remap wide devices onto id numbers
99 */
100
101 if ((target_id & 0x40) != 0) {
102 target_id = (target_id & 0x07) | 0x08;
103 } else {
104 target_id &= 0x07;
105 }
106
107 if ((j & 0x40) != 0) {
108 if (dev->last_cmd[c] == 0xff) {
109 dev->last_cmd[c] = target_id;
110 }
111 dev->last_cmd[c] |= 0x40;
112 }
113 if (dev->dev_id == ATP885_DEVID)
114 dev->r1f[c][target_id] |= j;
115#ifdef ED_DBGP
116 printk("atp870u_intr_handle status = %x\n",i);
117#endif
118 if (i == 0x85) {
119 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
120 dev->last_cmd[c] = 0xff;
121 }
122 if (dev->dev_id == ATP885_DEVID) {
1da177e4 123 adrcnt = 0;
3a38e53e
OZ		 124 ((unsigned char *) &adrcnt)[2] = inb(dev->ioport[c] + 0x12);
125 ((unsigned char *) &adrcnt)[1] = inb(dev->ioport[c] + 0x13);
126 ((unsigned char *) &adrcnt)[0] = inb(dev->ioport[c] + 0x14);
1da177e4
LT		 127 if (dev->id[c][target_id].last_len != adrcnt)
128 {
129 k = dev->id[c][target_id].last_len;
130 k -= adrcnt;
131 dev->id[c][target_id].tran_len = k;
132 dev->id[c][target_id].last_len = adrcnt;
133 }
134#ifdef ED_DBGP
3a38e53e 135 printk("dev->id[c][target_id].last_len = %d dev->id[c][target_id].tran_len = %d\n",dev->id[c][target_id].last_len,dev->id[c][target_id].tran_len);
1da177e4
LT		 136#endif
137 }
138
139 /*
140 * Flip wide
141 */
142 if (dev->wide_id[c] != 0) {
3a38e53e
OZ		 143 outb(0x01, dev->ioport[c] + 0x1b);
144 while ((inb(dev->ioport[c] + 0x1b) & 0x01) != 0x01) {
145 outb(0x01, dev->ioport[c] + 0x1b);
1da177e4
LT		 146 }
147 }
148 /*
149 * Issue more commands
150 */
151 spin_lock_irqsave(dev->host->host_lock, flags);
152 if (((dev->quhd[c] != dev->quend[c]) || (dev->last_cmd[c] != 0xff)) &&
153 (dev->in_snd[c] == 0)) {
154#ifdef ED_DBGP
155 printk("Call sent_s870\n");
156#endif
157 send_s870(dev,c);
158 }
159 spin_unlock_irqrestore(dev->host->host_lock, flags);
160 /*
161 * Done
162 */
163 dev->in_int[c] = 0;
164#ifdef ED_DBGP
165 printk("Status 0x85 return\n");
166#endif
78614ecd 167 return IRQ_HANDLED;
1da177e4
LT		 168 }
169
170 if (i == 0x40) {
171 dev->last_cmd[c] |= 0x40;
172 dev->in_int[c] = 0;
78614ecd 173 return IRQ_HANDLED;
1da177e4
LT		 174 }
175
176 if (i == 0x21) {
177 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
178 dev->last_cmd[c] = 0xff;
179 }
1da177e4 180 adrcnt = 0;
3a38e53e
OZ		 181 ((unsigned char *) &adrcnt)[2] = inb(dev->ioport[c] + 0x12);
182 ((unsigned char *) &adrcnt)[1] = inb(dev->ioport[c] + 0x13);
183 ((unsigned char *) &adrcnt)[0] = inb(dev->ioport[c] + 0x14);
1da177e4
LT		 184 k = dev->id[c][target_id].last_len;
185 k -= adrcnt;
186 dev->id[c][target_id].tran_len = k;
187 dev->id[c][target_id].last_len = adrcnt;
3a38e53e
OZ		 188 outb(0x41, dev->ioport[c] + 0x10);
189 outb(0x08, dev->ioport[c] + 0x18);
1da177e4 190 dev->in_int[c] = 0;
78614ecd 191 return IRQ_HANDLED;
1da177e4
LT		 192 }
193
194 if (dev->dev_id == ATP885_DEVID) {
195 if ((i == 0x4c) || (i == 0x4d) || (i == 0x8c) || (i == 0x8d)) {
196 if ((i == 0x4c) || (i == 0x8c))
197 i=0x48;
198 else
199 i=0x49;
200 }
201
202 }
203 if ((i == 0x80) || (i == 0x8f)) {
204#ifdef ED_DBGP
205 printk(KERN_DEBUG "Device reselect\n");
206#endif
207 lun = 0;
1da177e4 208 if (cmdp == 0x44 || i==0x80) {
3a38e53e 209 lun = inb(dev->ioport[c] + 0x1d) & 0x07;
1da177e4
LT		 210 } else {
211 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
212 dev->last_cmd[c] = 0xff;
213 }
214 if (cmdp == 0x41) {
215#ifdef ED_DBGP
216 printk("cmdp = 0x41\n");
217#endif
1da177e4 218 adrcnt = 0;
3a38e53e
OZ		 219 ((unsigned char *) &adrcnt)[2] = inb(dev->ioport[c] + 0x12);
220 ((unsigned char *) &adrcnt)[1] = inb(dev->ioport[c] + 0x13);
221 ((unsigned char *) &adrcnt)[0] = inb(dev->ioport[c] + 0x14);
1da177e4
LT		 222 k = dev->id[c][target_id].last_len;
223 k -= adrcnt;
224 dev->id[c][target_id].tran_len = k;
225 dev->id[c][target_id].last_len = adrcnt;
3a38e53e 226 outb(0x08, dev->ioport[c] + 0x18);
1da177e4 227 dev->in_int[c] = 0;
78614ecd 228 return IRQ_HANDLED;
1da177e4
LT		 229 } else {
230#ifdef ED_DBGP
231 printk("cmdp != 0x41\n");
232#endif
3a38e53e 233 outb(0x46, dev->ioport[c] + 0x10);
1da177e4 234 dev->id[c][target_id].dirct = 0x00;
3a38e53e
OZ		 235 outb(0x00, dev->ioport[c] + 0x12);
236 outb(0x00, dev->ioport[c] + 0x13);
237 outb(0x00, dev->ioport[c] + 0x14);
238 outb(0x08, dev->ioport[c] + 0x18);
1da177e4 239 dev->in_int[c] = 0;
78614ecd 240 return IRQ_HANDLED;
1da177e4
LT		 241 }
242 }
243 if (dev->last_cmd[c] != 0xff) {
244 dev->last_cmd[c] |= 0x40;
245 }
246 if (dev->dev_id == ATP885_DEVID) {
247 j = inb(dev->baseport + 0x29) & 0xfe;
248 outb(j, dev->baseport + 0x29);
3a38e53e
OZ		 249 } else
250 outb(0x45, dev->ioport[c] + 0x10);
251
252 target_id = inb(dev->ioport[c] + 0x16);
1da177e4
LT		 253 /*
254 * Remap wide identifiers
255 */
256 if ((target_id & 0x10) != 0) {
257 target_id = (target_id & 0x07) | 0x08;
258 } else {
259 target_id &= 0x07;
260 }
3a38e53e
OZ		 261 if (dev->dev_id == ATP885_DEVID)
262 outb(0x45, dev->ioport[c] + 0x10);
1da177e4
LT		 263 workreq = dev->id[c][target_id].curr_req;
264#ifdef ED_DBGP
017560fc
JG		 265 scmd_printk(KERN_DEBUG, workreq, "CDB");
266 for (l = 0; l < workreq->cmd_len; l++)
1da177e4 267 printk(KERN_DEBUG " %x",workreq->cmnd[l]);
017560fc 268 printk("\n");
1da177e4
LT		 269#endif
270
3a38e53e
OZ		 271 outb(lun, dev->ioport[c] + 0x0f);
272 outb(dev->id[c][target_id].devsp, dev->ioport[c] + 0x11);
1da177e4
LT		 273 adrcnt = dev->id[c][target_id].tran_len;
274 k = dev->id[c][target_id].last_len;
275
3a38e53e
OZ		 276 outb(((unsigned char *) &k)[2], dev->ioport[c] + 0x12);
277 outb(((unsigned char *) &k)[1], dev->ioport[c] + 0x13);
278 outb(((unsigned char *) &k)[0], dev->ioport[c] + 0x14);
1da177e4 279#ifdef ED_DBGP
3a38e53e 280 printk("k %x, k[0] 0x%x k[1] 0x%x k[2] 0x%x\n", k, inb(dev->ioport[c] + 0x14), inb(dev->ioport[c] + 0x13), inb(dev->ioport[c] + 0x12));
1da177e4
LT		 281#endif
282 /* Remap wide */
283 j = target_id;
284 if (target_id > 7) {
285 j = (j & 0x07) | 0x40;
286 }
287 /* Add direction */
288 j |= dev->id[c][target_id].dirct;
3a38e53e
OZ		 289 outb(j, dev->ioport[c] + 0x15);
290 outb(0x80, dev->ioport[c] + 0x16);
1da177e4
LT		 291
292 /* enable 32 bit fifo transfer */
293 if (dev->dev_id == ATP885_DEVID) {
bc0fe4c9 294 i=inb(dev->pciport[c] + 1) & 0xf3;
1da177e4
LT		 295 //j=workreq->cmnd[0];
296 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
297 i |= 0x0c;
298 }
bc0fe4c9 299 outb(i, dev->pciport[c] + 1);
1da177e4
LT		 300 } else if ((dev->dev_id == ATP880_DEVID1) ||
301 (dev->dev_id == ATP880_DEVID2) ) {
1da177e4 302 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
3a38e53e 303 outb((unsigned char) ((inb(dev->ioport[c] - 0x05) & 0x3f) | 0xc0), dev->ioport[c] - 0x05);///minus 0x05???
1da177e4 304 } else {
3a38e53e 305 outb((unsigned char) (inb(dev->ioport[c] - 0x05) & 0x3f), dev->ioport[c] - 0x05);///minus 0x05???
1da177e4
LT		 306 }
307 } else {
1da177e4 308 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
3a38e53e 309 outb((unsigned char) ((inb(dev->ioport[c] + 0x3a) & 0xf3) | 0x08), dev->ioport[c] + 0x3a);
1da177e4 310 } else {
3a38e53e 311 outb((unsigned char) (inb(dev->ioport[c] + 0x3a) & 0xf3), dev->ioport[c] + 0x3a);
1da177e4
LT		 312 }
313 }
1da177e4
LT		 314 j = 0;
315 id = 1;
316 id = id << target_id;
317 /*
318 * Is this a wide device
319 */
320 if ((id & dev->wide_id[c]) != 0) {
321 j |= 0x01;
322 }
3a38e53e
OZ		 323 outb(j, dev->ioport[c] + 0x1b);
324 while ((inb(dev->ioport[c] + 0x1b) & 0x01) != j) {
325 outb(j,dev->ioport[c] + 0x1b);
1da177e4
LT		 326 }
327 if (dev->id[c][target_id].last_len == 0) {
3a38e53e 328 outb(0x08, dev->ioport[c] + 0x18);
1da177e4
LT		 329 dev->in_int[c] = 0;
330#ifdef ED_DBGP
331 printk("dev->id[c][target_id].last_len = 0\n");
332#endif
78614ecd 333 return IRQ_HANDLED;
1da177e4
LT		 334 }
335#ifdef ED_DBGP
336 printk("target_id = %d adrcnt = %d\n",target_id,adrcnt);
337#endif
338 prd = dev->id[c][target_id].prd_pos;
339 while (adrcnt != 0) {
340 id = ((unsigned short int *)prd)[2];
341 if (id == 0) {
342 k = 0x10000;
343 } else {
344 k = id;
345 }
346 if (k > adrcnt) {
347 ((unsigned short int *)prd)[2] = (unsigned short int)
348 (k - adrcnt);
349 ((unsigned long *)prd)[0] += adrcnt;
350 adrcnt = 0;
351 dev->id[c][target_id].prd_pos = prd;
352 } else {
353 adrcnt -= k;
354 dev->id[c][target_id].prdaddr += 0x08;
355 prd += 0x08;
356 if (adrcnt == 0) {
357 dev->id[c][target_id].prd_pos = prd;
358 }
359 }
360 }
bc0fe4c9 361 outl(dev->id[c][target_id].prdaddr, dev->pciport[c] + 0x04);
1da177e4
LT		 362#ifdef ED_DBGP
363 printk("dev->id[%d][%d].prdaddr 0x%8x\n", c, target_id, dev->id[c][target_id].prdaddr);
364#endif
bc0fe4c9
OZ		 365 if (dev->dev_id != ATP885_DEVID) {
366 outb(0x06, dev->pciport[c] + 2);
367 outb(0x00, dev->pciport[c] + 2);
1da177e4 368 }
1da177e4
LT		 369 /*
370 * Check transfer direction
371 */
372 if (dev->id[c][target_id].dirct != 0) {
3a38e53e 373 outb(0x08, dev->ioport[c] + 0x18);
bc0fe4c9 374 outb(0x01, dev->pciport[c]);
1da177e4
LT		 375 dev->in_int[c] = 0;
376#ifdef ED_DBGP
377 printk("status 0x80 return dirct != 0\n");
378#endif
78614ecd 379 return IRQ_HANDLED;
1da177e4 380 }
3a38e53e 381 outb(0x08, dev->ioport[c] + 0x18);
bc0fe4c9 382 outb(0x09, dev->pciport[c]);
1da177e4
LT		 383 dev->in_int[c] = 0;
384#ifdef ED_DBGP
385 printk("status 0x80 return dirct = 0\n");
386#endif
78614ecd 387 return IRQ_HANDLED;
1da177e4
LT		 388 }
389
390 /*
391 * Current scsi request on this target
392 */
393
394 workreq = dev->id[c][target_id].curr_req;
395
78614ecd 396 if (i == 0x42 || i == 0x16) {
1da177e4
LT		 397 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
398 dev->last_cmd[c] = 0xff;
399 }
78614ecd
OZ		 400 if (i == 0x16) {
401 workreq->result = inb(dev->ioport[c] + 0x0f);
402 if (((dev->r1f[c][target_id] & 0x10) != 0)&&(dev->dev_id==ATP885_DEVID)) {
403 printk(KERN_WARNING "AEC67162 CRC ERROR !\n");
404 workreq->result = 0x02;
405 }
406 } else
407 workreq->result = 0x02;
408
1da177e4
LT		 409 if (dev->dev_id == ATP885_DEVID) {
410 j = inb(dev->baseport + 0x29) | 0x01;
411 outb(j, dev->baseport + 0x29);
412 }
413 /*
414 * Complete the command
415 */
fe7ed98f
BH		 416 scsi_dma_unmap(workreq);
417
1da177e4
LT		 418 spin_lock_irqsave(dev->host->host_lock, flags);
419 (*workreq->scsi_done) (workreq);
420#ifdef ED_DBGP
421 printk("workreq->scsi_done\n");
422#endif
423 /*
424 * Clear it off the queue
425 */
426 dev->id[c][target_id].curr_req = NULL;
427 dev->working[c]--;
428 spin_unlock_irqrestore(dev->host->host_lock, flags);
429 /*
430 * Take it back wide
431 */
432 if (dev->wide_id[c] != 0) {
3a38e53e
OZ		 433 outb(0x01, dev->ioport[c] + 0x1b);
434 while ((inb(dev->ioport[c] + 0x1b) & 0x01) != 0x01) {
435 outb(0x01, dev->ioport[c] + 0x1b);
1da177e4
LT		 436 }
437 }
438 /*
439 * If there is stuff to send and nothing going then send it
440 */
441 spin_lock_irqsave(dev->host->host_lock, flags);
442 if (((dev->last_cmd[c] != 0xff) || (dev->quhd[c] != dev->quend[c])) &&
443 (dev->in_snd[c] == 0)) {
444#ifdef ED_DBGP
445 printk("Call sent_s870(scsi_done)\n");
446#endif
447 send_s870(dev,c);
448 }
449 spin_unlock_irqrestore(dev->host->host_lock, flags);
450 dev->in_int[c] = 0;
78614ecd 451 return IRQ_HANDLED;
1da177e4
LT		 452 }
453 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
454 dev->last_cmd[c] = 0xff;
455 }
456 if (i == 0x4f) {
457 i = 0x89;
458 }
459 i &= 0x0f;
460 if (i == 0x09) {
bc0fe4c9
OZ		 461 outl(dev->id[c][target_id].prdaddr, dev->pciport[c] + 4);
462 outb(0x06, dev->pciport[c] + 2);
463 outb(0x00, dev->pciport[c] + 2);
3a38e53e 464 outb(0x41, dev->ioport[c] + 0x10);
1da177e4 465 if (dev->dev_id == ATP885_DEVID) {
1da177e4 466 k = dev->id[c][target_id].last_len;
3a38e53e
OZ		 467 outb((unsigned char) (((unsigned char *) (&k))[2]), dev->ioport[c] + 0x12);
468 outb((unsigned char) (((unsigned char *) (&k))[1]), dev->ioport[c] + 0x13);
469 outb((unsigned char) (((unsigned char *) (&k))[0]), dev->ioport[c] + 0x14);
1da177e4 470 dev->id[c][target_id].dirct = 0x00;
1da177e4
LT		 471 } else {
472 dev->id[c][target_id].dirct = 0x00;
1da177e4 473 }
3a38e53e 474 outb(0x08, dev->ioport[c] + 0x18);
bc0fe4c9 475 outb(0x09, dev->pciport[c]);
1da177e4 476 dev->in_int[c] = 0;
78614ecd 477 return IRQ_HANDLED;
1da177e4
LT		 478 }
479 if (i == 0x08) {
bc0fe4c9
OZ		 480 outl(dev->id[c][target_id].prdaddr, dev->pciport[c] + 4);
481 outb(0x06, dev->pciport[c] + 2);
482 outb(0x00, dev->pciport[c] + 2);
3a38e53e 483 outb(0x41, dev->ioport[c] + 0x10);
1da177e4 484 if (dev->dev_id == ATP885_DEVID) {
1da177e4 485 k = dev->id[c][target_id].last_len;
3a38e53e
OZ		 486 outb((unsigned char) (((unsigned char *) (&k))[2]), dev->ioport[c] + 0x12);
487 outb((unsigned char) (((unsigned char *) (&k))[1]), dev->ioport[c] + 0x13);
488 outb((unsigned char) (((unsigned char *) (&k))[0]), dev->ioport[c] + 0x14);
1da177e4 489 }
3a38e53e 490 outb((unsigned char) (inb(dev->ioport[c] + 0x15) | 0x20), dev->ioport[c] + 0x15);
1da177e4 491 dev->id[c][target_id].dirct = 0x20;
3a38e53e 492 outb(0x08, dev->ioport[c] + 0x18);
bc0fe4c9 493 outb(0x01, dev->pciport[c]);
1da177e4 494 dev->in_int[c] = 0;
78614ecd 495 return IRQ_HANDLED;
1da177e4 496 }
1da177e4 497 if (i == 0x0a) {
3a38e53e 498 outb(0x30, dev->ioport[c] + 0x10);
1da177e4 499 } else {
3a38e53e 500 outb(0x46, dev->ioport[c] + 0x10);
1da177e4
LT		 501 }
502 dev->id[c][target_id].dirct = 0x00;
3a38e53e
OZ		 503 outb(0x00, dev->ioport[c] + 0x12);
504 outb(0x00, dev->ioport[c] + 0x13);
505 outb(0x00, dev->ioport[c] + 0x14);
506 outb(0x08, dev->ioport[c] + 0x18);
1da177e4 507 }
78614ecd
OZ		 508 dev->in_int[c] = 0;
509
1da177e4
LT		 510 return IRQ_HANDLED;
511}
512/**
513 * atp870u_queuecommand - Queue SCSI command
514 * @req_p: request block
515 * @done: completion function
516 *
517 * Queue a command to the ATP queue. Called with the host lock held.
518 */
f281233d 519static int atp870u_queuecommand_lck(struct scsi_cmnd *req_p,
1da177e4
LT		 520 void (*done) (struct scsi_cmnd *))
521{
522 unsigned char c;
3b836464 523 unsigned int m;
1da177e4
LT		 524 struct atp_unit *dev;
525 struct Scsi_Host *host;
526
422c0d61 527 c = scmd_channel(req_p);
1da177e4 528 req_p->sense_buffer[0]=0;
fe7ed98f 529 scsi_set_resid(req_p, 0);
422c0d61 530 if (scmd_channel(req_p) > 1) {
1da177e4
LT		 531 req_p->result = 0x00040000;
532 done(req_p);
533#ifdef ED_DBGP
534 printk("atp870u_queuecommand : req_p->device->channel > 1\n");
535#endif
536 return 0;
537 }
538
539 host = req_p->device->host;
540 dev = (struct atp_unit *)&host->hostdata;
541
542
543
544 m = 1;
422c0d61 545 m = m << scmd_id(req_p);
1da177e4
LT		 546
547 /*
548 * Fake a timeout for missing targets
549 */
550
551 if ((m & dev->active_id[c]) == 0) {
552 req_p->result = 0x00040000;
553 done(req_p);
554 return 0;
555 }
556
557 if (done) {
558 req_p->scsi_done = done;
559 } else {
560#ifdef ED_DBGP
561 printk( "atp870u_queuecommand: done can't be NULL\n");
562#endif
563 req_p->result = 0;
564 done(req_p);
565 return 0;
566 }
567
568 /*
569 * Count new command
570 */
571 dev->quend[c]++;
572 if (dev->quend[c] >= qcnt) {
573 dev->quend[c] = 0;
574 }
575
576 /*
577 * Check queue state
578 */
579 if (dev->quhd[c] == dev->quend[c]) {
580 if (dev->quend[c] == 0) {
581 dev->quend[c] = qcnt;
582 }
583#ifdef ED_DBGP
584 printk("atp870u_queuecommand : dev->quhd[c] == dev->quend[c]\n");
585#endif
586 dev->quend[c]--;
587 req_p->result = 0x00020000;
588 done(req_p);
589 return 0;
590 }
591 dev->quereq[c][dev->quend[c]] = req_p;
1da177e4 592#ifdef ED_DBGP
3b836464 593 printk("dev->ioport[c] = %x inb(dev->ioport[c] + 0x1c) = %x dev->in_int[%d] = %d dev->in_snd[%d] = %d\n",dev->ioport[c],inb(dev->ioport[c] + 0x1c),c,dev->in_int[c],c,dev->in_snd[c]);
1da177e4 594#endif
3b836464 595 if ((inb(dev->ioport[c] + 0x1c) == 0) && (dev->in_int[c] == 0) && (dev->in_snd[c] == 0)) {
1da177e4
LT		 596#ifdef ED_DBGP
597 printk("Call sent_s870(atp870u_queuecommand)\n");
598#endif
599 send_s870(dev,c);
600 }
601#ifdef ED_DBGP
602 printk("atp870u_queuecommand : exit\n");
603#endif
604 return 0;
605}
606
f281233d
JG		 607static DEF_SCSI_QCMD(atp870u_queuecommand)
608
1da177e4
LT		 609/**
610 * send_s870 - send a command to the controller
611 * @host: host
612 *
613 * On entry there is work queued to be done. We move some of that work to the
614 * controller itself.
615 *
616 * Caller holds the host lock.
617 */
618static void send_s870(struct atp_unit *dev,unsigned char c)
619{
1da177e4
LT		 620 struct scsi_cmnd *workreq;
621 unsigned int i;//,k;
622 unsigned char j, target_id;
623 unsigned char *prd;
c2bab403 624 unsigned short int w;
1da177e4 625 unsigned long l, bttl = 0;
1da177e4
LT		 626 unsigned long sg_count;
627
628 if (dev->in_snd[c] != 0) {
629#ifdef ED_DBGP
630 printk("cmnd in_snd\n");
631#endif
632 return;
633 }
634#ifdef ED_DBGP
635 printk("Sent_s870 enter\n");
636#endif
637 dev->in_snd[c] = 1;
638 if ((dev->last_cmd[c] != 0xff) && ((dev->last_cmd[c] & 0x40) != 0)) {
639 dev->last_cmd[c] &= 0x0f;
640 workreq = dev->id[c][dev->last_cmd[c]].curr_req;
641 if (workreq != NULL) { /* check NULL pointer */
642 goto cmd_subp;
643 }
644 dev->last_cmd[c] = 0xff;
645 if (dev->quhd[c] == dev->quend[c]) {
646 dev->in_snd[c] = 0;
647 return ;
648 }
649 }
650 if ((dev->last_cmd[c] != 0xff) && (dev->working[c] != 0)) {
651 dev->in_snd[c] = 0;
652 return ;
653 }
654 dev->working[c]++;
655 j = dev->quhd[c];
656 dev->quhd[c]++;
657 if (dev->quhd[c] >= qcnt) {
658 dev->quhd[c] = 0;
659 }
660 workreq = dev->quereq[c][dev->quhd[c]];
9bcf0910 661 if (dev->id[c][scmd_id(workreq)].curr_req == NULL) {
422c0d61
JG		 662 dev->id[c][scmd_id(workreq)].curr_req = workreq;
663 dev->last_cmd[c] = scmd_id(workreq);
1da177e4
LT		 664 goto cmd_subp;
665 }
666 dev->quhd[c] = j;
667 dev->working[c]--;
668 dev->in_snd[c] = 0;
669 return;
670cmd_subp:
3b836464 671 if ((inb(dev->ioport[c] + 0x1f) & 0xb0) != 0) {
1da177e4
LT		 672 goto abortsnd;
673 }
3b836464 674 if (inb(dev->ioport[c] + 0x1c) == 0) {
1da177e4
LT		 675 goto oktosend;
676 }
677abortsnd:
678#ifdef ED_DBGP
679 printk("Abort to Send\n");
680#endif
681 dev->last_cmd[c] |= 0x40;
682 dev->in_snd[c] = 0;
683 return;
684oktosend:
685#ifdef ED_DBGP
686 printk("OK to Send\n");
422c0d61 687 scmd_printk(KERN_DEBUG, workreq, "CDB");
1da177e4
LT		 688 for(i=0;i<workreq->cmd_len;i++) {
689 printk(" %x",workreq->cmnd[i]);
690 }
422c0d61 691 printk("\n");
1da177e4 692#endif
fe7ed98f
BH		 693 l = scsi_bufflen(workreq);
694
1da177e4
LT		 695 if (dev->dev_id == ATP885_DEVID) {
696 j = inb(dev->baseport + 0x29) & 0xfe;
697 outb(j, dev->baseport + 0x29);
422c0d61 698 dev->r1f[c][scmd_id(workreq)] = 0;
1da177e4
LT		 699 }
700
701 if (workreq->cmnd[0] == READ_CAPACITY) {
fe7ed98f
BH		 702 if (l > 8)
703 l = 8;
1da177e4
LT		 704 }
705 if (workreq->cmnd[0] == 0x00) {
fe7ed98f 706 l = 0;
1da177e4
LT		 707 }
708
1da177e4 709 j = 0;
422c0d61 710 target_id = scmd_id(workreq);
1da177e4
LT		 711
712 /*
713 * Wide ?
714 */
715 w = 1;
716 w = w << target_id;
717 if ((w & dev->wide_id[c]) != 0) {
718 j |= 0x01;
719 }
3b836464
OZ		 720 outb(j, dev->ioport[c] + 0x1b);
721 while ((inb(dev->ioport[c] + 0x1b) & 0x01) != j) {
722 outb(j,dev->ioport[c] + 0x1b);
1da177e4
LT		 723#ifdef ED_DBGP
724 printk("send_s870 while loop 1\n");
725#endif
726 }
727 /*
728 * Write the command
729 */
730
3b836464
OZ		 731 outb(workreq->cmd_len, dev->ioport[c] + 0x00);
732 outb(0x2c, dev->ioport[c] + 0x01);
1da177e4 733 if (dev->dev_id == ATP885_DEVID) {
3b836464 734 outb(0x7f, dev->ioport[c] + 0x02);
1da177e4 735 } else {
3b836464 736 outb(0xcf, dev->ioport[c] + 0x02);
1da177e4
LT		 737 }
738 for (i = 0; i < workreq->cmd_len; i++) {
3b836464 739 outb(workreq->cmnd[i], dev->ioport[c] + 0x03 + i);
1da177e4 740 }
3b836464 741 outb(workreq->device->lun, dev->ioport[c] + 0x0f);
1da177e4
LT		 742 /*
743 * Write the target
744 */
3b836464 745 outb(dev->id[c][target_id].devsp, dev->ioport[c] + 0x11);
1da177e4
LT		 746#ifdef ED_DBGP
747 printk("dev->id[%d][%d].devsp = %2x\n",c,target_id,dev->id[c][target_id].devsp);
748#endif
fe7ed98f
BH		 749
750 sg_count = scsi_dma_map(workreq);
1da177e4
LT		 751 /*
752 * Write transfer size
753 */
3b836464
OZ		 754 outb((unsigned char) (((unsigned char *) (&l))[2]), dev->ioport[c] + 0x12);
755 outb((unsigned char) (((unsigned char *) (&l))[1]), dev->ioport[c] + 0x13);
756 outb((unsigned char) (((unsigned char *) (&l))[0]), dev->ioport[c] + 0x14);
1da177e4
LT		 757 j = target_id;
758 dev->id[c][j].last_len = l;
759 dev->id[c][j].tran_len = 0;
760#ifdef ED_DBGP
761 printk("dev->id[%2d][%2d].last_len = %d\n",c,j,dev->id[c][j].last_len);
762#endif
763 /*
764 * Flip the wide bits
765 */
766 if ((j & 0x08) != 0) {
767 j = (j & 0x07) | 0x40;
768 }
769 /*
770 * Check transfer direction
771 */
772 if (workreq->sc_data_direction == DMA_TO_DEVICE) {
3b836464 773 outb((unsigned char) (j | 0x20), dev->ioport[c] + 0x15);
1da177e4 774 } else {
3b836464 775 outb(j, dev->ioport[c] + 0x15);
1da177e4 776 }
3b836464
OZ		 777 outb((unsigned char) (inb(dev->ioport[c] + 0x16) | 0x80), dev->ioport[c] + 0x16);
778 outb(0x80, dev->ioport[c] + 0x16);
1da177e4
LT		 779 dev->id[c][target_id].dirct = 0;
780 if (l == 0) {
3b836464 781 if (inb(dev->ioport[c] + 0x1c) == 0) {
1da177e4
LT		 782#ifdef ED_DBGP
783 printk("change SCSI_CMD_REG 0x08\n");
784#endif
3b836464 785 outb(0x08, dev->ioport[c] + 0x18);
1da177e4
LT		 786 } else {
787 dev->last_cmd[c] |= 0x40;
788 }
789 dev->in_snd[c] = 0;
790 return;
791 }
1da177e4
LT		 792 prd = dev->id[c][target_id].prd_table;
793 dev->id[c][target_id].prd_pos = prd;
794
795 /*
796 * Now write the request list. Either as scatter/gather or as
797 * a linear chain.
798 */
799
fe7ed98f
BH		 800 if (l) {
801 struct scatterlist *sgpnt;
1da177e4 802 i = 0;
fe7ed98f
BH		 803 scsi_for_each_sg(workreq, sgpnt, sg_count, j) {
804 bttl = sg_dma_address(sgpnt);
805 l=sg_dma_len(sgpnt);
1da177e4 806#ifdef ED_DBGP
fe7ed98f 807 printk("1. bttl %x, l %x\n",bttl, l);
1da177e4 808#endif
fe7ed98f 809 while (l > 0x10000) {
1da177e4
LT		 810 (((u16 *) (prd))[i + 3]) = 0x0000;
811 (((u16 *) (prd))[i + 2]) = 0x0000;
812 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
813 l -= 0x10000;
814 bttl += 0x10000;
815 i += 0x04;
816 }
817 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
818 (((u16 *) (prd))[i + 2]) = cpu_to_le16(l);
819 (((u16 *) (prd))[i + 3]) = 0;
820 i += 0x04;
821 }
822 (((u16 *) (prd))[i - 1]) = cpu_to_le16(0x8000);
823#ifdef ED_DBGP
824 printk("prd %4x %4x %4x %4x\n",(((unsigned short int *)prd)[0]),(((unsigned short int *)prd)[1]),(((unsigned short int *)prd)[2]),(((unsigned short int *)prd)[3]));
825 printk("2. bttl %x, l %x\n",bttl, l);
826#endif
1da177e4 827 }
1da177e4 828#ifdef ED_DBGP
c2bab403 829 printk("send_s870: prdaddr_2 0x%8x target_id %d\n", dev->id[c][target_id].prdaddr,target_id);
1da177e4 830#endif
b5683557 831 dev->id[c][target_id].prdaddr = dev->id[c][target_id].prd_bus;
c2bab403
OZ		 832 outl(dev->id[c][target_id].prdaddr, dev->pciport[c] + 4);
833 outb(0x06, dev->pciport[c] + 2);
834 outb(0x00, dev->pciport[c] + 2);
1da177e4 835 if (dev->dev_id == ATP885_DEVID) {
c2bab403 836 j = inb(dev->pciport[c] + 1) & 0xf3;
1da177e4
LT		 837 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) ||
838 (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
839 j |= 0x0c;
840 }
c2bab403 841 outb(j, dev->pciport[c] + 1);
1da177e4
LT		 842 } else if ((dev->dev_id == ATP880_DEVID1) ||
843 (dev->dev_id == ATP880_DEVID2)) {
1da177e4 844 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
3b836464 845 outb((unsigned char) ((inb(dev->ioport[c] - 0x05) & 0x3f) | 0xc0), dev->ioport[c] - 0x05);
1da177e4 846 } else {
3b836464 847 outb((unsigned char) (inb(dev->ioport[c] - 0x05) & 0x3f), dev->ioport[c] - 0x05);
1da177e4
LT		 848 }
849 } else {
1da177e4 850 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
3b836464 851 outb((inb(dev->ioport[c] + 0x3a) & 0xf3) | 0x08, dev->ioport[c] + 0x3a);
1da177e4 852 } else {
3b836464 853 outb(inb(dev->ioport[c] + 0x3a) & 0xf3, dev->ioport[c] + 0x3a);
1da177e4
LT		 854 }
855 }
1da177e4
LT		 856
857 if(workreq->sc_data_direction == DMA_TO_DEVICE) {
858 dev->id[c][target_id].dirct = 0x20;
3b836464
OZ		 859 if (inb(dev->ioport[c] + 0x1c) == 0) {
860 outb(0x08, dev->ioport[c] + 0x18);
c2bab403 861 outb(0x01, dev->pciport[c]);
1da177e4
LT		 862#ifdef ED_DBGP
863 printk( "start DMA(to target)\n");
864#endif
865 } else {
866 dev->last_cmd[c] |= 0x40;
867 }
868 dev->in_snd[c] = 0;
869 return;
870 }
3b836464
OZ		 871 if (inb(dev->ioport[c] + 0x1c) == 0) {
872 outb(0x08, dev->ioport[c] + 0x18);
c2bab403 873 outb(0x09, dev->pciport[c]);
1da177e4
LT		 874#ifdef ED_DBGP
875 printk( "start DMA(to host)\n");
876#endif
877 } else {
878 dev->last_cmd[c] |= 0x40;
879 }
880 dev->in_snd[c] = 0;
881 return;
882
883}
884
885static unsigned char fun_scam(struct atp_unit *dev, unsigned short int *val)
886{
1da177e4
LT		 887 unsigned short int i, k;
888 unsigned char j;
889
1940ed62 890 outw(*val, dev->ioport[0] + 0x1c);
1da177e4
LT		 891FUN_D7:
892 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
1940ed62 893 k = inw(dev->ioport[0] + 0x1c);
1da177e4
LT		 894 j = (unsigned char) (k >> 8);
895 if ((k & 0x8000) != 0) { /* DB7 all release? */
896 goto FUN_D7;
897 }
898 }
899 *val |= 0x4000; /* assert DB6 */
1940ed62 900 outw(*val, dev->ioport[0] + 0x1c);
1da177e4 901 *val &= 0xdfff; /* assert DB5 */
1940ed62 902 outw(*val, dev->ioport[0] + 0x1c);
1da177e4
LT		 903FUN_D5:
904 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
1940ed62 905 if ((inw(dev->ioport[0] + 0x1c) & 0x2000) != 0) { /* DB5 all release? */
1da177e4
LT		 906 goto FUN_D5;
907 }
908 }
909 *val |= 0x8000; /* no DB4-0, assert DB7 */
910 *val &= 0xe0ff;
1940ed62 911 outw(*val, dev->ioport[0] + 0x1c);
1da177e4 912 *val &= 0xbfff; /* release DB6 */
1940ed62 913 outw(*val, dev->ioport[0] + 0x1c);
1da177e4
LT		 914FUN_D6:
915 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
1940ed62 916 if ((inw(dev->ioport[0] + 0x1c) & 0x4000) != 0) { /* DB6 all release? */
1da177e4
LT		 917 goto FUN_D6;
918 }
919 }
920
921 return j;
922}
923
924static void tscam(struct Scsi_Host *host)
925{
926
1da177e4
LT		 927 unsigned char i, j, k;
928 unsigned long n;
929 unsigned short int m, assignid_map, val;
930 unsigned char mbuf[33], quintet[2];
931 struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
932 static unsigned char g2q_tab[8] = {
933 0x38, 0x31, 0x32, 0x2b, 0x34, 0x2d, 0x2e, 0x27
934 };
935
936/* I can't believe we need this before we've even done anything. Remove it
937 * and see if anyone bitches.
938 for (i = 0; i < 0x10; i++) {
939 udelay(0xffff);
940 }
941 */
942
1940ed62
OZ		 943 outb(0x08, dev->ioport[0] + 1);
944 outb(0x7f, dev->ioport[0] + 2);
945 outb(0x20, dev->ioport[0] + 0x11);
1da177e4
LT		 946
947 if ((dev->scam_on & 0x40) == 0) {
948 return;
949 }
950 m = 1;
951 m <<= dev->host_id[0];
952 j = 16;
953 if (dev->chip_ver < 4) {
954 m |= 0xff00;
955 j = 8;
956 }
957 assignid_map = m;
1940ed62
OZ		 958 outb(0x02, dev->ioport[0] + 0x02); /* 2*2=4ms,3EH 2/32*3E=3.9ms */
959 outb(0, dev->ioport[0] + 0x03);
960 outb(0, dev->ioport[0] + 0x04);
961 outb(0, dev->ioport[0] + 0x05);
962 outb(0, dev->ioport[0] + 0x06);
963 outb(0, dev->ioport[0] + 0x07);
964 outb(0, dev->ioport[0] + 0x08);
1da177e4
LT		 965
966 for (i = 0; i < j; i++) {
967 m = 1;
968 m = m << i;
969 if ((m & assignid_map) != 0) {
970 continue;
971 }
1940ed62
OZ		 972 outb(0, dev->ioport[0] + 0x0f);
973 outb(0, dev->ioport[0] + 0x12);
974 outb(0, dev->ioport[0] + 0x13);
975 outb(0, dev->ioport[0] + 0x14);
1da177e4
LT		 976 if (i > 7) {
977 k = (i & 0x07) | 0x40;
978 } else {
979 k = i;
980 }
1940ed62 981 outb(k, dev->ioport[0] + 0x15);
1da177e4 982 if (dev->chip_ver == 4) {
1940ed62 983 outb(0x01, dev->ioport[0] + 0x1b);
1da177e4 984 } else {
1940ed62 985 outb(0x00, dev->ioport[0] + 0x1b);
1da177e4
LT		 986 }
987wait_rdyok:
1940ed62 988 outb(0x09, dev->ioport[0] + 0x18);
1da177e4 989
1940ed62 990 while ((inb(dev->ioport[0] + 0x1f) & 0x80) == 0x00)
1da177e4 991 cpu_relax();
1940ed62 992 k = inb(dev->ioport[0] + 0x17);
1da177e4
LT		 993 if (k != 0x16) {
994 if ((k == 0x85) || (k == 0x42)) {
995 continue;
996 }
1940ed62 997 outb(0x41, dev->ioport[0] + 0x10);
1da177e4
LT		 998 goto wait_rdyok;
999 }
1000 assignid_map |= m;
1001
1002 }
1940ed62
OZ		 1003 outb(0x7f, dev->ioport[0] + 0x02);
1004 outb(0x02, dev->ioport[0] + 0x1b);
1da177e4
LT		 1005
1006 outb(0, 0x80);
1007
1008 val = 0x0080; /* bsy */
1940ed62 1009 outw(val, dev->ioport[0] + 0x1c);
1da177e4 1010 val |= 0x0040; /* sel */
1940ed62 1011 outw(val, dev->ioport[0] + 0x1c);
1da177e4 1012 val |= 0x0004; /* msg */
1940ed62 1013 outw(val, dev->ioport[0] + 0x1c);
1da177e4
LT		 1014 inb(0x80); /* 2 deskew delay(45ns*2=90ns) */
1015 val &= 0x007f; /* no bsy */
1940ed62 1016 outw(val, dev->ioport[0] + 0x1c);
1da177e4
LT		 1017 mdelay(128);
1018 val &= 0x00fb; /* after 1ms no msg */
1940ed62 1019 outw(val, dev->ioport[0] + 0x1c);
1da177e4 1020wait_nomsg:
1940ed62 1021 if ((inb(dev->ioport[0] + 0x1c) & 0x04) != 0) {
1da177e4
LT		 1022 goto wait_nomsg;
1023 }
1024 outb(1, 0x80);
1025 udelay(100);
1026 for (n = 0; n < 0x30000; n++) {
1940ed62 1027 if ((inb(dev->ioport[0] + 0x1c) & 0x80) != 0) { /* bsy ? */
1da177e4
LT		 1028 goto wait_io;
1029 }
1030 }
1031 goto TCM_SYNC;
1032wait_io:
1033 for (n = 0; n < 0x30000; n++) {
1940ed62 1034 if ((inb(dev->ioport[0] + 0x1c) & 0x81) == 0x0081) {
1da177e4
LT		 1035 goto wait_io1;
1036 }
1037 }
1038 goto TCM_SYNC;
1039wait_io1:
1040 inb(0x80);
1041 val |= 0x8003; /* io,cd,db7 */
1940ed62 1042 outw(val, dev->ioport[0] + 0x1c);
1da177e4
LT		 1043 inb(0x80);
1044 val &= 0x00bf; /* no sel */
1940ed62 1045 outw(val, dev->ioport[0] + 0x1c);
1da177e4
LT		 1046 outb(2, 0x80);
1047TCM_SYNC:
0f6d93aa
MM		 1048 /*
1049 * The funny division into multiple delays is to accomodate
1050 * arches like ARM where udelay() multiplies its argument by
1051 * a large number to initialize a loop counter. To avoid
1052 * overflow, the maximum supported udelay is 2000 microseconds.
1053 *
1054 * XXX it would be more polite to find a way to use msleep()
1055 */
1056 mdelay(2);
1057 udelay(48);
1940ed62
OZ		 1058 if ((inb(dev->ioport[0] + 0x1c) & 0x80) == 0x00) { /* bsy ? */
1059 outw(0, dev->ioport[0] + 0x1c);
1060 outb(0, dev->ioport[0] + 0x1b);
1061 outb(0, dev->ioport[0] + 0x15);
1062 outb(0x09, dev->ioport[0] + 0x18);
1063 while ((inb(dev->ioport[0] + 0x1f) & 0x80) == 0)
1da177e4 1064 cpu_relax();
1940ed62 1065 inb(dev->ioport[0] + 0x17);
1da177e4
LT		 1066 return;
1067 }
1068 val &= 0x00ff; /* synchronization */
1069 val |= 0x3f00;
1070 fun_scam(dev, &val);
1071 outb(3, 0x80);
1072 val &= 0x00ff; /* isolation */
1073 val |= 0x2000;
1074 fun_scam(dev, &val);
1075 outb(4, 0x80);
1076 i = 8;
1077 j = 0;
1078TCM_ID:
1940ed62 1079 if ((inw(dev->ioport[0] + 0x1c) & 0x2000) == 0) {
1da177e4
LT		 1080 goto TCM_ID;
1081 }
1082 outb(5, 0x80);
1083 val &= 0x00ff; /* get ID_STRING */
1084 val |= 0x2000;
1085 k = fun_scam(dev, &val);
1086 if ((k & 0x03) == 0) {
1087 goto TCM_5;
1088 }
1089 mbuf[j] <<= 0x01;
1090 mbuf[j] &= 0xfe;
1091 if ((k & 0x02) != 0) {
1092 mbuf[j] |= 0x01;
1093 }
1094 i--;
1095 if (i > 0) {
1096 goto TCM_ID;
1097 }
1098 j++;
1099 i = 8;
1100 goto TCM_ID;
1101
1102TCM_5: /* isolation complete.. */
1103/* mbuf[32]=0;
1104 printk(" \n%x %x %x %s\n ",assignid_map,mbuf[0],mbuf[1],&mbuf[2]); */
1105 i = 15;
1106 j = mbuf[0];
25985edc 1107 if ((j & 0x20) != 0) { /* bit5=1:ID up to 7 */
1da177e4
LT		 1108 i = 7;
1109 }
1110 if ((j & 0x06) == 0) { /* IDvalid? */
1111 goto G2Q5;
1112 }
1113 k = mbuf[1];
1114small_id:
1115 m = 1;
1116 m <<= k;
1117 if ((m & assignid_map) == 0) {
1118 goto G2Q_QUIN;
1119 }
1120 if (k > 0) {
1121 k--;
1122 goto small_id;
1123 }
1124G2Q5: /* srch from max acceptable ID# */
1125 k = i; /* max acceptable ID# */
1126G2Q_LP:
1127 m = 1;
1128 m <<= k;
1129 if ((m & assignid_map) == 0) {
1130 goto G2Q_QUIN;
1131 }
1132 if (k > 0) {
1133 k--;
1134 goto G2Q_LP;
1135 }
1136G2Q_QUIN: /* k=binID#, */
1137 assignid_map |= m;
1138 if (k < 8) {
1139 quintet[0] = 0x38; /* 1st dft ID<8 */
1140 } else {
1141 quintet[0] = 0x31; /* 1st ID>=8 */
1142 }
1143 k &= 0x07;
1144 quintet[1] = g2q_tab[k];
1145
1146 val &= 0x00ff; /* AssignID 1stQuintet,AH=001xxxxx */
1147 m = quintet[0] << 8;
1148 val |= m;
1149 fun_scam(dev, &val);
1150 val &= 0x00ff; /* AssignID 2ndQuintet,AH=001xxxxx */
1151 m = quintet[1] << 8;
1152 val |= m;
1153 fun_scam(dev, &val);
1154
1155 goto TCM_SYNC;
1156
1157}
1158
1159static void is870(struct atp_unit *dev, unsigned int wkport)
1160{
1da177e4
LT		 1161 unsigned char i, j, k, rmb, n;
1162 unsigned short int m;
1163 static unsigned char mbuf[512];
1164 static unsigned char satn[9] = { 0, 0, 0, 0, 0, 0, 0, 6, 6 };
1165 static unsigned char inqd[9] = { 0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6 };
1166 static unsigned char synn[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1167 static unsigned char synu[6] = { 0x80, 1, 3, 1, 0x0c, 0x0e };
1168 static unsigned char synw[6] = { 0x80, 1, 3, 1, 0x0c, 0x07 };
1169 static unsigned char wide[6] = { 0x80, 1, 2, 3, 1, 0 };
1170
ea41ed60 1171 outb((unsigned char) (inb(wkport + 0x3a) | 0x10), wkport + 0x3a);
1da177e4
LT		 1172
1173 for (i = 0; i < 16; i++) {
1174 if ((dev->chip_ver != 4) && (i > 7)) {
1175 break;
1176 }
1177 m = 1;
1178 m = m << i;
1179 if ((m & dev->active_id[0]) != 0) {
1180 continue;
1181 }
1182 if (i == dev->host_id[0]) {
1183 printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[0]);
1184 continue;
1185 }
1da177e4 1186 if (dev->chip_ver == 4) {
ea41ed60 1187 outb(0x01, wkport + 0x1b);
1da177e4 1188 } else {
ea41ed60
OZ		 1189 outb(0x00, wkport + 0x1b);
1190 }
1191 outb(0x08, wkport + 1);
1192 outb(0x7f, wkport + 2);
1193 outb(satn[0], wkport + 3);
1194 outb(satn[1], wkport + 4);
1195 outb(satn[2], wkport + 5);
1196 outb(satn[3], wkport + 6);
1197 outb(satn[4], wkport + 7);
1198 outb(satn[5], wkport + 8);
1199 outb(0, wkport + 0x0f);
1200 outb(dev->id[0][i].devsp, wkport + 0x11);
1201 outb(0, wkport + 0x12);
1202 outb(satn[6], wkport + 0x13);
1203 outb(satn[7], wkport + 0x14);
1da177e4
LT		 1204 j = i;
1205 if ((j & 0x08) != 0) {
1206 j = (j & 0x07) | 0x40;
1207 }
ea41ed60
OZ		 1208 outb(j, wkport + 0x15);
1209 outb(satn[8], wkport + 0x18);
1da177e4 1210
ea41ed60 1211 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1212 cpu_relax();
1213
ea41ed60 1214 if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1215 continue;
1216
ea41ed60 1217 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1218 cpu_relax();
1219
1220 dev->active_id[0] |= m;
1221
ea41ed60
OZ		 1222 outb(0x30, wkport + 0x10);
1223 outb(0x00, wkport + 0x04);
1da177e4
LT		 1224
1225phase_cmd:
ea41ed60
OZ		 1226 outb(0x08, wkport + 0x18);
1227 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 1228 cpu_relax();
ea41ed60 1229 j = inb(wkport + 0x17);
1da177e4 1230 if (j != 0x16) {
ea41ed60 1231 outb(0x41, wkport + 0x10);
1da177e4
LT		 1232 goto phase_cmd;
1233 }
1234sel_ok:
ea41ed60
OZ		 1235 outb(inqd[0], wkport + 3);
1236 outb(inqd[1], wkport + 4);
1237 outb(inqd[2], wkport + 5);
1238 outb(inqd[3], wkport + 6);
1239 outb(inqd[4], wkport + 7);
1240 outb(inqd[5], wkport + 8);
1241 outb(0, wkport + 0x0f);
1242 outb(dev->id[0][i].devsp, wkport + 0x11);
1243 outb(0, wkport + 0x12);
1244 outb(inqd[6], wkport + 0x13);
1245 outb(inqd[7], wkport + 0x14);
1246 outb(inqd[8], wkport + 0x18);
1247
1248 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1249 cpu_relax();
1250
ea41ed60 1251 if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1252 continue;
1253
ea41ed60 1254 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1255 cpu_relax();
1256
1da177e4 1257 if (dev->chip_ver == 4)
ea41ed60 1258 outb(0x00, wkport + 0x1b);
1da177e4 1259
ea41ed60 1260 outb(0x08, wkport + 0x18);
1da177e4
LT		 1261 j = 0;
1262rd_inq_data:
ea41ed60 1263 k = inb(wkport + 0x1f);
1da177e4 1264 if ((k & 0x01) != 0) {
ea41ed60 1265 mbuf[j++] = inb(wkport + 0x19);
1da177e4
LT		 1266 goto rd_inq_data;
1267 }
1268 if ((k & 0x80) == 0) {
1269 goto rd_inq_data;
1270 }
ea41ed60 1271 j = inb(wkport + 0x17);
1da177e4
LT		 1272 if (j == 0x16) {
1273 goto inq_ok;
1274 }
ea41ed60
OZ		 1275 outb(0x46, wkport + 0x10);
1276 outb(0, wkport + 0x12);
1277 outb(0, wkport + 0x13);
1278 outb(0, wkport + 0x14);
1279 outb(0x08, wkport + 0x18);
1280
1281 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1282 cpu_relax();
1283
ea41ed60 1284 if (inb(wkport + 0x17) != 0x16) {
1da177e4
LT		 1285 goto sel_ok;
1286 }
1287inq_ok:
1288 mbuf[36] = 0;
1289 printk(KERN_INFO " ID: %2d %s\n", i, &mbuf[8]);
1290 dev->id[0][i].devtype = mbuf[0];
1291 rmb = mbuf[1];
1292 n = mbuf[7];
1293 if (dev->chip_ver != 4) {
1294 goto not_wide;
1295 }
1296 if ((mbuf[7] & 0x60) == 0) {
1297 goto not_wide;
1298 }
1299 if ((dev->global_map[0] & 0x20) == 0) {
1300 goto not_wide;
1301 }
ea41ed60
OZ		 1302 outb(0x01, wkport + 0x1b);
1303 outb(satn[0], wkport + 3);
1304 outb(satn[1], wkport + 4);
1305 outb(satn[2], wkport + 5);
1306 outb(satn[3], wkport + 6);
1307 outb(satn[4], wkport + 7);
1308 outb(satn[5], wkport + 8);
1309 outb(0, wkport + 0x0f);
1310 outb(dev->id[0][i].devsp, wkport + 0x11);
1311 outb(0, wkport + 0x12);
1312 outb(satn[6], wkport + 0x13);
1313 outb(satn[7], wkport + 0x14);
1314 outb(satn[8], wkport + 0x18);
1315
1316 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1317 cpu_relax();
1318
ea41ed60 1319 if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1320 continue;
1321
ea41ed60 1322 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1323 cpu_relax();
1324
1325try_wide:
1326 j = 0;
ea41ed60
OZ		 1327 outb(0x05, wkport + 0x14);
1328 outb(0x20, wkport + 0x18);
1329
1330 while ((inb(wkport + 0x1f) & 0x80) == 0) {
1331 if ((inb(wkport + 0x1f) & 0x01) != 0)
1332 outb(wide[j++], wkport + 0x19);
1da177e4 1333 }
1da177e4 1334
ea41ed60 1335 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4
LT		 1336 cpu_relax();
1337
ea41ed60 1338 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 1339 if (j == 0x0f) {
1340 goto widep_in;
1341 }
1342 if (j == 0x0a) {
1343 goto widep_cmd;
1344 }
1345 if (j == 0x0e) {
1346 goto try_wide;
1347 }
1348 continue;
1349widep_out:
ea41ed60
OZ		 1350 outb(0x20, wkport + 0x18);
1351 while ((inb(wkport + 0x1f) & 0x80) == 0) {
1352 if ((inb(wkport + 0x1f) & 0x01) != 0)
1353 outb(0, wkport + 0x19);
1da177e4 1354 }
ea41ed60 1355 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 1356 if (j == 0x0f) {
1357 goto widep_in;
1358 }
1359 if (j == 0x0a) {
1360 goto widep_cmd;
1361 }
1362 if (j == 0x0e) {
1363 goto widep_out;
1364 }
1365 continue;
1366widep_in:
ea41ed60
OZ		 1367 outb(0xff, wkport + 0x14);
1368 outb(0x20, wkport + 0x18);
1da177e4
LT		 1369 k = 0;
1370widep_in1:
ea41ed60 1371 j = inb(wkport + 0x1f);
1da177e4 1372 if ((j & 0x01) != 0) {
ea41ed60 1373 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 1374 goto widep_in1;
1375 }
1376 if ((j & 0x80) == 0x00) {
1377 goto widep_in1;
1378 }
ea41ed60 1379 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 1380 if (j == 0x0f) {
1381 goto widep_in;
1382 }
1383 if (j == 0x0a) {
1384 goto widep_cmd;
1385 }
1386 if (j == 0x0e) {
1387 goto widep_out;
1388 }
1389 continue;
1390widep_cmd:
ea41ed60
OZ		 1391 outb(0x30, wkport + 0x10);
1392 outb(0x00, wkport + 0x14);
1393 outb(0x08, wkport + 0x18);
1da177e4 1394
ea41ed60 1395 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1396 cpu_relax();
1397
ea41ed60 1398 j = inb(wkport + 0x17);
1da177e4
LT		 1399 if (j != 0x16) {
1400 if (j == 0x4e) {
1401 goto widep_out;
1402 }
1403 continue;
1404 }
1405 if (mbuf[0] != 0x01) {
1406 goto not_wide;
1407 }
1408 if (mbuf[1] != 0x02) {
1409 goto not_wide;
1410 }
1411 if (mbuf[2] != 0x03) {
1412 goto not_wide;
1413 }
1414 if (mbuf[3] != 0x01) {
1415 goto not_wide;
1416 }
1417 m = 1;
1418 m = m << i;
1419 dev->wide_id[0] |= m;
1420not_wide:
1421 if ((dev->id[0][i].devtype == 0x00) || (dev->id[0][i].devtype == 0x07) || ((dev->id[0][i].devtype == 0x05) && ((n & 0x10) != 0))) {
1422 goto set_sync;
1423 }
1424 continue;
1425set_sync:
1da177e4
LT		 1426 j = 0;
1427 if ((m & dev->wide_id[0]) != 0) {
1428 j |= 0x01;
1429 }
ea41ed60
OZ		 1430 outb(j, wkport + 0x1b);
1431 outb(satn[0], wkport + 3);
1432 outb(satn[1], wkport + 4);
1433 outb(satn[2], wkport + 5);
1434 outb(satn[3], wkport + 6);
1435 outb(satn[4], wkport + 7);
1436 outb(satn[5], wkport + 8);
1437 outb(0, wkport + 0x0f);
1438 outb(dev->id[0][i].devsp, wkport + 0x11);
1439 outb(0, wkport + 0x12);
1440 outb(satn[6], wkport + 0x13);
1441 outb(satn[7], wkport + 0x14);
1442 outb(satn[8], wkport + 0x18);
1443
1444 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1445 cpu_relax();
1446
ea41ed60 1447 if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1448 continue;
1449
ea41ed60 1450 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1451 cpu_relax();
1452
1453try_sync:
1454 j = 0;
ea41ed60
OZ		 1455 outb(0x06, wkport + 0x14);
1456 outb(0x20, wkport + 0x18);
1457
1458 while ((inb(wkport + 0x1f) & 0x80) == 0) {
1459 if ((inb(wkport + 0x1f) & 0x01) != 0) {
1da177e4 1460 if ((m & dev->wide_id[0]) != 0) {
ea41ed60 1461 outb(synw[j++], wkport + 0x19);
1da177e4
LT		 1462 } else {
1463 if ((m & dev->ultra_map[0]) != 0) {
ea41ed60 1464 outb(synu[j++], wkport + 0x19);
1da177e4 1465 } else {
ea41ed60 1466 outb(synn[j++], wkport + 0x19);
1da177e4
LT		 1467 }
1468 }
1da177e4
LT		 1469 }
1470 }
1da177e4 1471
ea41ed60 1472 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4
LT		 1473 cpu_relax();
1474
ea41ed60 1475 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 1476 if (j == 0x0f) {
1477 goto phase_ins;
1478 }
1479 if (j == 0x0a) {
1480 goto phase_cmds;
1481 }
1482 if (j == 0x0e) {
1483 goto try_sync;
1484 }
1485 continue;
1486phase_outs:
ea41ed60
OZ		 1487 outb(0x20, wkport + 0x18);
1488 while ((inb(wkport + 0x1f) & 0x80) == 0x00) {
1489 if ((inb(wkport + 0x1f) & 0x01) != 0x00)
1490 outb(0x00, wkport + 0x19);
1da177e4 1491 }
ea41ed60 1492 j = inb(wkport + 0x17);
1da177e4
LT		 1493 if (j == 0x85) {
1494 goto tar_dcons;
1495 }
1496 j &= 0x0f;
1497 if (j == 0x0f) {
1498 goto phase_ins;
1499 }
1500 if (j == 0x0a) {
1501 goto phase_cmds;
1502 }
1503 if (j == 0x0e) {
1504 goto phase_outs;
1505 }
1506 continue;
1507phase_ins:
ea41ed60
OZ		 1508 outb(0xff, wkport + 0x14);
1509 outb(0x20, wkport + 0x18);
1da177e4
LT		 1510 k = 0;
1511phase_ins1:
ea41ed60 1512 j = inb(wkport + 0x1f);
1da177e4 1513 if ((j & 0x01) != 0x00) {
ea41ed60 1514 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 1515 goto phase_ins1;
1516 }
1517 if ((j & 0x80) == 0x00) {
1518 goto phase_ins1;
1519 }
1da177e4 1520
ea41ed60 1521 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4
LT		 1522 cpu_relax();
1523
ea41ed60 1524 j = inb(wkport + 0x17);
1da177e4
LT		 1525 if (j == 0x85) {
1526 goto tar_dcons;
1527 }
1528 j &= 0x0f;
1529 if (j == 0x0f) {
1530 goto phase_ins;
1531 }
1532 if (j == 0x0a) {
1533 goto phase_cmds;
1534 }
1535 if (j == 0x0e) {
1536 goto phase_outs;
1537 }
1538 continue;
1539phase_cmds:
ea41ed60 1540 outb(0x30, wkport + 0x10);
1da177e4 1541tar_dcons:
ea41ed60
OZ		 1542 outb(0x00, wkport + 0x14);
1543 outb(0x08, wkport + 0x18);
1da177e4 1544
ea41ed60 1545 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1546 cpu_relax();
1547
ea41ed60 1548 j = inb(wkport + 0x17);
1da177e4
LT		 1549 if (j != 0x16) {
1550 continue;
1551 }
1552 if (mbuf[0] != 0x01) {
1553 continue;
1554 }
1555 if (mbuf[1] != 0x03) {
1556 continue;
1557 }
1558 if (mbuf[4] == 0x00) {
1559 continue;
1560 }
1561 if (mbuf[3] > 0x64) {
1562 continue;
1563 }
1564 if (mbuf[4] > 0x0c) {
1565 mbuf[4] = 0x0c;
1566 }
1567 dev->id[0][i].devsp = mbuf[4];
1568 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
1569 j = 0xa0;
1570 goto set_syn_ok;
1571 }
1572 if (mbuf[3] < 0x1a) {
1573 j = 0x20;
1574 goto set_syn_ok;
1575 }
1576 if (mbuf[3] < 0x33) {
1577 j = 0x40;
1578 goto set_syn_ok;
1579 }
1580 if (mbuf[3] < 0x4c) {
1581 j = 0x50;
1582 goto set_syn_ok;
1583 }
1584 j = 0x60;
1585set_syn_ok:
1586 dev->id[0][i].devsp = (dev->id[0][i].devsp & 0x0f) | j;
1587 }
ea41ed60 1588 outb((unsigned char) (inb(wkport + 0x3a) & 0xef), wkport + 0x3a);
1da177e4
LT		 1589}
1590
1591static void is880(struct atp_unit *dev, unsigned int wkport)
1592{
1da177e4
LT		 1593 unsigned char i, j, k, rmb, n, lvdmode;
1594 unsigned short int m;
1595 static unsigned char mbuf[512];
1596 static unsigned char satn[9] = { 0, 0, 0, 0, 0, 0, 0, 6, 6 };
1597 static unsigned char inqd[9] = { 0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6 };
1598 static unsigned char synn[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1599 unsigned char synu[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1600 static unsigned char synw[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1601 unsigned char synuw[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1602 static unsigned char wide[6] = { 0x80, 1, 2, 3, 1, 0 };
1603 static unsigned char u3[9] = { 0x80, 1, 6, 4, 0x09, 00, 0x0e, 0x01, 0x02 };
1604
1605 lvdmode = inb(wkport + 0x3f) & 0x40;
1606
1607 for (i = 0; i < 16; i++) {
1608 m = 1;
1609 m = m << i;
1610 if ((m & dev->active_id[0]) != 0) {
1611 continue;
1612 }
1613 if (i == dev->host_id[0]) {
1614 printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[0]);
1615 continue;
1616 }
3b30acf6
OZ		 1617 outb(0x01, wkport + 0x5b);
1618 outb(0x08, wkport + 0x41);
1619 outb(0x7f, wkport + 0x42);
1620 outb(satn[0], wkport + 0x43);
1621 outb(satn[1], wkport + 0x44);
1622 outb(satn[2], wkport + 0x45);
1623 outb(satn[3], wkport + 0x46);
1624 outb(satn[4], wkport + 0x47);
1625 outb(satn[5], wkport + 0x48);
1626 outb(0, wkport + 0x4f);
1627 outb(dev->id[0][i].devsp, wkport + 0x51);
1628 outb(0, wkport + 0x52);
1629 outb(satn[6], wkport + 0x53);
1630 outb(satn[7], wkport + 0x54);
1da177e4
LT		 1631 j = i;
1632 if ((j & 0x08) != 0) {
1633 j = (j & 0x07) | 0x40;
1634 }
3b30acf6
OZ		 1635 outb(j, wkport + 0x55);
1636 outb(satn[8], wkport + 0x58);
1da177e4 1637
3b30acf6 1638 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1639 cpu_relax();
1640
3b30acf6 1641 if (inb(wkport + 0x57) != 0x11 && inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1642 continue;
1643
3b30acf6 1644 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1645 cpu_relax();
1646
1647 dev->active_id[0] |= m;
1648
3b30acf6
OZ		 1649 outb(0x30, wkport + 0x50);
1650 outb(0x00, wkport + 0x54);
1da177e4
LT		 1651
1652phase_cmd:
3b30acf6 1653 outb(0x08, wkport + 0x58);
1da177e4 1654
3b30acf6 1655 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1656 cpu_relax();
1657
3b30acf6 1658 j = inb(wkport + 0x57);
1da177e4 1659 if (j != 0x16) {
3b30acf6 1660 outb(0x41, wkport + 0x50);
1da177e4
LT		 1661 goto phase_cmd;
1662 }
1663sel_ok:
3b30acf6
OZ		 1664 outb(inqd[0], wkport + 0x43);
1665 outb(inqd[1], wkport + 0x44);
1666 outb(inqd[2], wkport + 0x45);
1667 outb(inqd[3], wkport + 0x46);
1668 outb(inqd[4], wkport + 0x47);
1669 outb(inqd[5], wkport + 0x48);
1670 outb(0, wkport + 0x4f);
1671 outb(dev->id[0][i].devsp, wkport + 0x51);
1672 outb(0, wkport + 0x52);
1673 outb(inqd[6], wkport + 0x53);
1674 outb(inqd[7], wkport + 0x54);
1675 outb(inqd[8], wkport + 0x58);
1da177e4 1676
3b30acf6 1677 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1678 cpu_relax();
1679
3b30acf6 1680 if (inb(wkport + 0x57) != 0x11 && inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1681 continue;
1682
3b30acf6 1683 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1684 cpu_relax();
1685
3b30acf6
OZ		 1686 outb(0x00, wkport + 0x5b);
1687 outb(0x08, wkport + 0x58);
1da177e4
LT		 1688 j = 0;
1689rd_inq_data:
3b30acf6 1690 k = inb(wkport + 0x5f);
1da177e4 1691 if ((k & 0x01) != 0) {
3b30acf6 1692 mbuf[j++] = inb(wkport + 0x59);
1da177e4
LT		 1693 goto rd_inq_data;
1694 }
1695 if ((k & 0x80) == 0) {
1696 goto rd_inq_data;
1697 }
3b30acf6 1698 j = inb(wkport + 0x57);
1da177e4
LT		 1699 if (j == 0x16) {
1700 goto inq_ok;
1701 }
3b30acf6
OZ		 1702 outb(0x46, wkport + 0x50);
1703 outb(0, wkport + 0x52);
1704 outb(0, wkport + 0x53);
1705 outb(0, wkport + 0x54);
1706 outb(0x08, wkport + 0x58);
1707 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1708 cpu_relax();
1709
3b30acf6 1710 if (inb(wkport + 0x57) != 0x16)
1da177e4
LT		 1711 goto sel_ok;
1712
1713inq_ok:
1714 mbuf[36] = 0;
1715 printk(KERN_INFO " ID: %2d %s\n", i, &mbuf[8]);
1716 dev->id[0][i].devtype = mbuf[0];
1717 rmb = mbuf[1];
1718 n = mbuf[7];
1719 if ((mbuf[7] & 0x60) == 0) {
1720 goto not_wide;
1721 }
1722 if ((i < 8) && ((dev->global_map[0] & 0x20) == 0)) {
1723 goto not_wide;
1724 }
1725 if (lvdmode == 0) {
1726 goto chg_wide;
1727 }
1728 if (dev->sp[0][i] != 0x04) // force u2
1729 {
1730 goto chg_wide;
1731 }
1732
3b30acf6
OZ		 1733 outb(0x01, wkport + 0x5b);
1734 outb(satn[0], wkport + 0x43);
1735 outb(satn[1], wkport + 0x44);
1736 outb(satn[2], wkport + 0x45);
1737 outb(satn[3], wkport + 0x46);
1738 outb(satn[4], wkport + 0x47);
1739 outb(satn[5], wkport + 0x48);
1740 outb(0, wkport + 0x4f);
1741 outb(dev->id[0][i].devsp, wkport + 0x51);
1742 outb(0, wkport + 0x52);
1743 outb(satn[6], wkport + 0x53);
1744 outb(satn[7], wkport + 0x54);
1745 outb(satn[8], wkport + 0x58);
1746
1747 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1748 cpu_relax();
1749
3b30acf6 1750 if (inb(wkport + 0x57) != 0x11 && inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1751 continue;
1752
3b30acf6 1753 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1754 cpu_relax();
1755
1756try_u3:
1757 j = 0;
3b30acf6
OZ		 1758 outb(0x09, wkport + 0x54);
1759 outb(0x20, wkport + 0x58);
1760
1761 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1762 if ((inb(wkport + 0x5f) & 0x01) != 0)
1763 outb(u3[j++], wkport + 0x59);
1da177e4 1764 }
1da177e4 1765
3b30acf6 1766 while ((inb(wkport + 0x57) & 0x80) == 0x00)
1da177e4
LT		 1767 cpu_relax();
1768
3b30acf6 1769 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1770 if (j == 0x0f) {
1771 goto u3p_in;
1772 }
1773 if (j == 0x0a) {
1774 goto u3p_cmd;
1775 }
1776 if (j == 0x0e) {
1777 goto try_u3;
1778 }
1779 continue;
1780u3p_out:
3b30acf6
OZ		 1781 outb(0x20, wkport + 0x58);
1782 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1783 if ((inb(wkport + 0x5f) & 0x01) != 0)
1784 outb(0, wkport + 0x59);
1da177e4 1785 }
3b30acf6 1786 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1787 if (j == 0x0f) {
1788 goto u3p_in;
1789 }
1790 if (j == 0x0a) {
1791 goto u3p_cmd;
1792 }
1793 if (j == 0x0e) {
1794 goto u3p_out;
1795 }
1796 continue;
1797u3p_in:
3b30acf6
OZ		 1798 outb(0x09, wkport + 0x54);
1799 outb(0x20, wkport + 0x58);
1da177e4
LT		 1800 k = 0;
1801u3p_in1:
3b30acf6 1802 j = inb(wkport + 0x5f);
1da177e4 1803 if ((j & 0x01) != 0) {
3b30acf6 1804 mbuf[k++] = inb(wkport + 0x59);
1da177e4
LT		 1805 goto u3p_in1;
1806 }
1807 if ((j & 0x80) == 0x00) {
1808 goto u3p_in1;
1809 }
3b30acf6 1810 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1811 if (j == 0x0f) {
1812 goto u3p_in;
1813 }
1814 if (j == 0x0a) {
1815 goto u3p_cmd;
1816 }
1817 if (j == 0x0e) {
1818 goto u3p_out;
1819 }
1820 continue;
1821u3p_cmd:
3b30acf6
OZ		 1822 outb(0x30, wkport + 0x50);
1823 outb(0x00, wkport + 0x54);
1824 outb(0x08, wkport + 0x58);
1da177e4 1825
3b30acf6 1826 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1827 cpu_relax();
1828
3b30acf6 1829 j = inb(wkport + 0x57);
1da177e4
LT		 1830 if (j != 0x16) {
1831 if (j == 0x4e) {
1832 goto u3p_out;
1833 }
1834 continue;
1835 }
1836 if (mbuf[0] != 0x01) {
1837 goto chg_wide;
1838 }
1839 if (mbuf[1] != 0x06) {
1840 goto chg_wide;
1841 }
1842 if (mbuf[2] != 0x04) {
1843 goto chg_wide;
1844 }
1845 if (mbuf[3] == 0x09) {
1846 m = 1;
1847 m = m << i;
1848 dev->wide_id[0] |= m;
1849 dev->id[0][i].devsp = 0xce;
1850 continue;
1851 }
1852chg_wide:
3b30acf6
OZ		 1853 outb(0x01, wkport + 0x5b);
1854 outb(satn[0], wkport + 0x43);
1855 outb(satn[1], wkport + 0x44);
1856 outb(satn[2], wkport + 0x45);
1857 outb(satn[3], wkport + 0x46);
1858 outb(satn[4], wkport + 0x47);
1859 outb(satn[5], wkport + 0x48);
1860 outb(0, wkport + 0x4f);
1861 outb(dev->id[0][i].devsp, wkport + 0x51);
1862 outb(0, wkport + 0x52);
1863 outb(satn[6], wkport + 0x53);
1864 outb(satn[7], wkport + 0x54);
1865 outb(satn[8], wkport + 0x58);
1866
1867 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1868 cpu_relax();
1869
3b30acf6 1870 if (inb(wkport + 0x57) != 0x11 && inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1871 continue;
1872
3b30acf6 1873 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1874 cpu_relax();
1875
1876try_wide:
1877 j = 0;
3b30acf6
OZ		 1878 outb(0x05, wkport + 0x54);
1879 outb(0x20, wkport + 0x58);
1880
1881 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1882 if ((inb(wkport + 0x5f) & 0x01) != 0)
1883 outb(wide[j++], wkport + 0x59);
1da177e4 1884 }
3b30acf6 1885 while ((inb(wkport + 0x57) & 0x80) == 0x00)
1da177e4
LT		 1886 cpu_relax();
1887
3b30acf6 1888 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1889 if (j == 0x0f) {
1890 goto widep_in;
1891 }
1892 if (j == 0x0a) {
1893 goto widep_cmd;
1894 }
1895 if (j == 0x0e) {
1896 goto try_wide;
1897 }
1898 continue;
1899widep_out:
3b30acf6
OZ		 1900 outb(0x20, wkport + 0x58);
1901 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1902 if ((inb(wkport + 0x5f) & 0x01) != 0)
1903 outb(0, wkport + 0x59);
1da177e4 1904 }
3b30acf6 1905 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1906 if (j == 0x0f) {
1907 goto widep_in;
1908 }
1909 if (j == 0x0a) {
1910 goto widep_cmd;
1911 }
1912 if (j == 0x0e) {
1913 goto widep_out;
1914 }
1915 continue;
1916widep_in:
3b30acf6
OZ		 1917 outb(0xff, wkport + 0x54);
1918 outb(0x20, wkport + 0x58);
1da177e4
LT		 1919 k = 0;
1920widep_in1:
3b30acf6 1921 j = inb(wkport + 0x5f);
1da177e4 1922 if ((j & 0x01) != 0) {
3b30acf6 1923 mbuf[k++] = inb(wkport + 0x59);
1da177e4
LT		 1924 goto widep_in1;
1925 }
1926 if ((j & 0x80) == 0x00) {
1927 goto widep_in1;
1928 }
3b30acf6 1929 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1930 if (j == 0x0f) {
1931 goto widep_in;
1932 }
1933 if (j == 0x0a) {
1934 goto widep_cmd;
1935 }
1936 if (j == 0x0e) {
1937 goto widep_out;
1938 }
1939 continue;
1940widep_cmd:
3b30acf6
OZ		 1941 outb(0x30, wkport + 0x50);
1942 outb(0x00, wkport + 0x54);
1943 outb(0x08, wkport + 0x58);
1944
1945 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1946 cpu_relax();
1947
3b30acf6 1948 j = inb(wkport + 0x57);
1da177e4
LT		 1949 if (j != 0x16) {
1950 if (j == 0x4e) {
1951 goto widep_out;
1952 }
1953 continue;
1954 }
1955 if (mbuf[0] != 0x01) {
1956 goto not_wide;
1957 }
1958 if (mbuf[1] != 0x02) {
1959 goto not_wide;
1960 }
1961 if (mbuf[2] != 0x03) {
1962 goto not_wide;
1963 }
1964 if (mbuf[3] != 0x01) {
1965 goto not_wide;
1966 }
1967 m = 1;
1968 m = m << i;
1969 dev->wide_id[0] |= m;
1970not_wide:
1971 if ((dev->id[0][i].devtype == 0x00) || (dev->id[0][i].devtype == 0x07) || ((dev->id[0][i].devtype == 0x05) && ((n & 0x10) != 0))) {
1972 m = 1;
1973 m = m << i;
1974 if ((dev->async[0] & m) != 0) {
1975 goto set_sync;
1976 }
1977 }
1978 continue;
1979set_sync:
1980 if (dev->sp[0][i] == 0x02) {
1981 synu[4] = 0x0c;
1982 synuw[4] = 0x0c;
1983 } else {
1984 if (dev->sp[0][i] >= 0x03) {
1985 synu[4] = 0x0a;
1986 synuw[4] = 0x0a;
1987 }
1988 }
1da177e4
LT		 1989 j = 0;
1990 if ((m & dev->wide_id[0]) != 0) {
1991 j |= 0x01;
1992 }
3b30acf6
OZ		 1993 outb(j, wkport + 0x5b);
1994 outb(satn[0], wkport + 0x43);
1995 outb(satn[1], wkport + 0x44);
1996 outb(satn[2], wkport + 0x45);
1997 outb(satn[3], wkport + 0x46);
1998 outb(satn[4], wkport + 0x47);
1999 outb(satn[5], wkport + 0x48);
2000 outb(0, wkport + 0x4f);
2001 outb(dev->id[0][i].devsp, wkport + 0x51);
2002 outb(0, wkport + 0x52);
2003 outb(satn[6], wkport + 0x53);
2004 outb(satn[7], wkport + 0x54);
2005 outb(satn[8], wkport + 0x58);
2006
2007 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 2008 cpu_relax();
2009
3b30acf6 2010 if ((inb(wkport + 0x57) != 0x11) && (inb(wkport + 0x57) != 0x8e)) {
1da177e4
LT		 2011 continue;
2012 }
3b30acf6 2013 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 2014 cpu_relax();
2015
2016try_sync:
2017 j = 0;
3b30acf6
OZ		 2018 outb(0x06, wkport + 0x54);
2019 outb(0x20, wkport + 0x58);
2020
2021 while ((inb(wkport + 0x5f) & 0x80) == 0) {
2022 if ((inb(wkport + 0x5f) & 0x01) != 0) {
1da177e4
LT		 2023 if ((m & dev->wide_id[0]) != 0) {
2024 if ((m & dev->ultra_map[0]) != 0) {
3b30acf6 2025 outb(synuw[j++], wkport + 0x59);
1da177e4 2026 } else {
3b30acf6 2027 outb(synw[j++], wkport + 0x59);
1da177e4
LT		 2028 }
2029 } else {
2030 if ((m & dev->ultra_map[0]) != 0) {
3b30acf6 2031 outb(synu[j++], wkport + 0x59);
1da177e4 2032 } else {
3b30acf6 2033 outb(synn[j++], wkport + 0x59);
1da177e4
LT		 2034 }
2035 }
1da177e4
LT		 2036 }
2037 }
1da177e4 2038
3b30acf6 2039 while ((inb(wkport + 0x57) & 0x80) == 0x00)
1da177e4
LT		 2040 cpu_relax();
2041
3b30acf6 2042 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 2043 if (j == 0x0f) {
2044 goto phase_ins;
2045 }
2046 if (j == 0x0a) {
2047 goto phase_cmds;
2048 }
2049 if (j == 0x0e) {
2050 goto try_sync;
2051 }
2052 continue;
2053phase_outs:
3b30acf6
OZ		 2054 outb(0x20, wkport + 0x58);
2055 while ((inb(wkport + 0x5f) & 0x80) == 0x00) {
2056 if ((inb(wkport + 0x5f) & 0x01) != 0x00)
2057 outb(0x00, wkport + 0x59);
1da177e4 2058 }
3b30acf6 2059 j = inb(wkport + 0x57);
1da177e4
LT		 2060 if (j == 0x85) {
2061 goto tar_dcons;
2062 }
2063 j &= 0x0f;
2064 if (j == 0x0f) {
2065 goto phase_ins;
2066 }
2067 if (j == 0x0a) {
2068 goto phase_cmds;
2069 }
2070 if (j == 0x0e) {
2071 goto phase_outs;
2072 }
2073 continue;
2074phase_ins:
3b30acf6
OZ		 2075 outb(0x06, wkport + 0x54);
2076 outb(0x20, wkport + 0x58);
1da177e4
LT		 2077 k = 0;
2078phase_ins1:
3b30acf6 2079 j = inb(wkport + 0x5f);
1da177e4 2080 if ((j & 0x01) != 0x00) {
3b30acf6 2081 mbuf[k++] = inb(wkport + 0x59);
1da177e4
LT		 2082 goto phase_ins1;
2083 }
2084 if ((j & 0x80) == 0x00) {
2085 goto phase_ins1;
2086 }
1da177e4 2087
3b30acf6 2088 while ((inb(wkport + 0x57) & 0x80) == 0x00)
1da177e4
LT		 2089 cpu_relax();
2090
3b30acf6 2091 j = inb(wkport + 0x57);
1da177e4
LT		 2092 if (j == 0x85) {
2093 goto tar_dcons;
2094 }
2095 j &= 0x0f;
2096 if (j == 0x0f) {
2097 goto phase_ins;
2098 }
2099 if (j == 0x0a) {
2100 goto phase_cmds;
2101 }
2102 if (j == 0x0e) {
2103 goto phase_outs;
2104 }
2105 continue;
2106phase_cmds:
3b30acf6 2107 outb(0x30, wkport + 0x50);
1da177e4 2108tar_dcons:
3b30acf6
OZ		 2109 outb(0x00, wkport + 0x54);
2110 outb(0x08, wkport + 0x58);
1da177e4 2111
3b30acf6 2112 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 2113 cpu_relax();
2114
3b30acf6 2115 j = inb(wkport + 0x57);
1da177e4
LT		 2116 if (j != 0x16) {
2117 continue;
2118 }
2119 if (mbuf[0] != 0x01) {
2120 continue;
2121 }
2122 if (mbuf[1] != 0x03) {
2123 continue;
2124 }
2125 if (mbuf[4] == 0x00) {
2126 continue;
2127 }
2128 if (mbuf[3] > 0x64) {
2129 continue;
2130 }
2131 if (mbuf[4] > 0x0e) {
2132 mbuf[4] = 0x0e;
2133 }
2134 dev->id[0][i].devsp = mbuf[4];
2135 if (mbuf[3] < 0x0c) {
2136 j = 0xb0;
2137 goto set_syn_ok;
2138 }
2139 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
2140 j = 0xa0;
2141 goto set_syn_ok;
2142 }
2143 if (mbuf[3] < 0x1a) {
2144 j = 0x20;
2145 goto set_syn_ok;
2146 }
2147 if (mbuf[3] < 0x33) {
2148 j = 0x40;
2149 goto set_syn_ok;
2150 }
2151 if (mbuf[3] < 0x4c) {
2152 j = 0x50;
2153 goto set_syn_ok;
2154 }
2155 j = 0x60;
2156set_syn_ok:
2157 dev->id[0][i].devsp = (dev->id[0][i].devsp & 0x0f) | j;
2158 }
2159}
2160
2161static void atp870u_free_tables(struct Scsi_Host *host)
2162{
2163 struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
2164 int j, k;
2165 for (j=0; j < 2; j++) {
2166 for (k = 0; k < 16; k++) {
2167 if (!atp_dev->id[j][k].prd_table)
2168 continue;
b5683557 2169 pci_free_consistent(atp_dev->pdev, 1024, atp_dev->id[j][k].prd_table, atp_dev->id[j][k].prd_bus);
1da177e4
LT		 2170 atp_dev->id[j][k].prd_table = NULL;
2171 }
2172 }
2173}
2174
2175static int atp870u_init_tables(struct Scsi_Host *host)
2176{
2177 struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
2178 int c,k;
2179 for(c=0;c < 2;c++) {
2180 for(k=0;k<16;k++) {
b5683557 2181 atp_dev->id[c][k].prd_table = pci_alloc_consistent(atp_dev->pdev, 1024, &(atp_dev->id[c][k].prd_bus));
1da177e4
LT		 2182 if (!atp_dev->id[c][k].prd_table) {
2183 printk("atp870u_init_tables fail\n");
2184 atp870u_free_tables(host);
2185 return -ENOMEM;
2186 }
b5683557 2187 atp_dev->id[c][k].prdaddr = atp_dev->id[c][k].prd_bus;
1da177e4
LT		 2188 atp_dev->id[c][k].devsp=0x20;
2189 atp_dev->id[c][k].devtype = 0x7f;
2190 atp_dev->id[c][k].curr_req = NULL;
2191 }
2192
2193 atp_dev->active_id[c] = 0;
2194 atp_dev->wide_id[c] = 0;
2195 atp_dev->host_id[c] = 0x07;
2196 atp_dev->quhd[c] = 0;
2197 atp_dev->quend[c] = 0;
2198 atp_dev->last_cmd[c] = 0xff;
2199 atp_dev->in_snd[c] = 0;
2200 atp_dev->in_int[c] = 0;
2201
2202 for (k = 0; k < qcnt; k++) {
2203 atp_dev->quereq[c][k] = NULL;
2204 }
2205 for (k = 0; k < 16; k++) {
2206 atp_dev->id[c][k].curr_req = NULL;
2207 atp_dev->sp[c][k] = 0x04;
2208 }
2209 }
2210 return 0;
2211}
2212
2213/* return non-zero on detection */
2214static int atp870u_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2215{
2216 unsigned char k, m, c;
2217 unsigned long flags;
493c5201 2218 unsigned int base_io, error,n;
1da177e4
LT		 2219 unsigned char host_id;
2220 struct Scsi_Host *shpnt = NULL;
dc6a78f1 2221 struct atp_unit *atpdev, *p;
1da177e4
LT		 2222 unsigned char setupdata[2][16];
2223 int count = 0;
dc6a78f1
RD		 2224
2225 atpdev = kzalloc(sizeof(*atpdev), GFP_KERNEL);
2226 if (!atpdev)
2227 return -ENOMEM;
2228
1da177e4 2229 if (pci_enable_device(pdev))
dc6a78f1 2230 goto err_eio;
1da177e4 2231
284901a9 2232 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1da177e4
LT		 2233 printk(KERN_INFO "atp870u: use 32bit DMA mask.\n");
2234 } else {
2235 printk(KERN_ERR "atp870u: DMA mask required but not available.\n");
dc6a78f1 2236 goto err_eio;
1da177e4
LT		 2237 }
2238
1da177e4
LT		 2239 /*
2240 * It's probably easier to weed out some revisions like
2241 * this than via the PCI device table
2242 */
2243 if (ent->device == PCI_DEVICE_ID_ARTOP_AEC7610) {
7d7311c4 2244 atpdev->chip_ver = pdev->revision;
dc6a78f1
RD		 2245 if (atpdev->chip_ver < 2)
2246 goto err_eio;
1da177e4
LT		 2247 }
2248
2249 switch (ent->device) {
2250 case PCI_DEVICE_ID_ARTOP_AEC7612UW:
2251 case PCI_DEVICE_ID_ARTOP_AEC7612SUW:
2252 case ATP880_DEVID1:
2253 case ATP880_DEVID2:
2254 case ATP885_DEVID:
dc6a78f1 2255 atpdev->chip_ver = 0x04;
1da177e4
LT		 2256 default:
2257 break;
2258 }
2259 base_io = pci_resource_start(pdev, 0);
2260 base_io &= 0xfffffff8;
dc6a78f1 2261
1da177e4 2262 if ((ent->device == ATP880_DEVID1)||(ent->device == ATP880_DEVID2)) {
7d7311c4 2263 atpdev->chip_ver = pdev->revision;
1da177e4
LT		 2264 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);//JCC082803
2265
2266 host_id = inb(base_io + 0x39);
2267 host_id >>= 0x04;
2268
2269 printk(KERN_INFO " ACARD AEC-67160 PCI Ultra3 LVD Host Adapter: %d"
2270 " IO:%x, IRQ:%d.\n", count, base_io, pdev->irq);
dc6a78f1
RD		 2271 atpdev->ioport[0] = base_io + 0x40;
2272 atpdev->pciport[0] = base_io + 0x28;
2273 atpdev->dev_id = ent->device;
2274 atpdev->host_id[0] = host_id;
1da177e4 2275
493c5201
OZ		 2276 atpdev->scam_on = inb(base_io + 0x22);
2277 atpdev->global_map[0] = inb(base_io + 0x35);
2278 atpdev->ultra_map[0] = inw(base_io + 0x3c);
1da177e4
LT		 2279
2280 n = 0x3f09;
2281next_fblk_880:
2282 if (n >= 0x4000)
2283 goto flash_ok_880;
2284
2285 m = 0;
2286 outw(n, base_io + 0x34);
2287 n += 0x0002;
2288 if (inb(base_io + 0x30) == 0xff)
2289 goto flash_ok_880;
2290
dc6a78f1
RD		 2291 atpdev->sp[0][m++] = inb(base_io + 0x30);
2292 atpdev->sp[0][m++] = inb(base_io + 0x31);
2293 atpdev->sp[0][m++] = inb(base_io + 0x32);
2294 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 2295 outw(n, base_io + 0x34);
2296 n += 0x0002;
dc6a78f1
RD		 2297 atpdev->sp[0][m++] = inb(base_io + 0x30);
2298 atpdev->sp[0][m++] = inb(base_io + 0x31);
2299 atpdev->sp[0][m++] = inb(base_io + 0x32);
2300 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 2301 outw(n, base_io + 0x34);
2302 n += 0x0002;
dc6a78f1
RD		 2303 atpdev->sp[0][m++] = inb(base_io + 0x30);
2304 atpdev->sp[0][m++] = inb(base_io + 0x31);
2305 atpdev->sp[0][m++] = inb(base_io + 0x32);
2306 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 2307 outw(n, base_io + 0x34);
2308 n += 0x0002;
dc6a78f1
RD		 2309 atpdev->sp[0][m++] = inb(base_io + 0x30);
2310 atpdev->sp[0][m++] = inb(base_io + 0x31);
2311 atpdev->sp[0][m++] = inb(base_io + 0x32);
2312 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 2313 n += 0x0018;
2314 goto next_fblk_880;
2315flash_ok_880:
2316 outw(0, base_io + 0x34);
dc6a78f1
RD		 2317 atpdev->ultra_map[0] = 0;
2318 atpdev->async[0] = 0;
1da177e4
LT		 2319 for (k = 0; k < 16; k++) {
2320 n = 1;
2321 n = n << k;
dc6a78f1
RD		 2322 if (atpdev->sp[0][k] > 1) {
2323 atpdev->ultra_map[0] |= n;
1da177e4 2324 } else {
dc6a78f1
RD		 2325 if (atpdev->sp[0][k] == 0)
2326 atpdev->async[0] |= n;
1da177e4
LT		 2327 }
2328 }
dc6a78f1
RD		 2329 atpdev->async[0] = ~(atpdev->async[0]);
2330 outb(atpdev->global_map[0], base_io + 0x35);
1da177e4
LT		 2331
2332 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
2333 if (!shpnt)
dc6a78f1 2334 goto err_nomem;
1da177e4
LT		 2335
2336 p = (struct atp_unit *)&shpnt->hostdata;
2337
dc6a78f1
RD		 2338 atpdev->host = shpnt;
2339 atpdev->pdev = pdev;
1da177e4 2340 pci_set_drvdata(pdev, p);
dc6a78f1 2341 memcpy(p, atpdev, sizeof(*atpdev));
1da177e4
LT		 2342 if (atp870u_init_tables(shpnt) < 0) {
2343 printk(KERN_ERR "Unable to allocate tables for Acard controller\n");
2344 goto unregister;
2345 }
2346
1d6f359a 2347 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp880i", shpnt)) {
1da177e4
LT		 2348 printk(KERN_ERR "Unable to allocate IRQ%d for Acard controller.\n", pdev->irq);
2349 goto free_tables;
2350 }
2351
2352 spin_lock_irqsave(shpnt->host_lock, flags);
493c5201
OZ		 2353 k = inb(base_io + 0x38) & 0x80;
2354 outb(k, base_io + 0x38);
2355 outb(0x20, base_io + 0x3b);
1da177e4 2356 mdelay(32);
493c5201 2357 outb(0, base_io + 0x3b);
1da177e4 2358 mdelay(32);
493c5201
OZ		 2359 inb(base_io + 0x5b);
2360 inb(base_io + 0x57);
2361 outb((host_id | 0x08), base_io + 0x40);
2362 outb(0, base_io + 0x58);
2363 while ((inb(base_io + 0x5f) & 0x80) == 0)
1da177e4 2364 mdelay(1);
493c5201
OZ		 2365 inb(base_io + 0x57);
2366 outb(8, base_io + 0x41);
2367 outb(0x7f, base_io + 0x42);
2368 outb(0x20, base_io + 0x51);
1da177e4
LT		 2369
2370 tscam(shpnt);
2371 is880(p, base_io);
493c5201 2372 outb(0xb0, base_io + 0x38);
1da177e4
LT		 2373 shpnt->max_id = 16;
2374 shpnt->this_id = host_id;
2375 shpnt->unique_id = base_io;
2376 shpnt->io_port = base_io;
2377 shpnt->n_io_port = 0x60; /* Number of bytes of I/O space used */
2378 shpnt->irq = pdev->irq;
2379 } else if (ent->device == ATP885_DEVID) {
2380 printk(KERN_INFO " ACARD AEC-67162 PCI Ultra3 LVD Host Adapter: IO:%x, IRQ:%d.\n"
2381 , base_io, pdev->irq);
2382
dc6a78f1
RD		 2383 atpdev->pdev = pdev;
2384 atpdev->dev_id = ent->device;
2385 atpdev->baseport = base_io;
2386 atpdev->ioport[0] = base_io + 0x80;
2387 atpdev->ioport[1] = base_io + 0xc0;
2388 atpdev->pciport[0] = base_io + 0x40;
2389 atpdev->pciport[1] = base_io + 0x50;
1da177e4
LT		 2390
2391 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
2392 if (!shpnt)
dc6a78f1 2393 goto err_nomem;
1da177e4
LT		 2394
2395 p = (struct atp_unit *)&shpnt->hostdata;
2396
dc6a78f1
RD		 2397 atpdev->host = shpnt;
2398 atpdev->pdev = pdev;
1da177e4 2399 pci_set_drvdata(pdev, p);
dc6a78f1 2400 memcpy(p, atpdev, sizeof(struct atp_unit));
1da177e4
LT		 2401 if (atp870u_init_tables(shpnt) < 0)
2402 goto unregister;
2403
2404#ifdef ED_DBGP
2405 printk("request_irq() shpnt %p hostdata %p\n", shpnt, p);
2406#endif
1d6f359a 2407 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp870u", shpnt)) {
1da177e4
LT		 2408 printk(KERN_ERR "Unable to allocate IRQ for Acard controller.\n");
2409 goto free_tables;
2410 }
2411
2412 spin_lock_irqsave(shpnt->host_lock, flags);
2413
2414 c=inb(base_io + 0x29);
2415 outb((c | 0x04),base_io + 0x29);
2416
2417 n=0x1f80;
2418next_fblk_885:
2419 if (n >= 0x2000) {
2420 goto flash_ok_885;
2421 }
2422 outw(n,base_io + 0x3c);
2423 if (inl(base_io + 0x38) == 0xffffffff) {
2424 goto flash_ok_885;
2425 }
2426 for (m=0; m < 2; m++) {
2427 p->global_map[m]= 0;
2428 for (k=0; k < 4; k++) {
2429 outw(n++,base_io + 0x3c);
2430 ((unsigned long *)&setupdata[m][0])[k]=inl(base_io + 0x38);
2431 }
2432 for (k=0; k < 4; k++) {
2433 outw(n++,base_io + 0x3c);
2434 ((unsigned long *)&p->sp[m][0])[k]=inl(base_io + 0x38);
2435 }
2436 n += 8;
2437 }
2438 goto next_fblk_885;
2439flash_ok_885:
2440#ifdef ED_DBGP
2441 printk( "Flash Read OK\n");
2442#endif
2443 c=inb(base_io + 0x29);
2444 outb((c & 0xfb),base_io + 0x29);
2445 for (c=0;c < 2;c++) {
2446 p->ultra_map[c]=0;
2447 p->async[c] = 0;
2448 for (k=0; k < 16; k++) {
2449 n=1;
2450 n = n << k;
2451 if (p->sp[c][k] > 1) {
2452 p->ultra_map[c] |= n;
2453 } else {
2454 if (p->sp[c][k] == 0) {
2455 p->async[c] |= n;
2456 }
2457 }
2458 }
2459 p->async[c] = ~(p->async[c]);
2460
2461 if (p->global_map[c] == 0) {
2462 k=setupdata[c][1];
2463 if ((k & 0x40) != 0)
2464 p->global_map[c] |= 0x20;
2465 k &= 0x07;
2466 p->global_map[c] |= k;
2467 if ((setupdata[c][2] & 0x04) != 0)
2468 p->global_map[c] |= 0x08;
2469 p->host_id[c] = setupdata[c][0] & 0x07;
2470 }
2471 }
2472
2473 k = inb(base_io + 0x28) & 0x8f;
2474 k |= 0x10;
2475 outb(k, base_io + 0x28);
2476 outb(0x80, base_io + 0x41);
2477 outb(0x80, base_io + 0x51);
2478 mdelay(100);
2479 outb(0, base_io + 0x41);
2480 outb(0, base_io + 0x51);
2481 mdelay(1000);
2482 inb(base_io + 0x9b);
2483 inb(base_io + 0x97);
2484 inb(base_io + 0xdb);
2485 inb(base_io + 0xd7);
1da177e4
LT		 2486 k=p->host_id[0];
2487 if (k > 7)
2488 k = (k & 0x07) | 0x40;
2489 k |= 0x08;
493c5201
OZ		 2490 outb(k, base_io + 0x80);
2491 outb(0, base_io + 0x98);
1da177e4 2492
493c5201 2493 while ((inb(base_io + 0x9f) & 0x80) == 0)
1da177e4
LT		 2494 cpu_relax();
2495
493c5201
OZ		 2496 inb(base_io + 0x97);
2497 outb(8, base_io + 0x81);
2498 outb(0x7f, base_io + 0x82);
2499 outb(0x20, base_io + 0x91);
2500
1da177e4
LT		 2501 k=p->host_id[1];
2502 if (k > 7)
2503 k = (k & 0x07) | 0x40;
2504 k |= 0x08;
493c5201
OZ		 2505 outb(k, base_io + 0xc0);
2506 outb(0, base_io + 0xd8);
1da177e4 2507
493c5201 2508 while ((inb(base_io + 0xdf) & 0x80) == 0)
1da177e4
LT		 2509 cpu_relax();
2510
493c5201
OZ		 2511 inb(base_io + 0xd7);
2512 outb(8, base_io + 0xc1);
2513 outb(0x7f, base_io + 0xc2);
2514 outb(0x20, base_io + 0xd1);
1da177e4
LT		 2515
2516 tscam_885();
2517 printk(KERN_INFO " Scanning Channel A SCSI Device ...\n");
2518 is885(p, base_io + 0x80, 0);
2519 printk(KERN_INFO " Scanning Channel B SCSI Device ...\n");
2520 is885(p, base_io + 0xc0, 1);
2521
2522 k = inb(base_io + 0x28) & 0xcf;
2523 k |= 0xc0;
2524 outb(k, base_io + 0x28);
2525 k = inb(base_io + 0x1f) | 0x80;
2526 outb(k, base_io + 0x1f);
2527 k = inb(base_io + 0x29) | 0x01;
2528 outb(k, base_io + 0x29);
2529#ifdef ED_DBGP
2530 //printk("atp885: atp_host[0] 0x%p\n", atp_host[0]);
2531#endif
2532 shpnt->max_id = 16;
2533 shpnt->max_lun = (p->global_map[0] & 0x07) + 1;
2534 shpnt->max_channel = 1;
2535 shpnt->this_id = p->host_id[0];
2536 shpnt->unique_id = base_io;
2537 shpnt->io_port = base_io;
2538 shpnt->n_io_port = 0xff; /* Number of bytes of I/O space used */
2539 shpnt->irq = pdev->irq;
2540
2541 } else {
2542 error = pci_read_config_byte(pdev, 0x49, &host_id);
2543
2544 printk(KERN_INFO " ACARD AEC-671X PCI Ultra/W SCSI-2/3 Host Adapter: %d "
2545 "IO:%x, IRQ:%d.\n", count, base_io, pdev->irq);
2546
dc6a78f1
RD		 2547 atpdev->ioport[0] = base_io;
2548 atpdev->pciport[0] = base_io + 0x20;
2549 atpdev->dev_id = ent->device;
1da177e4 2550 host_id &= 0x07;
dc6a78f1 2551 atpdev->host_id[0] = host_id;
493c5201
OZ		 2552 atpdev->scam_on = inb(base_io + 0x22);
2553 atpdev->global_map[0] = inb(base_io + 0x2d);
2554 atpdev->ultra_map[0] = inw(base_io + 0x2e);
1da177e4 2555
dc6a78f1
RD		 2556 if (atpdev->ultra_map[0] == 0) {
2557 atpdev->scam_on = 0x00;
2558 atpdev->global_map[0] = 0x20;
2559 atpdev->ultra_map[0] = 0xffff;
1da177e4
LT		 2560 }
2561
2562 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
2563 if (!shpnt)
dc6a78f1 2564 goto err_nomem;
1da177e4
LT		 2565
2566 p = (struct atp_unit *)&shpnt->hostdata;
2567
dc6a78f1
RD		 2568 atpdev->host = shpnt;
2569 atpdev->pdev = pdev;
1da177e4 2570 pci_set_drvdata(pdev, p);
dc6a78f1 2571 memcpy(p, atpdev, sizeof(*atpdev));
1da177e4
LT		 2572 if (atp870u_init_tables(shpnt) < 0)
2573 goto unregister;
2574
1d6f359a 2575 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp870i", shpnt)) {
1da177e4
LT		 2576 printk(KERN_ERR "Unable to allocate IRQ%d for Acard controller.\n", pdev->irq);
2577 goto free_tables;
2578 }
2579
2580 spin_lock_irqsave(shpnt->host_lock, flags);
dc6a78f1 2581 if (atpdev->chip_ver > 0x07) { /* check if atp876 chip then enable terminator */
493c5201 2582 outb(0x00, base_io + 0x3e);
1da177e4
LT		 2583 }
2584
493c5201
OZ		 2585 k = (inb(base_io + 0x3a) & 0xf3) | 0x10;
2586 outb(k, base_io + 0x3a);
2587 outb((k & 0xdf), base_io + 0x3a);
1da177e4 2588 mdelay(32);
493c5201 2589 outb(k, base_io + 0x3a);
1da177e4 2590 mdelay(32);
493c5201
OZ		 2591 outb((host_id | 0x08), base_io + 0);
2592 outb(0, base_io + 0x18);
2593 while ((inb(base_io + 0x1f) & 0x80) == 0)
1da177e4
LT		 2594 mdelay(1);
2595
493c5201
OZ		 2596 inb(base_io + 0x17);
2597 outb(8, base_io + 1);
2598 outb(0x7f, base_io + 2);
2599 outb(0x20, base_io + 0x11);
1da177e4
LT		 2600
2601 tscam(shpnt);
2602 is870(p, base_io);
493c5201
OZ		 2603 outb((inb(base_io + 0x3a) & 0xef), base_io + 0x3a);
2604 outb((inb(base_io + 0x3b) | 0x20), base_io + 0x3b);
dc6a78f1 2605 if (atpdev->chip_ver == 4)
1da177e4
LT		 2606 shpnt->max_id = 16;
2607 else
2b89dad0 2608 shpnt->max_id = 8;
1da177e4
LT		 2609 shpnt->this_id = host_id;
2610 shpnt->unique_id = base_io;
2611 shpnt->io_port = base_io;
2612 shpnt->n_io_port = 0x40; /* Number of bytes of I/O space used */
2613 shpnt->irq = pdev->irq;
2614 }
2615 spin_unlock_irqrestore(shpnt->host_lock, flags);
2616 if(ent->device==ATP885_DEVID) {
2617 if(!request_region(base_io, 0xff, "atp870u")) /* Register the IO ports that we use */
2618 goto request_io_fail;
2619 } else if((ent->device==ATP880_DEVID1)||(ent->device==ATP880_DEVID2)) {
2620 if(!request_region(base_io, 0x60, "atp870u")) /* Register the IO ports that we use */
2621 goto request_io_fail;
2622 } else {
2623 if(!request_region(base_io, 0x40, "atp870u")) /* Register the IO ports that we use */
2624 goto request_io_fail;
2625 }
2626 count++;
2627 if (scsi_add_host(shpnt, &pdev->dev))
2628 goto scsi_add_fail;
2629 scsi_scan_host(shpnt);
2630#ifdef ED_DBGP
2631 printk("atp870u_prob : exit\n");
2632#endif
2633 return 0;
2634
2635scsi_add_fail:
2636 printk("atp870u_prob:scsi_add_fail\n");
2637 if(ent->device==ATP885_DEVID) {
2638 release_region(base_io, 0xff);
2639 } else if((ent->device==ATP880_DEVID1)||(ent->device==ATP880_DEVID2)) {
2640 release_region(base_io, 0x60);
2641 } else {
2642 release_region(base_io, 0x40);
2643 }
2644request_io_fail:
2645 printk("atp870u_prob:request_io_fail\n");
2646 free_irq(pdev->irq, shpnt);
2647free_tables:
2648 printk("atp870u_prob:free_table\n");
2649 atp870u_free_tables(shpnt);
2650unregister:
2651 printk("atp870u_prob:unregister\n");
2652 scsi_host_put(shpnt);
2653 return -1;
dc6a78f1
RD		 2654err_eio:
2655 kfree(atpdev);
2656 return -EIO;
2657err_nomem:
2658 kfree(atpdev);
2659 return -ENOMEM;
1da177e4
LT		 2660}
2661
2662/* The abort command does not leave the device in a clean state where
2663 it is available to be used again. Until this gets worked out, we will
2664 leave it commented out. */
2665
2666static int atp870u_abort(struct scsi_cmnd * SCpnt)
2667{
2668 unsigned char j, k, c;
2669 struct scsi_cmnd *workrequ;
1da177e4
LT		 2670 struct atp_unit *dev;
2671 struct Scsi_Host *host;
2672 host = SCpnt->device->host;
2673
2674 dev = (struct atp_unit *)&host->hostdata;
422c0d61 2675 c = scmd_channel(SCpnt);
1da177e4
LT		 2676 printk(" atp870u: abort Channel = %x \n", c);
2677 printk("working=%x last_cmd=%x ", dev->working[c], dev->last_cmd[c]);
2678 printk(" quhdu=%x quendu=%x ", dev->quhd[c], dev->quend[c]);
1da177e4 2679 for (j = 0; j < 0x18; j++) {
2eabdf22 2680 printk(" r%2x=%2x", j, inb(dev->ioport[c] + j));
1da177e4 2681 }
2eabdf22
OZ		 2682 printk(" r1c=%2x", inb(dev->ioport[c] + 0x1c));
2683 printk(" r1f=%2x in_snd=%2x ", inb(dev->ioport[c] + 0x1f), dev->in_snd[c]);
2684 printk(" d00=%2x", inb(dev->pciport[c]));
2685 printk(" d02=%2x", inb(dev->pciport[c] + 0x02));
1da177e4
LT		 2686 for(j=0;j<16;j++) {
2687 if (dev->id[c][j].curr_req != NULL) {
2688 workrequ = dev->id[c][j].curr_req;
2689 printk("\n que cdb= ");
2690 for (k=0; k < workrequ->cmd_len; k++) {
2691 printk(" %2x ",workrequ->cmnd[k]);
2692 }
2693 printk(" last_lenu= %x ",(unsigned int)dev->id[c][j].last_len);
2694 }
2695 }
2696 return SUCCESS;
2697}
2698
2699static const char *atp870u_info(struct Scsi_Host *notused)
2700{
2701 static char buffer[128];
2702
2703 strcpy(buffer, "ACARD AEC-6710/6712/67160 PCI Ultra/W/LVD SCSI-3 Adapter Driver V2.6+ac ");
2704
2705 return buffer;
2706}
2707
d773e422 2708static int atp870u_show_info(struct seq_file *m, struct Scsi_Host *HBAptr)
1da177e4 2709{
3d30079c
RV		 2710 seq_puts(m, "ACARD AEC-671X Driver Version: 2.6+ac\n\n"
2711 "Adapter Configuration:\n");
d773e422
AV		 2712 seq_printf(m, " Base IO: %#.4lx\n", HBAptr->io_port);
2713 seq_printf(m, " IRQ: %d\n", HBAptr->irq);
2714 return 0;
1da177e4
LT		 2715}
2716
2717
2718static int atp870u_biosparam(struct scsi_device *disk, struct block_device *dev,
2719 sector_t capacity, int *ip)
2720{
2721 int heads, sectors, cylinders;
2722
2723 heads = 64;
2724 sectors = 32;
2725 cylinders = (unsigned long)capacity / (heads * sectors);
2726 if (cylinders > 1024) {
2727 heads = 255;
2728 sectors = 63;
2729 cylinders = (unsigned long)capacity / (heads * sectors);
2730 }
2731 ip[0] = heads;
2732 ip[1] = sectors;
2733 ip[2] = cylinders;
2734
2735 return 0;
2736}
2737
2738static void atp870u_remove (struct pci_dev *pdev)
2739{
2740 struct atp_unit *devext = pci_get_drvdata(pdev);
2741 struct Scsi_Host *pshost = devext->host;
2742
2743
2744 scsi_remove_host(pshost);
2745 printk(KERN_INFO "free_irq : %d\n",pshost->irq);
2746 free_irq(pshost->irq, pshost);
2747 release_region(pshost->io_port, pshost->n_io_port);
2748 printk(KERN_INFO "atp870u_free_tables : %p\n",pshost);
2749 atp870u_free_tables(pshost);
2750 printk(KERN_INFO "scsi_host_put : %p\n",pshost);
2751 scsi_host_put(pshost);
1da177e4
LT		 2752}
2753MODULE_LICENSE("GPL");
2754
2755static struct scsi_host_template atp870u_template = {
2756 .module = THIS_MODULE,
2757 .name = "atp870u" /* name */,
2758 .proc_name = "atp870u",
d773e422 2759 .show_info = atp870u_show_info,
1da177e4
LT		 2760 .info = atp870u_info /* info */,
2761 .queuecommand = atp870u_queuecommand /* queuecommand */,
2762 .eh_abort_handler = atp870u_abort /* abort */,
2763 .bios_param = atp870u_biosparam /* biosparm */,
2764 .can_queue = qcnt /* can_queue */,
2765 .this_id = 7 /* SCSI ID */,
2766 .sg_tablesize = ATP870U_SCATTER /*SG_ALL*/ /*SG_NONE*/,
1da177e4
LT		 2767 .use_clustering = ENABLE_CLUSTERING,
2768 .max_sectors = ATP870U_MAX_SECTORS,
2769};
2770
2771static struct pci_device_id atp870u_id_table[] = {
2772 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP885_DEVID) },
2773 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID1) },
2774 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID2) },
2775 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7610) },
2776 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612UW) },
2777 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612U) },
2778 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612S) },
2779 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612D) },
2780 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612SUW) },
2781 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_8060) },
2782 { 0, },
2783};
2784
2785MODULE_DEVICE_TABLE(pci, atp870u_id_table);
2786
2787static struct pci_driver atp870u_driver = {
2788 .id_table = atp870u_id_table,
2789 .name = "atp870u",
2790 .probe = atp870u_probe,
6f039790 2791 .remove = atp870u_remove,
1da177e4
LT		 2792};
2793
2794static int __init atp870u_init(void)
2795{
2796#ifdef ED_DBGP
2797 printk("atp870u_init: Entry\n");
2798#endif
2799 return pci_register_driver(&atp870u_driver);
2800}
2801
2802static void __exit atp870u_exit(void)
2803{
2804#ifdef ED_DBGP
2805 printk("atp870u_exit: Entry\n");
2806#endif
2807 pci_unregister_driver(&atp870u_driver);
2808}
2809
2810static void tscam_885(void)
2811{
2812 unsigned char i;
2813
2814 for (i = 0; i < 0x2; i++) {
2815 mdelay(300);
2816 }
2817 return;
2818}
2819
2820
2821
2822static void is885(struct atp_unit *dev, unsigned int wkport,unsigned char c)
2823{
1da177e4
LT		 2824 unsigned char i, j, k, rmb, n, lvdmode;
2825 unsigned short int m;
2826 static unsigned char mbuf[512];
2827 static unsigned char satn[9] = {0, 0, 0, 0, 0, 0, 0, 6, 6};
2828 static unsigned char inqd[9] = {0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6};
2829 static unsigned char synn[6] = {0x80, 1, 3, 1, 0x19, 0x0e};
2830 unsigned char synu[6] = {0x80, 1, 3, 1, 0x0a, 0x0e};
2831 static unsigned char synw[6] = {0x80, 1, 3, 1, 0x19, 0x0e};
2832 unsigned char synuw[6] = {0x80, 1, 3, 1, 0x0a, 0x0e};
2833 static unsigned char wide[6] = {0x80, 1, 2, 3, 1, 0};
2834 static unsigned char u3[9] = { 0x80,1,6,4,0x09,00,0x0e,0x01,0x02 };
2835
2836 lvdmode=inb(wkport + 0x1b) >> 7;
2837
2838 for (i = 0; i < 16; i++) {
2839 m = 1;
2840 m = m << i;
2841 if ((m & dev->active_id[c]) != 0) {
2842 continue;
2843 }
2844 if (i == dev->host_id[c]) {
2845 printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[c]);
2846 continue;
2847 }
e2c22b45
OZ		 2848 outb(0x01, wkport + 0x1b);
2849 outb(0x08, wkport + 0x01);
2850 outb(0x7f, wkport + 0x02);
2851 outb(satn[0], wkport + 0x03);
2852 outb(satn[1], wkport + 0x04);
2853 outb(satn[2], wkport + 0x05);
2854 outb(satn[3], wkport + 0x06);
2855 outb(satn[4], wkport + 0x07);
2856 outb(satn[5], wkport + 0x08);
2857 outb(0, wkport + 0x0f);
2858 outb(dev->id[c][i].devsp, wkport + 0x11);
1da177e4 2859
e2c22b45
OZ		 2860 outb(0, wkport + 0x12);
2861 outb(satn[6], wkport + 0x13);
2862 outb(satn[7], wkport + 0x14);
1da177e4
LT		 2863 j = i;
2864 if ((j & 0x08) != 0) {
2865 j = (j & 0x07) | 0x40;
2866 }
e2c22b45
OZ		 2867 outb(j, wkport + 0x15);
2868 outb(satn[8], wkport + 0x18);
1da177e4 2869
e2c22b45 2870 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2871 cpu_relax();
e2c22b45 2872 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 2873 continue;
2874 }
e2c22b45 2875 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 2876 cpu_relax();
2877 dev->active_id[c] |= m;
2878
e2c22b45
OZ		 2879 outb(0x30, wkport + 0x10);
2880 outb(0x00, wkport + 0x14);
1da177e4
LT		 2881
2882phase_cmd:
e2c22b45
OZ		 2883 outb(0x08, wkport + 0x18);
2884 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2885 cpu_relax();
e2c22b45 2886 j = inb(wkport + 0x17);
1da177e4 2887 if (j != 0x16) {
e2c22b45 2888 outb(0x41, wkport + 0x10);
1da177e4
LT		 2889 goto phase_cmd;
2890 }
2891sel_ok:
e2c22b45
OZ		 2892 outb(inqd[0], wkport + 0x03);
2893 outb(inqd[1], wkport + 0x04);
2894 outb(inqd[2], wkport + 0x05);
2895 outb(inqd[3], wkport + 0x06);
2896 outb(inqd[4], wkport + 0x07);
2897 outb(inqd[5], wkport + 0x08);
2898 outb(0, wkport + 0x0f);
2899 outb(dev->id[c][i].devsp, wkport + 0x11);
2900 outb(0, wkport + 0x12);
2901 outb(inqd[6], wkport + 0x13);
2902 outb(inqd[7], wkport + 0x14);
2903 outb(inqd[8], wkport + 0x18);
2904 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2905 cpu_relax();
e2c22b45 2906 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 2907 continue;
2908 }
e2c22b45 2909 while (inb(wkport + 0x17) != 0x8e)
1da177e4 2910 cpu_relax();
e2c22b45
OZ		 2911 outb(0x00, wkport + 0x1b);
2912 outb(0x08, wkport + 0x18);
1da177e4
LT		 2913 j = 0;
2914rd_inq_data:
e2c22b45 2915 k = inb(wkport + 0x1f);
1da177e4 2916 if ((k & 0x01) != 0) {
e2c22b45 2917 mbuf[j++] = inb(wkport + 0x19);
1da177e4
LT		 2918 goto rd_inq_data;
2919 }
2920 if ((k & 0x80) == 0) {
2921 goto rd_inq_data;
2922 }
e2c22b45 2923 j = inb(wkport + 0x17);
1da177e4
LT		 2924 if (j == 0x16) {
2925 goto inq_ok;
2926 }
e2c22b45
OZ		 2927 outb(0x46, wkport + 0x10);
2928 outb(0, wkport + 0x12);
2929 outb(0, wkport + 0x13);
2930 outb(0, wkport + 0x14);
2931 outb(0x08, wkport + 0x18);
2932 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2933 cpu_relax();
e2c22b45 2934 if (inb(wkport + 0x17) != 0x16) {
1da177e4
LT		 2935 goto sel_ok;
2936 }
2937inq_ok:
2938 mbuf[36] = 0;
2939 printk( KERN_INFO" ID: %2d %s\n", i, &mbuf[8]);
2940 dev->id[c][i].devtype = mbuf[0];
2941 rmb = mbuf[1];
2942 n = mbuf[7];
2943 if ((mbuf[7] & 0x60) == 0) {
2944 goto not_wide;
2945 }
2946 if ((i < 8) && ((dev->global_map[c] & 0x20) == 0)) {
2947 goto not_wide;
2948 }
2949 if (lvdmode == 0) {
2950 goto chg_wide;
2951 }
2952 if (dev->sp[c][i] != 0x04) { // force u2
2953 goto chg_wide;
2954 }
2955
e2c22b45
OZ		 2956 outb(0x01, wkport + 0x1b);
2957 outb(satn[0], wkport + 0x03);
2958 outb(satn[1], wkport + 0x04);
2959 outb(satn[2], wkport + 0x05);
2960 outb(satn[3], wkport + 0x06);
2961 outb(satn[4], wkport + 0x07);
2962 outb(satn[5], wkport + 0x08);
2963 outb(0, wkport + 0x0f);
2964 outb(dev->id[c][i].devsp, wkport + 0x11);
2965 outb(0, wkport + 0x12);
2966 outb(satn[6], wkport + 0x13);
2967 outb(satn[7], wkport + 0x14);
2968 outb(satn[8], wkport + 0x18);
2969
2970 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2971 cpu_relax();
e2c22b45 2972 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 2973 continue;
2974 }
e2c22b45 2975 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 2976 cpu_relax();
2977try_u3:
2978 j = 0;
e2c22b45
OZ		 2979 outb(0x09, wkport + 0x14);
2980 outb(0x20, wkport + 0x18);
2981
2982 while ((inb(wkport + 0x1f) & 0x80) == 0) {
2983 if ((inb(wkport + 0x1f) & 0x01) != 0)
2984 outb(u3[j++], wkport + 0x19);
1da177e4
LT		 2985 cpu_relax();
2986 }
e2c22b45 2987 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4 2988 cpu_relax();
e2c22b45 2989 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 2990 if (j == 0x0f) {
2991 goto u3p_in;
2992 }
2993 if (j == 0x0a) {
2994 goto u3p_cmd;
2995 }
2996 if (j == 0x0e) {
2997 goto try_u3;
2998 }
2999 continue;
3000u3p_out:
e2c22b45
OZ		 3001 outb(0x20, wkport + 0x18);
3002 while ((inb(wkport + 0x1f) & 0x80) == 0) {
3003 if ((inb(wkport + 0x1f) & 0x01) != 0)
3004 outb(0, wkport + 0x19);
1da177e4
LT		 3005 cpu_relax();
3006 }
e2c22b45 3007 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3008 if (j == 0x0f) {
3009 goto u3p_in;
3010 }
3011 if (j == 0x0a) {
3012 goto u3p_cmd;
3013 }
3014 if (j == 0x0e) {
3015 goto u3p_out;
3016 }
3017 continue;
3018u3p_in:
e2c22b45
OZ		 3019 outb(0x09, wkport + 0x14);
3020 outb(0x20, wkport + 0x18);
1da177e4
LT		 3021 k = 0;
3022u3p_in1:
e2c22b45 3023 j = inb(wkport + 0x1f);
1da177e4 3024 if ((j & 0x01) != 0) {
e2c22b45 3025 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 3026 goto u3p_in1;
3027 }
3028 if ((j & 0x80) == 0x00) {
3029 goto u3p_in1;
3030 }
e2c22b45 3031 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3032 if (j == 0x0f) {
3033 goto u3p_in;
3034 }
3035 if (j == 0x0a) {
3036 goto u3p_cmd;
3037 }
3038 if (j == 0x0e) {
3039 goto u3p_out;
3040 }
3041 continue;
3042u3p_cmd:
e2c22b45
OZ		 3043 outb(0x30, wkport + 0x10);
3044 outb(0x00, wkport + 0x14);
3045 outb(0x08, wkport + 0x18);
3046 while ((inb(wkport + 0x1f) & 0x80) == 0x00);
3047 j = inb(wkport + 0x17);
1da177e4
LT		 3048 if (j != 0x16) {
3049 if (j == 0x4e) {
3050 goto u3p_out;
3051 }
3052 continue;
3053 }
3054 if (mbuf[0] != 0x01) {
3055 goto chg_wide;
3056 }
3057 if (mbuf[1] != 0x06) {
3058 goto chg_wide;
3059 }
3060 if (mbuf[2] != 0x04) {
3061 goto chg_wide;
3062 }
3063 if (mbuf[3] == 0x09) {
3064 m = 1;
3065 m = m << i;
3066 dev->wide_id[c] |= m;
3067 dev->id[c][i].devsp = 0xce;
3068#ifdef ED_DBGP
3069 printk("dev->id[%2d][%2d].devsp = %2x\n",c,i,dev->id[c][i].devsp);
3070#endif
3071 continue;
3072 }
3073chg_wide:
e2c22b45
OZ		 3074 outb(0x01, wkport + 0x1b);
3075 outb(satn[0], wkport + 0x03);
3076 outb(satn[1], wkport + 0x04);
3077 outb(satn[2], wkport + 0x05);
3078 outb(satn[3], wkport + 0x06);
3079 outb(satn[4], wkport + 0x07);
3080 outb(satn[5], wkport + 0x08);
3081 outb(0, wkport + 0x0f);
3082 outb(dev->id[c][i].devsp, wkport + 0x11);
3083 outb(0, wkport + 0x12);
3084 outb(satn[6], wkport + 0x13);
3085 outb(satn[7], wkport + 0x14);
3086 outb(satn[8], wkport + 0x18);
3087
3088 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 3089 cpu_relax();
e2c22b45 3090 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 3091 continue;
3092 }
e2c22b45 3093 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 3094 cpu_relax();
3095try_wide:
3096 j = 0;
e2c22b45
OZ		 3097 outb(0x05, wkport + 0x14);
3098 outb(0x20, wkport + 0x18);
3099
3100 while ((inb(wkport + 0x1f) & 0x80) == 0) {
3101 if ((inb(wkport + 0x1f) & 0x01) != 0)
3102 outb(wide[j++], wkport + 0x19);
1da177e4
LT		 3103 cpu_relax();
3104 }
e2c22b45 3105 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4 3106 cpu_relax();
e2c22b45 3107 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3108 if (j == 0x0f) {
3109 goto widep_in;
3110 }
3111 if (j == 0x0a) {
3112 goto widep_cmd;
3113 }
3114 if (j == 0x0e) {
3115 goto try_wide;
3116 }
3117 continue;
3118widep_out:
e2c22b45
OZ		 3119 outb(0x20, wkport + 0x18);
3120 while ((inb(wkport + 0x1f) & 0x80) == 0) {
3121 if ((inb(wkport + 0x1f) & 0x01) != 0)
3122 outb(0, wkport + 0x19);
1da177e4
LT		 3123 cpu_relax();
3124 }
e2c22b45 3125 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3126 if (j == 0x0f) {
3127 goto widep_in;
3128 }
3129 if (j == 0x0a) {
3130 goto widep_cmd;
3131 }
3132 if (j == 0x0e) {
3133 goto widep_out;
3134 }
3135 continue;
3136widep_in:
e2c22b45
OZ		 3137 outb(0xff, wkport + 0x14);
3138 outb(0x20, wkport + 0x18);
1da177e4
LT		 3139 k = 0;
3140widep_in1:
e2c22b45 3141 j = inb(wkport + 0x1f);
1da177e4 3142 if ((j & 0x01) != 0) {
e2c22b45 3143 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 3144 goto widep_in1;
3145 }
3146 if ((j & 0x80) == 0x00) {
3147 goto widep_in1;
3148 }
e2c22b45 3149 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3150 if (j == 0x0f) {
3151 goto widep_in;
3152 }
3153 if (j == 0x0a) {
3154 goto widep_cmd;
3155 }
3156 if (j == 0x0e) {
3157 goto widep_out;
3158 }
3159 continue;
3160widep_cmd:
e2c22b45
OZ		 3161 outb(0x30, wkport + 0x10);
3162 outb(0x00, wkport + 0x14);
3163 outb(0x08, wkport + 0x18);
3164 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 3165 cpu_relax();
e2c22b45 3166 j = inb(wkport + 0x17);
1da177e4
LT		 3167 if (j != 0x16) {
3168 if (j == 0x4e) {
3169 goto widep_out;
3170 }
3171 continue;
3172 }
3173 if (mbuf[0] != 0x01) {
3174 goto not_wide;
3175 }
3176 if (mbuf[1] != 0x02) {
3177 goto not_wide;
3178 }
3179 if (mbuf[2] != 0x03) {
3180 goto not_wide;
3181 }
3182 if (mbuf[3] != 0x01) {
3183 goto not_wide;
3184 }
3185 m = 1;
3186 m = m << i;
3187 dev->wide_id[c] |= m;
3188not_wide:
3189 if ((dev->id[c][i].devtype == 0x00) || (dev->id[c][i].devtype == 0x07) ||
3190 ((dev->id[c][i].devtype == 0x05) && ((n & 0x10) != 0))) {
3191 m = 1;
3192 m = m << i;
3193 if ((dev->async[c] & m) != 0) {
3194 goto set_sync;
3195 }
3196 }
3197 continue;
3198set_sync:
3199 if (dev->sp[c][i] == 0x02) {
3200 synu[4]=0x0c;
3201 synuw[4]=0x0c;
3202 } else {
3203 if (dev->sp[c][i] >= 0x03) {
3204 synu[4]=0x0a;
3205 synuw[4]=0x0a;
3206 }
3207 }
1da177e4
LT		 3208 j = 0;
3209 if ((m & dev->wide_id[c]) != 0) {
3210 j |= 0x01;
3211 }
e2c22b45
OZ		 3212 outb(j, wkport + 0x1b);
3213 outb(satn[0], wkport + 0x03);
3214 outb(satn[1], wkport + 0x04);
3215 outb(satn[2], wkport + 0x05);
3216 outb(satn[3], wkport + 0x06);
3217 outb(satn[4], wkport + 0x07);
3218 outb(satn[5], wkport + 0x08);
3219 outb(0, wkport + 0x0f);
3220 outb(dev->id[c][i].devsp, wkport + 0x11);
3221 outb(0, wkport + 0x12);
3222 outb(satn[6], wkport + 0x13);
3223 outb(satn[7], wkport + 0x14);
3224 outb(satn[8], wkport + 0x18);
3225
3226 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 3227 cpu_relax();
e2c22b45 3228 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 3229 continue;
3230 }
e2c22b45 3231 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 3232 cpu_relax();
3233try_sync:
3234 j = 0;
e2c22b45
OZ		 3235 outb(0x06, wkport + 0x14);
3236 outb(0x20, wkport + 0x18);
3237
3238 while ((inb(wkport + 0x1f) & 0x80) == 0) {
3239 if ((inb(wkport + 0x1f) & 0x01) != 0) {
1da177e4
LT		 3240 if ((m & dev->wide_id[c]) != 0) {
3241 if ((m & dev->ultra_map[c]) != 0) {
e2c22b45 3242 outb(synuw[j++], wkport + 0x19);
1da177e4 3243 } else {
e2c22b45 3244 outb(synw[j++], wkport + 0x19);
1da177e4
LT		 3245 }
3246 } else {
3247 if ((m & dev->ultra_map[c]) != 0) {
e2c22b45 3248 outb(synu[j++], wkport + 0x19);
1da177e4 3249 } else {
e2c22b45 3250 outb(synn[j++], wkport + 0x19);
1da177e4
LT		 3251 }
3252 }
1da177e4
LT		 3253 }
3254 }
e2c22b45 3255 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4 3256 cpu_relax();
e2c22b45 3257 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3258 if (j == 0x0f) {
3259 goto phase_ins;
3260 }
3261 if (j == 0x0a) {
3262 goto phase_cmds;
3263 }
3264 if (j == 0x0e) {
3265 goto try_sync;
3266 }
3267 continue;
3268phase_outs:
e2c22b45
OZ		 3269 outb(0x20, wkport + 0x18);
3270 while ((inb(wkport + 0x1f) & 0x80) == 0x00) {
3271 if ((inb(wkport + 0x1f) & 0x01) != 0x00)
3272 outb(0x00, wkport + 0x19);
1da177e4
LT		 3273 cpu_relax();
3274 }
e2c22b45 3275 j = inb(wkport + 0x17);
1da177e4
LT		 3276 if (j == 0x85) {
3277 goto tar_dcons;
3278 }
3279 j &= 0x0f;
3280 if (j == 0x0f) {
3281 goto phase_ins;
3282 }
3283 if (j == 0x0a) {
3284 goto phase_cmds;
3285 }
3286 if (j == 0x0e) {
3287 goto phase_outs;
3288 }
3289 continue;
3290phase_ins:
e2c22b45
OZ		 3291 outb(0x06, wkport + 0x14);
3292 outb(0x20, wkport + 0x18);
1da177e4
LT		 3293 k = 0;
3294phase_ins1:
e2c22b45 3295 j = inb(wkport + 0x1f);
1da177e4 3296 if ((j & 0x01) != 0x00) {
e2c22b45 3297 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 3298 goto phase_ins1;
3299 }
3300 if ((j & 0x80) == 0x00) {
3301 goto phase_ins1;
3302 }
e2c22b45
OZ		 3303 while ((inb(wkport + 0x17) & 0x80) == 0x00);
3304 j = inb(wkport + 0x17);
1da177e4
LT		 3305 if (j == 0x85) {
3306 goto tar_dcons;
3307 }
3308 j &= 0x0f;
3309 if (j == 0x0f) {
3310 goto phase_ins;
3311 }
3312 if (j == 0x0a) {
3313 goto phase_cmds;
3314 }
3315 if (j == 0x0e) {
3316 goto phase_outs;
3317 }
3318 continue;
3319phase_cmds:
e2c22b45 3320 outb(0x30, wkport + 0x10);
1da177e4 3321tar_dcons:
e2c22b45
OZ		 3322 outb(0x00, wkport + 0x14);
3323 outb(0x08, wkport + 0x18);
3324 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 3325 cpu_relax();
e2c22b45 3326 j = inb(wkport + 0x17);
1da177e4
LT		 3327 if (j != 0x16) {
3328 continue;
3329 }
3330 if (mbuf[0] != 0x01) {
3331 continue;
3332 }
3333 if (mbuf[1] != 0x03) {
3334 continue;
3335 }
3336 if (mbuf[4] == 0x00) {
3337 continue;
3338 }
3339 if (mbuf[3] > 0x64) {
3340 continue;
3341 }
3342 if (mbuf[4] > 0x0e) {
3343 mbuf[4] = 0x0e;
3344 }
3345 dev->id[c][i].devsp = mbuf[4];
3346 if (mbuf[3] < 0x0c){
3347 j = 0xb0;
3348 goto set_syn_ok;
3349 }
3350 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
3351 j = 0xa0;
3352 goto set_syn_ok;
3353 }
3354 if (mbuf[3] < 0x1a) {
3355 j = 0x20;
3356 goto set_syn_ok;
3357 }
3358 if (mbuf[3] < 0x33) {
3359 j = 0x40;
3360 goto set_syn_ok;
3361 }
3362 if (mbuf[3] < 0x4c) {
3363 j = 0x50;
3364 goto set_syn_ok;
3365 }
3366 j = 0x60;
3367 set_syn_ok:
3368 dev->id[c][i].devsp = (dev->id[c][i].devsp & 0x0f) | j;
3369#ifdef ED_DBGP
3370 printk("dev->id[%2d][%2d].devsp = %2x\n",c,i,dev->id[c][i].devsp);
3371#endif
3372 }
e2c22b45 3373 outb(0x80, wkport + 0x16);
1da177e4
LT		 3374}
3375
3376module_init(atp870u_init);
3377module_exit(atp870u_exit);
3378
Linux kernel - Deliverables
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