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e8899fad JG |
1 | /* |
2 | * Copyright (c) 2015 Linaro Ltd. | |
3 | * Copyright (c) 2015 Hisilicon Limited. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | */ | |
11 | ||
12 | #ifndef _HISI_SAS_H_ | |
13 | #define _HISI_SAS_H_ | |
14 | ||
4d558c77 | 15 | #include <linux/acpi.h> |
e8899fad JG |
16 | #include <linux/dmapool.h> |
17 | #include <linux/mfd/syscon.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/of_address.h> | |
e8899fad | 20 | #include <linux/platform_device.h> |
4d558c77 | 21 | #include <linux/property.h> |
e8899fad | 22 | #include <linux/regmap.h> |
6f2ff1a1 | 23 | #include <scsi/sas_ata.h> |
e8899fad JG |
24 | #include <scsi/libsas.h> |
25 | ||
6328d903 | 26 | #define DRV_VERSION "v1.6" |
e8899fad | 27 | |
7eb7869f | 28 | #define HISI_SAS_MAX_PHYS 9 |
6be6de18 JG |
29 | #define HISI_SAS_MAX_QUEUES 32 |
30 | #define HISI_SAS_QUEUE_SLOTS 512 | |
5560e9fb | 31 | #define HISI_SAS_MAX_ITCT_ENTRIES 2048 |
7eb7869f | 32 | #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES |
7eb7869f | 33 | |
6be6de18 JG |
34 | #define HISI_SAS_STATUS_BUF_SZ \ |
35 | (sizeof(struct hisi_sas_err_record) + 1024) | |
36 | #define HISI_SAS_COMMAND_TABLE_SZ \ | |
37 | (((sizeof(union hisi_sas_command_table)+3)/4)*4) | |
38 | ||
42e7a693 | 39 | #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024) |
66ee999b | 40 | #define HISI_SAS_MAX_SMP_RESP_SZ 1028 |
6f2ff1a1 | 41 | #define HISI_SAS_MAX_STP_RESP_SZ 28 |
42e7a693 | 42 | |
98bf39fc JG |
43 | #define DEV_IS_EXPANDER(type) \ |
44 | ((type == SAS_EDGE_EXPANDER_DEVICE) || \ | |
45 | (type == SAS_FANOUT_EXPANDER_DEVICE)) | |
46 | ||
abda97c2 | 47 | struct hisi_hba; |
af740dbe | 48 | |
07d78592 JG |
49 | enum { |
50 | PORT_TYPE_SAS = (1U << 1), | |
51 | PORT_TYPE_SATA = (1U << 0), | |
52 | }; | |
53 | ||
af740dbe JG |
54 | enum dev_status { |
55 | HISI_SAS_DEV_NORMAL, | |
56 | HISI_SAS_DEV_EH, | |
57 | }; | |
abda97c2 | 58 | |
441c2740 JG |
59 | enum { |
60 | HISI_SAS_INT_ABT_CMD = 0, | |
61 | HISI_SAS_INT_ABT_DEV = 1, | |
62 | }; | |
63 | ||
abda97c2 JG |
64 | enum hisi_sas_dev_type { |
65 | HISI_SAS_DEV_TYPE_STP = 0, | |
66 | HISI_SAS_DEV_TYPE_SSP, | |
67 | HISI_SAS_DEV_TYPE_SATA, | |
68 | }; | |
69 | ||
7eb7869f | 70 | struct hisi_sas_phy { |
976867e6 JG |
71 | struct hisi_hba *hisi_hba; |
72 | struct hisi_sas_port *port; | |
7eb7869f | 73 | struct asd_sas_phy sas_phy; |
976867e6 JG |
74 | struct sas_identify identify; |
75 | struct timer_list timer; | |
66139921 | 76 | struct work_struct phyup_ws; |
976867e6 | 77 | u64 port_id; /* from hw */ |
5d74242e | 78 | u64 dev_sas_addr; |
976867e6 JG |
79 | u64 phy_type; |
80 | u64 frame_rcvd_size; | |
81 | u8 frame_rcvd[32]; | |
82 | u8 phy_attached; | |
83 | u8 reserved[3]; | |
84 | enum sas_linkrate minimum_linkrate; | |
85 | enum sas_linkrate maximum_linkrate; | |
7eb7869f JG |
86 | }; |
87 | ||
88 | struct hisi_sas_port { | |
89 | struct asd_sas_port sas_port; | |
976867e6 JG |
90 | u8 port_attached; |
91 | u8 id; /* from hw */ | |
92 | struct list_head list; | |
7eb7869f JG |
93 | }; |
94 | ||
9101a079 JG |
95 | struct hisi_sas_cq { |
96 | struct hisi_hba *hisi_hba; | |
97 | int id; | |
98 | }; | |
99 | ||
af740dbe JG |
100 | struct hisi_sas_device { |
101 | enum sas_device_type dev_type; | |
abda97c2 JG |
102 | struct hisi_hba *hisi_hba; |
103 | struct domain_device *sas_device; | |
104 | u64 attached_phy; | |
af740dbe | 105 | u64 device_id; |
42e7a693 | 106 | u64 running_req; |
af740dbe JG |
107 | u8 dev_status; |
108 | }; | |
109 | ||
6be6de18 | 110 | struct hisi_sas_slot { |
42e7a693 JG |
111 | struct list_head entry; |
112 | struct sas_task *task; | |
113 | struct hisi_sas_port *port; | |
114 | u64 n_elem; | |
115 | int dlvry_queue; | |
116 | int dlvry_queue_slot; | |
27a3f229 JG |
117 | int cmplt_queue; |
118 | int cmplt_queue_slot; | |
42e7a693 | 119 | int idx; |
cac9b2a2 | 120 | int abort; |
42e7a693 JG |
121 | void *cmd_hdr; |
122 | dma_addr_t cmd_hdr_dma; | |
123 | void *status_buffer; | |
124 | dma_addr_t status_buffer_dma; | |
125 | void *command_table; | |
126 | dma_addr_t command_table_dma; | |
127 | struct hisi_sas_sge_page *sge_page; | |
128 | dma_addr_t sge_page_dma; | |
cac9b2a2 | 129 | struct work_struct abort_slot; |
42e7a693 JG |
130 | }; |
131 | ||
132 | struct hisi_sas_tmf_task { | |
133 | u8 tmf; | |
134 | u16 tag_of_task_to_be_managed; | |
6be6de18 JG |
135 | }; |
136 | ||
7eb7869f | 137 | struct hisi_sas_hw { |
8ff1d571 | 138 | int (*hw_init)(struct hisi_hba *hisi_hba); |
abda97c2 JG |
139 | void (*setup_itct)(struct hisi_hba *hisi_hba, |
140 | struct hisi_sas_device *device); | |
685b6d6e JG |
141 | int (*slot_index_alloc)(struct hisi_hba *hisi_hba, int *slot_idx, |
142 | struct domain_device *device); | |
143 | struct hisi_sas_device *(*alloc_dev)(struct domain_device *device); | |
66139921 | 144 | void (*sl_notify)(struct hisi_hba *hisi_hba, int phy_no); |
42e7a693 JG |
145 | int (*get_free_slot)(struct hisi_hba *hisi_hba, int *q, int *s); |
146 | void (*start_delivery)(struct hisi_hba *hisi_hba); | |
147 | int (*prep_ssp)(struct hisi_hba *hisi_hba, | |
148 | struct hisi_sas_slot *slot, int is_tmf, | |
149 | struct hisi_sas_tmf_task *tmf); | |
66ee999b JG |
150 | int (*prep_smp)(struct hisi_hba *hisi_hba, |
151 | struct hisi_sas_slot *slot); | |
6f2ff1a1 JG |
152 | int (*prep_stp)(struct hisi_hba *hisi_hba, |
153 | struct hisi_sas_slot *slot); | |
441c2740 JG |
154 | int (*prep_abort)(struct hisi_hba *hisi_hba, |
155 | struct hisi_sas_slot *slot, | |
156 | int device_id, int abort_flag, int tag_to_abort); | |
27a3f229 JG |
157 | int (*slot_complete)(struct hisi_hba *hisi_hba, |
158 | struct hisi_sas_slot *slot, int abort); | |
e4189d53 JG |
159 | void (*phy_enable)(struct hisi_hba *hisi_hba, int phy_no); |
160 | void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no); | |
161 | void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no); | |
27a3f229 JG |
162 | void (*free_device)(struct hisi_hba *hisi_hba, |
163 | struct hisi_sas_device *dev); | |
184a4635 | 164 | int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id); |
a8d547bd | 165 | int max_command_entries; |
6be6de18 | 166 | int complete_hdr_size; |
7eb7869f JG |
167 | }; |
168 | ||
169 | struct hisi_hba { | |
170 | /* This must be the first element, used by SHOST_TO_SAS_HA */ | |
171 | struct sas_ha_struct *p; | |
172 | ||
173 | struct platform_device *pdev; | |
e26b2f40 JG |
174 | void __iomem *regs; |
175 | struct regmap *ctrl; | |
176 | u32 ctrl_reset_reg; | |
177 | u32 ctrl_reset_sts_reg; | |
178 | u32 ctrl_clock_ena_reg; | |
7eb7869f JG |
179 | u8 sas_addr[SAS_ADDR_SIZE]; |
180 | ||
181 | int n_phy; | |
701f75ec | 182 | int scan_finished; |
fa42d80d | 183 | spinlock_t lock; |
7eb7869f | 184 | |
fa42d80d | 185 | struct timer_list timer; |
7e9080e1 | 186 | struct workqueue_struct *wq; |
257efd1f JG |
187 | |
188 | int slot_index_count; | |
189 | unsigned long *slot_index_tags; | |
190 | ||
7eb7869f JG |
191 | /* SCSI/SAS glue */ |
192 | struct sas_ha_struct sha; | |
193 | struct Scsi_Host *shost; | |
9101a079 JG |
194 | |
195 | struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES]; | |
7eb7869f JG |
196 | struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS]; |
197 | struct hisi_sas_port port[HISI_SAS_MAX_PHYS]; | |
e26b2f40 JG |
198 | |
199 | int queue_count; | |
42e7a693 | 200 | int queue; |
42e7a693 | 201 | struct hisi_sas_slot *slot_prep; |
6be6de18 JG |
202 | |
203 | struct dma_pool *sge_page_pool; | |
af740dbe | 204 | struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES]; |
6be6de18 JG |
205 | struct dma_pool *command_table_pool; |
206 | struct dma_pool *status_buffer_pool; | |
207 | struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES]; | |
208 | dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES]; | |
209 | void *complete_hdr[HISI_SAS_MAX_QUEUES]; | |
210 | dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES]; | |
211 | struct hisi_sas_initial_fis *initial_fis; | |
212 | dma_addr_t initial_fis_dma; | |
213 | struct hisi_sas_itct *itct; | |
214 | dma_addr_t itct_dma; | |
215 | struct hisi_sas_iost *iost; | |
216 | dma_addr_t iost_dma; | |
217 | struct hisi_sas_breakpoint *breakpoint; | |
218 | dma_addr_t breakpoint_dma; | |
219 | struct hisi_sas_breakpoint *sata_breakpoint; | |
220 | dma_addr_t sata_breakpoint_dma; | |
221 | struct hisi_sas_slot *slot_info; | |
7eb7869f JG |
222 | const struct hisi_sas_hw *hw; /* Low level hw interface */ |
223 | }; | |
224 | ||
c799d6bd JG |
225 | /* Generic HW DMA host memory structures */ |
226 | /* Delivery queue header */ | |
227 | struct hisi_sas_cmd_hdr { | |
228 | /* dw0 */ | |
229 | __le32 dw0; | |
230 | ||
231 | /* dw1 */ | |
232 | __le32 dw1; | |
233 | ||
234 | /* dw2 */ | |
235 | __le32 dw2; | |
236 | ||
237 | /* dw3 */ | |
238 | __le32 transfer_tags; | |
239 | ||
240 | /* dw4 */ | |
241 | __le32 data_transfer_len; | |
242 | ||
243 | /* dw5 */ | |
244 | __le32 first_burst_num; | |
245 | ||
246 | /* dw6 */ | |
247 | __le32 sg_len; | |
248 | ||
249 | /* dw7 */ | |
250 | __le32 dw7; | |
251 | ||
252 | /* dw8-9 */ | |
253 | __le64 cmd_table_addr; | |
254 | ||
255 | /* dw10-11 */ | |
256 | __le64 sts_buffer_addr; | |
257 | ||
258 | /* dw12-13 */ | |
259 | __le64 prd_table_addr; | |
260 | ||
261 | /* dw14-15 */ | |
262 | __le64 dif_prd_table_addr; | |
263 | }; | |
264 | ||
265 | struct hisi_sas_itct { | |
266 | __le64 qw0; | |
267 | __le64 sas_addr; | |
268 | __le64 qw2; | |
269 | __le64 qw3; | |
281e3bf6 | 270 | __le64 qw4_15[12]; |
c799d6bd JG |
271 | }; |
272 | ||
273 | struct hisi_sas_iost { | |
274 | __le64 qw0; | |
275 | __le64 qw1; | |
276 | __le64 qw2; | |
277 | __le64 qw3; | |
278 | }; | |
279 | ||
280 | struct hisi_sas_err_record { | |
8d1eee7d | 281 | u32 data[4]; |
c799d6bd JG |
282 | }; |
283 | ||
284 | struct hisi_sas_initial_fis { | |
285 | struct hisi_sas_err_record err_record; | |
286 | struct dev_to_host_fis fis; | |
287 | u32 rsvd[3]; | |
288 | }; | |
289 | ||
290 | struct hisi_sas_breakpoint { | |
291 | u8 data[128]; /*io128 byte*/ | |
292 | }; | |
293 | ||
294 | struct hisi_sas_sge { | |
295 | __le64 addr; | |
296 | __le32 page_ctrl_0; | |
297 | __le32 page_ctrl_1; | |
298 | __le32 data_len; | |
299 | __le32 data_off; | |
300 | }; | |
301 | ||
302 | struct hisi_sas_command_table_smp { | |
303 | u8 bytes[44]; | |
304 | }; | |
305 | ||
306 | struct hisi_sas_command_table_stp { | |
307 | struct host_to_dev_fis command_fis; | |
308 | u8 dummy[12]; | |
309 | u8 atapi_cdb[ATAPI_CDB_LEN]; | |
310 | }; | |
311 | ||
65e8617f | 312 | #define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE |
c799d6bd JG |
313 | struct hisi_sas_sge_page { |
314 | struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT]; | |
315 | }; | |
316 | ||
317 | struct hisi_sas_command_table_ssp { | |
318 | struct ssp_frame_hdr hdr; | |
319 | union { | |
320 | struct { | |
321 | struct ssp_command_iu task; | |
322 | u32 prot[6]; | |
323 | }; | |
324 | struct ssp_tmf_iu ssp_task; | |
325 | struct xfer_rdy_iu xfer_rdy; | |
326 | struct ssp_response_iu ssp_res; | |
327 | } u; | |
328 | }; | |
329 | ||
330 | union hisi_sas_command_table { | |
331 | struct hisi_sas_command_table_ssp ssp; | |
332 | struct hisi_sas_command_table_smp smp; | |
333 | struct hisi_sas_command_table_stp stp; | |
334 | }; | |
9fb10b54 JG |
335 | extern int hisi_sas_probe(struct platform_device *pdev, |
336 | const struct hisi_sas_hw *ops); | |
337 | extern int hisi_sas_remove(struct platform_device *pdev); | |
c799d6bd | 338 | |
184a4635 | 339 | extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy); |
27a3f229 JG |
340 | extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, |
341 | struct sas_task *task, | |
342 | struct hisi_sas_slot *slot); | |
e8899fad | 343 | #endif |