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[SCSI] hpsa: remove unused busy_initializing and busy_scanning
[deliverable/linux.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/fs.h>
30#include <linux/timer.h>
31#include <linux/seq_file.h>
32#include <linux/init.h>
33#include <linux/spinlock.h>
edd16368
SC		 34#include <linux/compat.h>
35#include <linux/blktrace_api.h>
36#include <linux/uaccess.h>
37#include <linux/io.h>
38#include <linux/dma-mapping.h>
39#include <linux/completion.h>
40#include <linux/moduleparam.h>
41#include <scsi/scsi.h>
42#include <scsi/scsi_cmnd.h>
43#include <scsi/scsi_device.h>
44#include <scsi/scsi_host.h>
667e23d4 45#include <scsi/scsi_tcq.h>
edd16368
SC		 46#include <linux/cciss_ioctl.h>
47#include <linux/string.h>
48#include <linux/bitmap.h>
60063497 49#include <linux/atomic.h>
edd16368
SC		 50#include <linux/kthread.h>
51#include "hpsa_cmd.h"
52#include "hpsa.h"
53
54/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
31468401 55#define HPSA_DRIVER_VERSION "2.0.2-1"
edd16368
SC		 56#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
57
58/* How long to wait (in milliseconds) for board to go into simple mode */
59#define MAX_CONFIG_WAIT 30000
60#define MAX_IOCTL_CONFIG_WAIT 1000
61
62/*define how many times we will try a command because of bus resets */
63#define MAX_CMD_RETRIES 3
64
65/* Embedded module documentation macros - see modules.h */
66MODULE_AUTHOR("Hewlett-Packard Company");
67MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
68 HPSA_DRIVER_VERSION);
69MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
70MODULE_VERSION(HPSA_DRIVER_VERSION);
71MODULE_LICENSE("GPL");
72
73static int hpsa_allow_any;
74module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
75MODULE_PARM_DESC(hpsa_allow_any,
76 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 77static int hpsa_simple_mode;
78module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
79MODULE_PARM_DESC(hpsa_simple_mode,
80 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 81
82/* define the PCI info for the cards we can control */
83static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 84 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
85 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
f8b01eb9 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
9143a961 92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
7c03b870 99 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 100 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 101 {0,}
102};
103
104MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
105
106/* board_id = Subsystem Device ID & Vendor ID
107 * product = Marketing Name for the board
108 * access = Address of the struct of function pointers
109 */
110static struct board_type products[] = {
edd16368
SC		 111 {0x3241103C, "Smart Array P212", &SA5_access},
112 {0x3243103C, "Smart Array P410", &SA5_access},
113 {0x3245103C, "Smart Array P410i", &SA5_access},
114 {0x3247103C, "Smart Array P411", &SA5_access},
115 {0x3249103C, "Smart Array P812", &SA5_access},
116 {0x324a103C, "Smart Array P712m", &SA5_access},
117 {0x324b103C, "Smart Array P711m", &SA5_access},
9143a961 118 {0x3350103C, "Smart Array", &SA5_access},
119 {0x3351103C, "Smart Array", &SA5_access},
120 {0x3352103C, "Smart Array", &SA5_access},
121 {0x3353103C, "Smart Array", &SA5_access},
122 {0x3354103C, "Smart Array", &SA5_access},
123 {0x3355103C, "Smart Array", &SA5_access},
124 {0x3356103C, "Smart Array", &SA5_access},
edd16368
SC		 125 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
126};
127
128static int number_of_controllers;
129
10f66018
SC		 130static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
131static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 132static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
133static void start_io(struct ctlr_info *h);
134
135#ifdef CONFIG_COMPAT
136static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
137#endif
138
139static void cmd_free(struct ctlr_info *h, struct CommandList *c);
140static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
141static struct CommandList *cmd_alloc(struct ctlr_info *h);
142static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
01a02ffc
SC		 143static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
144 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 145 int cmd_type);
146
f281233d 147static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 148static void hpsa_scan_start(struct Scsi_Host *);
149static int hpsa_scan_finished(struct Scsi_Host *sh,
150 unsigned long elapsed_time);
667e23d4
SC		 151static int hpsa_change_queue_depth(struct scsi_device *sdev,
152 int qdepth, int reason);
edd16368
SC		 153
154static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
155static int hpsa_slave_alloc(struct scsi_device *sdev);
156static void hpsa_slave_destroy(struct scsi_device *sdev);
157
edd16368 158static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
edd16368
SC		 159static int check_for_unit_attention(struct ctlr_info *h,
160 struct CommandList *c);
161static void check_ioctl_unit_attention(struct ctlr_info *h,
162 struct CommandList *c);
303932fd
DB		 163/* performant mode helper functions */
164static void calc_bucket_map(int *bucket, int num_buckets,
165 int nsgs, int *bucket_map);
7136f9a7 166static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
303932fd 167static inline u32 next_command(struct ctlr_info *h);
1df8552a
SC		 168static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
169 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
170 u64 *cfg_offset);
171static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
172 unsigned long *memory_bar);
18867659 173static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
fe5389c8
SC		 174static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
175 void __iomem *vaddr, int wait_for_ready);
176#define BOARD_NOT_READY 0
177#define BOARD_READY 1
edd16368 178
edd16368
SC		 179static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
180{
181 unsigned long *priv = shost_priv(sdev->host);
182 return (struct ctlr_info *) *priv;
183}
184
a23513e8
SC		 185static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
186{
187 unsigned long *priv = shost_priv(sh);
188 return (struct ctlr_info *) *priv;
189}
190
edd16368
SC		 191static int check_for_unit_attention(struct ctlr_info *h,
192 struct CommandList *c)
193{
194 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
195 return 0;
196
197 switch (c->err_info->SenseInfo[12]) {
198 case STATE_CHANGED:
199 dev_warn(&h->pdev->dev, "hpsa%d: a state change "
200 "detected, command retried\n", h->ctlr);
201 break;
202 case LUN_FAILED:
203 dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
204 "detected, action required\n", h->ctlr);
205 break;
206 case REPORT_LUNS_CHANGED:
207 dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
31468401 208 "changed, action required\n", h->ctlr);
edd16368 209 /*
edd16368
SC		 210 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
211 */
212 break;
213 case POWER_OR_RESET:
214 dev_warn(&h->pdev->dev, "hpsa%d: a power on "
215 "or device reset detected\n", h->ctlr);
216 break;
217 case UNIT_ATTENTION_CLEARED:
218 dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
219 "cleared by another initiator\n", h->ctlr);
220 break;
221 default:
222 dev_warn(&h->pdev->dev, "hpsa%d: unknown "
223 "unit attention detected\n", h->ctlr);
224 break;
225 }
226 return 1;
227}
228
229static ssize_t host_store_rescan(struct device *dev,
230 struct device_attribute *attr,
231 const char *buf, size_t count)
232{
233 struct ctlr_info *h;
234 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 235 h = shost_to_hba(shost);
31468401 236 hpsa_scan_start(h->scsi_host);
edd16368
SC		 237 return count;
238}
239
d28ce020
SC		 240static ssize_t host_show_firmware_revision(struct device *dev,
241 struct device_attribute *attr, char *buf)
242{
243 struct ctlr_info *h;
244 struct Scsi_Host *shost = class_to_shost(dev);
245 unsigned char *fwrev;
246
247 h = shost_to_hba(shost);
248 if (!h->hba_inquiry_data)
249 return 0;
250 fwrev = &h->hba_inquiry_data[32];
251 return snprintf(buf, 20, "%c%c%c%c\n",
252 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
253}
254
94a13649
SC		 255static ssize_t host_show_commands_outstanding(struct device *dev,
256 struct device_attribute *attr, char *buf)
257{
258 struct Scsi_Host *shost = class_to_shost(dev);
259 struct ctlr_info *h = shost_to_hba(shost);
260
261 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
262}
263
745a7a25
SC		 264static ssize_t host_show_transport_mode(struct device *dev,
265 struct device_attribute *attr, char *buf)
266{
267 struct ctlr_info *h;
268 struct Scsi_Host *shost = class_to_shost(dev);
269
270 h = shost_to_hba(shost);
271 return snprintf(buf, 20, "%s\n",
960a30e7 272 h->transMethod & CFGTBL_Trans_Performant ?
745a7a25
SC		 273 "performant" : "simple");
274}
275
46380786 276/* List of controllers which cannot be hard reset on kexec with reset_devices */
941b1cda
SC		 277static u32 unresettable_controller[] = {
278 0x324a103C, /* Smart Array P712m */
279 0x324b103C, /* SmartArray P711m */
280 0x3223103C, /* Smart Array P800 */
281 0x3234103C, /* Smart Array P400 */
282 0x3235103C, /* Smart Array P400i */
283 0x3211103C, /* Smart Array E200i */
284 0x3212103C, /* Smart Array E200 */
285 0x3213103C, /* Smart Array E200i */
286 0x3214103C, /* Smart Array E200i */
287 0x3215103C, /* Smart Array E200i */
288 0x3237103C, /* Smart Array E500 */
289 0x323D103C, /* Smart Array P700m */
290 0x409C0E11, /* Smart Array 6400 */
291 0x409D0E11, /* Smart Array 6400 EM */
292};
293
46380786
SC		 294/* List of controllers which cannot even be soft reset */
295static u32 soft_unresettable_controller[] = {
296 /* Exclude 640x boards. These are two pci devices in one slot
297 * which share a battery backed cache module. One controls the
298 * cache, the other accesses the cache through the one that controls
299 * it. If we reset the one controlling the cache, the other will
300 * likely not be happy. Just forbid resetting this conjoined mess.
301 * The 640x isn't really supported by hpsa anyway.
302 */
303 0x409C0E11, /* Smart Array 6400 */
304 0x409D0E11, /* Smart Array 6400 EM */
305};
306
307static int ctlr_is_hard_resettable(u32 board_id)
941b1cda
SC		 308{
309 int i;
310
311 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
46380786
SC		 312 if (unresettable_controller[i] == board_id)
313 return 0;
314 return 1;
315}
316
317static int ctlr_is_soft_resettable(u32 board_id)
318{
319 int i;
320
321 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
322 if (soft_unresettable_controller[i] == board_id)
941b1cda
SC		 323 return 0;
324 return 1;
325}
326
46380786
SC		 327static int ctlr_is_resettable(u32 board_id)
328{
329 return ctlr_is_hard_resettable(board_id) ||
330 ctlr_is_soft_resettable(board_id);
331}
332
941b1cda
SC		 333static ssize_t host_show_resettable(struct device *dev,
334 struct device_attribute *attr, char *buf)
335{
336 struct ctlr_info *h;
337 struct Scsi_Host *shost = class_to_shost(dev);
338
339 h = shost_to_hba(shost);
46380786 340 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
941b1cda
SC		 341}
342
edd16368
SC		 343static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
344{
345 return (scsi3addr[3] & 0xC0) == 0x40;
346}
347
348static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
349 "UNKNOWN"
350};
351#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
352
353static ssize_t raid_level_show(struct device *dev,
354 struct device_attribute *attr, char *buf)
355{
356 ssize_t l = 0;
82a72c0a 357 unsigned char rlevel;
edd16368
SC		 358 struct ctlr_info *h;
359 struct scsi_device *sdev;
360 struct hpsa_scsi_dev_t *hdev;
361 unsigned long flags;
362
363 sdev = to_scsi_device(dev);
364 h = sdev_to_hba(sdev);
365 spin_lock_irqsave(&h->lock, flags);
366 hdev = sdev->hostdata;
367 if (!hdev) {
368 spin_unlock_irqrestore(&h->lock, flags);
369 return -ENODEV;
370 }
371
372 /* Is this even a logical drive? */
373 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
374 spin_unlock_irqrestore(&h->lock, flags);
375 l = snprintf(buf, PAGE_SIZE, "N/A\n");
376 return l;
377 }
378
379 rlevel = hdev->raid_level;
380 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 381 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 382 rlevel = RAID_UNKNOWN;
383 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
384 return l;
385}
386
387static ssize_t lunid_show(struct device *dev,
388 struct device_attribute *attr, char *buf)
389{
390 struct ctlr_info *h;
391 struct scsi_device *sdev;
392 struct hpsa_scsi_dev_t *hdev;
393 unsigned long flags;
394 unsigned char lunid[8];
395
396 sdev = to_scsi_device(dev);
397 h = sdev_to_hba(sdev);
398 spin_lock_irqsave(&h->lock, flags);
399 hdev = sdev->hostdata;
400 if (!hdev) {
401 spin_unlock_irqrestore(&h->lock, flags);
402 return -ENODEV;
403 }
404 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
405 spin_unlock_irqrestore(&h->lock, flags);
406 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
407 lunid[0], lunid[1], lunid[2], lunid[3],
408 lunid[4], lunid[5], lunid[6], lunid[7]);
409}
410
411static ssize_t unique_id_show(struct device *dev,
412 struct device_attribute *attr, char *buf)
413{
414 struct ctlr_info *h;
415 struct scsi_device *sdev;
416 struct hpsa_scsi_dev_t *hdev;
417 unsigned long flags;
418 unsigned char sn[16];
419
420 sdev = to_scsi_device(dev);
421 h = sdev_to_hba(sdev);
422 spin_lock_irqsave(&h->lock, flags);
423 hdev = sdev->hostdata;
424 if (!hdev) {
425 spin_unlock_irqrestore(&h->lock, flags);
426 return -ENODEV;
427 }
428 memcpy(sn, hdev->device_id, sizeof(sn));
429 spin_unlock_irqrestore(&h->lock, flags);
430 return snprintf(buf, 16 * 2 + 2,
431 "%02X%02X%02X%02X%02X%02X%02X%02X"
432 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
433 sn[0], sn[1], sn[2], sn[3],
434 sn[4], sn[5], sn[6], sn[7],
435 sn[8], sn[9], sn[10], sn[11],
436 sn[12], sn[13], sn[14], sn[15]);
437}
438
3f5eac3a
SC		 439static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
440static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
441static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
442static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
443static DEVICE_ATTR(firmware_revision, S_IRUGO,
444 host_show_firmware_revision, NULL);
445static DEVICE_ATTR(commands_outstanding, S_IRUGO,
446 host_show_commands_outstanding, NULL);
447static DEVICE_ATTR(transport_mode, S_IRUGO,
448 host_show_transport_mode, NULL);
941b1cda
SC		 449static DEVICE_ATTR(resettable, S_IRUGO,
450 host_show_resettable, NULL);
3f5eac3a
SC		 451
452static struct device_attribute *hpsa_sdev_attrs[] = {
453 &dev_attr_raid_level,
454 &dev_attr_lunid,
455 &dev_attr_unique_id,
456 NULL,
457};
458
459static struct device_attribute *hpsa_shost_attrs[] = {
460 &dev_attr_rescan,
461 &dev_attr_firmware_revision,
462 &dev_attr_commands_outstanding,
463 &dev_attr_transport_mode,
941b1cda 464 &dev_attr_resettable,
3f5eac3a
SC		 465 NULL,
466};
467
468static struct scsi_host_template hpsa_driver_template = {
469 .module = THIS_MODULE,
470 .name = "hpsa",
471 .proc_name = "hpsa",
472 .queuecommand = hpsa_scsi_queue_command,
473 .scan_start = hpsa_scan_start,
474 .scan_finished = hpsa_scan_finished,
475 .change_queue_depth = hpsa_change_queue_depth,
476 .this_id = -1,
477 .use_clustering = ENABLE_CLUSTERING,
478 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
479 .ioctl = hpsa_ioctl,
480 .slave_alloc = hpsa_slave_alloc,
481 .slave_destroy = hpsa_slave_destroy,
482#ifdef CONFIG_COMPAT
483 .compat_ioctl = hpsa_compat_ioctl,
484#endif
485 .sdev_attrs = hpsa_sdev_attrs,
486 .shost_attrs = hpsa_shost_attrs,
c0d6a4d1 487 .max_sectors = 8192,
3f5eac3a
SC		 488};
489
490
491/* Enqueuing and dequeuing functions for cmdlists. */
492static inline void addQ(struct list_head *list, struct CommandList *c)
493{
494 list_add_tail(&c->list, list);
495}
496
497static inline u32 next_command(struct ctlr_info *h)
498{
499 u32 a;
500
501 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
502 return h->access.command_completed(h);
503
504 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
505 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
506 (h->reply_pool_head)++;
507 h->commands_outstanding--;
508 } else {
509 a = FIFO_EMPTY;
510 }
511 /* Check for wraparound */
512 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
513 h->reply_pool_head = h->reply_pool;
514 h->reply_pool_wraparound ^= 1;
515 }
516 return a;
517}
518
519/* set_performant_mode: Modify the tag for cciss performant
520 * set bit 0 for pull model, bits 3-1 for block fetch
521 * register number
522 */
523static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
524{
525 if (likely(h->transMethod & CFGTBL_Trans_Performant))
526 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
527}
528
529static void enqueue_cmd_and_start_io(struct ctlr_info *h,
530 struct CommandList *c)
531{
532 unsigned long flags;
533
534 set_performant_mode(h, c);
535 spin_lock_irqsave(&h->lock, flags);
536 addQ(&h->reqQ, c);
537 h->Qdepth++;
538 start_io(h);
539 spin_unlock_irqrestore(&h->lock, flags);
540}
541
542static inline void removeQ(struct CommandList *c)
543{
544 if (WARN_ON(list_empty(&c->list)))
545 return;
546 list_del_init(&c->list);
547}
548
549static inline int is_hba_lunid(unsigned char scsi3addr[])
550{
551 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
552}
553
554static inline int is_scsi_rev_5(struct ctlr_info *h)
555{
556 if (!h->hba_inquiry_data)
557 return 0;
558 if ((h->hba_inquiry_data[2] & 0x07) == 5)
559 return 1;
560 return 0;
561}
562
edd16368
SC		 563static int hpsa_find_target_lun(struct ctlr_info *h,
564 unsigned char scsi3addr[], int bus, int *target, int *lun)
565{
566 /* finds an unused bus, target, lun for a new physical device
567 * assumes h->devlock is held
568 */
569 int i, found = 0;
570 DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
571
572 memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
573
574 for (i = 0; i < h->ndevices; i++) {
575 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
576 set_bit(h->dev[i]->target, lun_taken);
577 }
578
579 for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
580 if (!test_bit(i, lun_taken)) {
581 /* *bus = 1; */
582 *target = i;
583 *lun = 0;
584 found = 1;
585 break;
586 }
587 }
588 return !found;
589}
590
591/* Add an entry into h->dev[] array. */
592static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
593 struct hpsa_scsi_dev_t *device,
594 struct hpsa_scsi_dev_t *added[], int *nadded)
595{
596 /* assumes h->devlock is held */
597 int n = h->ndevices;
598 int i;
599 unsigned char addr1[8], addr2[8];
600 struct hpsa_scsi_dev_t *sd;
601
602 if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
603 dev_err(&h->pdev->dev, "too many devices, some will be "
604 "inaccessible.\n");
605 return -1;
606 }
607
608 /* physical devices do not have lun or target assigned until now. */
609 if (device->lun != -1)
610 /* Logical device, lun is already assigned. */
611 goto lun_assigned;
612
613 /* If this device a non-zero lun of a multi-lun device
614 * byte 4 of the 8-byte LUN addr will contain the logical
615 * unit no, zero otherise.
616 */
617 if (device->scsi3addr[4] == 0) {
618 /* This is not a non-zero lun of a multi-lun device */
619 if (hpsa_find_target_lun(h, device->scsi3addr,
620 device->bus, &device->target, &device->lun) != 0)
621 return -1;
622 goto lun_assigned;
623 }
624
625 /* This is a non-zero lun of a multi-lun device.
626 * Search through our list and find the device which
627 * has the same 8 byte LUN address, excepting byte 4.
628 * Assign the same bus and target for this new LUN.
629 * Use the logical unit number from the firmware.
630 */
631 memcpy(addr1, device->scsi3addr, 8);
632 addr1[4] = 0;
633 for (i = 0; i < n; i++) {
634 sd = h->dev[i];
635 memcpy(addr2, sd->scsi3addr, 8);
636 addr2[4] = 0;
637 /* differ only in byte 4? */
638 if (memcmp(addr1, addr2, 8) == 0) {
639 device->bus = sd->bus;
640 device->target = sd->target;
641 device->lun = device->scsi3addr[4];
642 break;
643 }
644 }
645 if (device->lun == -1) {
646 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
647 " suspect firmware bug or unsupported hardware "
648 "configuration.\n");
649 return -1;
650 }
651
652lun_assigned:
653
654 h->dev[n] = device;
655 h->ndevices++;
656 added[*nadded] = device;
657 (*nadded)++;
658
659 /* initially, (before registering with scsi layer) we don't
660 * know our hostno and we don't want to print anything first
661 * time anyway (the scsi layer's inquiries will show that info)
662 */
663 /* if (hostno != -1) */
664 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
665 scsi_device_type(device->devtype), hostno,
666 device->bus, device->target, device->lun);
667 return 0;
668}
669
2a8ccf31
SC		 670/* Replace an entry from h->dev[] array. */
671static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
672 int entry, struct hpsa_scsi_dev_t *new_entry,
673 struct hpsa_scsi_dev_t *added[], int *nadded,
674 struct hpsa_scsi_dev_t *removed[], int *nremoved)
675{
676 /* assumes h->devlock is held */
677 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
678 removed[*nremoved] = h->dev[entry];
679 (*nremoved)++;
01350d05
SC		 680
681 /*
682 * New physical devices won't have target/lun assigned yet
683 * so we need to preserve the values in the slot we are replacing.
684 */
685 if (new_entry->target == -1) {
686 new_entry->target = h->dev[entry]->target;
687 new_entry->lun = h->dev[entry]->lun;
688 }
689
2a8ccf31
SC		 690 h->dev[entry] = new_entry;
691 added[*nadded] = new_entry;
692 (*nadded)++;
693 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
694 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
695 new_entry->target, new_entry->lun);
696}
697
edd16368
SC		 698/* Remove an entry from h->dev[] array. */
699static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
700 struct hpsa_scsi_dev_t *removed[], int *nremoved)
701{
702 /* assumes h->devlock is held */
703 int i;
704 struct hpsa_scsi_dev_t *sd;
705
b2ed4f79 706 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
edd16368
SC		 707
708 sd = h->dev[entry];
709 removed[*nremoved] = h->dev[entry];
710 (*nremoved)++;
711
712 for (i = entry; i < h->ndevices-1; i++)
713 h->dev[i] = h->dev[i+1];
714 h->ndevices--;
715 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
716 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
717 sd->lun);
718}
719
720#define SCSI3ADDR_EQ(a, b) ( \
721 (a)[7] == (b)[7] && \
722 (a)[6] == (b)[6] && \
723 (a)[5] == (b)[5] && \
724 (a)[4] == (b)[4] && \
725 (a)[3] == (b)[3] && \
726 (a)[2] == (b)[2] && \
727 (a)[1] == (b)[1] && \
728 (a)[0] == (b)[0])
729
730static void fixup_botched_add(struct ctlr_info *h,
731 struct hpsa_scsi_dev_t *added)
732{
733 /* called when scsi_add_device fails in order to re-adjust
734 * h->dev[] to match the mid layer's view.
735 */
736 unsigned long flags;
737 int i, j;
738
739 spin_lock_irqsave(&h->lock, flags);
740 for (i = 0; i < h->ndevices; i++) {
741 if (h->dev[i] == added) {
742 for (j = i; j < h->ndevices-1; j++)
743 h->dev[j] = h->dev[j+1];
744 h->ndevices--;
745 break;
746 }
747 }
748 spin_unlock_irqrestore(&h->lock, flags);
749 kfree(added);
750}
751
752static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
753 struct hpsa_scsi_dev_t *dev2)
754{
edd16368
SC		 755 /* we compare everything except lun and target as these
756 * are not yet assigned. Compare parts likely
757 * to differ first
758 */
759 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
760 sizeof(dev1->scsi3addr)) != 0)
761 return 0;
762 if (memcmp(dev1->device_id, dev2->device_id,
763 sizeof(dev1->device_id)) != 0)
764 return 0;
765 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
766 return 0;
767 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
768 return 0;
edd16368
SC		 769 if (dev1->devtype != dev2->devtype)
770 return 0;
edd16368
SC		 771 if (dev1->bus != dev2->bus)
772 return 0;
773 return 1;
774}
775
776/* Find needle in haystack. If exact match found, return DEVICE_SAME,
777 * and return needle location in *index. If scsi3addr matches, but not
778 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
779 * location in *index. If needle not found, return DEVICE_NOT_FOUND.
780 */
781static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
782 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
783 int *index)
784{
785 int i;
786#define DEVICE_NOT_FOUND 0
787#define DEVICE_CHANGED 1
788#define DEVICE_SAME 2
789 for (i = 0; i < haystack_size; i++) {
23231048
SC		 790 if (haystack[i] == NULL) /* previously removed. */
791 continue;
edd16368
SC		 792 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
793 *index = i;
794 if (device_is_the_same(needle, haystack[i]))
795 return DEVICE_SAME;
796 else
797 return DEVICE_CHANGED;
798 }
799 }
800 *index = -1;
801 return DEVICE_NOT_FOUND;
802}
803
4967bd3e 804static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 805 struct hpsa_scsi_dev_t *sd[], int nsds)
806{
807 /* sd contains scsi3 addresses and devtypes, and inquiry
808 * data. This function takes what's in sd to be the current
809 * reality and updates h->dev[] to reflect that reality.
810 */
811 int i, entry, device_change, changes = 0;
812 struct hpsa_scsi_dev_t *csd;
813 unsigned long flags;
814 struct hpsa_scsi_dev_t **added, **removed;
815 int nadded, nremoved;
816 struct Scsi_Host *sh = NULL;
817
818 added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
819 GFP_KERNEL);
820 removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
821 GFP_KERNEL);
822
823 if (!added || !removed) {
824 dev_warn(&h->pdev->dev, "out of memory in "
825 "adjust_hpsa_scsi_table\n");
826 goto free_and_out;
827 }
828
829 spin_lock_irqsave(&h->devlock, flags);
830
831 /* find any devices in h->dev[] that are not in
832 * sd[] and remove them from h->dev[], and for any
833 * devices which have changed, remove the old device
834 * info and add the new device info.
835 */
836 i = 0;
837 nremoved = 0;
838 nadded = 0;
839 while (i < h->ndevices) {
840 csd = h->dev[i];
841 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
842 if (device_change == DEVICE_NOT_FOUND) {
843 changes++;
844 hpsa_scsi_remove_entry(h, hostno, i,
845 removed, &nremoved);
846 continue; /* remove ^^^, hence i not incremented */
847 } else if (device_change == DEVICE_CHANGED) {
848 changes++;
2a8ccf31
SC		 849 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
850 added, &nadded, removed, &nremoved);
c7f172dc
SC		 851 /* Set it to NULL to prevent it from being freed
852 * at the bottom of hpsa_update_scsi_devices()
853 */
854 sd[entry] = NULL;
edd16368
SC		 855 }
856 i++;
857 }
858
859 /* Now, make sure every device listed in sd[] is also
860 * listed in h->dev[], adding them if they aren't found
861 */
862
863 for (i = 0; i < nsds; i++) {
864 if (!sd[i]) /* if already added above. */
865 continue;
866 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
867 h->ndevices, &entry);
868 if (device_change == DEVICE_NOT_FOUND) {
869 changes++;
870 if (hpsa_scsi_add_entry(h, hostno, sd[i],
871 added, &nadded) != 0)
872 break;
873 sd[i] = NULL; /* prevent from being freed later. */
874 } else if (device_change == DEVICE_CHANGED) {
875 /* should never happen... */
876 changes++;
877 dev_warn(&h->pdev->dev,
878 "device unexpectedly changed.\n");
879 /* but if it does happen, we just ignore that device */
880 }
881 }
882 spin_unlock_irqrestore(&h->devlock, flags);
883
884 /* Don't notify scsi mid layer of any changes the first time through
885 * (or if there are no changes) scsi_scan_host will do it later the
886 * first time through.
887 */
888 if (hostno == -1 || !changes)
889 goto free_and_out;
890
891 sh = h->scsi_host;
892 /* Notify scsi mid layer of any removed devices */
893 for (i = 0; i < nremoved; i++) {
894 struct scsi_device *sdev =
895 scsi_device_lookup(sh, removed[i]->bus,
896 removed[i]->target, removed[i]->lun);
897 if (sdev != NULL) {
898 scsi_remove_device(sdev);
899 scsi_device_put(sdev);
900 } else {
901 /* We don't expect to get here.
902 * future cmds to this device will get selection
903 * timeout as if the device was gone.
904 */
905 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
906 " for removal.", hostno, removed[i]->bus,
907 removed[i]->target, removed[i]->lun);
908 }
909 kfree(removed[i]);
910 removed[i] = NULL;
911 }
912
913 /* Notify scsi mid layer of any added devices */
914 for (i = 0; i < nadded; i++) {
915 if (scsi_add_device(sh, added[i]->bus,
916 added[i]->target, added[i]->lun) == 0)
917 continue;
918 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
919 "device not added.\n", hostno, added[i]->bus,
920 added[i]->target, added[i]->lun);
921 /* now we have to remove it from h->dev,
922 * since it didn't get added to scsi mid layer
923 */
924 fixup_botched_add(h, added[i]);
925 }
926
927free_and_out:
928 kfree(added);
929 kfree(removed);
edd16368
SC		 930}
931
932/*
933 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
934 * Assume's h->devlock is held.
935 */
936static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
937 int bus, int target, int lun)
938{
939 int i;
940 struct hpsa_scsi_dev_t *sd;
941
942 for (i = 0; i < h->ndevices; i++) {
943 sd = h->dev[i];
944 if (sd->bus == bus && sd->target == target && sd->lun == lun)
945 return sd;
946 }
947 return NULL;
948}
949
950/* link sdev->hostdata to our per-device structure. */
951static int hpsa_slave_alloc(struct scsi_device *sdev)
952{
953 struct hpsa_scsi_dev_t *sd;
954 unsigned long flags;
955 struct ctlr_info *h;
956
957 h = sdev_to_hba(sdev);
958 spin_lock_irqsave(&h->devlock, flags);
959 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
960 sdev_id(sdev), sdev->lun);
961 if (sd != NULL)
962 sdev->hostdata = sd;
963 spin_unlock_irqrestore(&h->devlock, flags);
964 return 0;
965}
966
967static void hpsa_slave_destroy(struct scsi_device *sdev)
968{
bcc44255 969 /* nothing to do. */
edd16368
SC		 970}
971
33a2ffce
SC		 972static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
973{
974 int i;
975
976 if (!h->cmd_sg_list)
977 return;
978 for (i = 0; i < h->nr_cmds; i++) {
979 kfree(h->cmd_sg_list[i]);
980 h->cmd_sg_list[i] = NULL;
981 }
982 kfree(h->cmd_sg_list);
983 h->cmd_sg_list = NULL;
984}
985
986static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
987{
988 int i;
989
990 if (h->chainsize <= 0)
991 return 0;
992
993 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
994 GFP_KERNEL);
995 if (!h->cmd_sg_list)
996 return -ENOMEM;
997 for (i = 0; i < h->nr_cmds; i++) {
998 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
999 h->chainsize, GFP_KERNEL);
1000 if (!h->cmd_sg_list[i])
1001 goto clean;
1002 }
1003 return 0;
1004
1005clean:
1006 hpsa_free_sg_chain_blocks(h);
1007 return -ENOMEM;
1008}
1009
1010static void hpsa_map_sg_chain_block(struct ctlr_info *h,
1011 struct CommandList *c)
1012{
1013 struct SGDescriptor *chain_sg, *chain_block;
1014 u64 temp64;
1015
1016 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1017 chain_block = h->cmd_sg_list[c->cmdindex];
1018 chain_sg->Ext = HPSA_SG_CHAIN;
1019 chain_sg->Len = sizeof(*chain_sg) *
1020 (c->Header.SGTotal - h->max_cmd_sg_entries);
1021 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1022 PCI_DMA_TODEVICE);
1023 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1024 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1025}
1026
1027static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1028 struct CommandList *c)
1029{
1030 struct SGDescriptor *chain_sg;
1031 union u64bit temp64;
1032
1033 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1034 return;
1035
1036 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1037 temp64.val32.lower = chain_sg->Addr.lower;
1038 temp64.val32.upper = chain_sg->Addr.upper;
1039 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1040}
1041
1fb011fb 1042static void complete_scsi_command(struct CommandList *cp)
edd16368
SC		 1043{
1044 struct scsi_cmnd *cmd;
1045 struct ctlr_info *h;
1046 struct ErrorInfo *ei;
1047
1048 unsigned char sense_key;
1049 unsigned char asc; /* additional sense code */
1050 unsigned char ascq; /* additional sense code qualifier */
db111e18 1051 unsigned long sense_data_size;
edd16368
SC		 1052
1053 ei = cp->err_info;
1054 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1055 h = cp->h;
1056
1057 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 1058 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1059 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 1060
1061 cmd->result = (DID_OK << 16); /* host byte */
1062 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 1063 cmd->result |= ei->ScsiStatus;
edd16368
SC		 1064
1065 /* copy the sense data whether we need to or not. */
db111e18
SC		 1066 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1067 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1068 else
1069 sense_data_size = sizeof(ei->SenseInfo);
1070 if (ei->SenseLen < sense_data_size)
1071 sense_data_size = ei->SenseLen;
1072
1073 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
edd16368
SC		 1074 scsi_set_resid(cmd, ei->ResidualCnt);
1075
1076 if (ei->CommandStatus == 0) {
1077 cmd->scsi_done(cmd);
1078 cmd_free(h, cp);
1079 return;
1080 }
1081
1082 /* an error has occurred */
1083 switch (ei->CommandStatus) {
1084
1085 case CMD_TARGET_STATUS:
1086 if (ei->ScsiStatus) {
1087 /* Get sense key */
1088 sense_key = 0xf & ei->SenseInfo[2];
1089 /* Get additional sense code */
1090 asc = ei->SenseInfo[12];
1091 /* Get addition sense code qualifier */
1092 ascq = ei->SenseInfo[13];
1093 }
1094
1095 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1096 if (check_for_unit_attention(h, cp)) {
1097 cmd->result = DID_SOFT_ERROR << 16;
1098 break;
1099 }
1100 if (sense_key == ILLEGAL_REQUEST) {
1101 /*
1102 * SCSI REPORT_LUNS is commonly unsupported on
1103 * Smart Array. Suppress noisy complaint.
1104 */
1105 if (cp->Request.CDB[0] == REPORT_LUNS)
1106 break;
1107
1108 /* If ASC/ASCQ indicate Logical Unit
1109 * Not Supported condition,
1110 */
1111 if ((asc == 0x25) && (ascq == 0x0)) {
1112 dev_warn(&h->pdev->dev, "cp %p "
1113 "has check condition\n", cp);
1114 break;
1115 }
1116 }
1117
1118 if (sense_key == NOT_READY) {
1119 /* If Sense is Not Ready, Logical Unit
1120 * Not ready, Manual Intervention
1121 * required
1122 */
1123 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1124 dev_warn(&h->pdev->dev, "cp %p "
1125 "has check condition: unit "
1126 "not ready, manual "
1127 "intervention required\n", cp);
1128 break;
1129 }
1130 }
1d3b3609
MG		 1131 if (sense_key == ABORTED_COMMAND) {
1132 /* Aborted command is retryable */
1133 dev_warn(&h->pdev->dev, "cp %p "
1134 "has check condition: aborted command: "
1135 "ASC: 0x%x, ASCQ: 0x%x\n",
1136 cp, asc, ascq);
1137 cmd->result = DID_SOFT_ERROR << 16;
1138 break;
1139 }
edd16368
SC		 1140 /* Must be some other type of check condition */
1141 dev_warn(&h->pdev->dev, "cp %p has check condition: "
1142 "unknown type: "
1143 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1144 "Returning result: 0x%x, "
1145 "cmd=[%02x %02x %02x %02x %02x "
807be732 1146 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1147 "%02x %02x %02x %02x %02x]\n",
1148 cp, sense_key, asc, ascq,
1149 cmd->result,
1150 cmd->cmnd[0], cmd->cmnd[1],
1151 cmd->cmnd[2], cmd->cmnd[3],
1152 cmd->cmnd[4], cmd->cmnd[5],
1153 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1154 cmd->cmnd[8], cmd->cmnd[9],
1155 cmd->cmnd[10], cmd->cmnd[11],
1156 cmd->cmnd[12], cmd->cmnd[13],
1157 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1158 break;
1159 }
1160
1161
1162 /* Problem was not a check condition
1163 * Pass it up to the upper layers...
1164 */
1165 if (ei->ScsiStatus) {
1166 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1167 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1168 "Returning result: 0x%x\n",
1169 cp, ei->ScsiStatus,
1170 sense_key, asc, ascq,
1171 cmd->result);
1172 } else { /* scsi status is zero??? How??? */
1173 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1174 "Returning no connection.\n", cp),
1175
1176 /* Ordinarily, this case should never happen,
1177 * but there is a bug in some released firmware
1178 * revisions that allows it to happen if, for
1179 * example, a 4100 backplane loses power and
1180 * the tape drive is in it. We assume that
1181 * it's a fatal error of some kind because we
1182 * can't show that it wasn't. We will make it
1183 * look like selection timeout since that is
1184 * the most common reason for this to occur,
1185 * and it's severe enough.
1186 */
1187
1188 cmd->result = DID_NO_CONNECT << 16;
1189 }
1190 break;
1191
1192 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1193 break;
1194 case CMD_DATA_OVERRUN:
1195 dev_warn(&h->pdev->dev, "cp %p has"
1196 " completed with data overrun "
1197 "reported\n", cp);
1198 break;
1199 case CMD_INVALID: {
1200 /* print_bytes(cp, sizeof(*cp), 1, 0);
1201 print_cmd(cp); */
1202 /* We get CMD_INVALID if you address a non-existent device
1203 * instead of a selection timeout (no response). You will
1204 * see this if you yank out a drive, then try to access it.
1205 * This is kind of a shame because it means that any other
1206 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1207 * missing target. */
1208 cmd->result = DID_NO_CONNECT << 16;
1209 }
1210 break;
1211 case CMD_PROTOCOL_ERR:
1212 dev_warn(&h->pdev->dev, "cp %p has "
1213 "protocol error \n", cp);
1214 break;
1215 case CMD_HARDWARE_ERR:
1216 cmd->result = DID_ERROR << 16;
1217 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1218 break;
1219 case CMD_CONNECTION_LOST:
1220 cmd->result = DID_ERROR << 16;
1221 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1222 break;
1223 case CMD_ABORTED:
1224 cmd->result = DID_ABORT << 16;
1225 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1226 cp, ei->ScsiStatus);
1227 break;
1228 case CMD_ABORT_FAILED:
1229 cmd->result = DID_ERROR << 16;
1230 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1231 break;
1232 case CMD_UNSOLICITED_ABORT:
f6e76055
SC		 1233 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1234 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
edd16368
SC		 1235 "abort\n", cp);
1236 break;
1237 case CMD_TIMEOUT:
1238 cmd->result = DID_TIME_OUT << 16;
1239 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1240 break;
1d5e2ed0
SC		 1241 case CMD_UNABORTABLE:
1242 cmd->result = DID_ERROR << 16;
1243 dev_warn(&h->pdev->dev, "Command unabortable\n");
1244 break;
edd16368
SC		 1245 default:
1246 cmd->result = DID_ERROR << 16;
1247 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1248 cp, ei->CommandStatus);
1249 }
1250 cmd->scsi_done(cmd);
1251 cmd_free(h, cp);
1252}
1253
1254static int hpsa_scsi_detect(struct ctlr_info *h)
1255{
1256 struct Scsi_Host *sh;
1257 int error;
1258
1259 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
1260 if (sh == NULL)
1261 goto fail;
1262
1263 sh->io_port = 0;
1264 sh->n_io_port = 0;
1265 sh->this_id = -1;
1266 sh->max_channel = 3;
1267 sh->max_cmd_len = MAX_COMMAND_SIZE;
1268 sh->max_lun = HPSA_MAX_LUN;
1269 sh->max_id = HPSA_MAX_LUN;
303932fd
DB		 1270 sh->can_queue = h->nr_cmds;
1271 sh->cmd_per_lun = h->nr_cmds;
33a2ffce 1272 sh->sg_tablesize = h->maxsgentries;
edd16368
SC		 1273 h->scsi_host = sh;
1274 sh->hostdata[0] = (unsigned long) h;
a9a3a273 1275 sh->irq = h->intr[h->intr_mode];
edd16368
SC		 1276 sh->unique_id = sh->irq;
1277 error = scsi_add_host(sh, &h->pdev->dev);
1278 if (error)
1279 goto fail_host_put;
1280 scsi_scan_host(sh);
1281 return 0;
1282
1283 fail_host_put:
1284 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
1285 " failed for controller %d\n", h->ctlr);
1286 scsi_host_put(sh);
ecd9aad4 1287 return error;
edd16368
SC		 1288 fail:
1289 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
1290 " failed for controller %d\n", h->ctlr);
ecd9aad4 1291 return -ENOMEM;
edd16368
SC		 1292}
1293
1294static void hpsa_pci_unmap(struct pci_dev *pdev,
1295 struct CommandList *c, int sg_used, int data_direction)
1296{
1297 int i;
1298 union u64bit addr64;
1299
1300 for (i = 0; i < sg_used; i++) {
1301 addr64.val32.lower = c->SG[i].Addr.lower;
1302 addr64.val32.upper = c->SG[i].Addr.upper;
1303 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1304 data_direction);
1305 }
1306}
1307
1308static void hpsa_map_one(struct pci_dev *pdev,
1309 struct CommandList *cp,
1310 unsigned char *buf,
1311 size_t buflen,
1312 int data_direction)
1313{
01a02ffc 1314 u64 addr64;
edd16368
SC		 1315
1316 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1317 cp->Header.SGList = 0;
1318 cp->Header.SGTotal = 0;
1319 return;
1320 }
1321
01a02ffc 1322 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
edd16368 1323 cp->SG[0].Addr.lower =
01a02ffc 1324 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1325 cp->SG[0].Addr.upper =
01a02ffc 1326 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1327 cp->SG[0].Len = buflen;
01a02ffc
SC		 1328 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1329 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
edd16368
SC		 1330}
1331
1332static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1333 struct CommandList *c)
1334{
1335 DECLARE_COMPLETION_ONSTACK(wait);
1336
1337 c->waiting = &wait;
1338 enqueue_cmd_and_start_io(h, c);
1339 wait_for_completion(&wait);
1340}
1341
1342static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1343 struct CommandList *c, int data_direction)
1344{
1345 int retry_count = 0;
1346
1347 do {
7630abd0 1348 memset(c->err_info, 0, sizeof(*c->err_info));
edd16368
SC		 1349 hpsa_scsi_do_simple_cmd_core(h, c);
1350 retry_count++;
1351 } while (check_for_unit_attention(h, c) && retry_count <= 3);
1352 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1353}
1354
1355static void hpsa_scsi_interpret_error(struct CommandList *cp)
1356{
1357 struct ErrorInfo *ei;
1358 struct device *d = &cp->h->pdev->dev;
1359
1360 ei = cp->err_info;
1361 switch (ei->CommandStatus) {
1362 case CMD_TARGET_STATUS:
1363 dev_warn(d, "cmd %p has completed with errors\n", cp);
1364 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1365 ei->ScsiStatus);
1366 if (ei->ScsiStatus == 0)
1367 dev_warn(d, "SCSI status is abnormally zero. "
1368 "(probably indicates selection timeout "
1369 "reported incorrectly due to a known "
1370 "firmware bug, circa July, 2001.)\n");
1371 break;
1372 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1373 dev_info(d, "UNDERRUN\n");
1374 break;
1375 case CMD_DATA_OVERRUN:
1376 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1377 break;
1378 case CMD_INVALID: {
1379 /* controller unfortunately reports SCSI passthru's
1380 * to non-existent targets as invalid commands.
1381 */
1382 dev_warn(d, "cp %p is reported invalid (probably means "
1383 "target device no longer present)\n", cp);
1384 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1385 print_cmd(cp); */
1386 }
1387 break;
1388 case CMD_PROTOCOL_ERR:
1389 dev_warn(d, "cp %p has protocol error \n", cp);
1390 break;
1391 case CMD_HARDWARE_ERR:
1392 /* cmd->result = DID_ERROR << 16; */
1393 dev_warn(d, "cp %p had hardware error\n", cp);
1394 break;
1395 case CMD_CONNECTION_LOST:
1396 dev_warn(d, "cp %p had connection lost\n", cp);
1397 break;
1398 case CMD_ABORTED:
1399 dev_warn(d, "cp %p was aborted\n", cp);
1400 break;
1401 case CMD_ABORT_FAILED:
1402 dev_warn(d, "cp %p reports abort failed\n", cp);
1403 break;
1404 case CMD_UNSOLICITED_ABORT:
1405 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1406 break;
1407 case CMD_TIMEOUT:
1408 dev_warn(d, "cp %p timed out\n", cp);
1409 break;
1d5e2ed0
SC		 1410 case CMD_UNABORTABLE:
1411 dev_warn(d, "Command unabortable\n");
1412 break;
edd16368
SC		 1413 default:
1414 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1415 ei->CommandStatus);
1416 }
1417}
1418
1419static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1420 unsigned char page, unsigned char *buf,
1421 unsigned char bufsize)
1422{
1423 int rc = IO_OK;
1424 struct CommandList *c;
1425 struct ErrorInfo *ei;
1426
1427 c = cmd_special_alloc(h);
1428
1429 if (c == NULL) { /* trouble... */
1430 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1431 return -ENOMEM;
edd16368
SC		 1432 }
1433
1434 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1435 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1436 ei = c->err_info;
1437 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1438 hpsa_scsi_interpret_error(c);
1439 rc = -1;
1440 }
1441 cmd_special_free(h, c);
1442 return rc;
1443}
1444
1445static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1446{
1447 int rc = IO_OK;
1448 struct CommandList *c;
1449 struct ErrorInfo *ei;
1450
1451 c = cmd_special_alloc(h);
1452
1453 if (c == NULL) { /* trouble... */
1454 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1455 return -ENOMEM;
edd16368
SC		 1456 }
1457
1458 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1459 hpsa_scsi_do_simple_cmd_core(h, c);
1460 /* no unmap needed here because no data xfer. */
1461
1462 ei = c->err_info;
1463 if (ei->CommandStatus != 0) {
1464 hpsa_scsi_interpret_error(c);
1465 rc = -1;
1466 }
1467 cmd_special_free(h, c);
1468 return rc;
1469}
1470
1471static void hpsa_get_raid_level(struct ctlr_info *h,
1472 unsigned char *scsi3addr, unsigned char *raid_level)
1473{
1474 int rc;
1475 unsigned char *buf;
1476
1477 *raid_level = RAID_UNKNOWN;
1478 buf = kzalloc(64, GFP_KERNEL);
1479 if (!buf)
1480 return;
1481 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1482 if (rc == 0)
1483 *raid_level = buf[8];
1484 if (*raid_level > RAID_UNKNOWN)
1485 *raid_level = RAID_UNKNOWN;
1486 kfree(buf);
1487 return;
1488}
1489
1490/* Get the device id from inquiry page 0x83 */
1491static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1492 unsigned char *device_id, int buflen)
1493{
1494 int rc;
1495 unsigned char *buf;
1496
1497 if (buflen > 16)
1498 buflen = 16;
1499 buf = kzalloc(64, GFP_KERNEL);
1500 if (!buf)
1501 return -1;
1502 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1503 if (rc == 0)
1504 memcpy(device_id, &buf[8], buflen);
1505 kfree(buf);
1506 return rc != 0;
1507}
1508
1509static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1510 struct ReportLUNdata *buf, int bufsize,
1511 int extended_response)
1512{
1513 int rc = IO_OK;
1514 struct CommandList *c;
1515 unsigned char scsi3addr[8];
1516 struct ErrorInfo *ei;
1517
1518 c = cmd_special_alloc(h);
1519 if (c == NULL) { /* trouble... */
1520 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1521 return -1;
1522 }
e89c0ae7
SC		 1523 /* address the controller */
1524 memset(scsi3addr, 0, sizeof(scsi3addr));
edd16368
SC		 1525 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1526 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1527 if (extended_response)
1528 c->Request.CDB[1] = extended_response;
1529 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1530 ei = c->err_info;
1531 if (ei->CommandStatus != 0 &&
1532 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1533 hpsa_scsi_interpret_error(c);
1534 rc = -1;
1535 }
1536 cmd_special_free(h, c);
1537 return rc;
1538}
1539
1540static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1541 struct ReportLUNdata *buf,
1542 int bufsize, int extended_response)
1543{
1544 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1545}
1546
1547static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1548 struct ReportLUNdata *buf, int bufsize)
1549{
1550 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1551}
1552
1553static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1554 int bus, int target, int lun)
1555{
1556 device->bus = bus;
1557 device->target = target;
1558 device->lun = lun;
1559}
1560
1561static int hpsa_update_device_info(struct ctlr_info *h,
0b0e1d6c
SC		 1562 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1563 unsigned char *is_OBDR_device)
edd16368 1564{
0b0e1d6c
SC		 1565
1566#define OBDR_SIG_OFFSET 43
1567#define OBDR_TAPE_SIG "$DR-10"
1568#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1569#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1570
ea6d3bc3 1571 unsigned char *inq_buff;
0b0e1d6c 1572 unsigned char *obdr_sig;
edd16368 1573
ea6d3bc3 1574 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1575 if (!inq_buff)
1576 goto bail_out;
1577
edd16368
SC		 1578 /* Do an inquiry to the device to see what it is. */
1579 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1580 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1581 /* Inquiry failed (msg printed already) */
1582 dev_err(&h->pdev->dev,
1583 "hpsa_update_device_info: inquiry failed\n");
1584 goto bail_out;
1585 }
1586
edd16368
SC		 1587 this_device->devtype = (inq_buff[0] & 0x1f);
1588 memcpy(this_device->scsi3addr, scsi3addr, 8);
1589 memcpy(this_device->vendor, &inq_buff[8],
1590 sizeof(this_device->vendor));
1591 memcpy(this_device->model, &inq_buff[16],
1592 sizeof(this_device->model));
edd16368
SC		 1593 memset(this_device->device_id, 0,
1594 sizeof(this_device->device_id));
1595 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1596 sizeof(this_device->device_id));
1597
1598 if (this_device->devtype == TYPE_DISK &&
1599 is_logical_dev_addr_mode(scsi3addr))
1600 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1601 else
1602 this_device->raid_level = RAID_UNKNOWN;
1603
0b0e1d6c
SC		 1604 if (is_OBDR_device) {
1605 /* See if this is a One-Button-Disaster-Recovery device
1606 * by looking for "$DR-10" at offset 43 in inquiry data.
1607 */
1608 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1609 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1610 strncmp(obdr_sig, OBDR_TAPE_SIG,
1611 OBDR_SIG_LEN) == 0);
1612 }
1613
edd16368
SC		 1614 kfree(inq_buff);
1615 return 0;
1616
1617bail_out:
1618 kfree(inq_buff);
1619 return 1;
1620}
1621
1622static unsigned char *msa2xxx_model[] = {
1623 "MSA2012",
1624 "MSA2024",
1625 "MSA2312",
1626 "MSA2324",
fda38518 1627 "P2000 G3 SAS",
edd16368
SC		 1628 NULL,
1629};
1630
1631static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1632{
1633 int i;
1634
1635 for (i = 0; msa2xxx_model[i]; i++)
1636 if (strncmp(device->model, msa2xxx_model[i],
1637 strlen(msa2xxx_model[i])) == 0)
1638 return 1;
1639 return 0;
1640}
1641
1642/* Helper function to assign bus, target, lun mapping of devices.
1643 * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
1644 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1645 * Logical drive target and lun are assigned at this time, but
1646 * physical device lun and target assignment are deferred (assigned
1647 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1648 */
1649static void figure_bus_target_lun(struct ctlr_info *h,
01a02ffc 1650 u8 *lunaddrbytes, int *bus, int *target, int *lun,
edd16368
SC		 1651 struct hpsa_scsi_dev_t *device)
1652{
01a02ffc 1653 u32 lunid;
edd16368
SC		 1654
1655 if (is_logical_dev_addr_mode(lunaddrbytes)) {
1656 /* logical device */
339b2b14
SC		 1657 if (unlikely(is_scsi_rev_5(h))) {
1658 /* p1210m, logical drives lun assignments
1659 * match SCSI REPORT LUNS data.
1660 */
1661 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
edd16368 1662 *bus = 0;
339b2b14
SC		 1663 *target = 0;
1664 *lun = (lunid & 0x3fff) + 1;
1665 } else {
1666 /* not p1210m... */
1667 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1668 if (is_msa2xxx(h, device)) {
1669 /* msa2xxx way, put logicals on bus 1
1670 * and match target/lun numbers box
1671 * reports.
1672 */
1673 *bus = 1;
1674 *target = (lunid >> 16) & 0x3fff;
1675 *lun = lunid & 0x00ff;
1676 } else {
1677 /* Traditional smart array way. */
1678 *bus = 0;
1679 *lun = 0;
1680 *target = lunid & 0x3fff;
1681 }
edd16368
SC		 1682 }
1683 } else {
1684 /* physical device */
1685 if (is_hba_lunid(lunaddrbytes))
339b2b14
SC		 1686 if (unlikely(is_scsi_rev_5(h))) {
1687 *bus = 0; /* put p1210m ctlr at 0,0,0 */
1688 *target = 0;
1689 *lun = 0;
1690 return;
1691 } else
1692 *bus = 3; /* traditional smartarray */
edd16368 1693 else
339b2b14 1694 *bus = 2; /* physical disk */
edd16368
SC		 1695 *target = -1;
1696 *lun = -1; /* we will fill these in later. */
1697 }
1698}
1699
1700/*
1701 * If there is no lun 0 on a target, linux won't find any devices.
1702 * For the MSA2xxx boxes, we have to manually detect the enclosure
1703 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1704 * it for some reason. *tmpdevice is the target we're adding,
1705 * this_device is a pointer into the current element of currentsd[]
1706 * that we're building up in update_scsi_devices(), below.
1707 * lunzerobits is a bitmap that tracks which targets already have a
1708 * lun 0 assigned.
1709 * Returns 1 if an enclosure was added, 0 if not.
1710 */
1711static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
1712 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1713 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
edd16368
SC		 1714 int bus, int target, int lun, unsigned long lunzerobits[],
1715 int *nmsa2xxx_enclosures)
1716{
1717 unsigned char scsi3addr[8];
1718
1719 if (test_bit(target, lunzerobits))
1720 return 0; /* There is already a lun 0 on this target. */
1721
1722 if (!is_logical_dev_addr_mode(lunaddrbytes))
1723 return 0; /* It's the logical targets that may lack lun 0. */
1724
1725 if (!is_msa2xxx(h, tmpdevice))
1726 return 0; /* It's only the MSA2xxx that have this problem. */
1727
1728 if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
1729 return 0;
1730
c4f8a299
SC		 1731 memset(scsi3addr, 0, 8);
1732 scsi3addr[3] = target;
edd16368
SC		 1733 if (is_hba_lunid(scsi3addr))
1734 return 0; /* Don't add the RAID controller here. */
1735
339b2b14
SC		 1736 if (is_scsi_rev_5(h))
1737 return 0; /* p1210m doesn't need to do this. */
1738
edd16368
SC		 1739#define MAX_MSA2XXX_ENCLOSURES 32
1740 if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
1741 dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
1742 "enclosures exceeded. Check your hardware "
1743 "configuration.");
1744 return 0;
1745 }
1746
0b0e1d6c 1747 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
edd16368
SC		 1748 return 0;
1749 (*nmsa2xxx_enclosures)++;
1750 hpsa_set_bus_target_lun(this_device, bus, target, 0);
1751 set_bit(target, lunzerobits);
1752 return 1;
1753}
1754
1755/*
1756 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1757 * logdev. The number of luns in physdev and logdev are returned in
1758 * *nphysicals and *nlogicals, respectively.
1759 * Returns 0 on success, -1 otherwise.
1760 */
1761static int hpsa_gather_lun_info(struct ctlr_info *h,
1762 int reportlunsize,
01a02ffc
SC		 1763 struct ReportLUNdata *physdev, u32 *nphysicals,
1764 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC		 1765{
1766 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1767 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1768 return -1;
1769 }
6df1e954 1770 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC		 1771 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1772 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1773 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1774 *nphysicals - HPSA_MAX_PHYS_LUN);
1775 *nphysicals = HPSA_MAX_PHYS_LUN;
1776 }
1777 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1778 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1779 return -1;
1780 }
6df1e954 1781 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1782 /* Reject Logicals in excess of our max capability. */
1783 if (*nlogicals > HPSA_MAX_LUN) {
1784 dev_warn(&h->pdev->dev,
1785 "maximum logical LUNs (%d) exceeded. "
1786 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1787 *nlogicals - HPSA_MAX_LUN);
1788 *nlogicals = HPSA_MAX_LUN;
1789 }
1790 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1791 dev_warn(&h->pdev->dev,
1792 "maximum logical + physical LUNs (%d) exceeded. "
1793 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1794 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1795 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1796 }
1797 return 0;
1798}
1799
339b2b14
SC		 1800u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1801 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1802 struct ReportLUNdata *logdev_list)
1803{
1804 /* Helper function, figure out where the LUN ID info is coming from
1805 * given index i, lists of physical and logical devices, where in
1806 * the list the raid controller is supposed to appear (first or last)
1807 */
1808
1809 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1810 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1811
1812 if (i == raid_ctlr_position)
1813 return RAID_CTLR_LUNID;
1814
1815 if (i < logicals_start)
1816 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1817
1818 if (i < last_device)
1819 return &logdev_list->LUN[i - nphysicals -
1820 (raid_ctlr_position == 0)][0];
1821 BUG();
1822 return NULL;
1823}
1824
edd16368
SC		 1825static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1826{
1827 /* the idea here is we could get notified
1828 * that some devices have changed, so we do a report
1829 * physical luns and report logical luns cmd, and adjust
1830 * our list of devices accordingly.
1831 *
1832 * The scsi3addr's of devices won't change so long as the
1833 * adapter is not reset. That means we can rescan and
1834 * tell which devices we already know about, vs. new
1835 * devices, vs. disappearing devices.
1836 */
1837 struct ReportLUNdata *physdev_list = NULL;
1838 struct ReportLUNdata *logdev_list = NULL;
01a02ffc
SC		 1839 u32 nphysicals = 0;
1840 u32 nlogicals = 0;
1841 u32 ndev_allocated = 0;
edd16368
SC		 1842 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1843 int ncurrent = 0;
1844 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1845 int i, nmsa2xxx_enclosures, ndevs_to_allocate;
1846 int bus, target, lun;
339b2b14 1847 int raid_ctlr_position;
edd16368
SC		 1848 DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
1849
1850 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
1851 GFP_KERNEL);
1852 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1853 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
edd16368
SC		 1854 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1855
0b0e1d6c 1856 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
edd16368
SC		 1857 dev_err(&h->pdev->dev, "out of memory\n");
1858 goto out;
1859 }
1860 memset(lunzerobits, 0, sizeof(lunzerobits));
1861
1862 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1863 logdev_list, &nlogicals))
1864 goto out;
1865
1866 /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
1867 * but each of them 4 times through different paths. The plus 1
1868 * is for the RAID controller.
1869 */
1870 ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
1871
1872 /* Allocate the per device structures */
1873 for (i = 0; i < ndevs_to_allocate; i++) {
1874 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1875 if (!currentsd[i]) {
1876 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1877 __FILE__, __LINE__);
1878 goto out;
1879 }
1880 ndev_allocated++;
1881 }
1882
339b2b14
SC		 1883 if (unlikely(is_scsi_rev_5(h)))
1884 raid_ctlr_position = 0;
1885 else
1886 raid_ctlr_position = nphysicals + nlogicals;
1887
edd16368
SC		 1888 /* adjust our table of devices */
1889 nmsa2xxx_enclosures = 0;
1890 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
0b0e1d6c 1891 u8 *lunaddrbytes, is_OBDR = 0;
edd16368
SC		 1892
1893 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 1894 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1895 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 1896 /* skip masked physical devices. */
339b2b14
SC		 1897 if (lunaddrbytes[3] & 0xC0 &&
1898 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 1899 continue;
1900
1901 /* Get device type, vendor, model, device id */
0b0e1d6c
SC		 1902 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
1903 &is_OBDR))
edd16368
SC		 1904 continue; /* skip it if we can't talk to it. */
1905 figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
1906 tmpdevice);
1907 this_device = currentsd[ncurrent];
1908
1909 /*
1910 * For the msa2xxx boxes, we have to insert a LUN 0 which
1911 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1912 * is nonetheless an enclosure device there. We have to
1913 * present that otherwise linux won't find anything if
1914 * there is no lun 0.
1915 */
1916 if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
1917 lunaddrbytes, bus, target, lun, lunzerobits,
1918 &nmsa2xxx_enclosures)) {
1919 ncurrent++;
1920 this_device = currentsd[ncurrent];
1921 }
1922
1923 *this_device = *tmpdevice;
1924 hpsa_set_bus_target_lun(this_device, bus, target, lun);
1925
1926 switch (this_device->devtype) {
0b0e1d6c 1927 case TYPE_ROM:
edd16368
SC		 1928 /* We don't *really* support actual CD-ROM devices,
1929 * just "One Button Disaster Recovery" tape drive
1930 * which temporarily pretends to be a CD-ROM drive.
1931 * So we check that the device is really an OBDR tape
1932 * device by checking for "$DR-10" in bytes 43-48 of
1933 * the inquiry data.
1934 */
0b0e1d6c
SC		 1935 if (is_OBDR)
1936 ncurrent++;
edd16368
SC		 1937 break;
1938 case TYPE_DISK:
1939 if (i < nphysicals)
1940 break;
1941 ncurrent++;
1942 break;
1943 case TYPE_TAPE:
1944 case TYPE_MEDIUM_CHANGER:
1945 ncurrent++;
1946 break;
1947 case TYPE_RAID:
1948 /* Only present the Smartarray HBA as a RAID controller.
1949 * If it's a RAID controller other than the HBA itself
1950 * (an external RAID controller, MSA500 or similar)
1951 * don't present it.
1952 */
1953 if (!is_hba_lunid(lunaddrbytes))
1954 break;
1955 ncurrent++;
1956 break;
1957 default:
1958 break;
1959 }
1960 if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
1961 break;
1962 }
1963 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
1964out:
1965 kfree(tmpdevice);
1966 for (i = 0; i < ndev_allocated; i++)
1967 kfree(currentsd[i]);
1968 kfree(currentsd);
edd16368
SC		 1969 kfree(physdev_list);
1970 kfree(logdev_list);
edd16368
SC		 1971}
1972
1973/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
1974 * dma mapping and fills in the scatter gather entries of the
1975 * hpsa command, cp.
1976 */
33a2ffce 1977static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 1978 struct CommandList *cp,
1979 struct scsi_cmnd *cmd)
1980{
1981 unsigned int len;
1982 struct scatterlist *sg;
01a02ffc 1983 u64 addr64;
33a2ffce
SC		 1984 int use_sg, i, sg_index, chained;
1985 struct SGDescriptor *curr_sg;
edd16368 1986
33a2ffce 1987 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 1988
1989 use_sg = scsi_dma_map(cmd);
1990 if (use_sg < 0)
1991 return use_sg;
1992
1993 if (!use_sg)
1994 goto sglist_finished;
1995
33a2ffce
SC		 1996 curr_sg = cp->SG;
1997 chained = 0;
1998 sg_index = 0;
edd16368 1999 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 2000 if (i == h->max_cmd_sg_entries - 1 &&
2001 use_sg > h->max_cmd_sg_entries) {
2002 chained = 1;
2003 curr_sg = h->cmd_sg_list[cp->cmdindex];
2004 sg_index = 0;
2005 }
01a02ffc 2006 addr64 = (u64) sg_dma_address(sg);
edd16368 2007 len = sg_dma_len(sg);
33a2ffce
SC		 2008 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2009 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2010 curr_sg->Len = len;
2011 curr_sg->Ext = 0; /* we are not chaining */
2012 curr_sg++;
2013 }
2014
2015 if (use_sg + chained > h->maxSG)
2016 h->maxSG = use_sg + chained;
2017
2018 if (chained) {
2019 cp->Header.SGList = h->max_cmd_sg_entries;
2020 cp->Header.SGTotal = (u16) (use_sg + 1);
2021 hpsa_map_sg_chain_block(h, cp);
2022 return 0;
edd16368
SC		 2023 }
2024
2025sglist_finished:
2026
01a02ffc
SC		 2027 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2028 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 2029 return 0;
2030}
2031
2032
f281233d 2033static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC		 2034 void (*done)(struct scsi_cmnd *))
2035{
2036 struct ctlr_info *h;
2037 struct hpsa_scsi_dev_t *dev;
2038 unsigned char scsi3addr[8];
2039 struct CommandList *c;
2040 unsigned long flags;
2041
2042 /* Get the ptr to our adapter structure out of cmd->host. */
2043 h = sdev_to_hba(cmd->device);
2044 dev = cmd->device->hostdata;
2045 if (!dev) {
2046 cmd->result = DID_NO_CONNECT << 16;
2047 done(cmd);
2048 return 0;
2049 }
2050 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2051
2052 /* Need a lock as this is being allocated from the pool */
2053 spin_lock_irqsave(&h->lock, flags);
2054 c = cmd_alloc(h);
2055 spin_unlock_irqrestore(&h->lock, flags);
2056 if (c == NULL) { /* trouble... */
2057 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2058 return SCSI_MLQUEUE_HOST_BUSY;
2059 }
2060
2061 /* Fill in the command list header */
2062
2063 cmd->scsi_done = done; /* save this for use by completion code */
2064
2065 /* save c in case we have to abort it */
2066 cmd->host_scribble = (unsigned char *) c;
2067
2068 c->cmd_type = CMD_SCSI;
2069 c->scsi_cmd = cmd;
2070 c->Header.ReplyQueue = 0; /* unused in simple mode */
2071 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 2072 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2073 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 2074
2075 /* Fill in the request block... */
2076
2077 c->Request.Timeout = 0;
2078 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2079 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2080 c->Request.CDBLen = cmd->cmd_len;
2081 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2082 c->Request.Type.Type = TYPE_CMD;
2083 c->Request.Type.Attribute = ATTR_SIMPLE;
2084 switch (cmd->sc_data_direction) {
2085 case DMA_TO_DEVICE:
2086 c->Request.Type.Direction = XFER_WRITE;
2087 break;
2088 case DMA_FROM_DEVICE:
2089 c->Request.Type.Direction = XFER_READ;
2090 break;
2091 case DMA_NONE:
2092 c->Request.Type.Direction = XFER_NONE;
2093 break;
2094 case DMA_BIDIRECTIONAL:
2095 /* This can happen if a buggy application does a scsi passthru
2096 * and sets both inlen and outlen to non-zero. ( see
2097 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2098 */
2099
2100 c->Request.Type.Direction = XFER_RSVD;
2101 /* This is technically wrong, and hpsa controllers should
2102 * reject it with CMD_INVALID, which is the most correct
2103 * response, but non-fibre backends appear to let it
2104 * slide by, and give the same results as if this field
2105 * were set correctly. Either way is acceptable for
2106 * our purposes here.
2107 */
2108
2109 break;
2110
2111 default:
2112 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2113 cmd->sc_data_direction);
2114 BUG();
2115 break;
2116 }
2117
33a2ffce 2118 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2119 cmd_free(h, c);
2120 return SCSI_MLQUEUE_HOST_BUSY;
2121 }
2122 enqueue_cmd_and_start_io(h, c);
2123 /* the cmd'll come back via intr handler in complete_scsi_command() */
2124 return 0;
2125}
2126
f281233d
JG		 2127static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2128
a08a8471
SC		 2129static void hpsa_scan_start(struct Scsi_Host *sh)
2130{
2131 struct ctlr_info *h = shost_to_hba(sh);
2132 unsigned long flags;
2133
2134 /* wait until any scan already in progress is finished. */
2135 while (1) {
2136 spin_lock_irqsave(&h->scan_lock, flags);
2137 if (h->scan_finished)
2138 break;
2139 spin_unlock_irqrestore(&h->scan_lock, flags);
2140 wait_event(h->scan_wait_queue, h->scan_finished);
2141 /* Note: We don't need to worry about a race between this
2142 * thread and driver unload because the midlayer will
2143 * have incremented the reference count, so unload won't
2144 * happen if we're in here.
2145 */
2146 }
2147 h->scan_finished = 0; /* mark scan as in progress */
2148 spin_unlock_irqrestore(&h->scan_lock, flags);
2149
2150 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2151
2152 spin_lock_irqsave(&h->scan_lock, flags);
2153 h->scan_finished = 1; /* mark scan as finished. */
2154 wake_up_all(&h->scan_wait_queue);
2155 spin_unlock_irqrestore(&h->scan_lock, flags);
2156}
2157
2158static int hpsa_scan_finished(struct Scsi_Host *sh,
2159 unsigned long elapsed_time)
2160{
2161 struct ctlr_info *h = shost_to_hba(sh);
2162 unsigned long flags;
2163 int finished;
2164
2165 spin_lock_irqsave(&h->scan_lock, flags);
2166 finished = h->scan_finished;
2167 spin_unlock_irqrestore(&h->scan_lock, flags);
2168 return finished;
2169}
2170
667e23d4
SC		 2171static int hpsa_change_queue_depth(struct scsi_device *sdev,
2172 int qdepth, int reason)
2173{
2174 struct ctlr_info *h = sdev_to_hba(sdev);
2175
2176 if (reason != SCSI_QDEPTH_DEFAULT)
2177 return -ENOTSUPP;
2178
2179 if (qdepth < 1)
2180 qdepth = 1;
2181 else
2182 if (qdepth > h->nr_cmds)
2183 qdepth = h->nr_cmds;
2184 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2185 return sdev->queue_depth;
2186}
2187
edd16368
SC		 2188static void hpsa_unregister_scsi(struct ctlr_info *h)
2189{
2190 /* we are being forcibly unloaded, and may not refuse. */
2191 scsi_remove_host(h->scsi_host);
2192 scsi_host_put(h->scsi_host);
2193 h->scsi_host = NULL;
2194}
2195
2196static int hpsa_register_scsi(struct ctlr_info *h)
2197{
2198 int rc;
2199
edd16368
SC		 2200 rc = hpsa_scsi_detect(h);
2201 if (rc != 0)
2202 dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
2203 " hpsa_scsi_detect(), rc is %d\n", rc);
2204 return rc;
2205}
2206
2207static int wait_for_device_to_become_ready(struct ctlr_info *h,
2208 unsigned char lunaddr[])
2209{
2210 int rc = 0;
2211 int count = 0;
2212 int waittime = 1; /* seconds */
2213 struct CommandList *c;
2214
2215 c = cmd_special_alloc(h);
2216 if (!c) {
2217 dev_warn(&h->pdev->dev, "out of memory in "
2218 "wait_for_device_to_become_ready.\n");
2219 return IO_ERROR;
2220 }
2221
2222 /* Send test unit ready until device ready, or give up. */
2223 while (count < HPSA_TUR_RETRY_LIMIT) {
2224
2225 /* Wait for a bit. do this first, because if we send
2226 * the TUR right away, the reset will just abort it.
2227 */
2228 msleep(1000 * waittime);
2229 count++;
2230
2231 /* Increase wait time with each try, up to a point. */
2232 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2233 waittime = waittime * 2;
2234
2235 /* Send the Test Unit Ready */
2236 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2237 hpsa_scsi_do_simple_cmd_core(h, c);
2238 /* no unmap needed here because no data xfer. */
2239
2240 if (c->err_info->CommandStatus == CMD_SUCCESS)
2241 break;
2242
2243 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2244 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2245 (c->err_info->SenseInfo[2] == NO_SENSE ||
2246 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2247 break;
2248
2249 dev_warn(&h->pdev->dev, "waiting %d secs "
2250 "for device to become ready.\n", waittime);
2251 rc = 1; /* device not ready. */
2252 }
2253
2254 if (rc)
2255 dev_warn(&h->pdev->dev, "giving up on device.\n");
2256 else
2257 dev_warn(&h->pdev->dev, "device is ready.\n");
2258
2259 cmd_special_free(h, c);
2260 return rc;
2261}
2262
2263/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2264 * complaining. Doing a host- or bus-reset can't do anything good here.
2265 */
2266static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2267{
2268 int rc;
2269 struct ctlr_info *h;
2270 struct hpsa_scsi_dev_t *dev;
2271
2272 /* find the controller to which the command to be aborted was sent */
2273 h = sdev_to_hba(scsicmd->device);
2274 if (h == NULL) /* paranoia */
2275 return FAILED;
edd16368
SC		 2276 dev = scsicmd->device->hostdata;
2277 if (!dev) {
2278 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2279 "device lookup failed.\n");
2280 return FAILED;
2281 }
d416b0c7
SC		 2282 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2283 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2284 /* send a reset to the SCSI LUN which the command was sent to */
2285 rc = hpsa_send_reset(h, dev->scsi3addr);
2286 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2287 return SUCCESS;
2288
2289 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2290 return FAILED;
2291}
2292
2293/*
2294 * For operations that cannot sleep, a command block is allocated at init,
2295 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2296 * which ones are free or in use. Lock must be held when calling this.
2297 * cmd_free() is the complement.
2298 */
2299static struct CommandList *cmd_alloc(struct ctlr_info *h)
2300{
2301 struct CommandList *c;
2302 int i;
2303 union u64bit temp64;
2304 dma_addr_t cmd_dma_handle, err_dma_handle;
2305
2306 do {
2307 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2308 if (i == h->nr_cmds)
2309 return NULL;
2310 } while (test_and_set_bit
2311 (i & (BITS_PER_LONG - 1),
2312 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2313 c = h->cmd_pool + i;
2314 memset(c, 0, sizeof(*c));
2315 cmd_dma_handle = h->cmd_pool_dhandle
2316 + i * sizeof(*c);
2317 c->err_info = h->errinfo_pool + i;
2318 memset(c->err_info, 0, sizeof(*c->err_info));
2319 err_dma_handle = h->errinfo_pool_dhandle
2320 + i * sizeof(*c->err_info);
2321 h->nr_allocs++;
2322
2323 c->cmdindex = i;
2324
9e0fc764 2325 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2326 c->busaddr = (u32) cmd_dma_handle;
2327 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2328 c->ErrDesc.Addr.lower = temp64.val32.lower;
2329 c->ErrDesc.Addr.upper = temp64.val32.upper;
2330 c->ErrDesc.Len = sizeof(*c->err_info);
2331
2332 c->h = h;
2333 return c;
2334}
2335
2336/* For operations that can wait for kmalloc to possibly sleep,
2337 * this routine can be called. Lock need not be held to call
2338 * cmd_special_alloc. cmd_special_free() is the complement.
2339 */
2340static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2341{
2342 struct CommandList *c;
2343 union u64bit temp64;
2344 dma_addr_t cmd_dma_handle, err_dma_handle;
2345
2346 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2347 if (c == NULL)
2348 return NULL;
2349 memset(c, 0, sizeof(*c));
2350
2351 c->cmdindex = -1;
2352
2353 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2354 &err_dma_handle);
2355
2356 if (c->err_info == NULL) {
2357 pci_free_consistent(h->pdev,
2358 sizeof(*c), c, cmd_dma_handle);
2359 return NULL;
2360 }
2361 memset(c->err_info, 0, sizeof(*c->err_info));
2362
9e0fc764 2363 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2364 c->busaddr = (u32) cmd_dma_handle;
2365 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2366 c->ErrDesc.Addr.lower = temp64.val32.lower;
2367 c->ErrDesc.Addr.upper = temp64.val32.upper;
2368 c->ErrDesc.Len = sizeof(*c->err_info);
2369
2370 c->h = h;
2371 return c;
2372}
2373
2374static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2375{
2376 int i;
2377
2378 i = c - h->cmd_pool;
2379 clear_bit(i & (BITS_PER_LONG - 1),
2380 h->cmd_pool_bits + (i / BITS_PER_LONG));
2381 h->nr_frees++;
2382}
2383
2384static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2385{
2386 union u64bit temp64;
2387
2388 temp64.val32.lower = c->ErrDesc.Addr.lower;
2389 temp64.val32.upper = c->ErrDesc.Addr.upper;
2390 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2391 c->err_info, (dma_addr_t) temp64.val);
2392 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2393 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC		 2394}
2395
2396#ifdef CONFIG_COMPAT
2397
edd16368
SC		 2398static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2399{
2400 IOCTL32_Command_struct __user *arg32 =
2401 (IOCTL32_Command_struct __user *) arg;
2402 IOCTL_Command_struct arg64;
2403 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2404 int err;
2405 u32 cp;
2406
938abd84 2407 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2408 err = 0;
2409 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2410 sizeof(arg64.LUN_info));
2411 err |= copy_from_user(&arg64.Request, &arg32->Request,
2412 sizeof(arg64.Request));
2413 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2414 sizeof(arg64.error_info));
2415 err |= get_user(arg64.buf_size, &arg32->buf_size);
2416 err |= get_user(cp, &arg32->buf);
2417 arg64.buf = compat_ptr(cp);
2418 err |= copy_to_user(p, &arg64, sizeof(arg64));
2419
2420 if (err)
2421 return -EFAULT;
2422
e39eeaed 2423 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2424 if (err)
2425 return err;
2426 err |= copy_in_user(&arg32->error_info, &p->error_info,
2427 sizeof(arg32->error_info));
2428 if (err)
2429 return -EFAULT;
2430 return err;
2431}
2432
2433static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2434 int cmd, void *arg)
2435{
2436 BIG_IOCTL32_Command_struct __user *arg32 =
2437 (BIG_IOCTL32_Command_struct __user *) arg;
2438 BIG_IOCTL_Command_struct arg64;
2439 BIG_IOCTL_Command_struct __user *p =
2440 compat_alloc_user_space(sizeof(arg64));
2441 int err;
2442 u32 cp;
2443
938abd84 2444 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2445 err = 0;
2446 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2447 sizeof(arg64.LUN_info));
2448 err |= copy_from_user(&arg64.Request, &arg32->Request,
2449 sizeof(arg64.Request));
2450 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2451 sizeof(arg64.error_info));
2452 err |= get_user(arg64.buf_size, &arg32->buf_size);
2453 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2454 err |= get_user(cp, &arg32->buf);
2455 arg64.buf = compat_ptr(cp);
2456 err |= copy_to_user(p, &arg64, sizeof(arg64));
2457
2458 if (err)
2459 return -EFAULT;
2460
e39eeaed 2461 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2462 if (err)
2463 return err;
2464 err |= copy_in_user(&arg32->error_info, &p->error_info,
2465 sizeof(arg32->error_info));
2466 if (err)
2467 return -EFAULT;
2468 return err;
2469}
71fe75a7
SC		 2470
2471static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2472{
2473 switch (cmd) {
2474 case CCISS_GETPCIINFO:
2475 case CCISS_GETINTINFO:
2476 case CCISS_SETINTINFO:
2477 case CCISS_GETNODENAME:
2478 case CCISS_SETNODENAME:
2479 case CCISS_GETHEARTBEAT:
2480 case CCISS_GETBUSTYPES:
2481 case CCISS_GETFIRMVER:
2482 case CCISS_GETDRIVVER:
2483 case CCISS_REVALIDVOLS:
2484 case CCISS_DEREGDISK:
2485 case CCISS_REGNEWDISK:
2486 case CCISS_REGNEWD:
2487 case CCISS_RESCANDISK:
2488 case CCISS_GETLUNINFO:
2489 return hpsa_ioctl(dev, cmd, arg);
2490
2491 case CCISS_PASSTHRU32:
2492 return hpsa_ioctl32_passthru(dev, cmd, arg);
2493 case CCISS_BIG_PASSTHRU32:
2494 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2495
2496 default:
2497 return -ENOIOCTLCMD;
2498 }
2499}
edd16368
SC		 2500#endif
2501
2502static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2503{
2504 struct hpsa_pci_info pciinfo;
2505
2506 if (!argp)
2507 return -EINVAL;
2508 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2509 pciinfo.bus = h->pdev->bus->number;
2510 pciinfo.dev_fn = h->pdev->devfn;
2511 pciinfo.board_id = h->board_id;
2512 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2513 return -EFAULT;
2514 return 0;
2515}
2516
2517static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2518{
2519 DriverVer_type DriverVer;
2520 unsigned char vmaj, vmin, vsubmin;
2521 int rc;
2522
2523 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2524 &vmaj, &vmin, &vsubmin);
2525 if (rc != 3) {
2526 dev_info(&h->pdev->dev, "driver version string '%s' "
2527 "unrecognized.", HPSA_DRIVER_VERSION);
2528 vmaj = 0;
2529 vmin = 0;
2530 vsubmin = 0;
2531 }
2532 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2533 if (!argp)
2534 return -EINVAL;
2535 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2536 return -EFAULT;
2537 return 0;
2538}
2539
2540static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2541{
2542 IOCTL_Command_struct iocommand;
2543 struct CommandList *c;
2544 char *buff = NULL;
2545 union u64bit temp64;
2546
2547 if (!argp)
2548 return -EINVAL;
2549 if (!capable(CAP_SYS_RAWIO))
2550 return -EPERM;
2551 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2552 return -EFAULT;
2553 if ((iocommand.buf_size < 1) &&
2554 (iocommand.Request.Type.Direction != XFER_NONE)) {
2555 return -EINVAL;
2556 }
2557 if (iocommand.buf_size > 0) {
2558 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2559 if (buff == NULL)
2560 return -EFAULT;
b03a7771
SC		 2561 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2562 /* Copy the data into the buffer we created */
2563 if (copy_from_user(buff, iocommand.buf,
2564 iocommand.buf_size)) {
2565 kfree(buff);
2566 return -EFAULT;
2567 }
2568 } else {
2569 memset(buff, 0, iocommand.buf_size);
edd16368 2570 }
b03a7771 2571 }
edd16368
SC		 2572 c = cmd_special_alloc(h);
2573 if (c == NULL) {
2574 kfree(buff);
2575 return -ENOMEM;
2576 }
2577 /* Fill in the command type */
2578 c->cmd_type = CMD_IOCTL_PEND;
2579 /* Fill in Command Header */
2580 c->Header.ReplyQueue = 0; /* unused in simple mode */
2581 if (iocommand.buf_size > 0) { /* buffer to fill */
2582 c->Header.SGList = 1;
2583 c->Header.SGTotal = 1;
2584 } else { /* no buffers to fill */
2585 c->Header.SGList = 0;
2586 c->Header.SGTotal = 0;
2587 }
2588 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2589 /* use the kernel address the cmd block for tag */
2590 c->Header.Tag.lower = c->busaddr;
2591
2592 /* Fill in Request block */
2593 memcpy(&c->Request, &iocommand.Request,
2594 sizeof(c->Request));
2595
2596 /* Fill in the scatter gather information */
2597 if (iocommand.buf_size > 0) {
2598 temp64.val = pci_map_single(h->pdev, buff,
2599 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2600 c->SG[0].Addr.lower = temp64.val32.lower;
2601 c->SG[0].Addr.upper = temp64.val32.upper;
2602 c->SG[0].Len = iocommand.buf_size;
2603 c->SG[0].Ext = 0; /* we are not chaining*/
2604 }
2605 hpsa_scsi_do_simple_cmd_core(h, c);
c2dd32e0
SC		 2606 if (iocommand.buf_size > 0)
2607 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 2608 check_ioctl_unit_attention(h, c);
2609
2610 /* Copy the error information out */
2611 memcpy(&iocommand.error_info, c->err_info,
2612 sizeof(iocommand.error_info));
2613 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2614 kfree(buff);
2615 cmd_special_free(h, c);
2616 return -EFAULT;
2617 }
b03a7771
SC		 2618 if (iocommand.Request.Type.Direction == XFER_READ &&
2619 iocommand.buf_size > 0) {
edd16368
SC		 2620 /* Copy the data out of the buffer we created */
2621 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2622 kfree(buff);
2623 cmd_special_free(h, c);
2624 return -EFAULT;
2625 }
2626 }
2627 kfree(buff);
2628 cmd_special_free(h, c);
2629 return 0;
2630}
2631
2632static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2633{
2634 BIG_IOCTL_Command_struct *ioc;
2635 struct CommandList *c;
2636 unsigned char **buff = NULL;
2637 int *buff_size = NULL;
2638 union u64bit temp64;
2639 BYTE sg_used = 0;
2640 int status = 0;
2641 int i;
01a02ffc
SC		 2642 u32 left;
2643 u32 sz;
edd16368
SC		 2644 BYTE __user *data_ptr;
2645
2646 if (!argp)
2647 return -EINVAL;
2648 if (!capable(CAP_SYS_RAWIO))
2649 return -EPERM;
2650 ioc = (BIG_IOCTL_Command_struct *)
2651 kmalloc(sizeof(*ioc), GFP_KERNEL);
2652 if (!ioc) {
2653 status = -ENOMEM;
2654 goto cleanup1;
2655 }
2656 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2657 status = -EFAULT;
2658 goto cleanup1;
2659 }
2660 if ((ioc->buf_size < 1) &&
2661 (ioc->Request.Type.Direction != XFER_NONE)) {
2662 status = -EINVAL;
2663 goto cleanup1;
2664 }
2665 /* Check kmalloc limits using all SGs */
2666 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
2667 status = -EINVAL;
2668 goto cleanup1;
2669 }
2670 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
2671 status = -EINVAL;
2672 goto cleanup1;
2673 }
2674 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
2675 if (!buff) {
2676 status = -ENOMEM;
2677 goto cleanup1;
2678 }
2679 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
2680 if (!buff_size) {
2681 status = -ENOMEM;
2682 goto cleanup1;
2683 }
2684 left = ioc->buf_size;
2685 data_ptr = ioc->buf;
2686 while (left) {
2687 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
2688 buff_size[sg_used] = sz;
2689 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
2690 if (buff[sg_used] == NULL) {
2691 status = -ENOMEM;
2692 goto cleanup1;
2693 }
2694 if (ioc->Request.Type.Direction == XFER_WRITE) {
2695 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
2696 status = -ENOMEM;
2697 goto cleanup1;
2698 }
2699 } else
2700 memset(buff[sg_used], 0, sz);
2701 left -= sz;
2702 data_ptr += sz;
2703 sg_used++;
2704 }
2705 c = cmd_special_alloc(h);
2706 if (c == NULL) {
2707 status = -ENOMEM;
2708 goto cleanup1;
2709 }
2710 c->cmd_type = CMD_IOCTL_PEND;
2711 c->Header.ReplyQueue = 0;
b03a7771 2712 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC		 2713 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
2714 c->Header.Tag.lower = c->busaddr;
2715 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
2716 if (ioc->buf_size > 0) {
2717 int i;
2718 for (i = 0; i < sg_used; i++) {
2719 temp64.val = pci_map_single(h->pdev, buff[i],
2720 buff_size[i], PCI_DMA_BIDIRECTIONAL);
2721 c->SG[i].Addr.lower = temp64.val32.lower;
2722 c->SG[i].Addr.upper = temp64.val32.upper;
2723 c->SG[i].Len = buff_size[i];
2724 /* we are not chaining */
2725 c->SG[i].Ext = 0;
2726 }
2727 }
2728 hpsa_scsi_do_simple_cmd_core(h, c);
b03a7771
SC		 2729 if (sg_used)
2730 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 2731 check_ioctl_unit_attention(h, c);
2732 /* Copy the error information out */
2733 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
2734 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
2735 cmd_special_free(h, c);
2736 status = -EFAULT;
2737 goto cleanup1;
2738 }
b03a7771 2739 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC		 2740 /* Copy the data out of the buffer we created */
2741 BYTE __user *ptr = ioc->buf;
2742 for (i = 0; i < sg_used; i++) {
2743 if (copy_to_user(ptr, buff[i], buff_size[i])) {
2744 cmd_special_free(h, c);
2745 status = -EFAULT;
2746 goto cleanup1;
2747 }
2748 ptr += buff_size[i];
2749 }
2750 }
2751 cmd_special_free(h, c);
2752 status = 0;
2753cleanup1:
2754 if (buff) {
2755 for (i = 0; i < sg_used; i++)
2756 kfree(buff[i]);
2757 kfree(buff);
2758 }
2759 kfree(buff_size);
2760 kfree(ioc);
2761 return status;
2762}
2763
2764static void check_ioctl_unit_attention(struct ctlr_info *h,
2765 struct CommandList *c)
2766{
2767 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2768 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
2769 (void) check_for_unit_attention(h, c);
2770}
2771/*
2772 * ioctl
2773 */
2774static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2775{
2776 struct ctlr_info *h;
2777 void __user *argp = (void __user *)arg;
2778
2779 h = sdev_to_hba(dev);
2780
2781 switch (cmd) {
2782 case CCISS_DEREGDISK:
2783 case CCISS_REGNEWDISK:
2784 case CCISS_REGNEWD:
a08a8471 2785 hpsa_scan_start(h->scsi_host);
edd16368
SC		 2786 return 0;
2787 case CCISS_GETPCIINFO:
2788 return hpsa_getpciinfo_ioctl(h, argp);
2789 case CCISS_GETDRIVVER:
2790 return hpsa_getdrivver_ioctl(h, argp);
2791 case CCISS_PASSTHRU:
2792 return hpsa_passthru_ioctl(h, argp);
2793 case CCISS_BIG_PASSTHRU:
2794 return hpsa_big_passthru_ioctl(h, argp);
2795 default:
2796 return -ENOTTY;
2797 }
2798}
2799
64670ac8
SC		 2800static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
2801 unsigned char *scsi3addr, u8 reset_type)
2802{
2803 struct CommandList *c;
2804
2805 c = cmd_alloc(h);
2806 if (!c)
2807 return -ENOMEM;
2808 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2809 RAID_CTLR_LUNID, TYPE_MSG);
2810 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2811 c->waiting = NULL;
2812 enqueue_cmd_and_start_io(h, c);
2813 /* Don't wait for completion, the reset won't complete. Don't free
2814 * the command either. This is the last command we will send before
2815 * re-initializing everything, so it doesn't matter and won't leak.
2816 */
2817 return 0;
2818}
2819
01a02ffc
SC		 2820static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
2821 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 2822 int cmd_type)
2823{
2824 int pci_dir = XFER_NONE;
2825
2826 c->cmd_type = CMD_IOCTL_PEND;
2827 c->Header.ReplyQueue = 0;
2828 if (buff != NULL && size > 0) {
2829 c->Header.SGList = 1;
2830 c->Header.SGTotal = 1;
2831 } else {
2832 c->Header.SGList = 0;
2833 c->Header.SGTotal = 0;
2834 }
2835 c->Header.Tag.lower = c->busaddr;
2836 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2837
2838 c->Request.Type.Type = cmd_type;
2839 if (cmd_type == TYPE_CMD) {
2840 switch (cmd) {
2841 case HPSA_INQUIRY:
2842 /* are we trying to read a vital product page */
2843 if (page_code != 0) {
2844 c->Request.CDB[1] = 0x01;
2845 c->Request.CDB[2] = page_code;
2846 }
2847 c->Request.CDBLen = 6;
2848 c->Request.Type.Attribute = ATTR_SIMPLE;
2849 c->Request.Type.Direction = XFER_READ;
2850 c->Request.Timeout = 0;
2851 c->Request.CDB[0] = HPSA_INQUIRY;
2852 c->Request.CDB[4] = size & 0xFF;
2853 break;
2854 case HPSA_REPORT_LOG:
2855 case HPSA_REPORT_PHYS:
2856 /* Talking to controller so It's a physical command
2857 mode = 00 target = 0. Nothing to write.
2858 */
2859 c->Request.CDBLen = 12;
2860 c->Request.Type.Attribute = ATTR_SIMPLE;
2861 c->Request.Type.Direction = XFER_READ;
2862 c->Request.Timeout = 0;
2863 c->Request.CDB[0] = cmd;
2864 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2865 c->Request.CDB[7] = (size >> 16) & 0xFF;
2866 c->Request.CDB[8] = (size >> 8) & 0xFF;
2867 c->Request.CDB[9] = size & 0xFF;
2868 break;
edd16368
SC		 2869 case HPSA_CACHE_FLUSH:
2870 c->Request.CDBLen = 12;
2871 c->Request.Type.Attribute = ATTR_SIMPLE;
2872 c->Request.Type.Direction = XFER_WRITE;
2873 c->Request.Timeout = 0;
2874 c->Request.CDB[0] = BMIC_WRITE;
2875 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2876 break;
2877 case TEST_UNIT_READY:
2878 c->Request.CDBLen = 6;
2879 c->Request.Type.Attribute = ATTR_SIMPLE;
2880 c->Request.Type.Direction = XFER_NONE;
2881 c->Request.Timeout = 0;
2882 break;
2883 default:
2884 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
2885 BUG();
2886 return;
2887 }
2888 } else if (cmd_type == TYPE_MSG) {
2889 switch (cmd) {
2890
2891 case HPSA_DEVICE_RESET_MSG:
2892 c->Request.CDBLen = 16;
2893 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
2894 c->Request.Type.Attribute = ATTR_SIMPLE;
2895 c->Request.Type.Direction = XFER_NONE;
2896 c->Request.Timeout = 0; /* Don't time out */
64670ac8
SC		 2897 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2898 c->Request.CDB[0] = cmd;
edd16368
SC		 2899 c->Request.CDB[1] = 0x03; /* Reset target above */
2900 /* If bytes 4-7 are zero, it means reset the */
2901 /* LunID device */
2902 c->Request.CDB[4] = 0x00;
2903 c->Request.CDB[5] = 0x00;
2904 c->Request.CDB[6] = 0x00;
2905 c->Request.CDB[7] = 0x00;
2906 break;
2907
2908 default:
2909 dev_warn(&h->pdev->dev, "unknown message type %d\n",
2910 cmd);
2911 BUG();
2912 }
2913 } else {
2914 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2915 BUG();
2916 }
2917
2918 switch (c->Request.Type.Direction) {
2919 case XFER_READ:
2920 pci_dir = PCI_DMA_FROMDEVICE;
2921 break;
2922 case XFER_WRITE:
2923 pci_dir = PCI_DMA_TODEVICE;
2924 break;
2925 case XFER_NONE:
2926 pci_dir = PCI_DMA_NONE;
2927 break;
2928 default:
2929 pci_dir = PCI_DMA_BIDIRECTIONAL;
2930 }
2931
2932 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
2933
2934 return;
2935}
2936
2937/*
2938 * Map (physical) PCI mem into (virtual) kernel space
2939 */
2940static void __iomem *remap_pci_mem(ulong base, ulong size)
2941{
2942 ulong page_base = ((ulong) base) & PAGE_MASK;
2943 ulong page_offs = ((ulong) base) - page_base;
2944 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2945
2946 return page_remapped ? (page_remapped + page_offs) : NULL;
2947}
2948
2949/* Takes cmds off the submission queue and sends them to the hardware,
2950 * then puts them on the queue of cmds waiting for completion.
2951 */
2952static void start_io(struct ctlr_info *h)
2953{
2954 struct CommandList *c;
2955
9e0fc764
SC		 2956 while (!list_empty(&h->reqQ)) {
2957 c = list_entry(h->reqQ.next, struct CommandList, list);
edd16368
SC		 2958 /* can't do anything if fifo is full */
2959 if ((h->access.fifo_full(h))) {
2960 dev_warn(&h->pdev->dev, "fifo full\n");
2961 break;
2962 }
2963
2964 /* Get the first entry from the Request Q */
2965 removeQ(c);
2966 h->Qdepth--;
2967
2968 /* Tell the controller execute command */
2969 h->access.submit_command(h, c);
2970
2971 /* Put job onto the completed Q */
2972 addQ(&h->cmpQ, c);
2973 }
2974}
2975
2976static inline unsigned long get_next_completion(struct ctlr_info *h)
2977{
2978 return h->access.command_completed(h);
2979}
2980
900c5440 2981static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 2982{
2983 return h->access.intr_pending(h);
2984}
2985
2986static inline long interrupt_not_for_us(struct ctlr_info *h)
2987{
10f66018
SC		 2988 return (h->access.intr_pending(h) == 0) ||
2989 (h->interrupts_enabled == 0);
edd16368
SC		 2990}
2991
01a02ffc
SC		 2992static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
2993 u32 raw_tag)
edd16368
SC		 2994{
2995 if (unlikely(tag_index >= h->nr_cmds)) {
2996 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
2997 return 1;
2998 }
2999 return 0;
3000}
3001
01a02ffc 3002static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
edd16368
SC		 3003{
3004 removeQ(c);
3005 if (likely(c->cmd_type == CMD_SCSI))
1fb011fb 3006 complete_scsi_command(c);
edd16368
SC		 3007 else if (c->cmd_type == CMD_IOCTL_PEND)
3008 complete(c->waiting);
3009}
3010
a104c99f
SC		 3011static inline u32 hpsa_tag_contains_index(u32 tag)
3012{
a104c99f
SC		 3013 return tag & DIRECT_LOOKUP_BIT;
3014}
3015
3016static inline u32 hpsa_tag_to_index(u32 tag)
3017{
a104c99f
SC		 3018 return tag >> DIRECT_LOOKUP_SHIFT;
3019}
3020
a9a3a273
SC		 3021
3022static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
a104c99f 3023{
a9a3a273
SC		 3024#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3025#define HPSA_SIMPLE_ERROR_BITS 0x03
960a30e7 3026 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
a9a3a273
SC		 3027 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3028 return tag & ~HPSA_PERF_ERROR_BITS;
a104c99f
SC		 3029}
3030
303932fd
DB		 3031/* process completion of an indexed ("direct lookup") command */
3032static inline u32 process_indexed_cmd(struct ctlr_info *h,
3033 u32 raw_tag)
3034{
3035 u32 tag_index;
3036 struct CommandList *c;
3037
3038 tag_index = hpsa_tag_to_index(raw_tag);
3039 if (bad_tag(h, tag_index, raw_tag))
3040 return next_command(h);
3041 c = h->cmd_pool + tag_index;
3042 finish_cmd(c, raw_tag);
3043 return next_command(h);
3044}
3045
3046/* process completion of a non-indexed command */
3047static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
3048 u32 raw_tag)
3049{
3050 u32 tag;
3051 struct CommandList *c = NULL;
303932fd 3052
a9a3a273 3053 tag = hpsa_tag_discard_error_bits(h, raw_tag);
9e0fc764 3054 list_for_each_entry(c, &h->cmpQ, list) {
303932fd
DB		 3055 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
3056 finish_cmd(c, raw_tag);
3057 return next_command(h);
3058 }
3059 }
3060 bad_tag(h, h->nr_cmds + 1, raw_tag);
3061 return next_command(h);
3062}
3063
64670ac8
SC		 3064/* Some controllers, like p400, will give us one interrupt
3065 * after a soft reset, even if we turned interrupts off.
3066 * Only need to check for this in the hpsa_xxx_discard_completions
3067 * functions.
3068 */
3069static int ignore_bogus_interrupt(struct ctlr_info *h)
3070{
3071 if (likely(!reset_devices))
3072 return 0;
3073
3074 if (likely(h->interrupts_enabled))
3075 return 0;
3076
3077 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3078 "(known firmware bug.) Ignoring.\n");
3079
3080 return 1;
3081}
3082
3083static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
3084{
3085 struct ctlr_info *h = dev_id;
3086 unsigned long flags;
3087 u32 raw_tag;
3088
3089 if (ignore_bogus_interrupt(h))
3090 return IRQ_NONE;
3091
3092 if (interrupt_not_for_us(h))
3093 return IRQ_NONE;
3094 spin_lock_irqsave(&h->lock, flags);
3095 while (interrupt_pending(h)) {
3096 raw_tag = get_next_completion(h);
3097 while (raw_tag != FIFO_EMPTY)
3098 raw_tag = next_command(h);
3099 }
3100 spin_unlock_irqrestore(&h->lock, flags);
3101 return IRQ_HANDLED;
3102}
3103
3104static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
3105{
3106 struct ctlr_info *h = dev_id;
3107 unsigned long flags;
3108 u32 raw_tag;
3109
3110 if (ignore_bogus_interrupt(h))
3111 return IRQ_NONE;
3112
3113 spin_lock_irqsave(&h->lock, flags);
3114 raw_tag = get_next_completion(h);
3115 while (raw_tag != FIFO_EMPTY)
3116 raw_tag = next_command(h);
3117 spin_unlock_irqrestore(&h->lock, flags);
3118 return IRQ_HANDLED;
3119}
3120
10f66018 3121static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
edd16368
SC		 3122{
3123 struct ctlr_info *h = dev_id;
edd16368 3124 unsigned long flags;
303932fd 3125 u32 raw_tag;
edd16368
SC		 3126
3127 if (interrupt_not_for_us(h))
3128 return IRQ_NONE;
10f66018
SC		 3129 spin_lock_irqsave(&h->lock, flags);
3130 while (interrupt_pending(h)) {
3131 raw_tag = get_next_completion(h);
3132 while (raw_tag != FIFO_EMPTY) {
3133 if (hpsa_tag_contains_index(raw_tag))
3134 raw_tag = process_indexed_cmd(h, raw_tag);
3135 else
3136 raw_tag = process_nonindexed_cmd(h, raw_tag);
3137 }
3138 }
3139 spin_unlock_irqrestore(&h->lock, flags);
3140 return IRQ_HANDLED;
3141}
3142
3143static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
3144{
3145 struct ctlr_info *h = dev_id;
3146 unsigned long flags;
3147 u32 raw_tag;
3148
edd16368 3149 spin_lock_irqsave(&h->lock, flags);
303932fd
DB		 3150 raw_tag = get_next_completion(h);
3151 while (raw_tag != FIFO_EMPTY) {
3152 if (hpsa_tag_contains_index(raw_tag))
3153 raw_tag = process_indexed_cmd(h, raw_tag);
3154 else
3155 raw_tag = process_nonindexed_cmd(h, raw_tag);
edd16368
SC		 3156 }
3157 spin_unlock_irqrestore(&h->lock, flags);
3158 return IRQ_HANDLED;
3159}
3160
a9a3a273
SC		 3161/* Send a message CDB to the firmware. Careful, this only works
3162 * in simple mode, not performant mode due to the tag lookup.
3163 * We only ever use this immediately after a controller reset.
3164 */
edd16368
SC		 3165static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3166 unsigned char type)
3167{
3168 struct Command {
3169 struct CommandListHeader CommandHeader;
3170 struct RequestBlock Request;
3171 struct ErrDescriptor ErrorDescriptor;
3172 };
3173 struct Command *cmd;
3174 static const size_t cmd_sz = sizeof(*cmd) +
3175 sizeof(cmd->ErrorDescriptor);
3176 dma_addr_t paddr64;
3177 uint32_t paddr32, tag;
3178 void __iomem *vaddr;
3179 int i, err;
3180
3181 vaddr = pci_ioremap_bar(pdev, 0);
3182 if (vaddr == NULL)
3183 return -ENOMEM;
3184
3185 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3186 * CCISS commands, so they must be allocated from the lower 4GiB of
3187 * memory.
3188 */
3189 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3190 if (err) {
3191 iounmap(vaddr);
3192 return -ENOMEM;
3193 }
3194
3195 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3196 if (cmd == NULL) {
3197 iounmap(vaddr);
3198 return -ENOMEM;
3199 }
3200
3201 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3202 * although there's no guarantee, we assume that the address is at
3203 * least 4-byte aligned (most likely, it's page-aligned).
3204 */
3205 paddr32 = paddr64;
3206
3207 cmd->CommandHeader.ReplyQueue = 0;
3208 cmd->CommandHeader.SGList = 0;
3209 cmd->CommandHeader.SGTotal = 0;
3210 cmd->CommandHeader.Tag.lower = paddr32;
3211 cmd->CommandHeader.Tag.upper = 0;
3212 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3213
3214 cmd->Request.CDBLen = 16;
3215 cmd->Request.Type.Type = TYPE_MSG;
3216 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3217 cmd->Request.Type.Direction = XFER_NONE;
3218 cmd->Request.Timeout = 0; /* Don't time out */
3219 cmd->Request.CDB[0] = opcode;
3220 cmd->Request.CDB[1] = type;
3221 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3222 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3223 cmd->ErrorDescriptor.Addr.upper = 0;
3224 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3225
3226 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3227
3228 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3229 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a9a3a273 3230 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
edd16368
SC		 3231 break;
3232 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3233 }
3234
3235 iounmap(vaddr);
3236
3237 /* we leak the DMA buffer here ... no choice since the controller could
3238 * still complete the command.
3239 */
3240 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3241 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3242 opcode, type);
3243 return -ETIMEDOUT;
3244 }
3245
3246 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3247
3248 if (tag & HPSA_ERROR_BIT) {
3249 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3250 opcode, type);
3251 return -EIO;
3252 }
3253
3254 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3255 opcode, type);
3256 return 0;
3257}
3258
edd16368
SC		 3259#define hpsa_noop(p) hpsa_message(p, 3, 0)
3260
1df8552a 3261static int hpsa_controller_hard_reset(struct pci_dev *pdev,
cf0b08d0 3262 void * __iomem vaddr, u32 use_doorbell)
1df8552a
SC		 3263{
3264 u16 pmcsr;
3265 int pos;
3266
3267 if (use_doorbell) {
3268 /* For everything after the P600, the PCI power state method
3269 * of resetting the controller doesn't work, so we have this
3270 * other way using the doorbell register.
3271 */
3272 dev_info(&pdev->dev, "using doorbell to reset controller\n");
cf0b08d0 3273 writel(use_doorbell, vaddr + SA5_DOORBELL);
1df8552a
SC		 3274 } else { /* Try to do it the PCI power state way */
3275
3276 /* Quoting from the Open CISS Specification: "The Power
3277 * Management Control/Status Register (CSR) controls the power
3278 * state of the device. The normal operating state is D0,
3279 * CSR=00h. The software off state is D3, CSR=03h. To reset
3280 * the controller, place the interface device in D3 then to D0,
3281 * this causes a secondary PCI reset which will reset the
3282 * controller." */
3283
3284 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3285 if (pos == 0) {
3286 dev_err(&pdev->dev,
3287 "hpsa_reset_controller: "
3288 "PCI PM not supported\n");
3289 return -ENODEV;
3290 }
3291 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3292 /* enter the D3hot power management state */
3293 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3294 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3295 pmcsr |= PCI_D3hot;
3296 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3297
3298 msleep(500);
3299
3300 /* enter the D0 power management state */
3301 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3302 pmcsr |= PCI_D0;
3303 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
1df8552a
SC		 3304 }
3305 return 0;
3306}
3307
580ada3c
SC		 3308static __devinit void init_driver_version(char *driver_version, int len)
3309{
3310 memset(driver_version, 0, len);
3311 strncpy(driver_version, "hpsa " HPSA_DRIVER_VERSION, len - 1);
3312}
3313
3314static __devinit int write_driver_ver_to_cfgtable(
3315 struct CfgTable __iomem *cfgtable)
3316{
3317 char *driver_version;
3318 int i, size = sizeof(cfgtable->driver_version);
3319
3320 driver_version = kmalloc(size, GFP_KERNEL);
3321 if (!driver_version)
3322 return -ENOMEM;
3323
3324 init_driver_version(driver_version, size);
3325 for (i = 0; i < size; i++)
3326 writeb(driver_version[i], &cfgtable->driver_version[i]);
3327 kfree(driver_version);
3328 return 0;
3329}
3330
3331static __devinit void read_driver_ver_from_cfgtable(
3332 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
3333{
3334 int i;
3335
3336 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3337 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3338}
3339
3340static __devinit int controller_reset_failed(
3341 struct CfgTable __iomem *cfgtable)
3342{
3343
3344 char *driver_ver, *old_driver_ver;
3345 int rc, size = sizeof(cfgtable->driver_version);
3346
3347 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3348 if (!old_driver_ver)
3349 return -ENOMEM;
3350 driver_ver = old_driver_ver + size;
3351
3352 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3353 * should have been changed, otherwise we know the reset failed.
3354 */
3355 init_driver_version(old_driver_ver, size);
3356 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3357 rc = !memcmp(driver_ver, old_driver_ver, size);
3358 kfree(old_driver_ver);
3359 return rc;
3360}
edd16368 3361/* This does a hard reset of the controller using PCI power management
1df8552a 3362 * states or the using the doorbell register.
edd16368 3363 */
1df8552a 3364static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3365{
1df8552a
SC		 3366 u64 cfg_offset;
3367 u32 cfg_base_addr;
3368 u64 cfg_base_addr_index;
3369 void __iomem *vaddr;
3370 unsigned long paddr;
580ada3c 3371 u32 misc_fw_support;
270d05de 3372 int rc;
1df8552a 3373 struct CfgTable __iomem *cfgtable;
cf0b08d0 3374 u32 use_doorbell;
18867659 3375 u32 board_id;
270d05de 3376 u16 command_register;
edd16368 3377
1df8552a
SC		 3378 /* For controllers as old as the P600, this is very nearly
3379 * the same thing as
edd16368
SC		 3380 *
3381 * pci_save_state(pci_dev);
3382 * pci_set_power_state(pci_dev, PCI_D3hot);
3383 * pci_set_power_state(pci_dev, PCI_D0);
3384 * pci_restore_state(pci_dev);
3385 *
1df8552a
SC		 3386 * For controllers newer than the P600, the pci power state
3387 * method of resetting doesn't work so we have another way
3388 * using the doorbell register.
edd16368 3389 */
18867659 3390
25c1e56a 3391 rc = hpsa_lookup_board_id(pdev, &board_id);
46380786 3392 if (rc < 0 || !ctlr_is_resettable(board_id)) {
25c1e56a
SC		 3393 dev_warn(&pdev->dev, "Not resetting device.\n");
3394 return -ENODEV;
3395 }
46380786
SC		 3396
3397 /* if controller is soft- but not hard resettable... */
3398 if (!ctlr_is_hard_resettable(board_id))
3399 return -ENOTSUPP; /* try soft reset later. */
18867659 3400
270d05de
SC		 3401 /* Save the PCI command register */
3402 pci_read_config_word(pdev, 4, &command_register);
3403 /* Turn the board off. This is so that later pci_restore_state()
3404 * won't turn the board on before the rest of config space is ready.
3405 */
3406 pci_disable_device(pdev);
3407 pci_save_state(pdev);
edd16368 3408
1df8552a
SC		 3409 /* find the first memory BAR, so we can find the cfg table */
3410 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3411 if (rc)
3412 return rc;
3413 vaddr = remap_pci_mem(paddr, 0x250);
3414 if (!vaddr)
3415 return -ENOMEM;
edd16368 3416
1df8552a
SC		 3417 /* find cfgtable in order to check if reset via doorbell is supported */
3418 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3419 &cfg_base_addr_index, &cfg_offset);
3420 if (rc)
3421 goto unmap_vaddr;
3422 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3423 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3424 if (!cfgtable) {
3425 rc = -ENOMEM;
3426 goto unmap_vaddr;
3427 }
580ada3c
SC		 3428 rc = write_driver_ver_to_cfgtable(cfgtable);
3429 if (rc)
3430 goto unmap_vaddr;
edd16368 3431
cf0b08d0
SC		 3432 /* If reset via doorbell register is supported, use that.
3433 * There are two such methods. Favor the newest method.
3434 */
1df8552a 3435 misc_fw_support = readl(&cfgtable->misc_fw_support);
cf0b08d0
SC		 3436 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3437 if (use_doorbell) {
3438 use_doorbell = DOORBELL_CTLR_RESET2;
3439 } else {
3440 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3441 if (use_doorbell) {
fba63097
MM		 3442 dev_warn(&pdev->dev, "Soft reset not supported. "
3443 "Firmware update is required.\n");
64670ac8 3444 rc = -ENOTSUPP; /* try soft reset */
cf0b08d0
SC		 3445 goto unmap_cfgtable;
3446 }
3447 }
edd16368 3448
1df8552a
SC		 3449 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3450 if (rc)
3451 goto unmap_cfgtable;
edd16368 3452
270d05de
SC		 3453 pci_restore_state(pdev);
3454 rc = pci_enable_device(pdev);
3455 if (rc) {
3456 dev_warn(&pdev->dev, "failed to enable device.\n");
3457 goto unmap_cfgtable;
edd16368 3458 }
270d05de 3459 pci_write_config_word(pdev, 4, command_register);
edd16368 3460
1df8552a
SC		 3461 /* Some devices (notably the HP Smart Array 5i Controller)
3462 need a little pause here */
3463 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3464
fe5389c8 3465 /* Wait for board to become not ready, then ready. */
2b870cb3 3466 dev_info(&pdev->dev, "Waiting for board to reset.\n");
fe5389c8 3467 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
64670ac8 3468 if (rc) {
fe5389c8 3469 dev_warn(&pdev->dev,
64670ac8
SC		 3470 "failed waiting for board to reset."
3471 " Will try soft reset.\n");
3472 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3473 goto unmap_cfgtable;
3474 }
fe5389c8
SC		 3475 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3476 if (rc) {
3477 dev_warn(&pdev->dev,
64670ac8
SC		 3478 "failed waiting for board to become ready "
3479 "after hard reset\n");
fe5389c8
SC		 3480 goto unmap_cfgtable;
3481 }
fe5389c8 3482
580ada3c
SC		 3483 rc = controller_reset_failed(vaddr);
3484 if (rc < 0)
3485 goto unmap_cfgtable;
3486 if (rc) {
64670ac8
SC		 3487 dev_warn(&pdev->dev, "Unable to successfully reset "
3488 "controller. Will try soft reset.\n");
3489 rc = -ENOTSUPP;
580ada3c 3490 } else {
64670ac8 3491 dev_info(&pdev->dev, "board ready after hard reset.\n");
1df8552a
SC		 3492 }
3493
3494unmap_cfgtable:
3495 iounmap(cfgtable);
3496
3497unmap_vaddr:
3498 iounmap(vaddr);
3499 return rc;
edd16368
SC		 3500}
3501
3502/*
3503 * We cannot read the structure directly, for portability we must use
3504 * the io functions.
3505 * This is for debug only.
3506 */
edd16368
SC		 3507static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3508{
58f8665c 3509#ifdef HPSA_DEBUG
edd16368
SC		 3510 int i;
3511 char temp_name[17];
3512
3513 dev_info(dev, "Controller Configuration information\n");
3514 dev_info(dev, "------------------------------------\n");
3515 for (i = 0; i < 4; i++)
3516 temp_name[i] = readb(&(tb->Signature[i]));
3517 temp_name[4] = '\0';
3518 dev_info(dev, " Signature = %s\n", temp_name);
3519 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3520 dev_info(dev, " Transport methods supported = 0x%x\n",
3521 readl(&(tb->TransportSupport)));
3522 dev_info(dev, " Transport methods active = 0x%x\n",
3523 readl(&(tb->TransportActive)));
3524 dev_info(dev, " Requested transport Method = 0x%x\n",
3525 readl(&(tb->HostWrite.TransportRequest)));
3526 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3527 readl(&(tb->HostWrite.CoalIntDelay)));
3528 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3529 readl(&(tb->HostWrite.CoalIntCount)));
3530 dev_info(dev, " Max outstanding commands = 0x%d\n",
3531 readl(&(tb->CmdsOutMax)));
3532 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3533 for (i = 0; i < 16; i++)
3534 temp_name[i] = readb(&(tb->ServerName[i]));
3535 temp_name[16] = '\0';
3536 dev_info(dev, " Server Name = %s\n", temp_name);
3537 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3538 readl(&(tb->HeartBeat)));
edd16368 3539#endif /* HPSA_DEBUG */
58f8665c 3540}
edd16368
SC		 3541
3542static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3543{
3544 int i, offset, mem_type, bar_type;
3545
3546 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3547 return 0;
3548 offset = 0;
3549 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3550 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3551 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3552 offset += 4;
3553 else {
3554 mem_type = pci_resource_flags(pdev, i) &
3555 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3556 switch (mem_type) {
3557 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3558 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3559 offset += 4; /* 32 bit */
3560 break;
3561 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3562 offset += 8;
3563 break;
3564 default: /* reserved in PCI 2.2 */
3565 dev_warn(&pdev->dev,
3566 "base address is invalid\n");
3567 return -1;
3568 break;
3569 }
3570 }
3571 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3572 return i + 1;
3573 }
3574 return -1;
3575}
3576
3577/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3578 * controllers that are capable. If not, we use IO-APIC mode.
3579 */
3580
6b3f4c52 3581static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 3582{
3583#ifdef CONFIG_PCI_MSI
3584 int err;
3585 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
3586 {0, 2}, {0, 3}
3587 };
3588
3589 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 3590 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3591 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 3592 goto default_int_mode;
55c06c71
SC		 3593 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3594 dev_info(&h->pdev->dev, "MSIX\n");
3595 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
edd16368
SC		 3596 if (!err) {
3597 h->intr[0] = hpsa_msix_entries[0].vector;
3598 h->intr[1] = hpsa_msix_entries[1].vector;
3599 h->intr[2] = hpsa_msix_entries[2].vector;
3600 h->intr[3] = hpsa_msix_entries[3].vector;
3601 h->msix_vector = 1;
3602 return;
3603 }
3604 if (err > 0) {
55c06c71 3605 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC		 3606 "available\n", err);
3607 goto default_int_mode;
3608 } else {
55c06c71 3609 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC		 3610 err);
3611 goto default_int_mode;
3612 }
3613 }
55c06c71
SC		 3614 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3615 dev_info(&h->pdev->dev, "MSI\n");
3616 if (!pci_enable_msi(h->pdev))
edd16368
SC		 3617 h->msi_vector = 1;
3618 else
55c06c71 3619 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 3620 }
3621default_int_mode:
3622#endif /* CONFIG_PCI_MSI */
3623 /* if we get here we're going to use the default interrupt mode */
a9a3a273 3624 h->intr[h->intr_mode] = h->pdev->irq;
edd16368
SC		 3625}
3626
e5c880d1
SC		 3627static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3628{
3629 int i;
3630 u32 subsystem_vendor_id, subsystem_device_id;
3631
3632 subsystem_vendor_id = pdev->subsystem_vendor;
3633 subsystem_device_id = pdev->subsystem_device;
3634 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3635 subsystem_vendor_id;
3636
3637 for (i = 0; i < ARRAY_SIZE(products); i++)
3638 if (*board_id == products[i].board_id)
3639 return i;
3640
6798cc0a
SC		 3641 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
3642 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
3643 !hpsa_allow_any) {
e5c880d1
SC		 3644 dev_warn(&pdev->dev, "unrecognized board ID: "
3645 "0x%08x, ignoring.\n", *board_id);
3646 return -ENODEV;
3647 }
3648 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
3649}
3650
85bdbabb
SC		 3651static inline bool hpsa_board_disabled(struct pci_dev *pdev)
3652{
3653 u16 command;
3654
3655 (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
3656 return ((command & PCI_COMMAND_MEMORY) == 0);
3657}
3658
12d2cd47 3659static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3a7774ce
SC		 3660 unsigned long *memory_bar)
3661{
3662 int i;
3663
3664 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 3665 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 3666 /* addressing mode bits already removed */
12d2cd47
SC		 3667 *memory_bar = pci_resource_start(pdev, i);
3668 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 3669 *memory_bar);
3670 return 0;
3671 }
12d2cd47 3672 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 3673 return -ENODEV;
3674}
3675
fe5389c8
SC		 3676static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
3677 void __iomem *vaddr, int wait_for_ready)
2c4c8c8b 3678{
fe5389c8 3679 int i, iterations;
2c4c8c8b 3680 u32 scratchpad;
fe5389c8
SC		 3681 if (wait_for_ready)
3682 iterations = HPSA_BOARD_READY_ITERATIONS;
3683 else
3684 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 3685
fe5389c8
SC		 3686 for (i = 0; i < iterations; i++) {
3687 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3688 if (wait_for_ready) {
3689 if (scratchpad == HPSA_FIRMWARE_READY)
3690 return 0;
3691 } else {
3692 if (scratchpad != HPSA_FIRMWARE_READY)
3693 return 0;
3694 }
2c4c8c8b
SC		 3695 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
3696 }
fe5389c8 3697 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 3698 return -ENODEV;
3699}
3700
a51fd47f
SC		 3701static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
3702 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3703 u64 *cfg_offset)
3704{
3705 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
3706 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
3707 *cfg_base_addr &= (u32) 0x0000ffff;
3708 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
3709 if (*cfg_base_addr_index == -1) {
3710 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
3711 return -ENODEV;
3712 }
3713 return 0;
3714}
3715
77c4495c 3716static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 3717{
01a02ffc
SC		 3718 u64 cfg_offset;
3719 u32 cfg_base_addr;
3720 u64 cfg_base_addr_index;
303932fd 3721 u32 trans_offset;
a51fd47f 3722 int rc;
77c4495c 3723
a51fd47f
SC		 3724 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
3725 &cfg_base_addr_index, &cfg_offset);
3726 if (rc)
3727 return rc;
77c4495c 3728 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 3729 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 3730 if (!h->cfgtable)
3731 return -ENOMEM;
580ada3c
SC		 3732 rc = write_driver_ver_to_cfgtable(h->cfgtable);
3733 if (rc)
3734 return rc;
77c4495c 3735 /* Find performant mode table. */
a51fd47f 3736 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 3737 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
3738 cfg_base_addr_index)+cfg_offset+trans_offset,
3739 sizeof(*h->transtable));
3740 if (!h->transtable)
3741 return -ENOMEM;
3742 return 0;
3743}
3744
cba3d38b
SC		 3745static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
3746{
3747 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC		 3748
3749 /* Limit commands in memory limited kdump scenario. */
3750 if (reset_devices && h->max_commands > 32)
3751 h->max_commands = 32;
3752
cba3d38b
SC		 3753 if (h->max_commands < 16) {
3754 dev_warn(&h->pdev->dev, "Controller reports "
3755 "max supported commands of %d, an obvious lie. "
3756 "Using 16. Ensure that firmware is up to date.\n",
3757 h->max_commands);
3758 h->max_commands = 16;
3759 }
3760}
3761
b93d7536
SC		 3762/* Interrogate the hardware for some limits:
3763 * max commands, max SG elements without chaining, and with chaining,
3764 * SG chain block size, etc.
3765 */
3766static void __devinit hpsa_find_board_params(struct ctlr_info *h)
3767{
cba3d38b 3768 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 3769 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
3770 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
3771 /*
3772 * Limit in-command s/g elements to 32 save dma'able memory.
3773 * Howvever spec says if 0, use 31
3774 */
3775 h->max_cmd_sg_entries = 31;
3776 if (h->maxsgentries > 512) {
3777 h->max_cmd_sg_entries = 32;
3778 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
3779 h->maxsgentries--; /* save one for chain pointer */
3780 } else {
3781 h->maxsgentries = 31; /* default to traditional values */
3782 h->chainsize = 0;
3783 }
3784}
3785
76c46e49
SC		 3786static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
3787{
3788 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
3789 (readb(&h->cfgtable->Signature[1]) != 'I') ||
3790 (readb(&h->cfgtable->Signature[2]) != 'S') ||
3791 (readb(&h->cfgtable->Signature[3]) != 'S')) {
3792 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
3793 return false;
3794 }
3795 return true;
3796}
3797
f7c39101
SC		 3798/* Need to enable prefetch in the SCSI core for 6400 in x86 */
3799static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
3800{
3801#ifdef CONFIG_X86
3802 u32 prefetch;
3803
3804 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
3805 prefetch |= 0x100;
3806 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
3807#endif
3808}
3809
3d0eab67
SC		 3810/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
3811 * in a prefetch beyond physical memory.
3812 */
3813static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
3814{
3815 u32 dma_prefetch;
3816
3817 if (h->board_id != 0x3225103C)
3818 return;
3819 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
3820 dma_prefetch |= 0x8000;
3821 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
3822}
3823
3f4336f3 3824static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 3825{
3826 int i;
6eaf46fd
SC		 3827 u32 doorbell_value;
3828 unsigned long flags;
eb6b2ae9
SC		 3829
3830 /* under certain very rare conditions, this can take awhile.
3831 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3832 * as we enter this code.)
3833 */
3834 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6eaf46fd
SC		 3835 spin_lock_irqsave(&h->lock, flags);
3836 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
3837 spin_unlock_irqrestore(&h->lock, flags);
382be668 3838 if (!(doorbell_value & CFGTBL_ChangeReq))
eb6b2ae9
SC		 3839 break;
3840 /* delay and try again */
60d3f5b0 3841 usleep_range(10000, 20000);
eb6b2ae9 3842 }
3f4336f3
SC		 3843}
3844
3845static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
3846{
3847 u32 trans_support;
3848
3849 trans_support = readl(&(h->cfgtable->TransportSupport));
3850 if (!(trans_support & SIMPLE_MODE))
3851 return -ENOTSUPP;
3852
3853 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
3854 /* Update the field, and then ring the doorbell */
3855 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
3856 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3857 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 3858 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 3859 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
3860 dev_warn(&h->pdev->dev,
3861 "unable to get board into simple mode\n");
3862 return -ENODEV;
3863 }
960a30e7 3864 h->transMethod = CFGTBL_Trans_Simple;
eb6b2ae9
SC		 3865 return 0;
3866}
3867
77c4495c
SC		 3868static int __devinit hpsa_pci_init(struct ctlr_info *h)
3869{
eb6b2ae9 3870 int prod_index, err;
edd16368 3871
e5c880d1
SC		 3872 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
3873 if (prod_index < 0)
3874 return -ENODEV;
3875 h->product_name = products[prod_index].product_name;
3876 h->access = *(products[prod_index].access);
edd16368 3877
85bdbabb 3878 if (hpsa_board_disabled(h->pdev)) {
55c06c71 3879 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
edd16368
SC		 3880 return -ENODEV;
3881 }
55c06c71 3882 err = pci_enable_device(h->pdev);
edd16368 3883 if (err) {
55c06c71 3884 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 3885 return err;
3886 }
3887
55c06c71 3888 err = pci_request_regions(h->pdev, "hpsa");
edd16368 3889 if (err) {
55c06c71
SC		 3890 dev_err(&h->pdev->dev,
3891 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 3892 return err;
3893 }
6b3f4c52 3894 hpsa_interrupt_mode(h);
12d2cd47 3895 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 3896 if (err)
edd16368 3897 goto err_out_free_res;
edd16368 3898 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 3899 if (!h->vaddr) {
3900 err = -ENOMEM;
3901 goto err_out_free_res;
3902 }
fe5389c8 3903 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 3904 if (err)
edd16368 3905 goto err_out_free_res;
77c4495c
SC		 3906 err = hpsa_find_cfgtables(h);
3907 if (err)
edd16368 3908 goto err_out_free_res;
b93d7536 3909 hpsa_find_board_params(h);
edd16368 3910
76c46e49 3911 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 3912 err = -ENODEV;
3913 goto err_out_free_res;
3914 }
f7c39101 3915 hpsa_enable_scsi_prefetch(h);
3d0eab67 3916 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 3917 err = hpsa_enter_simple_mode(h);
3918 if (err)
edd16368 3919 goto err_out_free_res;
edd16368
SC		 3920 return 0;
3921
3922err_out_free_res:
204892e9
SC		 3923 if (h->transtable)
3924 iounmap(h->transtable);
3925 if (h->cfgtable)
3926 iounmap(h->cfgtable);
3927 if (h->vaddr)
3928 iounmap(h->vaddr);
edd16368
SC		 3929 /*
3930 * Deliberately omit pci_disable_device(): it does something nasty to
3931 * Smart Array controllers that pci_enable_device does not undo
3932 */
55c06c71 3933 pci_release_regions(h->pdev);
edd16368
SC		 3934 return err;
3935}
3936
339b2b14
SC		 3937static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
3938{
3939 int rc;
3940
3941#define HBA_INQUIRY_BYTE_COUNT 64
3942 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
3943 if (!h->hba_inquiry_data)
3944 return;
3945 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
3946 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
3947 if (rc != 0) {
3948 kfree(h->hba_inquiry_data);
3949 h->hba_inquiry_data = NULL;
3950 }
3951}
3952
4c2a8c40
SC		 3953static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
3954{
1df8552a 3955 int rc, i;
4c2a8c40
SC		 3956
3957 if (!reset_devices)
3958 return 0;
3959
1df8552a
SC		 3960 /* Reset the controller with a PCI power-cycle or via doorbell */
3961 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 3962
1df8552a
SC		 3963 /* -ENOTSUPP here means we cannot reset the controller
3964 * but it's already (and still) up and running in
18867659
SC		 3965 * "performant mode". Or, it might be 640x, which can't reset
3966 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 3967 */
3968 if (rc == -ENOTSUPP)
64670ac8 3969 return rc; /* just try to do the kdump anyhow. */
1df8552a
SC		 3970 if (rc)
3971 return -ENODEV;
4c2a8c40
SC		 3972
3973 /* Now try to get the controller to respond to a no-op */
2b870cb3 3974 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4c2a8c40
SC		 3975 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
3976 if (hpsa_noop(pdev) == 0)
3977 break;
3978 else
3979 dev_warn(&pdev->dev, "no-op failed%s\n",
3980 (i < 11 ? "; re-trying" : ""));
3981 }
3982 return 0;
3983}
3984
2e9d1b36
SC		 3985static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
3986{
3987 h->cmd_pool_bits = kzalloc(
3988 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
3989 sizeof(unsigned long), GFP_KERNEL);
3990 h->cmd_pool = pci_alloc_consistent(h->pdev,
3991 h->nr_cmds * sizeof(*h->cmd_pool),
3992 &(h->cmd_pool_dhandle));
3993 h->errinfo_pool = pci_alloc_consistent(h->pdev,
3994 h->nr_cmds * sizeof(*h->errinfo_pool),
3995 &(h->errinfo_pool_dhandle));
3996 if ((h->cmd_pool_bits == NULL)
3997 || (h->cmd_pool == NULL)
3998 || (h->errinfo_pool == NULL)) {
3999 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4000 return -ENOMEM;
4001 }
4002 return 0;
4003}
4004
4005static void hpsa_free_cmd_pool(struct ctlr_info *h)
4006{
4007 kfree(h->cmd_pool_bits);
4008 if (h->cmd_pool)
4009 pci_free_consistent(h->pdev,
4010 h->nr_cmds * sizeof(struct CommandList),
4011 h->cmd_pool, h->cmd_pool_dhandle);
4012 if (h->errinfo_pool)
4013 pci_free_consistent(h->pdev,
4014 h->nr_cmds * sizeof(struct ErrorInfo),
4015 h->errinfo_pool,
4016 h->errinfo_pool_dhandle);
4017}
4018
0ae01a32
SC		 4019static int hpsa_request_irq(struct ctlr_info *h,
4020 irqreturn_t (*msixhandler)(int, void *),
4021 irqreturn_t (*intxhandler)(int, void *))
4022{
4023 int rc;
4024
4025 if (h->msix_vector || h->msi_vector)
4026 rc = request_irq(h->intr[h->intr_mode], msixhandler,
4027 IRQF_DISABLED, h->devname, h);
4028 else
4029 rc = request_irq(h->intr[h->intr_mode], intxhandler,
4030 IRQF_DISABLED, h->devname, h);
4031 if (rc) {
4032 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4033 h->intr[h->intr_mode], h->devname);
4034 return -ENODEV;
4035 }
4036 return 0;
4037}
4038
64670ac8
SC		 4039static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
4040{
4041 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4042 HPSA_RESET_TYPE_CONTROLLER)) {
4043 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4044 return -EIO;
4045 }
4046
4047 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4048 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4049 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4050 return -1;
4051 }
4052
4053 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4054 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4055 dev_warn(&h->pdev->dev, "Board failed to become ready "
4056 "after soft reset.\n");
4057 return -1;
4058 }
4059
4060 return 0;
4061}
4062
4063static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4064{
4065 free_irq(h->intr[h->intr_mode], h);
4066#ifdef CONFIG_PCI_MSI
4067 if (h->msix_vector)
4068 pci_disable_msix(h->pdev);
4069 else if (h->msi_vector)
4070 pci_disable_msi(h->pdev);
4071#endif /* CONFIG_PCI_MSI */
4072 hpsa_free_sg_chain_blocks(h);
4073 hpsa_free_cmd_pool(h);
4074 kfree(h->blockFetchTable);
4075 pci_free_consistent(h->pdev, h->reply_pool_size,
4076 h->reply_pool, h->reply_pool_dhandle);
4077 if (h->vaddr)
4078 iounmap(h->vaddr);
4079 if (h->transtable)
4080 iounmap(h->transtable);
4081 if (h->cfgtable)
4082 iounmap(h->cfgtable);
4083 pci_release_regions(h->pdev);
4084 kfree(h);
4085}
4086
edd16368
SC		 4087static int __devinit hpsa_init_one(struct pci_dev *pdev,
4088 const struct pci_device_id *ent)
4089{
4c2a8c40 4090 int dac, rc;
edd16368 4091 struct ctlr_info *h;
64670ac8
SC		 4092 int try_soft_reset = 0;
4093 unsigned long flags;
edd16368
SC		 4094
4095 if (number_of_controllers == 0)
4096 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 4097
4c2a8c40 4098 rc = hpsa_init_reset_devices(pdev);
64670ac8
SC		 4099 if (rc) {
4100 if (rc != -ENOTSUPP)
4101 return rc;
4102 /* If the reset fails in a particular way (it has no way to do
4103 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4104 * a soft reset once we get the controller configured up to the
4105 * point that it can accept a command.
4106 */
4107 try_soft_reset = 1;
4108 rc = 0;
4109 }
4110
4111reinit_after_soft_reset:
edd16368 4112
303932fd
DB		 4113 /* Command structures must be aligned on a 32-byte boundary because
4114 * the 5 lower bits of the address are used by the hardware. and by
4115 * the driver. See comments in hpsa.h for more info.
4116 */
4117#define COMMANDLIST_ALIGNMENT 32
4118 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 4119 h = kzalloc(sizeof(*h), GFP_KERNEL);
4120 if (!h)
ecd9aad4 4121 return -ENOMEM;
edd16368 4122
55c06c71 4123 h->pdev = pdev;
a9a3a273 4124 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
9e0fc764
SC		 4125 INIT_LIST_HEAD(&h->cmpQ);
4126 INIT_LIST_HEAD(&h->reqQ);
6eaf46fd
SC		 4127 spin_lock_init(&h->lock);
4128 spin_lock_init(&h->scan_lock);
55c06c71 4129 rc = hpsa_pci_init(h);
ecd9aad4 4130 if (rc != 0)
edd16368
SC		 4131 goto clean1;
4132
4133 sprintf(h->devname, "hpsa%d", number_of_controllers);
4134 h->ctlr = number_of_controllers;
4135 number_of_controllers++;
edd16368
SC		 4136
4137 /* configure PCI DMA stuff */
ecd9aad4
SC		 4138 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4139 if (rc == 0) {
edd16368 4140 dac = 1;
ecd9aad4
SC		 4141 } else {
4142 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4143 if (rc == 0) {
4144 dac = 0;
4145 } else {
4146 dev_err(&pdev->dev, "no suitable DMA available\n");
4147 goto clean1;
4148 }
edd16368
SC		 4149 }
4150
4151 /* make sure the board interrupts are off */
4152 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018 4153
0ae01a32 4154 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
edd16368 4155 goto clean2;
303932fd
DB		 4156 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4157 h->devname, pdev->device,
a9a3a273 4158 h->intr[h->intr_mode], dac ? "" : " not");
2e9d1b36 4159 if (hpsa_allocate_cmd_pool(h))
edd16368 4160 goto clean4;
33a2ffce
SC		 4161 if (hpsa_allocate_sg_chain_blocks(h))
4162 goto clean4;
a08a8471
SC		 4163 init_waitqueue_head(&h->scan_wait_queue);
4164 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 4165
4166 pci_set_drvdata(pdev, h);
9a41338e
SC		 4167 h->ndevices = 0;
4168 h->scsi_host = NULL;
4169 spin_lock_init(&h->devlock);
64670ac8
SC		 4170 hpsa_put_ctlr_into_performant_mode(h);
4171
4172 /* At this point, the controller is ready to take commands.
4173 * Now, if reset_devices and the hard reset didn't work, try
4174 * the soft reset and see if that works.
4175 */
4176 if (try_soft_reset) {
4177
4178 /* This is kind of gross. We may or may not get a completion
4179 * from the soft reset command, and if we do, then the value
4180 * from the fifo may or may not be valid. So, we wait 10 secs
4181 * after the reset throwing away any completions we get during
4182 * that time. Unregister the interrupt handler and register
4183 * fake ones to scoop up any residual completions.
4184 */
4185 spin_lock_irqsave(&h->lock, flags);
4186 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4187 spin_unlock_irqrestore(&h->lock, flags);
4188 free_irq(h->intr[h->intr_mode], h);
4189 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4190 hpsa_intx_discard_completions);
4191 if (rc) {
4192 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4193 "soft reset.\n");
4194 goto clean4;
4195 }
4196
4197 rc = hpsa_kdump_soft_reset(h);
4198 if (rc)
4199 /* Neither hard nor soft reset worked, we're hosed. */
4200 goto clean4;
4201
4202 dev_info(&h->pdev->dev, "Board READY.\n");
4203 dev_info(&h->pdev->dev,
4204 "Waiting for stale completions to drain.\n");
4205 h->access.set_intr_mask(h, HPSA_INTR_ON);
4206 msleep(10000);
4207 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4208
4209 rc = controller_reset_failed(h->cfgtable);
4210 if (rc)
4211 dev_info(&h->pdev->dev,
4212 "Soft reset appears to have failed.\n");
4213
4214 /* since the controller's reset, we have to go back and re-init
4215 * everything. Easiest to just forget what we've done and do it
4216 * all over again.
4217 */
4218 hpsa_undo_allocations_after_kdump_soft_reset(h);
4219 try_soft_reset = 0;
4220 if (rc)
4221 /* don't go to clean4, we already unallocated */
4222 return -ENODEV;
4223
4224 goto reinit_after_soft_reset;
4225 }
edd16368
SC		 4226
4227 /* Turn the interrupts on so we can service requests */
4228 h->access.set_intr_mask(h, HPSA_INTR_ON);
4229
339b2b14 4230 hpsa_hba_inquiry(h);
edd16368 4231 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
edd16368
SC		 4232 return 1;
4233
4234clean4:
33a2ffce 4235 hpsa_free_sg_chain_blocks(h);
2e9d1b36 4236 hpsa_free_cmd_pool(h);
a9a3a273 4237 free_irq(h->intr[h->intr_mode], h);
edd16368
SC		 4238clean2:
4239clean1:
edd16368 4240 kfree(h);
ecd9aad4 4241 return rc;
edd16368
SC		 4242}
4243
4244static void hpsa_flush_cache(struct ctlr_info *h)
4245{
4246 char *flush_buf;
4247 struct CommandList *c;
4248
4249 flush_buf = kzalloc(4, GFP_KERNEL);
4250 if (!flush_buf)
4251 return;
4252
4253 c = cmd_special_alloc(h);
4254 if (!c) {
4255 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4256 goto out_of_memory;
4257 }
4258 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4259 RAID_CTLR_LUNID, TYPE_CMD);
4260 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4261 if (c->err_info->CommandStatus != 0)
4262 dev_warn(&h->pdev->dev,
4263 "error flushing cache on controller\n");
4264 cmd_special_free(h, c);
4265out_of_memory:
4266 kfree(flush_buf);
4267}
4268
4269static void hpsa_shutdown(struct pci_dev *pdev)
4270{
4271 struct ctlr_info *h;
4272
4273 h = pci_get_drvdata(pdev);
4274 /* Turn board interrupts off and send the flush cache command
4275 * sendcmd will turn off interrupt, and send the flush...
4276 * To write all data in the battery backed cache to disks
4277 */
4278 hpsa_flush_cache(h);
4279 h->access.set_intr_mask(h, HPSA_INTR_OFF);
a9a3a273 4280 free_irq(h->intr[h->intr_mode], h);
edd16368
SC		 4281#ifdef CONFIG_PCI_MSI
4282 if (h->msix_vector)
4283 pci_disable_msix(h->pdev);
4284 else if (h->msi_vector)
4285 pci_disable_msi(h->pdev);
4286#endif /* CONFIG_PCI_MSI */
4287}
4288
4289static void __devexit hpsa_remove_one(struct pci_dev *pdev)
4290{
4291 struct ctlr_info *h;
4292
4293 if (pci_get_drvdata(pdev) == NULL) {
4294 dev_err(&pdev->dev, "unable to remove device \n");
4295 return;
4296 }
4297 h = pci_get_drvdata(pdev);
edd16368
SC		 4298 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
4299 hpsa_shutdown(pdev);
4300 iounmap(h->vaddr);
204892e9
SC		 4301 iounmap(h->transtable);
4302 iounmap(h->cfgtable);
33a2ffce 4303 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 4304 pci_free_consistent(h->pdev,
4305 h->nr_cmds * sizeof(struct CommandList),
4306 h->cmd_pool, h->cmd_pool_dhandle);
4307 pci_free_consistent(h->pdev,
4308 h->nr_cmds * sizeof(struct ErrorInfo),
4309 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 4310 pci_free_consistent(h->pdev, h->reply_pool_size,
4311 h->reply_pool, h->reply_pool_dhandle);
edd16368 4312 kfree(h->cmd_pool_bits);
303932fd 4313 kfree(h->blockFetchTable);
339b2b14 4314 kfree(h->hba_inquiry_data);
edd16368
SC		 4315 /*
4316 * Deliberately omit pci_disable_device(): it does something nasty to
4317 * Smart Array controllers that pci_enable_device does not undo
4318 */
4319 pci_release_regions(pdev);
4320 pci_set_drvdata(pdev, NULL);
edd16368
SC		 4321 kfree(h);
4322}
4323
4324static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
4325 __attribute__((unused)) pm_message_t state)
4326{
4327 return -ENOSYS;
4328}
4329
4330static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
4331{
4332 return -ENOSYS;
4333}
4334
4335static struct pci_driver hpsa_pci_driver = {
4336 .name = "hpsa",
4337 .probe = hpsa_init_one,
4338 .remove = __devexit_p(hpsa_remove_one),
4339 .id_table = hpsa_pci_device_id, /* id_table */
4340 .shutdown = hpsa_shutdown,
4341 .suspend = hpsa_suspend,
4342 .resume = hpsa_resume,
4343};
4344
303932fd
DB		 4345/* Fill in bucket_map[], given nsgs (the max number of
4346 * scatter gather elements supported) and bucket[],
4347 * which is an array of 8 integers. The bucket[] array
4348 * contains 8 different DMA transfer sizes (in 16
4349 * byte increments) which the controller uses to fetch
4350 * commands. This function fills in bucket_map[], which
4351 * maps a given number of scatter gather elements to one of
4352 * the 8 DMA transfer sizes. The point of it is to allow the
4353 * controller to only do as much DMA as needed to fetch the
4354 * command, with the DMA transfer size encoded in the lower
4355 * bits of the command address.
4356 */
4357static void calc_bucket_map(int bucket[], int num_buckets,
4358 int nsgs, int *bucket_map)
4359{
4360 int i, j, b, size;
4361
4362 /* even a command with 0 SGs requires 4 blocks */
4363#define MINIMUM_TRANSFER_BLOCKS 4
4364#define NUM_BUCKETS 8
4365 /* Note, bucket_map must have nsgs+1 entries. */
4366 for (i = 0; i <= nsgs; i++) {
4367 /* Compute size of a command with i SG entries */
4368 size = i + MINIMUM_TRANSFER_BLOCKS;
4369 b = num_buckets; /* Assume the biggest bucket */
4370 /* Find the bucket that is just big enough */
4371 for (j = 0; j < 8; j++) {
4372 if (bucket[j] >= size) {
4373 b = j;
4374 break;
4375 }
4376 }
4377 /* for a command with i SG entries, use bucket b. */
4378 bucket_map[i] = b;
4379 }
4380}
4381
960a30e7
SC		 4382static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
4383 u32 use_short_tags)
303932fd 4384{
6c311b57
SC		 4385 int i;
4386 unsigned long register_value;
def342bd
SC		 4387
4388 /* This is a bit complicated. There are 8 registers on
4389 * the controller which we write to to tell it 8 different
4390 * sizes of commands which there may be. It's a way of
4391 * reducing the DMA done to fetch each command. Encoded into
4392 * each command's tag are 3 bits which communicate to the controller
4393 * which of the eight sizes that command fits within. The size of
4394 * each command depends on how many scatter gather entries there are.
4395 * Each SG entry requires 16 bytes. The eight registers are programmed
4396 * with the number of 16-byte blocks a command of that size requires.
4397 * The smallest command possible requires 5 such 16 byte blocks.
4398 * the largest command possible requires MAXSGENTRIES + 4 16-byte
4399 * blocks. Note, this only extends to the SG entries contained
4400 * within the command block, and does not extend to chained blocks
4401 * of SG elements. bft[] contains the eight values we write to
4402 * the registers. They are not evenly distributed, but have more
4403 * sizes for small commands, and fewer sizes for larger commands.
4404 */
4405 int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
4406 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
303932fd
DB		 4407 /* 5 = 1 s/g entry or 4k
4408 * 6 = 2 s/g entry or 8k
4409 * 8 = 4 s/g entry or 16k
4410 * 10 = 6 s/g entry or 24k
4411 */
303932fd
DB		 4412
4413 h->reply_pool_wraparound = 1; /* spec: init to 1 */
4414
4415 /* Controller spec: zero out this buffer. */
4416 memset(h->reply_pool, 0, h->reply_pool_size);
4417 h->reply_pool_head = h->reply_pool;
4418
303932fd
DB		 4419 bft[7] = h->max_sg_entries + 4;
4420 calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
4421 for (i = 0; i < 8; i++)
4422 writel(bft[i], &h->transtable->BlockFetch[i]);
4423
4424 /* size of controller ring buffer */
4425 writel(h->max_commands, &h->transtable->RepQSize);
4426 writel(1, &h->transtable->RepQCount);
4427 writel(0, &h->transtable->RepQCtrAddrLow32);
4428 writel(0, &h->transtable->RepQCtrAddrHigh32);
4429 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4430 writel(0, &h->transtable->RepQAddr0High32);
960a30e7 4431 writel(CFGTBL_Trans_Performant | use_short_tags,
303932fd
DB		 4432 &(h->cfgtable->HostWrite.TransportRequest));
4433 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 4434 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 4435 register_value = readl(&(h->cfgtable->TransportActive));
4436 if (!(register_value & CFGTBL_Trans_Performant)) {
4437 dev_warn(&h->pdev->dev, "unable to get board into"
4438 " performant mode\n");
4439 return;
4440 }
960a30e7
SC		 4441 /* Change the access methods to the performant access methods */
4442 h->access = SA5_performant_access;
4443 h->transMethod = CFGTBL_Trans_Performant;
6c311b57
SC		 4444}
4445
4446static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
4447{
4448 u32 trans_support;
4449
02ec19c8
SC		 4450 if (hpsa_simple_mode)
4451 return;
4452
6c311b57
SC		 4453 trans_support = readl(&(h->cfgtable->TransportSupport));
4454 if (!(trans_support & PERFORMANT_MODE))
4455 return;
4456
cba3d38b 4457 hpsa_get_max_perf_mode_cmds(h);
6c311b57
SC		 4458 h->max_sg_entries = 32;
4459 /* Performant mode ring buffer and supporting data structures */
4460 h->reply_pool_size = h->max_commands * sizeof(u64);
4461 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
4462 &(h->reply_pool_dhandle));
4463
4464 /* Need a block fetch table for performant mode */
4465 h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
4466 sizeof(u32)), GFP_KERNEL);
4467
4468 if ((h->reply_pool == NULL)
4469 || (h->blockFetchTable == NULL))
4470 goto clean_up;
4471
960a30e7
SC		 4472 hpsa_enter_performant_mode(h,
4473 trans_support & CFGTBL_Trans_use_short_tags);
303932fd
DB		 4474
4475 return;
4476
4477clean_up:
4478 if (h->reply_pool)
4479 pci_free_consistent(h->pdev, h->reply_pool_size,
4480 h->reply_pool, h->reply_pool_dhandle);
4481 kfree(h->blockFetchTable);
4482}
4483
edd16368
SC		 4484/*
4485 * This is it. Register the PCI driver information for the cards we control
4486 * the OS will call our registered routines when it finds one of our cards.
4487 */
4488static int __init hpsa_init(void)
4489{
31468401 4490 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 4491}
4492
4493static void __exit hpsa_cleanup(void)
4494{
4495 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 4496}
4497
4498module_init(hpsa_init);
4499module_exit(hpsa_cleanup);
Linux kernel - Deliverables
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