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[SCSI] lpfc 8.3.25: T10 DIF Fixes
[deliverable/linux.git] / drivers / scsi / lpfc / lpfc.h
CommitLineData
dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
2a622bfb 4 * Copyright (C) 2004-2011 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e 20 *******************************************************************/
21
2e0fef85 22#include <scsi/scsi_host.h>
dea3101e 23struct lpfc_sli2_slim;
24
3772a991
JS		 25#define LPFC_PCI_DEV_LP 0x1
26#define LPFC_PCI_DEV_OC 0x2
27
28#define LPFC_SLI_REV2 2
29#define LPFC_SLI_REV3 3
30#define LPFC_SLI_REV4 4
31
97eab634 32#define LPFC_MAX_TARGET 4096 /* max number of targets supported */
e17da18e
JS		 33#define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els
34 requests */
35#define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact
36 the NameServer before giving up. */
445cf4f4 37#define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */
81301a9b 38#define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */
e2aed29f
JS		 39#define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi
40 cmnd for menlo needs nearly twice as for firmware
41 downloads using bsg */
81301a9b
JS		 42#define LPFC_DEFAULT_PROT_SG_SEG_CNT 4096 /* sg protection elements count */
43#define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */
0558056c 44#define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */
81301a9b 45#define LPFC_MAX_PROT_SG_SEG_CNT 4096 /* prot sg element count per scsi cmd*/
dea3101e 46#define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
445cf4f4 47#define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */
495a714c 48#define LPFC_VNAME_LEN 100 /* vport symbolic name length */
977b5a0a
JS		 49#define LPFC_TGTQ_INTERVAL 40000 /* Min amount of time between tgt
50 queue depth change in millisecs */
51#define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */
7dc517df 52#define LPFC_MIN_TGT_QDEPTH 10
977b5a0a 53#define LPFC_MAX_TGT_QDEPTH 0xFFFF
dea3101e 54
ea2151b4
JS		 55#define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data
56 collection. */
92d7f7b0
JS		 57/*
58 * Following time intervals are used of adjusting SCSI device
59 * queue depths when there are driver resource error or Firmware
60 * resource error.
61 */
62#define QUEUE_RAMP_DOWN_INTERVAL (1 * HZ) /* 1 Second */
63#define QUEUE_RAMP_UP_INTERVAL (300 * HZ) /* 5 minutes */
64
65/* Number of exchanges reserved for discovery to complete */
66#define LPFC_DISC_IOCB_BUFF_COUNT 20
67
858c9f6c 68#define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */
311464ec 69#define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */
858c9f6c 70
9399627f
JS		 71/* Error Attention event polling interval */
72#define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */
73
dea3101e 74/* Define macros for 64 bit support */
75#define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
76#define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
77#define getPaddr(high, low) ((dma_addr_t)( \
78 (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
79/* Provide maximum configuration definitions. */
80#define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */
dea3101e 81#define FC_MAX_ADPTMSG 64
82
83#define MAX_HBAEVT 32
84
9399627f
JS		 85/* Number of MSI-X vectors the driver uses */
86#define LPFC_MSIX_VECTORS 2
87
5e9d9b82
JS		 88/* lpfc wait event data ready flag */
89#define LPFC_DATA_READY (1<<0)
90
875fbdfe
JSEC		 91enum lpfc_polling_flags {
92 ENABLE_FCP_RING_POLLING = 0x1,
93 DISABLE_FCP_RING_INT = 0x2
94};
95
dea3101e 96/* Provide DMA memory definitions the driver uses per port instance. */
97struct lpfc_dmabuf {
98 struct list_head list;
99 void *virt; /* virtual address ptr */
100 dma_addr_t phys; /* mapped address */
76bb24ef 101 uint32_t buffer_tag; /* used for tagged queue ring */
dea3101e 102};
103
104struct lpfc_dma_pool {
105 struct lpfc_dmabuf *elements;
106 uint32_t max_count;
107 uint32_t current_count;
108};
109
ed957684 110struct hbq_dmabuf {
da0436e9 111 struct lpfc_dmabuf hbuf;
ed957684 112 struct lpfc_dmabuf dbuf;
51ef4c26 113 uint32_t size;
ed957684 114 uint32_t tag;
4d9ab994 115 struct lpfc_cq_event cq_event;
45ed1190 116 unsigned long time_stamp;
ed957684
JS		 117};
118
dea3101e 119/* Priority bit. Set value to exceed low water mark in lpfc_mem. */
120#define MEM_PRI 0x100
121
122
123/****************************************************************************/
124/* Device VPD save area */
125/****************************************************************************/
126typedef struct lpfc_vpd {
127 uint32_t status; /* vpd status value */
128 uint32_t length; /* number of bytes actually returned */
129 struct {
130 uint32_t rsvd1; /* Revision numbers */
131 uint32_t biuRev;
132 uint32_t smRev;
133 uint32_t smFwRev;
134 uint32_t endecRev;
135 uint16_t rBit;
136 uint8_t fcphHigh;
137 uint8_t fcphLow;
138 uint8_t feaLevelHigh;
139 uint8_t feaLevelLow;
140 uint32_t postKernRev;
141 uint32_t opFwRev;
142 uint8_t opFwName[16];
143 uint32_t sli1FwRev;
144 uint8_t sli1FwName[16];
145 uint32_t sli2FwRev;
146 uint8_t sli2FwName[16];
147 } rev;
92d7f7b0
JS		 148 struct {
149#ifdef __BIG_ENDIAN_BITFIELD
da0436e9
JS		 150 uint32_t rsvd3 :19; /* Reserved */
151 uint32_t cdss : 1; /* Configure Data Security SLI */
152 uint32_t rsvd2 : 3; /* Reserved */
153 uint32_t cbg : 1; /* Configure BlockGuard */
92d7f7b0
JS		 154 uint32_t cmv : 1; /* Configure Max VPIs */
155 uint32_t ccrp : 1; /* Config Command Ring Polling */
156 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
157 uint32_t chbs : 1; /* Cofigure Host Backing store */
158 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
159 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
160 uint32_t cmx : 1; /* Configure Max XRIs */
161 uint32_t cmr : 1; /* Configure Max RPIs */
162#else /* __LITTLE_ENDIAN */
163 uint32_t cmr : 1; /* Configure Max RPIs */
164 uint32_t cmx : 1; /* Configure Max XRIs */
165 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
166 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
167 uint32_t chbs : 1; /* Cofigure Host Backing store */
168 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
169 uint32_t ccrp : 1; /* Config Command Ring Polling */
170 uint32_t cmv : 1; /* Configure Max VPIs */
da0436e9
JS		 171 uint32_t cbg : 1; /* Configure BlockGuard */
172 uint32_t rsvd2 : 3; /* Reserved */
173 uint32_t cdss : 1; /* Configure Data Security SLI */
174 uint32_t rsvd3 :19; /* Reserved */
92d7f7b0
JS		 175#endif
176 } sli3Feat;
dea3101e 177} lpfc_vpd_t;
178
179struct lpfc_scsi_buf;
180
181
182/*
183 * lpfc stat counters
184 */
185struct lpfc_stats {
186 /* Statistics for ELS commands */
187 uint32_t elsLogiCol;
188 uint32_t elsRetryExceeded;
189 uint32_t elsXmitRetry;
190 uint32_t elsDelayRetry;
191 uint32_t elsRcvDrop;
192 uint32_t elsRcvFrame;
193 uint32_t elsRcvRSCN;
194 uint32_t elsRcvRNID;
195 uint32_t elsRcvFARP;
196 uint32_t elsRcvFARPR;
197 uint32_t elsRcvFLOGI;
198 uint32_t elsRcvPLOGI;
199 uint32_t elsRcvADISC;
200 uint32_t elsRcvPDISC;
201 uint32_t elsRcvFAN;
202 uint32_t elsRcvLOGO;
203 uint32_t elsRcvPRLO;
204 uint32_t elsRcvPRLI;
7bb3b137 205 uint32_t elsRcvLIRR;
12265f68 206 uint32_t elsRcvRLS;
7bb3b137
JW		 207 uint32_t elsRcvRPS;
208 uint32_t elsRcvRPL;
5ffc266e 209 uint32_t elsRcvRRQ;
12265f68
JS		 210 uint32_t elsRcvRTV;
211 uint32_t elsRcvECHO;
dea3101e 212 uint32_t elsXmitFLOGI;
92d7f7b0 213 uint32_t elsXmitFDISC;
dea3101e 214 uint32_t elsXmitPLOGI;
215 uint32_t elsXmitPRLI;
216 uint32_t elsXmitADISC;
217 uint32_t elsXmitLOGO;
218 uint32_t elsXmitSCR;
219 uint32_t elsXmitRNID;
220 uint32_t elsXmitFARP;
221 uint32_t elsXmitFARPR;
222 uint32_t elsXmitACC;
223 uint32_t elsXmitLSRJT;
224
225 uint32_t frameRcvBcast;
226 uint32_t frameRcvMulti;
227 uint32_t strayXmitCmpl;
228 uint32_t frameXmitDelay;
229 uint32_t xriCmdCmpl;
230 uint32_t xriStatErr;
231 uint32_t LinkUp;
232 uint32_t LinkDown;
233 uint32_t LinkMultiEvent;
234 uint32_t NoRcvBuf;
235 uint32_t fcpCmd;
236 uint32_t fcpCmpl;
237 uint32_t fcpRspErr;
238 uint32_t fcpRemoteStop;
239 uint32_t fcpPortRjt;
240 uint32_t fcpPortBusy;
241 uint32_t fcpError;
242 uint32_t fcpLocalErr;
243};
244
245enum sysfs_mbox_state {
246 SMBOX_IDLE,
247 SMBOX_WRITING,
248 SMBOX_READING
249};
250
251struct lpfc_sysfs_mbox {
252 enum sysfs_mbox_state state;
253 size_t offset;
254 struct lpfcMboxq * mbox;
255};
256
2e0fef85
JS		 257struct lpfc_hba;
258
92d7f7b0 259
2e0fef85 260enum discovery_state {
92d7f7b0
JS		 261 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */
262 LPFC_VPORT_FAILED = 1, /* vport has failed */
263 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */
264 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */
265 LPFC_FDISC = 8, /* FDISC sent for vport */
266 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id
267 * configured */
268 LPFC_NS_REG = 10, /* Register with NameServer */
269 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */
270 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for
271 * device authentication / discovery */
272 LPFC_DISC_AUTH = 13, /* Processing ADISC list */
273 LPFC_VPORT_READY = 32,
2e0fef85
JS		 274};
275
276enum hba_state {
277 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */
278 LPFC_WARM_START = 1, /* HBA state after selective reset */
279 LPFC_INIT_START = 2, /* Initial state after board reset */
280 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */
281 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */
282 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */
92d7f7b0 283 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue
2e0fef85 284 * CLEAR_LA */
92d7f7b0 285 LPFC_HBA_READY = 32,
2e0fef85
JS		 286 LPFC_HBA_ERROR = -1
287};
288
289struct lpfc_vport {
2e0fef85 290 struct lpfc_hba *phba;
3772a991 291 struct list_head listentry;
2e0fef85
JS		 292 uint8_t port_type;
293#define LPFC_PHYSICAL_PORT 1
294#define LPFC_NPIV_PORT 2
295#define LPFC_FABRIC_PORT 3
296 enum discovery_state port_state;
297
92d7f7b0 298 uint16_t vpi;
da0436e9 299 uint16_t vfi;
c868595d
JS		 300 uint8_t vpi_state;
301#define LPFC_VPI_REGISTERED 0x1
2e0fef85
JS		 302
303 uint32_t fc_flag; /* FC flags */
304/* Several of these flags are HBA centric and should be moved to
305 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
306 */
92d7f7b0
JS		 307#define FC_PT2PT 0x1 /* pt2pt with no fabric */
308#define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */
309#define FC_DISC_TMO 0x4 /* Discovery timer running */
310#define FC_PUBLIC_LOOP 0x8 /* Public loop */
311#define FC_LBIT 0x10 /* LOGIN bit in loopinit set */
312#define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */
313#define FC_NLP_MORE 0x40 /* More node to process in node tbl */
314#define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */
315#define FC_FABRIC 0x100 /* We are fabric attached */
4b40c59e 316#define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */
92d7f7b0 317#define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */
4b40c59e 318#define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/
92d7f7b0
JS		 319#define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */
320#define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */
321#define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */
322#define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */
92d7f7b0
JS		 323#define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */
324#define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */
1c6834a7 325#define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
695a814e
JS		 326#define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */
327#define FC_VFI_REGISTERED 0x800000 /* VFI is registered */
328#define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */
92494144 329#define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */
2e0fef85 330
7ee5d43e
JS		 331 uint32_t ct_flags;
332#define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */
333#define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */
334#define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */
335#define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */
336#define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */
337
2e0fef85
JS		 338 struct list_head fc_nodes;
339
340 /* Keep counters for the number of entries in each list. */
341 uint16_t fc_plogi_cnt;
342 uint16_t fc_adisc_cnt;
343 uint16_t fc_reglogin_cnt;
344 uint16_t fc_prli_cnt;
345 uint16_t fc_unmap_cnt;
346 uint16_t fc_map_cnt;
347 uint16_t fc_npr_cnt;
348 uint16_t fc_unused_cnt;
349 struct serv_parm fc_sparam; /* buffer for our service parameters */
350
351 uint32_t fc_myDID; /* fibre channel S_ID */
352 uint32_t fc_prevDID; /* previous fibre channel S_ID */
92494144
JS		 353 struct lpfc_name fabric_portname;
354 struct lpfc_name fabric_nodename;
2e0fef85
JS		 355
356 int32_t stopped; /* HBA has not been restarted since last ERATT */
357 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
358
359 uint32_t num_disc_nodes; /*in addition to hba_state */
360
361 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */
362 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */
7f5f3d0d 363 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */
2e0fef85
JS		 364 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
365 struct lpfc_name fc_nodename; /* fc nodename */
366 struct lpfc_name fc_portname; /* fc portname */
367
368 struct lpfc_work_evt disc_timeout_evt;
369
370 struct timer_list fc_disctmo; /* Discovery rescue timer */
371 uint8_t fc_ns_retry; /* retries for fabric nameserver */
372 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */
373
374 spinlock_t work_port_lock;
375 uint32_t work_port_events; /* Timeout to be handled */
858c9f6c
JS		 376#define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */
377#define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */
378#define WORKER_FDMI_TMO 0x4 /* vport: FDMI timeout */
92494144 379#define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */
858c9f6c
JS		 380
381#define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */
382#define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */
b1c11812 383#define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */
858c9f6c
JS		 384#define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */
385#define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */
2a9bf3d0 386#define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */
2e0fef85
JS		 387
388 struct timer_list fc_fdmitmo;
389 struct timer_list els_tmofunc;
92494144 390 struct timer_list delayed_disc_tmo;
2e0fef85
JS		 391
392 int unreg_vpi_cmpl;
393
394 uint8_t load_flag;
395#define FC_LOADING 0x1 /* HBA in process of loading drvr */
396#define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */
3de2a653
JS		 397 /* Vport Config Parameters */
398 uint32_t cfg_scan_down;
399 uint32_t cfg_lun_queue_depth;
400 uint32_t cfg_nodev_tmo;
401 uint32_t cfg_devloss_tmo;
402 uint32_t cfg_restrict_login;
403 uint32_t cfg_peer_port_login;
404 uint32_t cfg_fcp_class;
405 uint32_t cfg_use_adisc;
406 uint32_t cfg_fdmi_on;
407 uint32_t cfg_discovery_threads;
e8b62011 408 uint32_t cfg_log_verbose;
3de2a653 409 uint32_t cfg_max_luns;
7ee5d43e 410 uint32_t cfg_enable_da_id;
977b5a0a 411 uint32_t cfg_max_scsicmpl_time;
7dc517df 412 uint32_t cfg_tgt_queue_depth;
3de2a653
JS		 413
414 uint32_t dev_loss_tmo_changed;
51ef4c26
JS		 415
416 struct fc_vport *fc_vport;
417
923e4b6a 418#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
51ef4c26
JS		 419 struct dentry *debug_disc_trc;
420 struct dentry *debug_nodelist;
421 struct dentry *vport_debugfs_root;
422 struct lpfc_debugfs_trc *disc_trc;
423 atomic_t disc_trc_cnt;
424#endif
ea2151b4
JS		 425 uint8_t stat_data_enabled;
426 uint8_t stat_data_blocked;
da0436e9 427 struct list_head rcv_buffer_list;
45ed1190 428 unsigned long rcv_buffer_time_stamp;
da0436e9
JS		 429 uint32_t vport_flag;
430#define STATIC_VPORT 1
2e0fef85
JS		 431};
432
ed957684
JS		 433struct hbq_s {
434 uint16_t entry_count; /* Current number of HBQ slots */
a8adb832 435 uint16_t buffer_count; /* Current number of buffers posted */
ed957684
JS		 436 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */
437 uint32_t hbqPutIdx; /* HBQ slot to use */
438 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
51ef4c26
JS		 439 void *hbq_virt; /* Virtual ptr to this hbq */
440 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */
441 /* Callback for HBQ buffer allocation */
442 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *);
443 /* Callback for HBQ buffer free */
444 void (*hbq_free_buffer) (struct lpfc_hba *,
445 struct hbq_dmabuf *);
ed957684
JS		 446};
447
51ef4c26
JS		 448#define LPFC_MAX_HBQS 4
449/* this matches the position in the lpfc_hbq_defs array */
92d7f7b0 450#define LPFC_ELS_HBQ 0
51ef4c26 451#define LPFC_EXTRA_HBQ 1
ed957684 452
7af67051
JS		 453enum hba_temp_state {
454 HBA_NORMAL_TEMP,
455 HBA_OVER_TEMP
456};
457
db2378e0
JS		 458enum intr_type_t {
459 NONE = 0,
460 INTx,
461 MSI,
462 MSIX,
463};
464
f1c3b0fc
JS		 465struct unsol_rcv_ct_ctx {
466 uint32_t ctxt_id;
467 uint32_t SID;
468 uint32_t oxid;
4fede78f
JS		 469 uint32_t flags;
470#define UNSOL_VALID 0x00000001
f1c3b0fc
JS		 471};
472
76a95d75
JS		 473#define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/
474#define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */
475#define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */
476#define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */
477#define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */
478#define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */
479#define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */
480#define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_16G
481#define LPFC_USER_LINK_SPEED_BITMAP ((1 << LPFC_USER_LINK_SPEED_16G) | \
482 (1 << LPFC_USER_LINK_SPEED_10G) | \
483 (1 << LPFC_USER_LINK_SPEED_8G) | \
484 (1 << LPFC_USER_LINK_SPEED_4G) | \
485 (1 << LPFC_USER_LINK_SPEED_2G) | \
486 (1 << LPFC_USER_LINK_SPEED_1G) | \
487 (1 << LPFC_USER_LINK_SPEED_AUTO))
488#define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16"
489
7ad20aa9
JS		 490enum nemb_type {
491 nemb_mse = 1,
492 nemb_hbd
493};
494
495enum mbox_type {
496 mbox_rd = 1,
497 mbox_wr
498};
499
500enum dma_type {
501 dma_mbox = 1,
502 dma_ebuf
503};
504
505enum sta_type {
506 sta_pre_addr = 1,
507 sta_pos_addr
508};
509
510struct lpfc_mbox_ext_buf_ctx {
511 uint32_t state;
512#define LPFC_BSG_MBOX_IDLE 0
513#define LPFC_BSG_MBOX_HOST 1
514#define LPFC_BSG_MBOX_PORT 2
515#define LPFC_BSG_MBOX_DONE 3
516#define LPFC_BSG_MBOX_ABTS 4
517 enum nemb_type nembType;
518 enum mbox_type mboxType;
519 uint32_t numBuf;
520 uint32_t mbxTag;
521 uint32_t seqNum;
522 struct lpfc_dmabuf *mbx_dmabuf;
523 struct list_head ext_dmabuf_list;
524};
525
dea3101e 526struct lpfc_hba {
3772a991
JS		 527 /* SCSI interface function jump table entries */
528 int (*lpfc_new_scsi_buf)
529 (struct lpfc_vport *, int);
530 struct lpfc_scsi_buf * (*lpfc_get_scsi_buf)
19ca7609 531 (struct lpfc_hba *, struct lpfc_nodelist *);
3772a991
JS		 532 int (*lpfc_scsi_prep_dma_buf)
533 (struct lpfc_hba *, struct lpfc_scsi_buf *);
534 void (*lpfc_scsi_unprep_dma_buf)
535 (struct lpfc_hba *, struct lpfc_scsi_buf *);
536 void (*lpfc_release_scsi_buf)
537 (struct lpfc_hba *, struct lpfc_scsi_buf *);
538 void (*lpfc_rampdown_queue_depth)
539 (struct lpfc_hba *);
540 void (*lpfc_scsi_prep_cmnd)
541 (struct lpfc_vport *, struct lpfc_scsi_buf *,
542 struct lpfc_nodelist *);
3772a991
JS		 543 /* IOCB interface function jump table entries */
544 int (*__lpfc_sli_issue_iocb)
545 (struct lpfc_hba *, uint32_t,
546 struct lpfc_iocbq *, uint32_t);
547 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *,
548 struct lpfc_iocbq *);
549 int (*lpfc_hba_down_post)(struct lpfc_hba *phba);
550
551
552 IOCB_t * (*lpfc_get_iocb_from_iocbq)
553 (struct lpfc_iocbq *);
554 void (*lpfc_scsi_cmd_iocb_cmpl)
555 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *);
556
557 /* MBOX interface function jump table entries */
558 int (*lpfc_sli_issue_mbox)
559 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
560 /* Slow-path IOCB process function jump table entries */
561 void (*lpfc_sli_handle_slow_ring_event)
562 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
563 uint32_t mask);
564 /* INIT device interface function jump table entries */
565 int (*lpfc_sli_hbq_to_firmware)
566 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
567 int (*lpfc_sli_brdrestart)
568 (struct lpfc_hba *);
569 int (*lpfc_sli_brdready)
570 (struct lpfc_hba *, uint32_t);
571 void (*lpfc_handle_eratt)
572 (struct lpfc_hba *);
573 void (*lpfc_stop_port)
574 (struct lpfc_hba *);
84d1b006 575 int (*lpfc_hba_init_link)
6e7288d9 576 (struct lpfc_hba *, uint32_t);
84d1b006 577 int (*lpfc_hba_down_link)
6e7288d9 578 (struct lpfc_hba *, uint32_t);
7f86059a
JS		 579 int (*lpfc_selective_reset)
580 (struct lpfc_hba *);
3772a991 581
3772a991
JS		 582 /* SLI4 specific HBA data structure */
583 struct lpfc_sli4_hba sli4_hba;
584
dea3101e 585 struct lpfc_sli sli;
3772a991
JS		 586 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
587 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */
ed957684 588 uint32_t sli3_options; /* Mask of enabled SLI3 options */
34b02dcd
JS		 589#define LPFC_SLI3_HBQ_ENABLED 0x01
590#define LPFC_SLI3_NPIV_ENABLED 0x02
591#define LPFC_SLI3_VPORT_TEARDOWN 0x04
592#define LPFC_SLI3_CRP_ENABLED 0x08
81301a9b 593#define LPFC_SLI3_BG_ENABLED 0x20
da0436e9 594#define LPFC_SLI3_DSS_ENABLED 0x40
fedd3b7b
JS		 595#define LPFC_SLI4_PERFH_ENABLED 0x80
596#define LPFC_SLI4_PHWQ_ENABLED 0x100
ed957684
JS		 597 uint32_t iocb_cmd_size;
598 uint32_t iocb_rsp_size;
2e0fef85
JS		 599
600 enum hba_state link_state;
601 uint32_t link_flag; /* link state flags */
311464ec 602#define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */
2e0fef85
JS		 603 /* This flag is set while issuing */
604 /* INIT_LINK mailbox command */
92d7f7b0 605#define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */
1b32f6aa 606#define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */
2e0fef85 607
9399627f
JS		 608 uint32_t hba_flag; /* hba generic flags */
609#define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */
da0436e9 610#define DEFER_ERATT 0x2 /* Deferred error attention in progress */
76a95d75 611#define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */
45ed1190 612#define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/
da0436e9
JS		 613#define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */
614#define FCP_XRI_ABORT_EVENT 0x20
615#define ELS_XRI_ABORT_EVENT 0x40
616#define ASYNC_EVENT 0x80
a0c87cbd 617#define LINK_DISABLED 0x100 /* Link disabled by user */
a93ff37a
JS		 618#define FCF_TS_INPROG 0x200 /* FCF table scan in progress */
619#define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */
620#define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */
621#define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */
622#define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */
19ca7609 623#define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */
45ed1190 624 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
34b02dcd
JS		 625 struct lpfc_dmabuf slim2p;
626
627 MAILBOX_t *mbox;
7a470277 628 uint32_t *mbox_ext;
7ad20aa9 629 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx;
9399627f 630 uint32_t ha_copy;
34b02dcd
JS		 631 struct _PCB *pcb;
632 struct _IOCB *IOCBs;
2e0fef85 633
34b02dcd 634 struct lpfc_dmabuf hbqslimp;
2e0fef85 635
dea3101e 636 uint16_t pci_cfg_value;
637
dea3101e 638 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
639
640 uint32_t fc_eventTag; /* event tag for link attention */
4d9ab994 641 uint32_t link_events;
dea3101e 642
dea3101e 643 /* These fields used to be binfo */
dea3101e 644 uint32_t fc_pref_DID; /* preferred D_ID */
92d7f7b0 645 uint8_t fc_pref_ALPA; /* preferred AL_PA */
12265f68 646 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */
dea3101e 647 uint32_t fc_edtov; /* E_D_TOV timer value */
648 uint32_t fc_arbtov; /* ARB_TOV timer value */
649 uint32_t fc_ratov; /* R_A_TOV timer value */
650 uint32_t fc_rttov; /* R_T_TOV timer value */
651 uint32_t fc_altov; /* AL_TOV timer value */
652 uint32_t fc_crtov; /* C_R_TOV timer value */
653 uint32_t fc_citov; /* C_I_TOV timer value */
dea3101e 654
dea3101e 655 struct serv_parm fc_fabparam; /* fabric service parameters buffer */
656 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */
657
dea3101e 658 uint32_t lmt;
dea3101e 659
660 uint32_t fc_topology; /* link topology, from LINK INIT */
661
662 struct lpfc_stats fc_stat;
663
dea3101e 664 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
665 uint32_t nport_event_cnt; /* timestamp for nlplist entry */
666
2e0fef85
JS		 667 uint8_t wwnn[8];
668 uint8_t wwpn[8];
dea3101e 669 uint32_t RandomData[7];
670
3de2a653 671 /* HBA Config Parameters */
dea3101e 672 uint32_t cfg_ack0;
78b2d852 673 uint32_t cfg_enable_npiv;
19ca7609 674 uint32_t cfg_enable_rrq;
dea3101e 675 uint32_t cfg_topology;
dea3101e 676 uint32_t cfg_link_speed;
677 uint32_t cfg_cr_delay;
678 uint32_t cfg_cr_count;
cf5bf97e 679 uint32_t cfg_multi_ring_support;
a4bc3379
JS		 680 uint32_t cfg_multi_ring_rctl;
681 uint32_t cfg_multi_ring_type;
875fbdfe
JSEC		 682 uint32_t cfg_poll;
683 uint32_t cfg_poll_tmo;
4ff43246 684 uint32_t cfg_use_msi;
da0436e9
JS		 685 uint32_t cfg_fcp_imax;
686 uint32_t cfg_fcp_wq_count;
687 uint32_t cfg_fcp_eq_count;
dea3101e 688 uint32_t cfg_sg_seg_cnt;
81301a9b 689 uint32_t cfg_prot_sg_seg_cnt;
dea3101e 690 uint32_t cfg_sg_dma_buf_size;
a12e07bc 691 uint64_t cfg_soft_wwnn;
c3f28afa 692 uint64_t cfg_soft_wwpn;
3de2a653 693 uint32_t cfg_hba_queue_depth;
13815c83
JS		 694 uint32_t cfg_enable_hba_reset;
695 uint32_t cfg_enable_hba_heartbeat;
81301a9b 696 uint32_t cfg_enable_bg;
7a470277 697 uint32_t cfg_hostmem_hgp;
da0436e9 698 uint32_t cfg_log_verbose;
0d878419 699 uint32_t cfg_aer_support;
912e3acd 700 uint32_t cfg_sriov_nr_virtfn;
2a9bf3d0 701 uint32_t cfg_iocb_cnt;
84d1b006 702 uint32_t cfg_suppress_link_up;
e40a02c1
JS		 703#define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */
704#define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */
705#define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */
ab56dc2e 706 uint32_t cfg_enable_dss;
dea3101e 707 lpfc_vpd_t vpd; /* vital product data */
708
dea3101e 709 struct pci_dev *pcidev;
710 struct list_head work_list;
711 uint32_t work_ha; /* Host Attention Bits for WT */
712 uint32_t work_ha_mask; /* HA Bits owned by WT */
713 uint32_t work_hs; /* HS stored in case of ERRAT */
714 uint32_t work_status[2]; /* Extra status from SLIM */
dea3101e 715
5e9d9b82 716 wait_queue_head_t work_waitq;
dea3101e 717 struct task_struct *worker_thread;
d7c255b2 718 unsigned long data_flags;
dea3101e 719
3163f725 720 uint32_t hbq_in_use; /* HBQs in use flag */
3772a991 721 struct list_head rb_pend_list; /* Received buffers to be processed */
ed957684 722 uint32_t hbq_count; /* Count of configured HBQs */
92d7f7b0 723 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */
ed957684 724
8fa38513
JS		 725 uint32_t fcp_qidx; /* next work queue to post work to */
726
dea3101e 727 unsigned long pci_bar0_map; /* Physical address for PCI BAR0 */
3772a991 728 unsigned long pci_bar1_map; /* Physical address for PCI BAR1 */
dea3101e 729 unsigned long pci_bar2_map; /* Physical address for PCI BAR2 */
730 void __iomem *slim_memmap_p; /* Kernel memory mapped address for
731 PCI BAR0 */
732 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
733 PCI BAR2 */
734
735 void __iomem *MBslimaddr; /* virtual address for mbox cmds */
736 void __iomem *HAregaddr; /* virtual address for host attn reg */
737 void __iomem *CAregaddr; /* virtual address for chip attn reg */
738 void __iomem *HSregaddr; /* virtual address for host status
739 reg */
740 void __iomem *HCregaddr; /* virtual address for host ctl reg */
741
ed957684 742 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */
34b02dcd 743 struct lpfc_pgp *port_gp;
ed957684 744 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */
92d7f7b0 745 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */
ed957684 746
dea3101e 747 int brd_no; /* FC board number */
dea3101e 748 char SerialNumber[32]; /* adapter Serial Number */
749 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */
750 char ModelDesc[256]; /* Model Description */
751 char ModelName[80]; /* Model Name */
752 char ProgramType[256]; /* Program Type */
753 char Port[20]; /* Port No */
754 uint8_t vpd_flag; /* VPD data flag */
755
756#define VPD_MODEL_DESC 0x1 /* valid vpd model description */
757#define VPD_MODEL_NAME 0x2 /* valid vpd model name */
758#define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */
759#define VPD_PORT 0x8 /* valid vpd port data */
760#define VPD_MASK 0xf /* mask for any vpd data */
761
a12e07bc 762 uint8_t soft_wwn_enable;
c3f28afa 763
875fbdfe 764 struct timer_list fcp_poll_timer;
9399627f 765 struct timer_list eratt_poll;
875fbdfe 766
dea3101e 767 /*
768 * stat counters
769 */
770 uint64_t fc4InputRequests;
771 uint64_t fc4OutputRequests;
772 uint64_t fc4ControlRequests;
81301a9b
JS		 773 uint64_t bg_guard_err_cnt;
774 uint64_t bg_apptag_err_cnt;
775 uint64_t bg_reftag_err_cnt;
dea3101e 776
777 struct lpfc_sysfs_mbox sysfs_mbox;
778
779 /* fastpath list. */
875fbdfe 780 spinlock_t scsi_buf_list_lock;
dea3101e 781 struct list_head lpfc_scsi_buf_list;
782 uint32_t total_scsi_bufs;
783 struct list_head lpfc_iocb_list;
784 uint32_t total_iocbq_bufs;
19ca7609 785 struct list_head active_rrq_list;
2e0fef85 786 spinlock_t hbalock;
dea3101e 787
788 /* pci_mem_pools */
789 struct pci_pool *lpfc_scsi_dma_buf_pool;
790 struct pci_pool *lpfc_mbuf_pool;
da0436e9
JS		 791 struct pci_pool *lpfc_hrb_pool; /* header receive buffer pool */
792 struct pci_pool *lpfc_drb_pool; /* data receive buffer pool */
8568a4d2 793 struct pci_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
dea3101e 794 struct lpfc_dma_pool lpfc_mbuf_safety_pool;
795
796 mempool_t *mbox_mem_pool;
797 mempool_t *nlp_mem_pool;
19ca7609 798 mempool_t *rrq_pool;
f888ba3c
JSEC		 799
800 struct fc_host_statistics link_stats;
db2378e0 801 enum intr_type_t intr_type;
5b75da2f
JS		 802 uint32_t intr_mode;
803#define LPFC_INTR_ERROR 0xFFFFFFFF
9399627f 804 struct msix_entry msix_entries[LPFC_MSIX_VECTORS];
858c9f6c 805
2e0fef85 806 struct list_head port_list;
549e55cd
JS		 807 struct lpfc_vport *pport; /* physical lpfc_vport pointer */
808 uint16_t max_vpi; /* Maximum virtual nports */
09372820 809#define LPFC_MAX_VPI 0xFFFF /* Max number of VPI supported */
da0436e9
JS		 810 uint16_t max_vports; /*
811 * For IOV HBAs max_vpi can change
812 * after a reset. max_vports is max
813 * number of vports present. This can
814 * be greater than max_vpi.
815 */
816 uint16_t vpi_base;
817 uint16_t vfi_base;
549e55cd 818 unsigned long *vpi_bmask; /* vpi allocation table */
6d368e53
JS		 819 uint16_t *vpi_ids;
820 uint16_t vpi_count;
821 struct list_head lpfc_vpi_blk_list;
92d7f7b0
JS		 822
823 /* Data structure used by fabric iocb scheduler */
824 struct list_head fabric_iocb_list;
825 atomic_t fabric_iocb_count;
826 struct timer_list fabric_block_timer;
827 unsigned long bit_flags;
828#define FABRIC_COMANDS_BLOCKED 0
829 atomic_t num_rsrc_err;
830 atomic_t num_cmd_success;
831 unsigned long last_rsrc_error_time;
832 unsigned long last_ramp_down_time;
833 unsigned long last_ramp_up_time;
923e4b6a 834#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
858c9f6c
JS		 835 struct dentry *hba_debugfs_root;
836 atomic_t debugfs_vport_count;
78b2d852 837 struct dentry *debug_hbqinfo;
c95d6c6c
JS		 838 struct dentry *debug_dumpHostSlim;
839 struct dentry *debug_dumpHBASlim;
81301a9b
JS		 840 struct dentry *debug_dumpData; /* BlockGuard BPL*/
841 struct dentry *debug_dumpDif; /* BlockGuard BPL*/
a58cbd52
JS		 842 struct dentry *debug_slow_ring_trc;
843 struct lpfc_debugfs_trc *slow_ring_trc;
844 atomic_t slow_ring_trc_cnt;
2a622bfb
JS		 845 /* iDiag debugfs sub-directory */
846 struct dentry *idiag_root;
847 struct dentry *idiag_pci_cfg;
848 struct dentry *idiag_que_info;
86a80846
JS		 849 struct dentry *idiag_que_acc;
850 struct dentry *idiag_drb_acc;
858c9f6c
JS		 851#endif
852
0ff10d46
JS		 853 /* Used for deferred freeing of ELS data buffers */
854 struct list_head elsbuf;
855 int elsbuf_cnt;
856 int elsbuf_prev_cnt;
857
57127f15 858 uint8_t temp_sensor_support;
858c9f6c
JS		 859 /* Fields used for heart beat. */
860 unsigned long last_completion_time;
bc73905a 861 unsigned long skipped_hb;
858c9f6c
JS		 862 struct timer_list hb_tmofunc;
863 uint8_t hb_outstanding;
19ca7609 864 struct timer_list rrq_tmr;
84774a4d 865 enum hba_temp_state over_temp_state;
e47c9093
JS		 866 /* ndlp reference management */
867 spinlock_t ndlp_lock;
76bb24ef
JS		 868 /*
869 * Following bit will be set for all buffer tags which are not
870 * associated with any HBQ.
871 */
872#define QUE_BUFTAG_BIT (1<<31)
873 uint32_t buffer_tag_count;
84774a4d
JS		 874 int wait_4_mlo_maint_flg;
875 wait_queue_head_t wait_4_mlo_m_q;
ea2151b4
JS		 876 /* data structure used for latency data collection */
877#define LPFC_NO_BUCKET 0
878#define LPFC_LINEAR_BUCKET 1
879#define LPFC_POWER2_BUCKET 2
880 uint8_t bucket_type;
881 uint32_t bucket_base;
882 uint32_t bucket_step;
883
884/* Maximum number of events that can be outstanding at any time*/
885#define LPFC_MAX_EVT_COUNT 512
886 atomic_t fast_event_count;
32b9793f
JS		 887 uint32_t fcoe_eventtag;
888 uint32_t fcoe_eventtag_at_fcf_scan;
da0436e9
JS		 889 struct lpfc_fcf fcf;
890 uint8_t fc_map[3];
891 uint8_t valid_vlan;
892 uint16_t vlan_id;
893 struct list_head fcf_conn_rec_list;
f1c3b0fc 894
4fede78f 895 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
f1c3b0fc
JS		 896 struct list_head ct_ev_waiters;
897 struct unsol_rcv_ct_ctx ct_ctx[64];
898 uint32_t ctx_idx;
e2aed29f
JS		 899
900 uint8_t menlo_flag; /* menlo generic flags */
901#define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */
2a9bf3d0
JS		 902 uint32_t iocb_cnt;
903 uint32_t iocb_max;
d7c47992 904 atomic_t sdev_cnt;
bc73905a
JS		 905 uint8_t fips_spec_rev;
906 uint8_t fips_level;
dea3101e 907};
908
2e0fef85
JS		 909static inline struct Scsi_Host *
910lpfc_shost_from_vport(struct lpfc_vport *vport)
911{
912 return container_of((void *) vport, struct Scsi_Host, hostdata[0]);
913}
914
5b8bd0c9 915static inline void
2e0fef85
JS		 916lpfc_set_loopback_flag(struct lpfc_hba *phba)
917{
5b8bd0c9 918 if (phba->cfg_topology == FLAGS_LOCAL_LB)
2e0fef85 919 phba->link_flag |= LS_LOOPBACK_MODE;
5b8bd0c9 920 else
2e0fef85
JS		 921 phba->link_flag &= ~LS_LOOPBACK_MODE;
922}
923
924static inline int
925lpfc_is_link_up(struct lpfc_hba *phba)
926{
927 return phba->link_state == LPFC_LINK_UP ||
92d7f7b0
JS		 928 phba->link_state == LPFC_CLEAR_LA ||
929 phba->link_state == LPFC_HBA_READY;
5b8bd0c9 930}
dea3101e 931
5e9d9b82
JS		 932static inline void
933lpfc_worker_wake_up(struct lpfc_hba *phba)
934{
935 /* Set the lpfc data pending flag */
936 set_bit(LPFC_DATA_READY, &phba->data_flags);
937
938 /* Wake up worker thread */
939 wake_up(&phba->work_waitq);
940 return;
941}
942
9940b97b
JS		 943static inline int
944lpfc_readl(void __iomem *addr, uint32_t *data)
945{
946 uint32_t temp;
947 temp = readl(addr);
948 if (temp == 0xffffffff)
949 return -EIO;
950 *data = temp;
951 return 0;
952}
953
954static inline int
9399627f
JS		 955lpfc_sli_read_hs(struct lpfc_hba *phba)
956{
957 /*
958 * There was a link/board error. Read the status register to retrieve
959 * the error event and process it.
960 */
961 phba->sli.slistat.err_attn_event++;
962
9940b97b
JS		 963 /* Save status info and check for unplug error */
964 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) ||
965 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) ||
966 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) {
967 return -EIO;
968 }
9399627f
JS		 969
970 /* Clear chip Host Attention error bit */
971 writel(HA_ERATT, phba->HAregaddr);
972 readl(phba->HAregaddr); /* flush */
973 phba->pport->stopped = 1;
974
9940b97b 975 return 0;
9399627f 976}
Linux kernel - Deliverables
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