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[SCSI] lpfc 8.2.3 : Miscellaneous Small Fixes - part 2
[deliverable/linux.git] / drivers / scsi / lpfc / lpfc_sli.c
CommitLineData
dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
9413afff 4 * Copyright (C) 2004-2007 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e 20 *******************************************************************/
21
dea3101e 22#include <linux/blkdev.h>
23#include <linux/pci.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26
91886523 27#include <scsi/scsi.h>
dea3101e 28#include <scsi/scsi_cmnd.h>
29#include <scsi/scsi_device.h>
30#include <scsi/scsi_host.h>
f888ba3c 31#include <scsi/scsi_transport_fc.h>
dea3101e 32
33#include "lpfc_hw.h"
34#include "lpfc_sli.h"
35#include "lpfc_disc.h"
36#include "lpfc_scsi.h"
37#include "lpfc.h"
38#include "lpfc_crtn.h"
39#include "lpfc_logmsg.h"
40#include "lpfc_compat.h"
858c9f6c 41#include "lpfc_debugfs.h"
dea3101e 42
43/*
44 * Define macro to log: Mailbox command x%x cannot issue Data
45 * This allows multiple uses of lpfc_msgBlk0311
46 * w/o perturbing log msg utility.
47 */
92d7f7b0 48#define LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag) \
dea3101e 49 lpfc_printf_log(phba, \
50 KERN_INFO, \
51 LOG_MBOX | LOG_SLI, \
e8b62011 52 "(%d):0311 Mailbox command x%x cannot " \
92d7f7b0 53 "issue Data: x%x x%x x%x\n", \
92d7f7b0
JS		 54 pmbox->vport ? pmbox->vport->vpi : 0, \
55 pmbox->mb.mbxCommand, \
2e0fef85 56 phba->pport->port_state, \
dea3101e 57 psli->sli_flag, \
2e0fef85 58 flag)
dea3101e 59
60
61/* There are only four IOCB completion types. */
62typedef enum _lpfc_iocb_type {
63 LPFC_UNKNOWN_IOCB,
64 LPFC_UNSOL_IOCB,
65 LPFC_SOL_IOCB,
66 LPFC_ABORT_IOCB
67} lpfc_iocb_type;
68
92d7f7b0
JS		 69 /* SLI-2/SLI-3 provide different sized iocbs. Given a pointer
70 * to the start of the ring, and the slot number of the
71 * desired iocb entry, calc a pointer to that entry.
72 */
ed957684
JS		 73static inline IOCB_t *
74lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
75{
76 return (IOCB_t *) (((char *) pring->cmdringaddr) +
77 pring->cmdidx * phba->iocb_cmd_size);
78}
79
80static inline IOCB_t *
81lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
82{
83 return (IOCB_t *) (((char *) pring->rspringaddr) +
84 pring->rspidx * phba->iocb_rsp_size);
85}
86
2e0fef85
JS		 87static struct lpfc_iocbq *
88__lpfc_sli_get_iocbq(struct lpfc_hba *phba)
0bd4ca25
JSEC		 89{
90 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
91 struct lpfc_iocbq * iocbq = NULL;
92
93 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
94 return iocbq;
95}
96
2e0fef85
JS		 97struct lpfc_iocbq *
98lpfc_sli_get_iocbq(struct lpfc_hba *phba)
99{
100 struct lpfc_iocbq * iocbq = NULL;
101 unsigned long iflags;
102
103 spin_lock_irqsave(&phba->hbalock, iflags);
104 iocbq = __lpfc_sli_get_iocbq(phba);
105 spin_unlock_irqrestore(&phba->hbalock, iflags);
106 return iocbq;
107}
108
604a3e30 109void
2e0fef85 110__lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
604a3e30 111{
2e0fef85 112 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
604a3e30
JB		 113
114 /*
115 * Clean all volatile data fields, preserve iotag and node struct.
116 */
117 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
118 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
119}
120
2e0fef85
JS		 121void
122lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
123{
124 unsigned long iflags;
125
126 /*
127 * Clean all volatile data fields, preserve iotag and node struct.
128 */
129 spin_lock_irqsave(&phba->hbalock, iflags);
130 __lpfc_sli_release_iocbq(phba, iocbq);
131 spin_unlock_irqrestore(&phba->hbalock, iflags);
132}
133
dea3101e 134/*
135 * Translate the iocb command to an iocb command type used to decide the final
136 * disposition of each completed IOCB.
137 */
138static lpfc_iocb_type
139lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
140{
141 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
142
143 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
144 return 0;
145
146 switch (iocb_cmnd) {
147 case CMD_XMIT_SEQUENCE_CR:
148 case CMD_XMIT_SEQUENCE_CX:
149 case CMD_XMIT_BCAST_CN:
150 case CMD_XMIT_BCAST_CX:
151 case CMD_ELS_REQUEST_CR:
152 case CMD_ELS_REQUEST_CX:
153 case CMD_CREATE_XRI_CR:
154 case CMD_CREATE_XRI_CX:
155 case CMD_GET_RPI_CN:
156 case CMD_XMIT_ELS_RSP_CX:
157 case CMD_GET_RPI_CR:
158 case CMD_FCP_IWRITE_CR:
159 case CMD_FCP_IWRITE_CX:
160 case CMD_FCP_IREAD_CR:
161 case CMD_FCP_IREAD_CX:
162 case CMD_FCP_ICMND_CR:
163 case CMD_FCP_ICMND_CX:
f5603511
JS		 164 case CMD_FCP_TSEND_CX:
165 case CMD_FCP_TRSP_CX:
166 case CMD_FCP_TRECEIVE_CX:
167 case CMD_FCP_AUTO_TRSP_CX:
dea3101e 168 case CMD_ADAPTER_MSG:
169 case CMD_ADAPTER_DUMP:
170 case CMD_XMIT_SEQUENCE64_CR:
171 case CMD_XMIT_SEQUENCE64_CX:
172 case CMD_XMIT_BCAST64_CN:
173 case CMD_XMIT_BCAST64_CX:
174 case CMD_ELS_REQUEST64_CR:
175 case CMD_ELS_REQUEST64_CX:
176 case CMD_FCP_IWRITE64_CR:
177 case CMD_FCP_IWRITE64_CX:
178 case CMD_FCP_IREAD64_CR:
179 case CMD_FCP_IREAD64_CX:
180 case CMD_FCP_ICMND64_CR:
181 case CMD_FCP_ICMND64_CX:
f5603511
JS		 182 case CMD_FCP_TSEND64_CX:
183 case CMD_FCP_TRSP64_CX:
184 case CMD_FCP_TRECEIVE64_CX:
dea3101e 185 case CMD_GEN_REQUEST64_CR:
186 case CMD_GEN_REQUEST64_CX:
187 case CMD_XMIT_ELS_RSP64_CX:
188 type = LPFC_SOL_IOCB;
189 break;
190 case CMD_ABORT_XRI_CN:
191 case CMD_ABORT_XRI_CX:
192 case CMD_CLOSE_XRI_CN:
193 case CMD_CLOSE_XRI_CX:
194 case CMD_XRI_ABORTED_CX:
195 case CMD_ABORT_MXRI64_CN:
196 type = LPFC_ABORT_IOCB;
197 break;
198 case CMD_RCV_SEQUENCE_CX:
199 case CMD_RCV_ELS_REQ_CX:
200 case CMD_RCV_SEQUENCE64_CX:
201 case CMD_RCV_ELS_REQ64_CX:
57127f15 202 case CMD_ASYNC_STATUS:
ed957684
JS		 203 case CMD_IOCB_RCV_SEQ64_CX:
204 case CMD_IOCB_RCV_ELS64_CX:
205 case CMD_IOCB_RCV_CONT64_CX:
dea3101e 206 type = LPFC_UNSOL_IOCB;
207 break;
208 default:
209 type = LPFC_UNKNOWN_IOCB;
210 break;
211 }
212
213 return type;
214}
215
216static int
ed957684 217lpfc_sli_ring_map(struct lpfc_hba *phba)
dea3101e 218{
219 struct lpfc_sli *psli = &phba->sli;
ed957684
JS		 220 LPFC_MBOXQ_t *pmb;
221 MAILBOX_t *pmbox;
222 int i, rc, ret = 0;
dea3101e 223
ed957684
JS		 224 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
225 if (!pmb)
226 return -ENOMEM;
227 pmbox = &pmb->mb;
228 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 229 for (i = 0; i < psli->num_rings; i++) {
dea3101e 230 lpfc_config_ring(phba, i, pmb);
231 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
232 if (rc != MBX_SUCCESS) {
92d7f7b0 233 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 234 "0446 Adapter failed to init (%d), "
dea3101e 235 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
236 "ring %d\n",
e8b62011
JS		 237 rc, pmbox->mbxCommand,
238 pmbox->mbxStatus, i);
2e0fef85 239 phba->link_state = LPFC_HBA_ERROR;
ed957684
JS		 240 ret = -ENXIO;
241 break;
dea3101e 242 }
243 }
ed957684
JS		 244 mempool_free(pmb, phba->mbox_mem_pool);
245 return ret;
dea3101e 246}
247
248static int
2e0fef85
JS		 249lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
250 struct lpfc_iocbq *piocb)
dea3101e 251{
dea3101e 252 list_add_tail(&piocb->list, &pring->txcmplq);
253 pring->txcmplq_cnt++;
92d7f7b0
JS		 254 if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
255 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
256 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
257 if (!piocb->vport)
258 BUG();
259 else
260 mod_timer(&piocb->vport->els_tmofunc,
261 jiffies + HZ * (phba->fc_ratov << 1));
262 }
263
dea3101e 264
2e0fef85 265 return 0;
dea3101e 266}
267
268static struct lpfc_iocbq *
2e0fef85 269lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 270{
dea3101e 271 struct lpfc_iocbq *cmd_iocb;
272
858c9f6c
JS		 273 list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
274 if (cmd_iocb != NULL)
dea3101e 275 pring->txq_cnt--;
2e0fef85 276 return cmd_iocb;
dea3101e 277}
278
279static IOCB_t *
280lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
281{
ed957684
JS		 282 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
283 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
284 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 285 uint32_t max_cmd_idx = pring->numCiocb;
dea3101e 286
287 if ((pring->next_cmdidx == pring->cmdidx) &&
288 (++pring->next_cmdidx >= max_cmd_idx))
289 pring->next_cmdidx = 0;
290
291 if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
292
293 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
294
295 if (unlikely(pring->local_getidx >= max_cmd_idx)) {
296 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 297 "0315 Ring %d issue: portCmdGet %d "
dea3101e 298 "is bigger then cmd ring %d\n",
e8b62011 299 pring->ringno,
dea3101e 300 pring->local_getidx, max_cmd_idx);
301
2e0fef85 302 phba->link_state = LPFC_HBA_ERROR;
dea3101e 303 /*
304 * All error attention handlers are posted to
305 * worker thread
306 */
307 phba->work_ha |= HA_ERATT;
308 phba->work_hs = HS_FFER3;
92d7f7b0
JS		 309
310 /* hbalock should already be held */
dea3101e 311 if (phba->work_wait)
92d7f7b0 312 lpfc_worker_wake_up(phba);
dea3101e 313
314 return NULL;
315 }
316
317 if (pring->local_getidx == pring->next_cmdidx)
318 return NULL;
319 }
320
ed957684 321 return lpfc_cmd_iocb(phba, pring);
dea3101e 322}
323
604a3e30 324uint16_t
2e0fef85 325lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
dea3101e 326{
2e0fef85
JS		 327 struct lpfc_iocbq **new_arr;
328 struct lpfc_iocbq **old_arr;
604a3e30
JB		 329 size_t new_len;
330 struct lpfc_sli *psli = &phba->sli;
331 uint16_t iotag;
dea3101e 332
2e0fef85 333 spin_lock_irq(&phba->hbalock);
604a3e30
JB		 334 iotag = psli->last_iotag;
335 if(++iotag < psli->iocbq_lookup_len) {
336 psli->last_iotag = iotag;
337 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 338 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 339 iocbq->iotag = iotag;
340 return iotag;
2e0fef85 341 } else if (psli->iocbq_lookup_len < (0xffff
604a3e30
JB		 342 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
343 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
2e0fef85
JS		 344 spin_unlock_irq(&phba->hbalock);
345 new_arr = kzalloc(new_len * sizeof (struct lpfc_iocbq *),
604a3e30
JB		 346 GFP_KERNEL);
347 if (new_arr) {
2e0fef85 348 spin_lock_irq(&phba->hbalock);
604a3e30
JB		 349 old_arr = psli->iocbq_lookup;
350 if (new_len <= psli->iocbq_lookup_len) {
351 /* highly unprobable case */
352 kfree(new_arr);
353 iotag = psli->last_iotag;
354 if(++iotag < psli->iocbq_lookup_len) {
355 psli->last_iotag = iotag;
356 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 357 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 358 iocbq->iotag = iotag;
359 return iotag;
360 }
2e0fef85 361 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 362 return 0;
363 }
364 if (psli->iocbq_lookup)
365 memcpy(new_arr, old_arr,
366 ((psli->last_iotag + 1) *
311464ec 367 sizeof (struct lpfc_iocbq *)));
604a3e30
JB		 368 psli->iocbq_lookup = new_arr;
369 psli->iocbq_lookup_len = new_len;
370 psli->last_iotag = iotag;
371 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 372 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 373 iocbq->iotag = iotag;
374 kfree(old_arr);
375 return iotag;
376 }
8f6d98d2 377 } else
2e0fef85 378 spin_unlock_irq(&phba->hbalock);
dea3101e 379
604a3e30 380 lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
e8b62011
JS		 381 "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
382 psli->last_iotag);
dea3101e 383
604a3e30 384 return 0;
dea3101e 385}
386
387static void
388lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
389 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
390{
391 /*
604a3e30 392 * Set up an iotag
dea3101e 393 */
604a3e30 394 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 395
a58cbd52
JS		 396 if (pring->ringno == LPFC_ELS_RING) {
397 lpfc_debugfs_slow_ring_trc(phba,
398 "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
399 *(((uint32_t *) &nextiocb->iocb) + 4),
400 *(((uint32_t *) &nextiocb->iocb) + 6),
401 *(((uint32_t *) &nextiocb->iocb) + 7));
402 }
403
dea3101e 404 /*
405 * Issue iocb command to adapter
406 */
92d7f7b0 407 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
dea3101e 408 wmb();
409 pring->stats.iocb_cmd++;
410
411 /*
412 * If there is no completion routine to call, we can release the
413 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
414 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
415 */
416 if (nextiocb->iocb_cmpl)
417 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30 418 else
2e0fef85 419 __lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e 420
421 /*
422 * Let the HBA know what IOCB slot will be the next one the
423 * driver will put a command into.
424 */
425 pring->cmdidx = pring->next_cmdidx;
ed957684 426 writel(pring->cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
dea3101e 427}
428
429static void
2e0fef85 430lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 431{
432 int ringno = pring->ringno;
433
434 pring->flag |= LPFC_CALL_RING_AVAILABLE;
435
436 wmb();
437
438 /*
439 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
440 * The HBA will tell us when an IOCB entry is available.
441 */
442 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
443 readl(phba->CAregaddr); /* flush */
444
445 pring->stats.iocb_cmd_full++;
446}
447
448static void
2e0fef85 449lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 450{
451 int ringno = pring->ringno;
452
453 /*
454 * Tell the HBA that there is work to do in this ring.
455 */
456 wmb();
457 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
458 readl(phba->CAregaddr); /* flush */
459}
460
461static void
2e0fef85 462lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 463{
464 IOCB_t *iocb;
465 struct lpfc_iocbq *nextiocb;
466
467 /*
468 * Check to see if:
469 * (a) there is anything on the txq to send
470 * (b) link is up
471 * (c) link attention events can be processed (fcp ring only)
472 * (d) IOCB processing is not blocked by the outstanding mbox command.
473 */
474 if (pring->txq_cnt &&
2e0fef85 475 lpfc_is_link_up(phba) &&
dea3101e 476 (pring->ringno != phba->sli.fcp_ring ||
0b727fea 477 phba->sli.sli_flag & LPFC_PROCESS_LA)) {
dea3101e 478
479 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
480 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
481 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
482
483 if (iocb)
484 lpfc_sli_update_ring(phba, pring);
485 else
486 lpfc_sli_update_full_ring(phba, pring);
487 }
488
489 return;
490}
491
ed957684
JS		 492struct lpfc_hbq_entry *
493lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
494{
495 struct hbq_s *hbqp = &phba->hbqs[hbqno];
496
497 if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
498 ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
499 hbqp->next_hbqPutIdx = 0;
500
501 if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
92d7f7b0 502 uint32_t raw_index = phba->hbq_get[hbqno];
ed957684
JS		 503 uint32_t getidx = le32_to_cpu(raw_index);
504
505 hbqp->local_hbqGetIdx = getidx;
506
507 if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
508 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 509 LOG_SLI | LOG_VPORT,
e8b62011 510 "1802 HBQ %d: local_hbqGetIdx "
ed957684 511 "%u is > than hbqp->entry_count %u\n",
e8b62011 512 hbqno, hbqp->local_hbqGetIdx,
ed957684
JS		 513 hbqp->entry_count);
514
515 phba->link_state = LPFC_HBA_ERROR;
516 return NULL;
517 }
518
519 if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
520 return NULL;
521 }
522
51ef4c26
JS		 523 return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
524 hbqp->hbqPutIdx;
ed957684
JS		 525}
526
527void
528lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
529{
92d7f7b0
JS		 530 struct lpfc_dmabuf *dmabuf, *next_dmabuf;
531 struct hbq_dmabuf *hbq_buf;
51ef4c26 532 int i, hbq_count;
ed957684 533
51ef4c26 534 hbq_count = lpfc_sli_hbq_count();
ed957684 535 /* Return all memory used by all HBQs */
51ef4c26
JS		 536 for (i = 0; i < hbq_count; ++i) {
537 list_for_each_entry_safe(dmabuf, next_dmabuf,
538 &phba->hbqs[i].hbq_buffer_list, list) {
539 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
540 list_del(&hbq_buf->dbuf.list);
541 (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
542 }
a8adb832 543 phba->hbqs[i].buffer_count = 0;
ed957684 544 }
ed957684
JS		 545}
546
51ef4c26 547static struct lpfc_hbq_entry *
ed957684 548lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
92d7f7b0 549 struct hbq_dmabuf *hbq_buf)
ed957684
JS		 550{
551 struct lpfc_hbq_entry *hbqe;
92d7f7b0 552 dma_addr_t physaddr = hbq_buf->dbuf.phys;
ed957684
JS		 553
554 /* Get next HBQ entry slot to use */
555 hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
556 if (hbqe) {
557 struct hbq_s *hbqp = &phba->hbqs[hbqno];
558
92d7f7b0
JS		 559 hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
560 hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
51ef4c26 561 hbqe->bde.tus.f.bdeSize = hbq_buf->size;
ed957684 562 hbqe->bde.tus.f.bdeFlags = 0;
92d7f7b0
JS		 563 hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
564 hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
565 /* Sync SLIM */
ed957684
JS		 566 hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
567 writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
92d7f7b0 568 /* flush */
ed957684 569 readl(phba->hbq_put + hbqno);
51ef4c26 570 list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
ed957684 571 }
51ef4c26 572 return hbqe;
ed957684
JS		 573}
574
92d7f7b0
JS		 575static struct lpfc_hbq_init lpfc_els_hbq = {
576 .rn = 1,
577 .entry_count = 200,
578 .mask_count = 0,
579 .profile = 0,
51ef4c26 580 .ring_mask = (1 << LPFC_ELS_RING),
92d7f7b0
JS		 581 .buffer_count = 0,
582 .init_count = 20,
583 .add_count = 5,
584};
ed957684 585
51ef4c26
JS		 586static struct lpfc_hbq_init lpfc_extra_hbq = {
587 .rn = 1,
588 .entry_count = 200,
589 .mask_count = 0,
590 .profile = 0,
591 .ring_mask = (1 << LPFC_EXTRA_RING),
592 .buffer_count = 0,
593 .init_count = 0,
594 .add_count = 5,
595};
596
78b2d852 597struct lpfc_hbq_init *lpfc_hbq_defs[] = {
92d7f7b0 598 &lpfc_els_hbq,
51ef4c26 599 &lpfc_extra_hbq,
92d7f7b0 600};
ed957684 601
311464ec 602static int
92d7f7b0 603lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
ed957684 604{
92d7f7b0
JS		 605 uint32_t i, start, end;
606 struct hbq_dmabuf *hbq_buffer;
ed957684 607
51ef4c26
JS		 608 if (!phba->hbqs[hbqno].hbq_alloc_buffer) {
609 return 0;
610 }
611
a8adb832
JS		 612 start = phba->hbqs[hbqno].buffer_count;
613 end = count + start;
92d7f7b0
JS		 614 if (end > lpfc_hbq_defs[hbqno]->entry_count) {
615 end = lpfc_hbq_defs[hbqno]->entry_count;
616 }
ed957684
JS		 617
618 /* Populate HBQ entries */
92d7f7b0 619 for (i = start; i < end; i++) {
51ef4c26 620 hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
92d7f7b0
JS		 621 if (!hbq_buffer)
622 return 1;
92d7f7b0 623 hbq_buffer->tag = (i | (hbqno << 16));
51ef4c26 624 if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
a8adb832 625 phba->hbqs[hbqno].buffer_count++;
51ef4c26
JS		 626 else
627 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684
JS		 628 }
629 return 0;
630}
631
92d7f7b0
JS		 632int
633lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
ed957684 634{
92d7f7b0
JS		 635 return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
636 lpfc_hbq_defs[qno]->add_count));
637}
ed957684 638
92d7f7b0
JS		 639int
640lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
641{
642 return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
643 lpfc_hbq_defs[qno]->init_count));
ed957684
JS		 644}
645
92d7f7b0
JS		 646struct hbq_dmabuf *
647lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
ed957684 648{
92d7f7b0
JS		 649 struct lpfc_dmabuf *d_buf;
650 struct hbq_dmabuf *hbq_buf;
51ef4c26
JS		 651 uint32_t hbqno;
652
653 hbqno = tag >> 16;
a0a74e45 654 if (hbqno >= LPFC_MAX_HBQS)
51ef4c26 655 return NULL;
ed957684 656
51ef4c26 657 list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
92d7f7b0 658 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
51ef4c26 659 if (hbq_buf->tag == tag) {
92d7f7b0 660 return hbq_buf;
ed957684
JS		 661 }
662 }
92d7f7b0 663 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
e8b62011 664 "1803 Bad hbq tag. Data: x%x x%x\n",
a8adb832 665 tag, phba->hbqs[tag >> 16].buffer_count);
92d7f7b0 666 return NULL;
ed957684
JS		 667}
668
669void
51ef4c26 670lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
ed957684
JS		 671{
672 uint32_t hbqno;
673
51ef4c26
JS		 674 if (hbq_buffer) {
675 hbqno = hbq_buffer->tag >> 16;
676 if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
677 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
678 }
ed957684
JS		 679 }
680}
681
dea3101e 682static int
683lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
684{
685 uint8_t ret;
686
687 switch (mbxCommand) {
688 case MBX_LOAD_SM:
689 case MBX_READ_NV:
690 case MBX_WRITE_NV:
a8adb832 691 case MBX_WRITE_VPARMS:
dea3101e 692 case MBX_RUN_BIU_DIAG:
693 case MBX_INIT_LINK:
694 case MBX_DOWN_LINK:
695 case MBX_CONFIG_LINK:
696 case MBX_CONFIG_RING:
697 case MBX_RESET_RING:
698 case MBX_READ_CONFIG:
699 case MBX_READ_RCONFIG:
700 case MBX_READ_SPARM:
701 case MBX_READ_STATUS:
702 case MBX_READ_RPI:
703 case MBX_READ_XRI:
704 case MBX_READ_REV:
705 case MBX_READ_LNK_STAT:
706 case MBX_REG_LOGIN:
707 case MBX_UNREG_LOGIN:
708 case MBX_READ_LA:
709 case MBX_CLEAR_LA:
710 case MBX_DUMP_MEMORY:
711 case MBX_DUMP_CONTEXT:
712 case MBX_RUN_DIAGS:
713 case MBX_RESTART:
714 case MBX_UPDATE_CFG:
715 case MBX_DOWN_LOAD:
716 case MBX_DEL_LD_ENTRY:
717 case MBX_RUN_PROGRAM:
718 case MBX_SET_MASK:
719 case MBX_SET_SLIM:
720 case MBX_UNREG_D_ID:
41415862 721 case MBX_KILL_BOARD:
dea3101e 722 case MBX_CONFIG_FARP:
41415862 723 case MBX_BEACON:
dea3101e 724 case MBX_LOAD_AREA:
725 case MBX_RUN_BIU_DIAG64:
726 case MBX_CONFIG_PORT:
727 case MBX_READ_SPARM64:
728 case MBX_READ_RPI64:
729 case MBX_REG_LOGIN64:
730 case MBX_READ_LA64:
731 case MBX_FLASH_WR_ULA:
732 case MBX_SET_DEBUG:
733 case MBX_LOAD_EXP_ROM:
57127f15 734 case MBX_ASYNCEVT_ENABLE:
92d7f7b0
JS		 735 case MBX_REG_VPI:
736 case MBX_UNREG_VPI:
858c9f6c 737 case MBX_HEARTBEAT:
dea3101e 738 ret = mbxCommand;
739 break;
740 default:
741 ret = MBX_SHUTDOWN;
742 break;
743 }
2e0fef85 744 return ret;
dea3101e 745}
746static void
2e0fef85 747lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
dea3101e 748{
749 wait_queue_head_t *pdone_q;
858c9f6c 750 unsigned long drvr_flag;
dea3101e 751
752 /*
753 * If pdone_q is empty, the driver thread gave up waiting and
754 * continued running.
755 */
7054a606 756 pmboxq->mbox_flag |= LPFC_MBX_WAKE;
858c9f6c 757 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e 758 pdone_q = (wait_queue_head_t *) pmboxq->context1;
759 if (pdone_q)
760 wake_up_interruptible(pdone_q);
858c9f6c 761 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 762 return;
763}
764
765void
2e0fef85 766lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
dea3101e 767{
768 struct lpfc_dmabuf *mp;
7054a606
JS		 769 uint16_t rpi;
770 int rc;
771
dea3101e 772 mp = (struct lpfc_dmabuf *) (pmb->context1);
7054a606 773
dea3101e 774 if (mp) {
775 lpfc_mbuf_free(phba, mp->virt, mp->phys);
776 kfree(mp);
777 }
7054a606
JS		 778
779 /*
780 * If a REG_LOGIN succeeded after node is destroyed or node
781 * is in re-discovery driver need to cleanup the RPI.
782 */
2e0fef85
JS		 783 if (!(phba->pport->load_flag & FC_UNLOADING) &&
784 pmb->mb.mbxCommand == MBX_REG_LOGIN64 &&
785 !pmb->mb.mbxStatus) {
7054a606
JS		 786
787 rpi = pmb->mb.un.varWords[0];
92d7f7b0
JS		 788 lpfc_unreg_login(phba, pmb->mb.un.varRegLogin.vpi, rpi, pmb);
789 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
7054a606
JS		 790 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
791 if (rc != MBX_NOT_FINISHED)
792 return;
793 }
794
2e0fef85 795 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 796 return;
797}
798
799int
2e0fef85 800lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
dea3101e 801{
92d7f7b0 802 MAILBOX_t *pmbox;
dea3101e 803 LPFC_MBOXQ_t *pmb;
92d7f7b0
JS		 804 int rc;
805 LIST_HEAD(cmplq);
dea3101e 806
807 phba->sli.slistat.mbox_event++;
808
92d7f7b0
JS		 809 /* Get all completed mailboxe buffers into the cmplq */
810 spin_lock_irq(&phba->hbalock);
811 list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
812 spin_unlock_irq(&phba->hbalock);
dea3101e 813
92d7f7b0
JS		 814 /* Get a Mailbox buffer to setup mailbox commands for callback */
815 do {
816 list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
817 if (pmb == NULL)
818 break;
2e0fef85 819
92d7f7b0 820 pmbox = &pmb->mb;
dea3101e 821
858c9f6c
JS		 822 if (pmbox->mbxCommand != MBX_HEARTBEAT) {
823 if (pmb->vport) {
824 lpfc_debugfs_disc_trc(pmb->vport,
825 LPFC_DISC_TRC_MBOX_VPORT,
826 "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
827 (uint32_t)pmbox->mbxCommand,
828 pmbox->un.varWords[0],
829 pmbox->un.varWords[1]);
830 }
831 else {
832 lpfc_debugfs_disc_trc(phba->pport,
833 LPFC_DISC_TRC_MBOX,
834 "MBOX cmpl: cmd:x%x mb:x%x x%x",
835 (uint32_t)pmbox->mbxCommand,
836 pmbox->un.varWords[0],
837 pmbox->un.varWords[1]);
838 }
839 }
840
dea3101e 841 /*
842 * It is a fatal error if unknown mbox command completion.
843 */
844 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
845 MBX_SHUTDOWN) {
dea3101e 846 /* Unknow mailbox command compl */
92d7f7b0 847 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 848 "(%d):0323 Unknown Mailbox command "
92d7f7b0 849 "%x Cmpl\n",
92d7f7b0
JS		 850 pmb->vport ? pmb->vport->vpi : 0,
851 pmbox->mbxCommand);
2e0fef85 852 phba->link_state = LPFC_HBA_ERROR;
dea3101e 853 phba->work_hs = HS_FFER3;
854 lpfc_handle_eratt(phba);
92d7f7b0 855 continue;
dea3101e 856 }
857
dea3101e 858 if (pmbox->mbxStatus) {
859 phba->sli.slistat.mbox_stat_err++;
860 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
861 /* Mbox cmd cmpl error - RETRYing */
92d7f7b0
JS		 862 lpfc_printf_log(phba, KERN_INFO,
863 LOG_MBOX | LOG_SLI,
e8b62011 864 "(%d):0305 Mbox cmd cmpl "
92d7f7b0
JS		 865 "error - RETRYing Data: x%x "
866 "x%x x%x x%x\n",
92d7f7b0
JS		 867 pmb->vport ? pmb->vport->vpi :0,
868 pmbox->mbxCommand,
869 pmbox->mbxStatus,
870 pmbox->un.varWords[0],
871 pmb->vport->port_state);
dea3101e 872 pmbox->mbxStatus = 0;
873 pmbox->mbxOwner = OWN_HOST;
2e0fef85 874 spin_lock_irq(&phba->hbalock);
dea3101e 875 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 876 spin_unlock_irq(&phba->hbalock);
dea3101e 877 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
878 if (rc == MBX_SUCCESS)
92d7f7b0 879 continue;
dea3101e 880 }
881 }
882
883 /* Mailbox cmd <cmd> Cmpl <cmpl> */
92d7f7b0 884 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 885 "(%d):0307 Mailbox cmd x%x Cmpl x%p "
dea3101e 886 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
92d7f7b0 887 pmb->vport ? pmb->vport->vpi : 0,
dea3101e 888 pmbox->mbxCommand,
889 pmb->mbox_cmpl,
890 *((uint32_t *) pmbox),
891 pmbox->un.varWords[0],
892 pmbox->un.varWords[1],
893 pmbox->un.varWords[2],
894 pmbox->un.varWords[3],
895 pmbox->un.varWords[4],
896 pmbox->un.varWords[5],
897 pmbox->un.varWords[6],
898 pmbox->un.varWords[7]);
899
92d7f7b0 900 if (pmb->mbox_cmpl)
dea3101e 901 pmb->mbox_cmpl(phba,pmb);
92d7f7b0
JS		 902 } while (1);
903 return 0;
904}
dea3101e 905
92d7f7b0
JS		 906static struct lpfc_dmabuf *
907lpfc_sli_replace_hbqbuff(struct lpfc_hba *phba, uint32_t tag)
908{
909 struct hbq_dmabuf *hbq_entry, *new_hbq_entry;
51ef4c26
JS		 910 uint32_t hbqno;
911 void *virt; /* virtual address ptr */
912 dma_addr_t phys; /* mapped address */
dea3101e 913
92d7f7b0
JS		 914 hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
915 if (hbq_entry == NULL)
916 return NULL;
917 list_del(&hbq_entry->dbuf.list);
51ef4c26
JS		 918
919 hbqno = tag >> 16;
920 new_hbq_entry = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
92d7f7b0
JS		 921 if (new_hbq_entry == NULL)
922 return &hbq_entry->dbuf;
92d7f7b0 923 new_hbq_entry->tag = -1;
51ef4c26
JS		 924 phys = new_hbq_entry->dbuf.phys;
925 virt = new_hbq_entry->dbuf.virt;
926 new_hbq_entry->dbuf.phys = hbq_entry->dbuf.phys;
927 new_hbq_entry->dbuf.virt = hbq_entry->dbuf.virt;
928 hbq_entry->dbuf.phys = phys;
929 hbq_entry->dbuf.virt = virt;
92d7f7b0
JS		 930 lpfc_sli_free_hbq(phba, hbq_entry);
931 return &new_hbq_entry->dbuf;
dea3101e 932}
92d7f7b0 933
57127f15 934
dea3101e 935static int
936lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
937 struct lpfc_iocbq *saveq)
938{
939 IOCB_t * irsp;
940 WORD5 * w5p;
941 uint32_t Rctl, Type;
942 uint32_t match, i;
943
944 match = 0;
945 irsp = &(saveq->iocb);
57127f15
JS		 946
947 if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
948 if (pring->lpfc_sli_rcv_async_status)
949 pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
950 else
951 lpfc_printf_log(phba,
952 KERN_WARNING,
953 LOG_SLI,
954 "0316 Ring %d handler: unexpected "
955 "ASYNC_STATUS iocb received evt_code "
956 "0x%x\n",
957 pring->ringno,
958 irsp->un.asyncstat.evt_code);
959 return 1;
960 }
961
dea3101e 962 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
ed957684
JS		 963 || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)
964 || (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)
965 || (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX)) {
dea3101e 966 Rctl = FC_ELS_REQ;
967 Type = FC_ELS_DATA;
968 } else {
969 w5p =
970 (WORD5 *) & (saveq->iocb.un.
971 ulpWord[5]);
972 Rctl = w5p->hcsw.Rctl;
973 Type = w5p->hcsw.Type;
974
975 /* Firmware Workaround */
976 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
92d7f7b0
JS		 977 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
978 irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
dea3101e 979 Rctl = FC_ELS_REQ;
980 Type = FC_ELS_DATA;
981 w5p->hcsw.Rctl = Rctl;
982 w5p->hcsw.Type = Type;
983 }
984 }
92d7f7b0
JS		 985
986 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
987 if (irsp->ulpBdeCount != 0)
988 saveq->context2 = lpfc_sli_replace_hbqbuff(phba,
989 irsp->un.ulpWord[3]);
990 if (irsp->ulpBdeCount == 2)
991 saveq->context3 = lpfc_sli_replace_hbqbuff(phba,
51ef4c26 992 irsp->unsli3.sli3Words[7]);
92d7f7b0
JS		 993 }
994
dea3101e 995 /* unSolicited Responses */
996 if (pring->prt[0].profile) {
cf5bf97e
JW		 997 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
998 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
999 saveq);
dea3101e 1000 match = 1;
1001 } else {
1002 /* We must search, based on rctl / type
1003 for the right routine */
1004 for (i = 0; i < pring->num_mask;
1005 i++) {
1006 if ((pring->prt[i].rctl ==
1007 Rctl)
1008 && (pring->prt[i].
1009 type == Type)) {
cf5bf97e
JW		 1010 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
1011 (pring->prt[i].lpfc_sli_rcv_unsol_event)
1012 (phba, pring, saveq);
dea3101e 1013 match = 1;
1014 break;
1015 }
1016 }
1017 }
1018 if (match == 0) {
1019 /* Unexpected Rctl / Type received */
1020 /* Ring <ringno> handler: unexpected
1021 Rctl <Rctl> Type <Type> received */
92d7f7b0 1022 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1023 "0313 Ring %d handler: unexpected Rctl x%x "
92d7f7b0 1024 "Type x%x received\n",
e8b62011 1025 pring->ringno, Rctl, Type);
dea3101e 1026 }
92d7f7b0 1027 return 1;
dea3101e 1028}
1029
1030static struct lpfc_iocbq *
2e0fef85
JS		 1031lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
1032 struct lpfc_sli_ring *pring,
1033 struct lpfc_iocbq *prspiocb)
dea3101e 1034{
dea3101e 1035 struct lpfc_iocbq *cmd_iocb = NULL;
1036 uint16_t iotag;
1037
604a3e30
JB		 1038 iotag = prspiocb->iocb.ulpIoTag;
1039
1040 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
1041 cmd_iocb = phba->sli.iocbq_lookup[iotag];
92d7f7b0 1042 list_del_init(&cmd_iocb->list);
604a3e30
JB		 1043 pring->txcmplq_cnt--;
1044 return cmd_iocb;
dea3101e 1045 }
1046
dea3101e 1047 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1048 "0317 iotag x%x is out off "
604a3e30 1049 "range: max iotag x%x wd0 x%x\n",
e8b62011 1050 iotag, phba->sli.last_iotag,
604a3e30 1051 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e 1052 return NULL;
1053}
1054
1055static int
2e0fef85 1056lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e 1057 struct lpfc_iocbq *saveq)
1058{
2e0fef85 1059 struct lpfc_iocbq *cmdiocbp;
dea3101e 1060 int rc = 1;
1061 unsigned long iflag;
1062
1063 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
2e0fef85 1064 spin_lock_irqsave(&phba->hbalock, iflag);
604a3e30 1065 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
2e0fef85
JS		 1066 spin_unlock_irqrestore(&phba->hbalock, iflag);
1067
dea3101e 1068 if (cmdiocbp) {
1069 if (cmdiocbp->iocb_cmpl) {
1070 /*
1071 * Post all ELS completions to the worker thread.
1072 * All other are passed to the completion callback.
1073 */
1074 if (pring->ringno == LPFC_ELS_RING) {
07951076
JS		 1075 if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
1076 cmdiocbp->iocb_flag &=
1077 ~LPFC_DRIVER_ABORTED;
1078 saveq->iocb.ulpStatus =
1079 IOSTAT_LOCAL_REJECT;
1080 saveq->iocb.un.ulpWord[4] =
1081 IOERR_SLI_ABORTED;
1082 }
dea3101e 1083 }
2e0fef85 1084 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
604a3e30
JB		 1085 } else
1086 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e 1087 } else {
1088 /*
1089 * Unknown initiating command based on the response iotag.
1090 * This could be the case on the ELS ring because of
1091 * lpfc_els_abort().
1092 */
1093 if (pring->ringno != LPFC_ELS_RING) {
1094 /*
1095 * Ring <ringno> handler: unexpected completion IoTag
1096 * <IoTag>
1097 */
e8b62011
JS		 1098 lpfc_printf_vlog(cmdiocbp->vport, KERN_WARNING, LOG_SLI,
1099 "0322 Ring %d handler: "
1100 "unexpected completion IoTag x%x "
1101 "Data: x%x x%x x%x x%x\n",
1102 pring->ringno,
1103 saveq->iocb.ulpIoTag,
1104 saveq->iocb.ulpStatus,
1105 saveq->iocb.un.ulpWord[4],
1106 saveq->iocb.ulpCommand,
1107 saveq->iocb.ulpContext);
dea3101e 1108 }
1109 }
68876920 1110
dea3101e 1111 return rc;
1112}
1113
2e0fef85
JS		 1114static void
1115lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
875fbdfe 1116{
ed957684
JS		 1117 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1118 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1119 &phba->slim2p->mbx.us.s2.port[pring->ringno];
875fbdfe
JSEC		 1120 /*
1121 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1122 * rsp ring <portRspMax>
1123 */
1124 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1125 "0312 Ring %d handler: portRspPut %d "
875fbdfe 1126 "is bigger then rsp ring %d\n",
e8b62011 1127 pring->ringno, le32_to_cpu(pgp->rspPutInx),
875fbdfe
JSEC		 1128 pring->numRiocb);
1129
2e0fef85 1130 phba->link_state = LPFC_HBA_ERROR;
875fbdfe
JSEC		 1131
1132 /*
1133 * All error attention handlers are posted to
1134 * worker thread
1135 */
1136 phba->work_ha |= HA_ERATT;
1137 phba->work_hs = HS_FFER3;
92d7f7b0
JS		 1138
1139 /* hbalock should already be held */
875fbdfe 1140 if (phba->work_wait)
92d7f7b0 1141 lpfc_worker_wake_up(phba);
875fbdfe
JSEC		 1142
1143 return;
1144}
1145
2e0fef85 1146void lpfc_sli_poll_fcp_ring(struct lpfc_hba *phba)
875fbdfe 1147{
2e0fef85
JS		 1148 struct lpfc_sli *psli = &phba->sli;
1149 struct lpfc_sli_ring *pring = &psli->ring[LPFC_FCP_RING];
875fbdfe
JSEC		 1150 IOCB_t *irsp = NULL;
1151 IOCB_t *entry = NULL;
1152 struct lpfc_iocbq *cmdiocbq = NULL;
1153 struct lpfc_iocbq rspiocbq;
1154 struct lpfc_pgp *pgp;
1155 uint32_t status;
1156 uint32_t portRspPut, portRspMax;
1157 int type;
1158 uint32_t rsp_cmpl = 0;
875fbdfe 1159 uint32_t ha_copy;
2e0fef85 1160 unsigned long iflags;
875fbdfe
JSEC		 1161
1162 pring->stats.iocb_event++;
1163
ed957684
JS		 1164 pgp = (phba->sli_rev == 3) ?
1165 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1166 &phba->slim2p->mbx.us.s2.port[pring->ringno];
1167
875fbdfe
JSEC		 1168
1169 /*
1170 * The next available response entry should never exceed the maximum
1171 * entries. If it does, treat it as an adapter hardware error.
1172 */
1173 portRspMax = pring->numRiocb;
1174 portRspPut = le32_to_cpu(pgp->rspPutInx);
1175 if (unlikely(portRspPut >= portRspMax)) {
1176 lpfc_sli_rsp_pointers_error(phba, pring);
1177 return;
1178 }
1179
1180 rmb();
1181 while (pring->rspidx != portRspPut) {
ed957684 1182 entry = lpfc_resp_iocb(phba, pring);
875fbdfe
JSEC		 1183 if (++pring->rspidx >= portRspMax)
1184 pring->rspidx = 0;
1185
1186 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
1187 (uint32_t *) &rspiocbq.iocb,
92d7f7b0 1188 phba->iocb_rsp_size);
875fbdfe
JSEC		 1189 irsp = &rspiocbq.iocb;
1190 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
1191 pring->stats.iocb_rsp++;
1192 rsp_cmpl++;
1193
1194 if (unlikely(irsp->ulpStatus)) {
1195 /* Rsp ring <ringno> error: IOCB */
1196 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1197 "0326 Rsp Ring %d error: IOCB Data: "
875fbdfe 1198 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 1199 pring->ringno,
875fbdfe
JSEC		 1200 irsp->un.ulpWord[0],
1201 irsp->un.ulpWord[1],
1202 irsp->un.ulpWord[2],
1203 irsp->un.ulpWord[3],
1204 irsp->un.ulpWord[4],
1205 irsp->un.ulpWord[5],
1206 *(((uint32_t *) irsp) + 6),
1207 *(((uint32_t *) irsp) + 7));
1208 }
1209
1210 switch (type) {
1211 case LPFC_ABORT_IOCB:
1212 case LPFC_SOL_IOCB:
1213 /*
1214 * Idle exchange closed via ABTS from port. No iocb
1215 * resources need to be recovered.
1216 */
1217 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 1218 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 1219 "0314 IOCB cmd 0x%x "
1220 "processed. Skipping "
1221 "completion",
dca9479b 1222 irsp->ulpCommand);
875fbdfe
JSEC		 1223 break;
1224 }
1225
2e0fef85 1226 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1227 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
1228 &rspiocbq);
2e0fef85 1229 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1230 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
1231 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1232 &rspiocbq);
1233 }
1234 break;
1235 default:
1236 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1237 char adaptermsg[LPFC_MAX_ADPTMSG];
1238 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1239 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1240 MAX_MSG_DATA);
898eb71c
JP		 1241 dev_warn(&((phba->pcidev)->dev),
1242 "lpfc%d: %s\n",
875fbdfe
JSEC		 1243 phba->brd_no, adaptermsg);
1244 } else {
1245 /* Unknown IOCB command */
1246 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1247 "0321 Unknown IOCB command "
875fbdfe 1248 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 1249 type, irsp->ulpCommand,
875fbdfe
JSEC		 1250 irsp->ulpStatus,
1251 irsp->ulpIoTag,
1252 irsp->ulpContext);
1253 }
1254 break;
1255 }
1256
1257 /*
1258 * The response IOCB has been processed. Update the ring
1259 * pointer in SLIM. If the port response put pointer has not
1260 * been updated, sync the pgp->rspPutInx and fetch the new port
1261 * response put pointer.
1262 */
ed957684 1263 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
875fbdfe
JSEC		 1264
1265 if (pring->rspidx == portRspPut)
1266 portRspPut = le32_to_cpu(pgp->rspPutInx);
1267 }
1268
1269 ha_copy = readl(phba->HAregaddr);
1270 ha_copy >>= (LPFC_FCP_RING * 4);
1271
1272 if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
2e0fef85 1273 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1274 pring->stats.iocb_rsp_full++;
1275 status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
1276 writel(status, phba->CAregaddr);
1277 readl(phba->CAregaddr);
2e0fef85 1278 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1279 }
1280 if ((ha_copy & HA_R0CE_RSP) &&
1281 (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
2e0fef85 1282 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1283 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1284 pring->stats.iocb_cmd_empty++;
1285
1286 /* Force update of the local copy of cmdGetInx */
1287 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1288 lpfc_sli_resume_iocb(phba, pring);
1289
1290 if ((pring->lpfc_sli_cmd_available))
1291 (pring->lpfc_sli_cmd_available) (phba, pring);
1292
2e0fef85 1293 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1294 }
1295
1296 return;
1297}
1298
dea3101e 1299/*
1300 * This routine presumes LPFC_FCP_RING handling and doesn't bother
1301 * to check it explicitly.
1302 */
1303static int
2e0fef85
JS		 1304lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
1305 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 1306{
ed957684
JS		 1307 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1308 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1309 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 1310 IOCB_t *irsp = NULL;
87f6eaff 1311 IOCB_t *entry = NULL;
dea3101e 1312 struct lpfc_iocbq *cmdiocbq = NULL;
1313 struct lpfc_iocbq rspiocbq;
dea3101e 1314 uint32_t status;
1315 uint32_t portRspPut, portRspMax;
1316 int rc = 1;
1317 lpfc_iocb_type type;
1318 unsigned long iflag;
1319 uint32_t rsp_cmpl = 0;
dea3101e 1320
2e0fef85 1321 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 1322 pring->stats.iocb_event++;
1323
dea3101e 1324 /*
1325 * The next available response entry should never exceed the maximum
1326 * entries. If it does, treat it as an adapter hardware error.
1327 */
1328 portRspMax = pring->numRiocb;
1329 portRspPut = le32_to_cpu(pgp->rspPutInx);
1330 if (unlikely(portRspPut >= portRspMax)) {
875fbdfe 1331 lpfc_sli_rsp_pointers_error(phba, pring);
2e0fef85 1332 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 1333 return 1;
1334 }
1335
1336 rmb();
1337 while (pring->rspidx != portRspPut) {
87f6eaff
JSEC		 1338 /*
1339 * Fetch an entry off the ring and copy it into a local data
1340 * structure. The copy involves a byte-swap since the
1341 * network byte order and pci byte orders are different.
1342 */
ed957684 1343 entry = lpfc_resp_iocb(phba, pring);
858c9f6c 1344 phba->last_completion_time = jiffies;
875fbdfe
JSEC		 1345
1346 if (++pring->rspidx >= portRspMax)
1347 pring->rspidx = 0;
1348
87f6eaff
JSEC		 1349 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
1350 (uint32_t *) &rspiocbq.iocb,
ed957684 1351 phba->iocb_rsp_size);
a4bc3379 1352 INIT_LIST_HEAD(&(rspiocbq.list));
87f6eaff
JSEC		 1353 irsp = &rspiocbq.iocb;
1354
dea3101e 1355 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
1356 pring->stats.iocb_rsp++;
1357 rsp_cmpl++;
1358
1359 if (unlikely(irsp->ulpStatus)) {
92d7f7b0
JS		 1360 /*
1361 * If resource errors reported from HBA, reduce
1362 * queuedepths of the SCSI device.
1363 */
1364 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
1365 (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
1366 spin_unlock_irqrestore(&phba->hbalock, iflag);
1367 lpfc_adjust_queue_depth(phba);
1368 spin_lock_irqsave(&phba->hbalock, iflag);
1369 }
1370
dea3101e 1371 /* Rsp ring <ringno> error: IOCB */
1372 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1373 "0336 Rsp Ring %d error: IOCB Data: "
92d7f7b0 1374 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 1375 pring->ringno,
92d7f7b0
JS		 1376 irsp->un.ulpWord[0],
1377 irsp->un.ulpWord[1],
1378 irsp->un.ulpWord[2],
1379 irsp->un.ulpWord[3],
1380 irsp->un.ulpWord[4],
1381 irsp->un.ulpWord[5],
1382 *(((uint32_t *) irsp) + 6),
1383 *(((uint32_t *) irsp) + 7));
dea3101e 1384 }
1385
1386 switch (type) {
1387 case LPFC_ABORT_IOCB:
1388 case LPFC_SOL_IOCB:
1389 /*
1390 * Idle exchange closed via ABTS from port. No iocb
1391 * resources need to be recovered.
1392 */
1393 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 1394 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 1395 "0333 IOCB cmd 0x%x"
dca9479b 1396 " processed. Skipping"
92d7f7b0 1397 " completion\n",
dca9479b 1398 irsp->ulpCommand);
dea3101e 1399 break;
1400 }
1401
604a3e30
JB		 1402 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
1403 &rspiocbq);
dea3101e 1404 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
b808608b
JW		 1405 if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
1406 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1407 &rspiocbq);
1408 } else {
2e0fef85
JS		 1409 spin_unlock_irqrestore(&phba->hbalock,
1410 iflag);
b808608b
JW		 1411 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1412 &rspiocbq);
2e0fef85 1413 spin_lock_irqsave(&phba->hbalock,
b808608b
JW		 1414 iflag);
1415 }
dea3101e 1416 }
1417 break;
a4bc3379 1418 case LPFC_UNSOL_IOCB:
2e0fef85 1419 spin_unlock_irqrestore(&phba->hbalock, iflag);
a4bc3379 1420 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
2e0fef85 1421 spin_lock_irqsave(&phba->hbalock, iflag);
a4bc3379 1422 break;
dea3101e 1423 default:
1424 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1425 char adaptermsg[LPFC_MAX_ADPTMSG];
1426 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1427 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1428 MAX_MSG_DATA);
898eb71c
JP		 1429 dev_warn(&((phba->pcidev)->dev),
1430 "lpfc%d: %s\n",
dea3101e 1431 phba->brd_no, adaptermsg);
1432 } else {
1433 /* Unknown IOCB command */
1434 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1435 "0334 Unknown IOCB command "
92d7f7b0 1436 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 1437 type, irsp->ulpCommand,
92d7f7b0
JS		 1438 irsp->ulpStatus,
1439 irsp->ulpIoTag,
1440 irsp->ulpContext);
dea3101e 1441 }
1442 break;
1443 }
1444
1445 /*
1446 * The response IOCB has been processed. Update the ring
1447 * pointer in SLIM. If the port response put pointer has not
1448 * been updated, sync the pgp->rspPutInx and fetch the new port
1449 * response put pointer.
1450 */
ed957684 1451 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 1452
1453 if (pring->rspidx == portRspPut)
1454 portRspPut = le32_to_cpu(pgp->rspPutInx);
1455 }
1456
1457 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
1458 pring->stats.iocb_rsp_full++;
1459 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1460 writel(status, phba->CAregaddr);
1461 readl(phba->CAregaddr);
1462 }
1463 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1464 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1465 pring->stats.iocb_cmd_empty++;
1466
1467 /* Force update of the local copy of cmdGetInx */
1468 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1469 lpfc_sli_resume_iocb(phba, pring);
1470
1471 if ((pring->lpfc_sli_cmd_available))
1472 (pring->lpfc_sli_cmd_available) (phba, pring);
1473
1474 }
1475
2e0fef85 1476 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 1477 return rc;
1478}
1479
dea3101e 1480int
2e0fef85
JS		 1481lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
1482 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 1483{
ed957684
JS		 1484 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1485 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1486 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 1487 IOCB_t *entry;
1488 IOCB_t *irsp = NULL;
1489 struct lpfc_iocbq *rspiocbp = NULL;
1490 struct lpfc_iocbq *next_iocb;
1491 struct lpfc_iocbq *cmdiocbp;
1492 struct lpfc_iocbq *saveq;
dea3101e 1493 uint8_t iocb_cmd_type;
1494 lpfc_iocb_type type;
1495 uint32_t status, free_saveq;
1496 uint32_t portRspPut, portRspMax;
1497 int rc = 1;
1498 unsigned long iflag;
dea3101e 1499
2e0fef85 1500 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 1501 pring->stats.iocb_event++;
1502
dea3101e 1503 /*
1504 * The next available response entry should never exceed the maximum
1505 * entries. If it does, treat it as an adapter hardware error.
1506 */
1507 portRspMax = pring->numRiocb;
1508 portRspPut = le32_to_cpu(pgp->rspPutInx);
1509 if (portRspPut >= portRspMax) {
1510 /*
1511 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1512 * rsp ring <portRspMax>
1513 */
ed957684 1514 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1515 "0303 Ring %d handler: portRspPut %d "
dea3101e 1516 "is bigger then rsp ring %d\n",
e8b62011 1517 pring->ringno, portRspPut, portRspMax);
dea3101e 1518
2e0fef85
JS		 1519 phba->link_state = LPFC_HBA_ERROR;
1520 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 1521
1522 phba->work_hs = HS_FFER3;
1523 lpfc_handle_eratt(phba);
1524
1525 return 1;
1526 }
1527
1528 rmb();
dea3101e 1529 while (pring->rspidx != portRspPut) {
1530 /*
1531 * Build a completion list and call the appropriate handler.
1532 * The process is to get the next available response iocb, get
1533 * a free iocb from the list, copy the response data into the
1534 * free iocb, insert to the continuation list, and update the
1535 * next response index to slim. This process makes response
1536 * iocb's in the ring available to DMA as fast as possible but
1537 * pays a penalty for a copy operation. Since the iocb is
1538 * only 32 bytes, this penalty is considered small relative to
1539 * the PCI reads for register values and a slim write. When
1540 * the ulpLe field is set, the entire Command has been
1541 * received.
1542 */
ed957684
JS		 1543 entry = lpfc_resp_iocb(phba, pring);
1544
858c9f6c 1545 phba->last_completion_time = jiffies;
2e0fef85 1546 rspiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e 1547 if (rspiocbp == NULL) {
1548 printk(KERN_ERR "%s: out of buffers! Failing "
1549 "completion.\n", __FUNCTION__);
1550 break;
1551 }
1552
ed957684
JS		 1553 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
1554 phba->iocb_rsp_size);
dea3101e 1555 irsp = &rspiocbp->iocb;
1556
1557 if (++pring->rspidx >= portRspMax)
1558 pring->rspidx = 0;
1559
a58cbd52
JS		 1560 if (pring->ringno == LPFC_ELS_RING) {
1561 lpfc_debugfs_slow_ring_trc(phba,
1562 "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
1563 *(((uint32_t *) irsp) + 4),
1564 *(((uint32_t *) irsp) + 6),
1565 *(((uint32_t *) irsp) + 7));
1566 }
1567
ed957684 1568 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 1569
1570 if (list_empty(&(pring->iocb_continueq))) {
1571 list_add(&rspiocbp->list, &(pring->iocb_continueq));
1572 } else {
1573 list_add_tail(&rspiocbp->list,
1574 &(pring->iocb_continueq));
1575 }
1576
1577 pring->iocb_continueq_cnt++;
1578 if (irsp->ulpLe) {
1579 /*
1580 * By default, the driver expects to free all resources
1581 * associated with this iocb completion.
1582 */
1583 free_saveq = 1;
1584 saveq = list_get_first(&pring->iocb_continueq,
1585 struct lpfc_iocbq, list);
1586 irsp = &(saveq->iocb);
1587 list_del_init(&pring->iocb_continueq);
1588 pring->iocb_continueq_cnt = 0;
1589
1590 pring->stats.iocb_rsp++;
1591
92d7f7b0
JS		 1592 /*
1593 * If resource errors reported from HBA, reduce
1594 * queuedepths of the SCSI device.
1595 */
1596 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
1597 (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
1598 spin_unlock_irqrestore(&phba->hbalock, iflag);
1599 lpfc_adjust_queue_depth(phba);
1600 spin_lock_irqsave(&phba->hbalock, iflag);
1601 }
1602
dea3101e 1603 if (irsp->ulpStatus) {
1604 /* Rsp ring <ringno> error: IOCB */
ed957684 1605 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1606 "0328 Rsp Ring %d error: "
ed957684
JS		 1607 "IOCB Data: "
1608 "x%x x%x x%x x%x "
1609 "x%x x%x x%x x%x "
1610 "x%x x%x x%x x%x "
1611 "x%x x%x x%x x%x\n",
ed957684
JS		 1612 pring->ringno,
1613 irsp->un.ulpWord[0],
1614 irsp->un.ulpWord[1],
1615 irsp->un.ulpWord[2],
1616 irsp->un.ulpWord[3],
1617 irsp->un.ulpWord[4],
1618 irsp->un.ulpWord[5],
1619 *(((uint32_t *) irsp) + 6),
1620 *(((uint32_t *) irsp) + 7),
1621 *(((uint32_t *) irsp) + 8),
1622 *(((uint32_t *) irsp) + 9),
1623 *(((uint32_t *) irsp) + 10),
1624 *(((uint32_t *) irsp) + 11),
1625 *(((uint32_t *) irsp) + 12),
1626 *(((uint32_t *) irsp) + 13),
1627 *(((uint32_t *) irsp) + 14),
1628 *(((uint32_t *) irsp) + 15));
dea3101e 1629 }
1630
1631 /*
1632 * Fetch the IOCB command type and call the correct
1633 * completion routine. Solicited and Unsolicited
1634 * IOCBs on the ELS ring get freed back to the
1635 * lpfc_iocb_list by the discovery kernel thread.
1636 */
1637 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
1638 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
1639 if (type == LPFC_SOL_IOCB) {
2e0fef85 1640 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 1641 iflag);
1642 rc = lpfc_sli_process_sol_iocb(phba, pring,
2e0fef85
JS		 1643 saveq);
1644 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 1645 } else if (type == LPFC_UNSOL_IOCB) {
2e0fef85 1646 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 1647 iflag);
1648 rc = lpfc_sli_process_unsol_iocb(phba, pring,
2e0fef85
JS		 1649 saveq);
1650 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 1651 } else if (type == LPFC_ABORT_IOCB) {
1652 if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
1653 ((cmdiocbp =
604a3e30
JB		 1654 lpfc_sli_iocbq_lookup(phba, pring,
1655 saveq)))) {
dea3101e 1656 /* Call the specified completion
1657 routine */
1658 if (cmdiocbp->iocb_cmpl) {
1659 spin_unlock_irqrestore(
2e0fef85 1660 &phba->hbalock,
dea3101e 1661 iflag);
1662 (cmdiocbp->iocb_cmpl) (phba,
1663 cmdiocbp, saveq);
1664 spin_lock_irqsave(
2e0fef85 1665 &phba->hbalock,
dea3101e 1666 iflag);
604a3e30 1667 } else
2e0fef85 1668 __lpfc_sli_release_iocbq(phba,
604a3e30 1669 cmdiocbp);
dea3101e 1670 }
1671 } else if (type == LPFC_UNKNOWN_IOCB) {
1672 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1673
1674 char adaptermsg[LPFC_MAX_ADPTMSG];
1675
1676 memset(adaptermsg, 0,
1677 LPFC_MAX_ADPTMSG);
1678 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1679 MAX_MSG_DATA);
1680 dev_warn(&((phba->pcidev)->dev),
898eb71c 1681 "lpfc%d: %s\n",
dea3101e 1682 phba->brd_no, adaptermsg);
1683 } else {
1684 /* Unknown IOCB command */
92d7f7b0 1685 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1686 "0335 Unknown IOCB "
92d7f7b0
JS		 1687 "command Data: x%x "
1688 "x%x x%x x%x\n",
92d7f7b0
JS		 1689 irsp->ulpCommand,
1690 irsp->ulpStatus,
1691 irsp->ulpIoTag,
1692 irsp->ulpContext);
dea3101e 1693 }
1694 }
1695
1696 if (free_saveq) {
2e0fef85
JS		 1697 list_for_each_entry_safe(rspiocbp, next_iocb,
1698 &saveq->list, list) {
1699 list_del(&rspiocbp->list);
1700 __lpfc_sli_release_iocbq(phba,
1701 rspiocbp);
dea3101e 1702 }
2e0fef85 1703 __lpfc_sli_release_iocbq(phba, saveq);
dea3101e 1704 }
92d7f7b0 1705 rspiocbp = NULL;
dea3101e 1706 }
1707
1708 /*
1709 * If the port response put pointer has not been updated, sync
1710 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
1711 * response put pointer.
1712 */
1713 if (pring->rspidx == portRspPut) {
1714 portRspPut = le32_to_cpu(pgp->rspPutInx);
1715 }
1716 } /* while (pring->rspidx != portRspPut) */
1717
92d7f7b0 1718 if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
dea3101e 1719 /* At least one response entry has been freed */
1720 pring->stats.iocb_rsp_full++;
1721 /* SET RxRE_RSP in Chip Att register */
1722 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1723 writel(status, phba->CAregaddr);
1724 readl(phba->CAregaddr); /* flush */
1725 }
1726 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1727 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1728 pring->stats.iocb_cmd_empty++;
1729
1730 /* Force update of the local copy of cmdGetInx */
1731 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1732 lpfc_sli_resume_iocb(phba, pring);
1733
1734 if ((pring->lpfc_sli_cmd_available))
1735 (pring->lpfc_sli_cmd_available) (phba, pring);
1736
1737 }
1738
2e0fef85 1739 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 1740 return rc;
1741}
1742
2e0fef85 1743void
dea3101e 1744lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1745{
2534ba75 1746 LIST_HEAD(completions);
dea3101e 1747 struct lpfc_iocbq *iocb, *next_iocb;
2534ba75 1748 IOCB_t *cmd = NULL;
dea3101e 1749
92d7f7b0
JS		 1750 if (pring->ringno == LPFC_ELS_RING) {
1751 lpfc_fabric_abort_hba(phba);
1752 }
1753
dea3101e 1754 /* Error everything on txq and txcmplq
1755 * First do the txq.
1756 */
2e0fef85 1757 spin_lock_irq(&phba->hbalock);
2534ba75 1758 list_splice_init(&pring->txq, &completions);
dea3101e 1759 pring->txq_cnt = 0;
dea3101e 1760
1761 /* Next issue ABTS for everything on the txcmplq */
2534ba75
JS		 1762 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
1763 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
dea3101e 1764
2e0fef85 1765 spin_unlock_irq(&phba->hbalock);
dea3101e 1766
2534ba75
JS		 1767 while (!list_empty(&completions)) {
1768 iocb = list_get_first(&completions, struct lpfc_iocbq, list);
1769 cmd = &iocb->iocb;
92d7f7b0 1770 list_del_init(&iocb->list);
dea3101e 1771
2e0fef85
JS		 1772 if (!iocb->iocb_cmpl)
1773 lpfc_sli_release_iocbq(phba, iocb);
1774 else {
dea3101e 1775 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1776 cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
dea3101e 1777 (iocb->iocb_cmpl) (phba, iocb, iocb);
2e0fef85 1778 }
dea3101e 1779 }
dea3101e 1780}
1781
41415862 1782int
2e0fef85 1783lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
dea3101e 1784{
41415862
JW		 1785 uint32_t status;
1786 int i = 0;
1787 int retval = 0;
dea3101e 1788
41415862
JW		 1789 /* Read the HBA Host Status Register */
1790 status = readl(phba->HSregaddr);
dea3101e 1791
41415862
JW		 1792 /*
1793 * Check status register every 100ms for 5 retries, then every
1794 * 500ms for 5, then every 2.5 sec for 5, then reset board and
1795 * every 2.5 sec for 4.
1796 * Break our of the loop if errors occurred during init.
1797 */
1798 while (((status & mask) != mask) &&
1799 !(status & HS_FFERM) &&
1800 i++ < 20) {
dea3101e 1801
41415862
JW		 1802 if (i <= 5)
1803 msleep(10);
1804 else if (i <= 10)
1805 msleep(500);
1806 else
1807 msleep(2500);
dea3101e 1808
41415862 1809 if (i == 15) {
2e0fef85 1810 /* Do post */
92d7f7b0 1811 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862
JW		 1812 lpfc_sli_brdrestart(phba);
1813 }
1814 /* Read the HBA Host Status Register */
1815 status = readl(phba->HSregaddr);
1816 }
dea3101e 1817
41415862
JW		 1818 /* Check to see if any errors occurred during init */
1819 if ((status & HS_FFERM) || (i >= 20)) {
2e0fef85 1820 phba->link_state = LPFC_HBA_ERROR;
41415862 1821 retval = 1;
dea3101e 1822 }
dea3101e 1823
41415862
JW		 1824 return retval;
1825}
dea3101e 1826
9290831f
JS		 1827#define BARRIER_TEST_PATTERN (0xdeadbeef)
1828
2e0fef85 1829void lpfc_reset_barrier(struct lpfc_hba *phba)
9290831f 1830{
65a29c16
JS		 1831 uint32_t __iomem *resp_buf;
1832 uint32_t __iomem *mbox_buf;
9290831f
JS		 1833 volatile uint32_t mbox;
1834 uint32_t hc_copy;
1835 int i;
1836 uint8_t hdrtype;
1837
1838 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
1839 if (hdrtype != 0x80 ||
1840 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
1841 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
1842 return;
1843
1844 /*
1845 * Tell the other part of the chip to suspend temporarily all
1846 * its DMA activity.
1847 */
65a29c16 1848 resp_buf = phba->MBslimaddr;
9290831f
JS		 1849
1850 /* Disable the error attention */
1851 hc_copy = readl(phba->HCregaddr);
1852 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
1853 readl(phba->HCregaddr); /* flush */
2e0fef85 1854 phba->link_flag |= LS_IGNORE_ERATT;
9290831f
JS		 1855
1856 if (readl(phba->HAregaddr) & HA_ERATT) {
1857 /* Clear Chip error bit */
1858 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 1859 phba->pport->stopped = 1;
9290831f
JS		 1860 }
1861
1862 mbox = 0;
1863 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
1864 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
1865
1866 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
65a29c16 1867 mbox_buf = phba->MBslimaddr;
9290831f
JS		 1868 writel(mbox, mbox_buf);
1869
1870 for (i = 0;
1871 readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
1872 mdelay(1);
1873
1874 if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
1875 if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
2e0fef85 1876 phba->pport->stopped)
9290831f
JS		 1877 goto restore_hc;
1878 else
1879 goto clear_errat;
1880 }
1881
1882 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
1883 for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
1884 mdelay(1);
1885
1886clear_errat:
1887
1888 while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
1889 mdelay(1);
1890
1891 if (readl(phba->HAregaddr) & HA_ERATT) {
1892 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 1893 phba->pport->stopped = 1;
9290831f
JS		 1894 }
1895
1896restore_hc:
2e0fef85 1897 phba->link_flag &= ~LS_IGNORE_ERATT;
9290831f
JS		 1898 writel(hc_copy, phba->HCregaddr);
1899 readl(phba->HCregaddr); /* flush */
1900}
1901
41415862 1902int
2e0fef85 1903lpfc_sli_brdkill(struct lpfc_hba *phba)
41415862
JW		 1904{
1905 struct lpfc_sli *psli;
1906 LPFC_MBOXQ_t *pmb;
1907 uint32_t status;
1908 uint32_t ha_copy;
1909 int retval;
1910 int i = 0;
dea3101e 1911
41415862 1912 psli = &phba->sli;
dea3101e 1913
41415862 1914 /* Kill HBA */
ed957684 1915 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 1916 "0329 Kill HBA Data: x%x x%x\n",
1917 phba->pport->port_state, psli->sli_flag);
41415862 1918
98c9ea5c
JS		 1919 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1920 if (!pmb)
41415862 1921 return 1;
41415862
JW		 1922
1923 /* Disable the error attention */
2e0fef85 1924 spin_lock_irq(&phba->hbalock);
41415862
JW		 1925 status = readl(phba->HCregaddr);
1926 status &= ~HC_ERINT_ENA;
1927 writel(status, phba->HCregaddr);
1928 readl(phba->HCregaddr); /* flush */
2e0fef85
JS		 1929 phba->link_flag |= LS_IGNORE_ERATT;
1930 spin_unlock_irq(&phba->hbalock);
41415862
JW		 1931
1932 lpfc_kill_board(phba, pmb);
1933 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1934 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
1935
1936 if (retval != MBX_SUCCESS) {
1937 if (retval != MBX_BUSY)
1938 mempool_free(pmb, phba->mbox_mem_pool);
2e0fef85
JS		 1939 spin_lock_irq(&phba->hbalock);
1940 phba->link_flag &= ~LS_IGNORE_ERATT;
1941 spin_unlock_irq(&phba->hbalock);
41415862
JW		 1942 return 1;
1943 }
1944
9290831f
JS		 1945 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
1946
41415862
JW		 1947 mempool_free(pmb, phba->mbox_mem_pool);
1948
1949 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
1950 * attention every 100ms for 3 seconds. If we don't get ERATT after
1951 * 3 seconds we still set HBA_ERROR state because the status of the
1952 * board is now undefined.
1953 */
1954 ha_copy = readl(phba->HAregaddr);
1955
1956 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
1957 mdelay(100);
1958 ha_copy = readl(phba->HAregaddr);
1959 }
1960
1961 del_timer_sync(&psli->mbox_tmo);
9290831f
JS		 1962 if (ha_copy & HA_ERATT) {
1963 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 1964 phba->pport->stopped = 1;
9290831f 1965 }
2e0fef85 1966 spin_lock_irq(&phba->hbalock);
41415862 1967 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85
JS		 1968 phba->link_flag &= ~LS_IGNORE_ERATT;
1969 spin_unlock_irq(&phba->hbalock);
41415862
JW		 1970
1971 psli->mbox_active = NULL;
1972 lpfc_hba_down_post(phba);
2e0fef85 1973 phba->link_state = LPFC_HBA_ERROR;
41415862 1974
2e0fef85 1975 return ha_copy & HA_ERATT ? 0 : 1;
dea3101e 1976}
1977
41415862 1978int
2e0fef85 1979lpfc_sli_brdreset(struct lpfc_hba *phba)
dea3101e 1980{
41415862 1981 struct lpfc_sli *psli;
dea3101e 1982 struct lpfc_sli_ring *pring;
41415862 1983 uint16_t cfg_value;
dea3101e 1984 int i;
dea3101e 1985
41415862 1986 psli = &phba->sli;
dea3101e 1987
41415862
JW		 1988 /* Reset HBA */
1989 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 1990 "0325 Reset HBA Data: x%x x%x\n",
2e0fef85 1991 phba->pport->port_state, psli->sli_flag);
dea3101e 1992
1993 /* perform board reset */
1994 phba->fc_eventTag = 0;
2e0fef85
JS		 1995 phba->pport->fc_myDID = 0;
1996 phba->pport->fc_prevDID = 0;
dea3101e 1997
41415862
JW		 1998 /* Turn off parity checking and serr during the physical reset */
1999 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
2000 pci_write_config_word(phba->pcidev, PCI_COMMAND,
2001 (cfg_value &
2002 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
2003
1c067a42 2004 psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
41415862
JW		 2005 /* Now toggle INITFF bit in the Host Control Register */
2006 writel(HC_INITFF, phba->HCregaddr);
2007 mdelay(1);
2008 readl(phba->HCregaddr); /* flush */
2009 writel(0, phba->HCregaddr);
2010 readl(phba->HCregaddr); /* flush */
2011
2012 /* Restore PCI cmd register */
2013 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea3101e 2014
2015 /* Initialize relevant SLI info */
41415862
JW		 2016 for (i = 0; i < psli->num_rings; i++) {
2017 pring = &psli->ring[i];
dea3101e 2018 pring->flag = 0;
2019 pring->rspidx = 0;
2020 pring->next_cmdidx = 0;
2021 pring->local_getidx = 0;
2022 pring->cmdidx = 0;
2023 pring->missbufcnt = 0;
2024 }
dea3101e 2025
2e0fef85 2026 phba->link_state = LPFC_WARM_START;
41415862
JW		 2027 return 0;
2028}
2029
2030int
2e0fef85 2031lpfc_sli_brdrestart(struct lpfc_hba *phba)
41415862
JW		 2032{
2033 MAILBOX_t *mb;
2034 struct lpfc_sli *psli;
2035 uint16_t skip_post;
2036 volatile uint32_t word0;
2037 void __iomem *to_slim;
2038
2e0fef85 2039 spin_lock_irq(&phba->hbalock);
41415862
JW		 2040
2041 psli = &phba->sli;
2042
2043 /* Restart HBA */
2044 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 2045 "0337 Restart HBA Data: x%x x%x\n",
2e0fef85 2046 phba->pport->port_state, psli->sli_flag);
41415862
JW		 2047
2048 word0 = 0;
2049 mb = (MAILBOX_t *) &word0;
2050 mb->mbxCommand = MBX_RESTART;
2051 mb->mbxHc = 1;
2052
9290831f
JS		 2053 lpfc_reset_barrier(phba);
2054
41415862
JW		 2055 to_slim = phba->MBslimaddr;
2056 writel(*(uint32_t *) mb, to_slim);
2057 readl(to_slim); /* flush */
2058
2059 /* Only skip post after fc_ffinit is completed */
2e0fef85 2060 if (phba->pport->port_state) {
41415862
JW		 2061 skip_post = 1;
2062 word0 = 1; /* This is really setting up word1 */
dea3101e 2063 } else {
41415862
JW		 2064 skip_post = 0;
2065 word0 = 0; /* This is really setting up word1 */
dea3101e 2066 }
65a29c16 2067 to_slim = phba->MBslimaddr + sizeof (uint32_t);
41415862
JW		 2068 writel(*(uint32_t *) mb, to_slim);
2069 readl(to_slim); /* flush */
dea3101e 2070
41415862 2071 lpfc_sli_brdreset(phba);
2e0fef85
JS		 2072 phba->pport->stopped = 0;
2073 phba->link_state = LPFC_INIT_START;
41415862 2074
2e0fef85 2075 spin_unlock_irq(&phba->hbalock);
41415862 2076
64ba8818
JS		 2077 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
2078 psli->stats_start = get_seconds();
2079
41415862
JW		 2080 if (skip_post)
2081 mdelay(100);
2082 else
2083 mdelay(2000);
2084
2085 lpfc_hba_down_post(phba);
dea3101e 2086
2087 return 0;
2088}
2089
2090static int
2091lpfc_sli_chipset_init(struct lpfc_hba *phba)
2092{
2093 uint32_t status, i = 0;
2094
2095 /* Read the HBA Host Status Register */
2096 status = readl(phba->HSregaddr);
2097
2098 /* Check status register to see what current state is */
2099 i = 0;
2100 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
2101
2102 /* Check every 100ms for 5 retries, then every 500ms for 5, then
2103 * every 2.5 sec for 5, then reset board and every 2.5 sec for
2104 * 4.
2105 */
2106 if (i++ >= 20) {
2107 /* Adapter failed to init, timeout, status reg
2108 <status> */
ed957684 2109 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 2110 "0436 Adapter failed to init, "
2111 "timeout, status reg x%x\n", status);
2e0fef85 2112 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2113 return -ETIMEDOUT;
2114 }
2115
2116 /* Check to see if any errors occurred during init */
2117 if (status & HS_FFERM) {
2118 /* ERROR: During chipset initialization */
2119 /* Adapter failed to init, chipset, status reg
2120 <status> */
ed957684 2121 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 2122 "0437 Adapter failed to init, "
2123 "chipset, status reg x%x\n", status);
2e0fef85 2124 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2125 return -EIO;
2126 }
2127
2128 if (i <= 5) {
2129 msleep(10);
2130 } else if (i <= 10) {
2131 msleep(500);
2132 } else {
2133 msleep(2500);
2134 }
2135
2136 if (i == 15) {
2e0fef85 2137 /* Do post */
92d7f7b0 2138 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 2139 lpfc_sli_brdrestart(phba);
dea3101e 2140 }
2141 /* Read the HBA Host Status Register */
2142 status = readl(phba->HSregaddr);
2143 }
2144
2145 /* Check to see if any errors occurred during init */
2146 if (status & HS_FFERM) {
2147 /* ERROR: During chipset initialization */
2148 /* Adapter failed to init, chipset, status reg <status> */
ed957684 2149 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 2150 "0438 Adapter failed to init, chipset, "
2151 "status reg x%x\n", status);
2e0fef85 2152 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2153 return -EIO;
2154 }
2155
2156 /* Clear all interrupt enable conditions */
2157 writel(0, phba->HCregaddr);
2158 readl(phba->HCregaddr); /* flush */
2159
2160 /* setup host attn register */
2161 writel(0xffffffff, phba->HAregaddr);
2162 readl(phba->HAregaddr); /* flush */
2163 return 0;
2164}
2165
78b2d852 2166int
ed957684
JS		 2167lpfc_sli_hbq_count(void)
2168{
92d7f7b0 2169 return ARRAY_SIZE(lpfc_hbq_defs);
ed957684
JS		 2170}
2171
2172static int
2173lpfc_sli_hbq_entry_count(void)
2174{
2175 int hbq_count = lpfc_sli_hbq_count();
2176 int count = 0;
2177 int i;
2178
2179 for (i = 0; i < hbq_count; ++i)
92d7f7b0 2180 count += lpfc_hbq_defs[i]->entry_count;
ed957684
JS		 2181 return count;
2182}
2183
dea3101e 2184int
ed957684
JS		 2185lpfc_sli_hbq_size(void)
2186{
2187 return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
2188}
2189
2190static int
2191lpfc_sli_hbq_setup(struct lpfc_hba *phba)
2192{
2193 int hbq_count = lpfc_sli_hbq_count();
2194 LPFC_MBOXQ_t *pmb;
2195 MAILBOX_t *pmbox;
2196 uint32_t hbqno;
2197 uint32_t hbq_entry_index;
ed957684 2198
92d7f7b0
JS		 2199 /* Get a Mailbox buffer to setup mailbox
2200 * commands for HBA initialization
2201 */
ed957684
JS		 2202 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2203
2204 if (!pmb)
2205 return -ENOMEM;
2206
2207 pmbox = &pmb->mb;
2208
2209 /* Initialize the struct lpfc_sli_hbq structure for each hbq */
2210 phba->link_state = LPFC_INIT_MBX_CMDS;
2211
2212 hbq_entry_index = 0;
2213 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
2214 phba->hbqs[hbqno].next_hbqPutIdx = 0;
2215 phba->hbqs[hbqno].hbqPutIdx = 0;
2216 phba->hbqs[hbqno].local_hbqGetIdx = 0;
2217 phba->hbqs[hbqno].entry_count =
92d7f7b0 2218 lpfc_hbq_defs[hbqno]->entry_count;
51ef4c26
JS		 2219 lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
2220 hbq_entry_index, pmb);
ed957684
JS		 2221 hbq_entry_index += phba->hbqs[hbqno].entry_count;
2222
2223 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
2224 /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
2225 mbxStatus <status>, ring <num> */
2226
2227 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 2228 LOG_SLI | LOG_VPORT,
e8b62011 2229 "1805 Adapter failed to init. "
ed957684 2230 "Data: x%x x%x x%x\n",
e8b62011 2231 pmbox->mbxCommand,
ed957684
JS		 2232 pmbox->mbxStatus, hbqno);
2233
2234 phba->link_state = LPFC_HBA_ERROR;
2235 mempool_free(pmb, phba->mbox_mem_pool);
ed957684
JS		 2236 return ENXIO;
2237 }
2238 }
2239 phba->hbq_count = hbq_count;
2240
ed957684
JS		 2241 mempool_free(pmb, phba->mbox_mem_pool);
2242
92d7f7b0
JS		 2243 /* Initially populate or replenish the HBQs */
2244 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
2245 if (lpfc_sli_hbqbuf_init_hbqs(phba, hbqno))
2246 return -ENOMEM;
2247 }
ed957684
JS		 2248 return 0;
2249}
2250
2251static int
2252lpfc_do_config_port(struct lpfc_hba *phba, int sli_mode)
dea3101e 2253{
2254 LPFC_MBOXQ_t *pmb;
2255 uint32_t resetcount = 0, rc = 0, done = 0;
2256
2257 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2258 if (!pmb) {
2e0fef85 2259 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2260 return -ENOMEM;
2261 }
2262
ed957684 2263 phba->sli_rev = sli_mode;
dea3101e 2264 while (resetcount < 2 && !done) {
2e0fef85 2265 spin_lock_irq(&phba->hbalock);
1c067a42 2266 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2267 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2268 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 2269 lpfc_sli_brdrestart(phba);
dea3101e 2270 msleep(2500);
2271 rc = lpfc_sli_chipset_init(phba);
2272 if (rc)
2273 break;
2274
2e0fef85 2275 spin_lock_irq(&phba->hbalock);
1c067a42 2276 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2277 spin_unlock_irq(&phba->hbalock);
dea3101e 2278 resetcount++;
2279
ed957684
JS		 2280 /* Call pre CONFIG_PORT mailbox command initialization. A
2281 * value of 0 means the call was successful. Any other
2282 * nonzero value is a failure, but if ERESTART is returned,
2283 * the driver may reset the HBA and try again.
2284 */
dea3101e 2285 rc = lpfc_config_port_prep(phba);
2286 if (rc == -ERESTART) {
ed957684 2287 phba->link_state = LPFC_LINK_UNKNOWN;
dea3101e 2288 continue;
2289 } else if (rc) {
2290 break;
2291 }
2292
2e0fef85 2293 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 2294 lpfc_config_port(phba, pmb);
2295 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
ed957684 2296 if (rc != MBX_SUCCESS) {
dea3101e 2297 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 2298 "0442 Adapter failed to init, mbxCmd x%x "
92d7f7b0 2299 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
e8b62011 2300 pmb->mb.mbxCommand, pmb->mb.mbxStatus, 0);
2e0fef85 2301 spin_lock_irq(&phba->hbalock);
dea3101e 2302 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
2e0fef85
JS		 2303 spin_unlock_irq(&phba->hbalock);
2304 rc = -ENXIO;
ed957684
JS		 2305 } else {
2306 done = 1;
92d7f7b0
JS		 2307 phba->max_vpi = (phba->max_vpi &&
2308 pmb->mb.un.varCfgPort.gmv) != 0
2309 ? pmb->mb.un.varCfgPort.max_vpi
2310 : 0;
dea3101e 2311 }
2312 }
ed957684
JS		 2313
2314 if (!done) {
2315 rc = -EINVAL;
2316 goto do_prep_failed;
2317 }
2318
2319 if ((pmb->mb.un.varCfgPort.sli_mode == 3) &&
92d7f7b0 2320 (!pmb->mb.un.varCfgPort.cMA)) {
ed957684
JS		 2321 rc = -ENXIO;
2322 goto do_prep_failed;
2323 }
2324 return rc;
2325
92d7f7b0 2326do_prep_failed:
ed957684
JS		 2327 mempool_free(pmb, phba->mbox_mem_pool);
2328 return rc;
2329}
2330
2331int
2332lpfc_sli_hba_setup(struct lpfc_hba *phba)
2333{
2334 uint32_t rc;
92d7f7b0 2335 int mode = 3;
ed957684
JS		 2336
2337 switch (lpfc_sli_mode) {
2338 case 2:
78b2d852 2339 if (phba->cfg_enable_npiv) {
92d7f7b0 2340 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011 2341 "1824 NPIV enabled: Override lpfc_sli_mode "
92d7f7b0 2342 "parameter (%d) to auto (0).\n",
e8b62011 2343 lpfc_sli_mode);
92d7f7b0
JS		 2344 break;
2345 }
ed957684
JS		 2346 mode = 2;
2347 break;
2348 case 0:
2349 case 3:
2350 break;
2351 default:
92d7f7b0 2352 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS		 2353 "1819 Unrecognized lpfc_sli_mode "
2354 "parameter: %d.\n", lpfc_sli_mode);
ed957684
JS		 2355
2356 break;
2357 }
2358
2359 rc = lpfc_do_config_port(phba, mode);
2360 if (rc && lpfc_sli_mode == 3)
92d7f7b0 2361 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS		 2362 "1820 Unable to select SLI-3. "
2363 "Not supported by adapter.\n");
ed957684
JS		 2364 if (rc && mode != 2)
2365 rc = lpfc_do_config_port(phba, 2);
2366 if (rc)
dea3101e 2367 goto lpfc_sli_hba_setup_error;
2368
ed957684
JS		 2369 if (phba->sli_rev == 3) {
2370 phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
2371 phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
2372 phba->sli3_options |= LPFC_SLI3_ENABLED;
2373 phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
2374
2375 } else {
2376 phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
2377 phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
92d7f7b0 2378 phba->sli3_options = 0;
ed957684
JS		 2379 }
2380
2381 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 2382 "0444 Firmware in SLI %x mode. Max_vpi %d\n",
2383 phba->sli_rev, phba->max_vpi);
ed957684 2384 rc = lpfc_sli_ring_map(phba);
dea3101e 2385
2386 if (rc)
2387 goto lpfc_sli_hba_setup_error;
2388
92d7f7b0 2389 /* Init HBQs */
ed957684
JS		 2390
2391 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
2392 rc = lpfc_sli_hbq_setup(phba);
2393 if (rc)
2394 goto lpfc_sli_hba_setup_error;
2395 }
2396
dea3101e 2397 phba->sli.sli_flag |= LPFC_PROCESS_LA;
2398
2399 rc = lpfc_config_port_post(phba);
2400 if (rc)
2401 goto lpfc_sli_hba_setup_error;
2402
ed957684
JS		 2403 return rc;
2404
92d7f7b0 2405lpfc_sli_hba_setup_error:
2e0fef85 2406 phba->link_state = LPFC_HBA_ERROR;
ed957684 2407 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 2408 "0445 Firmware initialization failed\n");
dea3101e 2409 return rc;
2410}
2411
dea3101e 2412/*! lpfc_mbox_timeout
2413 *
2414 * \pre
2415 * \post
2416 * \param hba Pointer to per struct lpfc_hba structure
2417 * \param l1 Pointer to the driver's mailbox queue.
2418 * \return
2419 * void
2420 *
2421 * \b Description:
2422 *
2423 * This routine handles mailbox timeout events at timer interrupt context.
2424 */
2425void
2426lpfc_mbox_timeout(unsigned long ptr)
2427{
92d7f7b0 2428 struct lpfc_hba *phba = (struct lpfc_hba *) ptr;
dea3101e 2429 unsigned long iflag;
2e0fef85 2430 uint32_t tmo_posted;
dea3101e 2431
2e0fef85 2432 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
92d7f7b0 2433 tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
2e0fef85
JS		 2434 if (!tmo_posted)
2435 phba->pport->work_port_events |= WORKER_MBOX_TMO;
2436 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
2437
2438 if (!tmo_posted) {
92d7f7b0 2439 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 2440 if (phba->work_wait)
92d7f7b0
JS		 2441 lpfc_worker_wake_up(phba);
2442 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 2443 }
dea3101e 2444}
2445
2446void
2447lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
2448{
2e0fef85
JS		 2449 LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
2450 MAILBOX_t *mb = &pmbox->mb;
1dcb58e5
JS		 2451 struct lpfc_sli *psli = &phba->sli;
2452 struct lpfc_sli_ring *pring;
dea3101e 2453
2e0fef85 2454 if (!(phba->pport->work_port_events & WORKER_MBOX_TMO)) {
dea3101e 2455 return;
2456 }
2457
dea3101e 2458 /* Mbox cmd <mbxCommand> timeout */
ed957684 2459 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2460 "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
92d7f7b0
JS		 2461 mb->mbxCommand,
2462 phba->pport->port_state,
2463 phba->sli.sli_flag,
2464 phba->sli.mbox_active);
dea3101e 2465
1dcb58e5
JS		 2466 /* Setting state unknown so lpfc_sli_abort_iocb_ring
2467 * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
2468 * it to fail all oustanding SCSI IO.
2469 */
2e0fef85
JS		 2470 spin_lock_irq(&phba->pport->work_port_lock);
2471 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
2472 spin_unlock_irq(&phba->pport->work_port_lock);
2473 spin_lock_irq(&phba->hbalock);
2474 phba->link_state = LPFC_LINK_UNKNOWN;
2475 phba->pport->fc_flag |= FC_ESTABLISH_LINK;
1dcb58e5 2476 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
2e0fef85 2477 spin_unlock_irq(&phba->hbalock);
1dcb58e5
JS		 2478
2479 pring = &psli->ring[psli->fcp_ring];
2480 lpfc_sli_abort_iocb_ring(phba, pring);
2481
2482 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2483 "0316 Resetting board due to mailbox timeout\n");
1dcb58e5
JS		 2484 /*
2485 * lpfc_offline calls lpfc_sli_hba_down which will clean up
2486 * on oustanding mailbox commands.
2487 */
2488 lpfc_offline_prep(phba);
2489 lpfc_offline(phba);
2490 lpfc_sli_brdrestart(phba);
2491 if (lpfc_online(phba) == 0) /* Initialize the HBA */
2492 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
2493 lpfc_unblock_mgmt_io(phba);
dea3101e 2494 return;
2495}
2496
2497int
2e0fef85 2498lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
dea3101e 2499{
dea3101e 2500 MAILBOX_t *mb;
2e0fef85 2501 struct lpfc_sli *psli = &phba->sli;
dea3101e 2502 uint32_t status, evtctr;
2503 uint32_t ha_copy;
2504 int i;
2505 unsigned long drvr_flag = 0;
2506 volatile uint32_t word0, ldata;
2507 void __iomem *to_slim;
2508
ed957684 2509 if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
92d7f7b0 2510 pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
ed957684
JS		 2511 if(!pmbox->vport) {
2512 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 2513 LOG_MBOX | LOG_VPORT,
e8b62011 2514 "1806 Mbox x%x failed. No vport\n",
ed957684
JS		 2515 pmbox->mb.mbxCommand);
2516 dump_stack();
2517 return MBXERR_ERROR;
2518 }
2519 }
2520
92d7f7b0 2521
8d63f375
LV		 2522 /* If the PCI channel is in offline state, do not post mbox. */
2523 if (unlikely(pci_channel_offline(phba->pcidev)))
2524 return MBX_NOT_FINISHED;
2525
2e0fef85 2526 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e 2527 psli = &phba->sli;
92d7f7b0
JS		 2528
2529
dea3101e 2530 mb = &pmbox->mb;
2531 status = MBX_SUCCESS;
2532
2e0fef85
JS		 2533 if (phba->link_state == LPFC_HBA_ERROR) {
2534 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
41415862
JW		 2535
2536 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2537 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
2e0fef85 2538 return MBX_NOT_FINISHED;
41415862
JW		 2539 }
2540
9290831f
JS		 2541 if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
2542 !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
2e0fef85 2543 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
92d7f7b0 2544 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
2e0fef85 2545 return MBX_NOT_FINISHED;
9290831f
JS		 2546 }
2547
dea3101e 2548 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
2549 /* Polling for a mbox command when another one is already active
2550 * is not allowed in SLI. Also, the driver must have established
2551 * SLI2 mode to queue and process multiple mbox commands.
2552 */
2553
2554 if (flag & MBX_POLL) {
2e0fef85 2555 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2556
2557 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2558 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2559 return MBX_NOT_FINISHED;
dea3101e 2560 }
2561
2562 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
2e0fef85 2563 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2564 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2565 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2566 return MBX_NOT_FINISHED;
dea3101e 2567 }
2568
dea3101e 2569 /* Another mailbox command is still being processed, queue this
2570 * command to be processed later.
2571 */
2572 lpfc_mbox_put(phba, pmbox);
2573
2574 /* Mbox cmd issue - BUSY */
ed957684 2575 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 2576 "(%d):0308 Mbox cmd issue - BUSY Data: "
92d7f7b0 2577 "x%x x%x x%x x%x\n",
92d7f7b0
JS		 2578 pmbox->vport ? pmbox->vport->vpi : 0xffffff,
2579 mb->mbxCommand, phba->pport->port_state,
2580 psli->sli_flag, flag);
dea3101e 2581
2582 psli->slistat.mbox_busy++;
2e0fef85 2583 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2584
858c9f6c
JS		 2585 if (pmbox->vport) {
2586 lpfc_debugfs_disc_trc(pmbox->vport,
2587 LPFC_DISC_TRC_MBOX_VPORT,
2588 "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
2589 (uint32_t)mb->mbxCommand,
2590 mb->un.varWords[0], mb->un.varWords[1]);
2591 }
2592 else {
2593 lpfc_debugfs_disc_trc(phba->pport,
2594 LPFC_DISC_TRC_MBOX,
2595 "MBOX Bsy: cmd:x%x mb:x%x x%x",
2596 (uint32_t)mb->mbxCommand,
2597 mb->un.varWords[0], mb->un.varWords[1]);
2598 }
2599
2e0fef85 2600 return MBX_BUSY;
dea3101e 2601 }
2602
dea3101e 2603 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2604
2605 /* If we are not polling, we MUST be in SLI2 mode */
2606 if (flag != MBX_POLL) {
41415862
JW		 2607 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
2608 (mb->mbxCommand != MBX_KILL_BOARD)) {
dea3101e 2609 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2610 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2611 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2612 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2613 return MBX_NOT_FINISHED;
dea3101e 2614 }
2615 /* timeout active mbox command */
a309a6b6
JS		 2616 mod_timer(&psli->mbox_tmo, (jiffies +
2617 (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
dea3101e 2618 }
2619
2620 /* Mailbox cmd <cmd> issue */
ed957684 2621 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 2622 "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
92d7f7b0 2623 "x%x\n",
e8b62011 2624 pmbox->vport ? pmbox->vport->vpi : 0,
92d7f7b0
JS		 2625 mb->mbxCommand, phba->pport->port_state,
2626 psli->sli_flag, flag);
dea3101e 2627
858c9f6c
JS		 2628 if (mb->mbxCommand != MBX_HEARTBEAT) {
2629 if (pmbox->vport) {
2630 lpfc_debugfs_disc_trc(pmbox->vport,
2631 LPFC_DISC_TRC_MBOX_VPORT,
2632 "MBOX Send vport: cmd:x%x mb:x%x x%x",
2633 (uint32_t)mb->mbxCommand,
2634 mb->un.varWords[0], mb->un.varWords[1]);
2635 }
2636 else {
2637 lpfc_debugfs_disc_trc(phba->pport,
2638 LPFC_DISC_TRC_MBOX,
2639 "MBOX Send: cmd:x%x mb:x%x x%x",
2640 (uint32_t)mb->mbxCommand,
2641 mb->un.varWords[0], mb->un.varWords[1]);
2642 }
2643 }
2644
dea3101e 2645 psli->slistat.mbox_cmd++;
2646 evtctr = psli->slistat.mbox_event;
2647
2648 /* next set own bit for the adapter and copy over command word */
2649 mb->mbxOwner = OWN_CHIP;
2650
2651 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea3101e 2652 /* First copy command data to host SLIM area */
4cc2da1d 2653 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
dea3101e 2654 } else {
9290831f 2655 if (mb->mbxCommand == MBX_CONFIG_PORT) {
dea3101e 2656 /* copy command data into host mbox for cmpl */
4cc2da1d 2657 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
92d7f7b0 2658 MAILBOX_CMD_SIZE);
dea3101e 2659 }
2660
2661 /* First copy mbox command data to HBA SLIM, skip past first
2662 word */
2663 to_slim = phba->MBslimaddr + sizeof (uint32_t);
2664 lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
2665 MAILBOX_CMD_SIZE - sizeof (uint32_t));
2666
2667 /* Next copy over first word, with mbxOwner set */
2668 ldata = *((volatile uint32_t *)mb);
2669 to_slim = phba->MBslimaddr;
2670 writel(ldata, to_slim);
2671 readl(to_slim); /* flush */
2672
2673 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2674 /* switch over to host mailbox */
2675 psli->sli_flag |= LPFC_SLI2_ACTIVE;
2676 }
2677 }
2678
2679 wmb();
2680 /* interrupt board to doit right away */
2681 writel(CA_MBATT, phba->CAregaddr);
2682 readl(phba->CAregaddr); /* flush */
2683
2684 switch (flag) {
2685 case MBX_NOWAIT:
2686 /* Don't wait for it to finish, just return */
2687 psli->mbox_active = pmbox;
2688 break;
2689
2690 case MBX_POLL:
dea3101e 2691 psli->mbox_active = NULL;
2692 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2693 /* First read mbox status word */
4cc2da1d 2694 word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
dea3101e 2695 word0 = le32_to_cpu(word0);
2696 } else {
2697 /* First read mbox status word */
2698 word0 = readl(phba->MBslimaddr);
2699 }
2700
2701 /* Read the HBA Host Attention Register */
2702 ha_copy = readl(phba->HAregaddr);
2703
a309a6b6
JS		 2704 i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
2705 i *= 1000; /* Convert to ms */
2706
dea3101e 2707 /* Wait for command to complete */
41415862
JW		 2708 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
2709 (!(ha_copy & HA_MBATT) &&
2e0fef85 2710 (phba->link_state > LPFC_WARM_START))) {
a309a6b6 2711 if (i-- <= 0) {
dea3101e 2712 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2713 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 2714 drvr_flag);
2e0fef85 2715 return MBX_NOT_FINISHED;
dea3101e 2716 }
2717
2718 /* Check if we took a mbox interrupt while we were
2719 polling */
2720 if (((word0 & OWN_CHIP) != OWN_CHIP)
2721 && (evtctr != psli->slistat.mbox_event))
2722 break;
2723
2e0fef85 2724 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 2725 drvr_flag);
2726
1dcb58e5 2727 msleep(1);
dea3101e 2728
2e0fef85 2729 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e 2730
2731 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2732 /* First copy command data */
4cc2da1d
JSEC		 2733 word0 = *((volatile uint32_t *)
2734 &phba->slim2p->mbx);
dea3101e 2735 word0 = le32_to_cpu(word0);
2736 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2737 MAILBOX_t *slimmb;
2738 volatile uint32_t slimword0;
2739 /* Check real SLIM for any errors */
2740 slimword0 = readl(phba->MBslimaddr);
2741 slimmb = (MAILBOX_t *) & slimword0;
2742 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
2743 && slimmb->mbxStatus) {
2744 psli->sli_flag &=
2745 ~LPFC_SLI2_ACTIVE;
2746 word0 = slimword0;
2747 }
2748 }
2749 } else {
2750 /* First copy command data */
2751 word0 = readl(phba->MBslimaddr);
2752 }
2753 /* Read the HBA Host Attention Register */
2754 ha_copy = readl(phba->HAregaddr);
2755 }
2756
2757 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea3101e 2758 /* copy results back to user */
4cc2da1d 2759 lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
92d7f7b0 2760 MAILBOX_CMD_SIZE);
dea3101e 2761 } else {
2762 /* First copy command data */
2763 lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
2764 MAILBOX_CMD_SIZE);
2765 if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
2766 pmbox->context2) {
92d7f7b0 2767 lpfc_memcpy_from_slim((void *)pmbox->context2,
dea3101e 2768 phba->MBslimaddr + DMP_RSP_OFFSET,
2769 mb->un.varDmp.word_cnt);
2770 }
2771 }
2772
2773 writel(HA_MBATT, phba->HAregaddr);
2774 readl(phba->HAregaddr); /* flush */
2775
2776 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2777 status = mb->mbxStatus;
2778 }
2779
2e0fef85
JS		 2780 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
2781 return status;
dea3101e 2782}
2783
92d7f7b0
JS		 2784/*
2785 * Caller needs to hold lock.
2786 */
858c9f6c 2787static void
92d7f7b0 2788__lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 2789 struct lpfc_iocbq *piocb)
dea3101e 2790{
2791 /* Insert the caller's iocb in the txq tail for later processing. */
2792 list_add_tail(&piocb->list, &pring->txq);
2793 pring->txq_cnt++;
dea3101e 2794}
2795
2796static struct lpfc_iocbq *
2797lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 2798 struct lpfc_iocbq **piocb)
dea3101e 2799{
2800 struct lpfc_iocbq * nextiocb;
2801
2802 nextiocb = lpfc_sli_ringtx_get(phba, pring);
2803 if (!nextiocb) {
2804 nextiocb = *piocb;
2805 *piocb = NULL;
2806 }
2807
2808 return nextiocb;
2809}
2810
92d7f7b0
JS		 2811/*
2812 * Lockless version of lpfc_sli_issue_iocb.
2813 */
98c9ea5c 2814static int
92d7f7b0 2815__lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e 2816 struct lpfc_iocbq *piocb, uint32_t flag)
2817{
2818 struct lpfc_iocbq *nextiocb;
2819 IOCB_t *iocb;
2820
92d7f7b0
JS		 2821 if (piocb->iocb_cmpl && (!piocb->vport) &&
2822 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
2823 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
2824 lpfc_printf_log(phba, KERN_ERR,
2825 LOG_SLI | LOG_VPORT,
e8b62011 2826 "1807 IOCB x%x failed. No vport\n",
92d7f7b0
JS		 2827 piocb->iocb.ulpCommand);
2828 dump_stack();
2829 return IOCB_ERROR;
2830 }
2831
2832
8d63f375
LV		 2833 /* If the PCI channel is in offline state, do not post iocbs. */
2834 if (unlikely(pci_channel_offline(phba->pcidev)))
2835 return IOCB_ERROR;
2836
dea3101e 2837 /*
2838 * We should never get an IOCB if we are in a < LINK_DOWN state
2839 */
2e0fef85 2840 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e 2841 return IOCB_ERROR;
2842
2843 /*
2844 * Check to see if we are blocking IOCB processing because of a
0b727fea 2845 * outstanding event.
dea3101e 2846 */
0b727fea 2847 if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
dea3101e 2848 goto iocb_busy;
2849
2e0fef85 2850 if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
dea3101e 2851 /*
2680eeaa 2852 * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
dea3101e 2853 * can be issued if the link is not up.
2854 */
2855 switch (piocb->iocb.ulpCommand) {
2856 case CMD_QUE_RING_BUF_CN:
2857 case CMD_QUE_RING_BUF64_CN:
dea3101e 2858 /*
2859 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
2860 * completion, iocb_cmpl MUST be 0.
2861 */
2862 if (piocb->iocb_cmpl)
2863 piocb->iocb_cmpl = NULL;
2864 /*FALLTHROUGH*/
2865 case CMD_CREATE_XRI_CR:
2680eeaa
JS		 2866 case CMD_CLOSE_XRI_CN:
2867 case CMD_CLOSE_XRI_CX:
dea3101e 2868 break;
2869 default:
2870 goto iocb_busy;
2871 }
2872
2873 /*
2874 * For FCP commands, we must be in a state where we can process link
2875 * attention events.
2876 */
2877 } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
92d7f7b0 2878 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
dea3101e 2879 goto iocb_busy;
92d7f7b0 2880 }
dea3101e 2881
dea3101e 2882 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
2883 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
2884 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
2885
2886 if (iocb)
2887 lpfc_sli_update_ring(phba, pring);
2888 else
2889 lpfc_sli_update_full_ring(phba, pring);
2890
2891 if (!piocb)
2892 return IOCB_SUCCESS;
2893
2894 goto out_busy;
2895
2896 iocb_busy:
2897 pring->stats.iocb_cmd_delay++;
2898
2899 out_busy:
2900
2901 if (!(flag & SLI_IOCB_RET_IOCB)) {
92d7f7b0 2902 __lpfc_sli_ringtx_put(phba, pring, piocb);
dea3101e 2903 return IOCB_SUCCESS;
2904 }
2905
2906 return IOCB_BUSY;
2907}
2908
92d7f7b0
JS		 2909
2910int
2911lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2912 struct lpfc_iocbq *piocb, uint32_t flag)
2913{
2914 unsigned long iflags;
2915 int rc;
2916
2917 spin_lock_irqsave(&phba->hbalock, iflags);
2918 rc = __lpfc_sli_issue_iocb(phba, pring, piocb, flag);
2919 spin_unlock_irqrestore(&phba->hbalock, iflags);
2920
2921 return rc;
2922}
2923
cf5bf97e
JW		 2924static int
2925lpfc_extra_ring_setup( struct lpfc_hba *phba)
2926{
2927 struct lpfc_sli *psli;
2928 struct lpfc_sli_ring *pring;
2929
2930 psli = &phba->sli;
2931
2932 /* Adjust cmd/rsp ring iocb entries more evenly */
a4bc3379
JS		 2933
2934 /* Take some away from the FCP ring */
cf5bf97e
JW		 2935 pring = &psli->ring[psli->fcp_ring];
2936 pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
2937 pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
2938 pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
2939 pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
2940
a4bc3379
JS		 2941 /* and give them to the extra ring */
2942 pring = &psli->ring[psli->extra_ring];
2943
cf5bf97e
JW		 2944 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
2945 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
2946 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
2947 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
2948
2949 /* Setup default profile for this ring */
2950 pring->iotag_max = 4096;
2951 pring->num_mask = 1;
2952 pring->prt[0].profile = 0; /* Mask 0 */
a4bc3379
JS		 2953 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
2954 pring->prt[0].type = phba->cfg_multi_ring_type;
cf5bf97e
JW		 2955 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
2956 return 0;
2957}
2958
98c9ea5c 2959static void
57127f15
JS		 2960lpfc_sli_async_event_handler(struct lpfc_hba * phba,
2961 struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
2962{
2963 IOCB_t *icmd;
2964 uint16_t evt_code;
2965 uint16_t temp;
2966 struct temp_event temp_event_data;
2967 struct Scsi_Host *shost;
2968
2969 icmd = &iocbq->iocb;
2970 evt_code = icmd->un.asyncstat.evt_code;
2971 temp = icmd->ulpContext;
2972
2973 if ((evt_code != ASYNC_TEMP_WARN) &&
2974 (evt_code != ASYNC_TEMP_SAFE)) {
2975 lpfc_printf_log(phba,
2976 KERN_ERR,
2977 LOG_SLI,
2978 "0327 Ring %d handler: unexpected ASYNC_STATUS"
2979 " evt_code 0x%x\n",
2980 pring->ringno,
2981 icmd->un.asyncstat.evt_code);
2982 return;
2983 }
2984 temp_event_data.data = (uint32_t)temp;
2985 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
2986 if (evt_code == ASYNC_TEMP_WARN) {
2987 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
2988 lpfc_printf_log(phba,
2989 KERN_WARNING,
2990 LOG_TEMP,
2991 "0339 Adapter is very hot, please take "
2992 "corrective action. temperature : %d Celsius\n",
2993 temp);
2994 }
2995 if (evt_code == ASYNC_TEMP_SAFE) {
2996 temp_event_data.event_code = LPFC_NORMAL_TEMP;
2997 lpfc_printf_log(phba,
2998 KERN_INFO,
2999 LOG_TEMP,
3000 "0340 Adapter temperature is OK now. "
3001 "temperature : %d Celsius\n",
3002 temp);
3003 }
3004
3005 /* Send temperature change event to applications */
3006 shost = lpfc_shost_from_vport(phba->pport);
3007 fc_host_post_vendor_event(shost, fc_get_event_number(),
3008 sizeof(temp_event_data), (char *) &temp_event_data,
3009 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
3010
3011}
3012
3013
dea3101e 3014int
3015lpfc_sli_setup(struct lpfc_hba *phba)
3016{
ed957684 3017 int i, totiocbsize = 0;
dea3101e 3018 struct lpfc_sli *psli = &phba->sli;
3019 struct lpfc_sli_ring *pring;
3020
3021 psli->num_rings = MAX_CONFIGURED_RINGS;
3022 psli->sli_flag = 0;
3023 psli->fcp_ring = LPFC_FCP_RING;
3024 psli->next_ring = LPFC_FCP_NEXT_RING;
a4bc3379 3025 psli->extra_ring = LPFC_EXTRA_RING;
dea3101e 3026
604a3e30
JB		 3027 psli->iocbq_lookup = NULL;
3028 psli->iocbq_lookup_len = 0;
3029 psli->last_iotag = 0;
3030
dea3101e 3031 for (i = 0; i < psli->num_rings; i++) {
3032 pring = &psli->ring[i];
3033 switch (i) {
3034 case LPFC_FCP_RING: /* ring 0 - FCP */
3035 /* numCiocb and numRiocb are used in config_port */
3036 pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
3037 pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
3038 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
3039 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
3040 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
3041 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
ed957684 3042 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3043 SLI3_IOCB_CMD_SIZE :
3044 SLI2_IOCB_CMD_SIZE;
ed957684 3045 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3046 SLI3_IOCB_RSP_SIZE :
3047 SLI2_IOCB_RSP_SIZE;
dea3101e 3048 pring->iotag_ctr = 0;
3049 pring->iotag_max =
92d7f7b0 3050 (phba->cfg_hba_queue_depth * 2);
dea3101e 3051 pring->fast_iotag = pring->iotag_max;
3052 pring->num_mask = 0;
3053 break;
a4bc3379 3054 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
dea3101e 3055 /* numCiocb and numRiocb are used in config_port */
3056 pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
3057 pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
ed957684 3058 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3059 SLI3_IOCB_CMD_SIZE :
3060 SLI2_IOCB_CMD_SIZE;
ed957684 3061 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3062 SLI3_IOCB_RSP_SIZE :
3063 SLI2_IOCB_RSP_SIZE;
2e0fef85 3064 pring->iotag_max = phba->cfg_hba_queue_depth;
dea3101e 3065 pring->num_mask = 0;
3066 break;
3067 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
3068 /* numCiocb and numRiocb are used in config_port */
3069 pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
3070 pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
ed957684 3071 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3072 SLI3_IOCB_CMD_SIZE :
3073 SLI2_IOCB_CMD_SIZE;
ed957684 3074 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3075 SLI3_IOCB_RSP_SIZE :
3076 SLI2_IOCB_RSP_SIZE;
dea3101e 3077 pring->fast_iotag = 0;
3078 pring->iotag_ctr = 0;
3079 pring->iotag_max = 4096;
57127f15
JS		 3080 pring->lpfc_sli_rcv_async_status =
3081 lpfc_sli_async_event_handler;
dea3101e 3082 pring->num_mask = 4;
3083 pring->prt[0].profile = 0; /* Mask 0 */
3084 pring->prt[0].rctl = FC_ELS_REQ;
3085 pring->prt[0].type = FC_ELS_DATA;
3086 pring->prt[0].lpfc_sli_rcv_unsol_event =
92d7f7b0 3087 lpfc_els_unsol_event;
dea3101e 3088 pring->prt[1].profile = 0; /* Mask 1 */
3089 pring->prt[1].rctl = FC_ELS_RSP;
3090 pring->prt[1].type = FC_ELS_DATA;
3091 pring->prt[1].lpfc_sli_rcv_unsol_event =
92d7f7b0 3092 lpfc_els_unsol_event;
dea3101e 3093 pring->prt[2].profile = 0; /* Mask 2 */
3094 /* NameServer Inquiry */
3095 pring->prt[2].rctl = FC_UNSOL_CTL;
3096 /* NameServer */
3097 pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
3098 pring->prt[2].lpfc_sli_rcv_unsol_event =
92d7f7b0 3099 lpfc_ct_unsol_event;
dea3101e 3100 pring->prt[3].profile = 0; /* Mask 3 */
3101 /* NameServer response */
3102 pring->prt[3].rctl = FC_SOL_CTL;
3103 /* NameServer */
3104 pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
3105 pring->prt[3].lpfc_sli_rcv_unsol_event =
92d7f7b0 3106 lpfc_ct_unsol_event;
dea3101e 3107 break;
3108 }
ed957684 3109 totiocbsize += (pring->numCiocb * pring->sizeCiocb) +
92d7f7b0 3110 (pring->numRiocb * pring->sizeRiocb);
dea3101e 3111 }
ed957684 3112 if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
dea3101e 3113 /* Too many cmd / rsp ring entries in SLI2 SLIM */
e8b62011
JS		 3114 printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
3115 "SLI2 SLIM Data: x%x x%lx\n",
3116 phba->brd_no, totiocbsize,
3117 (unsigned long) MAX_SLIM_IOCB_SIZE);
dea3101e 3118 }
cf5bf97e
JW		 3119 if (phba->cfg_multi_ring_support == 2)
3120 lpfc_extra_ring_setup(phba);
dea3101e 3121
3122 return 0;
3123}
3124
3125int
2e0fef85 3126lpfc_sli_queue_setup(struct lpfc_hba *phba)
dea3101e 3127{
3128 struct lpfc_sli *psli;
3129 struct lpfc_sli_ring *pring;
604a3e30 3130 int i;
dea3101e 3131
3132 psli = &phba->sli;
2e0fef85 3133 spin_lock_irq(&phba->hbalock);
dea3101e 3134 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 3135 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e 3136 /* Initialize list headers for txq and txcmplq as double linked lists */
3137 for (i = 0; i < psli->num_rings; i++) {
3138 pring = &psli->ring[i];
3139 pring->ringno = i;
3140 pring->next_cmdidx = 0;
3141 pring->local_getidx = 0;
3142 pring->cmdidx = 0;
3143 INIT_LIST_HEAD(&pring->txq);
3144 INIT_LIST_HEAD(&pring->txcmplq);
3145 INIT_LIST_HEAD(&pring->iocb_continueq);
3146 INIT_LIST_HEAD(&pring->postbufq);
dea3101e 3147 }
2e0fef85
JS		 3148 spin_unlock_irq(&phba->hbalock);
3149 return 1;
dea3101e 3150}
3151
92d7f7b0
JS		 3152int
3153lpfc_sli_host_down(struct lpfc_vport *vport)
3154{
858c9f6c 3155 LIST_HEAD(completions);
92d7f7b0
JS		 3156 struct lpfc_hba *phba = vport->phba;
3157 struct lpfc_sli *psli = &phba->sli;
3158 struct lpfc_sli_ring *pring;
3159 struct lpfc_iocbq *iocb, *next_iocb;
92d7f7b0
JS		 3160 int i;
3161 unsigned long flags = 0;
3162 uint16_t prev_pring_flag;
3163
3164 lpfc_cleanup_discovery_resources(vport);
3165
3166 spin_lock_irqsave(&phba->hbalock, flags);
92d7f7b0
JS		 3167 for (i = 0; i < psli->num_rings; i++) {
3168 pring = &psli->ring[i];
3169 prev_pring_flag = pring->flag;
858c9f6c
JS		 3170 if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
3171 pring->flag |= LPFC_DEFERRED_RING_EVENT;
92d7f7b0
JS		 3172 /*
3173 * Error everything on the txq since these iocbs have not been
3174 * given to the FW yet.
3175 */
92d7f7b0
JS		 3176 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
3177 if (iocb->vport != vport)
3178 continue;
858c9f6c 3179 list_move_tail(&iocb->list, &completions);
92d7f7b0 3180 pring->txq_cnt--;
92d7f7b0
JS		 3181 }
3182
3183 /* Next issue ABTS for everything on the txcmplq */
3184 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
3185 list) {
3186 if (iocb->vport != vport)
3187 continue;
3188 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3189 }
3190
3191 pring->flag = prev_pring_flag;
3192 }
3193
3194 spin_unlock_irqrestore(&phba->hbalock, flags);
3195
858c9f6c
JS		 3196 while (!list_empty(&completions)) {
3197 list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
3198
3199 if (!iocb->iocb_cmpl)
3200 lpfc_sli_release_iocbq(phba, iocb);
3201 else {
3202 iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
3203 iocb->iocb.un.ulpWord[4] = IOERR_SLI_DOWN;
3204 (iocb->iocb_cmpl) (phba, iocb, iocb);
3205 }
3206 }
92d7f7b0
JS		 3207 return 1;
3208}
3209
dea3101e 3210int
2e0fef85 3211lpfc_sli_hba_down(struct lpfc_hba *phba)
dea3101e 3212{
2534ba75 3213 LIST_HEAD(completions);
2e0fef85 3214 struct lpfc_sli *psli = &phba->sli;
dea3101e 3215 struct lpfc_sli_ring *pring;
3216 LPFC_MBOXQ_t *pmb;
2534ba75
JS		 3217 struct lpfc_iocbq *iocb;
3218 IOCB_t *cmd = NULL;
dea3101e 3219 int i;
3220 unsigned long flags = 0;
3221
dea3101e 3222 lpfc_hba_down_prep(phba);
3223
92d7f7b0
JS		 3224 lpfc_fabric_abort_hba(phba);
3225
2e0fef85 3226 spin_lock_irqsave(&phba->hbalock, flags);
dea3101e 3227 for (i = 0; i < psli->num_rings; i++) {
3228 pring = &psli->ring[i];
858c9f6c
JS		 3229 if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
3230 pring->flag |= LPFC_DEFERRED_RING_EVENT;
dea3101e 3231
3232 /*
3233 * Error everything on the txq since these iocbs have not been
3234 * given to the FW yet.
3235 */
2534ba75 3236 list_splice_init(&pring->txq, &completions);
dea3101e 3237 pring->txq_cnt = 0;
3238
2534ba75 3239 }
2e0fef85 3240 spin_unlock_irqrestore(&phba->hbalock, flags);
dea3101e 3241
2534ba75 3242 while (!list_empty(&completions)) {
92d7f7b0 3243 list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
2534ba75 3244 cmd = &iocb->iocb;
dea3101e 3245
2e0fef85
JS		 3246 if (!iocb->iocb_cmpl)
3247 lpfc_sli_release_iocbq(phba, iocb);
3248 else {
2534ba75
JS		 3249 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
3250 cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
3251 (iocb->iocb_cmpl) (phba, iocb, iocb);
2e0fef85 3252 }
dea3101e 3253 }
3254
dea3101e 3255 /* Return any active mbox cmds */
3256 del_timer_sync(&psli->mbox_tmo);
92d7f7b0 3257 spin_lock_irqsave(&phba->hbalock, flags);
2e0fef85 3258
92d7f7b0 3259 spin_lock(&phba->pport->work_port_lock);
2e0fef85 3260 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
92d7f7b0 3261 spin_unlock(&phba->pport->work_port_lock);
2e0fef85 3262
92d7f7b0
JS		 3263 if (psli->mbox_active) {
3264 list_add_tail(&psli->mbox_active->list, &completions);
2e0fef85 3265 psli->mbox_active = NULL;
2e0fef85 3266 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
dea3101e 3267 }
dea3101e 3268
92d7f7b0
JS		 3269 /* Return any pending or completed mbox cmds */
3270 list_splice_init(&phba->sli.mboxq, &completions);
3271 list_splice_init(&phba->sli.mboxq_cmpl, &completions);
3272 INIT_LIST_HEAD(&psli->mboxq);
3273 INIT_LIST_HEAD(&psli->mboxq_cmpl);
3274
3275 spin_unlock_irqrestore(&phba->hbalock, flags);
3276
3277 while (!list_empty(&completions)) {
3278 list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
dea3101e 3279 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
3280 if (pmb->mbox_cmpl) {
dea3101e 3281 pmb->mbox_cmpl(phba,pmb);
dea3101e 3282 }
3283 }
dea3101e 3284 return 1;
3285}
3286
3287void
3288lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
3289{
3290 uint32_t *src = srcp;
3291 uint32_t *dest = destp;
3292 uint32_t ldata;
3293 int i;
3294
3295 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
3296 ldata = *src;
3297 ldata = le32_to_cpu(ldata);
3298 *dest = ldata;
3299 src++;
3300 dest++;
3301 }
3302}
3303
3304int
2e0fef85
JS		 3305lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3306 struct lpfc_dmabuf *mp)
dea3101e 3307{
3308 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
3309 later */
2e0fef85 3310 spin_lock_irq(&phba->hbalock);
dea3101e 3311 list_add_tail(&mp->list, &pring->postbufq);
dea3101e 3312 pring->postbufq_cnt++;
2e0fef85 3313 spin_unlock_irq(&phba->hbalock);
dea3101e 3314 return 0;
3315}
3316
3317
3318struct lpfc_dmabuf *
3319lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3320 dma_addr_t phys)
3321{
3322 struct lpfc_dmabuf *mp, *next_mp;
3323 struct list_head *slp = &pring->postbufq;
3324
3325 /* Search postbufq, from the begining, looking for a match on phys */
2e0fef85 3326 spin_lock_irq(&phba->hbalock);
dea3101e 3327 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
3328 if (mp->phys == phys) {
3329 list_del_init(&mp->list);
3330 pring->postbufq_cnt--;
2e0fef85 3331 spin_unlock_irq(&phba->hbalock);
dea3101e 3332 return mp;
3333 }
3334 }
3335
2e0fef85 3336 spin_unlock_irq(&phba->hbalock);
dea3101e 3337 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 3338 "0410 Cannot find virtual addr for mapped buf on "
dea3101e 3339 "ring %d Data x%llx x%p x%p x%x\n",
e8b62011 3340 pring->ringno, (unsigned long long)phys,
dea3101e 3341 slp->next, slp->prev, pring->postbufq_cnt);
3342 return NULL;
3343}
3344
3345static void
2e0fef85
JS		 3346lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3347 struct lpfc_iocbq *rspiocb)
dea3101e 3348{
2e0fef85 3349 IOCB_t *irsp = &rspiocb->iocb;
2680eeaa 3350 uint16_t abort_iotag, abort_context;
92d7f7b0 3351 struct lpfc_iocbq *abort_iocb;
2680eeaa
JS		 3352 struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
3353
3354 abort_iocb = NULL;
2680eeaa
JS		 3355
3356 if (irsp->ulpStatus) {
3357 abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
3358 abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
3359
2e0fef85 3360 spin_lock_irq(&phba->hbalock);
2680eeaa
JS		 3361 if (abort_iotag != 0 && abort_iotag <= phba->sli.last_iotag)
3362 abort_iocb = phba->sli.iocbq_lookup[abort_iotag];
3363
92d7f7b0 3364 lpfc_printf_log(phba, KERN_INFO, LOG_ELS | LOG_SLI,
e8b62011 3365 "0327 Cannot abort els iocb %p "
92d7f7b0
JS		 3366 "with tag %x context %x, abort status %x, "
3367 "abort code %x\n",
e8b62011
JS		 3368 abort_iocb, abort_iotag, abort_context,
3369 irsp->ulpStatus, irsp->un.ulpWord[4]);
2680eeaa
JS		 3370
3371 /*
3372 * make sure we have the right iocbq before taking it
3373 * off the txcmplq and try to call completion routine.
3374 */
2e0fef85
JS		 3375 if (!abort_iocb ||
3376 abort_iocb->iocb.ulpContext != abort_context ||
3377 (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0)
3378 spin_unlock_irq(&phba->hbalock);
3379 else {
92d7f7b0 3380 list_del_init(&abort_iocb->list);
2680eeaa 3381 pring->txcmplq_cnt--;
2e0fef85 3382 spin_unlock_irq(&phba->hbalock);
2680eeaa 3383
92d7f7b0
JS		 3384 abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED;
3385 abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
3386 abort_iocb->iocb.un.ulpWord[4] = IOERR_SLI_ABORTED;
3387 (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb);
2680eeaa
JS		 3388 }
3389 }
3390
604a3e30 3391 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e 3392 return;
3393}
3394
92d7f7b0
JS		 3395static void
3396lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3397 struct lpfc_iocbq *rspiocb)
3398{
3399 IOCB_t *irsp = &rspiocb->iocb;
3400
3401 /* ELS cmd tag <ulpIoTag> completes */
3402 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
e8b62011 3403 "0133 Ignoring ELS cmd tag x%x completion Data: "
92d7f7b0 3404 "x%x x%x x%x\n",
e8b62011 3405 irsp->ulpIoTag, irsp->ulpStatus,
92d7f7b0 3406 irsp->un.ulpWord[4], irsp->ulpTimeout);
858c9f6c
JS		 3407 if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
3408 lpfc_ct_free_iocb(phba, cmdiocb);
3409 else
3410 lpfc_els_free_iocb(phba, cmdiocb);
92d7f7b0
JS		 3411 return;
3412}
3413
dea3101e 3414int
2e0fef85
JS		 3415lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3416 struct lpfc_iocbq *cmdiocb)
dea3101e 3417{
2e0fef85 3418 struct lpfc_vport *vport = cmdiocb->vport;
0bd4ca25 3419 struct lpfc_iocbq *abtsiocbp;
dea3101e 3420 IOCB_t *icmd = NULL;
3421 IOCB_t *iabt = NULL;
07951076
JS		 3422 int retval = IOCB_ERROR;
3423
92d7f7b0
JS		 3424 /*
3425 * There are certain command types we don't want to abort. And we
3426 * don't want to abort commands that are already in the process of
3427 * being aborted.
07951076
JS		 3428 */
3429 icmd = &cmdiocb->iocb;
2e0fef85 3430 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
92d7f7b0
JS		 3431 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
3432 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
07951076
JS		 3433 return 0;
3434
858c9f6c
JS		 3435 /* If we're unloading, don't abort iocb on the ELS ring, but change the
3436 * callback so that nothing happens when it finishes.
07951076 3437 */
858c9f6c
JS		 3438 if ((vport->load_flag & FC_UNLOADING) &&
3439 (pring->ringno == LPFC_ELS_RING)) {
92d7f7b0
JS		 3440 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
3441 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
3442 else
3443 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
07951076 3444 goto abort_iotag_exit;
92d7f7b0 3445 }
dea3101e 3446
3447 /* issue ABTS for this IOCB based on iotag */
92d7f7b0 3448 abtsiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e 3449 if (abtsiocbp == NULL)
3450 return 0;
dea3101e 3451
07951076
JS		 3452 /* This signals the response to set the correct status
3453 * before calling the completion handler.
3454 */
3455 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
3456
dea3101e 3457 iabt = &abtsiocbp->iocb;
07951076
JS		 3458 iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
3459 iabt->un.acxri.abortContextTag = icmd->ulpContext;
3460 iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
3461 iabt->ulpLe = 1;
3462 iabt->ulpClass = icmd->ulpClass;
dea3101e 3463
2e0fef85 3464 if (phba->link_state >= LPFC_LINK_UP)
07951076
JS		 3465 iabt->ulpCommand = CMD_ABORT_XRI_CN;
3466 else
3467 iabt->ulpCommand = CMD_CLOSE_XRI_CN;
dea3101e 3468
07951076 3469 abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
5b8bd0c9 3470
e8b62011
JS		 3471 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
3472 "0339 Abort xri x%x, original iotag x%x, "
3473 "abort cmd iotag x%x\n",
3474 iabt->un.acxri.abortContextTag,
3475 iabt->un.acxri.abortIoTag, abtsiocbp->iotag);
92d7f7b0 3476 retval = __lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
dea3101e 3477
07951076 3478abort_iotag_exit:
2e0fef85
JS		 3479 /*
3480 * Caller to this routine should check for IOCB_ERROR
3481 * and handle it properly. This routine no longer removes
3482 * iocb off txcmplq and call compl in case of IOCB_ERROR.
07951076 3483 */
2e0fef85 3484 return retval;
dea3101e 3485}
3486
3487static int
51ef4c26
JS		 3488lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
3489 uint16_t tgt_id, uint64_t lun_id,
0bd4ca25 3490 lpfc_ctx_cmd ctx_cmd)
dea3101e 3491{
0bd4ca25
JSEC		 3492 struct lpfc_scsi_buf *lpfc_cmd;
3493 struct scsi_cmnd *cmnd;
dea3101e 3494 int rc = 1;
3495
0bd4ca25
JSEC		 3496 if (!(iocbq->iocb_flag & LPFC_IO_FCP))
3497 return rc;
3498
51ef4c26
JS		 3499 if (iocbq->vport != vport)
3500 return rc;
3501
0bd4ca25
JSEC		 3502 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
3503 cmnd = lpfc_cmd->pCmd;
3504
3505 if (cmnd == NULL)
dea3101e 3506 return rc;
3507
3508 switch (ctx_cmd) {
3509 case LPFC_CTX_LUN:
0bd4ca25
JSEC		 3510 if ((cmnd->device->id == tgt_id) &&
3511 (cmnd->device->lun == lun_id))
dea3101e 3512 rc = 0;
3513 break;
3514 case LPFC_CTX_TGT:
0bd4ca25 3515 if (cmnd->device->id == tgt_id)
dea3101e 3516 rc = 0;
3517 break;
dea3101e 3518 case LPFC_CTX_HOST:
3519 rc = 0;
3520 break;
3521 default:
3522 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
3523 __FUNCTION__, ctx_cmd);
3524 break;
3525 }
3526
3527 return rc;
3528}
3529
3530int
51ef4c26
JS		 3531lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
3532 lpfc_ctx_cmd ctx_cmd)
dea3101e 3533{
51ef4c26 3534 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC		 3535 struct lpfc_iocbq *iocbq;
3536 int sum, i;
dea3101e 3537
0bd4ca25
JSEC		 3538 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
3539 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 3540
51ef4c26
JS		 3541 if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
3542 ctx_cmd) == 0)
0bd4ca25 3543 sum++;
dea3101e 3544 }
0bd4ca25 3545
dea3101e 3546 return sum;
3547}
3548
5eb95af0 3549void
2e0fef85
JS		 3550lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3551 struct lpfc_iocbq *rspiocb)
5eb95af0 3552{
604a3e30 3553 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC		 3554 return;
3555}
3556
dea3101e 3557int
51ef4c26
JS		 3558lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
3559 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
dea3101e 3560{
51ef4c26 3561 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC		 3562 struct lpfc_iocbq *iocbq;
3563 struct lpfc_iocbq *abtsiocb;
dea3101e 3564 IOCB_t *cmd = NULL;
dea3101e 3565 int errcnt = 0, ret_val = 0;
0bd4ca25 3566 int i;
dea3101e 3567
0bd4ca25
JSEC		 3568 for (i = 1; i <= phba->sli.last_iotag; i++) {
3569 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 3570
51ef4c26 3571 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
2e0fef85 3572 abort_cmd) != 0)
dea3101e 3573 continue;
3574
3575 /* issue ABTS for this IOCB based on iotag */
0bd4ca25 3576 abtsiocb = lpfc_sli_get_iocbq(phba);
dea3101e 3577 if (abtsiocb == NULL) {
3578 errcnt++;
3579 continue;
3580 }
dea3101e 3581
0bd4ca25 3582 cmd = &iocbq->iocb;
dea3101e 3583 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
3584 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
3585 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
3586 abtsiocb->iocb.ulpLe = 1;
3587 abtsiocb->iocb.ulpClass = cmd->ulpClass;
2e0fef85 3588 abtsiocb->vport = phba->pport;
dea3101e 3589
2e0fef85 3590 if (lpfc_is_link_up(phba))
dea3101e 3591 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
3592 else
3593 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
3594
5eb95af0
JSEC		 3595 /* Setup callback routine and issue the command. */
3596 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
dea3101e 3597 ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
3598 if (ret_val == IOCB_ERROR) {
604a3e30 3599 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e 3600 errcnt++;
3601 continue;
3602 }
3603 }
3604
3605 return errcnt;
3606}
3607
68876920
JSEC		 3608static void
3609lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
3610 struct lpfc_iocbq *cmdiocbq,
3611 struct lpfc_iocbq *rspiocbq)
dea3101e 3612{
68876920
JSEC		 3613 wait_queue_head_t *pdone_q;
3614 unsigned long iflags;
dea3101e 3615
2e0fef85 3616 spin_lock_irqsave(&phba->hbalock, iflags);
68876920
JSEC		 3617 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
3618 if (cmdiocbq->context2 && rspiocbq)
3619 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
3620 &rspiocbq->iocb, sizeof(IOCB_t));
3621
3622 pdone_q = cmdiocbq->context_un.wait_queue;
68876920
JSEC		 3623 if (pdone_q)
3624 wake_up(pdone_q);
858c9f6c 3625 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e 3626 return;
3627}
3628
68876920
JSEC		 3629/*
3630 * Issue the caller's iocb and wait for its completion, but no longer than the
3631 * caller's timeout. Note that iocb_flags is cleared before the
3632 * lpfc_sli_issue_call since the wake routine sets a unique value and by
3633 * definition this is a wait function.
3634 */
92d7f7b0 3635
dea3101e 3636int
2e0fef85
JS		 3637lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
3638 struct lpfc_sli_ring *pring,
3639 struct lpfc_iocbq *piocb,
3640 struct lpfc_iocbq *prspiocbq,
68876920 3641 uint32_t timeout)
dea3101e 3642{
7259f0d0 3643 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
68876920
JSEC		 3644 long timeleft, timeout_req = 0;
3645 int retval = IOCB_SUCCESS;
875fbdfe 3646 uint32_t creg_val;
dea3101e 3647
3648 /*
68876920
JSEC		 3649 * If the caller has provided a response iocbq buffer, then context2
3650 * is NULL or its an error.
dea3101e 3651 */
68876920
JSEC		 3652 if (prspiocbq) {
3653 if (piocb->context2)
3654 return IOCB_ERROR;
3655 piocb->context2 = prspiocbq;
dea3101e 3656 }
3657
68876920
JSEC		 3658 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
3659 piocb->context_un.wait_queue = &done_q;
3660 piocb->iocb_flag &= ~LPFC_IO_WAKE;
dea3101e 3661
875fbdfe
JSEC		 3662 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3663 creg_val = readl(phba->HCregaddr);
3664 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
3665 writel(creg_val, phba->HCregaddr);
3666 readl(phba->HCregaddr); /* flush */
3667 }
3668
68876920
JSEC		 3669 retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
3670 if (retval == IOCB_SUCCESS) {
3671 timeout_req = timeout * HZ;
68876920
JSEC		 3672 timeleft = wait_event_timeout(done_q,
3673 piocb->iocb_flag & LPFC_IO_WAKE,
3674 timeout_req);
dea3101e 3675
7054a606
JS		 3676 if (piocb->iocb_flag & LPFC_IO_WAKE) {
3677 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 3678 "0331 IOCB wake signaled\n");
7054a606 3679 } else if (timeleft == 0) {
68876920 3680 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS		 3681 "0338 IOCB wait timeout error - no "
3682 "wake response Data x%x\n", timeout);
68876920 3683 retval = IOCB_TIMEDOUT;
7054a606 3684 } else {
68876920 3685 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS		 3686 "0330 IOCB wake NOT set, "
3687 "Data x%x x%lx\n",
68876920
JSEC		 3688 timeout, (timeleft / jiffies));
3689 retval = IOCB_TIMEDOUT;
dea3101e 3690 }
68876920
JSEC		 3691 } else {
3692 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 3693 ":0332 IOCB wait issue failed, Data x%x\n",
3694 retval);
68876920 3695 retval = IOCB_ERROR;
dea3101e 3696 }
3697
875fbdfe
JSEC		 3698 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3699 creg_val = readl(phba->HCregaddr);
3700 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
3701 writel(creg_val, phba->HCregaddr);
3702 readl(phba->HCregaddr); /* flush */
3703 }
3704
68876920
JSEC		 3705 if (prspiocbq)
3706 piocb->context2 = NULL;
3707
3708 piocb->context_un.wait_queue = NULL;
3709 piocb->iocb_cmpl = NULL;
dea3101e 3710 return retval;
3711}
68876920 3712
dea3101e 3713int
2e0fef85 3714lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
dea3101e 3715 uint32_t timeout)
3716{
7259f0d0 3717 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
dea3101e 3718 int retval;
858c9f6c 3719 unsigned long flag;
dea3101e 3720
3721 /* The caller must leave context1 empty. */
98c9ea5c 3722 if (pmboxq->context1)
2e0fef85 3723 return MBX_NOT_FINISHED;
dea3101e 3724
3725 /* setup wake call as IOCB callback */
3726 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
3727 /* setup context field to pass wait_queue pointer to wake function */
3728 pmboxq->context1 = &done_q;
3729
dea3101e 3730 /* now issue the command */
3731 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
3732
3733 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
7054a606
JS		 3734 wait_event_interruptible_timeout(done_q,
3735 pmboxq->mbox_flag & LPFC_MBX_WAKE,
3736 timeout * HZ);
3737
858c9f6c 3738 spin_lock_irqsave(&phba->hbalock, flag);
dea3101e 3739 pmboxq->context1 = NULL;
7054a606
JS		 3740 /*
3741 * if LPFC_MBX_WAKE flag is set the mailbox is completed
3742 * else do not free the resources.
3743 */
3744 if (pmboxq->mbox_flag & LPFC_MBX_WAKE)
dea3101e 3745 retval = MBX_SUCCESS;
858c9f6c 3746 else {
7054a606 3747 retval = MBX_TIMEOUT;
858c9f6c
JS		 3748 pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3749 }
3750 spin_unlock_irqrestore(&phba->hbalock, flag);
dea3101e 3751 }
3752
dea3101e 3753 return retval;
3754}
3755
b4c02652
JS		 3756int
3757lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
3758{
2e0fef85 3759 struct lpfc_vport *vport = phba->pport;
b4c02652 3760 int i = 0;
ed957684 3761 uint32_t ha_copy;
b4c02652 3762
2e0fef85 3763 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !vport->stopped) {
b4c02652
JS		 3764 if (i++ > LPFC_MBOX_TMO * 1000)
3765 return 1;
3766
ed957684
JS		 3767 /*
3768 * Call lpfc_sli_handle_mb_event only if a mailbox cmd
3769 * did finish. This way we won't get the misleading
3770 * "Stray Mailbox Interrupt" message.
3771 */
3772 spin_lock_irq(&phba->hbalock);
3773 ha_copy = phba->work_ha;
3774 phba->work_ha &= ~HA_MBATT;
3775 spin_unlock_irq(&phba->hbalock);
3776
3777 if (ha_copy & HA_MBATT)
3778 if (lpfc_sli_handle_mb_event(phba) == 0)
3779 i = 0;
b4c02652
JS		 3780
3781 msleep(1);
3782 }
3783
3784 return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
3785}
3786
dea3101e 3787irqreturn_t
7d12e780 3788lpfc_intr_handler(int irq, void *dev_id)
dea3101e 3789{
2e0fef85 3790 struct lpfc_hba *phba;
dea3101e 3791 uint32_t ha_copy;
3792 uint32_t work_ha_copy;
3793 unsigned long status;
dea3101e 3794 uint32_t control;
3795
92d7f7b0 3796 MAILBOX_t *mbox, *pmbox;
858c9f6c
JS		 3797 struct lpfc_vport *vport;
3798 struct lpfc_nodelist *ndlp;
3799 struct lpfc_dmabuf *mp;
92d7f7b0
JS		 3800 LPFC_MBOXQ_t *pmb;
3801 int rc;
3802
dea3101e 3803 /*
3804 * Get the driver's phba structure from the dev_id and
3805 * assume the HBA is not interrupting.
3806 */
3807 phba = (struct lpfc_hba *) dev_id;
3808
3809 if (unlikely(!phba))
3810 return IRQ_NONE;
3811
8d63f375
LV		 3812 /* If the pci channel is offline, ignore all the interrupts. */
3813 if (unlikely(pci_channel_offline(phba->pcidev)))
3814 return IRQ_NONE;
3815
dea3101e 3816 phba->sli.slistat.sli_intr++;
3817
3818 /*
3819 * Call the HBA to see if it is interrupting. If not, don't claim
3820 * the interrupt
3821 */
3822
3823 /* Ignore all interrupts during initialization. */
2e0fef85 3824 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e 3825 return IRQ_NONE;
3826
3827 /*
3828 * Read host attention register to determine interrupt source
3829 * Clear Attention Sources, except Error Attention (to
3830 * preserve status) and Link Attention
3831 */
2e0fef85 3832 spin_lock(&phba->hbalock);
dea3101e 3833 ha_copy = readl(phba->HAregaddr);
ebdbe65f
JS		 3834 /* If somebody is waiting to handle an eratt don't process it
3835 * here. The brdkill function will do this.
3836 */
2e0fef85 3837 if (phba->link_flag & LS_IGNORE_ERATT)
ebdbe65f 3838 ha_copy &= ~HA_ERATT;
dea3101e 3839 writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
3840 readl(phba->HAregaddr); /* flush */
2e0fef85 3841 spin_unlock(&phba->hbalock);
dea3101e 3842
3843 if (unlikely(!ha_copy))
3844 return IRQ_NONE;
3845
3846 work_ha_copy = ha_copy & phba->work_ha_mask;
3847
3848 if (unlikely(work_ha_copy)) {
3849 if (work_ha_copy & HA_LATT) {
3850 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
3851 /*
3852 * Turn off Link Attention interrupts
3853 * until CLEAR_LA done
3854 */
2e0fef85 3855 spin_lock(&phba->hbalock);
dea3101e 3856 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
3857 control = readl(phba->HCregaddr);
3858 control &= ~HC_LAINT_ENA;
3859 writel(control, phba->HCregaddr);
3860 readl(phba->HCregaddr); /* flush */
2e0fef85 3861 spin_unlock(&phba->hbalock);
dea3101e 3862 }
3863 else
3864 work_ha_copy &= ~HA_LATT;
3865 }
3866
3867 if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
858c9f6c
JS		 3868 /*
3869 * Turn off Slow Rings interrupts, LPFC_ELS_RING is
3870 * the only slow ring.
3871 */
3872 status = (work_ha_copy &
3873 (HA_RXMASK << (4*LPFC_ELS_RING)));
3874 status >>= (4*LPFC_ELS_RING);
3875 if (status & HA_RXMASK) {
3876 spin_lock(&phba->hbalock);
3877 control = readl(phba->HCregaddr);
a58cbd52
JS		 3878
3879 lpfc_debugfs_slow_ring_trc(phba,
3880 "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
3881 control, status,
3882 (uint32_t)phba->sli.slistat.sli_intr);
3883
858c9f6c 3884 if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
a58cbd52
JS		 3885 lpfc_debugfs_slow_ring_trc(phba,
3886 "ISR Disable ring:"
3887 "pwork:x%x hawork:x%x wait:x%x",
3888 phba->work_ha, work_ha_copy,
3889 (uint32_t)((unsigned long)
3890 phba->work_wait));
3891
858c9f6c
JS		 3892 control &=
3893 ~(HC_R0INT_ENA << LPFC_ELS_RING);
dea3101e 3894 writel(control, phba->HCregaddr);
3895 readl(phba->HCregaddr); /* flush */
dea3101e 3896 }
a58cbd52
JS		 3897 else {
3898 lpfc_debugfs_slow_ring_trc(phba,
3899 "ISR slow ring: pwork:"
3900 "x%x hawork:x%x wait:x%x",
3901 phba->work_ha, work_ha_copy,
3902 (uint32_t)((unsigned long)
3903 phba->work_wait));
3904 }
858c9f6c 3905 spin_unlock(&phba->hbalock);
dea3101e 3906 }
3907 }
3908
3909 if (work_ha_copy & HA_ERATT) {
2e0fef85 3910 phba->link_state = LPFC_HBA_ERROR;
dea3101e 3911 /*
3912 * There was a link/board error. Read the
3913 * status register to retrieve the error event
3914 * and process it.
3915 */
3916 phba->sli.slistat.err_attn_event++;
3917 /* Save status info */
3918 phba->work_hs = readl(phba->HSregaddr);
3919 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
3920 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
3921
3922 /* Clear Chip error bit */
3923 writel(HA_ERATT, phba->HAregaddr);
3924 readl(phba->HAregaddr); /* flush */
2e0fef85 3925 phba->pport->stopped = 1;
dea3101e 3926 }
3927
92d7f7b0
JS		 3928 if ((work_ha_copy & HA_MBATT) &&
3929 (phba->sli.mbox_active)) {
3930 pmb = phba->sli.mbox_active;
3931 pmbox = &pmb->mb;
3932 mbox = &phba->slim2p->mbx;
858c9f6c 3933 vport = pmb->vport;
92d7f7b0
JS		 3934
3935 /* First check out the status word */
3936 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
3937 if (pmbox->mbxOwner != OWN_HOST) {
3938 /*
3939 * Stray Mailbox Interrupt, mbxCommand <cmd>
3940 * mbxStatus <status>
3941 */
3942 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX |
3943 LOG_SLI,
e8b62011 3944 "(%d):0304 Stray Mailbox "
92d7f7b0
JS		 3945 "Interrupt mbxCommand x%x "
3946 "mbxStatus x%x\n",
e8b62011 3947 (vport ? vport->vpi : 0),
92d7f7b0
JS		 3948 pmbox->mbxCommand,
3949 pmbox->mbxStatus);
3950 }
858c9f6c 3951 phba->last_completion_time = jiffies;
92d7f7b0
JS		 3952 del_timer_sync(&phba->sli.mbox_tmo);
3953
92d7f7b0
JS		 3954 phba->sli.mbox_active = NULL;
3955 if (pmb->mbox_cmpl) {
3956 lpfc_sli_pcimem_bcopy(mbox, pmbox,
3957 MAILBOX_CMD_SIZE);
3958 }
858c9f6c
JS		 3959 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
3960 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
3961
3962 lpfc_debugfs_disc_trc(vport,
3963 LPFC_DISC_TRC_MBOX_VPORT,
3964 "MBOX dflt rpi: : status:x%x rpi:x%x",
3965 (uint32_t)pmbox->mbxStatus,
3966 pmbox->un.varWords[0], 0);
3967
3968 if ( !pmbox->mbxStatus) {
3969 mp = (struct lpfc_dmabuf *)
3970 (pmb->context1);
3971 ndlp = (struct lpfc_nodelist *)
3972 pmb->context2;
3973
3974 /* Reg_LOGIN of dflt RPI was successful.
3975 * new lets get rid of the RPI using the
3976 * same mbox buffer.
3977 */
3978 lpfc_unreg_login(phba, vport->vpi,
3979 pmbox->un.varWords[0], pmb);
3980 pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
3981 pmb->context1 = mp;
3982 pmb->context2 = ndlp;
3983 pmb->vport = vport;
3984 spin_lock(&phba->hbalock);
3985 phba->sli.sli_flag &=
3986 ~LPFC_SLI_MBOX_ACTIVE;
3987 spin_unlock(&phba->hbalock);
3988 goto send_current_mbox;
3989 }
3990 }
3991 spin_lock(&phba->pport->work_port_lock);
3992 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
3993 spin_unlock(&phba->pport->work_port_lock);
92d7f7b0
JS		 3994 lpfc_mbox_cmpl_put(phba, pmb);
3995 }
3996 if ((work_ha_copy & HA_MBATT) &&
3997 (phba->sli.mbox_active == NULL)) {
3998send_next_mbox:
3999 spin_lock(&phba->hbalock);
4000 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
4001 pmb = lpfc_mbox_get(phba);
4002 spin_unlock(&phba->hbalock);
858c9f6c 4003send_current_mbox:
92d7f7b0
JS		 4004 /* Process next mailbox command if there is one */
4005 if (pmb != NULL) {
4006 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4007 if (rc == MBX_NOT_FINISHED) {
4008 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
4009 lpfc_mbox_cmpl_put(phba, pmb);
4010 goto send_next_mbox;
4011 }
92d7f7b0
JS		 4012 }
4013
4014 }
4015
2e0fef85 4016 spin_lock(&phba->hbalock);
dea3101e 4017 phba->work_ha |= work_ha_copy;
4018 if (phba->work_wait)
92d7f7b0 4019 lpfc_worker_wake_up(phba);
2e0fef85 4020 spin_unlock(&phba->hbalock);
dea3101e 4021 }
4022
4023 ha_copy &= ~(phba->work_ha_mask);
4024
4025 /*
4026 * Process all events on FCP ring. Take the optimized path for
4027 * FCP IO. Any other IO is slow path and is handled by
4028 * the worker thread.
4029 */
4030 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
4031 status >>= (4*LPFC_FCP_RING);
858c9f6c 4032 if (status & HA_RXMASK)
dea3101e 4033 lpfc_sli_handle_fast_ring_event(phba,
4034 &phba->sli.ring[LPFC_FCP_RING],
4035 status);
a4bc3379
JS		 4036
4037 if (phba->cfg_multi_ring_support == 2) {
4038 /*
4039 * Process all events on extra ring. Take the optimized path
4040 * for extra ring IO. Any other IO is slow path and is handled
4041 * by the worker thread.
4042 */
4043 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
4044 status >>= (4*LPFC_EXTRA_RING);
858c9f6c 4045 if (status & HA_RXMASK) {
a4bc3379
JS		 4046 lpfc_sli_handle_fast_ring_event(phba,
4047 &phba->sli.ring[LPFC_EXTRA_RING],
4048 status);
4049 }
4050 }
dea3101e 4051 return IRQ_HANDLED;
4052
4053} /* lpfc_intr_handler */
Linux kernel - Deliverables
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