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da0436e9 JS |
1 | /******************************************************************* |
2 | * This file is part of the Emulex Linux Device Driver for * | |
3 | * Fibre Channel Host Bus Adapters. * | |
f25e8e79 | 4 | * Copyright (C) 2009-2015 Emulex. All rights reserved. * |
da0436e9 JS |
5 | * EMULEX and SLI are trademarks of Emulex. * |
6 | * www.emulex.com * | |
7 | * * | |
8 | * This program is free software; you can redistribute it and/or * | |
9 | * modify it under the terms of version 2 of the GNU General * | |
10 | * Public License as published by the Free Software Foundation. * | |
11 | * This program is distributed in the hope that it will be useful. * | |
12 | * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
13 | * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
14 | * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
15 | * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
16 | * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
17 | * more details, a copy of which can be found in the file COPYING * | |
18 | * included with this package. * | |
19 | *******************************************************************/ | |
20 | ||
21 | #define LPFC_ACTIVE_MBOX_WAIT_CNT 100 | |
5af5eee7 JS |
22 | #define LPFC_XRI_EXCH_BUSY_WAIT_TMO 10000 |
23 | #define LPFC_XRI_EXCH_BUSY_WAIT_T1 10 | |
24 | #define LPFC_XRI_EXCH_BUSY_WAIT_T2 30000 | |
da0436e9 | 25 | #define LPFC_RELEASE_NOTIFICATION_INTERVAL 32 |
da0436e9 | 26 | #define LPFC_RPI_LOW_WATER_MARK 10 |
ecfd03c6 | 27 | |
a93ff37a JS |
28 | #define LPFC_UNREG_FCF 1 |
29 | #define LPFC_SKIP_UNREG_FCF 0 | |
30 | ||
ecfd03c6 JS |
31 | /* Amount of time in seconds for waiting FCF rediscovery to complete */ |
32 | #define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */ | |
33 | ||
da0436e9 JS |
34 | /* Number of SGL entries can be posted in a 4KB nonembedded mbox command */ |
35 | #define LPFC_NEMBED_MBOX_SGL_CNT 254 | |
36 | ||
67d12733 JS |
37 | /* Multi-queue arrangement for FCP EQ/CQ/WQ tuples */ |
38 | #define LPFC_FCP_IO_CHAN_DEF 4 | |
39 | #define LPFC_FCP_IO_CHAN_MIN 1 | |
82c3e9ba | 40 | #define LPFC_FCP_IO_CHAN_MAX 16 |
da0436e9 | 41 | |
1ba981fd JS |
42 | /* Number of channels used for Flash Optimized Fabric (FOF) operations */ |
43 | ||
44 | #define LPFC_FOF_IO_CHAN_NUM 1 | |
45 | ||
da0436e9 JS |
46 | /* |
47 | * Provide the default FCF Record attributes used by the driver | |
48 | * when nonFIP mode is configured and there is no other default | |
49 | * FCF Record attributes. | |
50 | */ | |
51 | #define LPFC_FCOE_FCF_DEF_INDEX 0 | |
52 | #define LPFC_FCOE_FCF_GET_FIRST 0xFFFF | |
53 | #define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF | |
54 | ||
dbb6b3ab JS |
55 | #define LPFC_FCOE_NULL_VID 0xFFF |
56 | #define LPFC_FCOE_IGNORE_VID 0xFFFF | |
57 | ||
da0436e9 JS |
58 | /* First 3 bytes of default FCF MAC is specified by FC_MAP */ |
59 | #define LPFC_FCOE_FCF_MAC3 0xFF | |
60 | #define LPFC_FCOE_FCF_MAC4 0xFF | |
61 | #define LPFC_FCOE_FCF_MAC5 0xFE | |
62 | #define LPFC_FCOE_FCF_MAP0 0x0E | |
63 | #define LPFC_FCOE_FCF_MAP1 0xFC | |
64 | #define LPFC_FCOE_FCF_MAP2 0x00 | |
98fc5dd9 | 65 | #define LPFC_FCOE_MAX_RCV_SIZE 0x800 |
da0436e9 JS |
66 | #define LPFC_FCOE_FKA_ADV_PER 0 |
67 | #define LPFC_FCOE_FIP_PRIORITY 0x80 | |
68 | ||
6669f9bb JS |
69 | #define sli4_sid_from_fc_hdr(fc_hdr) \ |
70 | ((fc_hdr)->fh_s_id[0] << 16 | \ | |
71 | (fc_hdr)->fh_s_id[1] << 8 | \ | |
72 | (fc_hdr)->fh_s_id[2]) | |
73 | ||
939723a4 JS |
74 | #define sli4_did_from_fc_hdr(fc_hdr) \ |
75 | ((fc_hdr)->fh_d_id[0] << 16 | \ | |
76 | (fc_hdr)->fh_d_id[1] << 8 | \ | |
77 | (fc_hdr)->fh_d_id[2]) | |
78 | ||
5ffc266e JS |
79 | #define sli4_fctl_from_fc_hdr(fc_hdr) \ |
80 | ((fc_hdr)->fh_f_ctl[0] << 16 | \ | |
81 | (fc_hdr)->fh_f_ctl[1] << 8 | \ | |
82 | (fc_hdr)->fh_f_ctl[2]) | |
83 | ||
939723a4 JS |
84 | #define sli4_type_from_fc_hdr(fc_hdr) \ |
85 | ((fc_hdr)->fh_type) | |
86 | ||
88a2cfbb JS |
87 | #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000 |
88 | ||
c71ab861 JS |
89 | #define INT_FW_UPGRADE 0 |
90 | #define RUN_FW_UPGRADE 1 | |
91 | ||
da0436e9 JS |
92 | enum lpfc_sli4_queue_type { |
93 | LPFC_EQ, | |
94 | LPFC_GCQ, | |
95 | LPFC_MCQ, | |
96 | LPFC_WCQ, | |
97 | LPFC_RCQ, | |
98 | LPFC_MQ, | |
99 | LPFC_WQ, | |
100 | LPFC_HRQ, | |
101 | LPFC_DRQ | |
102 | }; | |
103 | ||
104 | /* The queue sub-type defines the functional purpose of the queue */ | |
105 | enum lpfc_sli4_queue_subtype { | |
106 | LPFC_NONE, | |
107 | LPFC_MBOX, | |
108 | LPFC_FCP, | |
109 | LPFC_ELS, | |
110 | LPFC_USOL | |
111 | }; | |
112 | ||
113 | union sli4_qe { | |
114 | void *address; | |
115 | struct lpfc_eqe *eqe; | |
116 | struct lpfc_cqe *cqe; | |
117 | struct lpfc_mcqe *mcqe; | |
118 | struct lpfc_wcqe_complete *wcqe_complete; | |
119 | struct lpfc_wcqe_release *wcqe_release; | |
120 | struct sli4_wcqe_xri_aborted *wcqe_xri_aborted; | |
121 | struct lpfc_rcqe_complete *rcqe_complete; | |
122 | struct lpfc_mqe *mqe; | |
123 | union lpfc_wqe *wqe; | |
0c651878 | 124 | union lpfc_wqe128 *wqe128; |
da0436e9 JS |
125 | struct lpfc_rqe *rqe; |
126 | }; | |
127 | ||
128 | struct lpfc_queue { | |
129 | struct list_head list; | |
130 | enum lpfc_sli4_queue_type type; | |
131 | enum lpfc_sli4_queue_subtype subtype; | |
132 | struct lpfc_hba *phba; | |
133 | struct list_head child_list; | |
134 | uint32_t entry_count; /* Number of entries to support on the queue */ | |
135 | uint32_t entry_size; /* Size of each queue entry. */ | |
73d91e50 JS |
136 | uint32_t entry_repost; /* Count of entries before doorbell is rung */ |
137 | #define LPFC_QUEUE_MIN_REPOST 8 | |
da0436e9 | 138 | uint32_t queue_id; /* Queue ID assigned by the hardware */ |
2a622bfb | 139 | uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */ |
da0436e9 JS |
140 | struct list_head page_list; |
141 | uint32_t page_count; /* Number of pages allocated for this queue */ | |
da0436e9 JS |
142 | uint32_t host_index; /* The host's index for putting or getting */ |
143 | uint32_t hba_index; /* The last known hba index for get or put */ | |
b84daac9 | 144 | |
2a76a283 JS |
145 | struct lpfc_sli_ring *pring; /* ptr to io ring associated with q */ |
146 | ||
962bc51b JS |
147 | uint16_t db_format; |
148 | #define LPFC_DB_RING_FORMAT 0x01 | |
149 | #define LPFC_DB_LIST_FORMAT 0x02 | |
150 | void __iomem *db_regaddr; | |
b84daac9 JS |
151 | /* For q stats */ |
152 | uint32_t q_cnt_1; | |
153 | uint32_t q_cnt_2; | |
154 | uint32_t q_cnt_3; | |
155 | uint64_t q_cnt_4; | |
156 | /* defines for EQ stats */ | |
157 | #define EQ_max_eqe q_cnt_1 | |
158 | #define EQ_no_entry q_cnt_2 | |
159 | #define EQ_badstate q_cnt_3 | |
160 | #define EQ_processed q_cnt_4 | |
161 | ||
162 | /* defines for CQ stats */ | |
163 | #define CQ_mbox q_cnt_1 | |
164 | #define CQ_max_cqe q_cnt_1 | |
165 | #define CQ_release_wqe q_cnt_2 | |
166 | #define CQ_xri_aborted q_cnt_3 | |
167 | #define CQ_wq q_cnt_4 | |
168 | ||
169 | /* defines for WQ stats */ | |
170 | #define WQ_overflow q_cnt_1 | |
171 | #define WQ_posted q_cnt_4 | |
172 | ||
173 | /* defines for RQ stats */ | |
174 | #define RQ_no_posted_buf q_cnt_1 | |
175 | #define RQ_no_buf_found q_cnt_2 | |
176 | #define RQ_buf_trunc q_cnt_3 | |
177 | #define RQ_rcv_buf q_cnt_4 | |
178 | ||
da0436e9 JS |
179 | union sli4_qe qe[1]; /* array to index entries (must be last) */ |
180 | }; | |
181 | ||
da0436e9 | 182 | struct lpfc_sli4_link { |
8b68cd52 | 183 | uint16_t speed; |
da0436e9 JS |
184 | uint8_t duplex; |
185 | uint8_t status; | |
70f3c073 JS |
186 | uint8_t type; |
187 | uint8_t number; | |
da0436e9 | 188 | uint8_t fault; |
65467b6b | 189 | uint16_t logical_speed; |
70f3c073 | 190 | uint16_t topology; |
da0436e9 JS |
191 | }; |
192 | ||
ecfd03c6 JS |
193 | struct lpfc_fcf_rec { |
194 | uint8_t fabric_name[8]; | |
195 | uint8_t switch_name[8]; | |
da0436e9 JS |
196 | uint8_t mac_addr[6]; |
197 | uint16_t fcf_indx; | |
ecfd03c6 JS |
198 | uint32_t priority; |
199 | uint16_t vlan_id; | |
200 | uint32_t addr_mode; | |
201 | uint32_t flag; | |
202 | #define BOOT_ENABLE 0x01 | |
203 | #define RECORD_VALID 0x02 | |
204 | }; | |
205 | ||
7d791df7 JS |
206 | struct lpfc_fcf_pri_rec { |
207 | uint16_t fcf_index; | |
208 | #define LPFC_FCF_ON_PRI_LIST 0x0001 | |
209 | #define LPFC_FCF_FLOGI_FAILED 0x0002 | |
210 | uint16_t flag; | |
211 | uint32_t priority; | |
212 | }; | |
213 | ||
214 | struct lpfc_fcf_pri { | |
215 | struct list_head list; | |
216 | struct lpfc_fcf_pri_rec fcf_rec; | |
217 | }; | |
218 | ||
219 | /* | |
220 | * Maximum FCF table index, it is for driver internal book keeping, it | |
221 | * just needs to be no less than the supported HBA's FCF table size. | |
222 | */ | |
223 | #define LPFC_SLI4_FCF_TBL_INDX_MAX 32 | |
224 | ||
ecfd03c6 | 225 | struct lpfc_fcf { |
da0436e9 JS |
226 | uint16_t fcfi; |
227 | uint32_t fcf_flag; | |
228 | #define FCF_AVAILABLE 0x01 /* FCF available for discovery */ | |
229 | #define FCF_REGISTERED 0x02 /* FCF registered with FW */ | |
ecfd03c6 JS |
230 | #define FCF_SCAN_DONE 0x04 /* FCF table scan done */ |
231 | #define FCF_IN_USE 0x08 /* Atleast one discovery completed */ | |
0c9ab6f5 JS |
232 | #define FCF_INIT_DISC 0x10 /* Initial FCF discovery */ |
233 | #define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */ | |
234 | #define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */ | |
235 | #define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC) | |
236 | #define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */ | |
237 | #define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */ | |
238 | #define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */ | |
a93ff37a | 239 | #define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT) |
da0436e9 | 240 | uint32_t addr_mode; |
999d813f | 241 | uint32_t eligible_fcf_cnt; |
ecfd03c6 JS |
242 | struct lpfc_fcf_rec current_rec; |
243 | struct lpfc_fcf_rec failover_rec; | |
7d791df7 JS |
244 | struct list_head fcf_pri_list; |
245 | struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX]; | |
246 | uint32_t current_fcf_scan_pri; | |
ecfd03c6 | 247 | struct timer_list redisc_wait; |
0c9ab6f5 | 248 | unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */ |
da0436e9 JS |
249 | }; |
250 | ||
0c9ab6f5 | 251 | |
da0436e9 JS |
252 | #define LPFC_REGION23_SIGNATURE "RG23" |
253 | #define LPFC_REGION23_VERSION 1 | |
254 | #define LPFC_REGION23_LAST_REC 0xff | |
a0c87cbd JS |
255 | #define DRIVER_SPECIFIC_TYPE 0xA2 |
256 | #define LINUX_DRIVER_ID 0x20 | |
257 | #define PORT_STE_TYPE 0x1 | |
258 | ||
da0436e9 JS |
259 | struct lpfc_fip_param_hdr { |
260 | uint8_t type; | |
261 | #define FCOE_PARAM_TYPE 0xA0 | |
262 | uint8_t length; | |
263 | #define FCOE_PARAM_LENGTH 2 | |
264 | uint8_t parm_version; | |
265 | #define FIPP_VERSION 0x01 | |
266 | uint8_t parm_flags; | |
267 | #define lpfc_fip_param_hdr_fipp_mode_SHIFT 6 | |
268 | #define lpfc_fip_param_hdr_fipp_mode_MASK 0x3 | |
269 | #define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags | |
6a9c52cf | 270 | #define FIPP_MODE_ON 0x1 |
da0436e9 JS |
271 | #define FIPP_MODE_OFF 0x0 |
272 | #define FIPP_VLAN_VALID 0x1 | |
273 | }; | |
274 | ||
275 | struct lpfc_fcoe_params { | |
276 | uint8_t fc_map[3]; | |
277 | uint8_t reserved1; | |
278 | uint16_t vlan_tag; | |
279 | uint8_t reserved[2]; | |
280 | }; | |
281 | ||
282 | struct lpfc_fcf_conn_hdr { | |
283 | uint8_t type; | |
284 | #define FCOE_CONN_TBL_TYPE 0xA1 | |
285 | uint8_t length; /* words */ | |
286 | uint8_t reserved[2]; | |
287 | }; | |
288 | ||
289 | struct lpfc_fcf_conn_rec { | |
290 | uint16_t flags; | |
291 | #define FCFCNCT_VALID 0x0001 | |
292 | #define FCFCNCT_BOOT 0x0002 | |
293 | #define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */ | |
294 | #define FCFCNCT_FBNM_VALID 0x0008 | |
295 | #define FCFCNCT_SWNM_VALID 0x0010 | |
296 | #define FCFCNCT_VLAN_VALID 0x0020 | |
297 | #define FCFCNCT_AM_VALID 0x0040 | |
298 | #define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */ | |
299 | #define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */ | |
300 | ||
301 | uint16_t vlan_tag; | |
302 | uint8_t fabric_name[8]; | |
303 | uint8_t switch_name[8]; | |
304 | }; | |
305 | ||
306 | struct lpfc_fcf_conn_entry { | |
307 | struct list_head list; | |
308 | struct lpfc_fcf_conn_rec conn_rec; | |
309 | }; | |
310 | ||
311 | /* | |
312 | * Define the host's bootstrap mailbox. This structure contains | |
313 | * the member attributes needed to create, use, and destroy the | |
314 | * bootstrap mailbox region. | |
315 | * | |
316 | * The macro definitions for the bmbx data structure are defined | |
317 | * in lpfc_hw4.h with the register definition. | |
318 | */ | |
319 | struct lpfc_bmbx { | |
320 | struct lpfc_dmabuf *dmabuf; | |
321 | struct dma_address dma_address; | |
322 | void *avirt; | |
323 | dma_addr_t aphys; | |
324 | uint32_t bmbx_size; | |
325 | }; | |
326 | ||
327 | #define LPFC_EQE_SIZE LPFC_EQE_SIZE_4 | |
328 | ||
329 | #define LPFC_EQE_SIZE_4B 4 | |
330 | #define LPFC_EQE_SIZE_16B 16 | |
331 | #define LPFC_CQE_SIZE 16 | |
332 | #define LPFC_WQE_SIZE 64 | |
0c651878 | 333 | #define LPFC_WQE128_SIZE 128 |
da0436e9 JS |
334 | #define LPFC_MQE_SIZE 256 |
335 | #define LPFC_RQE_SIZE 8 | |
336 | ||
337 | #define LPFC_EQE_DEF_COUNT 1024 | |
ff78d8f9 | 338 | #define LPFC_CQE_DEF_COUNT 1024 |
f1126688 | 339 | #define LPFC_WQE_DEF_COUNT 256 |
0c651878 | 340 | #define LPFC_WQE128_DEF_COUNT 128 |
da0436e9 JS |
341 | #define LPFC_MQE_DEF_COUNT 16 |
342 | #define LPFC_RQE_DEF_COUNT 512 | |
343 | ||
344 | #define LPFC_QUEUE_NOARM false | |
345 | #define LPFC_QUEUE_REARM true | |
346 | ||
347 | ||
348 | /* | |
349 | * SLI4 CT field defines | |
350 | */ | |
351 | #define SLI4_CT_RPI 0 | |
352 | #define SLI4_CT_VPI 1 | |
353 | #define SLI4_CT_VFI 2 | |
354 | #define SLI4_CT_FCFI 3 | |
355 | ||
da0436e9 JS |
356 | /* |
357 | * SLI4 specific data structures | |
358 | */ | |
359 | struct lpfc_max_cfg_param { | |
360 | uint16_t max_xri; | |
361 | uint16_t xri_base; | |
362 | uint16_t xri_used; | |
363 | uint16_t max_rpi; | |
364 | uint16_t rpi_base; | |
365 | uint16_t rpi_used; | |
366 | uint16_t max_vpi; | |
367 | uint16_t vpi_base; | |
368 | uint16_t vpi_used; | |
369 | uint16_t max_vfi; | |
370 | uint16_t vfi_base; | |
371 | uint16_t vfi_used; | |
372 | uint16_t max_fcfi; | |
da0436e9 JS |
373 | uint16_t fcfi_used; |
374 | uint16_t max_eq; | |
375 | uint16_t max_rq; | |
376 | uint16_t max_cq; | |
377 | uint16_t max_wq; | |
378 | }; | |
379 | ||
380 | struct lpfc_hba; | |
381 | /* SLI4 HBA multi-fcp queue handler struct */ | |
382 | struct lpfc_fcp_eq_hdl { | |
383 | uint32_t idx; | |
384 | struct lpfc_hba *phba; | |
ba20c853 | 385 | atomic_t fcp_eq_in_use; |
da0436e9 JS |
386 | }; |
387 | ||
28baac74 JS |
388 | /* Port Capabilities for SLI4 Parameters */ |
389 | struct lpfc_pc_sli4_params { | |
390 | uint32_t supported; | |
391 | uint32_t if_type; | |
392 | uint32_t sli_rev; | |
393 | uint32_t sli_family; | |
394 | uint32_t featurelevel_1; | |
395 | uint32_t featurelevel_2; | |
396 | uint32_t proto_types; | |
397 | #define LPFC_SLI4_PROTO_FCOE 0x0000001 | |
398 | #define LPFC_SLI4_PROTO_FC 0x0000002 | |
399 | #define LPFC_SLI4_PROTO_NIC 0x0000004 | |
400 | #define LPFC_SLI4_PROTO_ISCSI 0x0000008 | |
401 | #define LPFC_SLI4_PROTO_RDMA 0x0000010 | |
402 | uint32_t sge_supp_len; | |
403 | uint32_t if_page_sz; | |
404 | uint32_t rq_db_window; | |
405 | uint32_t loopbk_scope; | |
1ba981fd | 406 | uint32_t oas_supported; |
28baac74 JS |
407 | uint32_t eq_pages_max; |
408 | uint32_t eqe_size; | |
409 | uint32_t cq_pages_max; | |
410 | uint32_t cqe_size; | |
411 | uint32_t mq_pages_max; | |
412 | uint32_t mqe_size; | |
413 | uint32_t mq_elem_cnt; | |
414 | uint32_t wq_pages_max; | |
415 | uint32_t wqe_size; | |
416 | uint32_t rq_pages_max; | |
417 | uint32_t rqe_size; | |
418 | uint32_t hdr_pages_max; | |
419 | uint32_t hdr_size; | |
420 | uint32_t hdr_pp_align; | |
421 | uint32_t sgl_pages_max; | |
422 | uint32_t sgl_pp_align; | |
fedd3b7b JS |
423 | uint8_t cqv; |
424 | uint8_t mqv; | |
425 | uint8_t wqv; | |
426 | uint8_t rqv; | |
0c651878 JS |
427 | uint8_t wqsize; |
428 | #define LPFC_WQ_SZ64_SUPPORT 1 | |
429 | #define LPFC_WQ_SZ128_SUPPORT 2 | |
28baac74 JS |
430 | }; |
431 | ||
912e3acd JS |
432 | struct lpfc_iov { |
433 | uint32_t pf_number; | |
434 | uint32_t vf_number; | |
435 | }; | |
436 | ||
cd1c8301 JS |
437 | struct lpfc_sli4_lnk_info { |
438 | uint8_t lnk_dv; | |
439 | #define LPFC_LNK_DAT_INVAL 0 | |
440 | #define LPFC_LNK_DAT_VAL 1 | |
441 | uint8_t lnk_tp; | |
442 | #define LPFC_LNK_GE 0x0 /* FCoE */ | |
443 | #define LPFC_LNK_FC 0x1 /* FC */ | |
444 | uint8_t lnk_no; | |
448193b5 | 445 | uint8_t optic_state; |
cd1c8301 JS |
446 | }; |
447 | ||
1ba981fd JS |
448 | #define LPFC_SLI4_HANDLER_CNT (LPFC_FCP_IO_CHAN_MAX+ \ |
449 | LPFC_FOF_IO_CHAN_NUM) | |
4305f183 JS |
450 | #define LPFC_SLI4_HANDLER_NAME_SZ 16 |
451 | ||
7bb03bbf JS |
452 | /* Used for IRQ vector to CPU mapping */ |
453 | struct lpfc_vector_map_info { | |
454 | uint16_t phys_id; | |
455 | uint16_t core_id; | |
456 | uint16_t irq; | |
457 | uint16_t channel_id; | |
7bb03bbf JS |
458 | }; |
459 | #define LPFC_VECTOR_MAP_EMPTY 0xffff | |
7bb03bbf | 460 | |
da0436e9 JS |
461 | /* SLI4 HBA data structure entries */ |
462 | struct lpfc_sli4_hba { | |
463 | void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for | |
464 | PCI BAR0, config space registers */ | |
465 | void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for | |
466 | PCI BAR1, control registers */ | |
467 | void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for | |
468 | PCI BAR2, doorbell registers */ | |
2fcee4bf JS |
469 | union { |
470 | struct { | |
471 | /* IF Type 0, BAR 0 PCI cfg space reg mem map */ | |
472 | void __iomem *UERRLOregaddr; | |
473 | void __iomem *UERRHIregaddr; | |
474 | void __iomem *UEMASKLOregaddr; | |
475 | void __iomem *UEMASKHIregaddr; | |
476 | } if_type0; | |
477 | struct { | |
478 | /* IF Type 2, BAR 0 PCI cfg space reg mem map. */ | |
479 | void __iomem *STATUSregaddr; | |
480 | void __iomem *CTRLregaddr; | |
481 | void __iomem *ERR1regaddr; | |
2e90f4b5 JS |
482 | #define SLIPORT_ERR1_REG_ERR_CODE_1 0x1 |
483 | #define SLIPORT_ERR1_REG_ERR_CODE_2 0x2 | |
2fcee4bf | 484 | void __iomem *ERR2regaddr; |
2e90f4b5 JS |
485 | #define SLIPORT_ERR2_REG_FW_RESTART 0x0 |
486 | #define SLIPORT_ERR2_REG_FUNC_PROVISON 0x1 | |
487 | #define SLIPORT_ERR2_REG_FORCED_DUMP 0x2 | |
488 | #define SLIPORT_ERR2_REG_FAILURE_EQ 0x3 | |
489 | #define SLIPORT_ERR2_REG_FAILURE_CQ 0x4 | |
490 | #define SLIPORT_ERR2_REG_FAILURE_BUS 0x5 | |
491 | #define SLIPORT_ERR2_REG_FAILURE_RQ 0x6 | |
2fcee4bf JS |
492 | } if_type2; |
493 | } u; | |
494 | ||
495 | /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */ | |
496 | void __iomem *PSMPHRregaddr; | |
497 | ||
498 | /* Well-known SLI INTF register memory map. */ | |
499 | void __iomem *SLIINTFregaddr; | |
500 | ||
501 | /* IF type 0, BAR 1 function CSR register memory map */ | |
502 | void __iomem *ISRregaddr; /* HST_ISR register */ | |
503 | void __iomem *IMRregaddr; /* HST_IMR register */ | |
504 | void __iomem *ISCRregaddr; /* HST_ISCR register */ | |
505 | /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */ | |
506 | void __iomem *RQDBregaddr; /* RQ_DOORBELL register */ | |
507 | void __iomem *WQDBregaddr; /* WQ_DOORBELL register */ | |
508 | void __iomem *EQCQDBregaddr; /* EQCQ_DOORBELL register */ | |
509 | void __iomem *MQDBregaddr; /* MQ_DOORBELL register */ | |
510 | void __iomem *BMBXregaddr; /* BootStrap MBX register */ | |
da0436e9 | 511 | |
a747c9ce JS |
512 | uint32_t ue_mask_lo; |
513 | uint32_t ue_mask_hi; | |
28baac74 JS |
514 | struct lpfc_register sli_intf; |
515 | struct lpfc_pc_sli4_params pc_sli4_params; | |
da0436e9 | 516 | struct msix_entry *msix_entries; |
1ba981fd | 517 | uint8_t handler_name[LPFC_SLI4_HANDLER_CNT][LPFC_SLI4_HANDLER_NAME_SZ]; |
da0436e9 | 518 | struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */ |
67d12733 | 519 | |
da0436e9 | 520 | /* Pointers to the constructed SLI4 queues */ |
67d12733 JS |
521 | struct lpfc_queue **hba_eq;/* Event queues for HBA */ |
522 | struct lpfc_queue **fcp_cq;/* Fast-path FCP compl queue */ | |
da0436e9 | 523 | struct lpfc_queue **fcp_wq;/* Fast-path FCP work queue */ |
67d12733 JS |
524 | uint16_t *fcp_cq_map; |
525 | ||
526 | struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */ | |
527 | struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */ | |
da0436e9 JS |
528 | struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */ |
529 | struct lpfc_queue *els_wq; /* Slow-path ELS work queue */ | |
530 | struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */ | |
531 | struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */ | |
da0436e9 | 532 | |
9a86ed48 | 533 | uint32_t fw_func_mode; /* FW function protocol mode */ |
962bc51b JS |
534 | uint32_t ulp0_mode; /* ULP0 protocol mode */ |
535 | uint32_t ulp1_mode; /* ULP1 protocol mode */ | |
536 | ||
1ba981fd JS |
537 | struct lpfc_queue *fof_eq; /* Flash Optimized Fabric Event queue */ |
538 | ||
539 | /* Optimized Access Storage specific queues/structures */ | |
540 | ||
541 | struct lpfc_queue *oas_cq; /* OAS completion queue */ | |
542 | struct lpfc_queue *oas_wq; /* OAS Work queue */ | |
543 | struct lpfc_sli_ring *oas_ring; | |
544 | uint64_t oas_next_lun; | |
545 | uint8_t oas_next_tgt_wwpn[8]; | |
546 | uint8_t oas_next_vpt_wwpn[8]; | |
547 | ||
da0436e9 JS |
548 | /* Setup information for various queue parameters */ |
549 | int eq_esize; | |
550 | int eq_ecount; | |
551 | int cq_esize; | |
552 | int cq_ecount; | |
553 | int wq_esize; | |
554 | int wq_ecount; | |
555 | int mq_esize; | |
556 | int mq_ecount; | |
557 | int rq_esize; | |
558 | int rq_ecount; | |
559 | #define LPFC_SP_EQ_MAX_INTR_SEC 10000 | |
560 | #define LPFC_FP_EQ_MAX_INTR_SEC 10000 | |
561 | ||
562 | uint32_t intr_enable; | |
563 | struct lpfc_bmbx bmbx; | |
564 | struct lpfc_max_cfg_param max_cfg_param; | |
6d368e53 JS |
565 | uint16_t extents_in_use; /* must allocate resource extents. */ |
566 | uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */ | |
da0436e9 JS |
567 | uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */ |
568 | uint16_t next_rpi; | |
569 | uint16_t scsi_xri_max; | |
570 | uint16_t scsi_xri_cnt; | |
8a9d2e80 | 571 | uint16_t els_xri_cnt; |
6d368e53 | 572 | uint16_t scsi_xri_start; |
da0436e9 JS |
573 | struct list_head lpfc_free_sgl_list; |
574 | struct list_head lpfc_sgl_list; | |
da0436e9 | 575 | struct list_head lpfc_abts_els_sgl_list; |
da0436e9 | 576 | struct list_head lpfc_abts_scsi_buf_list; |
da0436e9 JS |
577 | struct lpfc_sglq **lpfc_sglq_active_list; |
578 | struct list_head lpfc_rpi_hdr_list; | |
579 | unsigned long *rpi_bmask; | |
6d368e53 | 580 | uint16_t *rpi_ids; |
da0436e9 | 581 | uint16_t rpi_count; |
6d368e53 JS |
582 | struct list_head lpfc_rpi_blk_list; |
583 | unsigned long *xri_bmask; | |
584 | uint16_t *xri_ids; | |
6d368e53 JS |
585 | struct list_head lpfc_xri_blk_list; |
586 | unsigned long *vfi_bmask; | |
587 | uint16_t *vfi_ids; | |
588 | uint16_t vfi_count; | |
589 | struct list_head lpfc_vfi_blk_list; | |
da0436e9 | 590 | struct lpfc_sli4_flags sli4_flags; |
45ed1190 | 591 | struct list_head sp_queue_event; |
da0436e9 JS |
592 | struct list_head sp_cqe_event_pool; |
593 | struct list_head sp_asynce_work_queue; | |
594 | struct list_head sp_fcp_xri_aborted_work_queue; | |
595 | struct list_head sp_els_xri_aborted_work_queue; | |
596 | struct list_head sp_unsol_work_queue; | |
597 | struct lpfc_sli4_link link_state; | |
cd1c8301 JS |
598 | struct lpfc_sli4_lnk_info lnk_info; |
599 | uint32_t pport_name_sta; | |
600 | #define LPFC_SLI4_PPNAME_NON 0 | |
601 | #define LPFC_SLI4_PPNAME_GET 1 | |
912e3acd | 602 | struct lpfc_iov iov; |
da0436e9 JS |
603 | spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */ |
604 | spinlock_t abts_sgl_list_lock; /* list of aborted els IOs */ | |
8b017a30 | 605 | uint32_t physical_port; |
7bb03bbf JS |
606 | |
607 | /* CPU to vector mapping information */ | |
608 | struct lpfc_vector_map_info *cpu_map; | |
609 | uint16_t num_online_cpu; | |
610 | uint16_t num_present_cpu; | |
76fd07a6 | 611 | uint16_t curr_disp_cpu; |
da0436e9 JS |
612 | }; |
613 | ||
614 | enum lpfc_sge_type { | |
615 | GEN_BUFF_TYPE, | |
616 | SCSI_BUFF_TYPE | |
617 | }; | |
618 | ||
0f65ff68 JS |
619 | enum lpfc_sgl_state { |
620 | SGL_FREED, | |
621 | SGL_ALLOCATED, | |
622 | SGL_XRI_ABORTED | |
623 | }; | |
624 | ||
da0436e9 JS |
625 | struct lpfc_sglq { |
626 | /* lpfc_sglqs are used in double linked lists */ | |
627 | struct list_head list; | |
628 | struct list_head clist; | |
629 | enum lpfc_sge_type buff_type; /* is this a scsi sgl */ | |
0f65ff68 | 630 | enum lpfc_sgl_state state; |
19ca7609 | 631 | struct lpfc_nodelist *ndlp; /* ndlp associated with IO */ |
da0436e9 | 632 | uint16_t iotag; /* pre-assigned IO tag */ |
6d368e53 | 633 | uint16_t sli4_lxritag; /* logical pre-assigned xri. */ |
da0436e9 JS |
634 | uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */ |
635 | struct sli4_sge *sgl; /* pre-assigned SGL */ | |
636 | void *virt; /* virtual address. */ | |
637 | dma_addr_t phys; /* physical address */ | |
638 | }; | |
639 | ||
640 | struct lpfc_rpi_hdr { | |
641 | struct list_head list; | |
642 | uint32_t len; | |
643 | struct lpfc_dmabuf *dmabuf; | |
644 | uint32_t page_count; | |
645 | uint32_t start_rpi; | |
646 | }; | |
647 | ||
6d368e53 JS |
648 | struct lpfc_rsrc_blks { |
649 | struct list_head list; | |
650 | uint16_t rsrc_start; | |
651 | uint16_t rsrc_size; | |
652 | uint16_t rsrc_used; | |
653 | }; | |
654 | ||
86478875 JS |
655 | struct lpfc_rdp_context { |
656 | struct lpfc_nodelist *ndlp; | |
657 | uint16_t ox_id; | |
658 | uint16_t rx_id; | |
659 | READ_LNK_VAR link_stat; | |
660 | uint8_t page_a0[DMP_SFF_PAGE_A0_SIZE]; | |
661 | uint8_t page_a2[DMP_SFF_PAGE_A2_SIZE]; | |
662 | void (*cmpl)(struct lpfc_hba *, struct lpfc_rdp_context*, int); | |
663 | }; | |
664 | ||
8b017a30 JS |
665 | struct lpfc_lcb_context { |
666 | uint8_t sub_command; | |
667 | uint8_t type; | |
668 | uint8_t frequency; | |
669 | uint16_t ox_id; | |
670 | uint16_t rx_id; | |
671 | struct lpfc_nodelist *ndlp; | |
672 | }; | |
673 | ||
674 | ||
da0436e9 JS |
675 | /* |
676 | * SLI4 specific function prototypes | |
677 | */ | |
678 | int lpfc_pci_function_reset(struct lpfc_hba *); | |
73d91e50 | 679 | int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *); |
da0436e9 | 680 | int lpfc_sli4_hba_setup(struct lpfc_hba *); |
da0436e9 JS |
681 | int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t, |
682 | uint8_t, uint32_t, bool); | |
683 | void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *); | |
684 | void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t); | |
685 | void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t, | |
686 | struct lpfc_mbx_sge *); | |
0c9ab6f5 JS |
687 | int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *, |
688 | uint16_t); | |
da0436e9 JS |
689 | |
690 | void lpfc_sli4_hba_reset(struct lpfc_hba *); | |
691 | struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t, | |
692 | uint32_t); | |
693 | void lpfc_sli4_queue_free(struct lpfc_queue *); | |
a2fc4aef | 694 | int lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t); |
2c9c5a00 | 695 | int lpfc_modify_fcp_eq_delay(struct lpfc_hba *, uint32_t); |
a2fc4aef | 696 | int lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *, |
da0436e9 | 697 | struct lpfc_queue *, uint32_t, uint32_t); |
b19a061a JS |
698 | int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *, |
699 | struct lpfc_queue *, uint32_t); | |
a2fc4aef | 700 | int lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *, |
da0436e9 | 701 | struct lpfc_queue *, uint32_t); |
a2fc4aef | 702 | int lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *, |
da0436e9 | 703 | struct lpfc_queue *, struct lpfc_queue *, uint32_t); |
73d91e50 | 704 | void lpfc_rq_adjust_repost(struct lpfc_hba *, struct lpfc_queue *, int); |
a2fc4aef JS |
705 | int lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *); |
706 | int lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *); | |
707 | int lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *); | |
708 | int lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *); | |
709 | int lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *, | |
da0436e9 JS |
710 | struct lpfc_queue *); |
711 | int lpfc_sli4_queue_setup(struct lpfc_hba *); | |
712 | void lpfc_sli4_queue_unset(struct lpfc_hba *); | |
713 | int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t); | |
714 | int lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *); | |
da0436e9 | 715 | uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *); |
f7bc6434 | 716 | void lpfc_sli4_free_xri(struct lpfc_hba *, int); |
da0436e9 | 717 | int lpfc_sli4_post_async_mbox(struct lpfc_hba *); |
da0436e9 JS |
718 | int lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *, struct list_head *, int); |
719 | struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *); | |
720 | struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *); | |
721 | void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); | |
722 | void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); | |
723 | int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *); | |
724 | int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *); | |
725 | int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *); | |
726 | struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *); | |
727 | void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *); | |
728 | int lpfc_sli4_alloc_rpi(struct lpfc_hba *); | |
729 | void lpfc_sli4_free_rpi(struct lpfc_hba *, int); | |
730 | void lpfc_sli4_remove_rpis(struct lpfc_hba *); | |
731 | void lpfc_sli4_async_event_proc(struct lpfc_hba *); | |
ecfd03c6 | 732 | void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *); |
6b5151fd JS |
733 | int lpfc_sli4_resume_rpi(struct lpfc_nodelist *, |
734 | void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *); | |
da0436e9 JS |
735 | void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *); |
736 | void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *); | |
737 | void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *, | |
738 | struct sli4_wcqe_xri_aborted *); | |
739 | void lpfc_sli4_els_xri_aborted(struct lpfc_hba *, | |
740 | struct sli4_wcqe_xri_aborted *); | |
1151e3ec JS |
741 | void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *); |
742 | void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *); | |
da0436e9 JS |
743 | int lpfc_sli4_brdreset(struct lpfc_hba *); |
744 | int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *); | |
745 | void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *); | |
746 | int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *); | |
76a95d75 | 747 | int lpfc_sli4_init_vpi(struct lpfc_vport *); |
da0436e9 JS |
748 | uint32_t lpfc_sli4_cq_release(struct lpfc_queue *, bool); |
749 | uint32_t lpfc_sli4_eq_release(struct lpfc_queue *, bool); | |
750 | void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t); | |
0c9ab6f5 JS |
751 | int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t); |
752 | int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t); | |
753 | int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t); | |
754 | void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); | |
755 | void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); | |
756 | void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); | |
757 | int lpfc_sli4_unregister_fcf(struct lpfc_hba *); | |
da0436e9 | 758 | int lpfc_sli4_post_status_check(struct lpfc_hba *); |
a183a15f JS |
759 | uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *); |
760 | uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *); |