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[SCSI] pm80xx: WWN Modification for PM8081/88/89 controllers
[deliverable/linux.git] / drivers / scsi / pm8001 / pm8001_sas.h
CommitLineData
dbf9bfe6 1/*
f5860992 2 * PMC-Sierra PM8001/8081/8088/8089 SAS/SATA based host adapters driver
dbf9bfe6 3 *
4 * Copyright (c) 2008-2009 USI Co., Ltd.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 * substantially similar to the "NO WARRANTY" disclaimer below
15 * ("Disclaimer") and any redistribution must be conditioned upon
16 * including a substantially similar Disclaimer requirement for further
17 * binary redistribution.
18 * 3. Neither the names of the above-listed copyright holders nor the names
19 * of any contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * Alternatively, this software may be distributed under the terms of the
23 * GNU General Public License ("GPL") version 2 as published by the Free
24 * Software Foundation.
25 *
26 * NO WARRANTY
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
35 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
36 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGES.
38 *
39 */
40
41#ifndef _PM8001_SAS_H_
42#define _PM8001_SAS_H_
43
44#include <linux/kernel.h>
45#include <linux/module.h>
46#include <linux/spinlock.h>
47#include <linux/delay.h>
48#include <linux/types.h>
49#include <linux/ctype.h>
50#include <linux/dma-mapping.h>
51#include <linux/pci.h>
52#include <linux/interrupt.h>
429305e4 53#include <linux/workqueue.h>
dbf9bfe6 54#include <scsi/libsas.h>
55#include <scsi/scsi_tcq.h>
56#include <scsi/sas_ata.h>
60063497 57#include <linux/atomic.h>
dbf9bfe6 58#include "pm8001_defs.h"
59
a70b8fc3
S		 60#define DRV_NAME "pm80xx"
61#define DRV_VERSION "0.1.37"
83e73329 62#define PM8001_FAIL_LOGGING 0x01 /* Error message logging */
dbf9bfe6 63#define PM8001_INIT_LOGGING 0x02 /* driver init logging */
64#define PM8001_DISC_LOGGING 0x04 /* discovery layer logging */
65#define PM8001_IO_LOGGING 0x08 /* I/O path logging */
83e73329 66#define PM8001_EH_LOGGING 0x10 /* libsas EH function logging*/
dbf9bfe6 67#define PM8001_IOCTL_LOGGING 0x20 /* IOCTL message logging */
68#define PM8001_MSG_LOGGING 0x40 /* misc message logging */
a70b8fc3
S		 69#define pm8001_printk(format, arg...) printk(KERN_INFO "pm80xx %s %d:" \
70 format, __func__, __LINE__, ## arg)
dbf9bfe6 71#define PM8001_CHECK_LOGGING(HBA, LEVEL, CMD) \
72do { \
73 if (unlikely(HBA->logging_level & LEVEL)) \
74 do { \
75 CMD; \
76 } while (0); \
77} while (0);
78
79#define PM8001_EH_DBG(HBA, CMD) \
80 PM8001_CHECK_LOGGING(HBA, PM8001_EH_LOGGING, CMD)
81
82#define PM8001_INIT_DBG(HBA, CMD) \
83 PM8001_CHECK_LOGGING(HBA, PM8001_INIT_LOGGING, CMD)
84
85#define PM8001_DISC_DBG(HBA, CMD) \
86 PM8001_CHECK_LOGGING(HBA, PM8001_DISC_LOGGING, CMD)
87
88#define PM8001_IO_DBG(HBA, CMD) \
89 PM8001_CHECK_LOGGING(HBA, PM8001_IO_LOGGING, CMD)
90
91#define PM8001_FAIL_DBG(HBA, CMD) \
92 PM8001_CHECK_LOGGING(HBA, PM8001_FAIL_LOGGING, CMD)
93
94#define PM8001_IOCTL_DBG(HBA, CMD) \
95 PM8001_CHECK_LOGGING(HBA, PM8001_IOCTL_LOGGING, CMD)
96
97#define PM8001_MSG_DBG(HBA, CMD) \
98 PM8001_CHECK_LOGGING(HBA, PM8001_MSG_LOGGING, CMD)
99
100
101#define PM8001_USE_TASKLET
102#define PM8001_USE_MSIX
7c8356d9 103#define PM8001_READ_VPD
dbf9bfe6 104
105
106#define DEV_IS_EXPANDER(type) ((type == EDGE_DEV) || (type == FANOUT_DEV))
107
108#define PM8001_NAME_LENGTH 32/* generic length of strings */
109extern struct list_head hba_list;
110extern const struct pm8001_dispatch pm8001_8001_dispatch;
f5860992 111extern const struct pm8001_dispatch pm8001_80xx_dispatch;
dbf9bfe6 112
113struct pm8001_hba_info;
114struct pm8001_ccb_info;
115struct pm8001_device;
7c8356d9 116/* define task management IU */
117struct pm8001_tmf_task {
118 u8 tmf;
119 u32 tag_of_task_to_be_managed;
120};
121struct pm8001_ioctl_payload {
122 u32 signature;
123 u16 major_function;
124 u16 minor_function;
125 u16 length;
126 u16 status;
127 u16 offset;
128 u16 id;
129 u8 *func_specific;
130};
131
dbf9bfe6 132struct pm8001_dispatch {
133 char *name;
134 int (*chip_init)(struct pm8001_hba_info *pm8001_ha);
f5860992 135 int (*chip_soft_rst)(struct pm8001_hba_info *pm8001_ha);
dbf9bfe6 136 void (*chip_rst)(struct pm8001_hba_info *pm8001_ha);
137 int (*chip_ioremap)(struct pm8001_hba_info *pm8001_ha);
138 void (*chip_iounmap)(struct pm8001_hba_info *pm8001_ha);
f74cf271 139 irqreturn_t (*isr)(struct pm8001_hba_info *pm8001_ha, u8 vec);
dbf9bfe6 140 u32 (*is_our_interupt)(struct pm8001_hba_info *pm8001_ha);
f74cf271
S		 141 int (*isr_process_oq)(struct pm8001_hba_info *pm8001_ha, u8 vec);
142 void (*interrupt_enable)(struct pm8001_hba_info *pm8001_ha, u8 vec);
143 void (*interrupt_disable)(struct pm8001_hba_info *pm8001_ha, u8 vec);
dbf9bfe6 144 void (*make_prd)(struct scatterlist *scatter, int nr, void *prd);
145 int (*smp_req)(struct pm8001_hba_info *pm8001_ha,
146 struct pm8001_ccb_info *ccb);
147 int (*ssp_io_req)(struct pm8001_hba_info *pm8001_ha,
148 struct pm8001_ccb_info *ccb);
149 int (*sata_req)(struct pm8001_hba_info *pm8001_ha,
150 struct pm8001_ccb_info *ccb);
151 int (*phy_start_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
152 int (*phy_stop_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
153 int (*reg_dev_req)(struct pm8001_hba_info *pm8001_ha,
154 struct pm8001_device *pm8001_dev, u32 flag);
155 int (*dereg_dev_req)(struct pm8001_hba_info *pm8001_ha, u32 device_id);
156 int (*phy_ctl_req)(struct pm8001_hba_info *pm8001_ha,
157 u32 phy_id, u32 phy_op);
158 int (*task_abort)(struct pm8001_hba_info *pm8001_ha,
159 struct pm8001_device *pm8001_dev, u8 flag, u32 task_tag,
160 u32 cmd_tag);
161 int (*ssp_tm_req)(struct pm8001_hba_info *pm8001_ha,
162 struct pm8001_ccb_info *ccb, struct pm8001_tmf_task *tmf);
163 int (*get_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
164 int (*set_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
165 int (*fw_flash_update_req)(struct pm8001_hba_info *pm8001_ha,
166 void *payload);
167 int (*set_dev_state_req)(struct pm8001_hba_info *pm8001_ha,
168 struct pm8001_device *pm8001_dev, u32 state);
169 int (*sas_diag_start_end_req)(struct pm8001_hba_info *pm8001_ha,
170 u32 state);
171 int (*sas_diag_execute_req)(struct pm8001_hba_info *pm8001_ha,
172 u32 state);
d0b68041 173 int (*sas_re_init_req)(struct pm8001_hba_info *pm8001_ha);
dbf9bfe6 174};
175
176struct pm8001_chip_info {
e5742101 177 u32 encrypt;
dbf9bfe6 178 u32 n_phy;
179 const struct pm8001_dispatch *dispatch;
180};
181#define PM8001_CHIP_DISP (pm8001_ha->chip->dispatch)
182
183struct pm8001_port {
184 struct asd_sas_port sas_port;
1cc943ae 185 u8 port_attached;
186 u8 wide_port_phymap;
187 u8 port_state;
188 struct list_head list;
dbf9bfe6 189};
190
191struct pm8001_phy {
192 struct pm8001_hba_info *pm8001_ha;
193 struct pm8001_port *port;
194 struct asd_sas_phy sas_phy;
195 struct sas_identify identify;
196 struct scsi_device *sdev;
197 u64 dev_sas_addr;
198 u32 phy_type;
199 struct completion *enable_completion;
200 u32 frame_rcvd_size;
201 u8 frame_rcvd[32];
202 u8 phy_attached;
203 u8 phy_state;
204 enum sas_linkrate minimum_linkrate;
205 enum sas_linkrate maximum_linkrate;
206};
207
208struct pm8001_device {
209 enum sas_dev_type dev_type;
210 struct domain_device *sas_device;
211 u32 attached_phy;
212 u32 id;
213 struct completion *dcompletion;
214 struct completion *setds_completion;
215 u32 device_id;
216 u32 running_req;
217};
218
219struct pm8001_prd_imt {
220 __le32 len;
221 __le32 e;
222};
223
224struct pm8001_prd {
225 __le64 addr; /* 64-bit buffer address */
226 struct pm8001_prd_imt im_len; /* 64-bit length */
227} __attribute__ ((packed));
228/*
229 * CCB(Command Control Block)
230 */
231struct pm8001_ccb_info {
232 struct list_head entry;
233 struct sas_task *task;
234 u32 n_elem;
235 u32 ccb_tag;
236 dma_addr_t ccb_dma_handle;
237 struct pm8001_device *device;
238 struct pm8001_prd buf_prd[PM8001_MAX_DMA_SG];
239 struct fw_control_ex *fw_control_context;
5954d738 240 u8 open_retry;
dbf9bfe6 241};
242
243struct mpi_mem {
244 void *virt_ptr;
245 dma_addr_t phys_addr;
246 u32 phys_addr_hi;
247 u32 phys_addr_lo;
248 u32 total_len;
249 u32 num_elements;
250 u32 element_size;
251 u32 alignment;
252};
253
254struct mpi_mem_req {
255 /* The number of element in the mpiMemory array */
256 u32 count;
257 /* The array of structures that define memroy regions*/
258 struct mpi_mem region[USI_MAX_MEMCNT];
259};
260
e5742101
S		 261struct encrypt {
262 u32 cipher_mode;
263 u32 sec_mode;
264 u32 status;
265 u32 flag;
266};
267
268struct sas_phy_attribute_table {
269 u32 phystart1_16[16];
270 u32 outbound_hw_event_pid1_16[16];
271};
272
273union main_cfg_table {
274 struct {
dbf9bfe6 275 u32 signature;
276 u32 interface_rev;
277 u32 firmware_rev;
278 u32 max_out_io;
279 u32 max_sgl;
280 u32 ctrl_cap_flag;
281 u32 gst_offset;
282 u32 inbound_queue_offset;
283 u32 outbound_queue_offset;
284 u32 inbound_q_nppd_hppd;
285 u32 outbound_hw_event_pid0_3;
286 u32 outbound_hw_event_pid4_7;
287 u32 outbound_ncq_event_pid0_3;
288 u32 outbound_ncq_event_pid4_7;
289 u32 outbound_tgt_ITNexus_event_pid0_3;
290 u32 outbound_tgt_ITNexus_event_pid4_7;
291 u32 outbound_tgt_ssp_event_pid0_3;
292 u32 outbound_tgt_ssp_event_pid4_7;
293 u32 outbound_tgt_smp_event_pid0_3;
294 u32 outbound_tgt_smp_event_pid4_7;
295 u32 upper_event_log_addr;
296 u32 lower_event_log_addr;
297 u32 event_log_size;
298 u32 event_log_option;
299 u32 upper_iop_event_log_addr;
300 u32 lower_iop_event_log_addr;
301 u32 iop_event_log_size;
302 u32 iop_event_log_option;
303 u32 fatal_err_interrupt;
304 u32 fatal_err_dump_offset0;
305 u32 fatal_err_dump_length0;
306 u32 fatal_err_dump_offset1;
307 u32 fatal_err_dump_length1;
308 u32 hda_mode_flag;
309 u32 anolog_setup_table_offset;
e5742101
S		 310 u32 rsvd[4];
311 } pm8001_tbl;
312
313 struct {
314 u32 signature;
315 u32 interface_rev;
316 u32 firmware_rev;
317 u32 max_out_io;
318 u32 max_sgl;
319 u32 ctrl_cap_flag;
320 u32 gst_offset;
321 u32 inbound_queue_offset;
322 u32 outbound_queue_offset;
323 u32 inbound_q_nppd_hppd;
324 u32 rsvd[10];
325 u32 upper_event_log_addr;
326 u32 lower_event_log_addr;
327 u32 event_log_size;
328 u32 event_log_severity;
329 u32 upper_pcs_event_log_addr;
330 u32 lower_pcs_event_log_addr;
331 u32 pcs_event_log_size;
332 u32 pcs_event_log_severity;
333 u32 fatal_err_interrupt;
334 u32 fatal_err_dump_offset0;
335 u32 fatal_err_dump_length0;
336 u32 fatal_err_dump_offset1;
337 u32 fatal_err_dump_length1;
338 u32 gpio_led_mapping;
339 u32 analog_setup_table_offset;
340 u32 int_vec_table_offset;
341 u32 phy_attr_table_offset;
342 u32 port_recovery_timer;
343 u32 interrupt_reassertion_delay;
344 } pm80xx_tbl;
dbf9bfe6 345};
e5742101
S		 346
347union general_status_table {
348 struct {
dbf9bfe6 349 u32 gst_len_mpistate;
350 u32 iq_freeze_state0;
351 u32 iq_freeze_state1;
352 u32 msgu_tcnt;
353 u32 iop_tcnt;
e5742101 354 u32 rsvd;
dbf9bfe6 355 u32 phy_state[8];
e5742101
S		 356 u32 gpio_input_val;
357 u32 rsvd1[2];
358 u32 recover_err_info[8];
359 } pm8001_tbl;
360 struct {
361 u32 gst_len_mpistate;
362 u32 iq_freeze_state0;
363 u32 iq_freeze_state1;
364 u32 msgu_tcnt;
365 u32 iop_tcnt;
366 u32 rsvd[9];
367 u32 gpio_input_val;
368 u32 rsvd1[2];
dbf9bfe6 369 u32 recover_err_info[8];
e5742101 370 } pm80xx_tbl;
dbf9bfe6 371};
372struct inbound_queue_table {
373 u32 element_pri_size_cnt;
374 u32 upper_base_addr;
375 u32 lower_base_addr;
376 u32 ci_upper_base_addr;
377 u32 ci_lower_base_addr;
378 u32 pi_pci_bar;
379 u32 pi_offset;
380 u32 total_length;
381 void *base_virt;
382 void *ci_virt;
383 u32 reserved;
384 __le32 consumer_index;
385 u32 producer_idx;
386};
387struct outbound_queue_table {
388 u32 element_size_cnt;
389 u32 upper_base_addr;
390 u32 lower_base_addr;
391 void *base_virt;
392 u32 pi_upper_base_addr;
393 u32 pi_lower_base_addr;
394 u32 ci_pci_bar;
395 u32 ci_offset;
396 u32 total_length;
397 void *pi_virt;
398 u32 interrup_vec_cnt_delay;
399 u32 dinterrup_to_pci_offset;
400 __le32 producer_index;
401 u32 consumer_idx;
402};
403struct pm8001_hba_memspace {
404 void __iomem *memvirtaddr;
405 u64 membase;
406 u32 memsize;
407};
408struct pm8001_hba_info {
409 char name[PM8001_NAME_LENGTH];
410 struct list_head list;
411 unsigned long flags;
412 spinlock_t lock;/* host-wide lock */
413 struct pci_dev *pdev;/* our device */
414 struct device *dev;
415 struct pm8001_hba_memspace io_mem[6];
416 struct mpi_mem_req memoryMap;
e5742101 417 struct encrypt encrypt_info; /* support encryption */
dbf9bfe6 418 void __iomem *msg_unit_tbl_addr;/*Message Unit Table Addr*/
419 void __iomem *main_cfg_tbl_addr;/*Main Config Table Addr*/
420 void __iomem *general_stat_tbl_addr;/*General Status Table Addr*/
421 void __iomem *inbnd_q_tbl_addr;/*Inbound Queue Config Table Addr*/
422 void __iomem *outbnd_q_tbl_addr;/*Outbound Queue Config Table Addr*/
e5742101
S		 423 void __iomem *pspa_q_tbl_addr;
424 /*MPI SAS PHY attributes Queue Config Table Addr*/
425 void __iomem *ivt_tbl_addr; /*MPI IVT Table Addr */
426 union main_cfg_table main_cfg_tbl;
427 union general_status_table gs_tbl;
428 struct inbound_queue_table inbnd_q_tbl[PM8001_MAX_SPCV_INB_NUM];
429 struct outbound_queue_table outbnd_q_tbl[PM8001_MAX_SPCV_OUTB_NUM];
430 struct sas_phy_attribute_table phy_attr_table;
431 /* MPI SAS PHY attributes */
dbf9bfe6 432 u8 sas_addr[SAS_ADDR_SIZE];
433 struct sas_ha_struct *sas;/* SCSI/SAS glue */
434 struct Scsi_Host *shost;
435 u32 chip_id;
436 const struct pm8001_chip_info *chip;
437 struct completion *nvmd_completion;
438 int tags_num;
439 unsigned long *tags;
440 struct pm8001_phy phy[PM8001_MAX_PHYS];
441 struct pm8001_port port[PM8001_MAX_PHYS];
442 u32 id;
443 u32 irq;
e5742101 444 u32 iomb_size; /* SPC and SPCV IOMB size */
dbf9bfe6 445 struct pm8001_device *devices;
446 struct pm8001_ccb_info *ccb_info;
447#ifdef PM8001_USE_MSIX
e5742101
S		 448 struct msix_entry msix_entries[PM8001_MAX_MSIX_VEC];
449 /*for msi-x interrupt*/
dbf9bfe6 450 int number_of_intr;/*will be used in remove()*/
451#endif
452#ifdef PM8001_USE_TASKLET
453 struct tasklet_struct tasklet;
454#endif
dbf9bfe6 455 u32 logging_level;
456 u32 fw_status;
f5860992 457 u32 smp_exp_mode;
1245ee59 458 u32 int_vector;
dbf9bfe6 459 const struct firmware *fw_image;
1245ee59 460 u8 outq[PM8001_MAX_MSIX_VEC];
dbf9bfe6 461};
462
429305e4
TH		 463struct pm8001_work {
464 struct work_struct work;
dbf9bfe6 465 struct pm8001_hba_info *pm8001_ha;
466 void *data;
467 int handler;
dbf9bfe6 468};
469
470struct pm8001_fw_image_header {
471 u8 vender_id[8];
472 u8 product_id;
473 u8 hardware_rev;
474 u8 dest_partition;
475 u8 reserved;
476 u8 fw_rev[4];
477 __be32 image_length;
478 __be32 image_crc;
479 __be32 startup_entry;
480} __attribute__((packed, aligned(4)));
481
7c8356d9 482
dbf9bfe6 483/**
484 * FW Flash Update status values
485 */
486#define FLASH_UPDATE_COMPLETE_PENDING_REBOOT 0x00
487#define FLASH_UPDATE_IN_PROGRESS 0x01
488#define FLASH_UPDATE_HDR_ERR 0x02
489#define FLASH_UPDATE_OFFSET_ERR 0x03
490#define FLASH_UPDATE_CRC_ERR 0x04
491#define FLASH_UPDATE_LENGTH_ERR 0x05
492#define FLASH_UPDATE_HW_ERR 0x06
493#define FLASH_UPDATE_DNLD_NOT_SUPPORTED 0x10
494#define FLASH_UPDATE_DISABLED 0x11
495
496/**
497 * brief param structure for firmware flash update.
498 */
499struct fw_flash_updata_info {
500 u32 cur_image_offset;
501 u32 cur_image_len;
502 u32 total_image_len;
503 struct pm8001_prd sgl;
504};
505
506struct fw_control_info {
507 u32 retcode;/*ret code (status)*/
508 u32 phase;/*ret code phase*/
509 u32 phaseCmplt;/*percent complete for the current
510 update phase */
511 u32 version;/*Hex encoded firmware version number*/
512 u32 offset;/*Used for downloading firmware */
513 u32 len; /*len of buffer*/
514 u32 size;/* Used in OS VPD and Trace get size
515 operations.*/
516 u32 reserved;/* padding required for 64 bit
517 alignment */
518 u8 buffer[1];/* Start of buffer */
519};
520struct fw_control_ex {
521 struct fw_control_info *fw_control;
522 void *buffer;/* keep buffer pointer to be
25985edc 523 freed when the response comes*/
dbf9bfe6 524 void *virtAddr;/* keep virtual address of the data */
525 void *usrAddr;/* keep virtual address of the
526 user data */
527 dma_addr_t phys_addr;
528 u32 len; /* len of buffer */
529 void *payload; /* pointer to IOCTL Payload */
530 u8 inProgress;/*if 1 - the IOCTL request is in
531 progress */
532 void *param1;
533 void *param2;
534 void *param3;
535};
536
429305e4
TH		 537/* pm8001 workqueue */
538extern struct workqueue_struct *pm8001_wq;
539
dbf9bfe6 540/******************** function prototype *********************/
541int pm8001_tag_alloc(struct pm8001_hba_info *pm8001_ha, u32 *tag_out);
542void pm8001_tag_init(struct pm8001_hba_info *pm8001_ha);
543u32 pm8001_get_ncq_tag(struct sas_task *task, u32 *tag);
544void pm8001_ccb_free(struct pm8001_hba_info *pm8001_ha, u32 ccb_idx);
545void pm8001_ccb_task_free(struct pm8001_hba_info *pm8001_ha,
546 struct sas_task *task, struct pm8001_ccb_info *ccb, u32 ccb_idx);
547int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
548 void *funcdata);
dbf9bfe6 549void pm8001_scan_start(struct Scsi_Host *shost);
550int pm8001_scan_finished(struct Scsi_Host *shost, unsigned long time);
551int pm8001_queue_command(struct sas_task *task, const int num,
552 gfp_t gfp_flags);
553int pm8001_abort_task(struct sas_task *task);
554int pm8001_abort_task_set(struct domain_device *dev, u8 *lun);
555int pm8001_clear_aca(struct domain_device *dev, u8 *lun);
556int pm8001_clear_task_set(struct domain_device *dev, u8 *lun);
557int pm8001_dev_found(struct domain_device *dev);
558void pm8001_dev_gone(struct domain_device *dev);
559int pm8001_lu_reset(struct domain_device *dev, u8 *lun);
560int pm8001_I_T_nexus_reset(struct domain_device *dev);
561int pm8001_query_task(struct sas_task *task);
5954d738
MS		 562void pm8001_open_reject_retry(
563 struct pm8001_hba_info *pm8001_ha,
564 struct sas_task *task_to_close,
565 struct pm8001_device *device_to_close);
dbf9bfe6 566int pm8001_mem_alloc(struct pci_dev *pdev, void **virt_addr,
567 dma_addr_t *pphys_addr, u32 *pphys_addr_hi, u32 *pphys_addr_lo,
568 u32 mem_size, u32 align);
569
f74cf271
S		 570/********** functions common to spc & spcv - begins ************/
571void pm8001_chip_iounmap(struct pm8001_hba_info *pm8001_ha);
572int pm8001_mpi_build_cmd(struct pm8001_hba_info *pm8001_ha,
573 struct inbound_queue_table *circularQ,
574 u32 opCode, void *payload, u32 responseQueue);
575int pm8001_mpi_msg_free_get(struct inbound_queue_table *circularQ,
576 u16 messageSize, void **messagePtr);
577u32 pm8001_mpi_msg_free_set(struct pm8001_hba_info *pm8001_ha, void *pMsg,
578 struct outbound_queue_table *circularQ, u8 bc);
579u32 pm8001_mpi_msg_consume(struct pm8001_hba_info *pm8001_ha,
580 struct outbound_queue_table *circularQ,
581 void **messagePtr1, u8 *pBC);
582int pm8001_chip_set_dev_state_req(struct pm8001_hba_info *pm8001_ha,
583 struct pm8001_device *pm8001_dev, u32 state);
584int pm8001_chip_fw_flash_update_req(struct pm8001_hba_info *pm8001_ha,
585 void *payload);
586int pm8001_chip_fw_flash_update_build(struct pm8001_hba_info *pm8001_ha,
587 void *fw_flash_updata_info, u32 tag);
588int pm8001_chip_set_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload);
589int pm8001_chip_get_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload);
590int pm8001_chip_ssp_tm_req(struct pm8001_hba_info *pm8001_ha,
591 struct pm8001_ccb_info *ccb,
592 struct pm8001_tmf_task *tmf);
593int pm8001_chip_abort_task(struct pm8001_hba_info *pm8001_ha,
594 struct pm8001_device *pm8001_dev,
595 u8 flag, u32 task_tag, u32 cmd_tag);
596int pm8001_chip_dereg_dev_req(struct pm8001_hba_info *pm8001_ha, u32 device_id);
597void pm8001_chip_make_sg(struct scatterlist *scatter, int nr, void *prd);
598void pm8001_work_fn(struct work_struct *work);
599int pm8001_handle_event(struct pm8001_hba_info *pm8001_ha,
600 void *data, int handler);
601void pm8001_mpi_set_dev_state_resp(struct pm8001_hba_info *pm8001_ha,
602 void *piomb);
603void pm8001_mpi_set_nvmd_resp(struct pm8001_hba_info *pm8001_ha,
604 void *piomb);
605void pm8001_mpi_get_nvmd_resp(struct pm8001_hba_info *pm8001_ha,
606 void *piomb);
607int pm8001_mpi_local_phy_ctl(struct pm8001_hba_info *pm8001_ha,
608 void *piomb);
609void pm8001_get_lrate_mode(struct pm8001_phy *phy, u8 link_rate);
610void pm8001_get_attached_sas_addr(struct pm8001_phy *phy, u8 *sas_addr);
611void pm8001_bytes_dmaed(struct pm8001_hba_info *pm8001_ha, int i);
612int pm8001_mpi_reg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
613int pm8001_mpi_dereg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
614int pm8001_mpi_fw_flash_update_resp(struct pm8001_hba_info *pm8001_ha,
615 void *piomb);
616int pm8001_mpi_general_event(struct pm8001_hba_info *pm8001_ha , void *piomb);
617int pm8001_mpi_task_abort_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
618/*********** functions common to spc & spcv - ends ************/
619
d95d0001 620int pm8001_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue);
dbf9bfe6 621
622/* ctl shared API */
623extern struct device_attribute *pm8001_host_attrs[];
624
625#endif
626
Linux kernel - Deliverables
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