Commit | Line | Data |
---|---|---|
89a36810 AR |
1 | /* |
2 | * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters | |
3 | * | |
729c8456 AR |
4 | * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com> |
5 | * PMC-Sierra Inc | |
89a36810 AR |
6 | * |
7 | * Copyright (C) 2008, 2009 PMC Sierra Inc | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, | |
22 | * USA | |
23 | * | |
24 | */ | |
25 | #include <linux/fs.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/types.h> | |
28 | #include <linux/errno.h> | |
29 | #include <linux/kernel.h> | |
30 | #include <linux/ioport.h> | |
31 | #include <linux/delay.h> | |
32 | #include <linux/pci.h> | |
33 | #include <linux/wait.h> | |
34 | #include <linux/spinlock.h> | |
35 | #include <linux/sched.h> | |
36 | #include <linux/interrupt.h> | |
37 | #include <linux/blkdev.h> | |
38 | #include <linux/firmware.h> | |
39 | #include <linux/module.h> | |
40 | #include <linux/moduleparam.h> | |
41 | #include <linux/hdreg.h> | |
89a36810 | 42 | #include <linux/io.h> |
5a0e3ad6 | 43 | #include <linux/slab.h> |
89a36810 AR |
44 | #include <asm/irq.h> |
45 | #include <asm/processor.h> | |
46 | #include <linux/libata.h> | |
47 | #include <linux/mutex.h> | |
48 | #include <scsi/scsi.h> | |
49 | #include <scsi/scsi_host.h> | |
34876402 | 50 | #include <scsi/scsi_device.h> |
89a36810 AR |
51 | #include <scsi/scsi_tcq.h> |
52 | #include <scsi/scsi_eh.h> | |
53 | #include <scsi/scsi_cmnd.h> | |
54 | #include <scsi/scsicam.h> | |
55 | ||
56 | #include "pmcraid.h" | |
57 | ||
58 | /* | |
59 | * Module configuration parameters | |
60 | */ | |
61 | static unsigned int pmcraid_debug_log; | |
62 | static unsigned int pmcraid_disable_aen; | |
63 | static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST; | |
5da61410 | 64 | static unsigned int pmcraid_enable_msix; |
89a36810 AR |
65 | |
66 | /* | |
67 | * Data structures to support multiple adapters by the LLD. | |
68 | * pmcraid_adapter_count - count of configured adapters | |
69 | */ | |
70 | static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0); | |
71 | ||
72 | /* | |
73 | * Supporting user-level control interface through IOCTL commands. | |
74 | * pmcraid_major - major number to use | |
75 | * pmcraid_minor - minor number(s) to use | |
76 | */ | |
77 | static unsigned int pmcraid_major; | |
78 | static struct class *pmcraid_class; | |
79 | DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS); | |
80 | ||
81 | /* | |
82 | * Module parameters | |
83 | */ | |
729c8456 | 84 | MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>"); |
89a36810 AR |
85 | MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver"); |
86 | MODULE_LICENSE("GPL"); | |
87 | MODULE_VERSION(PMCRAID_DRIVER_VERSION); | |
88 | ||
89 | module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR)); | |
90 | MODULE_PARM_DESC(log_level, | |
91 | "Enables firmware error code logging, default :1 high-severity" | |
92 | " errors, 2: all errors including high-severity errors," | |
93 | " 0: disables logging"); | |
94 | ||
95 | module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR)); | |
96 | MODULE_PARM_DESC(debug, | |
97 | "Enable driver verbose message logging. Set 1 to enable." | |
98 | "(default: 0)"); | |
99 | ||
100 | module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR)); | |
101 | MODULE_PARM_DESC(disable_aen, | |
102 | "Disable driver aen notifications to apps. Set 1 to disable." | |
103 | "(default: 0)"); | |
104 | ||
105 | /* chip specific constants for PMC MaxRAID controllers (same for | |
106 | * 0x5220 and 0x8010 | |
107 | */ | |
108 | static struct pmcraid_chip_details pmcraid_chip_cfg[] = { | |
109 | { | |
110 | .ioastatus = 0x0, | |
111 | .ioarrin = 0x00040, | |
112 | .mailbox = 0x7FC30, | |
113 | .global_intr_mask = 0x00034, | |
114 | .ioa_host_intr = 0x0009C, | |
115 | .ioa_host_intr_clr = 0x000A0, | |
c20c4267 | 116 | .ioa_host_msix_intr = 0x7FC40, |
89a36810 AR |
117 | .ioa_host_mask = 0x7FC28, |
118 | .ioa_host_mask_clr = 0x7FC28, | |
119 | .host_ioa_intr = 0x00020, | |
120 | .host_ioa_intr_clr = 0x00020, | |
121 | .transop_timeout = 300 | |
122 | } | |
123 | }; | |
124 | ||
125 | /* | |
126 | * PCI device ids supported by pmcraid driver | |
127 | */ | |
6f039790 | 128 | static struct pci_device_id pmcraid_pci_table[] = { |
89a36810 AR |
129 | { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID), |
130 | 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0] | |
131 | }, | |
132 | {} | |
133 | }; | |
134 | ||
135 | MODULE_DEVICE_TABLE(pci, pmcraid_pci_table); | |
136 | ||
137 | ||
138 | ||
139 | /** | |
140 | * pmcraid_slave_alloc - Prepare for commands to a device | |
141 | * @scsi_dev: scsi device struct | |
142 | * | |
143 | * This function is called by mid-layer prior to sending any command to the new | |
144 | * device. Stores resource entry details of the device in scsi_device struct. | |
145 | * Queuecommand uses the resource handle and other details to fill up IOARCB | |
146 | * while sending commands to the device. | |
147 | * | |
148 | * Return value: | |
149 | * 0 on success / -ENXIO if device does not exist | |
150 | */ | |
151 | static int pmcraid_slave_alloc(struct scsi_device *scsi_dev) | |
152 | { | |
153 | struct pmcraid_resource_entry *temp, *res = NULL; | |
154 | struct pmcraid_instance *pinstance; | |
155 | u8 target, bus, lun; | |
156 | unsigned long lock_flags; | |
157 | int rc = -ENXIO; | |
c20c4267 AR |
158 | u16 fw_version; |
159 | ||
89a36810 AR |
160 | pinstance = shost_priv(scsi_dev->host); |
161 | ||
c20c4267 AR |
162 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
163 | ||
89a36810 AR |
164 | /* Driver exposes VSET and GSCSI resources only; all other device types |
165 | * are not exposed. Resource list is synchronized using resource lock | |
166 | * so any traversal or modifications to the list should be done inside | |
167 | * this lock | |
168 | */ | |
169 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); | |
170 | list_for_each_entry(temp, &pinstance->used_res_q, queue) { | |
171 | ||
729c8456 | 172 | /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */ |
89a36810 | 173 | if (RES_IS_VSET(temp->cfg_entry)) { |
c20c4267 AR |
174 | if (fw_version <= PMCRAID_FW_VERSION_1) |
175 | target = temp->cfg_entry.unique_flags1; | |
176 | else | |
177 | target = temp->cfg_entry.array_id & 0xFF; | |
178 | ||
729c8456 | 179 | if (target > PMCRAID_MAX_VSET_TARGETS) |
89a36810 AR |
180 | continue; |
181 | bus = PMCRAID_VSET_BUS_ID; | |
182 | lun = 0; | |
183 | } else if (RES_IS_GSCSI(temp->cfg_entry)) { | |
184 | target = RES_TARGET(temp->cfg_entry.resource_address); | |
185 | bus = PMCRAID_PHYS_BUS_ID; | |
186 | lun = RES_LUN(temp->cfg_entry.resource_address); | |
187 | } else { | |
188 | continue; | |
189 | } | |
190 | ||
191 | if (bus == scsi_dev->channel && | |
192 | target == scsi_dev->id && | |
193 | lun == scsi_dev->lun) { | |
194 | res = temp; | |
195 | break; | |
196 | } | |
197 | } | |
198 | ||
199 | if (res) { | |
200 | res->scsi_dev = scsi_dev; | |
201 | scsi_dev->hostdata = res; | |
202 | res->change_detected = 0; | |
203 | atomic_set(&res->read_failures, 0); | |
204 | atomic_set(&res->write_failures, 0); | |
205 | rc = 0; | |
206 | } | |
207 | spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); | |
208 | return rc; | |
209 | } | |
210 | ||
211 | /** | |
212 | * pmcraid_slave_configure - Configures a SCSI device | |
213 | * @scsi_dev: scsi device struct | |
214 | * | |
25985edc | 215 | * This function is executed by SCSI mid layer just after a device is first |
89a36810 AR |
216 | * scanned (i.e. it has responded to an INQUIRY). For VSET resources, the |
217 | * timeout value (default 30s) will be over-written to a higher value (60s) | |
218 | * and max_sectors value will be over-written to 512. It also sets queue depth | |
219 | * to host->cmd_per_lun value | |
220 | * | |
221 | * Return value: | |
222 | * 0 on success | |
223 | */ | |
224 | static int pmcraid_slave_configure(struct scsi_device *scsi_dev) | |
225 | { | |
226 | struct pmcraid_resource_entry *res = scsi_dev->hostdata; | |
227 | ||
228 | if (!res) | |
229 | return 0; | |
230 | ||
231 | /* LLD exposes VSETs and Enclosure devices only */ | |
232 | if (RES_IS_GSCSI(res->cfg_entry) && | |
233 | scsi_dev->type != TYPE_ENCLOSURE) | |
234 | return -ENXIO; | |
235 | ||
236 | pmcraid_info("configuring %x:%x:%x:%x\n", | |
237 | scsi_dev->host->unique_id, | |
238 | scsi_dev->channel, | |
239 | scsi_dev->id, | |
9cb78c16 | 240 | (u8)scsi_dev->lun); |
89a36810 AR |
241 | |
242 | if (RES_IS_GSCSI(res->cfg_entry)) { | |
243 | scsi_dev->allow_restart = 1; | |
244 | } else if (RES_IS_VSET(res->cfg_entry)) { | |
245 | scsi_dev->allow_restart = 1; | |
246 | blk_queue_rq_timeout(scsi_dev->request_queue, | |
247 | PMCRAID_VSET_IO_TIMEOUT); | |
086fa5ff | 248 | blk_queue_max_hw_sectors(scsi_dev->request_queue, |
89a36810 AR |
249 | PMCRAID_VSET_MAX_SECTORS); |
250 | } | |
251 | ||
252 | if (scsi_dev->tagged_supported && | |
253 | (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry))) { | |
254 | scsi_activate_tcq(scsi_dev, scsi_dev->queue_depth); | |
255 | scsi_adjust_queue_depth(scsi_dev, MSG_SIMPLE_TAG, | |
256 | scsi_dev->host->cmd_per_lun); | |
257 | } else { | |
258 | scsi_adjust_queue_depth(scsi_dev, 0, | |
259 | scsi_dev->host->cmd_per_lun); | |
260 | } | |
261 | ||
262 | return 0; | |
263 | } | |
264 | ||
265 | /** | |
266 | * pmcraid_slave_destroy - Unconfigure a SCSI device before removing it | |
267 | * | |
268 | * @scsi_dev: scsi device struct | |
269 | * | |
270 | * This is called by mid-layer before removing a device. Pointer assignments | |
271 | * done in pmcraid_slave_alloc will be reset to NULL here. | |
272 | * | |
273 | * Return value | |
274 | * none | |
275 | */ | |
276 | static void pmcraid_slave_destroy(struct scsi_device *scsi_dev) | |
277 | { | |
278 | struct pmcraid_resource_entry *res; | |
279 | ||
280 | res = (struct pmcraid_resource_entry *)scsi_dev->hostdata; | |
281 | ||
282 | if (res) | |
283 | res->scsi_dev = NULL; | |
284 | ||
285 | scsi_dev->hostdata = NULL; | |
286 | } | |
287 | ||
288 | /** | |
289 | * pmcraid_change_queue_depth - Change the device's queue depth | |
290 | * @scsi_dev: scsi device struct | |
291 | * @depth: depth to set | |
e881a172 | 292 | * @reason: calling context |
89a36810 AR |
293 | * |
294 | * Return value | |
c20c4267 | 295 | * actual depth set |
89a36810 | 296 | */ |
e881a172 MC |
297 | static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth, |
298 | int reason) | |
89a36810 | 299 | { |
e881a172 MC |
300 | if (reason != SCSI_QDEPTH_DEFAULT) |
301 | return -EOPNOTSUPP; | |
302 | ||
89a36810 AR |
303 | if (depth > PMCRAID_MAX_CMD_PER_LUN) |
304 | depth = PMCRAID_MAX_CMD_PER_LUN; | |
305 | ||
306 | scsi_adjust_queue_depth(scsi_dev, scsi_get_tag_type(scsi_dev), depth); | |
307 | ||
308 | return scsi_dev->queue_depth; | |
309 | } | |
310 | ||
311 | /** | |
312 | * pmcraid_change_queue_type - Change the device's queue type | |
313 | * @scsi_dev: scsi device struct | |
314 | * @tag: type of tags to use | |
315 | * | |
316 | * Return value: | |
c20c4267 | 317 | * actual queue type set |
89a36810 AR |
318 | */ |
319 | static int pmcraid_change_queue_type(struct scsi_device *scsi_dev, int tag) | |
320 | { | |
321 | struct pmcraid_resource_entry *res; | |
322 | ||
323 | res = (struct pmcraid_resource_entry *)scsi_dev->hostdata; | |
324 | ||
325 | if ((res) && scsi_dev->tagged_supported && | |
326 | (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry))) { | |
327 | scsi_set_tag_type(scsi_dev, tag); | |
328 | ||
329 | if (tag) | |
330 | scsi_activate_tcq(scsi_dev, scsi_dev->queue_depth); | |
331 | else | |
332 | scsi_deactivate_tcq(scsi_dev, scsi_dev->queue_depth); | |
333 | } else | |
334 | tag = 0; | |
335 | ||
336 | return tag; | |
337 | } | |
338 | ||
339 | ||
340 | /** | |
341 | * pmcraid_init_cmdblk - initializes a command block | |
342 | * | |
343 | * @cmd: pointer to struct pmcraid_cmd to be initialized | |
344 | * @index: if >=0 first time initialization; otherwise reinitialization | |
345 | * | |
346 | * Return Value | |
347 | * None | |
348 | */ | |
349 | void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index) | |
350 | { | |
351 | struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb); | |
352 | dma_addr_t dma_addr = cmd->ioa_cb_bus_addr; | |
353 | ||
354 | if (index >= 0) { | |
355 | /* first time initialization (called from probe) */ | |
356 | u32 ioasa_offset = | |
357 | offsetof(struct pmcraid_control_block, ioasa); | |
358 | ||
359 | cmd->index = index; | |
360 | ioarcb->response_handle = cpu_to_le32(index << 2); | |
361 | ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr); | |
362 | ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset); | |
363 | ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa)); | |
364 | } else { | |
365 | /* re-initialization of various lengths, called once command is | |
366 | * processed by IOA | |
367 | */ | |
368 | memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN); | |
c20c4267 | 369 | ioarcb->hrrq_id = 0; |
89a36810 AR |
370 | ioarcb->request_flags0 = 0; |
371 | ioarcb->request_flags1 = 0; | |
372 | ioarcb->cmd_timeout = 0; | |
373 | ioarcb->ioarcb_bus_addr &= (~0x1FULL); | |
374 | ioarcb->ioadl_bus_addr = 0; | |
375 | ioarcb->ioadl_length = 0; | |
376 | ioarcb->data_transfer_length = 0; | |
377 | ioarcb->add_cmd_param_length = 0; | |
378 | ioarcb->add_cmd_param_offset = 0; | |
379 | cmd->ioa_cb->ioasa.ioasc = 0; | |
380 | cmd->ioa_cb->ioasa.residual_data_length = 0; | |
c20c4267 | 381 | cmd->time_left = 0; |
89a36810 AR |
382 | } |
383 | ||
384 | cmd->cmd_done = NULL; | |
385 | cmd->scsi_cmd = NULL; | |
386 | cmd->release = 0; | |
387 | cmd->completion_req = 0; | |
c20c4267 AR |
388 | cmd->sense_buffer = 0; |
389 | cmd->sense_buffer_dma = 0; | |
89a36810 AR |
390 | cmd->dma_handle = 0; |
391 | init_timer(&cmd->timer); | |
392 | } | |
393 | ||
394 | /** | |
395 | * pmcraid_reinit_cmdblk - reinitialize a command block | |
396 | * | |
397 | * @cmd: pointer to struct pmcraid_cmd to be reinitialized | |
398 | * | |
399 | * Return Value | |
400 | * None | |
401 | */ | |
402 | static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd) | |
403 | { | |
404 | pmcraid_init_cmdblk(cmd, -1); | |
405 | } | |
406 | ||
407 | /** | |
408 | * pmcraid_get_free_cmd - get a free cmd block from command block pool | |
409 | * @pinstance: adapter instance structure | |
410 | * | |
411 | * Return Value: | |
412 | * returns pointer to cmd block or NULL if no blocks are available | |
413 | */ | |
414 | static struct pmcraid_cmd *pmcraid_get_free_cmd( | |
415 | struct pmcraid_instance *pinstance | |
416 | ) | |
417 | { | |
418 | struct pmcraid_cmd *cmd = NULL; | |
419 | unsigned long lock_flags; | |
420 | ||
421 | /* free cmd block list is protected by free_pool_lock */ | |
422 | spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags); | |
423 | ||
424 | if (!list_empty(&pinstance->free_cmd_pool)) { | |
425 | cmd = list_entry(pinstance->free_cmd_pool.next, | |
426 | struct pmcraid_cmd, free_list); | |
427 | list_del(&cmd->free_list); | |
428 | } | |
429 | spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags); | |
430 | ||
431 | /* Initialize the command block before giving it the caller */ | |
432 | if (cmd != NULL) | |
433 | pmcraid_reinit_cmdblk(cmd); | |
434 | return cmd; | |
435 | } | |
436 | ||
437 | /** | |
438 | * pmcraid_return_cmd - return a completed command block back into free pool | |
439 | * @cmd: pointer to the command block | |
440 | * | |
441 | * Return Value: | |
442 | * nothing | |
443 | */ | |
444 | void pmcraid_return_cmd(struct pmcraid_cmd *cmd) | |
445 | { | |
446 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
447 | unsigned long lock_flags; | |
448 | ||
449 | spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags); | |
450 | list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool); | |
451 | spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags); | |
452 | } | |
453 | ||
454 | /** | |
455 | * pmcraid_read_interrupts - reads IOA interrupts | |
456 | * | |
457 | * @pinstance: pointer to adapter instance structure | |
458 | * | |
459 | * Return value | |
460 | * interrupts read from IOA | |
461 | */ | |
462 | static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance) | |
463 | { | |
c20c4267 AR |
464 | return (pinstance->interrupt_mode) ? |
465 | ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) : | |
466 | ioread32(pinstance->int_regs.ioa_host_interrupt_reg); | |
89a36810 AR |
467 | } |
468 | ||
469 | /** | |
470 | * pmcraid_disable_interrupts - Masks and clears all specified interrupts | |
471 | * | |
472 | * @pinstance: pointer to per adapter instance structure | |
473 | * @intrs: interrupts to disable | |
474 | * | |
475 | * Return Value | |
476 | * None | |
477 | */ | |
478 | static void pmcraid_disable_interrupts( | |
479 | struct pmcraid_instance *pinstance, | |
480 | u32 intrs | |
481 | ) | |
482 | { | |
483 | u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg); | |
484 | u32 nmask = gmask | GLOBAL_INTERRUPT_MASK; | |
485 | ||
89a36810 | 486 | iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg); |
c20c4267 AR |
487 | iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg); |
488 | ioread32(pinstance->int_regs.global_interrupt_mask_reg); | |
489 | ||
490 | if (!pinstance->interrupt_mode) { | |
491 | iowrite32(intrs, | |
492 | pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
493 | ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
494 | } | |
89a36810 AR |
495 | } |
496 | ||
497 | /** | |
498 | * pmcraid_enable_interrupts - Enables specified interrupts | |
499 | * | |
500 | * @pinstance: pointer to per adapter instance structure | |
501 | * @intr: interrupts to enable | |
502 | * | |
503 | * Return Value | |
504 | * None | |
505 | */ | |
506 | static void pmcraid_enable_interrupts( | |
507 | struct pmcraid_instance *pinstance, | |
508 | u32 intrs | |
509 | ) | |
510 | { | |
511 | u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg); | |
512 | u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK); | |
513 | ||
514 | iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg); | |
c20c4267 AR |
515 | |
516 | if (!pinstance->interrupt_mode) { | |
517 | iowrite32(~intrs, | |
518 | pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
519 | ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
520 | } | |
89a36810 AR |
521 | |
522 | pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n", | |
523 | ioread32(pinstance->int_regs.global_interrupt_mask_reg), | |
524 | ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg)); | |
525 | } | |
526 | ||
c20c4267 AR |
527 | /** |
528 | * pmcraid_clr_trans_op - clear trans to op interrupt | |
529 | * | |
530 | * @pinstance: pointer to per adapter instance structure | |
531 | * | |
532 | * Return Value | |
533 | * None | |
534 | */ | |
535 | static void pmcraid_clr_trans_op( | |
536 | struct pmcraid_instance *pinstance | |
537 | ) | |
538 | { | |
539 | unsigned long lock_flags; | |
540 | ||
541 | if (!pinstance->interrupt_mode) { | |
542 | iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, | |
543 | pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
544 | ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
545 | iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, | |
546 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
547 | ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
548 | } | |
549 | ||
550 | if (pinstance->reset_cmd != NULL) { | |
551 | del_timer(&pinstance->reset_cmd->timer); | |
552 | spin_lock_irqsave( | |
553 | pinstance->host->host_lock, lock_flags); | |
554 | pinstance->reset_cmd->cmd_done(pinstance->reset_cmd); | |
555 | spin_unlock_irqrestore( | |
556 | pinstance->host->host_lock, lock_flags); | |
557 | } | |
558 | } | |
559 | ||
89a36810 AR |
560 | /** |
561 | * pmcraid_reset_type - Determine the required reset type | |
562 | * @pinstance: pointer to adapter instance structure | |
563 | * | |
564 | * IOA requires hard reset if any of the following conditions is true. | |
565 | * 1. If HRRQ valid interrupt is not masked | |
566 | * 2. IOA reset alert doorbell is set | |
567 | * 3. If there are any error interrupts | |
568 | */ | |
569 | static void pmcraid_reset_type(struct pmcraid_instance *pinstance) | |
570 | { | |
571 | u32 mask; | |
572 | u32 intrs; | |
573 | u32 alerts; | |
574 | ||
575 | mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
576 | intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg); | |
577 | alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
578 | ||
579 | if ((mask & INTRS_HRRQ_VALID) == 0 || | |
580 | (alerts & DOORBELL_IOA_RESET_ALERT) || | |
581 | (intrs & PMCRAID_ERROR_INTERRUPTS)) { | |
582 | pmcraid_info("IOA requires hard reset\n"); | |
583 | pinstance->ioa_hard_reset = 1; | |
584 | } | |
585 | ||
586 | /* If unit check is active, trigger the dump */ | |
587 | if (intrs & INTRS_IOA_UNIT_CHECK) | |
588 | pinstance->ioa_unit_check = 1; | |
589 | } | |
590 | ||
591 | /** | |
592 | * pmcraid_bist_done - completion function for PCI BIST | |
593 | * @cmd: pointer to reset command | |
594 | * Return Value | |
c20c4267 | 595 | * none |
89a36810 AR |
596 | */ |
597 | ||
598 | static void pmcraid_ioa_reset(struct pmcraid_cmd *); | |
599 | ||
600 | static void pmcraid_bist_done(struct pmcraid_cmd *cmd) | |
601 | { | |
602 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
603 | unsigned long lock_flags; | |
604 | int rc; | |
605 | u16 pci_reg; | |
606 | ||
607 | rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg); | |
608 | ||
609 | /* If PCI config space can't be accessed wait for another two secs */ | |
610 | if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) && | |
c20c4267 | 611 | cmd->time_left > 0) { |
89a36810 | 612 | pmcraid_info("BIST not complete, waiting another 2 secs\n"); |
c20c4267 AR |
613 | cmd->timer.expires = jiffies + cmd->time_left; |
614 | cmd->time_left = 0; | |
89a36810 AR |
615 | cmd->timer.data = (unsigned long)cmd; |
616 | cmd->timer.function = | |
617 | (void (*)(unsigned long))pmcraid_bist_done; | |
618 | add_timer(&cmd->timer); | |
619 | } else { | |
c20c4267 | 620 | cmd->time_left = 0; |
89a36810 AR |
621 | pmcraid_info("BIST is complete, proceeding with reset\n"); |
622 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
623 | pmcraid_ioa_reset(cmd); | |
624 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
625 | } | |
626 | } | |
627 | ||
628 | /** | |
629 | * pmcraid_start_bist - starts BIST | |
630 | * @cmd: pointer to reset cmd | |
631 | * Return Value | |
632 | * none | |
633 | */ | |
634 | static void pmcraid_start_bist(struct pmcraid_cmd *cmd) | |
635 | { | |
636 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
637 | u32 doorbells, intrs; | |
638 | ||
639 | /* proceed with bist and wait for 2 seconds */ | |
640 | iowrite32(DOORBELL_IOA_START_BIST, | |
641 | pinstance->int_regs.host_ioa_interrupt_reg); | |
642 | doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
643 | intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg); | |
c20c4267 | 644 | pmcraid_info("doorbells after start bist: %x intrs: %x\n", |
89a36810 AR |
645 | doorbells, intrs); |
646 | ||
c20c4267 | 647 | cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT); |
89a36810 AR |
648 | cmd->timer.data = (unsigned long)cmd; |
649 | cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT); | |
650 | cmd->timer.function = (void (*)(unsigned long))pmcraid_bist_done; | |
651 | add_timer(&cmd->timer); | |
652 | } | |
653 | ||
654 | /** | |
655 | * pmcraid_reset_alert_done - completion routine for reset_alert | |
656 | * @cmd: pointer to command block used in reset sequence | |
657 | * Return value | |
658 | * None | |
659 | */ | |
660 | static void pmcraid_reset_alert_done(struct pmcraid_cmd *cmd) | |
661 | { | |
662 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
663 | u32 status = ioread32(pinstance->ioa_status); | |
664 | unsigned long lock_flags; | |
665 | ||
666 | /* if the critical operation in progress bit is set or the wait times | |
667 | * out, invoke reset engine to proceed with hard reset. If there is | |
668 | * some more time to wait, restart the timer | |
669 | */ | |
670 | if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) || | |
c20c4267 | 671 | cmd->time_left <= 0) { |
89a36810 AR |
672 | pmcraid_info("critical op is reset proceeding with reset\n"); |
673 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
674 | pmcraid_ioa_reset(cmd); | |
675 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
676 | } else { | |
677 | pmcraid_info("critical op is not yet reset waiting again\n"); | |
678 | /* restart timer if some more time is available to wait */ | |
c20c4267 | 679 | cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT; |
89a36810 AR |
680 | cmd->timer.data = (unsigned long)cmd; |
681 | cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT; | |
682 | cmd->timer.function = | |
683 | (void (*)(unsigned long))pmcraid_reset_alert_done; | |
684 | add_timer(&cmd->timer); | |
685 | } | |
686 | } | |
687 | ||
688 | /** | |
689 | * pmcraid_reset_alert - alerts IOA for a possible reset | |
690 | * @cmd : command block to be used for reset sequence. | |
691 | * | |
692 | * Return Value | |
693 | * returns 0 if pci config-space is accessible and RESET_DOORBELL is | |
694 | * successfully written to IOA. Returns non-zero in case pci_config_space | |
695 | * is not accessible | |
696 | */ | |
c20c4267 | 697 | static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32); |
89a36810 AR |
698 | static void pmcraid_reset_alert(struct pmcraid_cmd *cmd) |
699 | { | |
700 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
701 | u32 doorbells; | |
702 | int rc; | |
703 | u16 pci_reg; | |
704 | ||
705 | /* If we are able to access IOA PCI config space, alert IOA that we are | |
706 | * going to reset it soon. This enables IOA to preserv persistent error | |
707 | * data if any. In case memory space is not accessible, proceed with | |
708 | * BIST or slot_reset | |
709 | */ | |
710 | rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg); | |
711 | if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) { | |
712 | ||
713 | /* wait for IOA permission i.e until CRITICAL_OPERATION bit is | |
714 | * reset IOA doesn't generate any interrupts when CRITICAL | |
715 | * OPERATION bit is reset. A timer is started to wait for this | |
716 | * bit to be reset. | |
717 | */ | |
c20c4267 | 718 | cmd->time_left = PMCRAID_RESET_TIMEOUT; |
89a36810 AR |
719 | cmd->timer.data = (unsigned long)cmd; |
720 | cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT; | |
721 | cmd->timer.function = | |
722 | (void (*)(unsigned long))pmcraid_reset_alert_done; | |
723 | add_timer(&cmd->timer); | |
724 | ||
725 | iowrite32(DOORBELL_IOA_RESET_ALERT, | |
726 | pinstance->int_regs.host_ioa_interrupt_reg); | |
727 | doorbells = | |
728 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
729 | pmcraid_info("doorbells after reset alert: %x\n", doorbells); | |
730 | } else { | |
731 | pmcraid_info("PCI config is not accessible starting BIST\n"); | |
732 | pinstance->ioa_state = IOA_STATE_IN_HARD_RESET; | |
733 | pmcraid_start_bist(cmd); | |
734 | } | |
735 | } | |
736 | ||
737 | /** | |
738 | * pmcraid_timeout_handler - Timeout handler for internally generated ops | |
739 | * | |
740 | * @cmd : pointer to command structure, that got timedout | |
741 | * | |
742 | * This function blocks host requests and initiates an adapter reset. | |
743 | * | |
744 | * Return value: | |
745 | * None | |
746 | */ | |
747 | static void pmcraid_timeout_handler(struct pmcraid_cmd *cmd) | |
748 | { | |
749 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
750 | unsigned long lock_flags; | |
751 | ||
34876402 | 752 | dev_info(&pinstance->pdev->dev, |
c20c4267 AR |
753 | "Adapter being reset due to cmd(CDB[0] = %x) timeout\n", |
754 | cmd->ioa_cb->ioarcb.cdb[0]); | |
89a36810 AR |
755 | |
756 | /* Command timeouts result in hard reset sequence. The command that got | |
757 | * timed out may be the one used as part of reset sequence. In this | |
758 | * case restart reset sequence using the same command block even if | |
759 | * reset is in progress. Otherwise fail this command and get a free | |
760 | * command block to restart the reset sequence. | |
761 | */ | |
762 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
763 | if (!pinstance->ioa_reset_in_progress) { | |
764 | pinstance->ioa_reset_attempts = 0; | |
765 | cmd = pmcraid_get_free_cmd(pinstance); | |
766 | ||
767 | /* If we are out of command blocks, just return here itself. | |
768 | * Some other command's timeout handler can do the reset job | |
769 | */ | |
770 | if (cmd == NULL) { | |
771 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
772 | lock_flags); | |
773 | pmcraid_err("no free cmnd block for timeout handler\n"); | |
774 | return; | |
775 | } | |
776 | ||
777 | pinstance->reset_cmd = cmd; | |
778 | pinstance->ioa_reset_in_progress = 1; | |
779 | } else { | |
780 | pmcraid_info("reset is already in progress\n"); | |
781 | ||
782 | if (pinstance->reset_cmd != cmd) { | |
783 | /* This command should have been given to IOA, this | |
784 | * command will be completed by fail_outstanding_cmds | |
785 | * anyway | |
786 | */ | |
787 | pmcraid_err("cmd is pending but reset in progress\n"); | |
788 | } | |
789 | ||
790 | /* If this command was being used as part of the reset | |
791 | * sequence, set cmd_done pointer to pmcraid_ioa_reset. This | |
792 | * causes fail_outstanding_commands not to return the command | |
793 | * block back to free pool | |
794 | */ | |
795 | if (cmd == pinstance->reset_cmd) | |
796 | cmd->cmd_done = pmcraid_ioa_reset; | |
89a36810 AR |
797 | } |
798 | ||
c20c4267 AR |
799 | /* Notify apps of important IOA bringup/bringdown sequences */ |
800 | if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START && | |
801 | pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START) | |
802 | pmcraid_notify_ioastate(pinstance, | |
803 | PMC_DEVICE_EVENT_RESET_START); | |
804 | ||
89a36810 AR |
805 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; |
806 | scsi_block_requests(pinstance->host); | |
807 | pmcraid_reset_alert(cmd); | |
808 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
809 | } | |
810 | ||
811 | /** | |
812 | * pmcraid_internal_done - completion routine for internally generated cmds | |
813 | * | |
814 | * @cmd: command that got response from IOA | |
815 | * | |
816 | * Return Value: | |
817 | * none | |
818 | */ | |
819 | static void pmcraid_internal_done(struct pmcraid_cmd *cmd) | |
820 | { | |
821 | pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n", | |
822 | cmd->ioa_cb->ioarcb.cdb[0], | |
823 | le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); | |
824 | ||
825 | /* Some of the internal commands are sent with callers blocking for the | |
826 | * response. Same will be indicated as part of cmd->completion_req | |
827 | * field. Response path needs to wake up any waiters waiting for cmd | |
828 | * completion if this flag is set. | |
829 | */ | |
830 | if (cmd->completion_req) { | |
831 | cmd->completion_req = 0; | |
832 | complete(&cmd->wait_for_completion); | |
833 | } | |
834 | ||
835 | /* most of the internal commands are completed by caller itself, so | |
836 | * no need to return the command block back to free pool until we are | |
837 | * required to do so (e.g once done with initialization). | |
838 | */ | |
839 | if (cmd->release) { | |
840 | cmd->release = 0; | |
841 | pmcraid_return_cmd(cmd); | |
842 | } | |
843 | } | |
844 | ||
845 | /** | |
846 | * pmcraid_reinit_cfgtable_done - done function for cfg table reinitialization | |
847 | * | |
848 | * @cmd: command that got response from IOA | |
849 | * | |
850 | * This routine is called after driver re-reads configuration table due to a | |
851 | * lost CCN. It returns the command block back to free pool and schedules | |
852 | * worker thread to add/delete devices into the system. | |
853 | * | |
854 | * Return Value: | |
855 | * none | |
856 | */ | |
857 | static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd) | |
858 | { | |
859 | pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n", | |
860 | cmd->ioa_cb->ioarcb.cdb[0], | |
861 | le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); | |
862 | ||
863 | if (cmd->release) { | |
864 | cmd->release = 0; | |
865 | pmcraid_return_cmd(cmd); | |
866 | } | |
867 | pmcraid_info("scheduling worker for config table reinitialization\n"); | |
868 | schedule_work(&cmd->drv_inst->worker_q); | |
869 | } | |
870 | ||
871 | /** | |
872 | * pmcraid_erp_done - Process completion of SCSI error response from device | |
873 | * @cmd: pmcraid_command | |
874 | * | |
875 | * This function copies the sense buffer into the scsi_cmd struct and completes | |
876 | * scsi_cmd by calling scsi_done function. | |
877 | * | |
878 | * Return value: | |
879 | * none | |
880 | */ | |
881 | static void pmcraid_erp_done(struct pmcraid_cmd *cmd) | |
882 | { | |
883 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
884 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
885 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
886 | ||
887 | if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) { | |
888 | scsi_cmd->result |= (DID_ERROR << 16); | |
34876402 AR |
889 | scmd_printk(KERN_INFO, scsi_cmd, |
890 | "command CDB[0] = %x failed with IOASC: 0x%08X\n", | |
891 | cmd->ioa_cb->ioarcb.cdb[0], ioasc); | |
89a36810 AR |
892 | } |
893 | ||
894 | /* if we had allocated sense buffers for request sense, copy the sense | |
895 | * release the buffers | |
896 | */ | |
897 | if (cmd->sense_buffer != NULL) { | |
898 | memcpy(scsi_cmd->sense_buffer, | |
899 | cmd->sense_buffer, | |
900 | SCSI_SENSE_BUFFERSIZE); | |
901 | pci_free_consistent(pinstance->pdev, | |
902 | SCSI_SENSE_BUFFERSIZE, | |
903 | cmd->sense_buffer, cmd->sense_buffer_dma); | |
904 | cmd->sense_buffer = NULL; | |
905 | cmd->sense_buffer_dma = 0; | |
906 | } | |
907 | ||
908 | scsi_dma_unmap(scsi_cmd); | |
909 | pmcraid_return_cmd(cmd); | |
910 | scsi_cmd->scsi_done(scsi_cmd); | |
911 | } | |
912 | ||
913 | /** | |
914 | * pmcraid_fire_command - sends an IOA command to adapter | |
915 | * | |
916 | * This function adds the given block into pending command list | |
917 | * and returns without waiting | |
918 | * | |
919 | * @cmd : command to be sent to the device | |
920 | * | |
921 | * Return Value | |
922 | * None | |
923 | */ | |
924 | static void _pmcraid_fire_command(struct pmcraid_cmd *cmd) | |
925 | { | |
926 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
927 | unsigned long lock_flags; | |
928 | ||
929 | /* Add this command block to pending cmd pool. We do this prior to | |
930 | * writting IOARCB to ioarrin because IOA might complete the command | |
931 | * by the time we are about to add it to the list. Response handler | |
c20c4267 | 932 | * (isr/tasklet) looks for cmd block in the pending pending list. |
89a36810 AR |
933 | */ |
934 | spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags); | |
935 | list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool); | |
936 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags); | |
937 | atomic_inc(&pinstance->outstanding_cmds); | |
938 | ||
939 | /* driver writes lower 32-bit value of IOARCB address only */ | |
940 | mb(); | |
941 | iowrite32(le32_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr), | |
942 | pinstance->ioarrin); | |
943 | } | |
944 | ||
945 | /** | |
946 | * pmcraid_send_cmd - fires a command to IOA | |
947 | * | |
948 | * This function also sets up timeout function, and command completion | |
949 | * function | |
950 | * | |
951 | * @cmd: pointer to the command block to be fired to IOA | |
952 | * @cmd_done: command completion function, called once IOA responds | |
953 | * @timeout: timeout to wait for this command completion | |
954 | * @timeout_func: timeout handler | |
955 | * | |
956 | * Return value | |
957 | * none | |
958 | */ | |
959 | static void pmcraid_send_cmd( | |
960 | struct pmcraid_cmd *cmd, | |
961 | void (*cmd_done) (struct pmcraid_cmd *), | |
962 | unsigned long timeout, | |
963 | void (*timeout_func) (struct pmcraid_cmd *) | |
964 | ) | |
965 | { | |
966 | /* initialize done function */ | |
967 | cmd->cmd_done = cmd_done; | |
968 | ||
969 | if (timeout_func) { | |
970 | /* setup timeout handler */ | |
971 | cmd->timer.data = (unsigned long)cmd; | |
972 | cmd->timer.expires = jiffies + timeout; | |
973 | cmd->timer.function = (void (*)(unsigned long))timeout_func; | |
974 | add_timer(&cmd->timer); | |
975 | } | |
976 | ||
977 | /* fire the command to IOA */ | |
978 | _pmcraid_fire_command(cmd); | |
979 | } | |
980 | ||
c20c4267 AR |
981 | /** |
982 | * pmcraid_ioa_shutdown_done - completion function for IOA shutdown command | |
983 | * @cmd: pointer to the command block used for sending IOA shutdown command | |
984 | * | |
985 | * Return value | |
986 | * None | |
987 | */ | |
988 | static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd) | |
989 | { | |
990 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
991 | unsigned long lock_flags; | |
992 | ||
993 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
994 | pmcraid_ioa_reset(cmd); | |
995 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
996 | } | |
997 | ||
89a36810 AR |
998 | /** |
999 | * pmcraid_ioa_shutdown - sends SHUTDOWN command to ioa | |
1000 | * | |
1001 | * @cmd: pointer to the command block used as part of reset sequence | |
1002 | * | |
1003 | * Return Value | |
1004 | * None | |
1005 | */ | |
1006 | static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd) | |
1007 | { | |
1008 | pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n", | |
1009 | cmd->ioa_cb->ioarcb.cdb[0], | |
1010 | le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); | |
1011 | ||
1012 | /* Note that commands sent during reset require next command to be sent | |
1013 | * to IOA. Hence reinit the done function as well as timeout function | |
1014 | */ | |
1015 | pmcraid_reinit_cmdblk(cmd); | |
1016 | cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD; | |
1017 | cmd->ioa_cb->ioarcb.resource_handle = | |
1018 | cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
1019 | cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN; | |
1020 | cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL; | |
1021 | ||
1022 | /* fire shutdown command to hardware. */ | |
1023 | pmcraid_info("firing normal shutdown command (%d) to IOA\n", | |
1024 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle)); | |
1025 | ||
c20c4267 AR |
1026 | pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START); |
1027 | ||
1028 | pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done, | |
89a36810 AR |
1029 | PMCRAID_SHUTDOWN_TIMEOUT, |
1030 | pmcraid_timeout_handler); | |
1031 | } | |
1032 | ||
1033 | /** | |
c20c4267 AR |
1034 | * pmcraid_get_fwversion_done - completion function for get_fwversion |
1035 | * | |
1036 | * @cmd: pointer to command block used to send INQUIRY command | |
89a36810 AR |
1037 | * |
1038 | * Return Value | |
c20c4267 | 1039 | * none |
89a36810 | 1040 | */ |
89a36810 AR |
1041 | static void pmcraid_querycfg(struct pmcraid_cmd *); |
1042 | ||
c20c4267 AR |
1043 | static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd) |
1044 | { | |
1045 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1046 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
1047 | unsigned long lock_flags; | |
1048 | ||
1049 | /* configuration table entry size depends on firmware version. If fw | |
1050 | * version is not known, it is not possible to interpret IOA config | |
1051 | * table | |
1052 | */ | |
1053 | if (ioasc) { | |
1054 | pmcraid_err("IOA Inquiry failed with %x\n", ioasc); | |
1055 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
1056 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; | |
1057 | pmcraid_reset_alert(cmd); | |
1058 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
1059 | } else { | |
1060 | pmcraid_querycfg(cmd); | |
1061 | } | |
1062 | } | |
1063 | ||
1064 | /** | |
1065 | * pmcraid_get_fwversion - reads firmware version information | |
1066 | * | |
1067 | * @cmd: pointer to command block used to send INQUIRY command | |
1068 | * | |
1069 | * Return Value | |
1070 | * none | |
1071 | */ | |
1072 | static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd) | |
1073 | { | |
1074 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
1075 | struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl; | |
1076 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1077 | u16 data_size = sizeof(struct pmcraid_inquiry_data); | |
1078 | ||
1079 | pmcraid_reinit_cmdblk(cmd); | |
1080 | ioarcb->request_type = REQ_TYPE_SCSI; | |
1081 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
1082 | ioarcb->cdb[0] = INQUIRY; | |
1083 | ioarcb->cdb[1] = 1; | |
1084 | ioarcb->cdb[2] = 0xD0; | |
1085 | ioarcb->cdb[3] = (data_size >> 8) & 0xFF; | |
1086 | ioarcb->cdb[4] = data_size & 0xFF; | |
1087 | ||
1088 | /* Since entire inquiry data it can be part of IOARCB itself | |
1089 | */ | |
1090 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
1091 | offsetof(struct pmcraid_ioarcb, | |
1092 | add_data.u.ioadl[0])); | |
1093 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
1094 | ioarcb->ioarcb_bus_addr &= ~(0x1FULL); | |
1095 | ||
1096 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
1097 | ioarcb->data_transfer_length = cpu_to_le32(data_size); | |
1098 | ioadl = &(ioarcb->add_data.u.ioadl[0]); | |
1099 | ioadl->flags = IOADL_FLAGS_LAST_DESC; | |
1100 | ioadl->address = cpu_to_le64(pinstance->inq_data_baddr); | |
1101 | ioadl->data_len = cpu_to_le32(data_size); | |
1102 | ||
1103 | pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done, | |
1104 | PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); | |
1105 | } | |
1106 | ||
1107 | /** | |
1108 | * pmcraid_identify_hrrq - registers host rrq buffers with IOA | |
1109 | * @cmd: pointer to command block to be used for identify hrrq | |
1110 | * | |
1111 | * Return Value | |
1112 | * none | |
1113 | */ | |
89a36810 AR |
1114 | static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd) |
1115 | { | |
1116 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1117 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
c20c4267 | 1118 | int index = cmd->hrrq_index; |
89a36810 AR |
1119 | __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]); |
1120 | u32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD); | |
c20c4267 | 1121 | void (*done_function)(struct pmcraid_cmd *); |
89a36810 AR |
1122 | |
1123 | pmcraid_reinit_cmdblk(cmd); | |
c20c4267 AR |
1124 | cmd->hrrq_index = index + 1; |
1125 | ||
1126 | if (cmd->hrrq_index < pinstance->num_hrrq) { | |
1127 | done_function = pmcraid_identify_hrrq; | |
1128 | } else { | |
1129 | cmd->hrrq_index = 0; | |
1130 | done_function = pmcraid_get_fwversion; | |
1131 | } | |
89a36810 AR |
1132 | |
1133 | /* Initialize ioarcb */ | |
1134 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
1135 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
1136 | ||
1137 | /* initialize the hrrq number where IOA will respond to this command */ | |
1138 | ioarcb->hrrq_id = index; | |
1139 | ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ; | |
1140 | ioarcb->cdb[1] = index; | |
1141 | ||
1142 | /* IOA expects 64-bit pci address to be written in B.E format | |
1143 | * (i.e cdb[2]=MSByte..cdb[9]=LSB. | |
1144 | */ | |
c20c4267 AR |
1145 | pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n", |
1146 | hrrq_addr, ioarcb->ioarcb_bus_addr, index); | |
89a36810 AR |
1147 | |
1148 | memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr)); | |
1149 | memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size)); | |
1150 | ||
1151 | /* Subsequent commands require HRRQ identification to be successful. | |
1152 | * Note that this gets called even during reset from SCSI mid-layer | |
1153 | * or tasklet | |
1154 | */ | |
c20c4267 | 1155 | pmcraid_send_cmd(cmd, done_function, |
89a36810 AR |
1156 | PMCRAID_INTERNAL_TIMEOUT, |
1157 | pmcraid_timeout_handler); | |
1158 | } | |
1159 | ||
1160 | static void pmcraid_process_ccn(struct pmcraid_cmd *cmd); | |
1161 | static void pmcraid_process_ldn(struct pmcraid_cmd *cmd); | |
1162 | ||
1163 | /** | |
1164 | * pmcraid_send_hcam_cmd - send an initialized command block(HCAM) to IOA | |
1165 | * | |
1166 | * @cmd: initialized command block pointer | |
1167 | * | |
1168 | * Return Value | |
1169 | * none | |
1170 | */ | |
1171 | static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd) | |
1172 | { | |
1173 | if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE) | |
1174 | atomic_set(&(cmd->drv_inst->ccn.ignore), 0); | |
1175 | else | |
1176 | atomic_set(&(cmd->drv_inst->ldn.ignore), 0); | |
1177 | ||
1178 | pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL); | |
1179 | } | |
1180 | ||
1181 | /** | |
1182 | * pmcraid_init_hcam - send an initialized command block(HCAM) to IOA | |
1183 | * | |
1184 | * @pinstance: pointer to adapter instance structure | |
1185 | * @type: HCAM type | |
1186 | * | |
1187 | * Return Value | |
1188 | * pointer to initialized pmcraid_cmd structure or NULL | |
1189 | */ | |
1190 | static struct pmcraid_cmd *pmcraid_init_hcam | |
1191 | ( | |
1192 | struct pmcraid_instance *pinstance, | |
1193 | u8 type | |
1194 | ) | |
1195 | { | |
1196 | struct pmcraid_cmd *cmd; | |
1197 | struct pmcraid_ioarcb *ioarcb; | |
1198 | struct pmcraid_ioadl_desc *ioadl; | |
1199 | struct pmcraid_hostrcb *hcam; | |
1200 | void (*cmd_done) (struct pmcraid_cmd *); | |
1201 | dma_addr_t dma; | |
1202 | int rcb_size; | |
1203 | ||
1204 | cmd = pmcraid_get_free_cmd(pinstance); | |
1205 | ||
1206 | if (!cmd) { | |
1207 | pmcraid_err("no free command blocks for hcam\n"); | |
1208 | return cmd; | |
1209 | } | |
1210 | ||
1211 | if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) { | |
c20c4267 | 1212 | rcb_size = sizeof(struct pmcraid_hcam_ccn_ext); |
89a36810 AR |
1213 | cmd_done = pmcraid_process_ccn; |
1214 | dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE; | |
1215 | hcam = &pinstance->ccn; | |
1216 | } else { | |
1217 | rcb_size = sizeof(struct pmcraid_hcam_ldn); | |
1218 | cmd_done = pmcraid_process_ldn; | |
1219 | dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE; | |
1220 | hcam = &pinstance->ldn; | |
1221 | } | |
1222 | ||
1223 | /* initialize command pointer used for HCAM registration */ | |
1224 | hcam->cmd = cmd; | |
1225 | ||
1226 | ioarcb = &cmd->ioa_cb->ioarcb; | |
1227 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
1228 | offsetof(struct pmcraid_ioarcb, | |
1229 | add_data.u.ioadl[0])); | |
1230 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
1231 | ioadl = ioarcb->add_data.u.ioadl; | |
1232 | ||
1233 | /* Initialize ioarcb */ | |
1234 | ioarcb->request_type = REQ_TYPE_HCAM; | |
1235 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
1236 | ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC; | |
1237 | ioarcb->cdb[1] = type; | |
1238 | ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF; | |
1239 | ioarcb->cdb[8] = (rcb_size) & 0xFF; | |
1240 | ||
1241 | ioarcb->data_transfer_length = cpu_to_le32(rcb_size); | |
1242 | ||
88197966 | 1243 | ioadl[0].flags |= IOADL_FLAGS_READ_LAST; |
89a36810 AR |
1244 | ioadl[0].data_len = cpu_to_le32(rcb_size); |
1245 | ioadl[0].address = cpu_to_le32(dma); | |
1246 | ||
1247 | cmd->cmd_done = cmd_done; | |
1248 | return cmd; | |
1249 | } | |
1250 | ||
1251 | /** | |
1252 | * pmcraid_send_hcam - Send an HCAM to IOA | |
1253 | * @pinstance: ioa config struct | |
1254 | * @type: HCAM type | |
1255 | * | |
1256 | * This function will send a Host Controlled Async command to IOA. | |
1257 | * | |
1258 | * Return value: | |
c20c4267 | 1259 | * none |
89a36810 AR |
1260 | */ |
1261 | static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type) | |
1262 | { | |
1263 | struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type); | |
1264 | pmcraid_send_hcam_cmd(cmd); | |
1265 | } | |
1266 | ||
1267 | ||
1268 | /** | |
1269 | * pmcraid_prepare_cancel_cmd - prepares a command block to abort another | |
1270 | * | |
1271 | * @cmd: pointer to cmd that is used as cancelling command | |
1272 | * @cmd_to_cancel: pointer to the command that needs to be cancelled | |
1273 | */ | |
1274 | static void pmcraid_prepare_cancel_cmd( | |
1275 | struct pmcraid_cmd *cmd, | |
1276 | struct pmcraid_cmd *cmd_to_cancel | |
1277 | ) | |
1278 | { | |
1279 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
1280 | __be64 ioarcb_addr = cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr; | |
1281 | ||
1282 | /* Get the resource handle to where the command to be aborted has been | |
1283 | * sent. | |
1284 | */ | |
1285 | ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle; | |
1286 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
1287 | memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN); | |
1288 | ioarcb->cdb[0] = PMCRAID_ABORT_CMD; | |
1289 | ||
1290 | /* IOARCB address of the command to be cancelled is given in | |
1291 | * cdb[2]..cdb[9] is Big-Endian format. Note that length bits in | |
1292 | * IOARCB address are not masked. | |
1293 | */ | |
1294 | ioarcb_addr = cpu_to_be64(ioarcb_addr); | |
1295 | memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr)); | |
1296 | } | |
1297 | ||
1298 | /** | |
1299 | * pmcraid_cancel_hcam - sends ABORT task to abort a given HCAM | |
1300 | * | |
1301 | * @cmd: command to be used as cancelling command | |
1302 | * @type: HCAM type | |
1303 | * @cmd_done: op done function for the cancelling command | |
1304 | */ | |
1305 | static void pmcraid_cancel_hcam( | |
1306 | struct pmcraid_cmd *cmd, | |
1307 | u8 type, | |
1308 | void (*cmd_done) (struct pmcraid_cmd *) | |
1309 | ) | |
1310 | { | |
1311 | struct pmcraid_instance *pinstance; | |
1312 | struct pmcraid_hostrcb *hcam; | |
1313 | ||
1314 | pinstance = cmd->drv_inst; | |
1315 | hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ? | |
1316 | &pinstance->ldn : &pinstance->ccn; | |
1317 | ||
1318 | /* prepare for cancelling previous hcam command. If the HCAM is | |
1319 | * currently not pending with IOA, we would have hcam->cmd as non-null | |
1320 | */ | |
1321 | if (hcam->cmd == NULL) | |
1322 | return; | |
1323 | ||
1324 | pmcraid_prepare_cancel_cmd(cmd, hcam->cmd); | |
1325 | ||
1326 | /* writing to IOARRIN must be protected by host_lock, as mid-layer | |
1327 | * schedule queuecommand while we are doing this | |
1328 | */ | |
1329 | pmcraid_send_cmd(cmd, cmd_done, | |
1330 | PMCRAID_INTERNAL_TIMEOUT, | |
1331 | pmcraid_timeout_handler); | |
1332 | } | |
1333 | ||
1334 | /** | |
1335 | * pmcraid_cancel_ccn - cancel CCN HCAM already registered with IOA | |
1336 | * | |
1337 | * @cmd: command block to be used for cancelling the HCAM | |
1338 | */ | |
1339 | static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd) | |
1340 | { | |
1341 | pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n", | |
1342 | cmd->ioa_cb->ioarcb.cdb[0], | |
1343 | le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); | |
1344 | ||
1345 | pmcraid_reinit_cmdblk(cmd); | |
1346 | ||
1347 | pmcraid_cancel_hcam(cmd, | |
1348 | PMCRAID_HCAM_CODE_CONFIG_CHANGE, | |
1349 | pmcraid_ioa_shutdown); | |
1350 | } | |
1351 | ||
1352 | /** | |
1353 | * pmcraid_cancel_ldn - cancel LDN HCAM already registered with IOA | |
1354 | * | |
1355 | * @cmd: command block to be used for cancelling the HCAM | |
1356 | */ | |
1357 | static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd) | |
1358 | { | |
1359 | pmcraid_cancel_hcam(cmd, | |
1360 | PMCRAID_HCAM_CODE_LOG_DATA, | |
1361 | pmcraid_cancel_ccn); | |
1362 | } | |
1363 | ||
1364 | /** | |
1365 | * pmcraid_expose_resource - check if the resource can be exposed to OS | |
1366 | * | |
c20c4267 | 1367 | * @fw_version: firmware version code |
89a36810 AR |
1368 | * @cfgte: pointer to configuration table entry of the resource |
1369 | * | |
1370 | * Return value: | |
c20c4267 | 1371 | * true if resource can be added to midlayer, false(0) otherwise |
89a36810 | 1372 | */ |
c20c4267 AR |
1373 | static int pmcraid_expose_resource(u16 fw_version, |
1374 | struct pmcraid_config_table_entry *cfgte) | |
89a36810 AR |
1375 | { |
1376 | int retval = 0; | |
1377 | ||
c20c4267 AR |
1378 | if (cfgte->resource_type == RES_TYPE_VSET) { |
1379 | if (fw_version <= PMCRAID_FW_VERSION_1) | |
1380 | retval = ((cfgte->unique_flags1 & 0x80) == 0); | |
1381 | else | |
1382 | retval = ((cfgte->unique_flags0 & 0x80) == 0 && | |
1383 | (cfgte->unique_flags1 & 0x80) == 0); | |
1384 | ||
1385 | } else if (cfgte->resource_type == RES_TYPE_GSCSI) | |
89a36810 AR |
1386 | retval = (RES_BUS(cfgte->resource_address) != |
1387 | PMCRAID_VIRTUAL_ENCL_BUS_ID); | |
1388 | return retval; | |
1389 | } | |
1390 | ||
1391 | /* attributes supported by pmcraid_event_family */ | |
1392 | enum { | |
1393 | PMCRAID_AEN_ATTR_UNSPEC, | |
1394 | PMCRAID_AEN_ATTR_EVENT, | |
1395 | __PMCRAID_AEN_ATTR_MAX, | |
1396 | }; | |
1397 | #define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1) | |
1398 | ||
1399 | /* commands supported by pmcraid_event_family */ | |
1400 | enum { | |
1401 | PMCRAID_AEN_CMD_UNSPEC, | |
1402 | PMCRAID_AEN_CMD_EVENT, | |
1403 | __PMCRAID_AEN_CMD_MAX, | |
1404 | }; | |
1405 | #define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1) | |
1406 | ||
5e53e689 JB |
1407 | static struct genl_multicast_group pmcraid_mcgrps[] = { |
1408 | { .name = "events", /* not really used - see ID discussion below */ }, | |
1409 | }; | |
1410 | ||
89a36810 | 1411 | static struct genl_family pmcraid_event_family = { |
5e53e689 JB |
1412 | /* |
1413 | * Due to prior multicast group abuse (the code having assumed that | |
1414 | * the family ID can be used as a multicast group ID) we need to | |
1415 | * statically allocate a family (and thus group) ID. | |
1416 | */ | |
1417 | .id = GENL_ID_PMCRAID, | |
89a36810 AR |
1418 | .name = "pmcraid", |
1419 | .version = 1, | |
5e53e689 JB |
1420 | .maxattr = PMCRAID_AEN_ATTR_MAX, |
1421 | .mcgrps = pmcraid_mcgrps, | |
1422 | .n_mcgrps = ARRAY_SIZE(pmcraid_mcgrps), | |
89a36810 AR |
1423 | }; |
1424 | ||
1425 | /** | |
1426 | * pmcraid_netlink_init - registers pmcraid_event_family | |
1427 | * | |
1428 | * Return value: | |
c20c4267 AR |
1429 | * 0 if the pmcraid_event_family is successfully registered |
1430 | * with netlink generic, non-zero otherwise | |
89a36810 AR |
1431 | */ |
1432 | static int pmcraid_netlink_init(void) | |
1433 | { | |
1434 | int result; | |
1435 | ||
1436 | result = genl_register_family(&pmcraid_event_family); | |
1437 | ||
1438 | if (result) | |
1439 | return result; | |
1440 | ||
1441 | pmcraid_info("registered NETLINK GENERIC group: %d\n", | |
1442 | pmcraid_event_family.id); | |
1443 | ||
1444 | return result; | |
1445 | } | |
1446 | ||
1447 | /** | |
1448 | * pmcraid_netlink_release - unregisters pmcraid_event_family | |
1449 | * | |
1450 | * Return value: | |
c20c4267 | 1451 | * none |
89a36810 AR |
1452 | */ |
1453 | static void pmcraid_netlink_release(void) | |
1454 | { | |
1455 | genl_unregister_family(&pmcraid_event_family); | |
1456 | } | |
1457 | ||
1458 | /** | |
1459 | * pmcraid_notify_aen - sends event msg to user space application | |
1460 | * @pinstance: pointer to adapter instance structure | |
1461 | * @type: HCAM type | |
1462 | * | |
1463 | * Return value: | |
1464 | * 0 if success, error value in case of any failure. | |
1465 | */ | |
c20c4267 AR |
1466 | static int pmcraid_notify_aen( |
1467 | struct pmcraid_instance *pinstance, | |
1468 | struct pmcraid_aen_msg *aen_msg, | |
1469 | u32 data_size | |
1470 | ) | |
89a36810 AR |
1471 | { |
1472 | struct sk_buff *skb; | |
89a36810 | 1473 | void *msg_header; |
c20c4267 | 1474 | u32 total_size, nla_genl_hdr_total_size; |
89a36810 AR |
1475 | int result; |
1476 | ||
89a36810 AR |
1477 | aen_msg->hostno = (pinstance->host->unique_id << 16 | |
1478 | MINOR(pinstance->cdev.dev)); | |
1479 | aen_msg->length = data_size; | |
c20c4267 | 1480 | |
89a36810 AR |
1481 | data_size += sizeof(*aen_msg); |
1482 | ||
1483 | total_size = nla_total_size(data_size); | |
c20c4267 AR |
1484 | /* Add GENL_HDR to total_size */ |
1485 | nla_genl_hdr_total_size = | |
1486 | (total_size + (GENL_HDRLEN + | |
1487 | ((struct genl_family *)&pmcraid_event_family)->hdrsize) | |
1488 | + NLMSG_HDRLEN); | |
1489 | skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC); | |
89a36810 AR |
1490 | |
1491 | ||
1492 | if (!skb) { | |
1493 | pmcraid_err("Failed to allocate aen data SKB of size: %x\n", | |
1494 | total_size); | |
1495 | return -ENOMEM; | |
1496 | } | |
1497 | ||
1498 | /* add the genetlink message header */ | |
1499 | msg_header = genlmsg_put(skb, 0, 0, | |
1500 | &pmcraid_event_family, 0, | |
1501 | PMCRAID_AEN_CMD_EVENT); | |
1502 | if (!msg_header) { | |
1503 | pmcraid_err("failed to copy command details\n"); | |
1504 | nlmsg_free(skb); | |
1505 | return -ENOMEM; | |
1506 | } | |
1507 | ||
1508 | result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg); | |
1509 | ||
1510 | if (result) { | |
c20c4267 | 1511 | pmcraid_err("failed to copy AEN attribute data\n"); |
89a36810 AR |
1512 | nlmsg_free(skb); |
1513 | return -EINVAL; | |
1514 | } | |
1515 | ||
1516 | /* send genetlink multicast message to notify appplications */ | |
1517 | result = genlmsg_end(skb, msg_header); | |
1518 | ||
1519 | if (result < 0) { | |
1520 | pmcraid_err("genlmsg_end failed\n"); | |
1521 | nlmsg_free(skb); | |
1522 | return result; | |
1523 | } | |
1524 | ||
5e53e689 JB |
1525 | result = genlmsg_multicast(&pmcraid_event_family, skb, |
1526 | 0, 0, GFP_ATOMIC); | |
89a36810 AR |
1527 | |
1528 | /* If there are no listeners, genlmsg_multicast may return non-zero | |
1529 | * value. | |
1530 | */ | |
1531 | if (result) | |
c20c4267 | 1532 | pmcraid_info("error (%x) sending aen event message\n", result); |
89a36810 AR |
1533 | return result; |
1534 | } | |
1535 | ||
c20c4267 AR |
1536 | /** |
1537 | * pmcraid_notify_ccn - notifies about CCN event msg to user space | |
1538 | * @pinstance: pointer adapter instance structure | |
1539 | * | |
1540 | * Return value: | |
1541 | * 0 if success, error value in case of any failure | |
1542 | */ | |
1543 | static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance) | |
1544 | { | |
1545 | return pmcraid_notify_aen(pinstance, | |
1546 | pinstance->ccn.msg, | |
1547 | pinstance->ccn.hcam->data_len + | |
1548 | sizeof(struct pmcraid_hcam_hdr)); | |
1549 | } | |
1550 | ||
1551 | /** | |
1552 | * pmcraid_notify_ldn - notifies about CCN event msg to user space | |
1553 | * @pinstance: pointer adapter instance structure | |
1554 | * | |
1555 | * Return value: | |
1556 | * 0 if success, error value in case of any failure | |
1557 | */ | |
1558 | static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance) | |
1559 | { | |
1560 | return pmcraid_notify_aen(pinstance, | |
1561 | pinstance->ldn.msg, | |
1562 | pinstance->ldn.hcam->data_len + | |
1563 | sizeof(struct pmcraid_hcam_hdr)); | |
1564 | } | |
1565 | ||
1566 | /** | |
1567 | * pmcraid_notify_ioastate - sends IOA state event msg to user space | |
1568 | * @pinstance: pointer adapter instance structure | |
1569 | * @evt: controller state event to be sent | |
1570 | * | |
1571 | * Return value: | |
1572 | * 0 if success, error value in case of any failure | |
1573 | */ | |
1574 | static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt) | |
1575 | { | |
1576 | pinstance->scn.ioa_state = evt; | |
1577 | pmcraid_notify_aen(pinstance, | |
1578 | &pinstance->scn.msg, | |
1579 | sizeof(u32)); | |
1580 | } | |
1581 | ||
89a36810 AR |
1582 | /** |
1583 | * pmcraid_handle_config_change - Handle a config change from the adapter | |
1584 | * @pinstance: pointer to per adapter instance structure | |
1585 | * | |
1586 | * Return value: | |
1587 | * none | |
1588 | */ | |
729c8456 | 1589 | |
89a36810 AR |
1590 | static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance) |
1591 | { | |
1592 | struct pmcraid_config_table_entry *cfg_entry; | |
1593 | struct pmcraid_hcam_ccn *ccn_hcam; | |
1594 | struct pmcraid_cmd *cmd; | |
1595 | struct pmcraid_cmd *cfgcmd; | |
1596 | struct pmcraid_resource_entry *res = NULL; | |
89a36810 AR |
1597 | unsigned long lock_flags; |
1598 | unsigned long host_lock_flags; | |
729c8456 AR |
1599 | u32 new_entry = 1; |
1600 | u32 hidden_entry = 0; | |
c20c4267 | 1601 | u16 fw_version; |
89a36810 AR |
1602 | int rc; |
1603 | ||
1604 | ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam; | |
1605 | cfg_entry = &ccn_hcam->cfg_entry; | |
c20c4267 | 1606 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
89a36810 | 1607 | |
592488a3 AR |
1608 | pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \ |
1609 | res: %x:%x:%x:%x\n", | |
89a36810 AR |
1610 | pinstance->ccn.hcam->ilid, |
1611 | pinstance->ccn.hcam->op_code, | |
592488a3 AR |
1612 | ((pinstance->ccn.hcam->timestamp1) | |
1613 | ((pinstance->ccn.hcam->timestamp2 & 0xffffffffLL) << 32)), | |
89a36810 AR |
1614 | pinstance->ccn.hcam->notification_type, |
1615 | pinstance->ccn.hcam->notification_lost, | |
1616 | pinstance->ccn.hcam->flags, | |
1617 | pinstance->host->unique_id, | |
1618 | RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID : | |
1619 | (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID : | |
1620 | RES_BUS(cfg_entry->resource_address)), | |
c20c4267 AR |
1621 | RES_IS_VSET(*cfg_entry) ? |
1622 | (fw_version <= PMCRAID_FW_VERSION_1 ? | |
1623 | cfg_entry->unique_flags1 : | |
1624 | cfg_entry->array_id & 0xFF) : | |
89a36810 AR |
1625 | RES_TARGET(cfg_entry->resource_address), |
1626 | RES_LUN(cfg_entry->resource_address)); | |
1627 | ||
1628 | ||
1629 | /* If this HCAM indicates a lost notification, read the config table */ | |
1630 | if (pinstance->ccn.hcam->notification_lost) { | |
1631 | cfgcmd = pmcraid_get_free_cmd(pinstance); | |
1632 | if (cfgcmd) { | |
1633 | pmcraid_info("lost CCN, reading config table\b"); | |
1634 | pinstance->reinit_cfg_table = 1; | |
1635 | pmcraid_querycfg(cfgcmd); | |
1636 | } else { | |
1637 | pmcraid_err("lost CCN, no free cmd for querycfg\n"); | |
1638 | } | |
1639 | goto out_notify_apps; | |
1640 | } | |
1641 | ||
1642 | /* If this resource is not going to be added to mid-layer, just notify | |
729c8456 AR |
1643 | * applications and return. If this notification is about hiding a VSET |
1644 | * resource, check if it was exposed already. | |
89a36810 | 1645 | */ |
729c8456 AR |
1646 | if (pinstance->ccn.hcam->notification_type == |
1647 | NOTIFICATION_TYPE_ENTRY_CHANGED && | |
c20c4267 AR |
1648 | cfg_entry->resource_type == RES_TYPE_VSET) { |
1649 | ||
1650 | if (fw_version <= PMCRAID_FW_VERSION_1) | |
1651 | hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0; | |
1652 | else | |
1653 | hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0; | |
1654 | ||
1655 | } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) { | |
89a36810 | 1656 | goto out_notify_apps; |
c20c4267 | 1657 | } |
89a36810 AR |
1658 | |
1659 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); | |
1660 | list_for_each_entry(res, &pinstance->used_res_q, queue) { | |
1661 | rc = memcmp(&res->cfg_entry.resource_address, | |
1662 | &cfg_entry->resource_address, | |
1663 | sizeof(cfg_entry->resource_address)); | |
1664 | if (!rc) { | |
1665 | new_entry = 0; | |
1666 | break; | |
1667 | } | |
1668 | } | |
1669 | ||
1670 | if (new_entry) { | |
1671 | ||
729c8456 AR |
1672 | if (hidden_entry) { |
1673 | spin_unlock_irqrestore(&pinstance->resource_lock, | |
1674 | lock_flags); | |
1675 | goto out_notify_apps; | |
1676 | } | |
1677 | ||
89a36810 AR |
1678 | /* If there are more number of resources than what driver can |
1679 | * manage, do not notify the applications about the CCN. Just | |
1680 | * ignore this notifications and re-register the same HCAM | |
1681 | */ | |
1682 | if (list_empty(&pinstance->free_res_q)) { | |
1683 | spin_unlock_irqrestore(&pinstance->resource_lock, | |
1684 | lock_flags); | |
1685 | pmcraid_err("too many resources attached\n"); | |
1686 | spin_lock_irqsave(pinstance->host->host_lock, | |
1687 | host_lock_flags); | |
1688 | pmcraid_send_hcam(pinstance, | |
1689 | PMCRAID_HCAM_CODE_CONFIG_CHANGE); | |
1690 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
1691 | host_lock_flags); | |
1692 | return; | |
1693 | } | |
1694 | ||
1695 | res = list_entry(pinstance->free_res_q.next, | |
1696 | struct pmcraid_resource_entry, queue); | |
1697 | ||
1698 | list_del(&res->queue); | |
1699 | res->scsi_dev = NULL; | |
1700 | res->reset_progress = 0; | |
1701 | list_add_tail(&res->queue, &pinstance->used_res_q); | |
1702 | } | |
1703 | ||
c20c4267 | 1704 | memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size); |
89a36810 AR |
1705 | |
1706 | if (pinstance->ccn.hcam->notification_type == | |
729c8456 | 1707 | NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) { |
89a36810 | 1708 | if (res->scsi_dev) { |
c20c4267 AR |
1709 | if (fw_version <= PMCRAID_FW_VERSION_1) |
1710 | res->cfg_entry.unique_flags1 &= 0x7F; | |
1711 | else | |
1712 | res->cfg_entry.array_id &= 0xFF; | |
89a36810 AR |
1713 | res->change_detected = RES_CHANGE_DEL; |
1714 | res->cfg_entry.resource_handle = | |
1715 | PMCRAID_INVALID_RES_HANDLE; | |
1716 | schedule_work(&pinstance->worker_q); | |
1717 | } else { | |
1718 | /* This may be one of the non-exposed resources */ | |
1719 | list_move_tail(&res->queue, &pinstance->free_res_q); | |
1720 | } | |
1721 | } else if (!res->scsi_dev) { | |
1722 | res->change_detected = RES_CHANGE_ADD; | |
1723 | schedule_work(&pinstance->worker_q); | |
1724 | } | |
1725 | spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); | |
1726 | ||
1727 | out_notify_apps: | |
1728 | ||
1729 | /* Notify configuration changes to registered applications.*/ | |
1730 | if (!pmcraid_disable_aen) | |
c20c4267 | 1731 | pmcraid_notify_ccn(pinstance); |
89a36810 AR |
1732 | |
1733 | cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE); | |
1734 | if (cmd) | |
1735 | pmcraid_send_hcam_cmd(cmd); | |
1736 | } | |
1737 | ||
1738 | /** | |
1739 | * pmcraid_get_error_info - return error string for an ioasc | |
1740 | * @ioasc: ioasc code | |
1741 | * Return Value | |
1742 | * none | |
1743 | */ | |
1744 | static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc) | |
1745 | { | |
1746 | int i; | |
1747 | for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) { | |
1748 | if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc) | |
1749 | return &pmcraid_ioasc_error_table[i]; | |
1750 | } | |
1751 | return NULL; | |
1752 | } | |
1753 | ||
1754 | /** | |
1755 | * pmcraid_ioasc_logger - log IOASC information based user-settings | |
1756 | * @ioasc: ioasc code | |
1757 | * @cmd: pointer to command that resulted in 'ioasc' | |
1758 | */ | |
1759 | void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd) | |
1760 | { | |
1761 | struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc); | |
1762 | ||
1763 | if (error_info == NULL || | |
1764 | cmd->drv_inst->current_log_level < error_info->log_level) | |
1765 | return; | |
1766 | ||
1767 | /* log the error string */ | |
c20c4267 | 1768 | pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n", |
89a36810 AR |
1769 | cmd->ioa_cb->ioarcb.cdb[0], |
1770 | cmd->ioa_cb->ioarcb.resource_handle, | |
1771 | le32_to_cpu(ioasc), error_info->error_string); | |
1772 | } | |
1773 | ||
1774 | /** | |
1775 | * pmcraid_handle_error_log - Handle a config change (error log) from the IOA | |
1776 | * | |
1777 | * @pinstance: pointer to per adapter instance structure | |
1778 | * | |
1779 | * Return value: | |
1780 | * none | |
1781 | */ | |
1782 | static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance) | |
1783 | { | |
1784 | struct pmcraid_hcam_ldn *hcam_ldn; | |
1785 | u32 ioasc; | |
1786 | ||
1787 | hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam; | |
1788 | ||
1789 | pmcraid_info | |
1790 | ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n", | |
1791 | pinstance->ldn.hcam->ilid, | |
1792 | pinstance->ldn.hcam->op_code, | |
1793 | pinstance->ldn.hcam->notification_type, | |
1794 | pinstance->ldn.hcam->notification_lost, | |
1795 | pinstance->ldn.hcam->flags, | |
1796 | pinstance->ldn.hcam->overlay_id); | |
1797 | ||
1798 | /* log only the errors, no need to log informational log entries */ | |
1799 | if (pinstance->ldn.hcam->notification_type != | |
1800 | NOTIFICATION_TYPE_ERROR_LOG) | |
1801 | return; | |
1802 | ||
1803 | if (pinstance->ldn.hcam->notification_lost == | |
1804 | HOSTRCB_NOTIFICATIONS_LOST) | |
34876402 | 1805 | dev_info(&pinstance->pdev->dev, "Error notifications lost\n"); |
89a36810 AR |
1806 | |
1807 | ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc); | |
1808 | ||
1809 | if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET || | |
1810 | ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) { | |
34876402 | 1811 | dev_info(&pinstance->pdev->dev, |
89a36810 AR |
1812 | "UnitAttention due to IOA Bus Reset\n"); |
1813 | scsi_report_bus_reset( | |
1814 | pinstance->host, | |
1815 | RES_BUS(hcam_ldn->error_log.fd_ra)); | |
1816 | } | |
1817 | ||
1818 | return; | |
1819 | } | |
1820 | ||
1821 | /** | |
1822 | * pmcraid_process_ccn - Op done function for a CCN. | |
1823 | * @cmd: pointer to command struct | |
1824 | * | |
1825 | * This function is the op done function for a configuration | |
1826 | * change notification | |
1827 | * | |
1828 | * Return value: | |
1829 | * none | |
1830 | */ | |
1831 | static void pmcraid_process_ccn(struct pmcraid_cmd *cmd) | |
1832 | { | |
1833 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1834 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
1835 | unsigned long lock_flags; | |
1836 | ||
1837 | pinstance->ccn.cmd = NULL; | |
1838 | pmcraid_return_cmd(cmd); | |
1839 | ||
1840 | /* If driver initiated IOA reset happened while this hcam was pending | |
1841 | * with IOA, or IOA bringdown sequence is in progress, no need to | |
1842 | * re-register the hcam | |
1843 | */ | |
1844 | if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET || | |
1845 | atomic_read(&pinstance->ccn.ignore) == 1) { | |
1846 | return; | |
1847 | } else if (ioasc) { | |
34876402 | 1848 | dev_info(&pinstance->pdev->dev, |
89a36810 AR |
1849 | "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc); |
1850 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
1851 | pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE); | |
1852 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
1853 | } else { | |
1854 | pmcraid_handle_config_change(pinstance); | |
1855 | } | |
1856 | } | |
1857 | ||
1858 | /** | |
1859 | * pmcraid_process_ldn - op done function for an LDN | |
1860 | * @cmd: pointer to command block | |
1861 | * | |
1862 | * Return value | |
1863 | * none | |
1864 | */ | |
1865 | static void pmcraid_initiate_reset(struct pmcraid_instance *); | |
592488a3 | 1866 | static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd); |
89a36810 AR |
1867 | |
1868 | static void pmcraid_process_ldn(struct pmcraid_cmd *cmd) | |
1869 | { | |
1870 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1871 | struct pmcraid_hcam_ldn *ldn_hcam = | |
1872 | (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam; | |
1873 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
1874 | u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc); | |
1875 | unsigned long lock_flags; | |
1876 | ||
1877 | /* return the command block back to freepool */ | |
1878 | pinstance->ldn.cmd = NULL; | |
1879 | pmcraid_return_cmd(cmd); | |
1880 | ||
1881 | /* If driver initiated IOA reset happened while this hcam was pending | |
1882 | * with IOA, no need to re-register the hcam as reset engine will do it | |
1883 | * once reset sequence is complete | |
1884 | */ | |
1885 | if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET || | |
1886 | atomic_read(&pinstance->ccn.ignore) == 1) { | |
1887 | return; | |
1888 | } else if (!ioasc) { | |
1889 | pmcraid_handle_error_log(pinstance); | |
1890 | if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) { | |
1891 | spin_lock_irqsave(pinstance->host->host_lock, | |
1892 | lock_flags); | |
1893 | pmcraid_initiate_reset(pinstance); | |
1894 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
1895 | lock_flags); | |
1896 | return; | |
1897 | } | |
592488a3 AR |
1898 | if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) { |
1899 | pinstance->timestamp_error = 1; | |
1900 | pmcraid_set_timestamp(cmd); | |
1901 | } | |
89a36810 | 1902 | } else { |
34876402 | 1903 | dev_info(&pinstance->pdev->dev, |
89a36810 AR |
1904 | "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc); |
1905 | } | |
1906 | /* send netlink message for HCAM notification if enabled */ | |
1907 | if (!pmcraid_disable_aen) | |
c20c4267 | 1908 | pmcraid_notify_ldn(pinstance); |
89a36810 AR |
1909 | |
1910 | cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA); | |
1911 | if (cmd) | |
1912 | pmcraid_send_hcam_cmd(cmd); | |
1913 | } | |
1914 | ||
1915 | /** | |
1916 | * pmcraid_register_hcams - register HCAMs for CCN and LDN | |
1917 | * | |
1918 | * @pinstance: pointer per adapter instance structure | |
1919 | * | |
1920 | * Return Value | |
1921 | * none | |
1922 | */ | |
1923 | static void pmcraid_register_hcams(struct pmcraid_instance *pinstance) | |
1924 | { | |
1925 | pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE); | |
1926 | pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA); | |
1927 | } | |
1928 | ||
1929 | /** | |
1930 | * pmcraid_unregister_hcams - cancel HCAMs registered already | |
1931 | * @cmd: pointer to command used as part of reset sequence | |
1932 | */ | |
1933 | static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd) | |
1934 | { | |
1935 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1936 | ||
1937 | /* During IOA bringdown, HCAM gets fired and tasklet proceeds with | |
1938 | * handling hcam response though it is not necessary. In order to | |
1939 | * prevent this, set 'ignore', so that bring-down sequence doesn't | |
1940 | * re-send any more hcams | |
1941 | */ | |
1942 | atomic_set(&pinstance->ccn.ignore, 1); | |
1943 | atomic_set(&pinstance->ldn.ignore, 1); | |
1944 | ||
1945 | /* If adapter reset was forced as part of runtime reset sequence, | |
c20c4267 AR |
1946 | * start the reset sequence. Reset will be triggered even in case |
1947 | * IOA unit_check. | |
89a36810 | 1948 | */ |
c20c4267 AR |
1949 | if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) || |
1950 | pinstance->ioa_unit_check) { | |
89a36810 | 1951 | pinstance->force_ioa_reset = 0; |
c20c4267 | 1952 | pinstance->ioa_unit_check = 0; |
89a36810 AR |
1953 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; |
1954 | pmcraid_reset_alert(cmd); | |
1955 | return; | |
1956 | } | |
1957 | ||
1958 | /* Driver tries to cancel HCAMs by sending ABORT TASK for each HCAM | |
1959 | * one after the other. So CCN cancellation will be triggered by | |
1960 | * pmcraid_cancel_ldn itself. | |
1961 | */ | |
1962 | pmcraid_cancel_ldn(cmd); | |
1963 | } | |
1964 | ||
1965 | /** | |
1966 | * pmcraid_reset_enable_ioa - re-enable IOA after a hard reset | |
1967 | * @pinstance: pointer to adapter instance structure | |
1968 | * Return Value | |
1969 | * 1 if TRANSITION_TO_OPERATIONAL is active, otherwise 0 | |
1970 | */ | |
1971 | static void pmcraid_reinit_buffers(struct pmcraid_instance *); | |
1972 | ||
1973 | static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance) | |
1974 | { | |
1975 | u32 intrs; | |
1976 | ||
1977 | pmcraid_reinit_buffers(pinstance); | |
1978 | intrs = pmcraid_read_interrupts(pinstance); | |
1979 | ||
1980 | pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS); | |
1981 | ||
1982 | if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) { | |
c20c4267 AR |
1983 | if (!pinstance->interrupt_mode) { |
1984 | iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, | |
1985 | pinstance->int_regs. | |
1986 | ioa_host_interrupt_mask_reg); | |
1987 | iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, | |
1988 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
1989 | } | |
89a36810 AR |
1990 | return 1; |
1991 | } else { | |
1992 | return 0; | |
1993 | } | |
1994 | } | |
1995 | ||
1996 | /** | |
1997 | * pmcraid_soft_reset - performs a soft reset and makes IOA become ready | |
1998 | * @cmd : pointer to reset command block | |
1999 | * | |
2000 | * Return Value | |
2001 | * none | |
2002 | */ | |
2003 | static void pmcraid_soft_reset(struct pmcraid_cmd *cmd) | |
2004 | { | |
2005 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
2006 | u32 int_reg; | |
2007 | u32 doorbell; | |
2008 | ||
2009 | /* There will be an interrupt when Transition to Operational bit is | |
2010 | * set so tasklet would execute next reset task. The timeout handler | |
2011 | * would re-initiate a reset | |
2012 | */ | |
2013 | cmd->cmd_done = pmcraid_ioa_reset; | |
2014 | cmd->timer.data = (unsigned long)cmd; | |
2015 | cmd->timer.expires = jiffies + | |
2016 | msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT); | |
2017 | cmd->timer.function = (void (*)(unsigned long))pmcraid_timeout_handler; | |
2018 | ||
2019 | if (!timer_pending(&cmd->timer)) | |
2020 | add_timer(&cmd->timer); | |
2021 | ||
2022 | /* Enable destructive diagnostics on IOA if it is not yet in | |
2023 | * operational state | |
2024 | */ | |
2025 | doorbell = DOORBELL_RUNTIME_RESET | | |
2026 | DOORBELL_ENABLE_DESTRUCTIVE_DIAGS; | |
2027 | ||
c20c4267 AR |
2028 | /* Since we do RESET_ALERT and Start BIST we have to again write |
2029 | * MSIX Doorbell to indicate the interrupt mode | |
2030 | */ | |
2031 | if (pinstance->interrupt_mode) { | |
2032 | iowrite32(DOORBELL_INTR_MODE_MSIX, | |
2033 | pinstance->int_regs.host_ioa_interrupt_reg); | |
2034 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
2035 | } | |
2036 | ||
89a36810 | 2037 | iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg); |
c20c4267 | 2038 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg), |
89a36810 | 2039 | int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg); |
c20c4267 | 2040 | |
89a36810 AR |
2041 | pmcraid_info("Waiting for IOA to become operational %x:%x\n", |
2042 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg), | |
2043 | int_reg); | |
2044 | } | |
2045 | ||
2046 | /** | |
2047 | * pmcraid_get_dump - retrieves IOA dump in case of Unit Check interrupt | |
2048 | * | |
2049 | * @pinstance: pointer to adapter instance structure | |
2050 | * | |
2051 | * Return Value | |
2052 | * none | |
2053 | */ | |
2054 | static void pmcraid_get_dump(struct pmcraid_instance *pinstance) | |
2055 | { | |
2056 | pmcraid_info("%s is not yet implemented\n", __func__); | |
2057 | } | |
2058 | ||
2059 | /** | |
2060 | * pmcraid_fail_outstanding_cmds - Fails all outstanding ops. | |
2061 | * @pinstance: pointer to adapter instance structure | |
2062 | * | |
2063 | * This function fails all outstanding ops. If they are submitted to IOA | |
2064 | * already, it sends cancel all messages if IOA is still accepting IOARCBs, | |
2065 | * otherwise just completes the commands and returns the cmd blocks to free | |
2066 | * pool. | |
2067 | * | |
2068 | * Return value: | |
2069 | * none | |
2070 | */ | |
2071 | static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance) | |
2072 | { | |
2073 | struct pmcraid_cmd *cmd, *temp; | |
2074 | unsigned long lock_flags; | |
2075 | ||
2076 | /* pending command list is protected by pending_pool_lock. Its | |
2077 | * traversal must be done as within this lock | |
2078 | */ | |
2079 | spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags); | |
2080 | list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool, | |
2081 | free_list) { | |
2082 | list_del(&cmd->free_list); | |
2083 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, | |
2084 | lock_flags); | |
2085 | cmd->ioa_cb->ioasa.ioasc = | |
2086 | cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET); | |
2087 | cmd->ioa_cb->ioasa.ilid = | |
2088 | cpu_to_be32(PMCRAID_DRIVER_ILID); | |
2089 | ||
2090 | /* In case the command timer is still running */ | |
2091 | del_timer(&cmd->timer); | |
2092 | ||
2093 | /* If this is an IO command, complete it by invoking scsi_done | |
2094 | * function. If this is one of the internal commands other | |
2095 | * than pmcraid_ioa_reset and HCAM commands invoke cmd_done to | |
2096 | * complete it | |
2097 | */ | |
2098 | if (cmd->scsi_cmd) { | |
2099 | ||
2100 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
2101 | __le32 resp = cmd->ioa_cb->ioarcb.response_handle; | |
2102 | ||
2103 | scsi_cmd->result |= DID_ERROR << 16; | |
2104 | ||
2105 | scsi_dma_unmap(scsi_cmd); | |
2106 | pmcraid_return_cmd(cmd); | |
2107 | ||
89a36810 AR |
2108 | pmcraid_info("failing(%d) CDB[0] = %x result: %x\n", |
2109 | le32_to_cpu(resp) >> 2, | |
2110 | cmd->ioa_cb->ioarcb.cdb[0], | |
2111 | scsi_cmd->result); | |
2112 | scsi_cmd->scsi_done(scsi_cmd); | |
2113 | } else if (cmd->cmd_done == pmcraid_internal_done || | |
2114 | cmd->cmd_done == pmcraid_erp_done) { | |
2115 | cmd->cmd_done(cmd); | |
c20c4267 AR |
2116 | } else if (cmd->cmd_done != pmcraid_ioa_reset && |
2117 | cmd->cmd_done != pmcraid_ioa_shutdown_done) { | |
89a36810 AR |
2118 | pmcraid_return_cmd(cmd); |
2119 | } | |
2120 | ||
2121 | atomic_dec(&pinstance->outstanding_cmds); | |
2122 | spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags); | |
2123 | } | |
2124 | ||
2125 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags); | |
2126 | } | |
2127 | ||
2128 | /** | |
2129 | * pmcraid_ioa_reset - Implementation of IOA reset logic | |
2130 | * | |
2131 | * @cmd: pointer to the cmd block to be used for entire reset process | |
2132 | * | |
2133 | * This function executes most of the steps required for IOA reset. This gets | |
2134 | * called by user threads (modprobe/insmod/rmmod) timer, tasklet and midlayer's | |
25985edc | 2135 | * 'eh_' thread. Access to variables used for controlling the reset sequence is |
89a36810 AR |
2136 | * synchronized using host lock. Various functions called during reset process |
2137 | * would make use of a single command block, pointer to which is also stored in | |
2138 | * adapter instance structure. | |
2139 | * | |
2140 | * Return Value | |
2141 | * None | |
2142 | */ | |
2143 | static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd) | |
2144 | { | |
2145 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
2146 | u8 reset_complete = 0; | |
2147 | ||
2148 | pinstance->ioa_reset_in_progress = 1; | |
2149 | ||
2150 | if (pinstance->reset_cmd != cmd) { | |
2151 | pmcraid_err("reset is called with different command block\n"); | |
2152 | pinstance->reset_cmd = cmd; | |
2153 | } | |
2154 | ||
2155 | pmcraid_info("reset_engine: state = %d, command = %p\n", | |
2156 | pinstance->ioa_state, cmd); | |
2157 | ||
2158 | switch (pinstance->ioa_state) { | |
2159 | ||
2160 | case IOA_STATE_DEAD: | |
2161 | /* If IOA is offline, whatever may be the reset reason, just | |
2162 | * return. callers might be waiting on the reset wait_q, wake | |
2163 | * up them | |
2164 | */ | |
2165 | pmcraid_err("IOA is offline no reset is possible\n"); | |
2166 | reset_complete = 1; | |
2167 | break; | |
2168 | ||
2169 | case IOA_STATE_IN_BRINGDOWN: | |
2170 | /* we enter here, once ioa shutdown command is processed by IOA | |
2171 | * Alert IOA for a possible reset. If reset alert fails, IOA | |
2172 | * goes through hard-reset | |
2173 | */ | |
2174 | pmcraid_disable_interrupts(pinstance, ~0); | |
2175 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; | |
2176 | pmcraid_reset_alert(cmd); | |
2177 | break; | |
2178 | ||
2179 | case IOA_STATE_UNKNOWN: | |
2180 | /* We may be called during probe or resume. Some pre-processing | |
2181 | * is required for prior to reset | |
2182 | */ | |
2183 | scsi_block_requests(pinstance->host); | |
2184 | ||
2185 | /* If asked to reset while IOA was processing responses or | |
2186 | * there are any error responses then IOA may require | |
2187 | * hard-reset. | |
2188 | */ | |
2189 | if (pinstance->ioa_hard_reset == 0) { | |
2190 | if (ioread32(pinstance->ioa_status) & | |
2191 | INTRS_TRANSITION_TO_OPERATIONAL) { | |
2192 | pmcraid_info("sticky bit set, bring-up\n"); | |
2193 | pinstance->ioa_state = IOA_STATE_IN_BRINGUP; | |
2194 | pmcraid_reinit_cmdblk(cmd); | |
2195 | pmcraid_identify_hrrq(cmd); | |
2196 | } else { | |
2197 | pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET; | |
2198 | pmcraid_soft_reset(cmd); | |
2199 | } | |
2200 | } else { | |
2201 | /* Alert IOA of a possible reset and wait for critical | |
2202 | * operation in progress bit to reset | |
2203 | */ | |
2204 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; | |
2205 | pmcraid_reset_alert(cmd); | |
2206 | } | |
2207 | break; | |
2208 | ||
2209 | case IOA_STATE_IN_RESET_ALERT: | |
2210 | /* If critical operation in progress bit is reset or wait gets | |
2211 | * timed out, reset proceeds with starting BIST on the IOA. | |
2212 | * pmcraid_ioa_hard_reset keeps a count of reset attempts. If | |
2213 | * they are 3 or more, reset engine marks IOA dead and returns | |
2214 | */ | |
2215 | pinstance->ioa_state = IOA_STATE_IN_HARD_RESET; | |
2216 | pmcraid_start_bist(cmd); | |
2217 | break; | |
2218 | ||
2219 | case IOA_STATE_IN_HARD_RESET: | |
2220 | pinstance->ioa_reset_attempts++; | |
2221 | ||
2222 | /* retry reset if we haven't reached maximum allowed limit */ | |
2223 | if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) { | |
2224 | pinstance->ioa_reset_attempts = 0; | |
2225 | pmcraid_err("IOA didn't respond marking it as dead\n"); | |
2226 | pinstance->ioa_state = IOA_STATE_DEAD; | |
c20c4267 AR |
2227 | |
2228 | if (pinstance->ioa_bringdown) | |
2229 | pmcraid_notify_ioastate(pinstance, | |
2230 | PMC_DEVICE_EVENT_SHUTDOWN_FAILED); | |
2231 | else | |
2232 | pmcraid_notify_ioastate(pinstance, | |
2233 | PMC_DEVICE_EVENT_RESET_FAILED); | |
89a36810 AR |
2234 | reset_complete = 1; |
2235 | break; | |
2236 | } | |
2237 | ||
2238 | /* Once either bist or pci reset is done, restore PCI config | |
2239 | * space. If this fails, proceed with hard reset again | |
2240 | */ | |
1d3c16a8 | 2241 | pci_restore_state(pinstance->pdev); |
89a36810 AR |
2242 | |
2243 | /* fail all pending commands */ | |
2244 | pmcraid_fail_outstanding_cmds(pinstance); | |
2245 | ||
2246 | /* check if unit check is active, if so extract dump */ | |
2247 | if (pinstance->ioa_unit_check) { | |
2248 | pmcraid_info("unit check is active\n"); | |
2249 | pinstance->ioa_unit_check = 0; | |
2250 | pmcraid_get_dump(pinstance); | |
2251 | pinstance->ioa_reset_attempts--; | |
2252 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; | |
2253 | pmcraid_reset_alert(cmd); | |
2254 | break; | |
2255 | } | |
2256 | ||
2257 | /* if the reset reason is to bring-down the ioa, we might be | |
2258 | * done with the reset restore pci_config_space and complete | |
2259 | * the reset | |
2260 | */ | |
2261 | if (pinstance->ioa_bringdown) { | |
2262 | pmcraid_info("bringing down the adapter\n"); | |
2263 | pinstance->ioa_shutdown_type = SHUTDOWN_NONE; | |
2264 | pinstance->ioa_bringdown = 0; | |
2265 | pinstance->ioa_state = IOA_STATE_UNKNOWN; | |
c20c4267 AR |
2266 | pmcraid_notify_ioastate(pinstance, |
2267 | PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS); | |
89a36810 AR |
2268 | reset_complete = 1; |
2269 | } else { | |
2270 | /* bring-up IOA, so proceed with soft reset | |
2271 | * Reinitialize hrrq_buffers and their indices also | |
2272 | * enable interrupts after a pci_restore_state | |
2273 | */ | |
2274 | if (pmcraid_reset_enable_ioa(pinstance)) { | |
2275 | pinstance->ioa_state = IOA_STATE_IN_BRINGUP; | |
2276 | pmcraid_info("bringing up the adapter\n"); | |
2277 | pmcraid_reinit_cmdblk(cmd); | |
2278 | pmcraid_identify_hrrq(cmd); | |
2279 | } else { | |
2280 | pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET; | |
2281 | pmcraid_soft_reset(cmd); | |
2282 | } | |
2283 | } | |
2284 | break; | |
2285 | ||
2286 | case IOA_STATE_IN_SOFT_RESET: | |
2287 | /* TRANSITION TO OPERATIONAL is on so start initialization | |
2288 | * sequence | |
2289 | */ | |
2290 | pmcraid_info("In softreset proceeding with bring-up\n"); | |
2291 | pinstance->ioa_state = IOA_STATE_IN_BRINGUP; | |
2292 | ||
2293 | /* Initialization commands start with HRRQ identification. From | |
2294 | * now on tasklet completes most of the commands as IOA is up | |
2295 | * and intrs are enabled | |
2296 | */ | |
2297 | pmcraid_identify_hrrq(cmd); | |
2298 | break; | |
2299 | ||
2300 | case IOA_STATE_IN_BRINGUP: | |
2301 | /* we are done with bringing up of IOA, change the ioa_state to | |
2302 | * operational and wake up any waiters | |
2303 | */ | |
2304 | pinstance->ioa_state = IOA_STATE_OPERATIONAL; | |
2305 | reset_complete = 1; | |
2306 | break; | |
2307 | ||
2308 | case IOA_STATE_OPERATIONAL: | |
2309 | default: | |
2310 | /* When IOA is operational and a reset is requested, check for | |
2311 | * the reset reason. If reset is to bring down IOA, unregister | |
2312 | * HCAMs and initiate shutdown; if adapter reset is forced then | |
2313 | * restart reset sequence again | |
2314 | */ | |
2315 | if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE && | |
2316 | pinstance->force_ioa_reset == 0) { | |
c20c4267 AR |
2317 | pmcraid_notify_ioastate(pinstance, |
2318 | PMC_DEVICE_EVENT_RESET_SUCCESS); | |
89a36810 AR |
2319 | reset_complete = 1; |
2320 | } else { | |
2321 | if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE) | |
2322 | pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN; | |
2323 | pmcraid_reinit_cmdblk(cmd); | |
2324 | pmcraid_unregister_hcams(cmd); | |
2325 | } | |
2326 | break; | |
2327 | } | |
2328 | ||
2329 | /* reset will be completed if ioa_state is either DEAD or UNKNOWN or | |
2330 | * OPERATIONAL. Reset all control variables used during reset, wake up | |
2331 | * any waiting threads and let the SCSI mid-layer send commands. Note | |
2332 | * that host_lock must be held before invoking scsi_report_bus_reset. | |
2333 | */ | |
2334 | if (reset_complete) { | |
2335 | pinstance->ioa_reset_in_progress = 0; | |
2336 | pinstance->ioa_reset_attempts = 0; | |
2337 | pinstance->reset_cmd = NULL; | |
2338 | pinstance->ioa_shutdown_type = SHUTDOWN_NONE; | |
2339 | pinstance->ioa_bringdown = 0; | |
2340 | pmcraid_return_cmd(cmd); | |
2341 | ||
2342 | /* If target state is to bring up the adapter, proceed with | |
2343 | * hcam registration and resource exposure to mid-layer. | |
2344 | */ | |
2345 | if (pinstance->ioa_state == IOA_STATE_OPERATIONAL) | |
2346 | pmcraid_register_hcams(pinstance); | |
2347 | ||
2348 | wake_up_all(&pinstance->reset_wait_q); | |
2349 | } | |
2350 | ||
2351 | return; | |
2352 | } | |
2353 | ||
2354 | /** | |
2355 | * pmcraid_initiate_reset - initiates reset sequence. This is called from | |
2356 | * ISR/tasklet during error interrupts including IOA unit check. If reset | |
2357 | * is already in progress, it just returns, otherwise initiates IOA reset | |
2358 | * to bring IOA up to operational state. | |
2359 | * | |
2360 | * @pinstance: pointer to adapter instance structure | |
2361 | * | |
2362 | * Return value | |
2363 | * none | |
2364 | */ | |
2365 | static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance) | |
2366 | { | |
2367 | struct pmcraid_cmd *cmd; | |
2368 | ||
2369 | /* If the reset is already in progress, just return, otherwise start | |
2370 | * reset sequence and return | |
2371 | */ | |
2372 | if (!pinstance->ioa_reset_in_progress) { | |
2373 | scsi_block_requests(pinstance->host); | |
2374 | cmd = pmcraid_get_free_cmd(pinstance); | |
2375 | ||
2376 | if (cmd == NULL) { | |
2377 | pmcraid_err("no cmnd blocks for initiate_reset\n"); | |
2378 | return; | |
2379 | } | |
2380 | ||
2381 | pinstance->ioa_shutdown_type = SHUTDOWN_NONE; | |
2382 | pinstance->reset_cmd = cmd; | |
2383 | pinstance->force_ioa_reset = 1; | |
c20c4267 AR |
2384 | pmcraid_notify_ioastate(pinstance, |
2385 | PMC_DEVICE_EVENT_RESET_START); | |
89a36810 AR |
2386 | pmcraid_ioa_reset(cmd); |
2387 | } | |
2388 | } | |
2389 | ||
2390 | /** | |
2391 | * pmcraid_reset_reload - utility routine for doing IOA reset either to bringup | |
2392 | * or bringdown IOA | |
2393 | * @pinstance: pointer adapter instance structure | |
2394 | * @shutdown_type: shutdown type to be used NONE, NORMAL or ABRREV | |
2395 | * @target_state: expected target state after reset | |
2396 | * | |
2397 | * Note: This command initiates reset and waits for its completion. Hence this | |
2398 | * should not be called from isr/timer/tasklet functions (timeout handlers, | |
2399 | * error response handlers and interrupt handlers). | |
2400 | * | |
2401 | * Return Value | |
2402 | * 1 in case ioa_state is not target_state, 0 otherwise. | |
2403 | */ | |
2404 | static int pmcraid_reset_reload( | |
2405 | struct pmcraid_instance *pinstance, | |
2406 | u8 shutdown_type, | |
2407 | u8 target_state | |
2408 | ) | |
2409 | { | |
2410 | struct pmcraid_cmd *reset_cmd = NULL; | |
2411 | unsigned long lock_flags; | |
2412 | int reset = 1; | |
2413 | ||
2414 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
2415 | ||
2416 | if (pinstance->ioa_reset_in_progress) { | |
2417 | pmcraid_info("reset_reload: reset is already in progress\n"); | |
2418 | ||
2419 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2420 | ||
2421 | wait_event(pinstance->reset_wait_q, | |
2422 | !pinstance->ioa_reset_in_progress); | |
2423 | ||
2424 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
2425 | ||
2426 | if (pinstance->ioa_state == IOA_STATE_DEAD) { | |
2427 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
2428 | lock_flags); | |
2429 | pmcraid_info("reset_reload: IOA is dead\n"); | |
2430 | return reset; | |
2431 | } else if (pinstance->ioa_state == target_state) { | |
2432 | reset = 0; | |
2433 | } | |
2434 | } | |
2435 | ||
2436 | if (reset) { | |
2437 | pmcraid_info("reset_reload: proceeding with reset\n"); | |
2438 | scsi_block_requests(pinstance->host); | |
2439 | reset_cmd = pmcraid_get_free_cmd(pinstance); | |
2440 | ||
2441 | if (reset_cmd == NULL) { | |
2442 | pmcraid_err("no free cmnd for reset_reload\n"); | |
2443 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
2444 | lock_flags); | |
2445 | return reset; | |
2446 | } | |
2447 | ||
2448 | if (shutdown_type == SHUTDOWN_NORMAL) | |
2449 | pinstance->ioa_bringdown = 1; | |
2450 | ||
2451 | pinstance->ioa_shutdown_type = shutdown_type; | |
2452 | pinstance->reset_cmd = reset_cmd; | |
2453 | pinstance->force_ioa_reset = reset; | |
2454 | pmcraid_info("reset_reload: initiating reset\n"); | |
2455 | pmcraid_ioa_reset(reset_cmd); | |
2456 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2457 | pmcraid_info("reset_reload: waiting for reset to complete\n"); | |
2458 | wait_event(pinstance->reset_wait_q, | |
2459 | !pinstance->ioa_reset_in_progress); | |
2460 | ||
c20c4267 | 2461 | pmcraid_info("reset_reload: reset is complete !!\n"); |
89a36810 AR |
2462 | scsi_unblock_requests(pinstance->host); |
2463 | if (pinstance->ioa_state == target_state) | |
2464 | reset = 0; | |
2465 | } | |
2466 | ||
2467 | return reset; | |
2468 | } | |
2469 | ||
2470 | /** | |
2471 | * pmcraid_reset_bringdown - wrapper over pmcraid_reset_reload to bringdown IOA | |
2472 | * | |
2473 | * @pinstance: pointer to adapter instance structure | |
2474 | * | |
2475 | * Return Value | |
2476 | * whatever is returned from pmcraid_reset_reload | |
2477 | */ | |
2478 | static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance) | |
2479 | { | |
2480 | return pmcraid_reset_reload(pinstance, | |
2481 | SHUTDOWN_NORMAL, | |
2482 | IOA_STATE_UNKNOWN); | |
2483 | } | |
2484 | ||
2485 | /** | |
2486 | * pmcraid_reset_bringup - wrapper over pmcraid_reset_reload to bring up IOA | |
2487 | * | |
2488 | * @pinstance: pointer to adapter instance structure | |
2489 | * | |
2490 | * Return Value | |
2491 | * whatever is returned from pmcraid_reset_reload | |
2492 | */ | |
2493 | static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance) | |
2494 | { | |
c20c4267 AR |
2495 | pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START); |
2496 | ||
89a36810 AR |
2497 | return pmcraid_reset_reload(pinstance, |
2498 | SHUTDOWN_NONE, | |
2499 | IOA_STATE_OPERATIONAL); | |
2500 | } | |
2501 | ||
2502 | /** | |
2503 | * pmcraid_request_sense - Send request sense to a device | |
2504 | * @cmd: pmcraid command struct | |
2505 | * | |
2506 | * This function sends a request sense to a device as a result of a check | |
2507 | * condition. This method re-uses the same command block that failed earlier. | |
2508 | */ | |
2509 | static void pmcraid_request_sense(struct pmcraid_cmd *cmd) | |
2510 | { | |
2511 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
2512 | struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl; | |
2513 | ||
2514 | /* allocate DMAable memory for sense buffers */ | |
2515 | cmd->sense_buffer = pci_alloc_consistent(cmd->drv_inst->pdev, | |
2516 | SCSI_SENSE_BUFFERSIZE, | |
2517 | &cmd->sense_buffer_dma); | |
2518 | ||
2519 | if (cmd->sense_buffer == NULL) { | |
2520 | pmcraid_err | |
2521 | ("couldn't allocate sense buffer for request sense\n"); | |
2522 | pmcraid_erp_done(cmd); | |
2523 | return; | |
2524 | } | |
2525 | ||
2526 | /* re-use the command block */ | |
2527 | memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa)); | |
2528 | memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN); | |
2529 | ioarcb->request_flags0 = (SYNC_COMPLETE | | |
2530 | NO_LINK_DESCS | | |
2531 | INHIBIT_UL_CHECK); | |
2532 | ioarcb->request_type = REQ_TYPE_SCSI; | |
2533 | ioarcb->cdb[0] = REQUEST_SENSE; | |
2534 | ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE; | |
2535 | ||
2536 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
2537 | offsetof(struct pmcraid_ioarcb, | |
2538 | add_data.u.ioadl[0])); | |
2539 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
2540 | ||
2541 | ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE); | |
2542 | ||
2543 | ioadl->address = cpu_to_le64(cmd->sense_buffer_dma); | |
2544 | ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE); | |
88197966 | 2545 | ioadl->flags = IOADL_FLAGS_LAST_DESC; |
89a36810 AR |
2546 | |
2547 | /* request sense might be called as part of error response processing | |
2548 | * which runs in tasklets context. It is possible that mid-layer might | |
2549 | * schedule queuecommand during this time, hence, writting to IOARRIN | |
2550 | * must be protect by host_lock | |
2551 | */ | |
2552 | pmcraid_send_cmd(cmd, pmcraid_erp_done, | |
2553 | PMCRAID_REQUEST_SENSE_TIMEOUT, | |
2554 | pmcraid_timeout_handler); | |
2555 | } | |
2556 | ||
2557 | /** | |
2558 | * pmcraid_cancel_all - cancel all outstanding IOARCBs as part of error recovery | |
2559 | * @cmd: command that failed | |
2560 | * @sense: true if request_sense is required after cancel all | |
2561 | * | |
2562 | * This function sends a cancel all to a device to clear the queue. | |
2563 | */ | |
2564 | static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, u32 sense) | |
2565 | { | |
2566 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
2567 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
2568 | struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata; | |
2569 | void (*cmd_done) (struct pmcraid_cmd *) = sense ? pmcraid_erp_done | |
2570 | : pmcraid_request_sense; | |
2571 | ||
2572 | memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN); | |
2573 | ioarcb->request_flags0 = SYNC_OVERRIDE; | |
2574 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
2575 | ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS; | |
2576 | ||
2577 | if (RES_IS_GSCSI(res->cfg_entry)) | |
2578 | ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL; | |
2579 | ||
2580 | ioarcb->ioadl_bus_addr = 0; | |
2581 | ioarcb->ioadl_length = 0; | |
2582 | ioarcb->data_transfer_length = 0; | |
2583 | ioarcb->ioarcb_bus_addr &= (~0x1FULL); | |
2584 | ||
2585 | /* writing to IOARRIN must be protected by host_lock, as mid-layer | |
2586 | * schedule queuecommand while we are doing this | |
2587 | */ | |
2588 | pmcraid_send_cmd(cmd, cmd_done, | |
2589 | PMCRAID_REQUEST_SENSE_TIMEOUT, | |
2590 | pmcraid_timeout_handler); | |
2591 | } | |
2592 | ||
2593 | /** | |
2594 | * pmcraid_frame_auto_sense: frame fixed format sense information | |
2595 | * | |
2596 | * @cmd: pointer to failing command block | |
2597 | * | |
2598 | * Return value | |
2599 | * none | |
2600 | */ | |
2601 | static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd) | |
2602 | { | |
2603 | u8 *sense_buf = cmd->scsi_cmd->sense_buffer; | |
2604 | struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata; | |
2605 | struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa; | |
2606 | u32 ioasc = le32_to_cpu(ioasa->ioasc); | |
2607 | u32 failing_lba = 0; | |
2608 | ||
2609 | memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE); | |
2610 | cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION; | |
2611 | ||
2612 | if (RES_IS_VSET(res->cfg_entry) && | |
2613 | ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC && | |
2614 | ioasa->u.vset.failing_lba_hi != 0) { | |
2615 | ||
2616 | sense_buf[0] = 0x72; | |
2617 | sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc); | |
2618 | sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc); | |
2619 | sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc); | |
2620 | ||
2621 | sense_buf[7] = 12; | |
2622 | sense_buf[8] = 0; | |
2623 | sense_buf[9] = 0x0A; | |
2624 | sense_buf[10] = 0x80; | |
2625 | ||
2626 | failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi); | |
2627 | ||
2628 | sense_buf[12] = (failing_lba & 0xff000000) >> 24; | |
2629 | sense_buf[13] = (failing_lba & 0x00ff0000) >> 16; | |
2630 | sense_buf[14] = (failing_lba & 0x0000ff00) >> 8; | |
2631 | sense_buf[15] = failing_lba & 0x000000ff; | |
2632 | ||
2633 | failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo); | |
2634 | ||
2635 | sense_buf[16] = (failing_lba & 0xff000000) >> 24; | |
2636 | sense_buf[17] = (failing_lba & 0x00ff0000) >> 16; | |
2637 | sense_buf[18] = (failing_lba & 0x0000ff00) >> 8; | |
2638 | sense_buf[19] = failing_lba & 0x000000ff; | |
2639 | } else { | |
2640 | sense_buf[0] = 0x70; | |
2641 | sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc); | |
2642 | sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc); | |
2643 | sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc); | |
2644 | ||
2645 | if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) { | |
2646 | if (RES_IS_VSET(res->cfg_entry)) | |
2647 | failing_lba = | |
2648 | le32_to_cpu(ioasa->u. | |
2649 | vset.failing_lba_lo); | |
2650 | sense_buf[0] |= 0x80; | |
2651 | sense_buf[3] = (failing_lba >> 24) & 0xff; | |
2652 | sense_buf[4] = (failing_lba >> 16) & 0xff; | |
2653 | sense_buf[5] = (failing_lba >> 8) & 0xff; | |
2654 | sense_buf[6] = failing_lba & 0xff; | |
2655 | } | |
2656 | ||
2657 | sense_buf[7] = 6; /* additional length */ | |
2658 | } | |
2659 | } | |
2660 | ||
2661 | /** | |
2662 | * pmcraid_error_handler - Error response handlers for a SCSI op | |
2663 | * @cmd: pointer to pmcraid_cmd that has failed | |
2664 | * | |
2665 | * This function determines whether or not to initiate ERP on the affected | |
2666 | * device. This is called from a tasklet, which doesn't hold any locks. | |
2667 | * | |
2668 | * Return value: | |
2669 | * 0 it caller can complete the request, otherwise 1 where in error | |
2670 | * handler itself completes the request and returns the command block | |
2671 | * back to free-pool | |
2672 | */ | |
2673 | static int pmcraid_error_handler(struct pmcraid_cmd *cmd) | |
2674 | { | |
2675 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
2676 | struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata; | |
2677 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
2678 | struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa; | |
2679 | u32 ioasc = le32_to_cpu(ioasa->ioasc); | |
2680 | u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK; | |
2681 | u32 sense_copied = 0; | |
2682 | ||
2683 | if (!res) { | |
2684 | pmcraid_info("resource pointer is NULL\n"); | |
2685 | return 0; | |
2686 | } | |
2687 | ||
2688 | /* If this was a SCSI read/write command keep count of errors */ | |
2689 | if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD) | |
2690 | atomic_inc(&res->read_failures); | |
2691 | else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD) | |
2692 | atomic_inc(&res->write_failures); | |
2693 | ||
2694 | if (!RES_IS_GSCSI(res->cfg_entry) && | |
2695 | masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) { | |
2696 | pmcraid_frame_auto_sense(cmd); | |
2697 | } | |
2698 | ||
2699 | /* Log IOASC/IOASA information based on user settings */ | |
2700 | pmcraid_ioasc_logger(ioasc, cmd); | |
2701 | ||
2702 | switch (masked_ioasc) { | |
2703 | ||
2704 | case PMCRAID_IOASC_AC_TERMINATED_BY_HOST: | |
2705 | scsi_cmd->result |= (DID_ABORT << 16); | |
2706 | break; | |
2707 | ||
2708 | case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE: | |
2709 | case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE: | |
2710 | scsi_cmd->result |= (DID_NO_CONNECT << 16); | |
2711 | break; | |
2712 | ||
2713 | case PMCRAID_IOASC_NR_SYNC_REQUIRED: | |
2714 | res->sync_reqd = 1; | |
2715 | scsi_cmd->result |= (DID_IMM_RETRY << 16); | |
2716 | break; | |
2717 | ||
2718 | case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC: | |
2719 | scsi_cmd->result |= (DID_PASSTHROUGH << 16); | |
2720 | break; | |
2721 | ||
2722 | case PMCRAID_IOASC_UA_BUS_WAS_RESET: | |
2723 | case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER: | |
2724 | if (!res->reset_progress) | |
2725 | scsi_report_bus_reset(pinstance->host, | |
2726 | scsi_cmd->device->channel); | |
2727 | scsi_cmd->result |= (DID_ERROR << 16); | |
2728 | break; | |
2729 | ||
2730 | case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR: | |
2731 | scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc); | |
2732 | res->sync_reqd = 1; | |
2733 | ||
2734 | /* if check_condition is not active return with error otherwise | |
2735 | * get/frame the sense buffer | |
2736 | */ | |
2737 | if (PMCRAID_IOASC_SENSE_STATUS(ioasc) != | |
2738 | SAM_STAT_CHECK_CONDITION && | |
2739 | PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE) | |
2740 | return 0; | |
2741 | ||
2742 | /* If we have auto sense data as part of IOASA pass it to | |
2743 | * mid-layer | |
2744 | */ | |
2745 | if (ioasa->auto_sense_length != 0) { | |
2746 | short sense_len = ioasa->auto_sense_length; | |
2747 | int data_size = min_t(u16, le16_to_cpu(sense_len), | |
2748 | SCSI_SENSE_BUFFERSIZE); | |
2749 | ||
2750 | memcpy(scsi_cmd->sense_buffer, | |
2751 | ioasa->sense_data, | |
2752 | data_size); | |
2753 | sense_copied = 1; | |
2754 | } | |
2755 | ||
a70757ba | 2756 | if (RES_IS_GSCSI(res->cfg_entry)) |
89a36810 | 2757 | pmcraid_cancel_all(cmd, sense_copied); |
a70757ba | 2758 | else if (sense_copied) |
89a36810 | 2759 | pmcraid_erp_done(cmd); |
a70757ba | 2760 | else |
89a36810 | 2761 | pmcraid_request_sense(cmd); |
89a36810 AR |
2762 | |
2763 | return 1; | |
2764 | ||
2765 | case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED: | |
2766 | break; | |
2767 | ||
2768 | default: | |
2769 | if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR) | |
2770 | scsi_cmd->result |= (DID_ERROR << 16); | |
2771 | break; | |
2772 | } | |
2773 | return 0; | |
2774 | } | |
2775 | ||
2776 | /** | |
2777 | * pmcraid_reset_device - device reset handler functions | |
2778 | * | |
2779 | * @scsi_cmd: scsi command struct | |
2780 | * @modifier: reset modifier indicating the reset sequence to be performed | |
2781 | * | |
2782 | * This function issues a device reset to the affected device. | |
2783 | * A LUN reset will be sent to the device first. If that does | |
2784 | * not work, a target reset will be sent. | |
2785 | * | |
2786 | * Return value: | |
2787 | * SUCCESS / FAILED | |
2788 | */ | |
2789 | static int pmcraid_reset_device( | |
2790 | struct scsi_cmnd *scsi_cmd, | |
2791 | unsigned long timeout, | |
2792 | u8 modifier | |
2793 | ) | |
2794 | { | |
2795 | struct pmcraid_cmd *cmd; | |
2796 | struct pmcraid_instance *pinstance; | |
2797 | struct pmcraid_resource_entry *res; | |
2798 | struct pmcraid_ioarcb *ioarcb; | |
2799 | unsigned long lock_flags; | |
2800 | u32 ioasc; | |
2801 | ||
2802 | pinstance = | |
2803 | (struct pmcraid_instance *)scsi_cmd->device->host->hostdata; | |
2804 | res = scsi_cmd->device->hostdata; | |
2805 | ||
2806 | if (!res) { | |
34876402 AR |
2807 | sdev_printk(KERN_ERR, scsi_cmd->device, |
2808 | "reset_device: NULL resource pointer\n"); | |
89a36810 AR |
2809 | return FAILED; |
2810 | } | |
2811 | ||
2812 | /* If adapter is currently going through reset/reload, return failed. | |
2813 | * This will force the mid-layer to call _eh_bus/host reset, which | |
2814 | * will then go to sleep and wait for the reset to complete | |
2815 | */ | |
2816 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
2817 | if (pinstance->ioa_reset_in_progress || | |
2818 | pinstance->ioa_state == IOA_STATE_DEAD) { | |
2819 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2820 | return FAILED; | |
2821 | } | |
2822 | ||
2823 | res->reset_progress = 1; | |
2824 | pmcraid_info("Resetting %s resource with addr %x\n", | |
2825 | ((modifier & RESET_DEVICE_LUN) ? "LUN" : | |
2826 | ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")), | |
2827 | le32_to_cpu(res->cfg_entry.resource_address)); | |
2828 | ||
2829 | /* get a free cmd block */ | |
2830 | cmd = pmcraid_get_free_cmd(pinstance); | |
2831 | ||
2832 | if (cmd == NULL) { | |
2833 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2834 | pmcraid_err("%s: no cmd blocks are available\n", __func__); | |
2835 | return FAILED; | |
2836 | } | |
2837 | ||
2838 | ioarcb = &cmd->ioa_cb->ioarcb; | |
2839 | ioarcb->resource_handle = res->cfg_entry.resource_handle; | |
2840 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
2841 | ioarcb->cdb[0] = PMCRAID_RESET_DEVICE; | |
2842 | ||
2843 | /* Initialize reset modifier bits */ | |
2844 | if (modifier) | |
2845 | modifier = ENABLE_RESET_MODIFIER | modifier; | |
2846 | ||
2847 | ioarcb->cdb[1] = modifier; | |
2848 | ||
2849 | init_completion(&cmd->wait_for_completion); | |
2850 | cmd->completion_req = 1; | |
2851 | ||
2852 | pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n", | |
2853 | cmd->ioa_cb->ioarcb.cdb[0], | |
2854 | le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle), | |
2855 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2); | |
2856 | ||
2857 | pmcraid_send_cmd(cmd, | |
2858 | pmcraid_internal_done, | |
2859 | timeout, | |
2860 | pmcraid_timeout_handler); | |
2861 | ||
2862 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2863 | ||
2864 | /* RESET_DEVICE command completes after all pending IOARCBs are | |
2865 | * completed. Once this command is completed, pmcraind_internal_done | |
2866 | * will wake up the 'completion' queue. | |
2867 | */ | |
2868 | wait_for_completion(&cmd->wait_for_completion); | |
2869 | ||
2870 | /* complete the command here itself and return the command block | |
2871 | * to free list | |
2872 | */ | |
2873 | pmcraid_return_cmd(cmd); | |
2874 | res->reset_progress = 0; | |
2875 | ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
2876 | ||
2877 | /* set the return value based on the returned ioasc */ | |
2878 | return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS; | |
2879 | } | |
2880 | ||
2881 | /** | |
2882 | * _pmcraid_io_done - helper for pmcraid_io_done function | |
2883 | * | |
2884 | * @cmd: pointer to pmcraid command struct | |
2885 | * @reslen: residual data length to be set in the ioasa | |
2886 | * @ioasc: ioasc either returned by IOA or set by driver itself. | |
2887 | * | |
2888 | * This function is invoked by pmcraid_io_done to complete mid-layer | |
2889 | * scsi ops. | |
2890 | * | |
2891 | * Return value: | |
2892 | * 0 if caller is required to return it to free_pool. Returns 1 if | |
2893 | * caller need not worry about freeing command block as error handler | |
2894 | * will take care of that. | |
2895 | */ | |
2896 | ||
2897 | static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc) | |
2898 | { | |
2899 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
2900 | int rc = 0; | |
2901 | ||
2902 | scsi_set_resid(scsi_cmd, reslen); | |
2903 | ||
2904 | pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n", | |
2905 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2, | |
2906 | cmd->ioa_cb->ioarcb.cdb[0], | |
2907 | ioasc, scsi_cmd->result); | |
2908 | ||
2909 | if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0) | |
2910 | rc = pmcraid_error_handler(cmd); | |
2911 | ||
2912 | if (rc == 0) { | |
2913 | scsi_dma_unmap(scsi_cmd); | |
2914 | scsi_cmd->scsi_done(scsi_cmd); | |
2915 | } | |
2916 | ||
2917 | return rc; | |
2918 | } | |
2919 | ||
2920 | /** | |
2921 | * pmcraid_io_done - SCSI completion function | |
2922 | * | |
2923 | * @cmd: pointer to pmcraid command struct | |
2924 | * | |
2925 | * This function is invoked by tasklet/mid-layer error handler to completing | |
2926 | * the SCSI ops sent from mid-layer. | |
2927 | * | |
2928 | * Return value | |
2929 | * none | |
2930 | */ | |
2931 | ||
2932 | static void pmcraid_io_done(struct pmcraid_cmd *cmd) | |
2933 | { | |
2934 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
2935 | u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length); | |
2936 | ||
2937 | if (_pmcraid_io_done(cmd, reslen, ioasc) == 0) | |
2938 | pmcraid_return_cmd(cmd); | |
2939 | } | |
2940 | ||
2941 | /** | |
2942 | * pmcraid_abort_cmd - Aborts a single IOARCB already submitted to IOA | |
2943 | * | |
2944 | * @cmd: command block of the command to be aborted | |
2945 | * | |
2946 | * Return Value: | |
2947 | * returns pointer to command structure used as cancelling cmd | |
2948 | */ | |
2949 | static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd) | |
2950 | { | |
2951 | struct pmcraid_cmd *cancel_cmd; | |
2952 | struct pmcraid_instance *pinstance; | |
2953 | struct pmcraid_resource_entry *res; | |
2954 | ||
2955 | pinstance = (struct pmcraid_instance *)cmd->drv_inst; | |
2956 | res = cmd->scsi_cmd->device->hostdata; | |
2957 | ||
2958 | cancel_cmd = pmcraid_get_free_cmd(pinstance); | |
2959 | ||
2960 | if (cancel_cmd == NULL) { | |
2961 | pmcraid_err("%s: no cmd blocks are available\n", __func__); | |
2962 | return NULL; | |
2963 | } | |
2964 | ||
2965 | pmcraid_prepare_cancel_cmd(cancel_cmd, cmd); | |
2966 | ||
2967 | pmcraid_info("aborting command CDB[0]= %x with index = %d\n", | |
2968 | cmd->ioa_cb->ioarcb.cdb[0], | |
2969 | cmd->ioa_cb->ioarcb.response_handle >> 2); | |
2970 | ||
2971 | init_completion(&cancel_cmd->wait_for_completion); | |
2972 | cancel_cmd->completion_req = 1; | |
2973 | ||
2974 | pmcraid_info("command (%d) CDB[0] = %x for %x\n", | |
2975 | le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2, | |
c20c4267 | 2976 | cancel_cmd->ioa_cb->ioarcb.cdb[0], |
89a36810 AR |
2977 | le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle)); |
2978 | ||
2979 | pmcraid_send_cmd(cancel_cmd, | |
2980 | pmcraid_internal_done, | |
2981 | PMCRAID_INTERNAL_TIMEOUT, | |
2982 | pmcraid_timeout_handler); | |
2983 | return cancel_cmd; | |
2984 | } | |
2985 | ||
2986 | /** | |
2987 | * pmcraid_abort_complete - Waits for ABORT TASK completion | |
2988 | * | |
2989 | * @cancel_cmd: command block use as cancelling command | |
2990 | * | |
2991 | * Return Value: | |
2992 | * returns SUCCESS if ABORT TASK has good completion | |
2993 | * otherwise FAILED | |
2994 | */ | |
2995 | static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd) | |
2996 | { | |
2997 | struct pmcraid_resource_entry *res; | |
2998 | u32 ioasc; | |
2999 | ||
3000 | wait_for_completion(&cancel_cmd->wait_for_completion); | |
c20c4267 AR |
3001 | res = cancel_cmd->res; |
3002 | cancel_cmd->res = NULL; | |
89a36810 AR |
3003 | ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc); |
3004 | ||
3005 | /* If the abort task is not timed out we will get a Good completion | |
3006 | * as sense_key, otherwise we may get one the following responses | |
25985edc | 3007 | * due to subsequent bus reset or device reset. In case IOASC is |
89a36810 AR |
3008 | * NR_SYNC_REQUIRED, set sync_reqd flag for the corresponding resource |
3009 | */ | |
3010 | if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET || | |
3011 | ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) { | |
3012 | if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) | |
3013 | res->sync_reqd = 1; | |
3014 | ioasc = 0; | |
3015 | } | |
3016 | ||
3017 | /* complete the command here itself */ | |
3018 | pmcraid_return_cmd(cancel_cmd); | |
3019 | return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS; | |
3020 | } | |
3021 | ||
3022 | /** | |
3023 | * pmcraid_eh_abort_handler - entry point for aborting a single task on errors | |
3024 | * | |
3025 | * @scsi_cmd: scsi command struct given by mid-layer. When this is called | |
3026 | * mid-layer ensures that no other commands are queued. This | |
3027 | * never gets called under interrupt, but a separate eh thread. | |
3028 | * | |
3029 | * Return value: | |
3030 | * SUCCESS / FAILED | |
3031 | */ | |
3032 | static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd) | |
3033 | { | |
3034 | struct pmcraid_instance *pinstance; | |
3035 | struct pmcraid_cmd *cmd; | |
3036 | struct pmcraid_resource_entry *res; | |
3037 | unsigned long host_lock_flags; | |
3038 | unsigned long pending_lock_flags; | |
3039 | struct pmcraid_cmd *cancel_cmd = NULL; | |
3040 | int cmd_found = 0; | |
3041 | int rc = FAILED; | |
3042 | ||
3043 | pinstance = | |
3044 | (struct pmcraid_instance *)scsi_cmd->device->host->hostdata; | |
3045 | ||
34876402 AR |
3046 | scmd_printk(KERN_INFO, scsi_cmd, |
3047 | "I/O command timed out, aborting it.\n"); | |
89a36810 AR |
3048 | |
3049 | res = scsi_cmd->device->hostdata; | |
3050 | ||
3051 | if (res == NULL) | |
3052 | return rc; | |
3053 | ||
3054 | /* If we are currently going through reset/reload, return failed. | |
3055 | * This will force the mid-layer to eventually call | |
3056 | * pmcraid_eh_host_reset which will then go to sleep and wait for the | |
3057 | * reset to complete | |
3058 | */ | |
3059 | spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags); | |
3060 | ||
3061 | if (pinstance->ioa_reset_in_progress || | |
3062 | pinstance->ioa_state == IOA_STATE_DEAD) { | |
3063 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
3064 | host_lock_flags); | |
3065 | return rc; | |
3066 | } | |
3067 | ||
3068 | /* loop over pending cmd list to find cmd corresponding to this | |
3069 | * scsi_cmd. Note that this command might not have been completed | |
3070 | * already. locking: all pending commands are protected with | |
3071 | * pending_pool_lock. | |
3072 | */ | |
3073 | spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags); | |
3074 | list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) { | |
3075 | ||
3076 | if (cmd->scsi_cmd == scsi_cmd) { | |
3077 | cmd_found = 1; | |
3078 | break; | |
3079 | } | |
3080 | } | |
3081 | ||
3082 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, | |
3083 | pending_lock_flags); | |
3084 | ||
3085 | /* If the command to be aborted was given to IOA and still pending with | |
3086 | * it, send ABORT_TASK to abort this and wait for its completion | |
3087 | */ | |
3088 | if (cmd_found) | |
3089 | cancel_cmd = pmcraid_abort_cmd(cmd); | |
3090 | ||
3091 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
3092 | host_lock_flags); | |
3093 | ||
3094 | if (cancel_cmd) { | |
c20c4267 | 3095 | cancel_cmd->res = cmd->scsi_cmd->device->hostdata; |
89a36810 AR |
3096 | rc = pmcraid_abort_complete(cancel_cmd); |
3097 | } | |
3098 | ||
3099 | return cmd_found ? rc : SUCCESS; | |
3100 | } | |
3101 | ||
3102 | /** | |
3103 | * pmcraid_eh_xxxx_reset_handler - bus/target/device reset handler callbacks | |
3104 | * | |
3105 | * @scmd: pointer to scsi_cmd that was sent to the resource to be reset. | |
3106 | * | |
3107 | * All these routines invokve pmcraid_reset_device with appropriate parameters. | |
3108 | * Since these are called from mid-layer EH thread, no other IO will be queued | |
3109 | * to the resource being reset. However, control path (IOCTL) may be active so | |
3110 | * it is necessary to synchronize IOARRIN writes which pmcraid_reset_device | |
3111 | * takes care by locking/unlocking host_lock. | |
3112 | * | |
3113 | * Return value | |
c20c4267 | 3114 | * SUCCESS or FAILED |
89a36810 AR |
3115 | */ |
3116 | static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd) | |
3117 | { | |
34876402 AR |
3118 | scmd_printk(KERN_INFO, scmd, |
3119 | "resetting device due to an I/O command timeout.\n"); | |
89a36810 AR |
3120 | return pmcraid_reset_device(scmd, |
3121 | PMCRAID_INTERNAL_TIMEOUT, | |
3122 | RESET_DEVICE_LUN); | |
3123 | } | |
3124 | ||
3125 | static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd) | |
3126 | { | |
34876402 AR |
3127 | scmd_printk(KERN_INFO, scmd, |
3128 | "Doing bus reset due to an I/O command timeout.\n"); | |
89a36810 AR |
3129 | return pmcraid_reset_device(scmd, |
3130 | PMCRAID_RESET_BUS_TIMEOUT, | |
3131 | RESET_DEVICE_BUS); | |
3132 | } | |
3133 | ||
3134 | static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd) | |
3135 | { | |
34876402 AR |
3136 | scmd_printk(KERN_INFO, scmd, |
3137 | "Doing target reset due to an I/O command timeout.\n"); | |
89a36810 AR |
3138 | return pmcraid_reset_device(scmd, |
3139 | PMCRAID_INTERNAL_TIMEOUT, | |
3140 | RESET_DEVICE_TARGET); | |
3141 | } | |
3142 | ||
3143 | /** | |
3144 | * pmcraid_eh_host_reset_handler - adapter reset handler callback | |
3145 | * | |
3146 | * @scmd: pointer to scsi_cmd that was sent to a resource of adapter | |
3147 | * | |
3148 | * Initiates adapter reset to bring it up to operational state | |
3149 | * | |
3150 | * Return value | |
c20c4267 | 3151 | * SUCCESS or FAILED |
89a36810 AR |
3152 | */ |
3153 | static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd) | |
3154 | { | |
3155 | unsigned long interval = 10000; /* 10 seconds interval */ | |
3156 | int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval; | |
3157 | struct pmcraid_instance *pinstance = | |
3158 | (struct pmcraid_instance *)(scmd->device->host->hostdata); | |
3159 | ||
3160 | ||
3161 | /* wait for an additional 150 seconds just in case firmware could come | |
3162 | * up and if it could complete all the pending commands excluding the | |
3163 | * two HCAM (CCN and LDN). | |
3164 | */ | |
3165 | while (waits--) { | |
3166 | if (atomic_read(&pinstance->outstanding_cmds) <= | |
3167 | PMCRAID_MAX_HCAM_CMD) | |
3168 | return SUCCESS; | |
3169 | msleep(interval); | |
3170 | } | |
3171 | ||
3172 | dev_err(&pinstance->pdev->dev, | |
3173 | "Adapter being reset due to an I/O command timeout.\n"); | |
3174 | return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED; | |
3175 | } | |
3176 | ||
3177 | /** | |
3178 | * pmcraid_task_attributes - Translate SPI Q-Tags to task attributes | |
3179 | * @scsi_cmd: scsi command struct | |
3180 | * | |
3181 | * Return value | |
3182 | * number of tags or 0 if the task is not tagged | |
3183 | */ | |
3184 | static u8 pmcraid_task_attributes(struct scsi_cmnd *scsi_cmd) | |
3185 | { | |
3186 | char tag[2]; | |
3187 | u8 rc = 0; | |
3188 | ||
3189 | if (scsi_populate_tag_msg(scsi_cmd, tag)) { | |
3190 | switch (tag[0]) { | |
3191 | case MSG_SIMPLE_TAG: | |
3192 | rc = TASK_TAG_SIMPLE; | |
3193 | break; | |
3194 | case MSG_HEAD_TAG: | |
3195 | rc = TASK_TAG_QUEUE_HEAD; | |
3196 | break; | |
3197 | case MSG_ORDERED_TAG: | |
3198 | rc = TASK_TAG_ORDERED; | |
3199 | break; | |
3200 | }; | |
3201 | } | |
3202 | ||
3203 | return rc; | |
3204 | } | |
3205 | ||
3206 | ||
3207 | /** | |
3208 | * pmcraid_init_ioadls - initializes IOADL related fields in IOARCB | |
3209 | * @cmd: pmcraid command struct | |
3210 | * @sgcount: count of scatter-gather elements | |
3211 | * | |
3212 | * Return value | |
3213 | * returns pointer pmcraid_ioadl_desc, initialized to point to internal | |
3214 | * or external IOADLs | |
3215 | */ | |
3216 | struct pmcraid_ioadl_desc * | |
3217 | pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount) | |
3218 | { | |
3219 | struct pmcraid_ioadl_desc *ioadl; | |
3220 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
3221 | int ioadl_count = 0; | |
3222 | ||
3223 | if (ioarcb->add_cmd_param_length) | |
3224 | ioadl_count = DIV_ROUND_UP(ioarcb->add_cmd_param_length, 16); | |
3225 | ioarcb->ioadl_length = | |
3226 | sizeof(struct pmcraid_ioadl_desc) * sgcount; | |
3227 | ||
3228 | if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) { | |
3229 | /* external ioadls start at offset 0x80 from control_block | |
3230 | * structure, re-using 24 out of 27 ioadls part of IOARCB. | |
3231 | * It is necessary to indicate to firmware that driver is | |
3232 | * using ioadls to be treated as external to IOARCB. | |
3233 | */ | |
3234 | ioarcb->ioarcb_bus_addr &= ~(0x1FULL); | |
3235 | ioarcb->ioadl_bus_addr = | |
3236 | cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
3237 | offsetof(struct pmcraid_ioarcb, | |
3238 | add_data.u.ioadl[3])); | |
3239 | ioadl = &ioarcb->add_data.u.ioadl[3]; | |
3240 | } else { | |
3241 | ioarcb->ioadl_bus_addr = | |
3242 | cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
3243 | offsetof(struct pmcraid_ioarcb, | |
3244 | add_data.u.ioadl[ioadl_count])); | |
3245 | ||
3246 | ioadl = &ioarcb->add_data.u.ioadl[ioadl_count]; | |
3247 | ioarcb->ioarcb_bus_addr |= | |
3248 | DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8); | |
3249 | } | |
3250 | ||
3251 | return ioadl; | |
3252 | } | |
3253 | ||
3254 | /** | |
3255 | * pmcraid_build_ioadl - Build a scatter/gather list and map the buffer | |
3256 | * @pinstance: pointer to adapter instance structure | |
3257 | * @cmd: pmcraid command struct | |
3258 | * | |
3259 | * This function is invoked by queuecommand entry point while sending a command | |
3260 | * to firmware. This builds ioadl descriptors and sets up ioarcb fields. | |
3261 | * | |
3262 | * Return value: | |
c20c4267 | 3263 | * 0 on success or -1 on failure |
89a36810 AR |
3264 | */ |
3265 | static int pmcraid_build_ioadl( | |
3266 | struct pmcraid_instance *pinstance, | |
3267 | struct pmcraid_cmd *cmd | |
3268 | ) | |
3269 | { | |
3270 | int i, nseg; | |
3271 | struct scatterlist *sglist; | |
3272 | ||
3273 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
3274 | struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb); | |
3275 | struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl; | |
3276 | ||
3277 | u32 length = scsi_bufflen(scsi_cmd); | |
3278 | ||
3279 | if (!length) | |
3280 | return 0; | |
3281 | ||
3282 | nseg = scsi_dma_map(scsi_cmd); | |
3283 | ||
3284 | if (nseg < 0) { | |
34876402 | 3285 | scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n"); |
89a36810 AR |
3286 | return -1; |
3287 | } else if (nseg > PMCRAID_MAX_IOADLS) { | |
3288 | scsi_dma_unmap(scsi_cmd); | |
34876402 | 3289 | scmd_printk(KERN_ERR, scsi_cmd, |
89a36810 AR |
3290 | "sg count is (%d) more than allowed!\n", nseg); |
3291 | return -1; | |
3292 | } | |
3293 | ||
3294 | /* Initialize IOARCB data transfer length fields */ | |
3295 | if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) | |
3296 | ioarcb->request_flags0 |= TRANSFER_DIR_WRITE; | |
3297 | ||
3298 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
3299 | ioarcb->data_transfer_length = cpu_to_le32(length); | |
3300 | ioadl = pmcraid_init_ioadls(cmd, nseg); | |
3301 | ||
3302 | /* Initialize IOADL descriptor addresses */ | |
3303 | scsi_for_each_sg(scsi_cmd, sglist, nseg, i) { | |
3304 | ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist)); | |
3305 | ioadl[i].address = cpu_to_le64(sg_dma_address(sglist)); | |
3306 | ioadl[i].flags = 0; | |
3307 | } | |
3308 | /* setup last descriptor */ | |
88197966 | 3309 | ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC; |
89a36810 AR |
3310 | |
3311 | return 0; | |
3312 | } | |
3313 | ||
3314 | /** | |
3315 | * pmcraid_free_sglist - Frees an allocated SG buffer list | |
3316 | * @sglist: scatter/gather list pointer | |
3317 | * | |
3318 | * Free a DMA'able memory previously allocated with pmcraid_alloc_sglist | |
3319 | * | |
3320 | * Return value: | |
c20c4267 | 3321 | * none |
89a36810 AR |
3322 | */ |
3323 | static void pmcraid_free_sglist(struct pmcraid_sglist *sglist) | |
3324 | { | |
3325 | int i; | |
3326 | ||
3327 | for (i = 0; i < sglist->num_sg; i++) | |
3328 | __free_pages(sg_page(&(sglist->scatterlist[i])), | |
3329 | sglist->order); | |
3330 | ||
3331 | kfree(sglist); | |
3332 | } | |
3333 | ||
3334 | /** | |
3335 | * pmcraid_alloc_sglist - Allocates memory for a SG list | |
3336 | * @buflen: buffer length | |
3337 | * | |
3338 | * Allocates a DMA'able buffer in chunks and assembles a scatter/gather | |
3339 | * list. | |
3340 | * | |
3341 | * Return value | |
c20c4267 | 3342 | * pointer to sglist / NULL on failure |
89a36810 AR |
3343 | */ |
3344 | static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen) | |
3345 | { | |
3346 | struct pmcraid_sglist *sglist; | |
3347 | struct scatterlist *scatterlist; | |
3348 | struct page *page; | |
3349 | int num_elem, i, j; | |
3350 | int sg_size; | |
3351 | int order; | |
3352 | int bsize_elem; | |
3353 | ||
3354 | sg_size = buflen / (PMCRAID_MAX_IOADLS - 1); | |
3355 | order = (sg_size > 0) ? get_order(sg_size) : 0; | |
3356 | bsize_elem = PAGE_SIZE * (1 << order); | |
3357 | ||
3358 | /* Determine the actual number of sg entries needed */ | |
3359 | if (buflen % bsize_elem) | |
3360 | num_elem = (buflen / bsize_elem) + 1; | |
3361 | else | |
3362 | num_elem = buflen / bsize_elem; | |
3363 | ||
3364 | /* Allocate a scatter/gather list for the DMA */ | |
3365 | sglist = kzalloc(sizeof(struct pmcraid_sglist) + | |
3366 | (sizeof(struct scatterlist) * (num_elem - 1)), | |
3367 | GFP_KERNEL); | |
3368 | ||
3369 | if (sglist == NULL) | |
3370 | return NULL; | |
3371 | ||
3372 | scatterlist = sglist->scatterlist; | |
3373 | sg_init_table(scatterlist, num_elem); | |
3374 | sglist->order = order; | |
3375 | sglist->num_sg = num_elem; | |
3376 | sg_size = buflen; | |
3377 | ||
3378 | for (i = 0; i < num_elem; i++) { | |
592488a3 | 3379 | page = alloc_pages(GFP_KERNEL|GFP_DMA|__GFP_ZERO, order); |
89a36810 AR |
3380 | if (!page) { |
3381 | for (j = i - 1; j >= 0; j--) | |
3382 | __free_pages(sg_page(&scatterlist[j]), order); | |
3383 | kfree(sglist); | |
3384 | return NULL; | |
3385 | } | |
3386 | ||
3387 | sg_set_page(&scatterlist[i], page, | |
3388 | sg_size < bsize_elem ? sg_size : bsize_elem, 0); | |
3389 | sg_size -= bsize_elem; | |
3390 | } | |
3391 | ||
3392 | return sglist; | |
3393 | } | |
3394 | ||
3395 | /** | |
3396 | * pmcraid_copy_sglist - Copy user buffer to kernel buffer's SG list | |
3397 | * @sglist: scatter/gather list pointer | |
3398 | * @buffer: buffer pointer | |
3399 | * @len: buffer length | |
3400 | * @direction: data transfer direction | |
3401 | * | |
3402 | * Copy a user buffer into a buffer allocated by pmcraid_alloc_sglist | |
3403 | * | |
3404 | * Return value: | |
3405 | * 0 on success / other on failure | |
3406 | */ | |
3407 | static int pmcraid_copy_sglist( | |
3408 | struct pmcraid_sglist *sglist, | |
3409 | unsigned long buffer, | |
3410 | u32 len, | |
3411 | int direction | |
3412 | ) | |
3413 | { | |
3414 | struct scatterlist *scatterlist; | |
3415 | void *kaddr; | |
3416 | int bsize_elem; | |
3417 | int i; | |
3418 | int rc = 0; | |
3419 | ||
3420 | /* Determine the actual number of bytes per element */ | |
3421 | bsize_elem = PAGE_SIZE * (1 << sglist->order); | |
3422 | ||
3423 | scatterlist = sglist->scatterlist; | |
3424 | ||
3425 | for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) { | |
3426 | struct page *page = sg_page(&scatterlist[i]); | |
3427 | ||
3428 | kaddr = kmap(page); | |
3429 | if (direction == DMA_TO_DEVICE) | |
3430 | rc = __copy_from_user(kaddr, | |
3431 | (void *)buffer, | |
3432 | bsize_elem); | |
3433 | else | |
3434 | rc = __copy_to_user((void *)buffer, kaddr, bsize_elem); | |
3435 | ||
3436 | kunmap(page); | |
3437 | ||
3438 | if (rc) { | |
3439 | pmcraid_err("failed to copy user data into sg list\n"); | |
3440 | return -EFAULT; | |
3441 | } | |
3442 | ||
3443 | scatterlist[i].length = bsize_elem; | |
3444 | } | |
3445 | ||
3446 | if (len % bsize_elem) { | |
3447 | struct page *page = sg_page(&scatterlist[i]); | |
3448 | ||
3449 | kaddr = kmap(page); | |
3450 | ||
3451 | if (direction == DMA_TO_DEVICE) | |
3452 | rc = __copy_from_user(kaddr, | |
3453 | (void *)buffer, | |
3454 | len % bsize_elem); | |
3455 | else | |
3456 | rc = __copy_to_user((void *)buffer, | |
3457 | kaddr, | |
3458 | len % bsize_elem); | |
3459 | ||
3460 | kunmap(page); | |
3461 | ||
3462 | scatterlist[i].length = len % bsize_elem; | |
3463 | } | |
3464 | ||
3465 | if (rc) { | |
3466 | pmcraid_err("failed to copy user data into sg list\n"); | |
3467 | rc = -EFAULT; | |
3468 | } | |
3469 | ||
3470 | return rc; | |
3471 | } | |
3472 | ||
3473 | /** | |
3474 | * pmcraid_queuecommand - Queue a mid-layer request | |
3475 | * @scsi_cmd: scsi command struct | |
3476 | * @done: done function | |
3477 | * | |
3478 | * This function queues a request generated by the mid-layer. Midlayer calls | |
3479 | * this routine within host->lock. Some of the functions called by queuecommand | |
3480 | * would use cmd block queue locks (free_pool_lock and pending_pool_lock) | |
3481 | * | |
3482 | * Return value: | |
3483 | * 0 on success | |
3484 | * SCSI_MLQUEUE_DEVICE_BUSY if device is busy | |
3485 | * SCSI_MLQUEUE_HOST_BUSY if host is busy | |
3486 | */ | |
f281233d | 3487 | static int pmcraid_queuecommand_lck( |
89a36810 AR |
3488 | struct scsi_cmnd *scsi_cmd, |
3489 | void (*done) (struct scsi_cmnd *) | |
3490 | ) | |
3491 | { | |
3492 | struct pmcraid_instance *pinstance; | |
3493 | struct pmcraid_resource_entry *res; | |
3494 | struct pmcraid_ioarcb *ioarcb; | |
3495 | struct pmcraid_cmd *cmd; | |
c20c4267 | 3496 | u32 fw_version; |
89a36810 AR |
3497 | int rc = 0; |
3498 | ||
3499 | pinstance = | |
3500 | (struct pmcraid_instance *)scsi_cmd->device->host->hostdata; | |
c20c4267 | 3501 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
89a36810 AR |
3502 | scsi_cmd->scsi_done = done; |
3503 | res = scsi_cmd->device->hostdata; | |
3504 | scsi_cmd->result = (DID_OK << 16); | |
3505 | ||
3506 | /* if adapter is marked as dead, set result to DID_NO_CONNECT complete | |
3507 | * the command | |
3508 | */ | |
3509 | if (pinstance->ioa_state == IOA_STATE_DEAD) { | |
3510 | pmcraid_info("IOA is dead, but queuecommand is scheduled\n"); | |
3511 | scsi_cmd->result = (DID_NO_CONNECT << 16); | |
3512 | scsi_cmd->scsi_done(scsi_cmd); | |
3513 | return 0; | |
3514 | } | |
3515 | ||
3516 | /* If IOA reset is in progress, can't queue the commands */ | |
3517 | if (pinstance->ioa_reset_in_progress) | |
3518 | return SCSI_MLQUEUE_HOST_BUSY; | |
3519 | ||
c20c4267 AR |
3520 | /* Firmware doesn't support SYNCHRONIZE_CACHE command (0x35), complete |
3521 | * the command here itself with success return | |
3522 | */ | |
3523 | if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) { | |
3524 | pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n"); | |
3525 | scsi_cmd->scsi_done(scsi_cmd); | |
3526 | return 0; | |
3527 | } | |
3528 | ||
89a36810 AR |
3529 | /* initialize the command and IOARCB to be sent to IOA */ |
3530 | cmd = pmcraid_get_free_cmd(pinstance); | |
3531 | ||
3532 | if (cmd == NULL) { | |
3533 | pmcraid_err("free command block is not available\n"); | |
3534 | return SCSI_MLQUEUE_HOST_BUSY; | |
3535 | } | |
3536 | ||
3537 | cmd->scsi_cmd = scsi_cmd; | |
3538 | ioarcb = &(cmd->ioa_cb->ioarcb); | |
3539 | memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len); | |
3540 | ioarcb->resource_handle = res->cfg_entry.resource_handle; | |
3541 | ioarcb->request_type = REQ_TYPE_SCSI; | |
3542 | ||
c20c4267 AR |
3543 | /* set hrrq number where the IOA should respond to. Note that all cmds |
3544 | * generated internally uses hrrq_id 0, exception to this is the cmd | |
3545 | * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses | |
3546 | * hrrq_id assigned here in queuecommand | |
3547 | */ | |
3548 | ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) % | |
3549 | pinstance->num_hrrq; | |
89a36810 AR |
3550 | cmd->cmd_done = pmcraid_io_done; |
3551 | ||
3552 | if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) { | |
3553 | if (scsi_cmd->underflow == 0) | |
3554 | ioarcb->request_flags0 |= INHIBIT_UL_CHECK; | |
3555 | ||
3556 | if (res->sync_reqd) { | |
3557 | ioarcb->request_flags0 |= SYNC_COMPLETE; | |
3558 | res->sync_reqd = 0; | |
3559 | } | |
3560 | ||
3561 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
3562 | ioarcb->request_flags1 |= pmcraid_task_attributes(scsi_cmd); | |
3563 | ||
3564 | if (RES_IS_GSCSI(res->cfg_entry)) | |
3565 | ioarcb->request_flags1 |= DELAY_AFTER_RESET; | |
3566 | } | |
3567 | ||
3568 | rc = pmcraid_build_ioadl(pinstance, cmd); | |
3569 | ||
3570 | pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n", | |
3571 | le32_to_cpu(ioarcb->response_handle) >> 2, | |
3572 | scsi_cmd->cmnd[0], pinstance->host->unique_id, | |
3573 | RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID : | |
3574 | PMCRAID_PHYS_BUS_ID, | |
3575 | RES_IS_VSET(res->cfg_entry) ? | |
c20c4267 AR |
3576 | (fw_version <= PMCRAID_FW_VERSION_1 ? |
3577 | res->cfg_entry.unique_flags1 : | |
3578 | res->cfg_entry.array_id & 0xFF) : | |
89a36810 AR |
3579 | RES_TARGET(res->cfg_entry.resource_address), |
3580 | RES_LUN(res->cfg_entry.resource_address)); | |
3581 | ||
3582 | if (likely(rc == 0)) { | |
3583 | _pmcraid_fire_command(cmd); | |
3584 | } else { | |
3585 | pmcraid_err("queuecommand could not build ioadl\n"); | |
3586 | pmcraid_return_cmd(cmd); | |
3587 | rc = SCSI_MLQUEUE_HOST_BUSY; | |
3588 | } | |
3589 | ||
3590 | return rc; | |
3591 | } | |
3592 | ||
f281233d JG |
3593 | static DEF_SCSI_QCMD(pmcraid_queuecommand) |
3594 | ||
89a36810 AR |
3595 | /** |
3596 | * pmcraid_open -char node "open" entry, allowed only users with admin access | |
3597 | */ | |
3598 | static int pmcraid_chr_open(struct inode *inode, struct file *filep) | |
3599 | { | |
3600 | struct pmcraid_instance *pinstance; | |
3601 | ||
3602 | if (!capable(CAP_SYS_ADMIN)) | |
3603 | return -EACCES; | |
3604 | ||
3605 | /* Populate adapter instance * pointer for use by ioctl */ | |
3606 | pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev); | |
3607 | filep->private_data = pinstance; | |
3608 | ||
3609 | return 0; | |
3610 | } | |
3611 | ||
89a36810 AR |
3612 | /** |
3613 | * pmcraid_fasync - Async notifier registration from applications | |
3614 | * | |
3615 | * This function adds the calling process to a driver global queue. When an | |
3616 | * event occurs, SIGIO will be sent to all processes in this queue. | |
3617 | */ | |
3618 | static int pmcraid_chr_fasync(int fd, struct file *filep, int mode) | |
3619 | { | |
3620 | struct pmcraid_instance *pinstance; | |
3621 | int rc; | |
3622 | ||
660bdddb | 3623 | pinstance = filep->private_data; |
89a36810 AR |
3624 | mutex_lock(&pinstance->aen_queue_lock); |
3625 | rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue); | |
3626 | mutex_unlock(&pinstance->aen_queue_lock); | |
3627 | ||
3628 | return rc; | |
3629 | } | |
3630 | ||
3631 | ||
3632 | /** | |
3633 | * pmcraid_build_passthrough_ioadls - builds SG elements for passthrough | |
3634 | * commands sent over IOCTL interface | |
3635 | * | |
3636 | * @cmd : pointer to struct pmcraid_cmd | |
3637 | * @buflen : length of the request buffer | |
3638 | * @direction : data transfer direction | |
3639 | * | |
3640 | * Return value | |
af901ca1 | 3641 | * 0 on success, non-zero error code on failure |
89a36810 AR |
3642 | */ |
3643 | static int pmcraid_build_passthrough_ioadls( | |
3644 | struct pmcraid_cmd *cmd, | |
3645 | int buflen, | |
3646 | int direction | |
3647 | ) | |
3648 | { | |
3649 | struct pmcraid_sglist *sglist = NULL; | |
3650 | struct scatterlist *sg = NULL; | |
3651 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
3652 | struct pmcraid_ioadl_desc *ioadl; | |
3653 | int i; | |
3654 | ||
3655 | sglist = pmcraid_alloc_sglist(buflen); | |
3656 | ||
3657 | if (!sglist) { | |
3658 | pmcraid_err("can't allocate memory for passthrough SGls\n"); | |
3659 | return -ENOMEM; | |
3660 | } | |
3661 | ||
3662 | sglist->num_dma_sg = pci_map_sg(cmd->drv_inst->pdev, | |
3663 | sglist->scatterlist, | |
3664 | sglist->num_sg, direction); | |
3665 | ||
3666 | if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) { | |
3667 | dev_err(&cmd->drv_inst->pdev->dev, | |
3668 | "Failed to map passthrough buffer!\n"); | |
3669 | pmcraid_free_sglist(sglist); | |
3670 | return -EIO; | |
3671 | } | |
3672 | ||
3673 | cmd->sglist = sglist; | |
3674 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
3675 | ||
3676 | ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg); | |
3677 | ||
3678 | /* Initialize IOADL descriptor addresses */ | |
3679 | for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) { | |
3680 | ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg)); | |
3681 | ioadl[i].address = cpu_to_le64(sg_dma_address(sg)); | |
3682 | ioadl[i].flags = 0; | |
3683 | } | |
3684 | ||
3685 | /* setup the last descriptor */ | |
88197966 | 3686 | ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC; |
89a36810 AR |
3687 | |
3688 | return 0; | |
3689 | } | |
3690 | ||
3691 | ||
3692 | /** | |
3693 | * pmcraid_release_passthrough_ioadls - release passthrough ioadls | |
3694 | * | |
3695 | * @cmd: pointer to struct pmcraid_cmd for which ioadls were allocated | |
3696 | * @buflen: size of the request buffer | |
3697 | * @direction: data transfer direction | |
3698 | * | |
3699 | * Return value | |
af901ca1 | 3700 | * 0 on success, non-zero error code on failure |
89a36810 AR |
3701 | */ |
3702 | static void pmcraid_release_passthrough_ioadls( | |
3703 | struct pmcraid_cmd *cmd, | |
3704 | int buflen, | |
3705 | int direction | |
3706 | ) | |
3707 | { | |
3708 | struct pmcraid_sglist *sglist = cmd->sglist; | |
3709 | ||
3710 | if (buflen > 0) { | |
3711 | pci_unmap_sg(cmd->drv_inst->pdev, | |
3712 | sglist->scatterlist, | |
3713 | sglist->num_sg, | |
3714 | direction); | |
3715 | pmcraid_free_sglist(sglist); | |
3716 | cmd->sglist = NULL; | |
3717 | } | |
3718 | } | |
3719 | ||
3720 | /** | |
3721 | * pmcraid_ioctl_passthrough - handling passthrough IOCTL commands | |
3722 | * | |
3723 | * @pinstance: pointer to adapter instance structure | |
3724 | * @cmd: ioctl code | |
3725 | * @arg: pointer to pmcraid_passthrough_buffer user buffer | |
3726 | * | |
3727 | * Return value | |
af901ca1 | 3728 | * 0 on success, non-zero error code on failure |
89a36810 AR |
3729 | */ |
3730 | static long pmcraid_ioctl_passthrough( | |
3731 | struct pmcraid_instance *pinstance, | |
3732 | unsigned int ioctl_cmd, | |
3733 | unsigned int buflen, | |
3734 | unsigned long arg | |
3735 | ) | |
3736 | { | |
3737 | struct pmcraid_passthrough_ioctl_buffer *buffer; | |
3738 | struct pmcraid_ioarcb *ioarcb; | |
3739 | struct pmcraid_cmd *cmd; | |
3740 | struct pmcraid_cmd *cancel_cmd; | |
3741 | unsigned long request_buffer; | |
3742 | unsigned long request_offset; | |
3743 | unsigned long lock_flags; | |
592488a3 | 3744 | void *ioasa; |
c20c4267 | 3745 | u32 ioasc; |
89a36810 AR |
3746 | int request_size; |
3747 | int buffer_size; | |
3748 | u8 access, direction; | |
3749 | int rc = 0; | |
3750 | ||
3751 | /* If IOA reset is in progress, wait 10 secs for reset to complete */ | |
3752 | if (pinstance->ioa_reset_in_progress) { | |
3753 | rc = wait_event_interruptible_timeout( | |
3754 | pinstance->reset_wait_q, | |
3755 | !pinstance->ioa_reset_in_progress, | |
3756 | msecs_to_jiffies(10000)); | |
3757 | ||
3758 | if (!rc) | |
3759 | return -ETIMEDOUT; | |
3760 | else if (rc < 0) | |
3761 | return -ERESTARTSYS; | |
3762 | } | |
3763 | ||
3764 | /* If adapter is not in operational state, return error */ | |
3765 | if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) { | |
3766 | pmcraid_err("IOA is not operational\n"); | |
3767 | return -ENOTTY; | |
3768 | } | |
3769 | ||
3770 | buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer); | |
3771 | buffer = kmalloc(buffer_size, GFP_KERNEL); | |
3772 | ||
3773 | if (!buffer) { | |
3774 | pmcraid_err("no memory for passthrough buffer\n"); | |
3775 | return -ENOMEM; | |
3776 | } | |
3777 | ||
3778 | request_offset = | |
3779 | offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer); | |
3780 | ||
3781 | request_buffer = arg + request_offset; | |
3782 | ||
3783 | rc = __copy_from_user(buffer, | |
3784 | (struct pmcraid_passthrough_ioctl_buffer *) arg, | |
3785 | sizeof(struct pmcraid_passthrough_ioctl_buffer)); | |
592488a3 AR |
3786 | |
3787 | ioasa = | |
3788 | (void *)(arg + | |
3789 | offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa)); | |
3790 | ||
89a36810 AR |
3791 | if (rc) { |
3792 | pmcraid_err("ioctl: can't copy passthrough buffer\n"); | |
3793 | rc = -EFAULT; | |
3794 | goto out_free_buffer; | |
3795 | } | |
3796 | ||
3797 | request_size = buffer->ioarcb.data_transfer_length; | |
3798 | ||
3799 | if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) { | |
3800 | access = VERIFY_READ; | |
3801 | direction = DMA_TO_DEVICE; | |
3802 | } else { | |
3803 | access = VERIFY_WRITE; | |
3804 | direction = DMA_FROM_DEVICE; | |
3805 | } | |
3806 | ||
3807 | if (request_size > 0) { | |
3808 | rc = access_ok(access, arg, request_offset + request_size); | |
3809 | ||
3810 | if (!rc) { | |
3811 | rc = -EFAULT; | |
3812 | goto out_free_buffer; | |
3813 | } | |
5f6279da DR |
3814 | } else if (request_size < 0) { |
3815 | rc = -EINVAL; | |
3816 | goto out_free_buffer; | |
89a36810 AR |
3817 | } |
3818 | ||
3819 | /* check if we have any additional command parameters */ | |
3820 | if (buffer->ioarcb.add_cmd_param_length > PMCRAID_ADD_CMD_PARAM_LEN) { | |
3821 | rc = -EINVAL; | |
3822 | goto out_free_buffer; | |
3823 | } | |
3824 | ||
3825 | cmd = pmcraid_get_free_cmd(pinstance); | |
3826 | ||
3827 | if (!cmd) { | |
3828 | pmcraid_err("free command block is not available\n"); | |
3829 | rc = -ENOMEM; | |
3830 | goto out_free_buffer; | |
3831 | } | |
3832 | ||
3833 | cmd->scsi_cmd = NULL; | |
3834 | ioarcb = &(cmd->ioa_cb->ioarcb); | |
3835 | ||
3836 | /* Copy the user-provided IOARCB stuff field by field */ | |
3837 | ioarcb->resource_handle = buffer->ioarcb.resource_handle; | |
3838 | ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length; | |
3839 | ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout; | |
3840 | ioarcb->request_type = buffer->ioarcb.request_type; | |
3841 | ioarcb->request_flags0 = buffer->ioarcb.request_flags0; | |
3842 | ioarcb->request_flags1 = buffer->ioarcb.request_flags1; | |
3843 | memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN); | |
3844 | ||
3845 | if (buffer->ioarcb.add_cmd_param_length) { | |
3846 | ioarcb->add_cmd_param_length = | |
3847 | buffer->ioarcb.add_cmd_param_length; | |
3848 | ioarcb->add_cmd_param_offset = | |
3849 | buffer->ioarcb.add_cmd_param_offset; | |
3850 | memcpy(ioarcb->add_data.u.add_cmd_params, | |
3851 | buffer->ioarcb.add_data.u.add_cmd_params, | |
3852 | buffer->ioarcb.add_cmd_param_length); | |
3853 | } | |
3854 | ||
c20c4267 AR |
3855 | /* set hrrq number where the IOA should respond to. Note that all cmds |
3856 | * generated internally uses hrrq_id 0, exception to this is the cmd | |
3857 | * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses | |
3858 | * hrrq_id assigned here in queuecommand | |
3859 | */ | |
3860 | ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) % | |
3861 | pinstance->num_hrrq; | |
3862 | ||
89a36810 AR |
3863 | if (request_size) { |
3864 | rc = pmcraid_build_passthrough_ioadls(cmd, | |
3865 | request_size, | |
3866 | direction); | |
3867 | if (rc) { | |
3868 | pmcraid_err("couldn't build passthrough ioadls\n"); | |
3869 | goto out_free_buffer; | |
3870 | } | |
b5b51544 DR |
3871 | } else if (request_size < 0) { |
3872 | rc = -EINVAL; | |
3873 | goto out_free_buffer; | |
89a36810 AR |
3874 | } |
3875 | ||
3876 | /* If data is being written into the device, copy the data from user | |
3877 | * buffers | |
3878 | */ | |
3879 | if (direction == DMA_TO_DEVICE && request_size > 0) { | |
3880 | rc = pmcraid_copy_sglist(cmd->sglist, | |
3881 | request_buffer, | |
3882 | request_size, | |
3883 | direction); | |
3884 | if (rc) { | |
3885 | pmcraid_err("failed to copy user buffer\n"); | |
3886 | goto out_free_sglist; | |
3887 | } | |
3888 | } | |
3889 | ||
3890 | /* passthrough ioctl is a blocking command so, put the user to sleep | |
3891 | * until timeout. Note that a timeout value of 0 means, do timeout. | |
3892 | */ | |
3893 | cmd->cmd_done = pmcraid_internal_done; | |
3894 | init_completion(&cmd->wait_for_completion); | |
3895 | cmd->completion_req = 1; | |
3896 | ||
3897 | pmcraid_info("command(%d) (CDB[0] = %x) for %x\n", | |
3898 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2, | |
3899 | cmd->ioa_cb->ioarcb.cdb[0], | |
3900 | le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle)); | |
3901 | ||
3902 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
3903 | _pmcraid_fire_command(cmd); | |
3904 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
3905 | ||
c20c4267 AR |
3906 | /* NOTE ! Remove the below line once abort_task is implemented |
3907 | * in firmware. This line disables ioctl command timeout handling logic | |
3908 | * similar to IO command timeout handling, making ioctl commands to wait | |
3909 | * until the command completion regardless of timeout value specified in | |
3910 | * ioarcb | |
3911 | */ | |
3912 | buffer->ioarcb.cmd_timeout = 0; | |
3913 | ||
89a36810 AR |
3914 | /* If command timeout is specified put caller to wait till that time, |
3915 | * otherwise it would be blocking wait. If command gets timed out, it | |
3916 | * will be aborted. | |
3917 | */ | |
3918 | if (buffer->ioarcb.cmd_timeout == 0) { | |
3919 | wait_for_completion(&cmd->wait_for_completion); | |
3920 | } else if (!wait_for_completion_timeout( | |
3921 | &cmd->wait_for_completion, | |
3922 | msecs_to_jiffies(buffer->ioarcb.cmd_timeout * 1000))) { | |
3923 | ||
3924 | pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n", | |
3925 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle >> 2), | |
3926 | cmd->ioa_cb->ioarcb.cdb[0]); | |
3927 | ||
89a36810 AR |
3928 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); |
3929 | cancel_cmd = pmcraid_abort_cmd(cmd); | |
3930 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
3931 | ||
3932 | if (cancel_cmd) { | |
3933 | wait_for_completion(&cancel_cmd->wait_for_completion); | |
c20c4267 | 3934 | ioasc = cancel_cmd->ioa_cb->ioasa.ioasc; |
89a36810 | 3935 | pmcraid_return_cmd(cancel_cmd); |
c20c4267 AR |
3936 | |
3937 | /* if abort task couldn't find the command i.e it got | |
3938 | * completed prior to aborting, return good completion. | |
25985edc | 3939 | * if command got aborted successfully or there was IOA |
c20c4267 AR |
3940 | * reset due to abort task itself getting timedout then |
3941 | * return -ETIMEDOUT | |
3942 | */ | |
3943 | if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET || | |
3944 | PMCRAID_IOASC_SENSE_KEY(ioasc) == 0x00) { | |
3945 | if (ioasc != PMCRAID_IOASC_GC_IOARCB_NOTFOUND) | |
3946 | rc = -ETIMEDOUT; | |
3947 | goto out_handle_response; | |
3948 | } | |
89a36810 AR |
3949 | } |
3950 | ||
c20c4267 AR |
3951 | /* no command block for abort task or abort task failed to abort |
3952 | * the IOARCB, then wait for 150 more seconds and initiate reset | |
3953 | * sequence after timeout | |
3954 | */ | |
3955 | if (!wait_for_completion_timeout( | |
3956 | &cmd->wait_for_completion, | |
3957 | msecs_to_jiffies(150 * 1000))) { | |
3958 | pmcraid_reset_bringup(cmd->drv_inst); | |
3959 | rc = -ETIMEDOUT; | |
3960 | } | |
89a36810 AR |
3961 | } |
3962 | ||
c20c4267 | 3963 | out_handle_response: |
592488a3 AR |
3964 | /* copy entire IOASA buffer and return IOCTL success. |
3965 | * If copying IOASA to user-buffer fails, return | |
89a36810 AR |
3966 | * EFAULT |
3967 | */ | |
592488a3 AR |
3968 | if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa, |
3969 | sizeof(struct pmcraid_ioasa))) { | |
3970 | pmcraid_err("failed to copy ioasa buffer to user\n"); | |
3971 | rc = -EFAULT; | |
89a36810 | 3972 | } |
c20c4267 | 3973 | |
89a36810 AR |
3974 | /* If the data transfer was from device, copy the data onto user |
3975 | * buffers | |
3976 | */ | |
3977 | else if (direction == DMA_FROM_DEVICE && request_size > 0) { | |
3978 | rc = pmcraid_copy_sglist(cmd->sglist, | |
3979 | request_buffer, | |
3980 | request_size, | |
3981 | direction); | |
3982 | if (rc) { | |
3983 | pmcraid_err("failed to copy user buffer\n"); | |
3984 | rc = -EFAULT; | |
3985 | } | |
3986 | } | |
3987 | ||
3988 | out_free_sglist: | |
3989 | pmcraid_release_passthrough_ioadls(cmd, request_size, direction); | |
3990 | pmcraid_return_cmd(cmd); | |
3991 | ||
3992 | out_free_buffer: | |
3993 | kfree(buffer); | |
3994 | ||
3995 | return rc; | |
3996 | } | |
3997 | ||
3998 | ||
3999 | ||
4000 | ||
4001 | /** | |
4002 | * pmcraid_ioctl_driver - ioctl handler for commands handled by driver itself | |
4003 | * | |
4004 | * @pinstance: pointer to adapter instance structure | |
4005 | * @cmd: ioctl command passed in | |
4006 | * @buflen: length of user_buffer | |
4007 | * @user_buffer: user buffer pointer | |
4008 | * | |
4009 | * Return Value | |
4010 | * 0 in case of success, otherwise appropriate error code | |
4011 | */ | |
4012 | static long pmcraid_ioctl_driver( | |
4013 | struct pmcraid_instance *pinstance, | |
4014 | unsigned int cmd, | |
4015 | unsigned int buflen, | |
4016 | void __user *user_buffer | |
4017 | ) | |
4018 | { | |
4019 | int rc = -ENOSYS; | |
4020 | ||
4021 | if (!access_ok(VERIFY_READ, user_buffer, _IOC_SIZE(cmd))) { | |
c20c4267 | 4022 | pmcraid_err("ioctl_driver: access fault in request buffer\n"); |
89a36810 AR |
4023 | return -EFAULT; |
4024 | } | |
4025 | ||
4026 | switch (cmd) { | |
4027 | case PMCRAID_IOCTL_RESET_ADAPTER: | |
4028 | pmcraid_reset_bringup(pinstance); | |
4029 | rc = 0; | |
4030 | break; | |
4031 | ||
4032 | default: | |
4033 | break; | |
4034 | } | |
4035 | ||
4036 | return rc; | |
4037 | } | |
4038 | ||
4039 | /** | |
4040 | * pmcraid_check_ioctl_buffer - check for proper access to user buffer | |
4041 | * | |
4042 | * @cmd: ioctl command | |
4043 | * @arg: user buffer | |
4044 | * @hdr: pointer to kernel memory for pmcraid_ioctl_header | |
4045 | * | |
4046 | * Return Value | |
4047 | * negetive error code if there are access issues, otherwise zero. | |
4048 | * Upon success, returns ioctl header copied out of user buffer. | |
4049 | */ | |
4050 | ||
4051 | static int pmcraid_check_ioctl_buffer( | |
4052 | int cmd, | |
4053 | void __user *arg, | |
4054 | struct pmcraid_ioctl_header *hdr | |
4055 | ) | |
4056 | { | |
4057 | int rc = 0; | |
4058 | int access = VERIFY_READ; | |
4059 | ||
4060 | if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) { | |
4061 | pmcraid_err("couldn't copy ioctl header from user buffer\n"); | |
4062 | return -EFAULT; | |
4063 | } | |
4064 | ||
4065 | /* check for valid driver signature */ | |
4066 | rc = memcmp(hdr->signature, | |
4067 | PMCRAID_IOCTL_SIGNATURE, | |
4068 | sizeof(hdr->signature)); | |
4069 | if (rc) { | |
4070 | pmcraid_err("signature verification failed\n"); | |
4071 | return -EINVAL; | |
4072 | } | |
4073 | ||
89a36810 AR |
4074 | /* check for appropriate buffer access */ |
4075 | if ((_IOC_DIR(cmd) & _IOC_READ) == _IOC_READ) | |
4076 | access = VERIFY_WRITE; | |
4077 | ||
4078 | rc = access_ok(access, | |
4079 | (arg + sizeof(struct pmcraid_ioctl_header)), | |
4080 | hdr->buffer_length); | |
4081 | if (!rc) { | |
4082 | pmcraid_err("access failed for user buffer of size %d\n", | |
4083 | hdr->buffer_length); | |
4084 | return -EFAULT; | |
4085 | } | |
4086 | ||
4087 | return 0; | |
4088 | } | |
4089 | ||
4090 | /** | |
4091 | * pmcraid_ioctl - char node ioctl entry point | |
4092 | */ | |
4093 | static long pmcraid_chr_ioctl( | |
4094 | struct file *filep, | |
4095 | unsigned int cmd, | |
4096 | unsigned long arg | |
4097 | ) | |
4098 | { | |
4099 | struct pmcraid_instance *pinstance = NULL; | |
4100 | struct pmcraid_ioctl_header *hdr = NULL; | |
4101 | int retval = -ENOTTY; | |
4102 | ||
a63ec376 | 4103 | hdr = kmalloc(sizeof(struct pmcraid_ioctl_header), GFP_KERNEL); |
89a36810 AR |
4104 | |
4105 | if (!hdr) { | |
4f91b114 | 4106 | pmcraid_err("failed to allocate memory for ioctl header\n"); |
89a36810 AR |
4107 | return -ENOMEM; |
4108 | } | |
4109 | ||
4110 | retval = pmcraid_check_ioctl_buffer(cmd, (void *)arg, hdr); | |
4111 | ||
4112 | if (retval) { | |
4113 | pmcraid_info("chr_ioctl: header check failed\n"); | |
4114 | kfree(hdr); | |
4115 | return retval; | |
4116 | } | |
4117 | ||
660bdddb | 4118 | pinstance = filep->private_data; |
89a36810 AR |
4119 | |
4120 | if (!pinstance) { | |
4121 | pmcraid_info("adapter instance is not found\n"); | |
4122 | kfree(hdr); | |
4123 | return -ENOTTY; | |
4124 | } | |
4125 | ||
4126 | switch (_IOC_TYPE(cmd)) { | |
4127 | ||
4128 | case PMCRAID_PASSTHROUGH_IOCTL: | |
4129 | /* If ioctl code is to download microcode, we need to block | |
4130 | * mid-layer requests. | |
4131 | */ | |
4132 | if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE) | |
4133 | scsi_block_requests(pinstance->host); | |
4134 | ||
4135 | retval = pmcraid_ioctl_passthrough(pinstance, | |
4136 | cmd, | |
4137 | hdr->buffer_length, | |
4138 | arg); | |
4139 | ||
4140 | if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE) | |
4141 | scsi_unblock_requests(pinstance->host); | |
4142 | break; | |
4143 | ||
4144 | case PMCRAID_DRIVER_IOCTL: | |
4145 | arg += sizeof(struct pmcraid_ioctl_header); | |
4146 | retval = pmcraid_ioctl_driver(pinstance, | |
4147 | cmd, | |
4148 | hdr->buffer_length, | |
4149 | (void __user *)arg); | |
4150 | break; | |
4151 | ||
4152 | default: | |
4153 | retval = -ENOTTY; | |
4154 | break; | |
4155 | } | |
4156 | ||
4157 | kfree(hdr); | |
4158 | ||
4159 | return retval; | |
4160 | } | |
4161 | ||
4162 | /** | |
4163 | * File operations structure for management interface | |
4164 | */ | |
4165 | static const struct file_operations pmcraid_fops = { | |
4166 | .owner = THIS_MODULE, | |
4167 | .open = pmcraid_chr_open, | |
89a36810 AR |
4168 | .fasync = pmcraid_chr_fasync, |
4169 | .unlocked_ioctl = pmcraid_chr_ioctl, | |
4170 | #ifdef CONFIG_COMPAT | |
4171 | .compat_ioctl = pmcraid_chr_ioctl, | |
4172 | #endif | |
6038f373 | 4173 | .llseek = noop_llseek, |
89a36810 AR |
4174 | }; |
4175 | ||
4176 | ||
4177 | ||
4178 | ||
4179 | /** | |
4180 | * pmcraid_show_log_level - Display adapter's error logging level | |
4181 | * @dev: class device struct | |
4182 | * @buf: buffer | |
4183 | * | |
4184 | * Return value: | |
4185 | * number of bytes printed to buffer | |
4186 | */ | |
4187 | static ssize_t pmcraid_show_log_level( | |
4188 | struct device *dev, | |
4189 | struct device_attribute *attr, | |
4190 | char *buf) | |
4191 | { | |
4192 | struct Scsi_Host *shost = class_to_shost(dev); | |
4193 | struct pmcraid_instance *pinstance = | |
4194 | (struct pmcraid_instance *)shost->hostdata; | |
4195 | return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level); | |
4196 | } | |
4197 | ||
4198 | /** | |
4199 | * pmcraid_store_log_level - Change the adapter's error logging level | |
4200 | * @dev: class device struct | |
4201 | * @buf: buffer | |
4202 | * @count: not used | |
4203 | * | |
4204 | * Return value: | |
4205 | * number of bytes printed to buffer | |
4206 | */ | |
4207 | static ssize_t pmcraid_store_log_level( | |
4208 | struct device *dev, | |
4209 | struct device_attribute *attr, | |
4210 | const char *buf, | |
4211 | size_t count | |
4212 | ) | |
4213 | { | |
4214 | struct Scsi_Host *shost; | |
4215 | struct pmcraid_instance *pinstance; | |
f7c65af5 | 4216 | u8 val; |
89a36810 | 4217 | |
f7c65af5 | 4218 | if (kstrtou8(buf, 10, &val)) |
89a36810 AR |
4219 | return -EINVAL; |
4220 | /* log-level should be from 0 to 2 */ | |
4221 | if (val > 2) | |
4222 | return -EINVAL; | |
4223 | ||
4224 | shost = class_to_shost(dev); | |
4225 | pinstance = (struct pmcraid_instance *)shost->hostdata; | |
4226 | pinstance->current_log_level = val; | |
4227 | ||
4228 | return strlen(buf); | |
4229 | } | |
4230 | ||
4231 | static struct device_attribute pmcraid_log_level_attr = { | |
4232 | .attr = { | |
4233 | .name = "log_level", | |
4234 | .mode = S_IRUGO | S_IWUSR, | |
4235 | }, | |
4236 | .show = pmcraid_show_log_level, | |
4237 | .store = pmcraid_store_log_level, | |
4238 | }; | |
4239 | ||
4240 | /** | |
4241 | * pmcraid_show_drv_version - Display driver version | |
4242 | * @dev: class device struct | |
4243 | * @buf: buffer | |
4244 | * | |
4245 | * Return value: | |
4246 | * number of bytes printed to buffer | |
4247 | */ | |
4248 | static ssize_t pmcraid_show_drv_version( | |
4249 | struct device *dev, | |
4250 | struct device_attribute *attr, | |
4251 | char *buf | |
4252 | ) | |
4253 | { | |
a1b66665 MM |
4254 | return snprintf(buf, PAGE_SIZE, "version: %s\n", |
4255 | PMCRAID_DRIVER_VERSION); | |
89a36810 AR |
4256 | } |
4257 | ||
4258 | static struct device_attribute pmcraid_driver_version_attr = { | |
4259 | .attr = { | |
4260 | .name = "drv_version", | |
4261 | .mode = S_IRUGO, | |
4262 | }, | |
4263 | .show = pmcraid_show_drv_version, | |
4264 | }; | |
4265 | ||
4266 | /** | |
4267 | * pmcraid_show_io_adapter_id - Display driver assigned adapter id | |
4268 | * @dev: class device struct | |
4269 | * @buf: buffer | |
4270 | * | |
4271 | * Return value: | |
4272 | * number of bytes printed to buffer | |
4273 | */ | |
4274 | static ssize_t pmcraid_show_adapter_id( | |
4275 | struct device *dev, | |
4276 | struct device_attribute *attr, | |
4277 | char *buf | |
4278 | ) | |
4279 | { | |
4280 | struct Scsi_Host *shost = class_to_shost(dev); | |
4281 | struct pmcraid_instance *pinstance = | |
4282 | (struct pmcraid_instance *)shost->hostdata; | |
4283 | u32 adapter_id = (pinstance->pdev->bus->number << 8) | | |
4284 | pinstance->pdev->devfn; | |
4285 | u32 aen_group = pmcraid_event_family.id; | |
4286 | ||
4287 | return snprintf(buf, PAGE_SIZE, | |
4288 | "adapter id: %d\nminor: %d\naen group: %d\n", | |
4289 | adapter_id, MINOR(pinstance->cdev.dev), aen_group); | |
4290 | } | |
4291 | ||
4292 | static struct device_attribute pmcraid_adapter_id_attr = { | |
4293 | .attr = { | |
4294 | .name = "adapter_id", | |
4295 | .mode = S_IRUGO | S_IWUSR, | |
4296 | }, | |
4297 | .show = pmcraid_show_adapter_id, | |
4298 | }; | |
4299 | ||
4300 | static struct device_attribute *pmcraid_host_attrs[] = { | |
4301 | &pmcraid_log_level_attr, | |
4302 | &pmcraid_driver_version_attr, | |
4303 | &pmcraid_adapter_id_attr, | |
4304 | NULL, | |
4305 | }; | |
4306 | ||
4307 | ||
4308 | /* host template structure for pmcraid driver */ | |
4309 | static struct scsi_host_template pmcraid_host_template = { | |
4310 | .module = THIS_MODULE, | |
4311 | .name = PMCRAID_DRIVER_NAME, | |
4312 | .queuecommand = pmcraid_queuecommand, | |
4313 | .eh_abort_handler = pmcraid_eh_abort_handler, | |
4314 | .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler, | |
4315 | .eh_target_reset_handler = pmcraid_eh_target_reset_handler, | |
4316 | .eh_device_reset_handler = pmcraid_eh_device_reset_handler, | |
4317 | .eh_host_reset_handler = pmcraid_eh_host_reset_handler, | |
4318 | ||
4319 | .slave_alloc = pmcraid_slave_alloc, | |
4320 | .slave_configure = pmcraid_slave_configure, | |
4321 | .slave_destroy = pmcraid_slave_destroy, | |
4322 | .change_queue_depth = pmcraid_change_queue_depth, | |
4323 | .change_queue_type = pmcraid_change_queue_type, | |
4324 | .can_queue = PMCRAID_MAX_IO_CMD, | |
4325 | .this_id = -1, | |
4326 | .sg_tablesize = PMCRAID_MAX_IOADLS, | |
4327 | .max_sectors = PMCRAID_IOA_MAX_SECTORS, | |
54b2b50c | 4328 | .no_write_same = 1, |
89a36810 AR |
4329 | .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN, |
4330 | .use_clustering = ENABLE_CLUSTERING, | |
4331 | .shost_attrs = pmcraid_host_attrs, | |
4332 | .proc_name = PMCRAID_DRIVER_NAME | |
4333 | }; | |
4334 | ||
c20c4267 AR |
4335 | /* |
4336 | * pmcraid_isr_msix - implements MSI-X interrupt handling routine | |
4337 | * @irq: interrupt vector number | |
4338 | * @dev_id: pointer hrrq_vector | |
89a36810 AR |
4339 | * |
4340 | * Return Value | |
c20c4267 | 4341 | * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored |
89a36810 | 4342 | */ |
c20c4267 AR |
4343 | |
4344 | static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id) | |
89a36810 | 4345 | { |
c20c4267 AR |
4346 | struct pmcraid_isr_param *hrrq_vector; |
4347 | struct pmcraid_instance *pinstance; | |
4348 | unsigned long lock_flags; | |
4349 | u32 intrs_val; | |
4350 | int hrrq_id; | |
4351 | ||
4352 | hrrq_vector = (struct pmcraid_isr_param *)dev_id; | |
4353 | hrrq_id = hrrq_vector->hrrq_id; | |
4354 | pinstance = hrrq_vector->drv_inst; | |
4355 | ||
4356 | if (!hrrq_id) { | |
4357 | /* Read the interrupt */ | |
4358 | intrs_val = pmcraid_read_interrupts(pinstance); | |
4359 | if (intrs_val && | |
4360 | ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg) | |
4361 | & DOORBELL_INTR_MSIX_CLR) == 0)) { | |
4362 | /* Any error interrupts including unit_check, | |
4363 | * initiate IOA reset.In case of unit check indicate | |
4364 | * to reset_sequence that IOA unit checked and prepare | |
4365 | * for a dump during reset sequence | |
4366 | */ | |
4367 | if (intrs_val & PMCRAID_ERROR_INTERRUPTS) { | |
4368 | if (intrs_val & INTRS_IOA_UNIT_CHECK) | |
4369 | pinstance->ioa_unit_check = 1; | |
4370 | ||
4371 | pmcraid_err("ISR: error interrupts: %x \ | |
4372 | initiating reset\n", intrs_val); | |
4373 | spin_lock_irqsave(pinstance->host->host_lock, | |
4374 | lock_flags); | |
4375 | pmcraid_initiate_reset(pinstance); | |
4376 | spin_unlock_irqrestore( | |
4377 | pinstance->host->host_lock, | |
4378 | lock_flags); | |
4379 | } | |
4380 | /* If interrupt was as part of the ioa initialization, | |
4381 | * clear it. Delete the timer and wakeup the | |
4382 | * reset engine to proceed with reset sequence | |
4383 | */ | |
4384 | if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL) | |
4385 | pmcraid_clr_trans_op(pinstance); | |
4386 | ||
4387 | /* Clear the interrupt register by writing | |
4388 | * to host to ioa doorbell. Once done | |
4389 | * FW will clear the interrupt. | |
4390 | */ | |
4391 | iowrite32(DOORBELL_INTR_MSIX_CLR, | |
4392 | pinstance->int_regs.host_ioa_interrupt_reg); | |
4393 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
4394 | ||
89a36810 | 4395 | |
c20c4267 AR |
4396 | } |
4397 | } | |
4398 | ||
4399 | tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id])); | |
4400 | ||
4401 | return IRQ_HANDLED; | |
89a36810 AR |
4402 | } |
4403 | ||
4404 | /** | |
c20c4267 | 4405 | * pmcraid_isr - implements legacy interrupt handling routine |
89a36810 AR |
4406 | * |
4407 | * @irq: interrupt vector number | |
4408 | * @dev_id: pointer hrrq_vector | |
4409 | * | |
4410 | * Return Value | |
4411 | * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored | |
4412 | */ | |
4413 | static irqreturn_t pmcraid_isr(int irq, void *dev_id) | |
4414 | { | |
4415 | struct pmcraid_isr_param *hrrq_vector; | |
4416 | struct pmcraid_instance *pinstance; | |
89a36810 | 4417 | u32 intrs; |
c20c4267 AR |
4418 | unsigned long lock_flags; |
4419 | int hrrq_id = 0; | |
89a36810 AR |
4420 | |
4421 | /* In case of legacy interrupt mode where interrupts are shared across | |
4422 | * isrs, it may be possible that the current interrupt is not from IOA | |
4423 | */ | |
4424 | if (!dev_id) { | |
4425 | printk(KERN_INFO "%s(): NULL host pointer\n", __func__); | |
4426 | return IRQ_NONE; | |
4427 | } | |
89a36810 AR |
4428 | hrrq_vector = (struct pmcraid_isr_param *)dev_id; |
4429 | pinstance = hrrq_vector->drv_inst; | |
4430 | ||
89a36810 AR |
4431 | intrs = pmcraid_read_interrupts(pinstance); |
4432 | ||
c20c4267 | 4433 | if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0)) |
89a36810 | 4434 | return IRQ_NONE; |
89a36810 AR |
4435 | |
4436 | /* Any error interrupts including unit_check, initiate IOA reset. | |
4437 | * In case of unit check indicate to reset_sequence that IOA unit | |
4438 | * checked and prepare for a dump during reset sequence | |
4439 | */ | |
4440 | if (intrs & PMCRAID_ERROR_INTERRUPTS) { | |
4441 | ||
4442 | if (intrs & INTRS_IOA_UNIT_CHECK) | |
4443 | pinstance->ioa_unit_check = 1; | |
4444 | ||
4445 | iowrite32(intrs, | |
4446 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
4447 | pmcraid_err("ISR: error interrupts: %x initiating reset\n", | |
4448 | intrs); | |
c20c4267 AR |
4449 | intrs = ioread32( |
4450 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
4451 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
89a36810 | 4452 | pmcraid_initiate_reset(pinstance); |
c20c4267 | 4453 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); |
89a36810 | 4454 | } else { |
c20c4267 AR |
4455 | /* If interrupt was as part of the ioa initialization, |
4456 | * clear. Delete the timer and wakeup the | |
4457 | * reset engine to proceed with reset sequence | |
4458 | */ | |
4459 | if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) { | |
4460 | pmcraid_clr_trans_op(pinstance); | |
4461 | } else { | |
4462 | iowrite32(intrs, | |
4463 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
4464 | ioread32( | |
4465 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
89a36810 | 4466 | |
c20c4267 AR |
4467 | tasklet_schedule( |
4468 | &(pinstance->isr_tasklet[hrrq_id])); | |
4469 | } | |
4470 | } | |
89a36810 AR |
4471 | |
4472 | return IRQ_HANDLED; | |
4473 | } | |
4474 | ||
4475 | ||
4476 | /** | |
4477 | * pmcraid_worker_function - worker thread function | |
4478 | * | |
4479 | * @workp: pointer to struct work queue | |
4480 | * | |
4481 | * Return Value | |
4482 | * None | |
4483 | */ | |
4484 | ||
4485 | static void pmcraid_worker_function(struct work_struct *workp) | |
4486 | { | |
4487 | struct pmcraid_instance *pinstance; | |
4488 | struct pmcraid_resource_entry *res; | |
4489 | struct pmcraid_resource_entry *temp; | |
4490 | struct scsi_device *sdev; | |
4491 | unsigned long lock_flags; | |
4492 | unsigned long host_lock_flags; | |
c20c4267 | 4493 | u16 fw_version; |
89a36810 AR |
4494 | u8 bus, target, lun; |
4495 | ||
4496 | pinstance = container_of(workp, struct pmcraid_instance, worker_q); | |
4497 | /* add resources only after host is added into system */ | |
4498 | if (!atomic_read(&pinstance->expose_resources)) | |
4499 | return; | |
4500 | ||
c20c4267 AR |
4501 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
4502 | ||
89a36810 AR |
4503 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); |
4504 | list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) { | |
4505 | ||
4506 | if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) { | |
4507 | sdev = res->scsi_dev; | |
4508 | ||
4509 | /* host_lock must be held before calling | |
4510 | * scsi_device_get | |
4511 | */ | |
4512 | spin_lock_irqsave(pinstance->host->host_lock, | |
4513 | host_lock_flags); | |
4514 | if (!scsi_device_get(sdev)) { | |
4515 | spin_unlock_irqrestore( | |
4516 | pinstance->host->host_lock, | |
4517 | host_lock_flags); | |
4518 | pmcraid_info("deleting %x from midlayer\n", | |
4519 | res->cfg_entry.resource_address); | |
4520 | list_move_tail(&res->queue, | |
4521 | &pinstance->free_res_q); | |
4522 | spin_unlock_irqrestore( | |
4523 | &pinstance->resource_lock, | |
4524 | lock_flags); | |
4525 | scsi_remove_device(sdev); | |
4526 | scsi_device_put(sdev); | |
4527 | spin_lock_irqsave(&pinstance->resource_lock, | |
4528 | lock_flags); | |
4529 | res->change_detected = 0; | |
4530 | } else { | |
4531 | spin_unlock_irqrestore( | |
4532 | pinstance->host->host_lock, | |
4533 | host_lock_flags); | |
4534 | } | |
4535 | } | |
4536 | } | |
4537 | ||
4538 | list_for_each_entry(res, &pinstance->used_res_q, queue) { | |
4539 | ||
4540 | if (res->change_detected == RES_CHANGE_ADD) { | |
4541 | ||
c20c4267 AR |
4542 | if (!pmcraid_expose_resource(fw_version, |
4543 | &res->cfg_entry)) | |
89a36810 AR |
4544 | continue; |
4545 | ||
4546 | if (RES_IS_VSET(res->cfg_entry)) { | |
4547 | bus = PMCRAID_VSET_BUS_ID; | |
c20c4267 AR |
4548 | if (fw_version <= PMCRAID_FW_VERSION_1) |
4549 | target = res->cfg_entry.unique_flags1; | |
4550 | else | |
4551 | target = res->cfg_entry.array_id & 0xFF; | |
89a36810 AR |
4552 | lun = PMCRAID_VSET_LUN_ID; |
4553 | } else { | |
4554 | bus = PMCRAID_PHYS_BUS_ID; | |
4555 | target = | |
4556 | RES_TARGET( | |
4557 | res->cfg_entry.resource_address); | |
4558 | lun = RES_LUN(res->cfg_entry.resource_address); | |
4559 | } | |
4560 | ||
4561 | res->change_detected = 0; | |
4562 | spin_unlock_irqrestore(&pinstance->resource_lock, | |
4563 | lock_flags); | |
4564 | scsi_add_device(pinstance->host, bus, target, lun); | |
4565 | spin_lock_irqsave(&pinstance->resource_lock, | |
4566 | lock_flags); | |
4567 | } | |
4568 | } | |
4569 | ||
4570 | spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); | |
4571 | } | |
4572 | ||
4573 | /** | |
4574 | * pmcraid_tasklet_function - Tasklet function | |
4575 | * | |
4576 | * @instance: pointer to msix param structure | |
4577 | * | |
4578 | * Return Value | |
4579 | * None | |
4580 | */ | |
c20c4267 | 4581 | static void pmcraid_tasklet_function(unsigned long instance) |
89a36810 AR |
4582 | { |
4583 | struct pmcraid_isr_param *hrrq_vector; | |
4584 | struct pmcraid_instance *pinstance; | |
4585 | unsigned long hrrq_lock_flags; | |
4586 | unsigned long pending_lock_flags; | |
4587 | unsigned long host_lock_flags; | |
4588 | spinlock_t *lockp; /* hrrq buffer lock */ | |
4589 | int id; | |
89a36810 AR |
4590 | __le32 resp; |
4591 | ||
4592 | hrrq_vector = (struct pmcraid_isr_param *)instance; | |
4593 | pinstance = hrrq_vector->drv_inst; | |
4594 | id = hrrq_vector->hrrq_id; | |
4595 | lockp = &(pinstance->hrrq_lock[id]); | |
89a36810 AR |
4596 | |
4597 | /* loop through each of the commands responded by IOA. Each HRRQ buf is | |
4598 | * protected by its own lock. Traversals must be done within this lock | |
4599 | * as there may be multiple tasklets running on multiple CPUs. Note | |
4600 | * that the lock is held just for picking up the response handle and | |
4601 | * manipulating hrrq_curr/toggle_bit values. | |
4602 | */ | |
4603 | spin_lock_irqsave(lockp, hrrq_lock_flags); | |
4604 | ||
4605 | resp = le32_to_cpu(*(pinstance->hrrq_curr[id])); | |
4606 | ||
4607 | while ((resp & HRRQ_TOGGLE_BIT) == | |
4608 | pinstance->host_toggle_bit[id]) { | |
4609 | ||
4610 | int cmd_index = resp >> 2; | |
4611 | struct pmcraid_cmd *cmd = NULL; | |
4612 | ||
89a36810 AR |
4613 | if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) { |
4614 | pinstance->hrrq_curr[id]++; | |
4615 | } else { | |
4616 | pinstance->hrrq_curr[id] = pinstance->hrrq_start[id]; | |
4617 | pinstance->host_toggle_bit[id] ^= 1u; | |
4618 | } | |
4619 | ||
c20c4267 AR |
4620 | if (cmd_index >= PMCRAID_MAX_CMD) { |
4621 | /* In case of invalid response handle, log message */ | |
4622 | pmcraid_err("Invalid response handle %d\n", cmd_index); | |
4623 | resp = le32_to_cpu(*(pinstance->hrrq_curr[id])); | |
4624 | continue; | |
4625 | } | |
4626 | ||
4627 | cmd = pinstance->cmd_list[cmd_index]; | |
89a36810 AR |
4628 | spin_unlock_irqrestore(lockp, hrrq_lock_flags); |
4629 | ||
4630 | spin_lock_irqsave(&pinstance->pending_pool_lock, | |
4631 | pending_lock_flags); | |
4632 | list_del(&cmd->free_list); | |
4633 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, | |
4634 | pending_lock_flags); | |
4635 | del_timer(&cmd->timer); | |
4636 | atomic_dec(&pinstance->outstanding_cmds); | |
4637 | ||
4638 | if (cmd->cmd_done == pmcraid_ioa_reset) { | |
4639 | spin_lock_irqsave(pinstance->host->host_lock, | |
4640 | host_lock_flags); | |
4641 | cmd->cmd_done(cmd); | |
4642 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
4643 | host_lock_flags); | |
4644 | } else if (cmd->cmd_done != NULL) { | |
4645 | cmd->cmd_done(cmd); | |
4646 | } | |
4647 | /* loop over until we are done with all responses */ | |
4648 | spin_lock_irqsave(lockp, hrrq_lock_flags); | |
4649 | resp = le32_to_cpu(*(pinstance->hrrq_curr[id])); | |
4650 | } | |
4651 | ||
4652 | spin_unlock_irqrestore(lockp, hrrq_lock_flags); | |
4653 | } | |
4654 | ||
4655 | /** | |
4656 | * pmcraid_unregister_interrupt_handler - de-register interrupts handlers | |
4657 | * @pinstance: pointer to adapter instance structure | |
4658 | * | |
4659 | * This routine un-registers registered interrupt handler and | |
4660 | * also frees irqs/vectors. | |
4661 | * | |
4662 | * Retun Value | |
4663 | * None | |
4664 | */ | |
4665 | static | |
4666 | void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance) | |
4667 | { | |
c20c4267 AR |
4668 | int i; |
4669 | ||
4670 | for (i = 0; i < pinstance->num_hrrq; i++) | |
4671 | free_irq(pinstance->hrrq_vector[i].vector, | |
4672 | &(pinstance->hrrq_vector[i])); | |
4673 | ||
4674 | if (pinstance->interrupt_mode) { | |
4675 | pci_disable_msix(pinstance->pdev); | |
4676 | pinstance->interrupt_mode = 0; | |
4677 | } | |
89a36810 AR |
4678 | } |
4679 | ||
4680 | /** | |
4681 | * pmcraid_register_interrupt_handler - registers interrupt handler | |
4682 | * @pinstance: pointer to per-adapter instance structure | |
4683 | * | |
4684 | * Return Value | |
4685 | * 0 on success, non-zero error code otherwise. | |
4686 | */ | |
4687 | static int | |
4688 | pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance) | |
4689 | { | |
c20c4267 | 4690 | int rc; |
89a36810 AR |
4691 | struct pci_dev *pdev = pinstance->pdev; |
4692 | ||
5da61410 AR |
4693 | if ((pmcraid_enable_msix) && |
4694 | (pci_find_capability(pdev, PCI_CAP_ID_MSIX))) { | |
c20c4267 AR |
4695 | int num_hrrq = PMCRAID_NUM_MSIX_VECTORS; |
4696 | struct msix_entry entries[PMCRAID_NUM_MSIX_VECTORS]; | |
4697 | int i; | |
4698 | for (i = 0; i < PMCRAID_NUM_MSIX_VECTORS; i++) | |
4699 | entries[i].entry = i; | |
4700 | ||
4701 | rc = pci_enable_msix(pdev, entries, num_hrrq); | |
4702 | if (rc < 0) | |
4703 | goto pmcraid_isr_legacy; | |
4704 | ||
4705 | /* Check how many MSIX vectors are allocated and register | |
4706 | * msi-x handlers for each of them giving appropriate buffer | |
4707 | */ | |
4708 | if (rc > 0) { | |
4709 | num_hrrq = rc; | |
4710 | if (pci_enable_msix(pdev, entries, num_hrrq)) | |
4711 | goto pmcraid_isr_legacy; | |
4712 | } | |
4713 | ||
4714 | for (i = 0; i < num_hrrq; i++) { | |
4715 | pinstance->hrrq_vector[i].hrrq_id = i; | |
4716 | pinstance->hrrq_vector[i].drv_inst = pinstance; | |
4717 | pinstance->hrrq_vector[i].vector = entries[i].vector; | |
4718 | rc = request_irq(pinstance->hrrq_vector[i].vector, | |
4719 | pmcraid_isr_msix, 0, | |
4720 | PMCRAID_DRIVER_NAME, | |
4721 | &(pinstance->hrrq_vector[i])); | |
4722 | ||
4723 | if (rc) { | |
4724 | int j; | |
4725 | for (j = 0; j < i; j++) | |
4726 | free_irq(entries[j].vector, | |
4727 | &(pinstance->hrrq_vector[j])); | |
4728 | pci_disable_msix(pdev); | |
4729 | goto pmcraid_isr_legacy; | |
4730 | } | |
4731 | } | |
4732 | ||
4733 | pinstance->num_hrrq = num_hrrq; | |
4734 | pinstance->interrupt_mode = 1; | |
4735 | iowrite32(DOORBELL_INTR_MODE_MSIX, | |
4736 | pinstance->int_regs.host_ioa_interrupt_reg); | |
4737 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
4738 | goto pmcraid_isr_out; | |
4739 | } | |
4740 | ||
4741 | pmcraid_isr_legacy: | |
4742 | /* If MSI-X registration failed fallback to legacy mode, where | |
4743 | * only one hrrq entry will be used | |
4744 | */ | |
89a36810 AR |
4745 | pinstance->hrrq_vector[0].hrrq_id = 0; |
4746 | pinstance->hrrq_vector[0].drv_inst = pinstance; | |
c20c4267 | 4747 | pinstance->hrrq_vector[0].vector = pdev->irq; |
89a36810 | 4748 | pinstance->num_hrrq = 1; |
c20c4267 AR |
4749 | rc = 0; |
4750 | ||
4751 | rc = request_irq(pdev->irq, pmcraid_isr, IRQF_SHARED, | |
4752 | PMCRAID_DRIVER_NAME, &pinstance->hrrq_vector[0]); | |
4753 | pmcraid_isr_out: | |
4754 | return rc; | |
89a36810 AR |
4755 | } |
4756 | ||
4757 | /** | |
4758 | * pmcraid_release_cmd_blocks - release buufers allocated for command blocks | |
4759 | * @pinstance: per adapter instance structure pointer | |
4760 | * @max_index: number of buffer blocks to release | |
4761 | * | |
4762 | * Return Value | |
4763 | * None | |
4764 | */ | |
4765 | static void | |
4766 | pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index) | |
4767 | { | |
4768 | int i; | |
4769 | for (i = 0; i < max_index; i++) { | |
4770 | kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]); | |
4771 | pinstance->cmd_list[i] = NULL; | |
4772 | } | |
4773 | kmem_cache_destroy(pinstance->cmd_cachep); | |
4774 | pinstance->cmd_cachep = NULL; | |
4775 | } | |
4776 | ||
4777 | /** | |
4778 | * pmcraid_release_control_blocks - releases buffers alloced for control blocks | |
4779 | * @pinstance: pointer to per adapter instance structure | |
4780 | * @max_index: number of buffers (from 0 onwards) to release | |
4781 | * | |
4782 | * This function assumes that the command blocks for which control blocks are | |
4783 | * linked are not released. | |
4784 | * | |
4785 | * Return Value | |
4786 | * None | |
4787 | */ | |
4788 | static void | |
4789 | pmcraid_release_control_blocks( | |
4790 | struct pmcraid_instance *pinstance, | |
4791 | int max_index | |
4792 | ) | |
4793 | { | |
4794 | int i; | |
4795 | ||
4796 | if (pinstance->control_pool == NULL) | |
4797 | return; | |
4798 | ||
4799 | for (i = 0; i < max_index; i++) { | |
4800 | pci_pool_free(pinstance->control_pool, | |
4801 | pinstance->cmd_list[i]->ioa_cb, | |
4802 | pinstance->cmd_list[i]->ioa_cb_bus_addr); | |
4803 | pinstance->cmd_list[i]->ioa_cb = NULL; | |
4804 | pinstance->cmd_list[i]->ioa_cb_bus_addr = 0; | |
4805 | } | |
4806 | pci_pool_destroy(pinstance->control_pool); | |
4807 | pinstance->control_pool = NULL; | |
4808 | } | |
4809 | ||
4810 | /** | |
4811 | * pmcraid_allocate_cmd_blocks - allocate memory for cmd block structures | |
4812 | * @pinstance - pointer to per adapter instance structure | |
4813 | * | |
4814 | * Allocates memory for command blocks using kernel slab allocator. | |
4815 | * | |
4816 | * Return Value | |
4817 | * 0 in case of success; -ENOMEM in case of failure | |
4818 | */ | |
6f039790 | 4819 | static int pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance) |
89a36810 AR |
4820 | { |
4821 | int i; | |
4822 | ||
4823 | sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d", | |
4824 | pinstance->host->unique_id); | |
4825 | ||
4826 | ||
4827 | pinstance->cmd_cachep = kmem_cache_create( | |
4828 | pinstance->cmd_pool_name, | |
4829 | sizeof(struct pmcraid_cmd), 0, | |
4830 | SLAB_HWCACHE_ALIGN, NULL); | |
4831 | if (!pinstance->cmd_cachep) | |
4832 | return -ENOMEM; | |
4833 | ||
4834 | for (i = 0; i < PMCRAID_MAX_CMD; i++) { | |
4835 | pinstance->cmd_list[i] = | |
4836 | kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL); | |
4837 | if (!pinstance->cmd_list[i]) { | |
4838 | pmcraid_release_cmd_blocks(pinstance, i); | |
4839 | return -ENOMEM; | |
4840 | } | |
4841 | } | |
4842 | return 0; | |
4843 | } | |
4844 | ||
4845 | /** | |
4846 | * pmcraid_allocate_control_blocks - allocates memory control blocks | |
4847 | * @pinstance : pointer to per adapter instance structure | |
4848 | * | |
4849 | * This function allocates PCI memory for DMAable buffers like IOARCB, IOADLs | |
4850 | * and IOASAs. This is called after command blocks are already allocated. | |
4851 | * | |
4852 | * Return Value | |
4853 | * 0 in case it can allocate all control blocks, otherwise -ENOMEM | |
4854 | */ | |
6f039790 | 4855 | static int pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance) |
89a36810 AR |
4856 | { |
4857 | int i; | |
4858 | ||
4859 | sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d", | |
4860 | pinstance->host->unique_id); | |
4861 | ||
4862 | pinstance->control_pool = | |
4863 | pci_pool_create(pinstance->ctl_pool_name, | |
4864 | pinstance->pdev, | |
4865 | sizeof(struct pmcraid_control_block), | |
4866 | PMCRAID_IOARCB_ALIGNMENT, 0); | |
4867 | ||
4868 | if (!pinstance->control_pool) | |
4869 | return -ENOMEM; | |
4870 | ||
4871 | for (i = 0; i < PMCRAID_MAX_CMD; i++) { | |
4872 | pinstance->cmd_list[i]->ioa_cb = | |
4873 | pci_pool_alloc( | |
4874 | pinstance->control_pool, | |
4875 | GFP_KERNEL, | |
4876 | &(pinstance->cmd_list[i]->ioa_cb_bus_addr)); | |
4877 | ||
4878 | if (!pinstance->cmd_list[i]->ioa_cb) { | |
4879 | pmcraid_release_control_blocks(pinstance, i); | |
4880 | return -ENOMEM; | |
4881 | } | |
4882 | memset(pinstance->cmd_list[i]->ioa_cb, 0, | |
4883 | sizeof(struct pmcraid_control_block)); | |
4884 | } | |
4885 | return 0; | |
4886 | } | |
4887 | ||
4888 | /** | |
4889 | * pmcraid_release_host_rrqs - release memory allocated for hrrq buffer(s) | |
4890 | * @pinstance: pointer to per adapter instance structure | |
4891 | * @maxindex: size of hrrq buffer pointer array | |
4892 | * | |
4893 | * Return Value | |
4894 | * None | |
4895 | */ | |
4896 | static void | |
4897 | pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex) | |
4898 | { | |
4899 | int i; | |
4900 | for (i = 0; i < maxindex; i++) { | |
4901 | ||
4902 | pci_free_consistent(pinstance->pdev, | |
4903 | HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD, | |
4904 | pinstance->hrrq_start[i], | |
4905 | pinstance->hrrq_start_bus_addr[i]); | |
4906 | ||
4907 | /* reset pointers and toggle bit to zeros */ | |
4908 | pinstance->hrrq_start[i] = NULL; | |
4909 | pinstance->hrrq_start_bus_addr[i] = 0; | |
4910 | pinstance->host_toggle_bit[i] = 0; | |
4911 | } | |
4912 | } | |
4913 | ||
4914 | /** | |
4915 | * pmcraid_allocate_host_rrqs - Allocate and initialize host RRQ buffers | |
4916 | * @pinstance: pointer to per adapter instance structure | |
4917 | * | |
4918 | * Return value | |
4919 | * 0 hrrq buffers are allocated, -ENOMEM otherwise. | |
4920 | */ | |
6f039790 | 4921 | static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance) |
89a36810 | 4922 | { |
c20c4267 | 4923 | int i, buffer_size; |
89a36810 | 4924 | |
c20c4267 | 4925 | buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD; |
89a36810 | 4926 | |
c20c4267 | 4927 | for (i = 0; i < pinstance->num_hrrq; i++) { |
89a36810 AR |
4928 | pinstance->hrrq_start[i] = |
4929 | pci_alloc_consistent( | |
4930 | pinstance->pdev, | |
4931 | buffer_size, | |
4932 | &(pinstance->hrrq_start_bus_addr[i])); | |
4933 | ||
4934 | if (pinstance->hrrq_start[i] == 0) { | |
c20c4267 AR |
4935 | pmcraid_err("pci_alloc failed for hrrq vector : %d\n", |
4936 | i); | |
89a36810 AR |
4937 | pmcraid_release_host_rrqs(pinstance, i); |
4938 | return -ENOMEM; | |
4939 | } | |
4940 | ||
4941 | memset(pinstance->hrrq_start[i], 0, buffer_size); | |
4942 | pinstance->hrrq_curr[i] = pinstance->hrrq_start[i]; | |
4943 | pinstance->hrrq_end[i] = | |
c20c4267 | 4944 | pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1; |
89a36810 AR |
4945 | pinstance->host_toggle_bit[i] = 1; |
4946 | spin_lock_init(&pinstance->hrrq_lock[i]); | |
4947 | } | |
4948 | return 0; | |
4949 | } | |
4950 | ||
4951 | /** | |
4952 | * pmcraid_release_hcams - release HCAM buffers | |
4953 | * | |
4954 | * @pinstance: pointer to per adapter instance structure | |
4955 | * | |
4956 | * Return value | |
4957 | * none | |
4958 | */ | |
4959 | static void pmcraid_release_hcams(struct pmcraid_instance *pinstance) | |
4960 | { | |
4961 | if (pinstance->ccn.msg != NULL) { | |
4962 | pci_free_consistent(pinstance->pdev, | |
4963 | PMCRAID_AEN_HDR_SIZE + | |
c20c4267 | 4964 | sizeof(struct pmcraid_hcam_ccn_ext), |
89a36810 AR |
4965 | pinstance->ccn.msg, |
4966 | pinstance->ccn.baddr); | |
4967 | ||
4968 | pinstance->ccn.msg = NULL; | |
4969 | pinstance->ccn.hcam = NULL; | |
4970 | pinstance->ccn.baddr = 0; | |
4971 | } | |
4972 | ||
4973 | if (pinstance->ldn.msg != NULL) { | |
4974 | pci_free_consistent(pinstance->pdev, | |
4975 | PMCRAID_AEN_HDR_SIZE + | |
4976 | sizeof(struct pmcraid_hcam_ldn), | |
4977 | pinstance->ldn.msg, | |
4978 | pinstance->ldn.baddr); | |
4979 | ||
4980 | pinstance->ldn.msg = NULL; | |
4981 | pinstance->ldn.hcam = NULL; | |
4982 | pinstance->ldn.baddr = 0; | |
4983 | } | |
4984 | } | |
4985 | ||
4986 | /** | |
4987 | * pmcraid_allocate_hcams - allocates HCAM buffers | |
4988 | * @pinstance : pointer to per adapter instance structure | |
4989 | * | |
4990 | * Return Value: | |
4991 | * 0 in case of successful allocation, non-zero otherwise | |
4992 | */ | |
4993 | static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance) | |
4994 | { | |
4995 | pinstance->ccn.msg = pci_alloc_consistent( | |
4996 | pinstance->pdev, | |
4997 | PMCRAID_AEN_HDR_SIZE + | |
c20c4267 | 4998 | sizeof(struct pmcraid_hcam_ccn_ext), |
89a36810 AR |
4999 | &(pinstance->ccn.baddr)); |
5000 | ||
5001 | pinstance->ldn.msg = pci_alloc_consistent( | |
5002 | pinstance->pdev, | |
5003 | PMCRAID_AEN_HDR_SIZE + | |
5004 | sizeof(struct pmcraid_hcam_ldn), | |
5005 | &(pinstance->ldn.baddr)); | |
5006 | ||
5007 | if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) { | |
5008 | pmcraid_release_hcams(pinstance); | |
5009 | } else { | |
5010 | pinstance->ccn.hcam = | |
5011 | (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE; | |
5012 | pinstance->ldn.hcam = | |
5013 | (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE; | |
5014 | ||
5015 | atomic_set(&pinstance->ccn.ignore, 0); | |
5016 | atomic_set(&pinstance->ldn.ignore, 0); | |
5017 | } | |
5018 | ||
5019 | return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0; | |
5020 | } | |
5021 | ||
5022 | /** | |
5023 | * pmcraid_release_config_buffers - release config.table buffers | |
5024 | * @pinstance: pointer to per adapter instance structure | |
5025 | * | |
5026 | * Return Value | |
5027 | * none | |
5028 | */ | |
5029 | static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance) | |
5030 | { | |
5031 | if (pinstance->cfg_table != NULL && | |
5032 | pinstance->cfg_table_bus_addr != 0) { | |
5033 | pci_free_consistent(pinstance->pdev, | |
5034 | sizeof(struct pmcraid_config_table), | |
5035 | pinstance->cfg_table, | |
5036 | pinstance->cfg_table_bus_addr); | |
5037 | pinstance->cfg_table = NULL; | |
5038 | pinstance->cfg_table_bus_addr = 0; | |
5039 | } | |
5040 | ||
5041 | if (pinstance->res_entries != NULL) { | |
5042 | int i; | |
5043 | ||
5044 | for (i = 0; i < PMCRAID_MAX_RESOURCES; i++) | |
5045 | list_del(&pinstance->res_entries[i].queue); | |
5046 | kfree(pinstance->res_entries); | |
5047 | pinstance->res_entries = NULL; | |
5048 | } | |
5049 | ||
5050 | pmcraid_release_hcams(pinstance); | |
5051 | } | |
5052 | ||
5053 | /** | |
5054 | * pmcraid_allocate_config_buffers - allocates DMAable memory for config table | |
5055 | * @pinstance : pointer to per adapter instance structure | |
5056 | * | |
5057 | * Return Value | |
5058 | * 0 for successful allocation, -ENOMEM for any failure | |
5059 | */ | |
6f039790 | 5060 | static int pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance) |
89a36810 AR |
5061 | { |
5062 | int i; | |
5063 | ||
5064 | pinstance->res_entries = | |
5065 | kzalloc(sizeof(struct pmcraid_resource_entry) * | |
5066 | PMCRAID_MAX_RESOURCES, GFP_KERNEL); | |
5067 | ||
5068 | if (NULL == pinstance->res_entries) { | |
5069 | pmcraid_err("failed to allocate memory for resource table\n"); | |
5070 | return -ENOMEM; | |
5071 | } | |
5072 | ||
5073 | for (i = 0; i < PMCRAID_MAX_RESOURCES; i++) | |
5074 | list_add_tail(&pinstance->res_entries[i].queue, | |
5075 | &pinstance->free_res_q); | |
5076 | ||
5077 | pinstance->cfg_table = | |
5078 | pci_alloc_consistent(pinstance->pdev, | |
5079 | sizeof(struct pmcraid_config_table), | |
5080 | &pinstance->cfg_table_bus_addr); | |
5081 | ||
5082 | if (NULL == pinstance->cfg_table) { | |
5083 | pmcraid_err("couldn't alloc DMA memory for config table\n"); | |
5084 | pmcraid_release_config_buffers(pinstance); | |
5085 | return -ENOMEM; | |
5086 | } | |
5087 | ||
5088 | if (pmcraid_allocate_hcams(pinstance)) { | |
5089 | pmcraid_err("could not alloc DMA memory for HCAMS\n"); | |
5090 | pmcraid_release_config_buffers(pinstance); | |
5091 | return -ENOMEM; | |
5092 | } | |
5093 | ||
5094 | return 0; | |
5095 | } | |
5096 | ||
5097 | /** | |
5098 | * pmcraid_init_tasklets - registers tasklets for response handling | |
5099 | * | |
5100 | * @pinstance: pointer adapter instance structure | |
5101 | * | |
5102 | * Return value | |
5103 | * none | |
5104 | */ | |
5105 | static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance) | |
5106 | { | |
5107 | int i; | |
5108 | for (i = 0; i < pinstance->num_hrrq; i++) | |
5109 | tasklet_init(&pinstance->isr_tasklet[i], | |
5110 | pmcraid_tasklet_function, | |
5111 | (unsigned long)&pinstance->hrrq_vector[i]); | |
5112 | } | |
5113 | ||
5114 | /** | |
5115 | * pmcraid_kill_tasklets - destroys tasklets registered for response handling | |
5116 | * | |
5117 | * @pinstance: pointer to adapter instance structure | |
5118 | * | |
5119 | * Return value | |
5120 | * none | |
5121 | */ | |
5122 | static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance) | |
5123 | { | |
5124 | int i; | |
5125 | for (i = 0; i < pinstance->num_hrrq; i++) | |
5126 | tasklet_kill(&pinstance->isr_tasklet[i]); | |
5127 | } | |
5128 | ||
c20c4267 AR |
5129 | /** |
5130 | * pmcraid_release_buffers - release per-adapter buffers allocated | |
5131 | * | |
5132 | * @pinstance: pointer to adapter soft state | |
5133 | * | |
5134 | * Return Value | |
5135 | * none | |
5136 | */ | |
5137 | static void pmcraid_release_buffers(struct pmcraid_instance *pinstance) | |
5138 | { | |
5139 | pmcraid_release_config_buffers(pinstance); | |
5140 | pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD); | |
5141 | pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD); | |
5142 | pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); | |
5143 | ||
5144 | if (pinstance->inq_data != NULL) { | |
5145 | pci_free_consistent(pinstance->pdev, | |
5146 | sizeof(struct pmcraid_inquiry_data), | |
5147 | pinstance->inq_data, | |
5148 | pinstance->inq_data_baddr); | |
5149 | ||
5150 | pinstance->inq_data = NULL; | |
5151 | pinstance->inq_data_baddr = 0; | |
5152 | } | |
592488a3 AR |
5153 | |
5154 | if (pinstance->timestamp_data != NULL) { | |
5155 | pci_free_consistent(pinstance->pdev, | |
5156 | sizeof(struct pmcraid_timestamp_data), | |
5157 | pinstance->timestamp_data, | |
5158 | pinstance->timestamp_data_baddr); | |
5159 | ||
5160 | pinstance->timestamp_data = NULL; | |
5161 | pinstance->timestamp_data_baddr = 0; | |
5162 | } | |
c20c4267 AR |
5163 | } |
5164 | ||
89a36810 AR |
5165 | /** |
5166 | * pmcraid_init_buffers - allocates memory and initializes various structures | |
5167 | * @pinstance: pointer to per adapter instance structure | |
5168 | * | |
5169 | * This routine pre-allocates memory based on the type of block as below: | |
5170 | * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator, | |
5171 | * IOARCBs(PMCRAID_MAX_CMD) : DMAable memory, using pci pool allocator | |
5172 | * config-table entries : DMAable memory using pci_alloc_consistent | |
5173 | * HostRRQs : DMAable memory, using pci_alloc_consistent | |
5174 | * | |
5175 | * Return Value | |
5176 | * 0 in case all of the blocks are allocated, -ENOMEM otherwise. | |
5177 | */ | |
6f039790 | 5178 | static int pmcraid_init_buffers(struct pmcraid_instance *pinstance) |
89a36810 AR |
5179 | { |
5180 | int i; | |
5181 | ||
5182 | if (pmcraid_allocate_host_rrqs(pinstance)) { | |
5183 | pmcraid_err("couldn't allocate memory for %d host rrqs\n", | |
5184 | pinstance->num_hrrq); | |
5185 | return -ENOMEM; | |
5186 | } | |
5187 | ||
5188 | if (pmcraid_allocate_config_buffers(pinstance)) { | |
5189 | pmcraid_err("couldn't allocate memory for config buffers\n"); | |
5190 | pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); | |
5191 | return -ENOMEM; | |
5192 | } | |
5193 | ||
5194 | if (pmcraid_allocate_cmd_blocks(pinstance)) { | |
c20c4267 | 5195 | pmcraid_err("couldn't allocate memory for cmd blocks\n"); |
89a36810 AR |
5196 | pmcraid_release_config_buffers(pinstance); |
5197 | pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); | |
5198 | return -ENOMEM; | |
5199 | } | |
5200 | ||
5201 | if (pmcraid_allocate_control_blocks(pinstance)) { | |
c20c4267 | 5202 | pmcraid_err("couldn't allocate memory control blocks\n"); |
89a36810 AR |
5203 | pmcraid_release_config_buffers(pinstance); |
5204 | pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD); | |
5205 | pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); | |
5206 | return -ENOMEM; | |
5207 | } | |
5208 | ||
c20c4267 AR |
5209 | /* allocate DMAable memory for page D0 INQUIRY buffer */ |
5210 | pinstance->inq_data = pci_alloc_consistent( | |
5211 | pinstance->pdev, | |
5212 | sizeof(struct pmcraid_inquiry_data), | |
5213 | &pinstance->inq_data_baddr); | |
5214 | ||
5215 | if (pinstance->inq_data == NULL) { | |
5216 | pmcraid_err("couldn't allocate DMA memory for INQUIRY\n"); | |
5217 | pmcraid_release_buffers(pinstance); | |
5218 | return -ENOMEM; | |
5219 | } | |
5220 | ||
592488a3 AR |
5221 | /* allocate DMAable memory for set timestamp data buffer */ |
5222 | pinstance->timestamp_data = pci_alloc_consistent( | |
5223 | pinstance->pdev, | |
5224 | sizeof(struct pmcraid_timestamp_data), | |
5225 | &pinstance->timestamp_data_baddr); | |
5226 | ||
5227 | if (pinstance->timestamp_data == NULL) { | |
5228 | pmcraid_err("couldn't allocate DMA memory for \ | |
5229 | set time_stamp \n"); | |
5230 | pmcraid_release_buffers(pinstance); | |
5231 | return -ENOMEM; | |
5232 | } | |
5233 | ||
5234 | ||
89a36810 AR |
5235 | /* Initialize all the command blocks and add them to free pool. No |
5236 | * need to lock (free_pool_lock) as this is done in initialization | |
5237 | * itself | |
5238 | */ | |
5239 | for (i = 0; i < PMCRAID_MAX_CMD; i++) { | |
5240 | struct pmcraid_cmd *cmdp = pinstance->cmd_list[i]; | |
5241 | pmcraid_init_cmdblk(cmdp, i); | |
5242 | cmdp->drv_inst = pinstance; | |
5243 | list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool); | |
5244 | } | |
5245 | ||
5246 | return 0; | |
5247 | } | |
5248 | ||
5249 | /** | |
5250 | * pmcraid_reinit_buffers - resets various buffer pointers | |
5251 | * @pinstance: pointer to adapter instance | |
5252 | * Return value | |
c20c4267 | 5253 | * none |
89a36810 AR |
5254 | */ |
5255 | static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance) | |
5256 | { | |
5257 | int i; | |
5258 | int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD; | |
5259 | ||
5260 | for (i = 0; i < pinstance->num_hrrq; i++) { | |
5261 | memset(pinstance->hrrq_start[i], 0, buffer_size); | |
5262 | pinstance->hrrq_curr[i] = pinstance->hrrq_start[i]; | |
5263 | pinstance->hrrq_end[i] = | |
5264 | pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1; | |
5265 | pinstance->host_toggle_bit[i] = 1; | |
5266 | } | |
5267 | } | |
5268 | ||
5269 | /** | |
5270 | * pmcraid_init_instance - initialize per instance data structure | |
5271 | * @pdev: pointer to pci device structure | |
5272 | * @host: pointer to Scsi_Host structure | |
5273 | * @mapped_pci_addr: memory mapped IOA configuration registers | |
5274 | * | |
5275 | * Return Value | |
5276 | * 0 on success, non-zero in case of any failure | |
5277 | */ | |
6f039790 GKH |
5278 | static int pmcraid_init_instance(struct pci_dev *pdev, struct Scsi_Host *host, |
5279 | void __iomem *mapped_pci_addr) | |
89a36810 AR |
5280 | { |
5281 | struct pmcraid_instance *pinstance = | |
5282 | (struct pmcraid_instance *)host->hostdata; | |
5283 | ||
5284 | pinstance->host = host; | |
5285 | pinstance->pdev = pdev; | |
5286 | ||
5287 | /* Initialize register addresses */ | |
5288 | pinstance->mapped_dma_addr = mapped_pci_addr; | |
5289 | ||
5290 | /* Initialize chip-specific details */ | |
5291 | { | |
5292 | struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg; | |
5293 | struct pmcraid_interrupts *pint_regs = &pinstance->int_regs; | |
5294 | ||
5295 | pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin; | |
5296 | ||
5297 | pint_regs->ioa_host_interrupt_reg = | |
5298 | mapped_pci_addr + chip_cfg->ioa_host_intr; | |
5299 | pint_regs->ioa_host_interrupt_clr_reg = | |
5300 | mapped_pci_addr + chip_cfg->ioa_host_intr_clr; | |
c20c4267 AR |
5301 | pint_regs->ioa_host_msix_interrupt_reg = |
5302 | mapped_pci_addr + chip_cfg->ioa_host_msix_intr; | |
89a36810 AR |
5303 | pint_regs->host_ioa_interrupt_reg = |
5304 | mapped_pci_addr + chip_cfg->host_ioa_intr; | |
5305 | pint_regs->host_ioa_interrupt_clr_reg = | |
5306 | mapped_pci_addr + chip_cfg->host_ioa_intr_clr; | |
5307 | ||
5308 | /* Current version of firmware exposes interrupt mask set | |
5309 | * and mask clr registers through memory mapped bar0. | |
5310 | */ | |
5311 | pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox; | |
5312 | pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus; | |
5313 | pint_regs->ioa_host_interrupt_mask_reg = | |
5314 | mapped_pci_addr + chip_cfg->ioa_host_mask; | |
5315 | pint_regs->ioa_host_interrupt_mask_clr_reg = | |
5316 | mapped_pci_addr + chip_cfg->ioa_host_mask_clr; | |
5317 | pint_regs->global_interrupt_mask_reg = | |
5318 | mapped_pci_addr + chip_cfg->global_intr_mask; | |
5319 | }; | |
5320 | ||
5321 | pinstance->ioa_reset_attempts = 0; | |
5322 | init_waitqueue_head(&pinstance->reset_wait_q); | |
5323 | ||
5324 | atomic_set(&pinstance->outstanding_cmds, 0); | |
c20c4267 | 5325 | atomic_set(&pinstance->last_message_id, 0); |
89a36810 AR |
5326 | atomic_set(&pinstance->expose_resources, 0); |
5327 | ||
5328 | INIT_LIST_HEAD(&pinstance->free_res_q); | |
5329 | INIT_LIST_HEAD(&pinstance->used_res_q); | |
5330 | INIT_LIST_HEAD(&pinstance->free_cmd_pool); | |
5331 | INIT_LIST_HEAD(&pinstance->pending_cmd_pool); | |
5332 | ||
5333 | spin_lock_init(&pinstance->free_pool_lock); | |
5334 | spin_lock_init(&pinstance->pending_pool_lock); | |
5335 | spin_lock_init(&pinstance->resource_lock); | |
5336 | mutex_init(&pinstance->aen_queue_lock); | |
5337 | ||
5338 | /* Work-queue (Shared) for deferred processing error handling */ | |
5339 | INIT_WORK(&pinstance->worker_q, pmcraid_worker_function); | |
5340 | ||
5341 | /* Initialize the default log_level */ | |
5342 | pinstance->current_log_level = pmcraid_log_level; | |
5343 | ||
5344 | /* Setup variables required for reset engine */ | |
5345 | pinstance->ioa_state = IOA_STATE_UNKNOWN; | |
5346 | pinstance->reset_cmd = NULL; | |
5347 | return 0; | |
5348 | } | |
5349 | ||
89a36810 AR |
5350 | /** |
5351 | * pmcraid_shutdown - shutdown adapter controller. | |
5352 | * @pdev: pci device struct | |
5353 | * | |
5354 | * Issues an adapter shutdown to the card waits for its completion | |
5355 | * | |
5356 | * Return value | |
5357 | * none | |
5358 | */ | |
5359 | static void pmcraid_shutdown(struct pci_dev *pdev) | |
5360 | { | |
5361 | struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); | |
5362 | pmcraid_reset_bringdown(pinstance); | |
5363 | } | |
5364 | ||
5365 | ||
5366 | /** | |
5367 | * pmcraid_get_minor - returns unused minor number from minor number bitmap | |
5368 | */ | |
5369 | static unsigned short pmcraid_get_minor(void) | |
5370 | { | |
5371 | int minor; | |
5372 | ||
5373 | minor = find_first_zero_bit(pmcraid_minor, sizeof(pmcraid_minor)); | |
5374 | __set_bit(minor, pmcraid_minor); | |
5375 | return minor; | |
5376 | } | |
5377 | ||
5378 | /** | |
5379 | * pmcraid_release_minor - releases given minor back to minor number bitmap | |
5380 | */ | |
5381 | static void pmcraid_release_minor(unsigned short minor) | |
5382 | { | |
5383 | __clear_bit(minor, pmcraid_minor); | |
5384 | } | |
5385 | ||
5386 | /** | |
5387 | * pmcraid_setup_chrdev - allocates a minor number and registers a char device | |
5388 | * | |
5389 | * @pinstance: pointer to adapter instance for which to register device | |
5390 | * | |
5391 | * Return value | |
5392 | * 0 in case of success, otherwise non-zero | |
5393 | */ | |
5394 | static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance) | |
5395 | { | |
5396 | int minor; | |
5397 | int error; | |
5398 | ||
5399 | minor = pmcraid_get_minor(); | |
5400 | cdev_init(&pinstance->cdev, &pmcraid_fops); | |
5401 | pinstance->cdev.owner = THIS_MODULE; | |
5402 | ||
5403 | error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1); | |
5404 | ||
5405 | if (error) | |
5406 | pmcraid_release_minor(minor); | |
5407 | else | |
5408 | device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor), | |
c20c4267 | 5409 | NULL, "%s%u", PMCRAID_DEVFILE, minor); |
89a36810 AR |
5410 | return error; |
5411 | } | |
5412 | ||
5413 | /** | |
5414 | * pmcraid_release_chrdev - unregisters per-adapter management interface | |
5415 | * | |
5416 | * @pinstance: pointer to adapter instance structure | |
5417 | * | |
5418 | * Return value | |
5419 | * none | |
5420 | */ | |
5421 | static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance) | |
5422 | { | |
5423 | pmcraid_release_minor(MINOR(pinstance->cdev.dev)); | |
5424 | device_destroy(pmcraid_class, | |
5425 | MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev))); | |
5426 | cdev_del(&pinstance->cdev); | |
5427 | } | |
5428 | ||
5429 | /** | |
5430 | * pmcraid_remove - IOA hot plug remove entry point | |
5431 | * @pdev: pci device struct | |
5432 | * | |
5433 | * Return value | |
5434 | * none | |
5435 | */ | |
6f039790 | 5436 | static void pmcraid_remove(struct pci_dev *pdev) |
89a36810 AR |
5437 | { |
5438 | struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); | |
5439 | ||
5440 | /* remove the management interface (/dev file) for this device */ | |
5441 | pmcraid_release_chrdev(pinstance); | |
5442 | ||
5443 | /* remove host template from scsi midlayer */ | |
5444 | scsi_remove_host(pinstance->host); | |
5445 | ||
5446 | /* block requests from mid-layer */ | |
5447 | scsi_block_requests(pinstance->host); | |
5448 | ||
5449 | /* initiate shutdown adapter */ | |
5450 | pmcraid_shutdown(pdev); | |
5451 | ||
5452 | pmcraid_disable_interrupts(pinstance, ~0); | |
43829731 | 5453 | flush_work(&pinstance->worker_q); |
89a36810 AR |
5454 | |
5455 | pmcraid_kill_tasklets(pinstance); | |
5456 | pmcraid_unregister_interrupt_handler(pinstance); | |
5457 | pmcraid_release_buffers(pinstance); | |
5458 | iounmap(pinstance->mapped_dma_addr); | |
5459 | pci_release_regions(pdev); | |
5460 | scsi_host_put(pinstance->host); | |
5461 | pci_disable_device(pdev); | |
5462 | ||
5463 | return; | |
5464 | } | |
5465 | ||
5466 | #ifdef CONFIG_PM | |
5467 | /** | |
5468 | * pmcraid_suspend - driver suspend entry point for power management | |
5469 | * @pdev: PCI device structure | |
5470 | * @state: PCI power state to suspend routine | |
5471 | * | |
5472 | * Return Value - 0 always | |
5473 | */ | |
5474 | static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state) | |
5475 | { | |
5476 | struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); | |
5477 | ||
5478 | pmcraid_shutdown(pdev); | |
5479 | pmcraid_disable_interrupts(pinstance, ~0); | |
5480 | pmcraid_kill_tasklets(pinstance); | |
5481 | pci_set_drvdata(pinstance->pdev, pinstance); | |
5482 | pmcraid_unregister_interrupt_handler(pinstance); | |
5483 | pci_save_state(pdev); | |
5484 | pci_disable_device(pdev); | |
5485 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
5486 | ||
5487 | return 0; | |
5488 | } | |
5489 | ||
5490 | /** | |
5491 | * pmcraid_resume - driver resume entry point PCI power management | |
5492 | * @pdev: PCI device structure | |
5493 | * | |
5494 | * Return Value - 0 in case of success. Error code in case of any failure | |
5495 | */ | |
5496 | static int pmcraid_resume(struct pci_dev *pdev) | |
5497 | { | |
5498 | struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); | |
5499 | struct Scsi_Host *host = pinstance->host; | |
5500 | int rc; | |
89a36810 AR |
5501 | |
5502 | pci_set_power_state(pdev, PCI_D0); | |
5503 | pci_enable_wake(pdev, PCI_D0, 0); | |
5504 | pci_restore_state(pdev); | |
5505 | ||
5506 | rc = pci_enable_device(pdev); | |
5507 | ||
5508 | if (rc) { | |
34876402 | 5509 | dev_err(&pdev->dev, "resume: Enable device failed\n"); |
89a36810 AR |
5510 | return rc; |
5511 | } | |
5512 | ||
5513 | pci_set_master(pdev); | |
5514 | ||
5515 | if ((sizeof(dma_addr_t) == 4) || | |
5516 | pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) | |
5517 | rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); | |
5518 | ||
5519 | if (rc == 0) | |
5520 | rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); | |
5521 | ||
5522 | if (rc != 0) { | |
34876402 | 5523 | dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n"); |
89a36810 AR |
5524 | goto disable_device; |
5525 | } | |
5526 | ||
c20c4267 | 5527 | pmcraid_disable_interrupts(pinstance, ~0); |
89a36810 | 5528 | atomic_set(&pinstance->outstanding_cmds, 0); |
89a36810 AR |
5529 | rc = pmcraid_register_interrupt_handler(pinstance); |
5530 | ||
5531 | if (rc) { | |
34876402 AR |
5532 | dev_err(&pdev->dev, |
5533 | "resume: couldn't register interrupt handlers\n"); | |
89a36810 AR |
5534 | rc = -ENODEV; |
5535 | goto release_host; | |
5536 | } | |
5537 | ||
5538 | pmcraid_init_tasklets(pinstance); | |
5539 | pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS); | |
5540 | ||
5541 | /* Start with hard reset sequence which brings up IOA to operational | |
5542 | * state as well as completes the reset sequence. | |
5543 | */ | |
5544 | pinstance->ioa_hard_reset = 1; | |
5545 | ||
5546 | /* Start IOA firmware initialization and bring card to Operational | |
5547 | * state. | |
5548 | */ | |
5549 | if (pmcraid_reset_bringup(pinstance)) { | |
c20c4267 | 5550 | dev_err(&pdev->dev, "couldn't initialize IOA\n"); |
89a36810 AR |
5551 | rc = -ENODEV; |
5552 | goto release_tasklets; | |
5553 | } | |
5554 | ||
5555 | return 0; | |
5556 | ||
5557 | release_tasklets: | |
c20c4267 | 5558 | pmcraid_disable_interrupts(pinstance, ~0); |
89a36810 AR |
5559 | pmcraid_kill_tasklets(pinstance); |
5560 | pmcraid_unregister_interrupt_handler(pinstance); | |
5561 | ||
5562 | release_host: | |
5563 | scsi_host_put(host); | |
5564 | ||
5565 | disable_device: | |
5566 | pci_disable_device(pdev); | |
5567 | ||
5568 | return rc; | |
5569 | } | |
5570 | ||
5571 | #else | |
5572 | ||
5573 | #define pmcraid_suspend NULL | |
5574 | #define pmcraid_resume NULL | |
5575 | ||
5576 | #endif /* CONFIG_PM */ | |
5577 | ||
5578 | /** | |
5579 | * pmcraid_complete_ioa_reset - Called by either timer or tasklet during | |
c20c4267 | 5580 | * completion of the ioa reset |
89a36810 AR |
5581 | * @cmd: pointer to reset command block |
5582 | */ | |
5583 | static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd) | |
5584 | { | |
5585 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
5586 | unsigned long flags; | |
5587 | ||
5588 | spin_lock_irqsave(pinstance->host->host_lock, flags); | |
5589 | pmcraid_ioa_reset(cmd); | |
5590 | spin_unlock_irqrestore(pinstance->host->host_lock, flags); | |
5591 | scsi_unblock_requests(pinstance->host); | |
5592 | schedule_work(&pinstance->worker_q); | |
5593 | } | |
5594 | ||
5595 | /** | |
5596 | * pmcraid_set_supported_devs - sends SET SUPPORTED DEVICES to IOAFP | |
5597 | * | |
5598 | * @cmd: pointer to pmcraid_cmd structure | |
5599 | * | |
5600 | * Return Value | |
5601 | * 0 for success or non-zero for failure cases | |
5602 | */ | |
5603 | static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd) | |
5604 | { | |
5605 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
5606 | void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset; | |
5607 | ||
5608 | pmcraid_reinit_cmdblk(cmd); | |
5609 | ||
5610 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
5611 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
5612 | ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES; | |
5613 | ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED; | |
5614 | ||
5615 | /* If this was called as part of resource table reinitialization due to | |
5616 | * lost CCN, it is enough to return the command block back to free pool | |
5617 | * as part of set_supported_devs completion function. | |
5618 | */ | |
5619 | if (cmd->drv_inst->reinit_cfg_table) { | |
5620 | cmd->drv_inst->reinit_cfg_table = 0; | |
5621 | cmd->release = 1; | |
5622 | cmd_done = pmcraid_reinit_cfgtable_done; | |
5623 | } | |
5624 | ||
5625 | /* we will be done with the reset sequence after set supported devices, | |
5626 | * setup the done function to return the command block back to free | |
5627 | * pool | |
5628 | */ | |
5629 | pmcraid_send_cmd(cmd, | |
5630 | cmd_done, | |
5631 | PMCRAID_SET_SUP_DEV_TIMEOUT, | |
5632 | pmcraid_timeout_handler); | |
5633 | return; | |
5634 | } | |
5635 | ||
592488a3 AR |
5636 | /** |
5637 | * pmcraid_set_timestamp - set the timestamp to IOAFP | |
5638 | * | |
5639 | * @cmd: pointer to pmcraid_cmd structure | |
5640 | * | |
5641 | * Return Value | |
5642 | * 0 for success or non-zero for failure cases | |
5643 | */ | |
5644 | static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd) | |
5645 | { | |
5646 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
5647 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
5648 | __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN); | |
5649 | struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl; | |
5650 | ||
5651 | struct timeval tv; | |
5652 | __le64 timestamp; | |
5653 | ||
5654 | do_gettimeofday(&tv); | |
5655 | timestamp = tv.tv_sec * 1000; | |
5656 | ||
5657 | pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp); | |
5658 | pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8); | |
5659 | pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16); | |
5660 | pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24); | |
5661 | pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32); | |
5662 | pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40); | |
5663 | ||
5664 | pmcraid_reinit_cmdblk(cmd); | |
5665 | ioarcb->request_type = REQ_TYPE_SCSI; | |
5666 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
5667 | ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP; | |
5668 | ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION; | |
5669 | memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len)); | |
5670 | ||
5671 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
5672 | offsetof(struct pmcraid_ioarcb, | |
5673 | add_data.u.ioadl[0])); | |
5674 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
5675 | ioarcb->ioarcb_bus_addr &= ~(0x1FULL); | |
5676 | ||
5677 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
5678 | ioarcb->request_flags0 |= TRANSFER_DIR_WRITE; | |
5679 | ioarcb->data_transfer_length = | |
5680 | cpu_to_le32(sizeof(struct pmcraid_timestamp_data)); | |
5681 | ioadl = &(ioarcb->add_data.u.ioadl[0]); | |
5682 | ioadl->flags = IOADL_FLAGS_LAST_DESC; | |
5683 | ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr); | |
5684 | ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data)); | |
5685 | ||
5686 | if (!pinstance->timestamp_error) { | |
5687 | pinstance->timestamp_error = 0; | |
5688 | pmcraid_send_cmd(cmd, pmcraid_set_supported_devs, | |
5689 | PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); | |
5690 | } else { | |
5691 | pmcraid_send_cmd(cmd, pmcraid_return_cmd, | |
5692 | PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); | |
5693 | return; | |
5694 | } | |
5695 | } | |
5696 | ||
5697 | ||
89a36810 AR |
5698 | /** |
5699 | * pmcraid_init_res_table - Initialize the resource table | |
5700 | * @cmd: pointer to pmcraid command struct | |
5701 | * | |
5702 | * This function looks through the existing resource table, comparing | |
5703 | * it with the config table. This function will take care of old/new | |
5704 | * devices and schedule adding/removing them from the mid-layer | |
5705 | * as appropriate. | |
5706 | * | |
5707 | * Return value | |
5708 | * None | |
5709 | */ | |
5710 | static void pmcraid_init_res_table(struct pmcraid_cmd *cmd) | |
5711 | { | |
5712 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
5713 | struct pmcraid_resource_entry *res, *temp; | |
5714 | struct pmcraid_config_table_entry *cfgte; | |
5715 | unsigned long lock_flags; | |
5716 | int found, rc, i; | |
c20c4267 | 5717 | u16 fw_version; |
89a36810 AR |
5718 | LIST_HEAD(old_res); |
5719 | ||
5720 | if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED) | |
34876402 | 5721 | pmcraid_err("IOA requires microcode download\n"); |
89a36810 | 5722 | |
c20c4267 AR |
5723 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
5724 | ||
89a36810 AR |
5725 | /* resource list is protected by pinstance->resource_lock. |
5726 | * init_res_table can be called from probe (user-thread) or runtime | |
5727 | * reset (timer/tasklet) | |
5728 | */ | |
5729 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); | |
5730 | ||
5731 | list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) | |
5732 | list_move_tail(&res->queue, &old_res); | |
5733 | ||
5734 | for (i = 0; i < pinstance->cfg_table->num_entries; i++) { | |
c20c4267 AR |
5735 | if (be16_to_cpu(pinstance->inq_data->fw_version) <= |
5736 | PMCRAID_FW_VERSION_1) | |
5737 | cfgte = &pinstance->cfg_table->entries[i]; | |
5738 | else | |
5739 | cfgte = (struct pmcraid_config_table_entry *) | |
5740 | &pinstance->cfg_table->entries_ext[i]; | |
89a36810 | 5741 | |
c20c4267 | 5742 | if (!pmcraid_expose_resource(fw_version, cfgte)) |
89a36810 AR |
5743 | continue; |
5744 | ||
5745 | found = 0; | |
5746 | ||
5747 | /* If this entry was already detected and initialized */ | |
5748 | list_for_each_entry_safe(res, temp, &old_res, queue) { | |
5749 | ||
5750 | rc = memcmp(&res->cfg_entry.resource_address, | |
5751 | &cfgte->resource_address, | |
5752 | sizeof(cfgte->resource_address)); | |
5753 | if (!rc) { | |
5754 | list_move_tail(&res->queue, | |
5755 | &pinstance->used_res_q); | |
5756 | found = 1; | |
5757 | break; | |
5758 | } | |
5759 | } | |
5760 | ||
5761 | /* If this is new entry, initialize it and add it the queue */ | |
5762 | if (!found) { | |
5763 | ||
5764 | if (list_empty(&pinstance->free_res_q)) { | |
34876402 | 5765 | pmcraid_err("Too many devices attached\n"); |
89a36810 AR |
5766 | break; |
5767 | } | |
5768 | ||
5769 | found = 1; | |
5770 | res = list_entry(pinstance->free_res_q.next, | |
5771 | struct pmcraid_resource_entry, queue); | |
5772 | ||
5773 | res->scsi_dev = NULL; | |
5774 | res->change_detected = RES_CHANGE_ADD; | |
5775 | res->reset_progress = 0; | |
5776 | list_move_tail(&res->queue, &pinstance->used_res_q); | |
5777 | } | |
5778 | ||
5779 | /* copy new configuration table entry details into driver | |
5780 | * maintained resource entry | |
5781 | */ | |
5782 | if (found) { | |
5783 | memcpy(&res->cfg_entry, cfgte, | |
c20c4267 | 5784 | pinstance->config_table_entry_size); |
89a36810 AR |
5785 | pmcraid_info("New res type:%x, vset:%x, addr:%x:\n", |
5786 | res->cfg_entry.resource_type, | |
c20c4267 AR |
5787 | (fw_version <= PMCRAID_FW_VERSION_1 ? |
5788 | res->cfg_entry.unique_flags1 : | |
5789 | res->cfg_entry.array_id & 0xFF), | |
89a36810 AR |
5790 | le32_to_cpu(res->cfg_entry.resource_address)); |
5791 | } | |
5792 | } | |
5793 | ||
5794 | /* Detect any deleted entries, mark them for deletion from mid-layer */ | |
5795 | list_for_each_entry_safe(res, temp, &old_res, queue) { | |
5796 | ||
5797 | if (res->scsi_dev) { | |
5798 | res->change_detected = RES_CHANGE_DEL; | |
5799 | res->cfg_entry.resource_handle = | |
5800 | PMCRAID_INVALID_RES_HANDLE; | |
5801 | list_move_tail(&res->queue, &pinstance->used_res_q); | |
5802 | } else { | |
5803 | list_move_tail(&res->queue, &pinstance->free_res_q); | |
5804 | } | |
5805 | } | |
5806 | ||
5807 | /* release the resource list lock */ | |
5808 | spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); | |
592488a3 | 5809 | pmcraid_set_timestamp(cmd); |
89a36810 AR |
5810 | } |
5811 | ||
5812 | /** | |
5813 | * pmcraid_querycfg - Send a Query IOA Config to the adapter. | |
5814 | * @cmd: pointer pmcraid_cmd struct | |
5815 | * | |
5816 | * This function sends a Query IOA Configuration command to the adapter to | |
5817 | * retrieve the IOA configuration table. | |
5818 | * | |
5819 | * Return value: | |
5820 | * none | |
5821 | */ | |
5822 | static void pmcraid_querycfg(struct pmcraid_cmd *cmd) | |
5823 | { | |
5824 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
5825 | struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl; | |
5826 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
5827 | int cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table)); | |
5828 | ||
c20c4267 AR |
5829 | if (be16_to_cpu(pinstance->inq_data->fw_version) <= |
5830 | PMCRAID_FW_VERSION_1) | |
5831 | pinstance->config_table_entry_size = | |
5832 | sizeof(struct pmcraid_config_table_entry); | |
5833 | else | |
5834 | pinstance->config_table_entry_size = | |
5835 | sizeof(struct pmcraid_config_table_entry_ext); | |
5836 | ||
89a36810 AR |
5837 | ioarcb->request_type = REQ_TYPE_IOACMD; |
5838 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
5839 | ||
5840 | ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG; | |
5841 | ||
5842 | /* firmware requires 4-byte length field, specified in B.E format */ | |
5843 | memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size)); | |
5844 | ||
5845 | /* Since entire config table can be described by single IOADL, it can | |
5846 | * be part of IOARCB itself | |
5847 | */ | |
5848 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
5849 | offsetof(struct pmcraid_ioarcb, | |
5850 | add_data.u.ioadl[0])); | |
5851 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
5852 | ioarcb->ioarcb_bus_addr &= ~(0x1FULL); | |
5853 | ||
5854 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
5855 | ioarcb->data_transfer_length = | |
5856 | cpu_to_le32(sizeof(struct pmcraid_config_table)); | |
5857 | ||
5858 | ioadl = &(ioarcb->add_data.u.ioadl[0]); | |
88197966 | 5859 | ioadl->flags = IOADL_FLAGS_LAST_DESC; |
89a36810 AR |
5860 | ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr); |
5861 | ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table)); | |
5862 | ||
5863 | pmcraid_send_cmd(cmd, pmcraid_init_res_table, | |
5864 | PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); | |
5865 | } | |
5866 | ||
5867 | ||
5868 | /** | |
c20c4267 | 5869 | * pmcraid_probe - PCI probe entry pointer for PMC MaxRAID controller driver |
89a36810 AR |
5870 | * @pdev: pointer to pci device structure |
5871 | * @dev_id: pointer to device ids structure | |
5872 | * | |
5873 | * Return Value | |
5874 | * returns 0 if the device is claimed and successfully configured. | |
5875 | * returns non-zero error code in case of any failure | |
5876 | */ | |
6f039790 GKH |
5877 | static int pmcraid_probe(struct pci_dev *pdev, |
5878 | const struct pci_device_id *dev_id) | |
89a36810 AR |
5879 | { |
5880 | struct pmcraid_instance *pinstance; | |
5881 | struct Scsi_Host *host; | |
5882 | void __iomem *mapped_pci_addr; | |
5883 | int rc = PCIBIOS_SUCCESSFUL; | |
5884 | ||
5885 | if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) { | |
5886 | pmcraid_err | |
5887 | ("maximum number(%d) of supported adapters reached\n", | |
5888 | atomic_read(&pmcraid_adapter_count)); | |
5889 | return -ENOMEM; | |
5890 | } | |
5891 | ||
5892 | atomic_inc(&pmcraid_adapter_count); | |
5893 | rc = pci_enable_device(pdev); | |
5894 | ||
5895 | if (rc) { | |
5896 | dev_err(&pdev->dev, "Cannot enable adapter\n"); | |
5897 | atomic_dec(&pmcraid_adapter_count); | |
5898 | return rc; | |
5899 | } | |
5900 | ||
5901 | dev_info(&pdev->dev, | |
5902 | "Found new IOA(%x:%x), Total IOA count: %d\n", | |
5903 | pdev->vendor, pdev->device, | |
5904 | atomic_read(&pmcraid_adapter_count)); | |
5905 | ||
5906 | rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME); | |
5907 | ||
5908 | if (rc < 0) { | |
5909 | dev_err(&pdev->dev, | |
5910 | "Couldn't register memory range of registers\n"); | |
5911 | goto out_disable_device; | |
5912 | } | |
5913 | ||
5914 | mapped_pci_addr = pci_iomap(pdev, 0, 0); | |
5915 | ||
5916 | if (!mapped_pci_addr) { | |
5917 | dev_err(&pdev->dev, "Couldn't map PCI registers memory\n"); | |
5918 | rc = -ENOMEM; | |
5919 | goto out_release_regions; | |
5920 | } | |
5921 | ||
5922 | pci_set_master(pdev); | |
5923 | ||
5924 | /* Firmware requires the system bus address of IOARCB to be within | |
5925 | * 32-bit addressable range though it has 64-bit IOARRIN register. | |
5926 | * However, firmware supports 64-bit streaming DMA buffers, whereas | |
5927 | * coherent buffers are to be 32-bit. Since pci_alloc_consistent always | |
5928 | * returns memory within 4GB (if not, change this logic), coherent | |
25985edc | 5929 | * buffers are within firmware acceptable address ranges. |
89a36810 AR |
5930 | */ |
5931 | if ((sizeof(dma_addr_t) == 4) || | |
5932 | pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) | |
5933 | rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); | |
5934 | ||
5935 | /* firmware expects 32-bit DMA addresses for IOARRIN register; set 32 | |
5936 | * bit mask for pci_alloc_consistent to return addresses within 4GB | |
5937 | */ | |
5938 | if (rc == 0) | |
5939 | rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); | |
5940 | ||
5941 | if (rc != 0) { | |
5942 | dev_err(&pdev->dev, "Failed to set PCI DMA mask\n"); | |
5943 | goto cleanup_nomem; | |
5944 | } | |
5945 | ||
5946 | host = scsi_host_alloc(&pmcraid_host_template, | |
5947 | sizeof(struct pmcraid_instance)); | |
5948 | ||
5949 | if (!host) { | |
5950 | dev_err(&pdev->dev, "scsi_host_alloc failed!\n"); | |
5951 | rc = -ENOMEM; | |
5952 | goto cleanup_nomem; | |
5953 | } | |
5954 | ||
5955 | host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS; | |
5956 | host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET; | |
5957 | host->unique_id = host->host_no; | |
5958 | host->max_channel = PMCRAID_MAX_BUS_TO_SCAN; | |
5959 | host->max_cmd_len = PMCRAID_MAX_CDB_LEN; | |
5960 | ||
5961 | /* zero out entire instance structure */ | |
5962 | pinstance = (struct pmcraid_instance *)host->hostdata; | |
5963 | memset(pinstance, 0, sizeof(*pinstance)); | |
5964 | ||
5965 | pinstance->chip_cfg = | |
5966 | (struct pmcraid_chip_details *)(dev_id->driver_data); | |
5967 | ||
5968 | rc = pmcraid_init_instance(pdev, host, mapped_pci_addr); | |
5969 | ||
5970 | if (rc < 0) { | |
5971 | dev_err(&pdev->dev, "failed to initialize adapter instance\n"); | |
5972 | goto out_scsi_host_put; | |
5973 | } | |
5974 | ||
5975 | pci_set_drvdata(pdev, pinstance); | |
5976 | ||
5977 | /* Save PCI config-space for use following the reset */ | |
5978 | rc = pci_save_state(pinstance->pdev); | |
5979 | ||
5980 | if (rc != 0) { | |
5981 | dev_err(&pdev->dev, "Failed to save PCI config space\n"); | |
5982 | goto out_scsi_host_put; | |
5983 | } | |
5984 | ||
5985 | pmcraid_disable_interrupts(pinstance, ~0); | |
5986 | ||
5987 | rc = pmcraid_register_interrupt_handler(pinstance); | |
5988 | ||
5989 | if (rc) { | |
34876402 | 5990 | dev_err(&pdev->dev, "couldn't register interrupt handler\n"); |
89a36810 AR |
5991 | goto out_scsi_host_put; |
5992 | } | |
5993 | ||
5994 | pmcraid_init_tasklets(pinstance); | |
5995 | ||
5996 | /* allocate verious buffers used by LLD.*/ | |
5997 | rc = pmcraid_init_buffers(pinstance); | |
5998 | ||
5999 | if (rc) { | |
6000 | pmcraid_err("couldn't allocate memory blocks\n"); | |
6001 | goto out_unregister_isr; | |
6002 | } | |
6003 | ||
6004 | /* check the reset type required */ | |
6005 | pmcraid_reset_type(pinstance); | |
6006 | ||
6007 | pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS); | |
6008 | ||
6009 | /* Start IOA firmware initialization and bring card to Operational | |
6010 | * state. | |
6011 | */ | |
6012 | pmcraid_info("starting IOA initialization sequence\n"); | |
6013 | if (pmcraid_reset_bringup(pinstance)) { | |
c20c4267 | 6014 | dev_err(&pdev->dev, "couldn't initialize IOA\n"); |
89a36810 AR |
6015 | rc = 1; |
6016 | goto out_release_bufs; | |
6017 | } | |
6018 | ||
6019 | /* Add adapter instance into mid-layer list */ | |
6020 | rc = scsi_add_host(pinstance->host, &pdev->dev); | |
6021 | if (rc != 0) { | |
6022 | pmcraid_err("couldn't add host into mid-layer: %d\n", rc); | |
6023 | goto out_release_bufs; | |
6024 | } | |
6025 | ||
6026 | scsi_scan_host(pinstance->host); | |
6027 | ||
6028 | rc = pmcraid_setup_chrdev(pinstance); | |
6029 | ||
6030 | if (rc != 0) { | |
6031 | pmcraid_err("couldn't create mgmt interface, error: %x\n", | |
6032 | rc); | |
6033 | goto out_remove_host; | |
6034 | } | |
6035 | ||
6036 | /* Schedule worker thread to handle CCN and take care of adding and | |
6037 | * removing devices to OS | |
6038 | */ | |
6039 | atomic_set(&pinstance->expose_resources, 1); | |
6040 | schedule_work(&pinstance->worker_q); | |
6041 | return rc; | |
6042 | ||
6043 | out_remove_host: | |
6044 | scsi_remove_host(host); | |
6045 | ||
6046 | out_release_bufs: | |
6047 | pmcraid_release_buffers(pinstance); | |
6048 | ||
6049 | out_unregister_isr: | |
6050 | pmcraid_kill_tasklets(pinstance); | |
6051 | pmcraid_unregister_interrupt_handler(pinstance); | |
6052 | ||
6053 | out_scsi_host_put: | |
6054 | scsi_host_put(host); | |
6055 | ||
6056 | cleanup_nomem: | |
6057 | iounmap(mapped_pci_addr); | |
6058 | ||
6059 | out_release_regions: | |
6060 | pci_release_regions(pdev); | |
6061 | ||
6062 | out_disable_device: | |
6063 | atomic_dec(&pmcraid_adapter_count); | |
89a36810 AR |
6064 | pci_disable_device(pdev); |
6065 | return -ENODEV; | |
6066 | } | |
6067 | ||
6068 | /* | |
6069 | * PCI driver structure of pcmraid driver | |
6070 | */ | |
6071 | static struct pci_driver pmcraid_driver = { | |
6072 | .name = PMCRAID_DRIVER_NAME, | |
6073 | .id_table = pmcraid_pci_table, | |
6074 | .probe = pmcraid_probe, | |
6075 | .remove = pmcraid_remove, | |
6076 | .suspend = pmcraid_suspend, | |
6077 | .resume = pmcraid_resume, | |
6078 | .shutdown = pmcraid_shutdown | |
6079 | }; | |
6080 | ||
89a36810 AR |
6081 | /** |
6082 | * pmcraid_init - module load entry point | |
6083 | */ | |
6084 | static int __init pmcraid_init(void) | |
6085 | { | |
6086 | dev_t dev; | |
6087 | int error; | |
6088 | ||
a1b66665 MM |
6089 | pmcraid_info("%s Device Driver version: %s\n", |
6090 | PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION); | |
89a36810 AR |
6091 | |
6092 | error = alloc_chrdev_region(&dev, 0, | |
6093 | PMCRAID_MAX_ADAPTERS, | |
6094 | PMCRAID_DEVFILE); | |
6095 | ||
6096 | if (error) { | |
6097 | pmcraid_err("failed to get a major number for adapters\n"); | |
6098 | goto out_init; | |
6099 | } | |
6100 | ||
6101 | pmcraid_major = MAJOR(dev); | |
6102 | pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE); | |
6103 | ||
6104 | if (IS_ERR(pmcraid_class)) { | |
6105 | error = PTR_ERR(pmcraid_class); | |
278cee05 | 6106 | pmcraid_err("failed to register with sysfs, error = %x\n", |
89a36810 AR |
6107 | error); |
6108 | goto out_unreg_chrdev; | |
6109 | } | |
6110 | ||
89a36810 AR |
6111 | error = pmcraid_netlink_init(); |
6112 | ||
6113 | if (error) | |
6114 | goto out_unreg_chrdev; | |
6115 | ||
6116 | error = pci_register_driver(&pmcraid_driver); | |
6117 | ||
6118 | if (error == 0) | |
6119 | goto out_init; | |
6120 | ||
6121 | pmcraid_err("failed to register pmcraid driver, error = %x\n", | |
6122 | error); | |
6123 | class_destroy(pmcraid_class); | |
6124 | pmcraid_netlink_release(); | |
6125 | ||
6126 | out_unreg_chrdev: | |
6127 | unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS); | |
34876402 | 6128 | |
89a36810 AR |
6129 | out_init: |
6130 | return error; | |
6131 | } | |
6132 | ||
6133 | /** | |
6134 | * pmcraid_exit - module unload entry point | |
6135 | */ | |
6136 | static void __exit pmcraid_exit(void) | |
6137 | { | |
6138 | pmcraid_netlink_release(); | |
89a36810 AR |
6139 | unregister_chrdev_region(MKDEV(pmcraid_major, 0), |
6140 | PMCRAID_MAX_ADAPTERS); | |
6141 | pci_unregister_driver(&pmcraid_driver); | |
592488a3 | 6142 | class_destroy(pmcraid_class); |
89a36810 AR |
6143 | } |
6144 | ||
6145 | module_init(pmcraid_init); | |
6146 | module_exit(pmcraid_exit); |