Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
01e58d8e | 3 | * Copyright (c) 2003-2008 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
73208dfd | 8 | #include "qla_gbl.h" |
1da177e4 LT |
9 | |
10 | #include <linux/delay.h> | |
0107109e | 11 | #include <linux/vmalloc.h> |
1da177e4 LT |
12 | |
13 | #include "qla_devtbl.h" | |
14 | ||
4e08df3f DM |
15 | #ifdef CONFIG_SPARC |
16 | #include <asm/prom.h> | |
4e08df3f DM |
17 | #endif |
18 | ||
1da177e4 LT |
19 | /* |
20 | * QLogic ISP2x00 Hardware Support Function Prototypes. | |
21 | */ | |
1da177e4 | 22 | static int qla2x00_isp_firmware(scsi_qla_host_t *); |
1da177e4 | 23 | static int qla2x00_setup_chip(scsi_qla_host_t *); |
1da177e4 LT |
24 | static int qla2x00_init_rings(scsi_qla_host_t *); |
25 | static int qla2x00_fw_ready(scsi_qla_host_t *); | |
26 | static int qla2x00_configure_hba(scsi_qla_host_t *); | |
1da177e4 LT |
27 | static int qla2x00_configure_loop(scsi_qla_host_t *); |
28 | static int qla2x00_configure_local_loop(scsi_qla_host_t *); | |
1da177e4 LT |
29 | static int qla2x00_configure_fabric(scsi_qla_host_t *); |
30 | static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); | |
31 | static int qla2x00_device_resync(scsi_qla_host_t *); | |
32 | static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, | |
33 | uint16_t *); | |
1da177e4 LT |
34 | |
35 | static int qla2x00_restart_isp(scsi_qla_host_t *); | |
1da177e4 | 36 | |
e315cd28 | 37 | static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *); |
413975a0 | 38 | |
4d4df193 HK |
39 | static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); |
40 | static int qla84xx_init_chip(scsi_qla_host_t *); | |
73208dfd | 41 | static int qla25xx_init_queues(struct qla_hw_data *); |
4d4df193 | 42 | |
1da177e4 LT |
43 | /****************************************************************************/ |
44 | /* QLogic ISP2x00 Hardware Support Functions. */ | |
45 | /****************************************************************************/ | |
46 | ||
47 | /* | |
48 | * qla2x00_initialize_adapter | |
49 | * Initialize board. | |
50 | * | |
51 | * Input: | |
52 | * ha = adapter block pointer. | |
53 | * | |
54 | * Returns: | |
55 | * 0 = success | |
56 | */ | |
57 | int | |
e315cd28 | 58 | qla2x00_initialize_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
59 | { |
60 | int rval; | |
e315cd28 | 61 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 62 | struct req_que *req = ha->req_q_map[0]; |
2533cf67 | 63 | |
1da177e4 | 64 | /* Clear adapter flags. */ |
e315cd28 | 65 | vha->flags.online = 0; |
2533cf67 | 66 | ha->flags.chip_reset_done = 0; |
e315cd28 AC |
67 | vha->flags.reset_active = 0; |
68 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
69 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
70 | vha->device_flags = DFLG_NO_CABLE; | |
71 | vha->dpc_flags = 0; | |
72 | vha->flags.management_server_logged_in = 0; | |
73 | vha->marker_needed = 0; | |
1da177e4 LT |
74 | ha->isp_abort_cnt = 0; |
75 | ha->beacon_blink_led = 0; | |
e315cd28 | 76 | set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); |
1da177e4 | 77 | |
73208dfd AC |
78 | set_bit(0, ha->req_qid_map); |
79 | set_bit(0, ha->rsp_qid_map); | |
80 | ||
0107109e | 81 | qla_printk(KERN_INFO, ha, "Configuring PCI space...\n"); |
e315cd28 | 82 | rval = ha->isp_ops->pci_config(vha); |
1da177e4 | 83 | if (rval) { |
7c98a046 | 84 | DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n", |
e315cd28 | 85 | vha->host_no)); |
1da177e4 LT |
86 | return (rval); |
87 | } | |
88 | ||
e315cd28 | 89 | ha->isp_ops->reset_chip(vha); |
1da177e4 | 90 | |
e315cd28 | 91 | rval = qla2xxx_get_flash_info(vha); |
c00d8994 AV |
92 | if (rval) { |
93 | DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n", | |
e315cd28 | 94 | vha->host_no)); |
c00d8994 AV |
95 | return (rval); |
96 | } | |
97 | ||
73208dfd | 98 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 99 | |
1da177e4 | 100 | qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n"); |
0107109e | 101 | |
e315cd28 | 102 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 103 | |
d4c760c2 AV |
104 | if (ha->flags.disable_serdes) { |
105 | /* Mask HBA via NVRAM settings? */ | |
106 | qla_printk(KERN_INFO, ha, "Masking HBA WWPN " | |
107 | "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n", | |
e315cd28 AC |
108 | vha->port_name[0], vha->port_name[1], |
109 | vha->port_name[2], vha->port_name[3], | |
110 | vha->port_name[4], vha->port_name[5], | |
111 | vha->port_name[6], vha->port_name[7]); | |
d4c760c2 AV |
112 | return QLA_FUNCTION_FAILED; |
113 | } | |
114 | ||
1da177e4 LT |
115 | qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n"); |
116 | ||
e315cd28 AC |
117 | if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { |
118 | rval = ha->isp_ops->chip_diag(vha); | |
d19044c3 AV |
119 | if (rval) |
120 | return (rval); | |
e315cd28 | 121 | rval = qla2x00_setup_chip(vha); |
d19044c3 AV |
122 | if (rval) |
123 | return (rval); | |
1da177e4 | 124 | } |
4d4df193 | 125 | if (IS_QLA84XX(ha)) { |
e315cd28 | 126 | ha->cs84xx = qla84xx_get_chip(vha); |
4d4df193 HK |
127 | if (!ha->cs84xx) { |
128 | qla_printk(KERN_ERR, ha, | |
129 | "Unable to configure ISP84XX.\n"); | |
130 | return QLA_FUNCTION_FAILED; | |
131 | } | |
132 | } | |
e315cd28 | 133 | rval = qla2x00_init_rings(vha); |
2533cf67 | 134 | ha->flags.chip_reset_done = 1; |
1da177e4 LT |
135 | |
136 | return (rval); | |
137 | } | |
138 | ||
139 | /** | |
abbd8870 | 140 | * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. |
1da177e4 LT |
141 | * @ha: HA context |
142 | * | |
143 | * Returns 0 on success. | |
144 | */ | |
abbd8870 | 145 | int |
e315cd28 | 146 | qla2100_pci_config(scsi_qla_host_t *vha) |
1da177e4 | 147 | { |
a157b101 | 148 | uint16_t w; |
abbd8870 | 149 | unsigned long flags; |
e315cd28 | 150 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 151 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 152 | |
1da177e4 | 153 | pci_set_master(ha->pdev); |
af6177d8 | 154 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 155 | |
1da177e4 | 156 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 157 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
abbd8870 AV |
158 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
159 | ||
737faece | 160 | pci_disable_rom(ha->pdev); |
1da177e4 LT |
161 | |
162 | /* Get PCI bus information. */ | |
163 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 164 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
1da177e4 LT |
165 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
166 | ||
abbd8870 AV |
167 | return QLA_SUCCESS; |
168 | } | |
1da177e4 | 169 | |
abbd8870 AV |
170 | /** |
171 | * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. | |
172 | * @ha: HA context | |
173 | * | |
174 | * Returns 0 on success. | |
175 | */ | |
176 | int | |
e315cd28 | 177 | qla2300_pci_config(scsi_qla_host_t *vha) |
abbd8870 | 178 | { |
a157b101 | 179 | uint16_t w; |
abbd8870 AV |
180 | unsigned long flags = 0; |
181 | uint32_t cnt; | |
e315cd28 | 182 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 183 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 184 | |
abbd8870 | 185 | pci_set_master(ha->pdev); |
af6177d8 | 186 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 187 | |
abbd8870 | 188 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 189 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
1da177e4 | 190 | |
abbd8870 AV |
191 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) |
192 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
a157b101 | 193 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
1da177e4 | 194 | |
abbd8870 AV |
195 | /* |
196 | * If this is a 2300 card and not 2312, reset the | |
197 | * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, | |
198 | * the 2310 also reports itself as a 2300 so we need to get the | |
199 | * fb revision level -- a 6 indicates it really is a 2300 and | |
200 | * not a 2310. | |
201 | */ | |
202 | if (IS_QLA2300(ha)) { | |
203 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1da177e4 | 204 | |
abbd8870 | 205 | /* Pause RISC. */ |
3d71644c | 206 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); |
abbd8870 | 207 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 208 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) |
abbd8870 | 209 | break; |
1da177e4 | 210 | |
abbd8870 AV |
211 | udelay(10); |
212 | } | |
1da177e4 | 213 | |
abbd8870 | 214 | /* Select FPM registers. */ |
3d71644c AV |
215 | WRT_REG_WORD(®->ctrl_status, 0x20); |
216 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
217 | |
218 | /* Get the fb rev level */ | |
3d71644c | 219 | ha->fb_rev = RD_FB_CMD_REG(ha, reg); |
abbd8870 AV |
220 | |
221 | if (ha->fb_rev == FPM_2300) | |
a157b101 | 222 | pci_clear_mwi(ha->pdev); |
abbd8870 AV |
223 | |
224 | /* Deselect FPM registers. */ | |
3d71644c AV |
225 | WRT_REG_WORD(®->ctrl_status, 0x0); |
226 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
227 | |
228 | /* Release RISC module. */ | |
3d71644c | 229 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); |
abbd8870 | 230 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 231 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) |
abbd8870 AV |
232 | break; |
233 | ||
234 | udelay(10); | |
1da177e4 | 235 | } |
1da177e4 | 236 | |
abbd8870 AV |
237 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
238 | } | |
1da177e4 | 239 | |
abbd8870 AV |
240 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); |
241 | ||
737faece | 242 | pci_disable_rom(ha->pdev); |
1da177e4 | 243 | |
abbd8870 AV |
244 | /* Get PCI bus information. */ |
245 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 246 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
abbd8870 AV |
247 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
248 | ||
249 | return QLA_SUCCESS; | |
1da177e4 LT |
250 | } |
251 | ||
0107109e AV |
252 | /** |
253 | * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. | |
254 | * @ha: HA context | |
255 | * | |
256 | * Returns 0 on success. | |
257 | */ | |
258 | int | |
e315cd28 | 259 | qla24xx_pci_config(scsi_qla_host_t *vha) |
0107109e | 260 | { |
a157b101 | 261 | uint16_t w; |
0107109e | 262 | unsigned long flags = 0; |
e315cd28 | 263 | struct qla_hw_data *ha = vha->hw; |
0107109e | 264 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
0107109e AV |
265 | |
266 | pci_set_master(ha->pdev); | |
af6177d8 | 267 | pci_try_set_mwi(ha->pdev); |
0107109e AV |
268 | |
269 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
a157b101 | 270 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
0107109e AV |
271 | w &= ~PCI_COMMAND_INTX_DISABLE; |
272 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
273 | ||
274 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); | |
275 | ||
276 | /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ | |
f85ec187 AV |
277 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) |
278 | pcix_set_mmrbc(ha->pdev, 2048); | |
0107109e AV |
279 | |
280 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
f85ec187 AV |
281 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) |
282 | pcie_set_readrq(ha->pdev, 2048); | |
0107109e | 283 | |
737faece | 284 | pci_disable_rom(ha->pdev); |
0107109e | 285 | |
44c10138 | 286 | ha->chip_revision = ha->pdev->revision; |
a8488abe | 287 | |
0107109e AV |
288 | /* Get PCI bus information. */ |
289 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
290 | ha->pci_attr = RD_REG_DWORD(®->ctrl_status); | |
291 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
292 | ||
293 | return QLA_SUCCESS; | |
294 | } | |
295 | ||
c3a2f0df AV |
296 | /** |
297 | * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. | |
298 | * @ha: HA context | |
299 | * | |
300 | * Returns 0 on success. | |
301 | */ | |
302 | int | |
e315cd28 | 303 | qla25xx_pci_config(scsi_qla_host_t *vha) |
c3a2f0df AV |
304 | { |
305 | uint16_t w; | |
e315cd28 | 306 | struct qla_hw_data *ha = vha->hw; |
c3a2f0df AV |
307 | |
308 | pci_set_master(ha->pdev); | |
309 | pci_try_set_mwi(ha->pdev); | |
310 | ||
311 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
312 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); | |
313 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
314 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
315 | ||
316 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
317 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) | |
318 | pcie_set_readrq(ha->pdev, 2048); | |
319 | ||
737faece | 320 | pci_disable_rom(ha->pdev); |
c3a2f0df AV |
321 | |
322 | ha->chip_revision = ha->pdev->revision; | |
323 | ||
324 | return QLA_SUCCESS; | |
325 | } | |
326 | ||
1da177e4 LT |
327 | /** |
328 | * qla2x00_isp_firmware() - Choose firmware image. | |
329 | * @ha: HA context | |
330 | * | |
331 | * Returns 0 on success. | |
332 | */ | |
333 | static int | |
e315cd28 | 334 | qla2x00_isp_firmware(scsi_qla_host_t *vha) |
1da177e4 LT |
335 | { |
336 | int rval; | |
42e421b1 AV |
337 | uint16_t loop_id, topo, sw_cap; |
338 | uint8_t domain, area, al_pa; | |
e315cd28 | 339 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
340 | |
341 | /* Assume loading risc code */ | |
fa2a1ce5 | 342 | rval = QLA_FUNCTION_FAILED; |
1da177e4 LT |
343 | |
344 | if (ha->flags.disable_risc_code_load) { | |
345 | DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n", | |
e315cd28 | 346 | vha->host_no)); |
1da177e4 LT |
347 | qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n"); |
348 | ||
349 | /* Verify checksum of loaded RISC code. */ | |
e315cd28 | 350 | rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); |
42e421b1 AV |
351 | if (rval == QLA_SUCCESS) { |
352 | /* And, verify we are not in ROM code. */ | |
e315cd28 | 353 | rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, |
42e421b1 AV |
354 | &area, &domain, &topo, &sw_cap); |
355 | } | |
1da177e4 LT |
356 | } |
357 | ||
358 | if (rval) { | |
359 | DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n", | |
e315cd28 | 360 | vha->host_no)); |
1da177e4 LT |
361 | } |
362 | ||
363 | return (rval); | |
364 | } | |
365 | ||
366 | /** | |
367 | * qla2x00_reset_chip() - Reset ISP chip. | |
368 | * @ha: HA context | |
369 | * | |
370 | * Returns 0 on success. | |
371 | */ | |
abbd8870 | 372 | void |
e315cd28 | 373 | qla2x00_reset_chip(scsi_qla_host_t *vha) |
1da177e4 LT |
374 | { |
375 | unsigned long flags = 0; | |
e315cd28 | 376 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 377 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 378 | uint32_t cnt; |
1da177e4 LT |
379 | uint16_t cmd; |
380 | ||
fd34f556 | 381 | ha->isp_ops->disable_intrs(ha); |
1da177e4 LT |
382 | |
383 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
384 | ||
385 | /* Turn off master enable */ | |
386 | cmd = 0; | |
387 | pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); | |
388 | cmd &= ~PCI_COMMAND_MASTER; | |
389 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
390 | ||
391 | if (!IS_QLA2100(ha)) { | |
392 | /* Pause RISC. */ | |
393 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); | |
394 | if (IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
395 | for (cnt = 0; cnt < 30000; cnt++) { | |
396 | if ((RD_REG_WORD(®->hccr) & | |
397 | HCCR_RISC_PAUSE) != 0) | |
398 | break; | |
399 | udelay(100); | |
400 | } | |
401 | } else { | |
402 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
403 | udelay(10); | |
404 | } | |
405 | ||
406 | /* Select FPM registers. */ | |
407 | WRT_REG_WORD(®->ctrl_status, 0x20); | |
408 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
409 | ||
410 | /* FPM Soft Reset. */ | |
411 | WRT_REG_WORD(®->fpm_diag_config, 0x100); | |
412 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
413 | ||
414 | /* Toggle Fpm Reset. */ | |
415 | if (!IS_QLA2200(ha)) { | |
416 | WRT_REG_WORD(®->fpm_diag_config, 0x0); | |
417 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
418 | } | |
419 | ||
420 | /* Select frame buffer registers. */ | |
421 | WRT_REG_WORD(®->ctrl_status, 0x10); | |
422 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
423 | ||
424 | /* Reset frame buffer FIFOs. */ | |
425 | if (IS_QLA2200(ha)) { | |
426 | WRT_FB_CMD_REG(ha, reg, 0xa000); | |
427 | RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ | |
428 | } else { | |
429 | WRT_FB_CMD_REG(ha, reg, 0x00fc); | |
430 | ||
431 | /* Read back fb_cmd until zero or 3 seconds max */ | |
432 | for (cnt = 0; cnt < 3000; cnt++) { | |
433 | if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) | |
434 | break; | |
435 | udelay(100); | |
436 | } | |
437 | } | |
438 | ||
439 | /* Select RISC module registers. */ | |
440 | WRT_REG_WORD(®->ctrl_status, 0); | |
441 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
442 | ||
443 | /* Reset RISC processor. */ | |
444 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
445 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
446 | ||
447 | /* Release RISC processor. */ | |
448 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
449 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
450 | } | |
451 | ||
452 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
453 | WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); | |
454 | ||
455 | /* Reset ISP chip. */ | |
456 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
457 | ||
458 | /* Wait for RISC to recover from reset. */ | |
459 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
460 | /* | |
461 | * It is necessary to for a delay here since the card doesn't | |
462 | * respond to PCI reads during a reset. On some architectures | |
463 | * this will result in an MCA. | |
464 | */ | |
465 | udelay(20); | |
466 | for (cnt = 30000; cnt; cnt--) { | |
467 | if ((RD_REG_WORD(®->ctrl_status) & | |
468 | CSR_ISP_SOFT_RESET) == 0) | |
469 | break; | |
470 | udelay(100); | |
471 | } | |
472 | } else | |
473 | udelay(10); | |
474 | ||
475 | /* Reset RISC processor. */ | |
476 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
477 | ||
478 | WRT_REG_WORD(®->semaphore, 0); | |
479 | ||
480 | /* Release RISC processor. */ | |
481 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
482 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
483 | ||
484 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
485 | for (cnt = 0; cnt < 30000; cnt++) { | |
ffb39f03 | 486 | if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) |
1da177e4 | 487 | break; |
1da177e4 LT |
488 | |
489 | udelay(100); | |
490 | } | |
491 | } else | |
492 | udelay(100); | |
493 | ||
494 | /* Turn on master enable */ | |
495 | cmd |= PCI_COMMAND_MASTER; | |
496 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
497 | ||
498 | /* Disable RISC pause on FPM parity error. */ | |
499 | if (!IS_QLA2100(ha)) { | |
500 | WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); | |
501 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
502 | } | |
503 | ||
504 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
505 | } | |
506 | ||
0107109e | 507 | /** |
88c26663 | 508 | * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. |
0107109e AV |
509 | * @ha: HA context |
510 | * | |
511 | * Returns 0 on success. | |
512 | */ | |
88c26663 | 513 | static inline void |
e315cd28 | 514 | qla24xx_reset_risc(scsi_qla_host_t *vha) |
0107109e AV |
515 | { |
516 | unsigned long flags = 0; | |
e315cd28 | 517 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
518 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
519 | uint32_t cnt, d2; | |
335a1cc9 | 520 | uint16_t wd; |
0107109e | 521 | |
0107109e AV |
522 | spin_lock_irqsave(&ha->hardware_lock, flags); |
523 | ||
524 | /* Reset RISC. */ | |
525 | WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
526 | for (cnt = 0; cnt < 30000; cnt++) { | |
527 | if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) | |
528 | break; | |
529 | ||
530 | udelay(10); | |
531 | } | |
532 | ||
533 | WRT_REG_DWORD(®->ctrl_status, | |
534 | CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
335a1cc9 | 535 | pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); |
88c26663 | 536 | |
335a1cc9 | 537 | udelay(100); |
88c26663 | 538 | /* Wait for firmware to complete NVRAM accesses. */ |
88c26663 AV |
539 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); |
540 | for (cnt = 10000 ; cnt && d2; cnt--) { | |
541 | udelay(5); | |
542 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
543 | barrier(); | |
544 | } | |
545 | ||
335a1cc9 | 546 | /* Wait for soft-reset to complete. */ |
0107109e AV |
547 | d2 = RD_REG_DWORD(®->ctrl_status); |
548 | for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { | |
549 | udelay(5); | |
550 | d2 = RD_REG_DWORD(®->ctrl_status); | |
551 | barrier(); | |
552 | } | |
553 | ||
554 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
555 | RD_REG_DWORD(®->hccr); | |
556 | ||
557 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
558 | RD_REG_DWORD(®->hccr); | |
559 | ||
560 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); | |
561 | RD_REG_DWORD(®->hccr); | |
562 | ||
563 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
564 | for (cnt = 6000000 ; cnt && d2; cnt--) { | |
565 | udelay(5); | |
566 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
567 | barrier(); | |
568 | } | |
569 | ||
570 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
124f85e6 AV |
571 | |
572 | if (IS_NOPOLLING_TYPE(ha)) | |
573 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
574 | } |
575 | ||
88c26663 AV |
576 | /** |
577 | * qla24xx_reset_chip() - Reset ISP24xx chip. | |
578 | * @ha: HA context | |
579 | * | |
580 | * Returns 0 on success. | |
581 | */ | |
582 | void | |
e315cd28 | 583 | qla24xx_reset_chip(scsi_qla_host_t *vha) |
88c26663 | 584 | { |
e315cd28 | 585 | struct qla_hw_data *ha = vha->hw; |
fd34f556 | 586 | ha->isp_ops->disable_intrs(ha); |
88c26663 AV |
587 | |
588 | /* Perform RISC reset. */ | |
e315cd28 | 589 | qla24xx_reset_risc(vha); |
88c26663 AV |
590 | } |
591 | ||
1da177e4 LT |
592 | /** |
593 | * qla2x00_chip_diag() - Test chip for proper operation. | |
594 | * @ha: HA context | |
595 | * | |
596 | * Returns 0 on success. | |
597 | */ | |
abbd8870 | 598 | int |
e315cd28 | 599 | qla2x00_chip_diag(scsi_qla_host_t *vha) |
1da177e4 LT |
600 | { |
601 | int rval; | |
e315cd28 | 602 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 603 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
604 | unsigned long flags = 0; |
605 | uint16_t data; | |
606 | uint32_t cnt; | |
607 | uint16_t mb[5]; | |
73208dfd | 608 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 LT |
609 | |
610 | /* Assume a failed state */ | |
611 | rval = QLA_FUNCTION_FAILED; | |
612 | ||
613 | DEBUG3(printk("scsi(%ld): Testing device at %lx.\n", | |
e315cd28 | 614 | vha->host_no, (u_long)®->flash_address)); |
1da177e4 LT |
615 | |
616 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
617 | ||
618 | /* Reset ISP chip. */ | |
619 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
620 | ||
621 | /* | |
622 | * We need to have a delay here since the card will not respond while | |
623 | * in reset causing an MCA on some architectures. | |
624 | */ | |
625 | udelay(20); | |
626 | data = qla2x00_debounce_register(®->ctrl_status); | |
627 | for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { | |
628 | udelay(5); | |
629 | data = RD_REG_WORD(®->ctrl_status); | |
630 | barrier(); | |
631 | } | |
632 | ||
633 | if (!cnt) | |
634 | goto chip_diag_failed; | |
635 | ||
636 | DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n", | |
7640335e | 637 | vha->host_no)); |
1da177e4 LT |
638 | |
639 | /* Reset RISC processor. */ | |
640 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
641 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
642 | ||
643 | /* Workaround for QLA2312 PCI parity error */ | |
644 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
645 | data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); | |
646 | for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { | |
647 | udelay(5); | |
648 | data = RD_MAILBOX_REG(ha, reg, 0); | |
fa2a1ce5 | 649 | barrier(); |
1da177e4 LT |
650 | } |
651 | } else | |
652 | udelay(10); | |
653 | ||
654 | if (!cnt) | |
655 | goto chip_diag_failed; | |
656 | ||
657 | /* Check product ID of chip */ | |
7640335e | 658 | DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no)); |
1da177e4 LT |
659 | |
660 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
661 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
662 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
663 | mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); | |
664 | if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || | |
665 | mb[3] != PROD_ID_3) { | |
666 | qla_printk(KERN_WARNING, ha, | |
667 | "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]); | |
668 | ||
669 | goto chip_diag_failed; | |
670 | } | |
671 | ha->product_id[0] = mb[1]; | |
672 | ha->product_id[1] = mb[2]; | |
673 | ha->product_id[2] = mb[3]; | |
674 | ha->product_id[3] = mb[4]; | |
675 | ||
676 | /* Adjust fw RISC transfer size */ | |
73208dfd | 677 | if (req->length > 1024) |
1da177e4 LT |
678 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; |
679 | else | |
680 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * | |
73208dfd | 681 | req->length; |
1da177e4 LT |
682 | |
683 | if (IS_QLA2200(ha) && | |
684 | RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { | |
685 | /* Limit firmware transfer size with a 2200A */ | |
686 | DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n", | |
e315cd28 | 687 | vha->host_no)); |
1da177e4 | 688 | |
ea5b6382 | 689 | ha->device_type |= DT_ISP2200A; |
1da177e4 LT |
690 | ha->fw_transfer_size = 128; |
691 | } | |
692 | ||
693 | /* Wrap Incoming Mailboxes Test. */ | |
694 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
695 | ||
e315cd28 AC |
696 | DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no)); |
697 | rval = qla2x00_mbx_reg_test(vha); | |
1da177e4 LT |
698 | if (rval) { |
699 | DEBUG(printk("scsi(%ld): Failed mailbox send register test\n", | |
e315cd28 | 700 | vha->host_no)); |
1da177e4 LT |
701 | qla_printk(KERN_WARNING, ha, |
702 | "Failed mailbox send register test\n"); | |
703 | } | |
704 | else { | |
705 | /* Flag a successful rval */ | |
706 | rval = QLA_SUCCESS; | |
707 | } | |
708 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
709 | ||
710 | chip_diag_failed: | |
711 | if (rval) | |
712 | DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED " | |
e315cd28 | 713 | "****\n", vha->host_no)); |
1da177e4 LT |
714 | |
715 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
716 | ||
717 | return (rval); | |
718 | } | |
719 | ||
0107109e AV |
720 | /** |
721 | * qla24xx_chip_diag() - Test ISP24xx for proper operation. | |
722 | * @ha: HA context | |
723 | * | |
724 | * Returns 0 on success. | |
725 | */ | |
726 | int | |
e315cd28 | 727 | qla24xx_chip_diag(scsi_qla_host_t *vha) |
0107109e AV |
728 | { |
729 | int rval; | |
e315cd28 | 730 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 731 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 732 | |
88c26663 | 733 | /* Perform RISC reset. */ |
e315cd28 | 734 | qla24xx_reset_risc(vha); |
0107109e | 735 | |
73208dfd | 736 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; |
0107109e | 737 | |
e315cd28 | 738 | rval = qla2x00_mbx_reg_test(vha); |
0107109e AV |
739 | if (rval) { |
740 | DEBUG(printk("scsi(%ld): Failed mailbox send register test\n", | |
e315cd28 | 741 | vha->host_no)); |
0107109e AV |
742 | qla_printk(KERN_WARNING, ha, |
743 | "Failed mailbox send register test\n"); | |
744 | } else { | |
745 | /* Flag a successful rval */ | |
746 | rval = QLA_SUCCESS; | |
747 | } | |
748 | ||
749 | return rval; | |
750 | } | |
751 | ||
a7a167bf | 752 | void |
e315cd28 | 753 | qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) |
0107109e | 754 | { |
a7a167bf AV |
755 | int rval; |
756 | uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, | |
73208dfd | 757 | eft_size, fce_size, mq_size; |
df613b96 AV |
758 | dma_addr_t tc_dma; |
759 | void *tc; | |
e315cd28 | 760 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
761 | struct req_que *req = ha->req_q_map[0]; |
762 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
a7a167bf AV |
763 | |
764 | if (ha->fw_dump) { | |
765 | qla_printk(KERN_WARNING, ha, | |
766 | "Firmware dump previously allocated.\n"); | |
767 | return; | |
768 | } | |
d4e3e04d | 769 | |
0107109e | 770 | ha->fw_dumped = 0; |
73208dfd | 771 | fixed_size = mem_size = eft_size = fce_size = mq_size = 0; |
d4e3e04d | 772 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { |
a7a167bf | 773 | fixed_size = sizeof(struct qla2100_fw_dump); |
d4e3e04d | 774 | } else if (IS_QLA23XX(ha)) { |
a7a167bf AV |
775 | fixed_size = offsetof(struct qla2300_fw_dump, data_ram); |
776 | mem_size = (ha->fw_memory_size - 0x11000 + 1) * | |
777 | sizeof(uint16_t); | |
e428924c | 778 | } else if (IS_FWI2_CAPABLE(ha)) { |
3a03eb79 AV |
779 | if (IS_QLA81XX(ha)) |
780 | fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); | |
781 | else if (IS_QLA25XX(ha)) | |
782 | fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); | |
783 | else | |
784 | fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); | |
a7a167bf AV |
785 | mem_size = (ha->fw_memory_size - 0x100000 + 1) * |
786 | sizeof(uint32_t); | |
73208dfd AC |
787 | if (ha->mqenable) |
788 | mq_size = sizeof(struct qla2xxx_mq_chain); | |
df613b96 | 789 | /* Allocate memory for Fibre Channel Event Buffer. */ |
3a03eb79 | 790 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)) |
436a7b11 | 791 | goto try_eft; |
df613b96 AV |
792 | |
793 | tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, | |
794 | GFP_KERNEL); | |
795 | if (!tc) { | |
796 | qla_printk(KERN_WARNING, ha, "Unable to allocate " | |
797 | "(%d KB) for FCE.\n", FCE_SIZE / 1024); | |
17d98630 | 798 | goto try_eft; |
df613b96 AV |
799 | } |
800 | ||
801 | memset(tc, 0, FCE_SIZE); | |
e315cd28 | 802 | rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, |
df613b96 AV |
803 | ha->fce_mb, &ha->fce_bufs); |
804 | if (rval) { | |
805 | qla_printk(KERN_WARNING, ha, "Unable to initialize " | |
806 | "FCE (%d).\n", rval); | |
807 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, | |
808 | tc_dma); | |
809 | ha->flags.fce_enabled = 0; | |
17d98630 | 810 | goto try_eft; |
df613b96 AV |
811 | } |
812 | ||
813 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n", | |
814 | FCE_SIZE / 1024); | |
815 | ||
7d9dade3 | 816 | fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; |
df613b96 AV |
817 | ha->flags.fce_enabled = 1; |
818 | ha->fce_dma = tc_dma; | |
819 | ha->fce = tc; | |
436a7b11 AV |
820 | try_eft: |
821 | /* Allocate memory for Extended Trace Buffer. */ | |
822 | tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, | |
823 | GFP_KERNEL); | |
824 | if (!tc) { | |
825 | qla_printk(KERN_WARNING, ha, "Unable to allocate " | |
826 | "(%d KB) for EFT.\n", EFT_SIZE / 1024); | |
827 | goto cont_alloc; | |
828 | } | |
829 | ||
830 | memset(tc, 0, EFT_SIZE); | |
e315cd28 | 831 | rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); |
436a7b11 AV |
832 | if (rval) { |
833 | qla_printk(KERN_WARNING, ha, "Unable to initialize " | |
834 | "EFT (%d).\n", rval); | |
835 | dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, | |
836 | tc_dma); | |
837 | goto cont_alloc; | |
838 | } | |
839 | ||
840 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n", | |
841 | EFT_SIZE / 1024); | |
842 | ||
843 | eft_size = EFT_SIZE; | |
844 | ha->eft_dma = tc_dma; | |
845 | ha->eft = tc; | |
d4e3e04d | 846 | } |
a7a167bf | 847 | cont_alloc: |
73208dfd AC |
848 | req_q_size = req->length * sizeof(request_t); |
849 | rsp_q_size = rsp->length * sizeof(response_t); | |
a7a167bf AV |
850 | |
851 | dump_size = offsetof(struct qla2xxx_fw_dump, isp); | |
2afa19a9 | 852 | dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; |
bb99de67 AV |
853 | ha->chain_offset = dump_size; |
854 | dump_size += mq_size + fce_size; | |
d4e3e04d AV |
855 | |
856 | ha->fw_dump = vmalloc(dump_size); | |
a7a167bf | 857 | if (!ha->fw_dump) { |
0107109e | 858 | qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for " |
d4e3e04d | 859 | "firmware dump!!!\n", dump_size / 1024); |
a7a167bf AV |
860 | |
861 | if (ha->eft) { | |
862 | dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, | |
863 | ha->eft_dma); | |
864 | ha->eft = NULL; | |
865 | ha->eft_dma = 0; | |
866 | } | |
867 | return; | |
868 | } | |
a7a167bf AV |
869 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n", |
870 | dump_size / 1024); | |
871 | ||
872 | ha->fw_dump_len = dump_size; | |
873 | ha->fw_dump->signature[0] = 'Q'; | |
874 | ha->fw_dump->signature[1] = 'L'; | |
875 | ha->fw_dump->signature[2] = 'G'; | |
876 | ha->fw_dump->signature[3] = 'C'; | |
877 | ha->fw_dump->version = __constant_htonl(1); | |
878 | ||
879 | ha->fw_dump->fixed_size = htonl(fixed_size); | |
880 | ha->fw_dump->mem_size = htonl(mem_size); | |
881 | ha->fw_dump->req_q_size = htonl(req_q_size); | |
882 | ha->fw_dump->rsp_q_size = htonl(rsp_q_size); | |
883 | ||
884 | ha->fw_dump->eft_size = htonl(eft_size); | |
885 | ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); | |
886 | ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); | |
887 | ||
888 | ha->fw_dump->header_size = | |
889 | htonl(offsetof(struct qla2xxx_fw_dump, isp)); | |
0107109e AV |
890 | } |
891 | ||
1da177e4 LT |
892 | /** |
893 | * qla2x00_setup_chip() - Load and start RISC firmware. | |
894 | * @ha: HA context | |
895 | * | |
896 | * Returns 0 on success. | |
897 | */ | |
898 | static int | |
e315cd28 | 899 | qla2x00_setup_chip(scsi_qla_host_t *vha) |
1da177e4 | 900 | { |
0107109e AV |
901 | int rval; |
902 | uint32_t srisc_address = 0; | |
e315cd28 | 903 | struct qla_hw_data *ha = vha->hw; |
3db0652e AV |
904 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
905 | unsigned long flags; | |
dda772e8 | 906 | uint16_t fw_major_version; |
3db0652e AV |
907 | |
908 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { | |
909 | /* Disable SRAM, Instruction RAM and GP RAM parity. */ | |
910 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
911 | WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); | |
912 | RD_REG_WORD(®->hccr); | |
913 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
914 | } | |
1da177e4 LT |
915 | |
916 | /* Load firmware sequences */ | |
e315cd28 | 917 | rval = ha->isp_ops->load_risc(vha, &srisc_address); |
0107109e | 918 | if (rval == QLA_SUCCESS) { |
1da177e4 | 919 | DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC " |
e315cd28 | 920 | "code.\n", vha->host_no)); |
1da177e4 | 921 | |
e315cd28 | 922 | rval = qla2x00_verify_checksum(vha, srisc_address); |
1da177e4 LT |
923 | if (rval == QLA_SUCCESS) { |
924 | /* Start firmware execution. */ | |
925 | DEBUG(printk("scsi(%ld): Checksum OK, start " | |
e315cd28 | 926 | "firmware.\n", vha->host_no)); |
1da177e4 | 927 | |
e315cd28 | 928 | rval = qla2x00_execute_fw(vha, srisc_address); |
1da177e4 | 929 | /* Retrieve firmware information. */ |
dda772e8 AV |
930 | if (rval == QLA_SUCCESS) { |
931 | fw_major_version = ha->fw_major_version; | |
e315cd28 | 932 | qla2x00_get_fw_version(vha, |
1da177e4 LT |
933 | &ha->fw_major_version, |
934 | &ha->fw_minor_version, | |
935 | &ha->fw_subminor_version, | |
3a03eb79 | 936 | &ha->fw_attributes, &ha->fw_memory_size, |
55a96158 AV |
937 | ha->mpi_version, &ha->mpi_capabilities, |
938 | ha->phy_version); | |
2c3dfe3f | 939 | ha->flags.npiv_supported = 0; |
e315cd28 | 940 | if (IS_QLA2XXX_MIDTYPE(ha) && |
946fb891 | 941 | (ha->fw_attributes & BIT_2)) { |
2c3dfe3f | 942 | ha->flags.npiv_supported = 1; |
4d0ea247 SJ |
943 | if ((!ha->max_npiv_vports) || |
944 | ((ha->max_npiv_vports + 1) % | |
eb66dc60 | 945 | MIN_MULTI_ID_FABRIC)) |
4d0ea247 | 946 | ha->max_npiv_vports = |
eb66dc60 | 947 | MIN_MULTI_ID_FABRIC - 1; |
4d0ea247 | 948 | } |
24a08138 AV |
949 | qla2x00_get_resource_cnts(vha, NULL, |
950 | &ha->fw_xcb_count, NULL, NULL, | |
951 | &ha->max_npiv_vports); | |
d743de66 AV |
952 | |
953 | if (!fw_major_version && ql2xallocfwdump) | |
954 | qla2x00_alloc_fw_dump(vha); | |
1da177e4 LT |
955 | } |
956 | } else { | |
957 | DEBUG2(printk(KERN_INFO | |
958 | "scsi(%ld): ISP Firmware failed checksum.\n", | |
e315cd28 | 959 | vha->host_no)); |
1da177e4 LT |
960 | } |
961 | } | |
962 | ||
3db0652e AV |
963 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
964 | /* Enable proper parity. */ | |
965 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
966 | if (IS_QLA2300(ha)) | |
967 | /* SRAM parity */ | |
968 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); | |
969 | else | |
970 | /* SRAM, Instruction RAM and GP RAM parity */ | |
971 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); | |
972 | RD_REG_WORD(®->hccr); | |
973 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
974 | } | |
975 | ||
1d2874de JC |
976 | if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { |
977 | uint32_t size; | |
978 | ||
979 | rval = qla81xx_fac_get_sector_size(vha, &size); | |
980 | if (rval == QLA_SUCCESS) { | |
981 | ha->flags.fac_supported = 1; | |
982 | ha->fdt_block_size = size << 2; | |
983 | } else { | |
984 | qla_printk(KERN_ERR, ha, | |
985 | "Unsupported FAC firmware (%d.%02d.%02d).\n", | |
986 | ha->fw_major_version, ha->fw_minor_version, | |
987 | ha->fw_subminor_version); | |
988 | } | |
989 | } | |
990 | ||
1da177e4 LT |
991 | if (rval) { |
992 | DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n", | |
e315cd28 | 993 | vha->host_no)); |
1da177e4 LT |
994 | } |
995 | ||
996 | return (rval); | |
997 | } | |
998 | ||
999 | /** | |
1000 | * qla2x00_init_response_q_entries() - Initializes response queue entries. | |
1001 | * @ha: HA context | |
1002 | * | |
1003 | * Beginning of request ring has initialization control block already built | |
1004 | * by nvram config routine. | |
1005 | * | |
1006 | * Returns 0 on success. | |
1007 | */ | |
73208dfd AC |
1008 | void |
1009 | qla2x00_init_response_q_entries(struct rsp_que *rsp) | |
1da177e4 LT |
1010 | { |
1011 | uint16_t cnt; | |
1012 | response_t *pkt; | |
1013 | ||
2afa19a9 AC |
1014 | rsp->ring_ptr = rsp->ring; |
1015 | rsp->ring_index = 0; | |
1016 | rsp->status_srb = NULL; | |
e315cd28 AC |
1017 | pkt = rsp->ring_ptr; |
1018 | for (cnt = 0; cnt < rsp->length; cnt++) { | |
1da177e4 LT |
1019 | pkt->signature = RESPONSE_PROCESSED; |
1020 | pkt++; | |
1021 | } | |
1da177e4 LT |
1022 | } |
1023 | ||
1024 | /** | |
1025 | * qla2x00_update_fw_options() - Read and process firmware options. | |
1026 | * @ha: HA context | |
1027 | * | |
1028 | * Returns 0 on success. | |
1029 | */ | |
abbd8870 | 1030 | void |
e315cd28 | 1031 | qla2x00_update_fw_options(scsi_qla_host_t *vha) |
1da177e4 LT |
1032 | { |
1033 | uint16_t swing, emphasis, tx_sens, rx_sens; | |
e315cd28 | 1034 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1035 | |
1036 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
e315cd28 | 1037 | qla2x00_get_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1038 | |
1039 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
1040 | return; | |
1041 | ||
1042 | /* Serial Link options. */ | |
1043 | DEBUG3(printk("scsi(%ld): Serial link options:\n", | |
e315cd28 | 1044 | vha->host_no)); |
1da177e4 LT |
1045 | DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options, |
1046 | sizeof(ha->fw_seriallink_options))); | |
1047 | ||
1048 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; | |
1049 | if (ha->fw_seriallink_options[3] & BIT_2) { | |
1050 | ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; | |
1051 | ||
1052 | /* 1G settings */ | |
1053 | swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); | |
1054 | emphasis = (ha->fw_seriallink_options[2] & | |
1055 | (BIT_4 | BIT_3)) >> 3; | |
1056 | tx_sens = ha->fw_seriallink_options[0] & | |
fa2a1ce5 | 1057 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1058 | rx_sens = (ha->fw_seriallink_options[0] & |
1059 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1060 | ha->fw_options[10] = (emphasis << 14) | (swing << 8); | |
1061 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1062 | if (rx_sens == 0x0) | |
1063 | rx_sens = 0x3; | |
1064 | ha->fw_options[10] |= (tx_sens << 4) | rx_sens; | |
1065 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1066 | ha->fw_options[10] |= BIT_5 | | |
1067 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1068 | (tx_sens & (BIT_1 | BIT_0)); | |
1069 | ||
1070 | /* 2G settings */ | |
1071 | swing = (ha->fw_seriallink_options[2] & | |
1072 | (BIT_7 | BIT_6 | BIT_5)) >> 5; | |
1073 | emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); | |
1074 | tx_sens = ha->fw_seriallink_options[1] & | |
fa2a1ce5 | 1075 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1076 | rx_sens = (ha->fw_seriallink_options[1] & |
1077 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1078 | ha->fw_options[11] = (emphasis << 14) | (swing << 8); | |
1079 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1080 | if (rx_sens == 0x0) | |
1081 | rx_sens = 0x3; | |
1082 | ha->fw_options[11] |= (tx_sens << 4) | rx_sens; | |
1083 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1084 | ha->fw_options[11] |= BIT_5 | | |
1085 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1086 | (tx_sens & (BIT_1 | BIT_0)); | |
1087 | } | |
1088 | ||
1089 | /* FCP2 options. */ | |
1090 | /* Return command IOCBs without waiting for an ABTS to complete. */ | |
1091 | ha->fw_options[3] |= BIT_13; | |
1092 | ||
1093 | /* LED scheme. */ | |
1094 | if (ha->flags.enable_led_scheme) | |
1095 | ha->fw_options[2] |= BIT_12; | |
1096 | ||
48c02fde | 1097 | /* Detect ISP6312. */ |
1098 | if (IS_QLA6312(ha)) | |
1099 | ha->fw_options[2] |= BIT_13; | |
1100 | ||
1da177e4 | 1101 | /* Update firmware options. */ |
e315cd28 | 1102 | qla2x00_set_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1103 | } |
1104 | ||
0107109e | 1105 | void |
e315cd28 | 1106 | qla24xx_update_fw_options(scsi_qla_host_t *vha) |
0107109e AV |
1107 | { |
1108 | int rval; | |
e315cd28 | 1109 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
1110 | |
1111 | /* Update Serial Link options. */ | |
f94097ed | 1112 | if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) |
0107109e AV |
1113 | return; |
1114 | ||
e315cd28 | 1115 | rval = qla2x00_set_serdes_params(vha, |
f94097ed | 1116 | le16_to_cpu(ha->fw_seriallink_options24[1]), |
1117 | le16_to_cpu(ha->fw_seriallink_options24[2]), | |
1118 | le16_to_cpu(ha->fw_seriallink_options24[3])); | |
0107109e AV |
1119 | if (rval != QLA_SUCCESS) { |
1120 | qla_printk(KERN_WARNING, ha, | |
1121 | "Unable to update Serial Link options (%x).\n", rval); | |
1122 | } | |
1123 | } | |
1124 | ||
abbd8870 | 1125 | void |
e315cd28 | 1126 | qla2x00_config_rings(struct scsi_qla_host *vha) |
abbd8870 | 1127 | { |
e315cd28 | 1128 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1129 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
73208dfd AC |
1130 | struct req_que *req = ha->req_q_map[0]; |
1131 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
abbd8870 AV |
1132 | |
1133 | /* Setup ring parameters in initialization control block. */ | |
1134 | ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1135 | ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1136 | ha->init_cb->request_q_length = cpu_to_le16(req->length); |
1137 | ha->init_cb->response_q_length = cpu_to_le16(rsp->length); | |
1138 | ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1139 | ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1140 | ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1141 | ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
abbd8870 AV |
1142 | |
1143 | WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); | |
1144 | WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); | |
1145 | WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); | |
1146 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); | |
1147 | RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ | |
1148 | } | |
1149 | ||
0107109e | 1150 | void |
e315cd28 | 1151 | qla24xx_config_rings(struct scsi_qla_host *vha) |
0107109e | 1152 | { |
e315cd28 | 1153 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1154 | device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); |
1155 | struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; | |
1156 | struct qla_msix_entry *msix; | |
0107109e | 1157 | struct init_cb_24xx *icb; |
73208dfd AC |
1158 | uint16_t rid = 0; |
1159 | struct req_que *req = ha->req_q_map[0]; | |
1160 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
0107109e | 1161 | |
73208dfd | 1162 | /* Setup ring parameters in initialization control block. */ |
0107109e AV |
1163 | icb = (struct init_cb_24xx *)ha->init_cb; |
1164 | icb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1165 | icb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1166 | icb->request_q_length = cpu_to_le16(req->length); |
1167 | icb->response_q_length = cpu_to_le16(rsp->length); | |
1168 | icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1169 | icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1170 | icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1171 | icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
0107109e | 1172 | |
73208dfd AC |
1173 | if (ha->mqenable) { |
1174 | icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); | |
1175 | icb->rid = __constant_cpu_to_le16(rid); | |
1176 | if (ha->flags.msix_enabled) { | |
1177 | msix = &ha->msix_entries[1]; | |
1178 | DEBUG2_17(printk(KERN_INFO | |
2afa19a9 | 1179 | "Registering vector 0x%x for base que\n", msix->entry)); |
73208dfd AC |
1180 | icb->msix = cpu_to_le16(msix->entry); |
1181 | } | |
1182 | /* Use alternate PCI bus number */ | |
1183 | if (MSB(rid)) | |
1184 | icb->firmware_options_2 |= | |
1185 | __constant_cpu_to_le32(BIT_19); | |
1186 | /* Use alternate PCI devfn */ | |
1187 | if (LSB(rid)) | |
1188 | icb->firmware_options_2 |= | |
1189 | __constant_cpu_to_le32(BIT_18); | |
1190 | ||
618a7523 | 1191 | icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22); |
73208dfd | 1192 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); |
73208dfd AC |
1193 | |
1194 | WRT_REG_DWORD(®->isp25mq.req_q_in, 0); | |
1195 | WRT_REG_DWORD(®->isp25mq.req_q_out, 0); | |
1196 | WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); | |
1197 | WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); | |
1198 | } else { | |
1199 | WRT_REG_DWORD(®->isp24.req_q_in, 0); | |
1200 | WRT_REG_DWORD(®->isp24.req_q_out, 0); | |
1201 | WRT_REG_DWORD(®->isp24.rsp_q_in, 0); | |
1202 | WRT_REG_DWORD(®->isp24.rsp_q_out, 0); | |
1203 | } | |
1204 | /* PCI posting */ | |
1205 | RD_REG_DWORD(&ioreg->hccr); | |
0107109e AV |
1206 | } |
1207 | ||
1da177e4 LT |
1208 | /** |
1209 | * qla2x00_init_rings() - Initializes firmware. | |
1210 | * @ha: HA context | |
1211 | * | |
1212 | * Beginning of request ring has initialization control block already built | |
1213 | * by nvram config routine. | |
1214 | * | |
1215 | * Returns 0 on success. | |
1216 | */ | |
1217 | static int | |
e315cd28 | 1218 | qla2x00_init_rings(scsi_qla_host_t *vha) |
1da177e4 LT |
1219 | { |
1220 | int rval; | |
1221 | unsigned long flags = 0; | |
29bdccbe | 1222 | int cnt, que; |
e315cd28 | 1223 | struct qla_hw_data *ha = vha->hw; |
29bdccbe AC |
1224 | struct req_que *req; |
1225 | struct rsp_que *rsp; | |
1226 | struct scsi_qla_host *vp; | |
2c3dfe3f SJ |
1227 | struct mid_init_cb_24xx *mid_init_cb = |
1228 | (struct mid_init_cb_24xx *) ha->init_cb; | |
1da177e4 LT |
1229 | |
1230 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1231 | ||
1232 | /* Clear outstanding commands array. */ | |
2afa19a9 | 1233 | for (que = 0; que < ha->max_req_queues; que++) { |
29bdccbe AC |
1234 | req = ha->req_q_map[que]; |
1235 | if (!req) | |
1236 | continue; | |
2afa19a9 | 1237 | for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) |
29bdccbe | 1238 | req->outstanding_cmds[cnt] = NULL; |
1da177e4 | 1239 | |
2afa19a9 | 1240 | req->current_outstanding_cmd = 1; |
1da177e4 | 1241 | |
29bdccbe AC |
1242 | /* Initialize firmware. */ |
1243 | req->ring_ptr = req->ring; | |
1244 | req->ring_index = 0; | |
1245 | req->cnt = req->length; | |
1246 | } | |
1da177e4 | 1247 | |
2afa19a9 | 1248 | for (que = 0; que < ha->max_rsp_queues; que++) { |
29bdccbe AC |
1249 | rsp = ha->rsp_q_map[que]; |
1250 | if (!rsp) | |
1251 | continue; | |
29bdccbe AC |
1252 | /* Initialize response queue entries */ |
1253 | qla2x00_init_response_q_entries(rsp); | |
1254 | } | |
1da177e4 | 1255 | |
29bdccbe AC |
1256 | /* Clear RSCN queue. */ |
1257 | list_for_each_entry(vp, &ha->vp_list, list) { | |
1258 | vp->rscn_in_ptr = 0; | |
1259 | vp->rscn_out_ptr = 0; | |
1260 | } | |
e315cd28 | 1261 | ha->isp_ops->config_rings(vha); |
1da177e4 LT |
1262 | |
1263 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1264 | ||
1265 | /* Update any ISP specific firmware options before initialization. */ | |
e315cd28 | 1266 | ha->isp_ops->update_fw_options(vha); |
1da177e4 | 1267 | |
e315cd28 | 1268 | DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no)); |
2c3dfe3f | 1269 | |
605aa2bc LC |
1270 | if (ha->flags.npiv_supported) { |
1271 | if (ha->operating_mode == LOOP) | |
1272 | ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; | |
c48339de | 1273 | mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); |
605aa2bc LC |
1274 | } |
1275 | ||
24a08138 AV |
1276 | if (IS_FWI2_CAPABLE(ha)) { |
1277 | mid_init_cb->options = __constant_cpu_to_le16(BIT_1); | |
1278 | mid_init_cb->init_cb.execution_throttle = | |
1279 | cpu_to_le16(ha->fw_xcb_count); | |
1280 | } | |
2c3dfe3f | 1281 | |
e315cd28 | 1282 | rval = qla2x00_init_firmware(vha, ha->init_cb_size); |
1da177e4 LT |
1283 | if (rval) { |
1284 | DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n", | |
e315cd28 | 1285 | vha->host_no)); |
1da177e4 LT |
1286 | } else { |
1287 | DEBUG3(printk("scsi(%ld): Init firmware -- success.\n", | |
e315cd28 | 1288 | vha->host_no)); |
1da177e4 LT |
1289 | } |
1290 | ||
1291 | return (rval); | |
1292 | } | |
1293 | ||
1294 | /** | |
1295 | * qla2x00_fw_ready() - Waits for firmware ready. | |
1296 | * @ha: HA context | |
1297 | * | |
1298 | * Returns 0 on success. | |
1299 | */ | |
1300 | static int | |
e315cd28 | 1301 | qla2x00_fw_ready(scsi_qla_host_t *vha) |
1da177e4 LT |
1302 | { |
1303 | int rval; | |
4d4df193 | 1304 | unsigned long wtime, mtime, cs84xx_time; |
1da177e4 LT |
1305 | uint16_t min_wait; /* Minimum wait time if loop is down */ |
1306 | uint16_t wait_time; /* Wait time if loop is coming ready */ | |
4d4df193 | 1307 | uint16_t state[3]; |
e315cd28 | 1308 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1309 | |
1310 | rval = QLA_SUCCESS; | |
1311 | ||
1312 | /* 20 seconds for loop down. */ | |
fa2a1ce5 | 1313 | min_wait = 20; |
1da177e4 LT |
1314 | |
1315 | /* | |
1316 | * Firmware should take at most one RATOV to login, plus 5 seconds for | |
1317 | * our own processing. | |
1318 | */ | |
1319 | if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { | |
1320 | wait_time = min_wait; | |
1321 | } | |
1322 | ||
1323 | /* Min wait time if loop down */ | |
1324 | mtime = jiffies + (min_wait * HZ); | |
1325 | ||
1326 | /* wait time before firmware ready */ | |
1327 | wtime = jiffies + (wait_time * HZ); | |
1328 | ||
1329 | /* Wait for ISP to finish LIP */ | |
e315cd28 | 1330 | if (!vha->flags.init_done) |
1da177e4 LT |
1331 | qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n"); |
1332 | ||
1333 | DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n", | |
e315cd28 | 1334 | vha->host_no)); |
1da177e4 LT |
1335 | |
1336 | do { | |
e315cd28 | 1337 | rval = qla2x00_get_firmware_state(vha, state); |
1da177e4 | 1338 | if (rval == QLA_SUCCESS) { |
4d4df193 | 1339 | if (state[0] < FSTATE_LOSS_OF_SYNC) { |
e315cd28 | 1340 | vha->device_flags &= ~DFLG_NO_CABLE; |
1da177e4 | 1341 | } |
4d4df193 HK |
1342 | if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { |
1343 | DEBUG16(printk("scsi(%ld): fw_state=%x " | |
e315cd28 | 1344 | "84xx=%x.\n", vha->host_no, state[0], |
4d4df193 HK |
1345 | state[2])); |
1346 | if ((state[2] & FSTATE_LOGGED_IN) && | |
1347 | (state[2] & FSTATE_WAITING_FOR_VERIFY)) { | |
1348 | DEBUG16(printk("scsi(%ld): Sending " | |
e315cd28 | 1349 | "verify iocb.\n", vha->host_no)); |
4d4df193 HK |
1350 | |
1351 | cs84xx_time = jiffies; | |
e315cd28 | 1352 | rval = qla84xx_init_chip(vha); |
4d4df193 HK |
1353 | if (rval != QLA_SUCCESS) |
1354 | break; | |
1355 | ||
1356 | /* Add time taken to initialize. */ | |
1357 | cs84xx_time = jiffies - cs84xx_time; | |
1358 | wtime += cs84xx_time; | |
1359 | mtime += cs84xx_time; | |
1360 | DEBUG16(printk("scsi(%ld): Increasing " | |
1361 | "wait time by %ld. New time %ld\n", | |
e315cd28 | 1362 | vha->host_no, cs84xx_time, wtime)); |
4d4df193 HK |
1363 | } |
1364 | } else if (state[0] == FSTATE_READY) { | |
1da177e4 | 1365 | DEBUG(printk("scsi(%ld): F/W Ready - OK \n", |
e315cd28 | 1366 | vha->host_no)); |
1da177e4 | 1367 | |
e315cd28 | 1368 | qla2x00_get_retry_cnt(vha, &ha->retry_count, |
1da177e4 LT |
1369 | &ha->login_timeout, &ha->r_a_tov); |
1370 | ||
1371 | rval = QLA_SUCCESS; | |
1372 | break; | |
1373 | } | |
1374 | ||
1375 | rval = QLA_FUNCTION_FAILED; | |
1376 | ||
e315cd28 | 1377 | if (atomic_read(&vha->loop_down_timer) && |
4d4df193 | 1378 | state[0] != FSTATE_READY) { |
1da177e4 | 1379 | /* Loop down. Timeout on min_wait for states |
fa2a1ce5 AV |
1380 | * other than Wait for Login. |
1381 | */ | |
1da177e4 LT |
1382 | if (time_after_eq(jiffies, mtime)) { |
1383 | qla_printk(KERN_INFO, ha, | |
1384 | "Cable is unplugged...\n"); | |
1385 | ||
e315cd28 | 1386 | vha->device_flags |= DFLG_NO_CABLE; |
1da177e4 LT |
1387 | break; |
1388 | } | |
1389 | } | |
1390 | } else { | |
1391 | /* Mailbox cmd failed. Timeout on min_wait. */ | |
1392 | if (time_after_eq(jiffies, mtime)) | |
1393 | break; | |
1394 | } | |
1395 | ||
1396 | if (time_after_eq(jiffies, wtime)) | |
1397 | break; | |
1398 | ||
1399 | /* Delay for a while */ | |
1400 | msleep(500); | |
1401 | ||
1402 | DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n", | |
e315cd28 | 1403 | vha->host_no, state[0], jiffies)); |
1da177e4 LT |
1404 | } while (1); |
1405 | ||
1406 | DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n", | |
e315cd28 | 1407 | vha->host_no, state[0], jiffies)); |
1da177e4 LT |
1408 | |
1409 | if (rval) { | |
1410 | DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n", | |
e315cd28 | 1411 | vha->host_no)); |
1da177e4 LT |
1412 | } |
1413 | ||
1414 | return (rval); | |
1415 | } | |
1416 | ||
1417 | /* | |
1418 | * qla2x00_configure_hba | |
1419 | * Setup adapter context. | |
1420 | * | |
1421 | * Input: | |
1422 | * ha = adapter state pointer. | |
1423 | * | |
1424 | * Returns: | |
1425 | * 0 = success | |
1426 | * | |
1427 | * Context: | |
1428 | * Kernel context. | |
1429 | */ | |
1430 | static int | |
e315cd28 | 1431 | qla2x00_configure_hba(scsi_qla_host_t *vha) |
1da177e4 LT |
1432 | { |
1433 | int rval; | |
1434 | uint16_t loop_id; | |
1435 | uint16_t topo; | |
2c3dfe3f | 1436 | uint16_t sw_cap; |
1da177e4 LT |
1437 | uint8_t al_pa; |
1438 | uint8_t area; | |
1439 | uint8_t domain; | |
1440 | char connect_type[22]; | |
e315cd28 | 1441 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1442 | |
1443 | /* Get host addresses. */ | |
e315cd28 | 1444 | rval = qla2x00_get_adapter_id(vha, |
2c3dfe3f | 1445 | &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); |
1da177e4 | 1446 | if (rval != QLA_SUCCESS) { |
e315cd28 | 1447 | if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || |
33135aa2 RA |
1448 | (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { |
1449 | DEBUG2(printk("%s(%ld) Loop is in a transition state\n", | |
e315cd28 | 1450 | __func__, vha->host_no)); |
33135aa2 RA |
1451 | } else { |
1452 | qla_printk(KERN_WARNING, ha, | |
1453 | "ERROR -- Unable to get host loop ID.\n"); | |
e315cd28 | 1454 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
33135aa2 | 1455 | } |
1da177e4 LT |
1456 | return (rval); |
1457 | } | |
1458 | ||
1459 | if (topo == 4) { | |
1460 | qla_printk(KERN_INFO, ha, | |
1461 | "Cannot get topology - retrying.\n"); | |
1462 | return (QLA_FUNCTION_FAILED); | |
1463 | } | |
1464 | ||
e315cd28 | 1465 | vha->loop_id = loop_id; |
1da177e4 LT |
1466 | |
1467 | /* initialize */ | |
1468 | ha->min_external_loopid = SNS_FIRST_LOOP_ID; | |
1469 | ha->operating_mode = LOOP; | |
2c3dfe3f | 1470 | ha->switch_cap = 0; |
1da177e4 LT |
1471 | |
1472 | switch (topo) { | |
1473 | case 0: | |
1474 | DEBUG3(printk("scsi(%ld): HBA in NL topology.\n", | |
e315cd28 | 1475 | vha->host_no)); |
1da177e4 LT |
1476 | ha->current_topology = ISP_CFG_NL; |
1477 | strcpy(connect_type, "(Loop)"); | |
1478 | break; | |
1479 | ||
1480 | case 1: | |
1481 | DEBUG3(printk("scsi(%ld): HBA in FL topology.\n", | |
e315cd28 | 1482 | vha->host_no)); |
2c3dfe3f | 1483 | ha->switch_cap = sw_cap; |
1da177e4 LT |
1484 | ha->current_topology = ISP_CFG_FL; |
1485 | strcpy(connect_type, "(FL_Port)"); | |
1486 | break; | |
1487 | ||
1488 | case 2: | |
1489 | DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n", | |
e315cd28 | 1490 | vha->host_no)); |
1da177e4 LT |
1491 | ha->operating_mode = P2P; |
1492 | ha->current_topology = ISP_CFG_N; | |
1493 | strcpy(connect_type, "(N_Port-to-N_Port)"); | |
1494 | break; | |
1495 | ||
1496 | case 3: | |
1497 | DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n", | |
e315cd28 | 1498 | vha->host_no)); |
2c3dfe3f | 1499 | ha->switch_cap = sw_cap; |
1da177e4 LT |
1500 | ha->operating_mode = P2P; |
1501 | ha->current_topology = ISP_CFG_F; | |
1502 | strcpy(connect_type, "(F_Port)"); | |
1503 | break; | |
1504 | ||
1505 | default: | |
1506 | DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. " | |
1507 | "Using NL.\n", | |
e315cd28 | 1508 | vha->host_no, topo)); |
1da177e4 LT |
1509 | ha->current_topology = ISP_CFG_NL; |
1510 | strcpy(connect_type, "(Loop)"); | |
1511 | break; | |
1512 | } | |
1513 | ||
1514 | /* Save Host port and loop ID. */ | |
1515 | /* byte order - Big Endian */ | |
e315cd28 AC |
1516 | vha->d_id.b.domain = domain; |
1517 | vha->d_id.b.area = area; | |
1518 | vha->d_id.b.al_pa = al_pa; | |
1da177e4 | 1519 | |
e315cd28 | 1520 | if (!vha->flags.init_done) |
1da177e4 LT |
1521 | qla_printk(KERN_INFO, ha, |
1522 | "Topology - %s, Host Loop address 0x%x\n", | |
e315cd28 | 1523 | connect_type, vha->loop_id); |
1da177e4 LT |
1524 | |
1525 | if (rval) { | |
e315cd28 | 1526 | DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no)); |
1da177e4 | 1527 | } else { |
e315cd28 | 1528 | DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no)); |
1da177e4 LT |
1529 | } |
1530 | ||
1531 | return(rval); | |
1532 | } | |
1533 | ||
9bb9fcf2 | 1534 | static inline void |
e315cd28 AC |
1535 | qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, |
1536 | char *def) | |
9bb9fcf2 AV |
1537 | { |
1538 | char *st, *en; | |
1539 | uint16_t index; | |
e315cd28 | 1540 | struct qla_hw_data *ha = vha->hw; |
1b91a2e6 | 1541 | int use_tbl = !IS_QLA25XX(ha) && !IS_QLA81XX(ha); |
9bb9fcf2 AV |
1542 | |
1543 | if (memcmp(model, BINZERO, len) != 0) { | |
1544 | strncpy(ha->model_number, model, len); | |
1545 | st = en = ha->model_number; | |
1546 | en += len - 1; | |
1547 | while (en > st) { | |
1548 | if (*en != 0x20 && *en != 0x00) | |
1549 | break; | |
1550 | *en-- = '\0'; | |
1551 | } | |
1552 | ||
1553 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
1554 | if (use_tbl && |
1555 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 | 1556 | index < QLA_MODEL_NAMES) |
1ee27146 JC |
1557 | strncpy(ha->model_desc, |
1558 | qla2x00_model_name[index * 2 + 1], | |
1559 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
1560 | } else { |
1561 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
1562 | if (use_tbl && |
1563 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 AV |
1564 | index < QLA_MODEL_NAMES) { |
1565 | strcpy(ha->model_number, | |
1566 | qla2x00_model_name[index * 2]); | |
1ee27146 JC |
1567 | strncpy(ha->model_desc, |
1568 | qla2x00_model_name[index * 2 + 1], | |
1569 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
1570 | } else { |
1571 | strcpy(ha->model_number, def); | |
1572 | } | |
1573 | } | |
1ee27146 | 1574 | if (IS_FWI2_CAPABLE(ha)) |
e315cd28 | 1575 | qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, |
1ee27146 | 1576 | sizeof(ha->model_desc)); |
9bb9fcf2 AV |
1577 | } |
1578 | ||
4e08df3f DM |
1579 | /* On sparc systems, obtain port and node WWN from firmware |
1580 | * properties. | |
1581 | */ | |
e315cd28 | 1582 | static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) |
4e08df3f DM |
1583 | { |
1584 | #ifdef CONFIG_SPARC | |
e315cd28 | 1585 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 1586 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
1587 | struct device_node *dp = pci_device_to_OF_node(pdev); |
1588 | const u8 *val; | |
4e08df3f DM |
1589 | int len; |
1590 | ||
1591 | val = of_get_property(dp, "port-wwn", &len); | |
1592 | if (val && len >= WWN_SIZE) | |
1593 | memcpy(nv->port_name, val, WWN_SIZE); | |
1594 | ||
1595 | val = of_get_property(dp, "node-wwn", &len); | |
1596 | if (val && len >= WWN_SIZE) | |
1597 | memcpy(nv->node_name, val, WWN_SIZE); | |
1598 | #endif | |
1599 | } | |
1600 | ||
1da177e4 LT |
1601 | /* |
1602 | * NVRAM configuration for ISP 2xxx | |
1603 | * | |
1604 | * Input: | |
1605 | * ha = adapter block pointer. | |
1606 | * | |
1607 | * Output: | |
1608 | * initialization control block in response_ring | |
1609 | * host adapters parameters in host adapter block | |
1610 | * | |
1611 | * Returns: | |
1612 | * 0 = success. | |
1613 | */ | |
abbd8870 | 1614 | int |
e315cd28 | 1615 | qla2x00_nvram_config(scsi_qla_host_t *vha) |
1da177e4 | 1616 | { |
4e08df3f | 1617 | int rval; |
0107109e AV |
1618 | uint8_t chksum = 0; |
1619 | uint16_t cnt; | |
1620 | uint8_t *dptr1, *dptr2; | |
e315cd28 | 1621 | struct qla_hw_data *ha = vha->hw; |
0107109e | 1622 | init_cb_t *icb = ha->init_cb; |
281afe19 SJ |
1623 | nvram_t *nv = ha->nvram; |
1624 | uint8_t *ptr = ha->nvram; | |
3d71644c | 1625 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 1626 | |
4e08df3f DM |
1627 | rval = QLA_SUCCESS; |
1628 | ||
1da177e4 | 1629 | /* Determine NVRAM starting address. */ |
0107109e | 1630 | ha->nvram_size = sizeof(nvram_t); |
1da177e4 LT |
1631 | ha->nvram_base = 0; |
1632 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) | |
1633 | if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) | |
1634 | ha->nvram_base = 0x80; | |
1635 | ||
1636 | /* Get NVRAM data and calculate checksum. */ | |
e315cd28 | 1637 | ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); |
0107109e AV |
1638 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) |
1639 | chksum += *ptr++; | |
1da177e4 | 1640 | |
e315cd28 | 1641 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
281afe19 | 1642 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
1da177e4 LT |
1643 | |
1644 | /* Bad NVRAM data, set defaults parameters. */ | |
1645 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || | |
1646 | nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { | |
1647 | /* Reset NVRAM data. */ | |
1648 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
1649 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
1650 | nv->nvram_version); | |
4e08df3f DM |
1651 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " |
1652 | "invalid -- WWPN) defaults.\n"); | |
1653 | ||
1654 | /* | |
1655 | * Set default initialization control block. | |
1656 | */ | |
1657 | memset(nv, 0, ha->nvram_size); | |
1658 | nv->parameter_block_version = ICB_VERSION; | |
1659 | ||
1660 | if (IS_QLA23XX(ha)) { | |
1661 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
1662 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
1663 | nv->add_firmware_options[0] = BIT_5; | |
1664 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
1665 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
1666 | nv->special_options[1] = BIT_7; | |
1667 | } else if (IS_QLA2200(ha)) { | |
1668 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
1669 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
1670 | nv->add_firmware_options[0] = BIT_5; | |
1671 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
1672 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
1673 | } else if (IS_QLA2100(ha)) { | |
1674 | nv->firmware_options[0] = BIT_3 | BIT_1; | |
1675 | nv->firmware_options[1] = BIT_5; | |
1676 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
1677 | } | |
1678 | ||
1679 | nv->max_iocb_allocation = __constant_cpu_to_le16(256); | |
1680 | nv->execution_throttle = __constant_cpu_to_le16(16); | |
1681 | nv->retry_count = 8; | |
1682 | nv->retry_delay = 1; | |
1683 | ||
1684 | nv->port_name[0] = 33; | |
1685 | nv->port_name[3] = 224; | |
1686 | nv->port_name[4] = 139; | |
1687 | ||
e315cd28 | 1688 | qla2xxx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
1689 | |
1690 | nv->login_timeout = 4; | |
1691 | ||
1692 | /* | |
1693 | * Set default host adapter parameters | |
1694 | */ | |
1695 | nv->host_p[1] = BIT_2; | |
1696 | nv->reset_delay = 5; | |
1697 | nv->port_down_retry_count = 8; | |
1698 | nv->max_luns_per_target = __constant_cpu_to_le16(8); | |
1699 | nv->link_down_timeout = 60; | |
1700 | ||
1701 | rval = 1; | |
1da177e4 LT |
1702 | } |
1703 | ||
1704 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | |
1705 | /* | |
1706 | * The SN2 does not provide BIOS emulation which means you can't change | |
1707 | * potentially bogus BIOS settings. Force the use of default settings | |
1708 | * for link rate and frame size. Hope that the rest of the settings | |
1709 | * are valid. | |
1710 | */ | |
1711 | if (ia64_platform_is("sn2")) { | |
1712 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
1713 | if (IS_QLA23XX(ha)) | |
1714 | nv->special_options[1] = BIT_7; | |
1715 | } | |
1716 | #endif | |
1717 | ||
1718 | /* Reset Initialization control block */ | |
0107109e | 1719 | memset(icb, 0, ha->init_cb_size); |
1da177e4 LT |
1720 | |
1721 | /* | |
1722 | * Setup driver NVRAM options. | |
1723 | */ | |
1724 | nv->firmware_options[0] |= (BIT_6 | BIT_1); | |
1725 | nv->firmware_options[0] &= ~(BIT_5 | BIT_4); | |
1726 | nv->firmware_options[1] |= (BIT_5 | BIT_0); | |
1727 | nv->firmware_options[1] &= ~BIT_4; | |
1728 | ||
1729 | if (IS_QLA23XX(ha)) { | |
1730 | nv->firmware_options[0] |= BIT_2; | |
1731 | nv->firmware_options[0] &= ~BIT_3; | |
0107109e | 1732 | nv->add_firmware_options[1] |= BIT_5 | BIT_4; |
1da177e4 LT |
1733 | |
1734 | if (IS_QLA2300(ha)) { | |
1735 | if (ha->fb_rev == FPM_2310) { | |
1736 | strcpy(ha->model_number, "QLA2310"); | |
1737 | } else { | |
1738 | strcpy(ha->model_number, "QLA2300"); | |
1739 | } | |
1740 | } else { | |
e315cd28 | 1741 | qla2x00_set_model_info(vha, nv->model_number, |
9bb9fcf2 | 1742 | sizeof(nv->model_number), "QLA23xx"); |
1da177e4 LT |
1743 | } |
1744 | } else if (IS_QLA2200(ha)) { | |
1745 | nv->firmware_options[0] |= BIT_2; | |
1746 | /* | |
1747 | * 'Point-to-point preferred, else loop' is not a safe | |
1748 | * connection mode setting. | |
1749 | */ | |
1750 | if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == | |
1751 | (BIT_5 | BIT_4)) { | |
1752 | /* Force 'loop preferred, else point-to-point'. */ | |
1753 | nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); | |
1754 | nv->add_firmware_options[0] |= BIT_5; | |
1755 | } | |
1756 | strcpy(ha->model_number, "QLA22xx"); | |
1757 | } else /*if (IS_QLA2100(ha))*/ { | |
1758 | strcpy(ha->model_number, "QLA2100"); | |
1759 | } | |
1760 | ||
1761 | /* | |
1762 | * Copy over NVRAM RISC parameter block to initialization control block. | |
1763 | */ | |
1764 | dptr1 = (uint8_t *)icb; | |
1765 | dptr2 = (uint8_t *)&nv->parameter_block_version; | |
1766 | cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; | |
1767 | while (cnt--) | |
1768 | *dptr1++ = *dptr2++; | |
1769 | ||
1770 | /* Copy 2nd half. */ | |
1771 | dptr1 = (uint8_t *)icb->add_firmware_options; | |
1772 | cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; | |
1773 | while (cnt--) | |
1774 | *dptr1++ = *dptr2++; | |
1775 | ||
5341e868 AV |
1776 | /* Use alternate WWN? */ |
1777 | if (nv->host_p[1] & BIT_7) { | |
1778 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
1779 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
1780 | } | |
1781 | ||
1da177e4 LT |
1782 | /* Prepare nodename */ |
1783 | if ((icb->firmware_options[1] & BIT_6) == 0) { | |
1784 | /* | |
1785 | * Firmware will apply the following mask if the nodename was | |
1786 | * not provided. | |
1787 | */ | |
1788 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
1789 | icb->node_name[0] &= 0xF0; | |
1790 | } | |
1791 | ||
1792 | /* | |
1793 | * Set host adapter parameters. | |
1794 | */ | |
0181944f | 1795 | if (nv->host_p[0] & BIT_7) |
11010fec | 1796 | ql2xextended_error_logging = 1; |
1da177e4 LT |
1797 | ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); |
1798 | /* Always load RISC code on non ISP2[12]00 chips. */ | |
1799 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) | |
1800 | ha->flags.disable_risc_code_load = 0; | |
1801 | ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); | |
1802 | ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); | |
1803 | ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); | |
06c22bd1 | 1804 | ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; |
d4c760c2 | 1805 | ha->flags.disable_serdes = 0; |
1da177e4 LT |
1806 | |
1807 | ha->operating_mode = | |
1808 | (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1809 | ||
1810 | memcpy(ha->fw_seriallink_options, nv->seriallink_options, | |
1811 | sizeof(ha->fw_seriallink_options)); | |
1812 | ||
1813 | /* save HBA serial number */ | |
1814 | ha->serial0 = icb->port_name[5]; | |
1815 | ha->serial1 = icb->port_name[6]; | |
1816 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
1817 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
1818 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
1da177e4 LT |
1819 | |
1820 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
1821 | ||
1822 | ha->retry_count = nv->retry_count; | |
1823 | ||
1824 | /* Set minimum login_timeout to 4 seconds. */ | |
1825 | if (nv->login_timeout < ql2xlogintimeout) | |
1826 | nv->login_timeout = ql2xlogintimeout; | |
1827 | if (nv->login_timeout < 4) | |
1828 | nv->login_timeout = 4; | |
1829 | ha->login_timeout = nv->login_timeout; | |
1830 | icb->login_timeout = nv->login_timeout; | |
1831 | ||
00a537b8 AV |
1832 | /* Set minimum RATOV to 100 tenths of a second. */ |
1833 | ha->r_a_tov = 100; | |
1da177e4 | 1834 | |
1da177e4 LT |
1835 | ha->loop_reset_delay = nv->reset_delay; |
1836 | ||
1da177e4 LT |
1837 | /* Link Down Timeout = 0: |
1838 | * | |
1839 | * When Port Down timer expires we will start returning | |
1840 | * I/O's to OS with "DID_NO_CONNECT". | |
1841 | * | |
1842 | * Link Down Timeout != 0: | |
1843 | * | |
1844 | * The driver waits for the link to come up after link down | |
1845 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
fa2a1ce5 | 1846 | */ |
1da177e4 LT |
1847 | if (nv->link_down_timeout == 0) { |
1848 | ha->loop_down_abort_time = | |
354d6b21 | 1849 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); |
1da177e4 LT |
1850 | } else { |
1851 | ha->link_down_timeout = nv->link_down_timeout; | |
1852 | ha->loop_down_abort_time = | |
1853 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
fa2a1ce5 | 1854 | } |
1da177e4 | 1855 | |
1da177e4 LT |
1856 | /* |
1857 | * Need enough time to try and get the port back. | |
1858 | */ | |
1859 | ha->port_down_retry_count = nv->port_down_retry_count; | |
1860 | if (qlport_down_retry) | |
1861 | ha->port_down_retry_count = qlport_down_retry; | |
1862 | /* Set login_retry_count */ | |
1863 | ha->login_retry_count = nv->retry_count; | |
1864 | if (ha->port_down_retry_count == nv->port_down_retry_count && | |
1865 | ha->port_down_retry_count > 3) | |
1866 | ha->login_retry_count = ha->port_down_retry_count; | |
1867 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
1868 | ha->login_retry_count = ha->port_down_retry_count; | |
1869 | if (ql2xloginretrycount) | |
1870 | ha->login_retry_count = ql2xloginretrycount; | |
1871 | ||
1da177e4 LT |
1872 | icb->lun_enables = __constant_cpu_to_le16(0); |
1873 | icb->command_resource_count = 0; | |
1874 | icb->immediate_notify_resource_count = 0; | |
1875 | icb->timeout = __constant_cpu_to_le16(0); | |
1876 | ||
1877 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
1878 | /* Enable RIO */ | |
1879 | icb->firmware_options[0] &= ~BIT_3; | |
1880 | icb->add_firmware_options[0] &= | |
1881 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
1882 | icb->add_firmware_options[0] |= BIT_2; | |
1883 | icb->response_accumulation_timer = 3; | |
1884 | icb->interrupt_delay_timer = 5; | |
1885 | ||
e315cd28 | 1886 | vha->flags.process_response_queue = 1; |
1da177e4 | 1887 | } else { |
4fdfefe5 | 1888 | /* Enable ZIO. */ |
e315cd28 | 1889 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
1890 | ha->zio_mode = icb->add_firmware_options[0] & |
1891 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
1892 | ha->zio_timer = icb->interrupt_delay_timer ? | |
1893 | icb->interrupt_delay_timer: 2; | |
1894 | } | |
1da177e4 LT |
1895 | icb->add_firmware_options[0] &= |
1896 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
e315cd28 | 1897 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 1898 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d | 1899 | ha->zio_mode = QLA_ZIO_MODE_6; |
1900 | ||
4fdfefe5 | 1901 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer " |
e315cd28 | 1902 | "delay (%d us).\n", vha->host_no, ha->zio_mode, |
4fdfefe5 | 1903 | ha->zio_timer * 100)); |
1da177e4 | 1904 | qla_printk(KERN_INFO, ha, |
4fdfefe5 AV |
1905 | "ZIO mode %d enabled; timer delay (%d us).\n", |
1906 | ha->zio_mode, ha->zio_timer * 100); | |
1da177e4 | 1907 | |
4fdfefe5 AV |
1908 | icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; |
1909 | icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; | |
e315cd28 | 1910 | vha->flags.process_response_queue = 1; |
1da177e4 LT |
1911 | } |
1912 | } | |
1913 | ||
4e08df3f DM |
1914 | if (rval) { |
1915 | DEBUG2_3(printk(KERN_WARNING | |
e315cd28 | 1916 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); |
4e08df3f DM |
1917 | } |
1918 | return (rval); | |
1da177e4 LT |
1919 | } |
1920 | ||
19a7b4ae JSEC |
1921 | static void |
1922 | qla2x00_rport_del(void *data) | |
1923 | { | |
1924 | fc_port_t *fcport = data; | |
d97994dc | 1925 | struct fc_rport *rport; |
d97994dc | 1926 | |
e315cd28 | 1927 | spin_lock_irq(fcport->vha->host->host_lock); |
d97994dc | 1928 | rport = fcport->drport; |
1929 | fcport->drport = NULL; | |
e315cd28 | 1930 | spin_unlock_irq(fcport->vha->host->host_lock); |
d97994dc | 1931 | if (rport) |
1932 | fc_remote_port_delete(rport); | |
19a7b4ae JSEC |
1933 | } |
1934 | ||
1da177e4 LT |
1935 | /** |
1936 | * qla2x00_alloc_fcport() - Allocate a generic fcport. | |
1937 | * @ha: HA context | |
1938 | * @flags: allocation flags | |
1939 | * | |
1940 | * Returns a pointer to the allocated fcport, or NULL, if none available. | |
1941 | */ | |
413975a0 | 1942 | static fc_port_t * |
e315cd28 | 1943 | qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) |
1da177e4 LT |
1944 | { |
1945 | fc_port_t *fcport; | |
1946 | ||
bbfbbbc1 MK |
1947 | fcport = kzalloc(sizeof(fc_port_t), flags); |
1948 | if (!fcport) | |
1949 | return NULL; | |
1da177e4 LT |
1950 | |
1951 | /* Setup fcport template structure. */ | |
e315cd28 AC |
1952 | fcport->vha = vha; |
1953 | fcport->vp_idx = vha->vp_idx; | |
1da177e4 LT |
1954 | fcport->port_type = FCT_UNKNOWN; |
1955 | fcport->loop_id = FC_NO_LOOP_ID; | |
1da177e4 | 1956 | atomic_set(&fcport->state, FCS_UNCONFIGURED); |
ad3e0eda | 1957 | fcport->supported_classes = FC_COS_UNSPECIFIED; |
1da177e4 | 1958 | |
bbfbbbc1 | 1959 | return fcport; |
1da177e4 LT |
1960 | } |
1961 | ||
1962 | /* | |
1963 | * qla2x00_configure_loop | |
1964 | * Updates Fibre Channel Device Database with what is actually on loop. | |
1965 | * | |
1966 | * Input: | |
1967 | * ha = adapter block pointer. | |
1968 | * | |
1969 | * Returns: | |
1970 | * 0 = success. | |
1971 | * 1 = error. | |
1972 | * 2 = database was full and device was not configured. | |
1973 | */ | |
1974 | static int | |
e315cd28 | 1975 | qla2x00_configure_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
1976 | { |
1977 | int rval; | |
1978 | unsigned long flags, save_flags; | |
e315cd28 | 1979 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1980 | rval = QLA_SUCCESS; |
1981 | ||
1982 | /* Get Initiator ID */ | |
e315cd28 AC |
1983 | if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { |
1984 | rval = qla2x00_configure_hba(vha); | |
1da177e4 LT |
1985 | if (rval != QLA_SUCCESS) { |
1986 | DEBUG(printk("scsi(%ld): Unable to configure HBA.\n", | |
e315cd28 | 1987 | vha->host_no)); |
1da177e4 LT |
1988 | return (rval); |
1989 | } | |
1990 | } | |
1991 | ||
e315cd28 | 1992 | save_flags = flags = vha->dpc_flags; |
1da177e4 | 1993 | DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n", |
e315cd28 | 1994 | vha->host_no, flags)); |
1da177e4 LT |
1995 | |
1996 | /* | |
1997 | * If we have both an RSCN and PORT UPDATE pending then handle them | |
1998 | * both at the same time. | |
1999 | */ | |
e315cd28 AC |
2000 | clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
2001 | clear_bit(RSCN_UPDATE, &vha->dpc_flags); | |
1da177e4 LT |
2002 | |
2003 | /* Determine what we need to do */ | |
2004 | if (ha->current_topology == ISP_CFG_FL && | |
2005 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2006 | ||
e315cd28 | 2007 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2008 | set_bit(RSCN_UPDATE, &flags); |
2009 | ||
2010 | } else if (ha->current_topology == ISP_CFG_F && | |
2011 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2012 | ||
e315cd28 | 2013 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2014 | set_bit(RSCN_UPDATE, &flags); |
2015 | clear_bit(LOCAL_LOOP_UPDATE, &flags); | |
21333b48 AV |
2016 | |
2017 | } else if (ha->current_topology == ISP_CFG_N) { | |
2018 | clear_bit(RSCN_UPDATE, &flags); | |
1da177e4 | 2019 | |
e315cd28 | 2020 | } else if (!vha->flags.online || |
1da177e4 LT |
2021 | (test_bit(ABORT_ISP_ACTIVE, &flags))) { |
2022 | ||
e315cd28 | 2023 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2024 | set_bit(RSCN_UPDATE, &flags); |
2025 | set_bit(LOCAL_LOOP_UPDATE, &flags); | |
2026 | } | |
2027 | ||
2028 | if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { | |
e315cd28 | 2029 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) |
1da177e4 | 2030 | rval = QLA_FUNCTION_FAILED; |
e315cd28 AC |
2031 | else |
2032 | rval = qla2x00_configure_local_loop(vha); | |
1da177e4 LT |
2033 | } |
2034 | ||
2035 | if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { | |
e315cd28 | 2036 | if (LOOP_TRANSITION(vha)) |
1da177e4 | 2037 | rval = QLA_FUNCTION_FAILED; |
e315cd28 AC |
2038 | else |
2039 | rval = qla2x00_configure_fabric(vha); | |
1da177e4 LT |
2040 | } |
2041 | ||
2042 | if (rval == QLA_SUCCESS) { | |
e315cd28 AC |
2043 | if (atomic_read(&vha->loop_down_timer) || |
2044 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { | |
1da177e4 LT |
2045 | rval = QLA_FUNCTION_FAILED; |
2046 | } else { | |
e315cd28 | 2047 | atomic_set(&vha->loop_state, LOOP_READY); |
1da177e4 | 2048 | |
e315cd28 | 2049 | DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no)); |
1da177e4 LT |
2050 | } |
2051 | } | |
2052 | ||
2053 | if (rval) { | |
2054 | DEBUG2_3(printk("%s(%ld): *** FAILED ***\n", | |
e315cd28 | 2055 | __func__, vha->host_no)); |
1da177e4 LT |
2056 | } else { |
2057 | DEBUG3(printk("%s: exiting normally\n", __func__)); | |
2058 | } | |
2059 | ||
cc3ef7bc | 2060 | /* Restore state if a resync event occurred during processing */ |
e315cd28 | 2061 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
1da177e4 | 2062 | if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) |
e315cd28 | 2063 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
73208dfd | 2064 | if (test_bit(RSCN_UPDATE, &save_flags)) |
e315cd28 | 2065 | set_bit(RSCN_UPDATE, &vha->dpc_flags); |
1da177e4 LT |
2066 | } |
2067 | ||
2068 | return (rval); | |
2069 | } | |
2070 | ||
2071 | ||
2072 | ||
2073 | /* | |
2074 | * qla2x00_configure_local_loop | |
2075 | * Updates Fibre Channel Device Database with local loop devices. | |
2076 | * | |
2077 | * Input: | |
2078 | * ha = adapter block pointer. | |
2079 | * | |
2080 | * Returns: | |
2081 | * 0 = success. | |
2082 | */ | |
2083 | static int | |
e315cd28 | 2084 | qla2x00_configure_local_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2085 | { |
2086 | int rval, rval2; | |
2087 | int found_devs; | |
2088 | int found; | |
2089 | fc_port_t *fcport, *new_fcport; | |
2090 | ||
2091 | uint16_t index; | |
2092 | uint16_t entries; | |
2093 | char *id_iter; | |
2094 | uint16_t loop_id; | |
2095 | uint8_t domain, area, al_pa; | |
e315cd28 | 2096 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2097 | |
2098 | found_devs = 0; | |
2099 | new_fcport = NULL; | |
2100 | entries = MAX_FIBRE_DEVICES; | |
2101 | ||
e315cd28 AC |
2102 | DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no)); |
2103 | DEBUG3(qla2x00_get_fcal_position_map(vha, NULL)); | |
1da177e4 LT |
2104 | |
2105 | /* Get list of logged in devices. */ | |
2106 | memset(ha->gid_list, 0, GID_LIST_SIZE); | |
e315cd28 | 2107 | rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, |
1da177e4 LT |
2108 | &entries); |
2109 | if (rval != QLA_SUCCESS) | |
2110 | goto cleanup_allocation; | |
2111 | ||
2112 | DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n", | |
7640335e | 2113 | vha->host_no, entries)); |
1da177e4 LT |
2114 | DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list, |
2115 | entries * sizeof(struct gid_list_info))); | |
2116 | ||
2117 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2118 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 LT |
2119 | if (new_fcport == NULL) { |
2120 | rval = QLA_MEMORY_ALLOC_FAILED; | |
2121 | goto cleanup_allocation; | |
2122 | } | |
2123 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2124 | ||
2125 | /* | |
2126 | * Mark local devices that were present with FCF_DEVICE_LOST for now. | |
2127 | */ | |
e315cd28 | 2128 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2129 | if (atomic_read(&fcport->state) == FCS_ONLINE && |
2130 | fcport->port_type != FCT_BROADCAST && | |
2131 | (fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
2132 | ||
2133 | DEBUG(printk("scsi(%ld): Marking port lost, " | |
2134 | "loop_id=0x%04x\n", | |
e315cd28 | 2135 | vha->host_no, fcport->loop_id)); |
1da177e4 LT |
2136 | |
2137 | atomic_set(&fcport->state, FCS_DEVICE_LOST); | |
1da177e4 LT |
2138 | } |
2139 | } | |
2140 | ||
2141 | /* Add devices to port list. */ | |
2142 | id_iter = (char *)ha->gid_list; | |
2143 | for (index = 0; index < entries; index++) { | |
2144 | domain = ((struct gid_list_info *)id_iter)->domain; | |
2145 | area = ((struct gid_list_info *)id_iter)->area; | |
2146 | al_pa = ((struct gid_list_info *)id_iter)->al_pa; | |
abbd8870 | 2147 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
1da177e4 LT |
2148 | loop_id = (uint16_t) |
2149 | ((struct gid_list_info *)id_iter)->loop_id_2100; | |
abbd8870 | 2150 | else |
1da177e4 LT |
2151 | loop_id = le16_to_cpu( |
2152 | ((struct gid_list_info *)id_iter)->loop_id); | |
abbd8870 | 2153 | id_iter += ha->gid_list_info_size; |
1da177e4 LT |
2154 | |
2155 | /* Bypass reserved domain fields. */ | |
2156 | if ((domain & 0xf0) == 0xf0) | |
2157 | continue; | |
2158 | ||
2159 | /* Bypass if not same domain and area of adapter. */ | |
f7d289f6 | 2160 | if (area && domain && |
e315cd28 | 2161 | (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) |
1da177e4 LT |
2162 | continue; |
2163 | ||
2164 | /* Bypass invalid local loop ID. */ | |
2165 | if (loop_id > LAST_LOCAL_LOOP_ID) | |
2166 | continue; | |
2167 | ||
2168 | /* Fill in member data. */ | |
2169 | new_fcport->d_id.b.domain = domain; | |
2170 | new_fcport->d_id.b.area = area; | |
2171 | new_fcport->d_id.b.al_pa = al_pa; | |
2172 | new_fcport->loop_id = loop_id; | |
e315cd28 AC |
2173 | new_fcport->vp_idx = vha->vp_idx; |
2174 | rval2 = qla2x00_get_port_database(vha, new_fcport, 0); | |
1da177e4 LT |
2175 | if (rval2 != QLA_SUCCESS) { |
2176 | DEBUG2(printk("scsi(%ld): Failed to retrieve fcport " | |
2177 | "information -- get_port_database=%x, " | |
2178 | "loop_id=0x%04x\n", | |
e315cd28 | 2179 | vha->host_no, rval2, new_fcport->loop_id)); |
c9d02acf | 2180 | DEBUG2(printk("scsi(%ld): Scheduling resync...\n", |
e315cd28 AC |
2181 | vha->host_no)); |
2182 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
2183 | continue; |
2184 | } | |
2185 | ||
2186 | /* Check for matching device in port list. */ | |
2187 | found = 0; | |
2188 | fcport = NULL; | |
e315cd28 | 2189 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2190 | if (memcmp(new_fcport->port_name, fcport->port_name, |
2191 | WWN_SIZE)) | |
2192 | continue; | |
2193 | ||
ddb9b126 | 2194 | fcport->flags &= ~FCF_FABRIC_DEVICE; |
1da177e4 LT |
2195 | fcport->loop_id = new_fcport->loop_id; |
2196 | fcport->port_type = new_fcport->port_type; | |
2197 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2198 | memcpy(fcport->node_name, new_fcport->node_name, | |
2199 | WWN_SIZE); | |
2200 | ||
2201 | found++; | |
2202 | break; | |
2203 | } | |
2204 | ||
2205 | if (!found) { | |
2206 | /* New device, add to fcports list. */ | |
e315cd28 AC |
2207 | if (vha->vp_idx) { |
2208 | new_fcport->vha = vha; | |
2209 | new_fcport->vp_idx = vha->vp_idx; | |
2c3dfe3f | 2210 | } |
e315cd28 | 2211 | list_add_tail(&new_fcport->list, &vha->vp_fcports); |
1da177e4 LT |
2212 | |
2213 | /* Allocate a new replacement fcport. */ | |
2214 | fcport = new_fcport; | |
e315cd28 | 2215 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 LT |
2216 | if (new_fcport == NULL) { |
2217 | rval = QLA_MEMORY_ALLOC_FAILED; | |
2218 | goto cleanup_allocation; | |
2219 | } | |
2220 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2221 | } | |
2222 | ||
d8b45213 | 2223 | /* Base iIDMA settings on HBA port speed. */ |
a3cbdfad | 2224 | fcport->fp_speed = ha->link_data_rate; |
d8b45213 | 2225 | |
e315cd28 | 2226 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
2227 | |
2228 | found_devs++; | |
2229 | } | |
2230 | ||
2231 | cleanup_allocation: | |
c9475cb0 | 2232 | kfree(new_fcport); |
1da177e4 LT |
2233 | |
2234 | if (rval != QLA_SUCCESS) { | |
2235 | DEBUG2(printk("scsi(%ld): Configure local loop error exit: " | |
e315cd28 | 2236 | "rval=%x\n", vha->host_no, rval)); |
1da177e4 LT |
2237 | } |
2238 | ||
1da177e4 LT |
2239 | return (rval); |
2240 | } | |
2241 | ||
d8b45213 | 2242 | static void |
e315cd28 | 2243 | qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
d8b45213 AV |
2244 | { |
2245 | #define LS_UNKNOWN 2 | |
a3cbdfad | 2246 | static char *link_speeds[5] = { "1", "2", "?", "4", "8" }; |
d8b45213 | 2247 | int rval; |
a3cbdfad | 2248 | uint16_t mb[6]; |
e315cd28 | 2249 | struct qla_hw_data *ha = vha->hw; |
d8b45213 | 2250 | |
c76f2c01 | 2251 | if (!IS_IIDMA_CAPABLE(ha)) |
d8b45213 AV |
2252 | return; |
2253 | ||
39bd9622 AV |
2254 | if (fcport->fp_speed == PORT_SPEED_UNKNOWN || |
2255 | fcport->fp_speed > ha->link_data_rate) | |
d8b45213 AV |
2256 | return; |
2257 | ||
e315cd28 | 2258 | rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, |
a3cbdfad | 2259 | mb); |
d8b45213 AV |
2260 | if (rval != QLA_SUCCESS) { |
2261 | DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA " | |
2262 | "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n", | |
e315cd28 | 2263 | vha->host_no, fcport->port_name[0], fcport->port_name[1], |
d8b45213 AV |
2264 | fcport->port_name[2], fcport->port_name[3], |
2265 | fcport->port_name[4], fcport->port_name[5], | |
2266 | fcport->port_name[6], fcport->port_name[7], rval, | |
a3cbdfad | 2267 | fcport->fp_speed, mb[0], mb[1])); |
d8b45213 AV |
2268 | } else { |
2269 | DEBUG2(qla_printk(KERN_INFO, ha, | |
2270 | "iIDMA adjusted to %s GB/s on " | |
2271 | "%02x%02x%02x%02x%02x%02x%02x%02x.\n", | |
a3cbdfad | 2272 | link_speeds[fcport->fp_speed], fcport->port_name[0], |
d8b45213 AV |
2273 | fcport->port_name[1], fcport->port_name[2], |
2274 | fcport->port_name[3], fcport->port_name[4], | |
2275 | fcport->port_name[5], fcport->port_name[6], | |
2276 | fcport->port_name[7])); | |
2277 | } | |
2278 | } | |
2279 | ||
23be331d | 2280 | static void |
e315cd28 | 2281 | qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) |
8482e118 | 2282 | { |
2283 | struct fc_rport_identifiers rport_ids; | |
bdf79621 | 2284 | struct fc_rport *rport; |
e315cd28 | 2285 | struct qla_hw_data *ha = vha->hw; |
8482e118 | 2286 | |
d97994dc | 2287 | if (fcport->drport) |
2288 | qla2x00_rport_del(fcport); | |
8482e118 | 2289 | |
f8b02a85 AV |
2290 | rport_ids.node_name = wwn_to_u64(fcport->node_name); |
2291 | rport_ids.port_name = wwn_to_u64(fcport->port_name); | |
8482e118 | 2292 | rport_ids.port_id = fcport->d_id.b.domain << 16 | |
2293 | fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; | |
77d74143 | 2294 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
e315cd28 | 2295 | fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); |
77d74143 AV |
2296 | if (!rport) { |
2297 | qla_printk(KERN_WARNING, ha, | |
2298 | "Unable to allocate fc remote port!\n"); | |
2299 | return; | |
2300 | } | |
e315cd28 | 2301 | spin_lock_irq(fcport->vha->host->host_lock); |
19a7b4ae | 2302 | *((fc_port_t **)rport->dd_data) = fcport; |
e315cd28 | 2303 | spin_unlock_irq(fcport->vha->host->host_lock); |
d97994dc | 2304 | |
ad3e0eda | 2305 | rport->supported_classes = fcport->supported_classes; |
77d74143 | 2306 | |
8482e118 | 2307 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
2308 | if (fcport->port_type == FCT_INITIATOR) | |
2309 | rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; | |
2310 | if (fcport->port_type == FCT_TARGET) | |
2311 | rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; | |
77d74143 | 2312 | fc_remote_port_rolechg(rport, rport_ids.roles); |
1da177e4 LT |
2313 | } |
2314 | ||
23be331d AB |
2315 | /* |
2316 | * qla2x00_update_fcport | |
2317 | * Updates device on list. | |
2318 | * | |
2319 | * Input: | |
2320 | * ha = adapter block pointer. | |
2321 | * fcport = port structure pointer. | |
2322 | * | |
2323 | * Return: | |
2324 | * 0 - Success | |
2325 | * BIT_0 - error | |
2326 | * | |
2327 | * Context: | |
2328 | * Kernel context. | |
2329 | */ | |
2330 | void | |
e315cd28 | 2331 | qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
23be331d | 2332 | { |
e315cd28 | 2333 | struct qla_hw_data *ha = vha->hw; |
2c3dfe3f | 2334 | |
e315cd28 | 2335 | fcport->vha = vha; |
23be331d | 2336 | fcport->login_retry = 0; |
e315cd28 | 2337 | fcport->port_login_retry_count = ha->port_down_retry_count * |
23be331d | 2338 | PORT_RETRY_TIME; |
e315cd28 | 2339 | atomic_set(&fcport->port_down_timer, ha->port_down_retry_count * |
23be331d AB |
2340 | PORT_RETRY_TIME); |
2341 | fcport->flags &= ~FCF_LOGIN_NEEDED; | |
2342 | ||
e315cd28 | 2343 | qla2x00_iidma_fcport(vha, fcport); |
23be331d AB |
2344 | |
2345 | atomic_set(&fcport->state, FCS_ONLINE); | |
2346 | ||
e315cd28 | 2347 | qla2x00_reg_remote_port(vha, fcport); |
23be331d AB |
2348 | } |
2349 | ||
1da177e4 LT |
2350 | /* |
2351 | * qla2x00_configure_fabric | |
2352 | * Setup SNS devices with loop ID's. | |
2353 | * | |
2354 | * Input: | |
2355 | * ha = adapter block pointer. | |
2356 | * | |
2357 | * Returns: | |
2358 | * 0 = success. | |
2359 | * BIT_0 = error | |
2360 | */ | |
2361 | static int | |
e315cd28 | 2362 | qla2x00_configure_fabric(scsi_qla_host_t *vha) |
1da177e4 LT |
2363 | { |
2364 | int rval, rval2; | |
2365 | fc_port_t *fcport, *fcptemp; | |
2366 | uint16_t next_loopid; | |
2367 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
0107109e | 2368 | uint16_t loop_id; |
1da177e4 | 2369 | LIST_HEAD(new_fcports); |
e315cd28 AC |
2370 | struct qla_hw_data *ha = vha->hw; |
2371 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
1da177e4 LT |
2372 | |
2373 | /* If FL port exists, then SNS is present */ | |
e428924c | 2374 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2375 | loop_id = NPH_F_PORT; |
2376 | else | |
2377 | loop_id = SNS_FL_PORT; | |
e315cd28 | 2378 | rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); |
1da177e4 LT |
2379 | if (rval != QLA_SUCCESS) { |
2380 | DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL " | |
e315cd28 | 2381 | "Port\n", vha->host_no)); |
1da177e4 | 2382 | |
e315cd28 | 2383 | vha->device_flags &= ~SWITCH_FOUND; |
1da177e4 LT |
2384 | return (QLA_SUCCESS); |
2385 | } | |
e315cd28 | 2386 | vha->device_flags |= SWITCH_FOUND; |
1da177e4 LT |
2387 | |
2388 | /* Mark devices that need re-synchronization. */ | |
e315cd28 | 2389 | rval2 = qla2x00_device_resync(vha); |
1da177e4 LT |
2390 | if (rval2 == QLA_RSCNS_HANDLED) { |
2391 | /* No point doing the scan, just continue. */ | |
2392 | return (QLA_SUCCESS); | |
2393 | } | |
2394 | do { | |
cca5335c AV |
2395 | /* FDMI support. */ |
2396 | if (ql2xfdmienable && | |
e315cd28 AC |
2397 | test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) |
2398 | qla2x00_fdmi_register(vha); | |
cca5335c | 2399 | |
1da177e4 | 2400 | /* Ensure we are logged into the SNS. */ |
e428924c | 2401 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2402 | loop_id = NPH_SNS; |
2403 | else | |
2404 | loop_id = SIMPLE_NAME_SERVER; | |
e315cd28 | 2405 | ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, |
abbd8870 | 2406 | 0xfc, mb, BIT_1 | BIT_0); |
1da177e4 LT |
2407 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
2408 | DEBUG2(qla_printk(KERN_INFO, ha, | |
2409 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
0107109e | 2410 | "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id, |
1da177e4 LT |
2411 | mb[0], mb[1], mb[2], mb[6], mb[7])); |
2412 | return (QLA_SUCCESS); | |
2413 | } | |
2414 | ||
e315cd28 AC |
2415 | if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { |
2416 | if (qla2x00_rft_id(vha)) { | |
1da177e4 LT |
2417 | /* EMPTY */ |
2418 | DEBUG2(printk("scsi(%ld): Register FC-4 " | |
e315cd28 | 2419 | "TYPE failed.\n", vha->host_no)); |
1da177e4 | 2420 | } |
e315cd28 | 2421 | if (qla2x00_rff_id(vha)) { |
1da177e4 LT |
2422 | /* EMPTY */ |
2423 | DEBUG2(printk("scsi(%ld): Register FC-4 " | |
e315cd28 | 2424 | "Features failed.\n", vha->host_no)); |
1da177e4 | 2425 | } |
e315cd28 | 2426 | if (qla2x00_rnn_id(vha)) { |
1da177e4 LT |
2427 | /* EMPTY */ |
2428 | DEBUG2(printk("scsi(%ld): Register Node Name " | |
e315cd28 AC |
2429 | "failed.\n", vha->host_no)); |
2430 | } else if (qla2x00_rsnn_nn(vha)) { | |
1da177e4 LT |
2431 | /* EMPTY */ |
2432 | DEBUG2(printk("scsi(%ld): Register Symbolic " | |
e315cd28 | 2433 | "Node Name failed.\n", vha->host_no)); |
1da177e4 LT |
2434 | } |
2435 | } | |
2436 | ||
e315cd28 | 2437 | rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); |
1da177e4 LT |
2438 | if (rval != QLA_SUCCESS) |
2439 | break; | |
2440 | ||
2441 | /* | |
2442 | * Logout all previous fabric devices marked lost, except | |
2443 | * tape devices. | |
2444 | */ | |
e315cd28 AC |
2445 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
2446 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2447 | break; |
2448 | ||
2449 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) | |
2450 | continue; | |
2451 | ||
2452 | if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { | |
e315cd28 | 2453 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 2454 | ql2xplogiabsentdevice, 0); |
1da177e4 LT |
2455 | if (fcport->loop_id != FC_NO_LOOP_ID && |
2456 | (fcport->flags & FCF_TAPE_PRESENT) == 0 && | |
2457 | fcport->port_type != FCT_INITIATOR && | |
2458 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 2459 | ha->isp_ops->fabric_logout(vha, |
1c7c6357 AV |
2460 | fcport->loop_id, |
2461 | fcport->d_id.b.domain, | |
2462 | fcport->d_id.b.area, | |
2463 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
2464 | fcport->loop_id = FC_NO_LOOP_ID; |
2465 | } | |
2466 | } | |
2467 | } | |
2468 | ||
2469 | /* Starting free loop ID. */ | |
e315cd28 | 2470 | next_loopid = ha->min_external_loopid; |
1da177e4 LT |
2471 | |
2472 | /* | |
2473 | * Scan through our port list and login entries that need to be | |
2474 | * logged in. | |
2475 | */ | |
e315cd28 AC |
2476 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
2477 | if (atomic_read(&vha->loop_down_timer) || | |
2478 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2479 | break; |
2480 | ||
2481 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || | |
2482 | (fcport->flags & FCF_LOGIN_NEEDED) == 0) | |
2483 | continue; | |
2484 | ||
2485 | if (fcport->loop_id == FC_NO_LOOP_ID) { | |
2486 | fcport->loop_id = next_loopid; | |
d4486fd6 | 2487 | rval = qla2x00_find_new_loop_id( |
e315cd28 | 2488 | base_vha, fcport); |
1da177e4 LT |
2489 | if (rval != QLA_SUCCESS) { |
2490 | /* Ran out of IDs to use */ | |
2491 | break; | |
2492 | } | |
2493 | } | |
1da177e4 | 2494 | /* Login and update database */ |
e315cd28 | 2495 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
1da177e4 LT |
2496 | } |
2497 | ||
2498 | /* Exit if out of loop IDs. */ | |
2499 | if (rval != QLA_SUCCESS) { | |
2500 | break; | |
2501 | } | |
2502 | ||
2503 | /* | |
2504 | * Login and add the new devices to our port list. | |
2505 | */ | |
2506 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
e315cd28 AC |
2507 | if (atomic_read(&vha->loop_down_timer) || |
2508 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2509 | break; |
2510 | ||
2511 | /* Find a new loop ID to use. */ | |
2512 | fcport->loop_id = next_loopid; | |
e315cd28 | 2513 | rval = qla2x00_find_new_loop_id(base_vha, fcport); |
1da177e4 LT |
2514 | if (rval != QLA_SUCCESS) { |
2515 | /* Ran out of IDs to use */ | |
2516 | break; | |
2517 | } | |
2518 | ||
bdf79621 | 2519 | /* Login and update database */ |
e315cd28 AC |
2520 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
2521 | ||
2522 | if (vha->vp_idx) { | |
2523 | fcport->vha = vha; | |
2524 | fcport->vp_idx = vha->vp_idx; | |
2525 | } | |
2526 | list_move_tail(&fcport->list, &vha->vp_fcports); | |
1da177e4 LT |
2527 | } |
2528 | } while (0); | |
2529 | ||
2530 | /* Free all new device structures not processed. */ | |
2531 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
2532 | list_del(&fcport->list); | |
2533 | kfree(fcport); | |
2534 | } | |
2535 | ||
2536 | if (rval) { | |
2537 | DEBUG2(printk("scsi(%ld): Configure fabric error exit: " | |
e315cd28 | 2538 | "rval=%d\n", vha->host_no, rval)); |
1da177e4 LT |
2539 | } |
2540 | ||
2541 | return (rval); | |
2542 | } | |
2543 | ||
2544 | ||
2545 | /* | |
2546 | * qla2x00_find_all_fabric_devs | |
2547 | * | |
2548 | * Input: | |
2549 | * ha = adapter block pointer. | |
2550 | * dev = database device entry pointer. | |
2551 | * | |
2552 | * Returns: | |
2553 | * 0 = success. | |
2554 | * | |
2555 | * Context: | |
2556 | * Kernel context. | |
2557 | */ | |
2558 | static int | |
e315cd28 AC |
2559 | qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, |
2560 | struct list_head *new_fcports) | |
1da177e4 LT |
2561 | { |
2562 | int rval; | |
2563 | uint16_t loop_id; | |
2564 | fc_port_t *fcport, *new_fcport, *fcptemp; | |
2565 | int found; | |
2566 | ||
2567 | sw_info_t *swl; | |
2568 | int swl_idx; | |
2569 | int first_dev, last_dev; | |
2570 | port_id_t wrap, nxt_d_id; | |
e315cd28 AC |
2571 | struct qla_hw_data *ha = vha->hw; |
2572 | struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); | |
ee546b6e | 2573 | struct scsi_qla_host *tvp; |
1da177e4 LT |
2574 | |
2575 | rval = QLA_SUCCESS; | |
2576 | ||
2577 | /* Try GID_PT to get device list, else GAN. */ | |
4b89258c | 2578 | swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL); |
bbfbbbc1 | 2579 | if (!swl) { |
1da177e4 LT |
2580 | /*EMPTY*/ |
2581 | DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback " | |
e315cd28 | 2582 | "on GA_NXT\n", vha->host_no)); |
1da177e4 | 2583 | } else { |
e315cd28 | 2584 | if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
2585 | kfree(swl); |
2586 | swl = NULL; | |
e315cd28 | 2587 | } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
2588 | kfree(swl); |
2589 | swl = NULL; | |
e315cd28 | 2590 | } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
2591 | kfree(swl); |
2592 | swl = NULL; | |
e5896bd5 | 2593 | } else if (ql2xiidmaenable && |
e315cd28 AC |
2594 | qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { |
2595 | qla2x00_gpsc(vha, swl); | |
1da177e4 LT |
2596 | } |
2597 | } | |
2598 | swl_idx = 0; | |
2599 | ||
2600 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2601 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 2602 | if (new_fcport == NULL) { |
c9475cb0 | 2603 | kfree(swl); |
1da177e4 LT |
2604 | return (QLA_MEMORY_ALLOC_FAILED); |
2605 | } | |
2606 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
2607 | /* Set start port ID scan at adapter ID. */ |
2608 | first_dev = 1; | |
2609 | last_dev = 0; | |
2610 | ||
2611 | /* Starting free loop ID. */ | |
e315cd28 AC |
2612 | loop_id = ha->min_external_loopid; |
2613 | for (; loop_id <= ha->max_loop_id; loop_id++) { | |
2614 | if (qla2x00_is_reserved_id(vha, loop_id)) | |
1da177e4 LT |
2615 | continue; |
2616 | ||
e315cd28 | 2617 | if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha)) |
1da177e4 LT |
2618 | break; |
2619 | ||
2620 | if (swl != NULL) { | |
2621 | if (last_dev) { | |
2622 | wrap.b24 = new_fcport->d_id.b24; | |
2623 | } else { | |
2624 | new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; | |
2625 | memcpy(new_fcport->node_name, | |
2626 | swl[swl_idx].node_name, WWN_SIZE); | |
2627 | memcpy(new_fcport->port_name, | |
2628 | swl[swl_idx].port_name, WWN_SIZE); | |
d8b45213 AV |
2629 | memcpy(new_fcport->fabric_port_name, |
2630 | swl[swl_idx].fabric_port_name, WWN_SIZE); | |
2631 | new_fcport->fp_speed = swl[swl_idx].fp_speed; | |
1da177e4 LT |
2632 | |
2633 | if (swl[swl_idx].d_id.b.rsvd_1 != 0) { | |
2634 | last_dev = 1; | |
2635 | } | |
2636 | swl_idx++; | |
2637 | } | |
2638 | } else { | |
2639 | /* Send GA_NXT to the switch */ | |
e315cd28 | 2640 | rval = qla2x00_ga_nxt(vha, new_fcport); |
1da177e4 LT |
2641 | if (rval != QLA_SUCCESS) { |
2642 | qla_printk(KERN_WARNING, ha, | |
2643 | "SNS scan failed -- assuming zero-entry " | |
2644 | "result...\n"); | |
2645 | list_for_each_entry_safe(fcport, fcptemp, | |
2646 | new_fcports, list) { | |
2647 | list_del(&fcport->list); | |
2648 | kfree(fcport); | |
2649 | } | |
2650 | rval = QLA_SUCCESS; | |
2651 | break; | |
2652 | } | |
2653 | } | |
2654 | ||
2655 | /* If wrap on switch device list, exit. */ | |
2656 | if (first_dev) { | |
2657 | wrap.b24 = new_fcport->d_id.b24; | |
2658 | first_dev = 0; | |
2659 | } else if (new_fcport->d_id.b24 == wrap.b24) { | |
2660 | DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n", | |
e315cd28 | 2661 | vha->host_no, new_fcport->d_id.b.domain, |
1da177e4 LT |
2662 | new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa)); |
2663 | break; | |
2664 | } | |
2665 | ||
2c3dfe3f | 2666 | /* Bypass if same physical adapter. */ |
e315cd28 | 2667 | if (new_fcport->d_id.b24 == base_vha->d_id.b24) |
1da177e4 LT |
2668 | continue; |
2669 | ||
2c3dfe3f | 2670 | /* Bypass virtual ports of the same host. */ |
e315cd28 AC |
2671 | found = 0; |
2672 | if (ha->num_vhosts) { | |
ee546b6e | 2673 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
2674 | if (new_fcport->d_id.b24 == vp->d_id.b24) { |
2675 | found = 1; | |
2c3dfe3f | 2676 | break; |
e315cd28 | 2677 | } |
2c3dfe3f | 2678 | } |
e315cd28 | 2679 | if (found) |
2c3dfe3f SJ |
2680 | continue; |
2681 | } | |
2682 | ||
f7d289f6 AV |
2683 | /* Bypass if same domain and area of adapter. */ |
2684 | if (((new_fcport->d_id.b24 & 0xffff00) == | |
e315cd28 | 2685 | (vha->d_id.b24 & 0xffff00)) && ha->current_topology == |
f7d289f6 AV |
2686 | ISP_CFG_FL) |
2687 | continue; | |
2688 | ||
1da177e4 LT |
2689 | /* Bypass reserved domain fields. */ |
2690 | if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) | |
2691 | continue; | |
2692 | ||
2693 | /* Locate matching device in database. */ | |
2694 | found = 0; | |
e315cd28 | 2695 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2696 | if (memcmp(new_fcport->port_name, fcport->port_name, |
2697 | WWN_SIZE)) | |
2698 | continue; | |
2699 | ||
2700 | found++; | |
2701 | ||
d8b45213 AV |
2702 | /* Update port state. */ |
2703 | memcpy(fcport->fabric_port_name, | |
2704 | new_fcport->fabric_port_name, WWN_SIZE); | |
2705 | fcport->fp_speed = new_fcport->fp_speed; | |
2706 | ||
1da177e4 LT |
2707 | /* |
2708 | * If address the same and state FCS_ONLINE, nothing | |
2709 | * changed. | |
2710 | */ | |
2711 | if (fcport->d_id.b24 == new_fcport->d_id.b24 && | |
2712 | atomic_read(&fcport->state) == FCS_ONLINE) { | |
2713 | break; | |
2714 | } | |
2715 | ||
2716 | /* | |
2717 | * If device was not a fabric device before. | |
2718 | */ | |
2719 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
2720 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2721 | fcport->loop_id = FC_NO_LOOP_ID; | |
2722 | fcport->flags |= (FCF_FABRIC_DEVICE | | |
2723 | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
2724 | break; |
2725 | } | |
2726 | ||
2727 | /* | |
2728 | * Port ID changed or device was marked to be updated; | |
2729 | * Log it out if still logged in and mark it for | |
2730 | * relogin later. | |
2731 | */ | |
2732 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2733 | fcport->flags |= FCF_LOGIN_NEEDED; | |
2734 | if (fcport->loop_id != FC_NO_LOOP_ID && | |
2735 | (fcport->flags & FCF_TAPE_PRESENT) == 0 && | |
2736 | fcport->port_type != FCT_INITIATOR && | |
2737 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 2738 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
2739 | fcport->d_id.b.domain, fcport->d_id.b.area, |
2740 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
2741 | fcport->loop_id = FC_NO_LOOP_ID; |
2742 | } | |
2743 | ||
2744 | break; | |
2745 | } | |
2746 | ||
2747 | if (found) | |
2748 | continue; | |
1da177e4 LT |
2749 | /* If device was not in our fcports list, then add it. */ |
2750 | list_add_tail(&new_fcport->list, new_fcports); | |
2751 | ||
2752 | /* Allocate a new replacement fcport. */ | |
2753 | nxt_d_id.b24 = new_fcport->d_id.b24; | |
e315cd28 | 2754 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 2755 | if (new_fcport == NULL) { |
c9475cb0 | 2756 | kfree(swl); |
1da177e4 LT |
2757 | return (QLA_MEMORY_ALLOC_FAILED); |
2758 | } | |
2759 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
2760 | new_fcport->d_id.b24 = nxt_d_id.b24; | |
2761 | } | |
2762 | ||
c9475cb0 JJ |
2763 | kfree(swl); |
2764 | kfree(new_fcport); | |
1da177e4 | 2765 | |
1da177e4 LT |
2766 | return (rval); |
2767 | } | |
2768 | ||
2769 | /* | |
2770 | * qla2x00_find_new_loop_id | |
2771 | * Scan through our port list and find a new usable loop ID. | |
2772 | * | |
2773 | * Input: | |
2774 | * ha: adapter state pointer. | |
2775 | * dev: port structure pointer. | |
2776 | * | |
2777 | * Returns: | |
2778 | * qla2x00 local function return status code. | |
2779 | * | |
2780 | * Context: | |
2781 | * Kernel context. | |
2782 | */ | |
413975a0 | 2783 | static int |
e315cd28 | 2784 | qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) |
1da177e4 LT |
2785 | { |
2786 | int rval; | |
2787 | int found; | |
2788 | fc_port_t *fcport; | |
2789 | uint16_t first_loop_id; | |
e315cd28 AC |
2790 | struct qla_hw_data *ha = vha->hw; |
2791 | struct scsi_qla_host *vp; | |
ee546b6e | 2792 | struct scsi_qla_host *tvp; |
1da177e4 LT |
2793 | |
2794 | rval = QLA_SUCCESS; | |
2795 | ||
2796 | /* Save starting loop ID. */ | |
2797 | first_loop_id = dev->loop_id; | |
2798 | ||
2799 | for (;;) { | |
2800 | /* Skip loop ID if already used by adapter. */ | |
e315cd28 | 2801 | if (dev->loop_id == vha->loop_id) |
1da177e4 | 2802 | dev->loop_id++; |
1da177e4 LT |
2803 | |
2804 | /* Skip reserved loop IDs. */ | |
e315cd28 | 2805 | while (qla2x00_is_reserved_id(vha, dev->loop_id)) |
1da177e4 | 2806 | dev->loop_id++; |
1da177e4 LT |
2807 | |
2808 | /* Reset loop ID if passed the end. */ | |
e315cd28 | 2809 | if (dev->loop_id > ha->max_loop_id) { |
1da177e4 LT |
2810 | /* first loop ID. */ |
2811 | dev->loop_id = ha->min_external_loopid; | |
2812 | } | |
2813 | ||
2814 | /* Check for loop ID being already in use. */ | |
2815 | found = 0; | |
2816 | fcport = NULL; | |
ee546b6e | 2817 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
2818 | list_for_each_entry(fcport, &vp->vp_fcports, list) { |
2819 | if (fcport->loop_id == dev->loop_id && | |
2820 | fcport != dev) { | |
2821 | /* ID possibly in use */ | |
2822 | found++; | |
2823 | break; | |
2824 | } | |
1da177e4 | 2825 | } |
e315cd28 AC |
2826 | if (found) |
2827 | break; | |
1da177e4 LT |
2828 | } |
2829 | ||
2830 | /* If not in use then it is free to use. */ | |
2831 | if (!found) { | |
2832 | break; | |
2833 | } | |
2834 | ||
2835 | /* ID in use. Try next value. */ | |
2836 | dev->loop_id++; | |
2837 | ||
2838 | /* If wrap around. No free ID to use. */ | |
2839 | if (dev->loop_id == first_loop_id) { | |
2840 | dev->loop_id = FC_NO_LOOP_ID; | |
2841 | rval = QLA_FUNCTION_FAILED; | |
2842 | break; | |
2843 | } | |
2844 | } | |
2845 | ||
2846 | return (rval); | |
2847 | } | |
2848 | ||
2849 | /* | |
2850 | * qla2x00_device_resync | |
2851 | * Marks devices in the database that needs resynchronization. | |
2852 | * | |
2853 | * Input: | |
2854 | * ha = adapter block pointer. | |
2855 | * | |
2856 | * Context: | |
2857 | * Kernel context. | |
2858 | */ | |
2859 | static int | |
e315cd28 | 2860 | qla2x00_device_resync(scsi_qla_host_t *vha) |
1da177e4 LT |
2861 | { |
2862 | int rval; | |
1da177e4 LT |
2863 | uint32_t mask; |
2864 | fc_port_t *fcport; | |
2865 | uint32_t rscn_entry; | |
2866 | uint8_t rscn_out_iter; | |
2867 | uint8_t format; | |
2868 | port_id_t d_id; | |
2869 | ||
2870 | rval = QLA_RSCNS_HANDLED; | |
2871 | ||
e315cd28 AC |
2872 | while (vha->rscn_out_ptr != vha->rscn_in_ptr || |
2873 | vha->flags.rscn_queue_overflow) { | |
1da177e4 | 2874 | |
e315cd28 | 2875 | rscn_entry = vha->rscn_queue[vha->rscn_out_ptr]; |
1da177e4 LT |
2876 | format = MSB(MSW(rscn_entry)); |
2877 | d_id.b.domain = LSB(MSW(rscn_entry)); | |
2878 | d_id.b.area = MSB(LSW(rscn_entry)); | |
2879 | d_id.b.al_pa = LSB(LSW(rscn_entry)); | |
2880 | ||
2881 | DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = " | |
2882 | "[%02x/%02x%02x%02x].\n", | |
e315cd28 | 2883 | vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain, |
1da177e4 LT |
2884 | d_id.b.area, d_id.b.al_pa)); |
2885 | ||
e315cd28 AC |
2886 | vha->rscn_out_ptr++; |
2887 | if (vha->rscn_out_ptr == MAX_RSCN_COUNT) | |
2888 | vha->rscn_out_ptr = 0; | |
1da177e4 LT |
2889 | |
2890 | /* Skip duplicate entries. */ | |
e315cd28 AC |
2891 | for (rscn_out_iter = vha->rscn_out_ptr; |
2892 | !vha->flags.rscn_queue_overflow && | |
2893 | rscn_out_iter != vha->rscn_in_ptr; | |
1da177e4 LT |
2894 | rscn_out_iter = (rscn_out_iter == |
2895 | (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) { | |
2896 | ||
e315cd28 | 2897 | if (rscn_entry != vha->rscn_queue[rscn_out_iter]) |
1da177e4 LT |
2898 | break; |
2899 | ||
2900 | DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue " | |
e315cd28 | 2901 | "entry found at [%d].\n", vha->host_no, |
1da177e4 LT |
2902 | rscn_out_iter)); |
2903 | ||
e315cd28 | 2904 | vha->rscn_out_ptr = rscn_out_iter; |
1da177e4 LT |
2905 | } |
2906 | ||
2907 | /* Queue overflow, set switch default case. */ | |
e315cd28 | 2908 | if (vha->flags.rscn_queue_overflow) { |
1da177e4 | 2909 | DEBUG(printk("scsi(%ld): device_resync: rscn " |
e315cd28 | 2910 | "overflow.\n", vha->host_no)); |
1da177e4 LT |
2911 | |
2912 | format = 3; | |
e315cd28 | 2913 | vha->flags.rscn_queue_overflow = 0; |
1da177e4 LT |
2914 | } |
2915 | ||
2916 | switch (format) { | |
2917 | case 0: | |
1da177e4 LT |
2918 | mask = 0xffffff; |
2919 | break; | |
2920 | case 1: | |
2921 | mask = 0xffff00; | |
2922 | break; | |
2923 | case 2: | |
2924 | mask = 0xff0000; | |
2925 | break; | |
2926 | default: | |
2927 | mask = 0x0; | |
2928 | d_id.b24 = 0; | |
e315cd28 | 2929 | vha->rscn_out_ptr = vha->rscn_in_ptr; |
1da177e4 LT |
2930 | break; |
2931 | } | |
2932 | ||
2933 | rval = QLA_SUCCESS; | |
2934 | ||
e315cd28 | 2935 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2936 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || |
2937 | (fcport->d_id.b24 & mask) != d_id.b24 || | |
2938 | fcport->port_type == FCT_BROADCAST) | |
2939 | continue; | |
2940 | ||
2941 | if (atomic_read(&fcport->state) == FCS_ONLINE) { | |
2942 | if (format != 3 || | |
2943 | fcport->port_type != FCT_INITIATOR) { | |
e315cd28 | 2944 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 2945 | 0, 0); |
1da177e4 LT |
2946 | } |
2947 | } | |
1da177e4 LT |
2948 | } |
2949 | } | |
2950 | return (rval); | |
2951 | } | |
2952 | ||
2953 | /* | |
2954 | * qla2x00_fabric_dev_login | |
2955 | * Login fabric target device and update FC port database. | |
2956 | * | |
2957 | * Input: | |
2958 | * ha: adapter state pointer. | |
2959 | * fcport: port structure list pointer. | |
2960 | * next_loopid: contains value of a new loop ID that can be used | |
2961 | * by the next login attempt. | |
2962 | * | |
2963 | * Returns: | |
2964 | * qla2x00 local function return status code. | |
2965 | * | |
2966 | * Context: | |
2967 | * Kernel context. | |
2968 | */ | |
2969 | static int | |
e315cd28 | 2970 | qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
2971 | uint16_t *next_loopid) |
2972 | { | |
2973 | int rval; | |
2974 | int retry; | |
0107109e | 2975 | uint8_t opts; |
e315cd28 | 2976 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2977 | |
2978 | rval = QLA_SUCCESS; | |
2979 | retry = 0; | |
2980 | ||
e315cd28 | 2981 | rval = qla2x00_fabric_login(vha, fcport, next_loopid); |
1da177e4 | 2982 | if (rval == QLA_SUCCESS) { |
0107109e AV |
2983 | /* Send an ADISC to tape devices.*/ |
2984 | opts = 0; | |
2985 | if (fcport->flags & FCF_TAPE_PRESENT) | |
2986 | opts |= BIT_1; | |
e315cd28 | 2987 | rval = qla2x00_get_port_database(vha, fcport, opts); |
1da177e4 | 2988 | if (rval != QLA_SUCCESS) { |
e315cd28 | 2989 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
2990 | fcport->d_id.b.domain, fcport->d_id.b.area, |
2991 | fcport->d_id.b.al_pa); | |
e315cd28 | 2992 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 | 2993 | } else { |
e315cd28 | 2994 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
2995 | } |
2996 | } | |
2997 | ||
2998 | return (rval); | |
2999 | } | |
3000 | ||
3001 | /* | |
3002 | * qla2x00_fabric_login | |
3003 | * Issue fabric login command. | |
3004 | * | |
3005 | * Input: | |
3006 | * ha = adapter block pointer. | |
3007 | * device = pointer to FC device type structure. | |
3008 | * | |
3009 | * Returns: | |
3010 | * 0 - Login successfully | |
3011 | * 1 - Login failed | |
3012 | * 2 - Initiator device | |
3013 | * 3 - Fatal error | |
3014 | */ | |
3015 | int | |
e315cd28 | 3016 | qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3017 | uint16_t *next_loopid) |
3018 | { | |
3019 | int rval; | |
3020 | int retry; | |
3021 | uint16_t tmp_loopid; | |
3022 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 | 3023 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3024 | |
3025 | retry = 0; | |
3026 | tmp_loopid = 0; | |
3027 | ||
3028 | for (;;) { | |
3029 | DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x " | |
3030 | "for port %02x%02x%02x.\n", | |
e315cd28 | 3031 | vha->host_no, fcport->loop_id, fcport->d_id.b.domain, |
1da177e4 LT |
3032 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); |
3033 | ||
3034 | /* Login fcport on switch. */ | |
e315cd28 | 3035 | ha->isp_ops->fabric_login(vha, fcport->loop_id, |
1da177e4 LT |
3036 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3037 | fcport->d_id.b.al_pa, mb, BIT_0); | |
3038 | if (mb[0] == MBS_PORT_ID_USED) { | |
3039 | /* | |
3040 | * Device has another loop ID. The firmware team | |
0107109e AV |
3041 | * recommends the driver perform an implicit login with |
3042 | * the specified ID again. The ID we just used is save | |
3043 | * here so we return with an ID that can be tried by | |
3044 | * the next login. | |
1da177e4 LT |
3045 | */ |
3046 | retry++; | |
3047 | tmp_loopid = fcport->loop_id; | |
3048 | fcport->loop_id = mb[1]; | |
3049 | ||
3050 | DEBUG(printk("Fabric Login: port in use - next " | |
3051 | "loop id=0x%04x, port Id=%02x%02x%02x.\n", | |
3052 | fcport->loop_id, fcport->d_id.b.domain, | |
3053 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
3054 | ||
3055 | } else if (mb[0] == MBS_COMMAND_COMPLETE) { | |
3056 | /* | |
3057 | * Login succeeded. | |
3058 | */ | |
3059 | if (retry) { | |
3060 | /* A retry occurred before. */ | |
3061 | *next_loopid = tmp_loopid; | |
3062 | } else { | |
3063 | /* | |
3064 | * No retry occurred before. Just increment the | |
3065 | * ID value for next login. | |
3066 | */ | |
3067 | *next_loopid = (fcport->loop_id + 1); | |
3068 | } | |
3069 | ||
3070 | if (mb[1] & BIT_0) { | |
3071 | fcport->port_type = FCT_INITIATOR; | |
3072 | } else { | |
3073 | fcport->port_type = FCT_TARGET; | |
3074 | if (mb[1] & BIT_1) { | |
3075 | fcport->flags |= FCF_TAPE_PRESENT; | |
3076 | } | |
3077 | } | |
3078 | ||
ad3e0eda AV |
3079 | if (mb[10] & BIT_0) |
3080 | fcport->supported_classes |= FC_COS_CLASS2; | |
3081 | if (mb[10] & BIT_1) | |
3082 | fcport->supported_classes |= FC_COS_CLASS3; | |
3083 | ||
1da177e4 LT |
3084 | rval = QLA_SUCCESS; |
3085 | break; | |
3086 | } else if (mb[0] == MBS_LOOP_ID_USED) { | |
3087 | /* | |
3088 | * Loop ID already used, try next loop ID. | |
3089 | */ | |
3090 | fcport->loop_id++; | |
e315cd28 | 3091 | rval = qla2x00_find_new_loop_id(vha, fcport); |
1da177e4 LT |
3092 | if (rval != QLA_SUCCESS) { |
3093 | /* Ran out of loop IDs to use */ | |
3094 | break; | |
3095 | } | |
3096 | } else if (mb[0] == MBS_COMMAND_ERROR) { | |
3097 | /* | |
3098 | * Firmware possibly timed out during login. If NO | |
3099 | * retries are left to do then the device is declared | |
3100 | * dead. | |
3101 | */ | |
3102 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3103 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3104 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3105 | fcport->d_id.b.al_pa); | |
e315cd28 | 3106 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 LT |
3107 | |
3108 | rval = 1; | |
3109 | break; | |
3110 | } else { | |
3111 | /* | |
3112 | * unrecoverable / not handled error | |
3113 | */ | |
3114 | DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x " | |
fa2a1ce5 | 3115 | "loop_id=%x jiffies=%lx.\n", |
e315cd28 | 3116 | __func__, vha->host_no, mb[0], |
1da177e4 LT |
3117 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3118 | fcport->d_id.b.al_pa, fcport->loop_id, jiffies)); | |
3119 | ||
3120 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3121 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3122 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3123 | fcport->d_id.b.al_pa); | |
1da177e4 | 3124 | fcport->loop_id = FC_NO_LOOP_ID; |
0eedfcf0 | 3125 | fcport->login_retry = 0; |
1da177e4 LT |
3126 | |
3127 | rval = 3; | |
3128 | break; | |
3129 | } | |
3130 | } | |
3131 | ||
3132 | return (rval); | |
3133 | } | |
3134 | ||
3135 | /* | |
3136 | * qla2x00_local_device_login | |
3137 | * Issue local device login command. | |
3138 | * | |
3139 | * Input: | |
3140 | * ha = adapter block pointer. | |
3141 | * loop_id = loop id of device to login to. | |
3142 | * | |
3143 | * Returns (Where's the #define!!!!): | |
3144 | * 0 - Login successfully | |
3145 | * 1 - Login failed | |
3146 | * 3 - Fatal error | |
3147 | */ | |
3148 | int | |
e315cd28 | 3149 | qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) |
1da177e4 LT |
3150 | { |
3151 | int rval; | |
3152 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
3153 | ||
3154 | memset(mb, 0, sizeof(mb)); | |
e315cd28 | 3155 | rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); |
1da177e4 LT |
3156 | if (rval == QLA_SUCCESS) { |
3157 | /* Interrogate mailbox registers for any errors */ | |
3158 | if (mb[0] == MBS_COMMAND_ERROR) | |
3159 | rval = 1; | |
3160 | else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) | |
3161 | /* device not in PCB table */ | |
3162 | rval = 3; | |
3163 | } | |
3164 | ||
3165 | return (rval); | |
3166 | } | |
3167 | ||
3168 | /* | |
3169 | * qla2x00_loop_resync | |
3170 | * Resync with fibre channel devices. | |
3171 | * | |
3172 | * Input: | |
3173 | * ha = adapter block pointer. | |
3174 | * | |
3175 | * Returns: | |
3176 | * 0 = success | |
3177 | */ | |
3178 | int | |
e315cd28 | 3179 | qla2x00_loop_resync(scsi_qla_host_t *vha) |
1da177e4 | 3180 | { |
73208dfd | 3181 | int rval = QLA_SUCCESS; |
1da177e4 | 3182 | uint32_t wait_time; |
67c2e93a AC |
3183 | struct req_que *req; |
3184 | struct rsp_que *rsp; | |
3185 | ||
3186 | if (ql2xmultique_tag) | |
3187 | req = vha->hw->req_q_map[0]; | |
3188 | else | |
3189 | req = vha->req; | |
3190 | rsp = req->rsp; | |
1da177e4 | 3191 | |
e315cd28 AC |
3192 | atomic_set(&vha->loop_state, LOOP_UPDATE); |
3193 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
3194 | if (vha->flags.online) { | |
3195 | if (!(rval = qla2x00_fw_ready(vha))) { | |
1da177e4 LT |
3196 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3197 | wait_time = 256; | |
3198 | do { | |
e315cd28 | 3199 | atomic_set(&vha->loop_state, LOOP_UPDATE); |
1da177e4 | 3200 | |
0107109e | 3201 | /* Issue a marker after FW becomes ready. */ |
73208dfd AC |
3202 | qla2x00_marker(vha, req, rsp, 0, 0, |
3203 | MK_SYNC_ALL); | |
e315cd28 | 3204 | vha->marker_needed = 0; |
1da177e4 LT |
3205 | |
3206 | /* Remap devices on Loop. */ | |
e315cd28 | 3207 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 | 3208 | |
e315cd28 | 3209 | qla2x00_configure_loop(vha); |
1da177e4 | 3210 | wait_time--; |
e315cd28 AC |
3211 | } while (!atomic_read(&vha->loop_down_timer) && |
3212 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3213 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3214 | &vha->dpc_flags))); | |
1da177e4 | 3215 | } |
1da177e4 LT |
3216 | } |
3217 | ||
e315cd28 | 3218 | if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) |
1da177e4 | 3219 | return (QLA_FUNCTION_FAILED); |
1da177e4 | 3220 | |
e315cd28 | 3221 | if (rval) |
1da177e4 | 3222 | DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__)); |
1da177e4 LT |
3223 | |
3224 | return (rval); | |
3225 | } | |
3226 | ||
d97994dc | 3227 | void |
e315cd28 | 3228 | qla2x00_update_fcports(scsi_qla_host_t *vha) |
d97994dc | 3229 | { |
3230 | fc_port_t *fcport; | |
3231 | ||
3232 | /* Go with deferred removal of rport references. */ | |
e315cd28 AC |
3233 | list_for_each_entry(fcport, &vha->vp_fcports, list) |
3234 | if (fcport && fcport->drport && | |
c9c5ced9 | 3235 | atomic_read(&fcport->state) != FCS_UNCONFIGURED) |
d97994dc | 3236 | qla2x00_rport_del(fcport); |
3237 | } | |
3238 | ||
1da177e4 LT |
3239 | /* |
3240 | * qla2x00_abort_isp | |
3241 | * Resets ISP and aborts all outstanding commands. | |
3242 | * | |
3243 | * Input: | |
3244 | * ha = adapter block pointer. | |
3245 | * | |
3246 | * Returns: | |
3247 | * 0 = success | |
3248 | */ | |
3249 | int | |
e315cd28 | 3250 | qla2x00_abort_isp(scsi_qla_host_t *vha) |
1da177e4 | 3251 | { |
476e8978 | 3252 | int rval; |
1da177e4 | 3253 | uint8_t status = 0; |
e315cd28 AC |
3254 | struct qla_hw_data *ha = vha->hw; |
3255 | struct scsi_qla_host *vp; | |
ee546b6e | 3256 | struct scsi_qla_host *tvp; |
73208dfd | 3257 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 | 3258 | |
e315cd28 AC |
3259 | if (vha->flags.online) { |
3260 | vha->flags.online = 0; | |
2533cf67 | 3261 | ha->flags.chip_reset_done = 0; |
e315cd28 | 3262 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
e5f5f6f7 | 3263 | ha->qla_stats.total_isp_aborts++; |
1da177e4 LT |
3264 | |
3265 | qla_printk(KERN_INFO, ha, | |
3266 | "Performing ISP error recovery - ha= %p.\n", ha); | |
e315cd28 AC |
3267 | ha->isp_ops->reset_chip(vha); |
3268 | ||
3269 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
3270 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
3271 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
3272 | qla2x00_mark_all_devices_lost(vha, 0); | |
ee546b6e | 3273 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) |
e315cd28 | 3274 | qla2x00_mark_all_devices_lost(vp, 0); |
1da177e4 | 3275 | } else { |
e315cd28 AC |
3276 | if (!atomic_read(&vha->loop_down_timer)) |
3277 | atomic_set(&vha->loop_down_timer, | |
1da177e4 LT |
3278 | LOOP_DOWN_TIME); |
3279 | } | |
3280 | ||
1da177e4 | 3281 | /* Requeue all commands in outstanding command list. */ |
e315cd28 | 3282 | qla2x00_abort_all_cmds(vha, DID_RESET << 16); |
1da177e4 | 3283 | |
73208dfd | 3284 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 3285 | |
e315cd28 | 3286 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 3287 | |
e315cd28 AC |
3288 | if (!qla2x00_restart_isp(vha)) { |
3289 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
1da177e4 | 3290 | |
e315cd28 | 3291 | if (!atomic_read(&vha->loop_down_timer)) { |
1da177e4 LT |
3292 | /* |
3293 | * Issue marker command only when we are going | |
3294 | * to start the I/O . | |
3295 | */ | |
e315cd28 | 3296 | vha->marker_needed = 1; |
1da177e4 LT |
3297 | } |
3298 | ||
e315cd28 | 3299 | vha->flags.online = 1; |
1da177e4 | 3300 | |
fd34f556 | 3301 | ha->isp_ops->enable_intrs(ha); |
1da177e4 | 3302 | |
fa2a1ce5 | 3303 | ha->isp_abort_cnt = 0; |
e315cd28 | 3304 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
476e8978 | 3305 | |
df613b96 AV |
3306 | if (ha->fce) { |
3307 | ha->flags.fce_enabled = 1; | |
3308 | memset(ha->fce, 0, | |
3309 | fce_calc_size(ha->fce_bufs)); | |
e315cd28 | 3310 | rval = qla2x00_enable_fce_trace(vha, |
df613b96 AV |
3311 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, |
3312 | &ha->fce_bufs); | |
3313 | if (rval) { | |
3314 | qla_printk(KERN_WARNING, ha, | |
3315 | "Unable to reinitialize FCE " | |
3316 | "(%d).\n", rval); | |
3317 | ha->flags.fce_enabled = 0; | |
3318 | } | |
3319 | } | |
436a7b11 AV |
3320 | |
3321 | if (ha->eft) { | |
3322 | memset(ha->eft, 0, EFT_SIZE); | |
e315cd28 | 3323 | rval = qla2x00_enable_eft_trace(vha, |
436a7b11 AV |
3324 | ha->eft_dma, EFT_NUM_BUFFERS); |
3325 | if (rval) { | |
3326 | qla_printk(KERN_WARNING, ha, | |
3327 | "Unable to reinitialize EFT " | |
3328 | "(%d).\n", rval); | |
3329 | } | |
3330 | } | |
1da177e4 | 3331 | } else { /* failed the ISP abort */ |
e315cd28 AC |
3332 | vha->flags.online = 1; |
3333 | if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
1da177e4 LT |
3334 | if (ha->isp_abort_cnt == 0) { |
3335 | qla_printk(KERN_WARNING, ha, | |
3336 | "ISP error recovery failed - " | |
3337 | "board disabled\n"); | |
fa2a1ce5 | 3338 | /* |
1da177e4 LT |
3339 | * The next call disables the board |
3340 | * completely. | |
3341 | */ | |
e315cd28 AC |
3342 | ha->isp_ops->reset_adapter(vha); |
3343 | vha->flags.online = 0; | |
1da177e4 | 3344 | clear_bit(ISP_ABORT_RETRY, |
e315cd28 | 3345 | &vha->dpc_flags); |
1da177e4 LT |
3346 | status = 0; |
3347 | } else { /* schedule another ISP abort */ | |
3348 | ha->isp_abort_cnt--; | |
3349 | DEBUG(printk("qla%ld: ISP abort - " | |
0107109e | 3350 | "retry remaining %d\n", |
e315cd28 | 3351 | vha->host_no, ha->isp_abort_cnt)); |
1da177e4 LT |
3352 | status = 1; |
3353 | } | |
3354 | } else { | |
3355 | ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; | |
3356 | DEBUG(printk("qla2x00(%ld): ISP error recovery " | |
3357 | "- retrying (%d) more times\n", | |
e315cd28 AC |
3358 | vha->host_no, ha->isp_abort_cnt)); |
3359 | set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
1da177e4 LT |
3360 | status = 1; |
3361 | } | |
3362 | } | |
fa2a1ce5 | 3363 | |
1da177e4 LT |
3364 | } |
3365 | ||
e315cd28 AC |
3366 | if (!status) { |
3367 | DEBUG(printk(KERN_INFO | |
3368 | "qla2x00_abort_isp(%ld): succeeded.\n", | |
3369 | vha->host_no)); | |
ee546b6e | 3370 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3371 | if (vp->vp_idx) |
3372 | qla2x00_vp_abort_isp(vp); | |
3373 | } | |
3374 | } else { | |
1da177e4 LT |
3375 | qla_printk(KERN_INFO, ha, |
3376 | "qla2x00_abort_isp: **** FAILED ****\n"); | |
1da177e4 LT |
3377 | } |
3378 | ||
3379 | return(status); | |
3380 | } | |
3381 | ||
3382 | /* | |
3383 | * qla2x00_restart_isp | |
3384 | * restarts the ISP after a reset | |
3385 | * | |
3386 | * Input: | |
3387 | * ha = adapter block pointer. | |
3388 | * | |
3389 | * Returns: | |
3390 | * 0 = success | |
3391 | */ | |
3392 | static int | |
e315cd28 | 3393 | qla2x00_restart_isp(scsi_qla_host_t *vha) |
1da177e4 | 3394 | { |
c6b2fca8 | 3395 | int status = 0; |
1da177e4 | 3396 | uint32_t wait_time; |
e315cd28 | 3397 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
3398 | struct req_que *req = ha->req_q_map[0]; |
3399 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
1da177e4 LT |
3400 | |
3401 | /* If firmware needs to be loaded */ | |
e315cd28 AC |
3402 | if (qla2x00_isp_firmware(vha)) { |
3403 | vha->flags.online = 0; | |
3404 | status = ha->isp_ops->chip_diag(vha); | |
3405 | if (!status) | |
3406 | status = qla2x00_setup_chip(vha); | |
1da177e4 LT |
3407 | } |
3408 | ||
e315cd28 AC |
3409 | if (!status && !(status = qla2x00_init_rings(vha))) { |
3410 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
2533cf67 | 3411 | ha->flags.chip_reset_done = 1; |
73208dfd AC |
3412 | /* Initialize the queues in use */ |
3413 | qla25xx_init_queues(ha); | |
3414 | ||
e315cd28 AC |
3415 | status = qla2x00_fw_ready(vha); |
3416 | if (!status) { | |
1da177e4 | 3417 | DEBUG(printk("%s(): Start configure loop, " |
744f11fd | 3418 | "status = %d\n", __func__, status)); |
0107109e AV |
3419 | |
3420 | /* Issue a marker after FW becomes ready. */ | |
73208dfd | 3421 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
0107109e | 3422 | |
e315cd28 | 3423 | vha->flags.online = 1; |
1da177e4 LT |
3424 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3425 | wait_time = 256; | |
3426 | do { | |
e315cd28 AC |
3427 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
3428 | qla2x00_configure_loop(vha); | |
1da177e4 | 3429 | wait_time--; |
e315cd28 AC |
3430 | } while (!atomic_read(&vha->loop_down_timer) && |
3431 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3432 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3433 | &vha->dpc_flags))); | |
1da177e4 LT |
3434 | } |
3435 | ||
3436 | /* if no cable then assume it's good */ | |
e315cd28 | 3437 | if ((vha->device_flags & DFLG_NO_CABLE)) |
1da177e4 LT |
3438 | status = 0; |
3439 | ||
3440 | DEBUG(printk("%s(): Configure loop done, status = 0x%x\n", | |
3441 | __func__, | |
744f11fd | 3442 | status)); |
1da177e4 LT |
3443 | } |
3444 | return (status); | |
3445 | } | |
3446 | ||
73208dfd AC |
3447 | static int |
3448 | qla25xx_init_queues(struct qla_hw_data *ha) | |
3449 | { | |
3450 | struct rsp_que *rsp = NULL; | |
3451 | struct req_que *req = NULL; | |
3452 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
3453 | int ret = -1; | |
3454 | int i; | |
3455 | ||
2afa19a9 | 3456 | for (i = 1; i < ha->max_rsp_queues; i++) { |
73208dfd AC |
3457 | rsp = ha->rsp_q_map[i]; |
3458 | if (rsp) { | |
3459 | rsp->options &= ~BIT_0; | |
618a7523 | 3460 | ret = qla25xx_init_rsp_que(base_vha, rsp); |
73208dfd AC |
3461 | if (ret != QLA_SUCCESS) |
3462 | DEBUG2_17(printk(KERN_WARNING | |
3463 | "%s Rsp que:%d init failed\n", __func__, | |
3464 | rsp->id)); | |
3465 | else | |
3466 | DEBUG2_17(printk(KERN_INFO | |
3467 | "%s Rsp que:%d inited\n", __func__, | |
3468 | rsp->id)); | |
3469 | } | |
2afa19a9 AC |
3470 | } |
3471 | for (i = 1; i < ha->max_req_queues; i++) { | |
73208dfd AC |
3472 | req = ha->req_q_map[i]; |
3473 | if (req) { | |
29bdccbe | 3474 | /* Clear outstanding commands array. */ |
73208dfd | 3475 | req->options &= ~BIT_0; |
618a7523 | 3476 | ret = qla25xx_init_req_que(base_vha, req); |
73208dfd AC |
3477 | if (ret != QLA_SUCCESS) |
3478 | DEBUG2_17(printk(KERN_WARNING | |
3479 | "%s Req que:%d init failed\n", __func__, | |
3480 | req->id)); | |
3481 | else | |
3482 | DEBUG2_17(printk(KERN_WARNING | |
29bdccbe | 3483 | "%s Req que:%d inited\n", __func__, |
73208dfd AC |
3484 | req->id)); |
3485 | } | |
3486 | } | |
3487 | return ret; | |
3488 | } | |
3489 | ||
1da177e4 LT |
3490 | /* |
3491 | * qla2x00_reset_adapter | |
3492 | * Reset adapter. | |
3493 | * | |
3494 | * Input: | |
3495 | * ha = adapter block pointer. | |
3496 | */ | |
abbd8870 | 3497 | void |
e315cd28 | 3498 | qla2x00_reset_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
3499 | { |
3500 | unsigned long flags = 0; | |
e315cd28 | 3501 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 3502 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 3503 | |
e315cd28 | 3504 | vha->flags.online = 0; |
fd34f556 | 3505 | ha->isp_ops->disable_intrs(ha); |
1da177e4 | 3506 | |
1da177e4 LT |
3507 | spin_lock_irqsave(&ha->hardware_lock, flags); |
3508 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
3509 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
3510 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
3511 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
3512 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
3513 | } | |
0107109e AV |
3514 | |
3515 | void | |
e315cd28 | 3516 | qla24xx_reset_adapter(scsi_qla_host_t *vha) |
0107109e AV |
3517 | { |
3518 | unsigned long flags = 0; | |
e315cd28 | 3519 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
3520 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
3521 | ||
e315cd28 | 3522 | vha->flags.online = 0; |
fd34f556 | 3523 | ha->isp_ops->disable_intrs(ha); |
0107109e AV |
3524 | |
3525 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3526 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
3527 | RD_REG_DWORD(®->hccr); | |
3528 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
3529 | RD_REG_DWORD(®->hccr); | |
3530 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
09ff36d3 AV |
3531 | |
3532 | if (IS_NOPOLLING_TYPE(ha)) | |
3533 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
3534 | } |
3535 | ||
4e08df3f DM |
3536 | /* On sparc systems, obtain port and node WWN from firmware |
3537 | * properties. | |
3538 | */ | |
e315cd28 AC |
3539 | static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, |
3540 | struct nvram_24xx *nv) | |
4e08df3f DM |
3541 | { |
3542 | #ifdef CONFIG_SPARC | |
e315cd28 | 3543 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 3544 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
3545 | struct device_node *dp = pci_device_to_OF_node(pdev); |
3546 | const u8 *val; | |
4e08df3f DM |
3547 | int len; |
3548 | ||
3549 | val = of_get_property(dp, "port-wwn", &len); | |
3550 | if (val && len >= WWN_SIZE) | |
3551 | memcpy(nv->port_name, val, WWN_SIZE); | |
3552 | ||
3553 | val = of_get_property(dp, "node-wwn", &len); | |
3554 | if (val && len >= WWN_SIZE) | |
3555 | memcpy(nv->node_name, val, WWN_SIZE); | |
3556 | #endif | |
3557 | } | |
3558 | ||
0107109e | 3559 | int |
e315cd28 | 3560 | qla24xx_nvram_config(scsi_qla_host_t *vha) |
0107109e | 3561 | { |
4e08df3f | 3562 | int rval; |
0107109e AV |
3563 | struct init_cb_24xx *icb; |
3564 | struct nvram_24xx *nv; | |
3565 | uint32_t *dptr; | |
3566 | uint8_t *dptr1, *dptr2; | |
3567 | uint32_t chksum; | |
3568 | uint16_t cnt; | |
e315cd28 | 3569 | struct qla_hw_data *ha = vha->hw; |
0107109e | 3570 | |
4e08df3f | 3571 | rval = QLA_SUCCESS; |
0107109e | 3572 | icb = (struct init_cb_24xx *)ha->init_cb; |
281afe19 | 3573 | nv = ha->nvram; |
0107109e AV |
3574 | |
3575 | /* Determine NVRAM starting address. */ | |
e5b68a61 AC |
3576 | if (ha->flags.port0) { |
3577 | ha->nvram_base = FA_NVRAM_FUNC0_ADDR; | |
3578 | ha->vpd_base = FA_NVRAM_VPD0_ADDR; | |
3579 | } else { | |
0107109e | 3580 | ha->nvram_base = FA_NVRAM_FUNC1_ADDR; |
6f641790 | 3581 | ha->vpd_base = FA_NVRAM_VPD1_ADDR; |
3582 | } | |
e5b68a61 AC |
3583 | ha->nvram_size = sizeof(struct nvram_24xx); |
3584 | ha->vpd_size = FA_NVRAM_VPD_SIZE; | |
0107109e | 3585 | |
281afe19 SJ |
3586 | /* Get VPD data into cache */ |
3587 | ha->vpd = ha->nvram + VPD_OFFSET; | |
e315cd28 | 3588 | ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, |
281afe19 SJ |
3589 | ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); |
3590 | ||
3591 | /* Get NVRAM data into cache and calculate checksum. */ | |
0107109e | 3592 | dptr = (uint32_t *)nv; |
e315cd28 | 3593 | ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, |
0107109e AV |
3594 | ha->nvram_size); |
3595 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) | |
3596 | chksum += le32_to_cpu(*dptr++); | |
3597 | ||
7640335e | 3598 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
281afe19 | 3599 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
0107109e AV |
3600 | |
3601 | /* Bad NVRAM data, set defaults parameters. */ | |
3602 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
3603 | || nv->id[3] != ' ' || | |
3604 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
3605 | /* Reset NVRAM data. */ | |
3606 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
3607 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
3608 | le16_to_cpu(nv->nvram_version)); | |
4e08df3f DM |
3609 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " |
3610 | "invalid -- WWPN) defaults.\n"); | |
3611 | ||
3612 | /* | |
3613 | * Set default initialization control block. | |
3614 | */ | |
3615 | memset(nv, 0, ha->nvram_size); | |
3616 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
3617 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
3618 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
3619 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
3620 | nv->exchange_count = __constant_cpu_to_le16(0); | |
3621 | nv->hard_address = __constant_cpu_to_le16(124); | |
3622 | nv->port_name[0] = 0x21; | |
e5b68a61 | 3623 | nv->port_name[1] = 0x00 + ha->port_no; |
4e08df3f DM |
3624 | nv->port_name[2] = 0x00; |
3625 | nv->port_name[3] = 0xe0; | |
3626 | nv->port_name[4] = 0x8b; | |
3627 | nv->port_name[5] = 0x1c; | |
3628 | nv->port_name[6] = 0x55; | |
3629 | nv->port_name[7] = 0x86; | |
3630 | nv->node_name[0] = 0x20; | |
3631 | nv->node_name[1] = 0x00; | |
3632 | nv->node_name[2] = 0x00; | |
3633 | nv->node_name[3] = 0xe0; | |
3634 | nv->node_name[4] = 0x8b; | |
3635 | nv->node_name[5] = 0x1c; | |
3636 | nv->node_name[6] = 0x55; | |
3637 | nv->node_name[7] = 0x86; | |
e315cd28 | 3638 | qla24xx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
3639 | nv->login_retry_count = __constant_cpu_to_le16(8); |
3640 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
3641 | nv->login_timeout = __constant_cpu_to_le16(0); | |
3642 | nv->firmware_options_1 = | |
3643 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
3644 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
3645 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
3646 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
3647 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
3648 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
3649 | nv->reset_delay = 5; | |
3650 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
3651 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
3652 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
3653 | ||
3654 | rval = 1; | |
0107109e AV |
3655 | } |
3656 | ||
3657 | /* Reset Initialization control block */ | |
e315cd28 | 3658 | memset(icb, 0, ha->init_cb_size); |
0107109e AV |
3659 | |
3660 | /* Copy 1st segment. */ | |
3661 | dptr1 = (uint8_t *)icb; | |
3662 | dptr2 = (uint8_t *)&nv->version; | |
3663 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
3664 | while (cnt--) | |
3665 | *dptr1++ = *dptr2++; | |
3666 | ||
3667 | icb->login_retry_count = nv->login_retry_count; | |
3ea66e28 | 3668 | icb->link_down_on_nos = nv->link_down_on_nos; |
0107109e AV |
3669 | |
3670 | /* Copy 2nd segment. */ | |
3671 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
3672 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
3673 | cnt = (uint8_t *)&icb->reserved_3 - | |
3674 | (uint8_t *)&icb->interrupt_delay_timer; | |
3675 | while (cnt--) | |
3676 | *dptr1++ = *dptr2++; | |
3677 | ||
3678 | /* | |
3679 | * Setup driver NVRAM options. | |
3680 | */ | |
e315cd28 | 3681 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), |
9bb9fcf2 | 3682 | "QLA2462"); |
0107109e | 3683 | |
5341e868 AV |
3684 | /* Use alternate WWN? */ |
3685 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
3686 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
3687 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
3688 | } | |
3689 | ||
0107109e | 3690 | /* Prepare nodename */ |
fd0e7e4d | 3691 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { |
0107109e AV |
3692 | /* |
3693 | * Firmware will apply the following mask if the nodename was | |
3694 | * not provided. | |
3695 | */ | |
3696 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
3697 | icb->node_name[0] &= 0xF0; | |
3698 | } | |
3699 | ||
3700 | /* Set host adapter parameters. */ | |
3701 | ha->flags.disable_risc_code_load = 0; | |
0c8c39af AV |
3702 | ha->flags.enable_lip_reset = 0; |
3703 | ha->flags.enable_lip_full_login = | |
3704 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
3705 | ha->flags.enable_target_reset = | |
3706 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
0107109e | 3707 | ha->flags.enable_led_scheme = 0; |
d4c760c2 | 3708 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; |
0107109e | 3709 | |
fd0e7e4d AV |
3710 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & |
3711 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
0107109e AV |
3712 | |
3713 | memcpy(ha->fw_seriallink_options24, nv->seriallink_options, | |
3714 | sizeof(ha->fw_seriallink_options24)); | |
3715 | ||
3716 | /* save HBA serial number */ | |
3717 | ha->serial0 = icb->port_name[5]; | |
3718 | ha->serial1 = icb->port_name[6]; | |
3719 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
3720 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
3721 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
0107109e | 3722 | |
bc8fb3cb | 3723 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); |
3724 | ||
0107109e AV |
3725 | ha->retry_count = le16_to_cpu(nv->login_retry_count); |
3726 | ||
3727 | /* Set minimum login_timeout to 4 seconds. */ | |
3728 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
3729 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
3730 | if (le16_to_cpu(nv->login_timeout) < 4) | |
3731 | nv->login_timeout = __constant_cpu_to_le16(4); | |
3732 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
c6852c4c | 3733 | icb->login_timeout = nv->login_timeout; |
0107109e | 3734 | |
00a537b8 AV |
3735 | /* Set minimum RATOV to 100 tenths of a second. */ |
3736 | ha->r_a_tov = 100; | |
0107109e AV |
3737 | |
3738 | ha->loop_reset_delay = nv->reset_delay; | |
3739 | ||
3740 | /* Link Down Timeout = 0: | |
3741 | * | |
3742 | * When Port Down timer expires we will start returning | |
3743 | * I/O's to OS with "DID_NO_CONNECT". | |
3744 | * | |
3745 | * Link Down Timeout != 0: | |
3746 | * | |
3747 | * The driver waits for the link to come up after link down | |
3748 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
3749 | */ | |
3750 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
3751 | ha->loop_down_abort_time = | |
3752 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
3753 | } else { | |
3754 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
3755 | ha->loop_down_abort_time = | |
3756 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
3757 | } | |
3758 | ||
3759 | /* Need enough time to try and get the port back. */ | |
3760 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
3761 | if (qlport_down_retry) | |
3762 | ha->port_down_retry_count = qlport_down_retry; | |
3763 | ||
3764 | /* Set login_retry_count */ | |
3765 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
3766 | if (ha->port_down_retry_count == | |
3767 | le16_to_cpu(nv->port_down_retry_count) && | |
3768 | ha->port_down_retry_count > 3) | |
3769 | ha->login_retry_count = ha->port_down_retry_count; | |
3770 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
3771 | ha->login_retry_count = ha->port_down_retry_count; | |
3772 | if (ql2xloginretrycount) | |
3773 | ha->login_retry_count = ql2xloginretrycount; | |
3774 | ||
4fdfefe5 | 3775 | /* Enable ZIO. */ |
e315cd28 | 3776 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
3777 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & |
3778 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
3779 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
3780 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
3781 | } | |
3782 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
3783 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
e315cd28 | 3784 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 3785 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d | 3786 | ha->zio_mode = QLA_ZIO_MODE_6; |
3787 | ||
4fdfefe5 | 3788 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay " |
e315cd28 | 3789 | "(%d us).\n", vha->host_no, ha->zio_mode, |
4fdfefe5 AV |
3790 | ha->zio_timer * 100)); |
3791 | qla_printk(KERN_INFO, ha, | |
3792 | "ZIO mode %d enabled; timer delay (%d us).\n", | |
3793 | ha->zio_mode, ha->zio_timer * 100); | |
3794 | ||
3795 | icb->firmware_options_2 |= cpu_to_le32( | |
3796 | (uint32_t)ha->zio_mode); | |
3797 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
e315cd28 | 3798 | vha->flags.process_response_queue = 1; |
4fdfefe5 AV |
3799 | } |
3800 | ||
4e08df3f DM |
3801 | if (rval) { |
3802 | DEBUG2_3(printk(KERN_WARNING | |
e315cd28 | 3803 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); |
4e08df3f DM |
3804 | } |
3805 | return (rval); | |
0107109e AV |
3806 | } |
3807 | ||
413975a0 | 3808 | static int |
cbc8eb67 AV |
3809 | qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, |
3810 | uint32_t faddr) | |
d1c61909 | 3811 | { |
73208dfd | 3812 | int rval = QLA_SUCCESS; |
d1c61909 | 3813 | int segments, fragment; |
d1c61909 AV |
3814 | uint32_t *dcode, dlen; |
3815 | uint32_t risc_addr; | |
3816 | uint32_t risc_size; | |
3817 | uint32_t i; | |
e315cd28 | 3818 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 3819 | struct req_que *req = ha->req_q_map[0]; |
eaac30be AV |
3820 | |
3821 | qla_printk(KERN_INFO, ha, | |
cbc8eb67 | 3822 | "FW: Loading from flash (%x)...\n", faddr); |
eaac30be | 3823 | |
d1c61909 AV |
3824 | rval = QLA_SUCCESS; |
3825 | ||
3826 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 3827 | dcode = (uint32_t *)req->ring; |
d1c61909 AV |
3828 | *srisc_addr = 0; |
3829 | ||
3830 | /* Validate firmware image by checking version. */ | |
e315cd28 | 3831 | qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); |
d1c61909 AV |
3832 | for (i = 0; i < 4; i++) |
3833 | dcode[i] = be32_to_cpu(dcode[i]); | |
3834 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
3835 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
3836 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
3837 | dcode[3] == 0)) { | |
3838 | qla_printk(KERN_WARNING, ha, | |
3839 | "Unable to verify integrity of flash firmware image!\n"); | |
3840 | qla_printk(KERN_WARNING, ha, | |
3841 | "Firmware data: %08x %08x %08x %08x!\n", dcode[0], | |
3842 | dcode[1], dcode[2], dcode[3]); | |
3843 | ||
3844 | return QLA_FUNCTION_FAILED; | |
3845 | } | |
3846 | ||
3847 | while (segments && rval == QLA_SUCCESS) { | |
3848 | /* Read segment's load information. */ | |
e315cd28 | 3849 | qla24xx_read_flash_data(vha, dcode, faddr, 4); |
d1c61909 AV |
3850 | |
3851 | risc_addr = be32_to_cpu(dcode[2]); | |
3852 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
3853 | risc_size = be32_to_cpu(dcode[3]); | |
3854 | ||
3855 | fragment = 0; | |
3856 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
3857 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
3858 | if (dlen > risc_size) | |
3859 | dlen = risc_size; | |
3860 | ||
3861 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
3862 | "addr %x, number of dwords 0x%x, offset 0x%x.\n", | |
e315cd28 | 3863 | vha->host_no, risc_addr, dlen, faddr)); |
d1c61909 | 3864 | |
e315cd28 | 3865 | qla24xx_read_flash_data(vha, dcode, faddr, dlen); |
d1c61909 AV |
3866 | for (i = 0; i < dlen; i++) |
3867 | dcode[i] = swab32(dcode[i]); | |
3868 | ||
73208dfd | 3869 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
d1c61909 AV |
3870 | dlen); |
3871 | if (rval) { | |
3872 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 3873 | "segment %d of firmware\n", vha->host_no, |
d1c61909 AV |
3874 | fragment)); |
3875 | qla_printk(KERN_WARNING, ha, | |
3876 | "[ERROR] Failed to load segment %d of " | |
3877 | "firmware\n", fragment); | |
3878 | break; | |
3879 | } | |
3880 | ||
3881 | faddr += dlen; | |
3882 | risc_addr += dlen; | |
3883 | risc_size -= dlen; | |
3884 | fragment++; | |
3885 | } | |
3886 | ||
3887 | /* Next segment. */ | |
3888 | segments--; | |
3889 | } | |
3890 | ||
3891 | return rval; | |
3892 | } | |
3893 | ||
d1c61909 AV |
3894 | #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/" |
3895 | ||
0107109e | 3896 | int |
e315cd28 | 3897 | qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) |
5433383e AV |
3898 | { |
3899 | int rval; | |
3900 | int i, fragment; | |
3901 | uint16_t *wcode, *fwcode; | |
3902 | uint32_t risc_addr, risc_size, fwclen, wlen, *seg; | |
3903 | struct fw_blob *blob; | |
e315cd28 | 3904 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 3905 | struct req_que *req = ha->req_q_map[0]; |
5433383e AV |
3906 | |
3907 | /* Load firmware blob. */ | |
e315cd28 | 3908 | blob = qla2x00_request_firmware(vha); |
5433383e AV |
3909 | if (!blob) { |
3910 | qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n"); | |
d1c61909 AV |
3911 | qla_printk(KERN_ERR, ha, "Firmware images can be retrieved " |
3912 | "from: " QLA_FW_URL ".\n"); | |
5433383e AV |
3913 | return QLA_FUNCTION_FAILED; |
3914 | } | |
3915 | ||
3916 | rval = QLA_SUCCESS; | |
3917 | ||
73208dfd | 3918 | wcode = (uint16_t *)req->ring; |
5433383e AV |
3919 | *srisc_addr = 0; |
3920 | fwcode = (uint16_t *)blob->fw->data; | |
3921 | fwclen = 0; | |
3922 | ||
3923 | /* Validate firmware image by checking version. */ | |
3924 | if (blob->fw->size < 8 * sizeof(uint16_t)) { | |
3925 | qla_printk(KERN_WARNING, ha, | |
3926 | "Unable to verify integrity of firmware image (%Zd)!\n", | |
3927 | blob->fw->size); | |
3928 | goto fail_fw_integrity; | |
3929 | } | |
3930 | for (i = 0; i < 4; i++) | |
3931 | wcode[i] = be16_to_cpu(fwcode[i + 4]); | |
3932 | if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && | |
3933 | wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && | |
3934 | wcode[2] == 0 && wcode[3] == 0)) { | |
3935 | qla_printk(KERN_WARNING, ha, | |
3936 | "Unable to verify integrity of firmware image!\n"); | |
3937 | qla_printk(KERN_WARNING, ha, | |
3938 | "Firmware data: %04x %04x %04x %04x!\n", wcode[0], | |
3939 | wcode[1], wcode[2], wcode[3]); | |
3940 | goto fail_fw_integrity; | |
3941 | } | |
3942 | ||
3943 | seg = blob->segs; | |
3944 | while (*seg && rval == QLA_SUCCESS) { | |
3945 | risc_addr = *seg; | |
3946 | *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; | |
3947 | risc_size = be16_to_cpu(fwcode[3]); | |
3948 | ||
3949 | /* Validate firmware image size. */ | |
3950 | fwclen += risc_size * sizeof(uint16_t); | |
3951 | if (blob->fw->size < fwclen) { | |
3952 | qla_printk(KERN_WARNING, ha, | |
3953 | "Unable to verify integrity of firmware image " | |
3954 | "(%Zd)!\n", blob->fw->size); | |
3955 | goto fail_fw_integrity; | |
3956 | } | |
3957 | ||
3958 | fragment = 0; | |
3959 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
3960 | wlen = (uint16_t)(ha->fw_transfer_size >> 1); | |
3961 | if (wlen > risc_size) | |
3962 | wlen = risc_size; | |
3963 | ||
3964 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
e315cd28 | 3965 | "addr %x, number of words 0x%x.\n", vha->host_no, |
5433383e AV |
3966 | risc_addr, wlen)); |
3967 | ||
3968 | for (i = 0; i < wlen; i++) | |
3969 | wcode[i] = swab16(fwcode[i]); | |
3970 | ||
73208dfd | 3971 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
5433383e AV |
3972 | wlen); |
3973 | if (rval) { | |
3974 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 3975 | "segment %d of firmware\n", vha->host_no, |
5433383e AV |
3976 | fragment)); |
3977 | qla_printk(KERN_WARNING, ha, | |
3978 | "[ERROR] Failed to load segment %d of " | |
3979 | "firmware\n", fragment); | |
3980 | break; | |
3981 | } | |
3982 | ||
3983 | fwcode += wlen; | |
3984 | risc_addr += wlen; | |
3985 | risc_size -= wlen; | |
3986 | fragment++; | |
3987 | } | |
3988 | ||
3989 | /* Next segment. */ | |
3990 | seg++; | |
3991 | } | |
3992 | return rval; | |
3993 | ||
3994 | fail_fw_integrity: | |
3995 | return QLA_FUNCTION_FAILED; | |
3996 | } | |
3997 | ||
eaac30be AV |
3998 | static int |
3999 | qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
0107109e AV |
4000 | { |
4001 | int rval; | |
4002 | int segments, fragment; | |
4003 | uint32_t *dcode, dlen; | |
4004 | uint32_t risc_addr; | |
4005 | uint32_t risc_size; | |
4006 | uint32_t i; | |
5433383e | 4007 | struct fw_blob *blob; |
0107109e | 4008 | uint32_t *fwcode, fwclen; |
e315cd28 | 4009 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4010 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 4011 | |
5433383e | 4012 | /* Load firmware blob. */ |
e315cd28 | 4013 | blob = qla2x00_request_firmware(vha); |
5433383e AV |
4014 | if (!blob) { |
4015 | qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n"); | |
d1c61909 AV |
4016 | qla_printk(KERN_ERR, ha, "Firmware images can be retrieved " |
4017 | "from: " QLA_FW_URL ".\n"); | |
4018 | ||
eaac30be | 4019 | return QLA_FUNCTION_FAILED; |
0107109e AV |
4020 | } |
4021 | ||
eaac30be AV |
4022 | qla_printk(KERN_INFO, ha, |
4023 | "FW: Loading via request-firmware...\n"); | |
4024 | ||
0107109e AV |
4025 | rval = QLA_SUCCESS; |
4026 | ||
4027 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4028 | dcode = (uint32_t *)req->ring; |
0107109e | 4029 | *srisc_addr = 0; |
5433383e | 4030 | fwcode = (uint32_t *)blob->fw->data; |
0107109e AV |
4031 | fwclen = 0; |
4032 | ||
4033 | /* Validate firmware image by checking version. */ | |
5433383e | 4034 | if (blob->fw->size < 8 * sizeof(uint32_t)) { |
0107109e | 4035 | qla_printk(KERN_WARNING, ha, |
5433383e AV |
4036 | "Unable to verify integrity of firmware image (%Zd)!\n", |
4037 | blob->fw->size); | |
0107109e AV |
4038 | goto fail_fw_integrity; |
4039 | } | |
4040 | for (i = 0; i < 4; i++) | |
4041 | dcode[i] = be32_to_cpu(fwcode[i + 4]); | |
4042 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4043 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4044 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4045 | dcode[3] == 0)) { | |
4046 | qla_printk(KERN_WARNING, ha, | |
5433383e | 4047 | "Unable to verify integrity of firmware image!\n"); |
0107109e AV |
4048 | qla_printk(KERN_WARNING, ha, |
4049 | "Firmware data: %08x %08x %08x %08x!\n", dcode[0], | |
4050 | dcode[1], dcode[2], dcode[3]); | |
4051 | goto fail_fw_integrity; | |
4052 | } | |
4053 | ||
4054 | while (segments && rval == QLA_SUCCESS) { | |
4055 | risc_addr = be32_to_cpu(fwcode[2]); | |
4056 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4057 | risc_size = be32_to_cpu(fwcode[3]); | |
4058 | ||
4059 | /* Validate firmware image size. */ | |
4060 | fwclen += risc_size * sizeof(uint32_t); | |
5433383e | 4061 | if (blob->fw->size < fwclen) { |
0107109e | 4062 | qla_printk(KERN_WARNING, ha, |
5433383e AV |
4063 | "Unable to verify integrity of firmware image " |
4064 | "(%Zd)!\n", blob->fw->size); | |
4065 | ||
0107109e AV |
4066 | goto fail_fw_integrity; |
4067 | } | |
4068 | ||
4069 | fragment = 0; | |
4070 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4071 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4072 | if (dlen > risc_size) | |
4073 | dlen = risc_size; | |
4074 | ||
4075 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
e315cd28 | 4076 | "addr %x, number of dwords 0x%x.\n", vha->host_no, |
0107109e AV |
4077 | risc_addr, dlen)); |
4078 | ||
4079 | for (i = 0; i < dlen; i++) | |
4080 | dcode[i] = swab32(fwcode[i]); | |
4081 | ||
73208dfd | 4082 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
590f98e5 | 4083 | dlen); |
0107109e AV |
4084 | if (rval) { |
4085 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4086 | "segment %d of firmware\n", vha->host_no, |
0107109e AV |
4087 | fragment)); |
4088 | qla_printk(KERN_WARNING, ha, | |
4089 | "[ERROR] Failed to load segment %d of " | |
4090 | "firmware\n", fragment); | |
4091 | break; | |
4092 | } | |
4093 | ||
4094 | fwcode += dlen; | |
4095 | risc_addr += dlen; | |
4096 | risc_size -= dlen; | |
4097 | fragment++; | |
4098 | } | |
4099 | ||
4100 | /* Next segment. */ | |
4101 | segments--; | |
4102 | } | |
0107109e AV |
4103 | return rval; |
4104 | ||
4105 | fail_fw_integrity: | |
0107109e | 4106 | return QLA_FUNCTION_FAILED; |
0107109e | 4107 | } |
18c6c127 | 4108 | |
eaac30be AV |
4109 | int |
4110 | qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4111 | { | |
4112 | int rval; | |
4113 | ||
e337d907 AV |
4114 | if (ql2xfwloadbin == 1) |
4115 | return qla81xx_load_risc(vha, srisc_addr); | |
4116 | ||
eaac30be AV |
4117 | /* |
4118 | * FW Load priority: | |
4119 | * 1) Firmware via request-firmware interface (.bin file). | |
4120 | * 2) Firmware residing in flash. | |
4121 | */ | |
4122 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4123 | if (rval == QLA_SUCCESS) | |
4124 | return rval; | |
4125 | ||
cbc8eb67 AV |
4126 | return qla24xx_load_risc_flash(vha, srisc_addr, |
4127 | vha->hw->flt_region_fw); | |
eaac30be AV |
4128 | } |
4129 | ||
4130 | int | |
4131 | qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4132 | { | |
4133 | int rval; | |
cbc8eb67 | 4134 | struct qla_hw_data *ha = vha->hw; |
eaac30be | 4135 | |
e337d907 | 4136 | if (ql2xfwloadbin == 2) |
cbc8eb67 | 4137 | goto try_blob_fw; |
e337d907 | 4138 | |
eaac30be AV |
4139 | /* |
4140 | * FW Load priority: | |
4141 | * 1) Firmware residing in flash. | |
4142 | * 2) Firmware via request-firmware interface (.bin file). | |
cbc8eb67 | 4143 | * 3) Golden-Firmware residing in flash -- limited operation. |
eaac30be | 4144 | */ |
cbc8eb67 | 4145 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); |
eaac30be AV |
4146 | if (rval == QLA_SUCCESS) |
4147 | return rval; | |
4148 | ||
cbc8eb67 AV |
4149 | try_blob_fw: |
4150 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4151 | if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) | |
4152 | return rval; | |
4153 | ||
4154 | qla_printk(KERN_ERR, ha, | |
4155 | "FW: Attempting to fallback to golden firmware...\n"); | |
4156 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); | |
4157 | if (rval != QLA_SUCCESS) | |
4158 | return rval; | |
4159 | ||
4160 | qla_printk(KERN_ERR, ha, | |
4161 | "FW: Please update operational firmware...\n"); | |
4162 | ha->flags.running_gold_fw = 1; | |
4163 | ||
4164 | return rval; | |
eaac30be AV |
4165 | } |
4166 | ||
18c6c127 | 4167 | void |
e315cd28 | 4168 | qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) |
18c6c127 AV |
4169 | { |
4170 | int ret, retries; | |
e315cd28 | 4171 | struct qla_hw_data *ha = vha->hw; |
18c6c127 | 4172 | |
e428924c | 4173 | if (!IS_FWI2_CAPABLE(ha)) |
18c6c127 | 4174 | return; |
75edf81d AV |
4175 | if (!ha->fw_major_version) |
4176 | return; | |
18c6c127 | 4177 | |
e315cd28 | 4178 | ret = qla2x00_stop_firmware(vha); |
7c7f1f29 | 4179 | for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && |
b469a7cb | 4180 | ret != QLA_INVALID_COMMAND && retries ; retries--) { |
e315cd28 AC |
4181 | ha->isp_ops->reset_chip(vha); |
4182 | if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) | |
18c6c127 | 4183 | continue; |
e315cd28 | 4184 | if (qla2x00_setup_chip(vha) != QLA_SUCCESS) |
18c6c127 AV |
4185 | continue; |
4186 | qla_printk(KERN_INFO, ha, | |
4187 | "Attempting retry of stop-firmware command...\n"); | |
e315cd28 | 4188 | ret = qla2x00_stop_firmware(vha); |
18c6c127 AV |
4189 | } |
4190 | } | |
2c3dfe3f SJ |
4191 | |
4192 | int | |
e315cd28 | 4193 | qla24xx_configure_vhba(scsi_qla_host_t *vha) |
2c3dfe3f SJ |
4194 | { |
4195 | int rval = QLA_SUCCESS; | |
4196 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 AC |
4197 | struct qla_hw_data *ha = vha->hw; |
4198 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
67c2e93a AC |
4199 | struct req_que *req; |
4200 | struct rsp_que *rsp; | |
2c3dfe3f | 4201 | |
e315cd28 | 4202 | if (!vha->vp_idx) |
2c3dfe3f SJ |
4203 | return -EINVAL; |
4204 | ||
e315cd28 | 4205 | rval = qla2x00_fw_ready(base_vha); |
67c2e93a AC |
4206 | if (ql2xmultique_tag) |
4207 | req = ha->req_q_map[0]; | |
4208 | else | |
4209 | req = vha->req; | |
4210 | rsp = req->rsp; | |
4211 | ||
2c3dfe3f | 4212 | if (rval == QLA_SUCCESS) { |
e315cd28 | 4213 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
73208dfd | 4214 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
2c3dfe3f SJ |
4215 | } |
4216 | ||
e315cd28 | 4217 | vha->flags.management_server_logged_in = 0; |
2c3dfe3f SJ |
4218 | |
4219 | /* Login to SNS first */ | |
e315cd28 | 4220 | ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1); |
2c3dfe3f SJ |
4221 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
4222 | DEBUG15(qla_printk(KERN_INFO, ha, | |
4223 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
4224 | "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS, | |
4225 | mb[0], mb[1], mb[2], mb[6], mb[7])); | |
4226 | return (QLA_FUNCTION_FAILED); | |
4227 | } | |
4228 | ||
e315cd28 AC |
4229 | atomic_set(&vha->loop_down_timer, 0); |
4230 | atomic_set(&vha->loop_state, LOOP_UP); | |
4231 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
4232 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
4233 | rval = qla2x00_loop_resync(base_vha); | |
2c3dfe3f SJ |
4234 | |
4235 | return rval; | |
4236 | } | |
4d4df193 HK |
4237 | |
4238 | /* 84XX Support **************************************************************/ | |
4239 | ||
4240 | static LIST_HEAD(qla_cs84xx_list); | |
4241 | static DEFINE_MUTEX(qla_cs84xx_mutex); | |
4242 | ||
4243 | static struct qla_chip_state_84xx * | |
e315cd28 | 4244 | qla84xx_get_chip(struct scsi_qla_host *vha) |
4d4df193 HK |
4245 | { |
4246 | struct qla_chip_state_84xx *cs84xx; | |
e315cd28 | 4247 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4248 | |
4249 | mutex_lock(&qla_cs84xx_mutex); | |
4250 | ||
4251 | /* Find any shared 84xx chip. */ | |
4252 | list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { | |
4253 | if (cs84xx->bus == ha->pdev->bus) { | |
4254 | kref_get(&cs84xx->kref); | |
4255 | goto done; | |
4256 | } | |
4257 | } | |
4258 | ||
4259 | cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); | |
4260 | if (!cs84xx) | |
4261 | goto done; | |
4262 | ||
4263 | kref_init(&cs84xx->kref); | |
4264 | spin_lock_init(&cs84xx->access_lock); | |
4265 | mutex_init(&cs84xx->fw_update_mutex); | |
4266 | cs84xx->bus = ha->pdev->bus; | |
4267 | ||
4268 | list_add_tail(&cs84xx->list, &qla_cs84xx_list); | |
4269 | done: | |
4270 | mutex_unlock(&qla_cs84xx_mutex); | |
4271 | return cs84xx; | |
4272 | } | |
4273 | ||
4274 | static void | |
4275 | __qla84xx_chip_release(struct kref *kref) | |
4276 | { | |
4277 | struct qla_chip_state_84xx *cs84xx = | |
4278 | container_of(kref, struct qla_chip_state_84xx, kref); | |
4279 | ||
4280 | mutex_lock(&qla_cs84xx_mutex); | |
4281 | list_del(&cs84xx->list); | |
4282 | mutex_unlock(&qla_cs84xx_mutex); | |
4283 | kfree(cs84xx); | |
4284 | } | |
4285 | ||
4286 | void | |
e315cd28 | 4287 | qla84xx_put_chip(struct scsi_qla_host *vha) |
4d4df193 | 4288 | { |
e315cd28 | 4289 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4290 | if (ha->cs84xx) |
4291 | kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); | |
4292 | } | |
4293 | ||
4294 | static int | |
e315cd28 | 4295 | qla84xx_init_chip(scsi_qla_host_t *vha) |
4d4df193 HK |
4296 | { |
4297 | int rval; | |
4298 | uint16_t status[2]; | |
e315cd28 | 4299 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4300 | |
4301 | mutex_lock(&ha->cs84xx->fw_update_mutex); | |
4302 | ||
e315cd28 | 4303 | rval = qla84xx_verify_chip(vha, status); |
4d4df193 HK |
4304 | |
4305 | mutex_unlock(&ha->cs84xx->fw_update_mutex); | |
4306 | ||
4307 | return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: | |
4308 | QLA_SUCCESS; | |
4309 | } | |
3a03eb79 AV |
4310 | |
4311 | /* 81XX Support **************************************************************/ | |
4312 | ||
4313 | int | |
4314 | qla81xx_nvram_config(scsi_qla_host_t *vha) | |
4315 | { | |
4316 | int rval; | |
4317 | struct init_cb_81xx *icb; | |
4318 | struct nvram_81xx *nv; | |
4319 | uint32_t *dptr; | |
4320 | uint8_t *dptr1, *dptr2; | |
4321 | uint32_t chksum; | |
4322 | uint16_t cnt; | |
4323 | struct qla_hw_data *ha = vha->hw; | |
4324 | ||
4325 | rval = QLA_SUCCESS; | |
4326 | icb = (struct init_cb_81xx *)ha->init_cb; | |
4327 | nv = ha->nvram; | |
4328 | ||
4329 | /* Determine NVRAM starting address. */ | |
4330 | ha->nvram_size = sizeof(struct nvram_81xx); | |
3a03eb79 | 4331 | ha->vpd_size = FA_NVRAM_VPD_SIZE; |
3a03eb79 AV |
4332 | |
4333 | /* Get VPD data into cache */ | |
4334 | ha->vpd = ha->nvram + VPD_OFFSET; | |
3d79038f AV |
4335 | ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, |
4336 | ha->vpd_size); | |
3a03eb79 AV |
4337 | |
4338 | /* Get NVRAM data into cache and calculate checksum. */ | |
3d79038f | 4339 | ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, |
3a03eb79 | 4340 | ha->nvram_size); |
3d79038f | 4341 | dptr = (uint32_t *)nv; |
3a03eb79 AV |
4342 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) |
4343 | chksum += le32_to_cpu(*dptr++); | |
4344 | ||
7640335e | 4345 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
3a03eb79 AV |
4346 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
4347 | ||
4348 | /* Bad NVRAM data, set defaults parameters. */ | |
4349 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
4350 | || nv->id[3] != ' ' || | |
4351 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
4352 | /* Reset NVRAM data. */ | |
4353 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
4354 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
4355 | le16_to_cpu(nv->nvram_version)); | |
4356 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " | |
4357 | "invalid -- WWPN) defaults.\n"); | |
4358 | ||
4359 | /* | |
4360 | * Set default initialization control block. | |
4361 | */ | |
4362 | memset(nv, 0, ha->nvram_size); | |
4363 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
4364 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
4365 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
4366 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4367 | nv->exchange_count = __constant_cpu_to_le16(0); | |
4368 | nv->port_name[0] = 0x21; | |
e5b68a61 | 4369 | nv->port_name[1] = 0x00 + ha->port_no; |
3a03eb79 AV |
4370 | nv->port_name[2] = 0x00; |
4371 | nv->port_name[3] = 0xe0; | |
4372 | nv->port_name[4] = 0x8b; | |
4373 | nv->port_name[5] = 0x1c; | |
4374 | nv->port_name[6] = 0x55; | |
4375 | nv->port_name[7] = 0x86; | |
4376 | nv->node_name[0] = 0x20; | |
4377 | nv->node_name[1] = 0x00; | |
4378 | nv->node_name[2] = 0x00; | |
4379 | nv->node_name[3] = 0xe0; | |
4380 | nv->node_name[4] = 0x8b; | |
4381 | nv->node_name[5] = 0x1c; | |
4382 | nv->node_name[6] = 0x55; | |
4383 | nv->node_name[7] = 0x86; | |
4384 | nv->login_retry_count = __constant_cpu_to_le16(8); | |
4385 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
4386 | nv->login_timeout = __constant_cpu_to_le16(0); | |
4387 | nv->firmware_options_1 = | |
4388 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
4389 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
4390 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
4391 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
4392 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
4393 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
4394 | nv->reset_delay = 5; | |
4395 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
4396 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
4397 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
4398 | nv->enode_mac[0] = 0x01; | |
4399 | nv->enode_mac[1] = 0x02; | |
4400 | nv->enode_mac[2] = 0x03; | |
4401 | nv->enode_mac[3] = 0x04; | |
4402 | nv->enode_mac[4] = 0x05; | |
e5b68a61 | 4403 | nv->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
4404 | |
4405 | rval = 1; | |
4406 | } | |
4407 | ||
4408 | /* Reset Initialization control block */ | |
4409 | memset(icb, 0, sizeof(struct init_cb_81xx)); | |
4410 | ||
4411 | /* Copy 1st segment. */ | |
4412 | dptr1 = (uint8_t *)icb; | |
4413 | dptr2 = (uint8_t *)&nv->version; | |
4414 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
4415 | while (cnt--) | |
4416 | *dptr1++ = *dptr2++; | |
4417 | ||
4418 | icb->login_retry_count = nv->login_retry_count; | |
4419 | ||
4420 | /* Copy 2nd segment. */ | |
4421 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
4422 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
4423 | cnt = (uint8_t *)&icb->reserved_5 - | |
4424 | (uint8_t *)&icb->interrupt_delay_timer; | |
4425 | while (cnt--) | |
4426 | *dptr1++ = *dptr2++; | |
4427 | ||
4428 | memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); | |
4429 | /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ | |
4430 | if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { | |
4431 | icb->enode_mac[0] = 0x01; | |
4432 | icb->enode_mac[1] = 0x02; | |
4433 | icb->enode_mac[2] = 0x03; | |
4434 | icb->enode_mac[3] = 0x04; | |
4435 | icb->enode_mac[4] = 0x05; | |
e5b68a61 | 4436 | icb->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
4437 | } |
4438 | ||
b64b0e8f AV |
4439 | /* Use extended-initialization control block. */ |
4440 | memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); | |
4441 | ||
3a03eb79 AV |
4442 | /* |
4443 | * Setup driver NVRAM options. | |
4444 | */ | |
4445 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), | |
4446 | "QLE81XX"); | |
4447 | ||
4448 | /* Use alternate WWN? */ | |
4449 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
4450 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
4451 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
4452 | } | |
4453 | ||
4454 | /* Prepare nodename */ | |
4455 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { | |
4456 | /* | |
4457 | * Firmware will apply the following mask if the nodename was | |
4458 | * not provided. | |
4459 | */ | |
4460 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
4461 | icb->node_name[0] &= 0xF0; | |
4462 | } | |
4463 | ||
4464 | /* Set host adapter parameters. */ | |
4465 | ha->flags.disable_risc_code_load = 0; | |
4466 | ha->flags.enable_lip_reset = 0; | |
4467 | ha->flags.enable_lip_full_login = | |
4468 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
4469 | ha->flags.enable_target_reset = | |
4470 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
4471 | ha->flags.enable_led_scheme = 0; | |
4472 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; | |
4473 | ||
4474 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & | |
4475 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
4476 | ||
4477 | /* save HBA serial number */ | |
4478 | ha->serial0 = icb->port_name[5]; | |
4479 | ha->serial1 = icb->port_name[6]; | |
4480 | ha->serial2 = icb->port_name[7]; | |
4481 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); | |
4482 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
4483 | ||
4484 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4485 | ||
4486 | ha->retry_count = le16_to_cpu(nv->login_retry_count); | |
4487 | ||
4488 | /* Set minimum login_timeout to 4 seconds. */ | |
4489 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
4490 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
4491 | if (le16_to_cpu(nv->login_timeout) < 4) | |
4492 | nv->login_timeout = __constant_cpu_to_le16(4); | |
4493 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
4494 | icb->login_timeout = nv->login_timeout; | |
4495 | ||
4496 | /* Set minimum RATOV to 100 tenths of a second. */ | |
4497 | ha->r_a_tov = 100; | |
4498 | ||
4499 | ha->loop_reset_delay = nv->reset_delay; | |
4500 | ||
4501 | /* Link Down Timeout = 0: | |
4502 | * | |
4503 | * When Port Down timer expires we will start returning | |
4504 | * I/O's to OS with "DID_NO_CONNECT". | |
4505 | * | |
4506 | * Link Down Timeout != 0: | |
4507 | * | |
4508 | * The driver waits for the link to come up after link down | |
4509 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
4510 | */ | |
4511 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
4512 | ha->loop_down_abort_time = | |
4513 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
4514 | } else { | |
4515 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
4516 | ha->loop_down_abort_time = | |
4517 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
4518 | } | |
4519 | ||
4520 | /* Need enough time to try and get the port back. */ | |
4521 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
4522 | if (qlport_down_retry) | |
4523 | ha->port_down_retry_count = qlport_down_retry; | |
4524 | ||
4525 | /* Set login_retry_count */ | |
4526 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
4527 | if (ha->port_down_retry_count == | |
4528 | le16_to_cpu(nv->port_down_retry_count) && | |
4529 | ha->port_down_retry_count > 3) | |
4530 | ha->login_retry_count = ha->port_down_retry_count; | |
4531 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
4532 | ha->login_retry_count = ha->port_down_retry_count; | |
4533 | if (ql2xloginretrycount) | |
4534 | ha->login_retry_count = ql2xloginretrycount; | |
4535 | ||
4536 | /* Enable ZIO. */ | |
4537 | if (!vha->flags.init_done) { | |
4538 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & | |
4539 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
4540 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
4541 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
4542 | } | |
4543 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
4544 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
4545 | vha->flags.process_response_queue = 0; | |
4546 | if (ha->zio_mode != QLA_ZIO_DISABLED) { | |
4547 | ha->zio_mode = QLA_ZIO_MODE_6; | |
4548 | ||
4549 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay " | |
4550 | "(%d us).\n", vha->host_no, ha->zio_mode, | |
4551 | ha->zio_timer * 100)); | |
4552 | qla_printk(KERN_INFO, ha, | |
4553 | "ZIO mode %d enabled; timer delay (%d us).\n", | |
4554 | ha->zio_mode, ha->zio_timer * 100); | |
4555 | ||
4556 | icb->firmware_options_2 |= cpu_to_le32( | |
4557 | (uint32_t)ha->zio_mode); | |
4558 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
4559 | vha->flags.process_response_queue = 1; | |
4560 | } | |
4561 | ||
4562 | if (rval) { | |
4563 | DEBUG2_3(printk(KERN_WARNING | |
4564 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); | |
4565 | } | |
4566 | return (rval); | |
4567 | } | |
4568 | ||
4569 | void | |
4570 | qla81xx_update_fw_options(scsi_qla_host_t *ha) | |
4571 | { | |
4572 | } |