Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
01e58d8e | 3 | * Copyright (c) 2003-2008 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
73208dfd | 8 | #include "qla_gbl.h" |
1da177e4 LT |
9 | |
10 | #include <linux/delay.h> | |
5a0e3ad6 | 11 | #include <linux/slab.h> |
0107109e | 12 | #include <linux/vmalloc.h> |
1da177e4 LT |
13 | |
14 | #include "qla_devtbl.h" | |
15 | ||
4e08df3f DM |
16 | #ifdef CONFIG_SPARC |
17 | #include <asm/prom.h> | |
4e08df3f DM |
18 | #endif |
19 | ||
1da177e4 LT |
20 | /* |
21 | * QLogic ISP2x00 Hardware Support Function Prototypes. | |
22 | */ | |
1da177e4 | 23 | static int qla2x00_isp_firmware(scsi_qla_host_t *); |
1da177e4 | 24 | static int qla2x00_setup_chip(scsi_qla_host_t *); |
1da177e4 LT |
25 | static int qla2x00_init_rings(scsi_qla_host_t *); |
26 | static int qla2x00_fw_ready(scsi_qla_host_t *); | |
27 | static int qla2x00_configure_hba(scsi_qla_host_t *); | |
1da177e4 LT |
28 | static int qla2x00_configure_loop(scsi_qla_host_t *); |
29 | static int qla2x00_configure_local_loop(scsi_qla_host_t *); | |
1da177e4 LT |
30 | static int qla2x00_configure_fabric(scsi_qla_host_t *); |
31 | static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); | |
32 | static int qla2x00_device_resync(scsi_qla_host_t *); | |
33 | static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, | |
34 | uint16_t *); | |
1da177e4 LT |
35 | |
36 | static int qla2x00_restart_isp(scsi_qla_host_t *); | |
1da177e4 | 37 | |
e315cd28 | 38 | static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *); |
413975a0 | 39 | |
4d4df193 HK |
40 | static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); |
41 | static int qla84xx_init_chip(scsi_qla_host_t *); | |
73208dfd | 42 | static int qla25xx_init_queues(struct qla_hw_data *); |
4d4df193 | 43 | |
ac280b67 AV |
44 | /* SRB Extensions ---------------------------------------------------------- */ |
45 | ||
46 | static void | |
47 | qla2x00_ctx_sp_timeout(unsigned long __data) | |
48 | { | |
49 | srb_t *sp = (srb_t *)__data; | |
50 | struct srb_ctx *ctx; | |
51 | fc_port_t *fcport = sp->fcport; | |
52 | struct qla_hw_data *ha = fcport->vha->hw; | |
53 | struct req_que *req; | |
54 | unsigned long flags; | |
55 | ||
56 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
57 | req = ha->req_q_map[0]; | |
58 | req->outstanding_cmds[sp->handle] = NULL; | |
59 | ctx = sp->ctx; | |
60 | ctx->timeout(sp); | |
61 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
62 | ||
63 | ctx->free(sp); | |
64 | } | |
65 | ||
9a069e19 | 66 | void |
ac280b67 AV |
67 | qla2x00_ctx_sp_free(srb_t *sp) |
68 | { | |
69 | struct srb_ctx *ctx = sp->ctx; | |
70 | ||
71 | kfree(ctx); | |
72 | mempool_free(sp, sp->fcport->vha->hw->srb_mempool); | |
73 | } | |
74 | ||
75 | inline srb_t * | |
76 | qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size, | |
77 | unsigned long tmo) | |
78 | { | |
79 | srb_t *sp; | |
80 | struct qla_hw_data *ha = vha->hw; | |
81 | struct srb_ctx *ctx; | |
82 | ||
83 | sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL); | |
84 | if (!sp) | |
85 | goto done; | |
86 | ctx = kzalloc(size, GFP_KERNEL); | |
87 | if (!ctx) { | |
88 | mempool_free(sp, ha->srb_mempool); | |
89 | goto done; | |
90 | } | |
91 | ||
92 | memset(sp, 0, sizeof(*sp)); | |
93 | sp->fcport = fcport; | |
94 | sp->ctx = ctx; | |
95 | ctx->free = qla2x00_ctx_sp_free; | |
96 | ||
97 | init_timer(&ctx->timer); | |
98 | if (!tmo) | |
99 | goto done; | |
100 | ctx->timer.expires = jiffies + tmo * HZ; | |
101 | ctx->timer.data = (unsigned long)sp; | |
102 | ctx->timer.function = qla2x00_ctx_sp_timeout; | |
103 | add_timer(&ctx->timer); | |
104 | done: | |
105 | return sp; | |
106 | } | |
107 | ||
108 | /* Asynchronous Login/Logout Routines -------------------------------------- */ | |
109 | ||
110 | #define ELS_TMO_2_RATOV(ha) ((ha)->r_a_tov / 10 * 2) | |
111 | ||
112 | static void | |
113 | qla2x00_async_logio_timeout(srb_t *sp) | |
114 | { | |
115 | fc_port_t *fcport = sp->fcport; | |
116 | struct srb_logio *lio = sp->ctx; | |
117 | ||
118 | DEBUG2(printk(KERN_WARNING | |
119 | "scsi(%ld:%x): Async-%s timeout.\n", | |
120 | fcport->vha->host_no, sp->handle, | |
121 | lio->ctx.type == SRB_LOGIN_CMD ? "login": "logout")); | |
122 | ||
123 | if (lio->ctx.type == SRB_LOGIN_CMD) | |
124 | qla2x00_post_async_logout_work(fcport->vha, fcport, NULL); | |
125 | } | |
126 | ||
127 | int | |
128 | qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, | |
129 | uint16_t *data) | |
130 | { | |
131 | struct qla_hw_data *ha = vha->hw; | |
132 | srb_t *sp; | |
133 | struct srb_logio *lio; | |
134 | int rval; | |
135 | ||
136 | rval = QLA_FUNCTION_FAILED; | |
137 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_logio), | |
138 | ELS_TMO_2_RATOV(ha) + 2); | |
139 | if (!sp) | |
140 | goto done; | |
141 | ||
142 | lio = sp->ctx; | |
143 | lio->ctx.type = SRB_LOGIN_CMD; | |
144 | lio->ctx.timeout = qla2x00_async_logio_timeout; | |
145 | lio->flags |= SRB_LOGIN_COND_PLOGI; | |
146 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) | |
147 | lio->flags |= SRB_LOGIN_RETRIED; | |
148 | rval = qla2x00_start_sp(sp); | |
149 | if (rval != QLA_SUCCESS) | |
150 | goto done_free_sp; | |
151 | ||
152 | DEBUG2(printk(KERN_DEBUG | |
153 | "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x " | |
154 | "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id, | |
155 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
156 | fcport->login_retry)); | |
157 | return rval; | |
158 | ||
159 | done_free_sp: | |
160 | del_timer_sync(&lio->ctx.timer); | |
161 | lio->ctx.free(sp); | |
162 | done: | |
163 | return rval; | |
164 | } | |
165 | ||
166 | int | |
167 | qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) | |
168 | { | |
169 | struct qla_hw_data *ha = vha->hw; | |
170 | srb_t *sp; | |
171 | struct srb_logio *lio; | |
172 | int rval; | |
173 | ||
174 | rval = QLA_FUNCTION_FAILED; | |
175 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_logio), | |
176 | ELS_TMO_2_RATOV(ha) + 2); | |
177 | if (!sp) | |
178 | goto done; | |
179 | ||
180 | lio = sp->ctx; | |
181 | lio->ctx.type = SRB_LOGOUT_CMD; | |
182 | lio->ctx.timeout = qla2x00_async_logio_timeout; | |
183 | rval = qla2x00_start_sp(sp); | |
184 | if (rval != QLA_SUCCESS) | |
185 | goto done_free_sp; | |
186 | ||
187 | DEBUG2(printk(KERN_DEBUG | |
188 | "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n", | |
189 | fcport->vha->host_no, sp->handle, fcport->loop_id, | |
190 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
191 | return rval; | |
192 | ||
193 | done_free_sp: | |
194 | del_timer_sync(&lio->ctx.timer); | |
195 | lio->ctx.free(sp); | |
196 | done: | |
197 | return rval; | |
198 | } | |
199 | ||
200 | int | |
201 | qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport, | |
202 | uint16_t *data) | |
203 | { | |
204 | int rval; | |
205 | uint8_t opts = 0; | |
206 | ||
207 | switch (data[0]) { | |
208 | case MBS_COMMAND_COMPLETE: | |
f08b7251 | 209 | if (fcport->flags & FCF_FCP2_DEVICE) |
ac280b67 AV |
210 | opts |= BIT_1; |
211 | rval = qla2x00_get_port_database(vha, fcport, opts); | |
212 | if (rval != QLA_SUCCESS) | |
213 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
214 | else | |
215 | qla2x00_update_fcport(vha, fcport); | |
216 | break; | |
217 | case MBS_COMMAND_ERROR: | |
218 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) | |
219 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
220 | else | |
221 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
222 | break; | |
223 | case MBS_PORT_ID_USED: | |
224 | fcport->loop_id = data[1]; | |
225 | qla2x00_post_async_login_work(vha, fcport, NULL); | |
226 | break; | |
227 | case MBS_LOOP_ID_USED: | |
228 | fcport->loop_id++; | |
229 | rval = qla2x00_find_new_loop_id(vha, fcport); | |
230 | if (rval != QLA_SUCCESS) { | |
231 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
232 | break; | |
233 | } | |
234 | qla2x00_post_async_login_work(vha, fcport, NULL); | |
235 | break; | |
236 | } | |
237 | return QLA_SUCCESS; | |
238 | } | |
239 | ||
240 | int | |
241 | qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, | |
242 | uint16_t *data) | |
243 | { | |
244 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
245 | return QLA_SUCCESS; | |
246 | } | |
247 | ||
1da177e4 LT |
248 | /****************************************************************************/ |
249 | /* QLogic ISP2x00 Hardware Support Functions. */ | |
250 | /****************************************************************************/ | |
251 | ||
252 | /* | |
253 | * qla2x00_initialize_adapter | |
254 | * Initialize board. | |
255 | * | |
256 | * Input: | |
257 | * ha = adapter block pointer. | |
258 | * | |
259 | * Returns: | |
260 | * 0 = success | |
261 | */ | |
262 | int | |
e315cd28 | 263 | qla2x00_initialize_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
264 | { |
265 | int rval; | |
e315cd28 | 266 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 267 | struct req_que *req = ha->req_q_map[0]; |
2533cf67 | 268 | |
1da177e4 | 269 | /* Clear adapter flags. */ |
e315cd28 | 270 | vha->flags.online = 0; |
2533cf67 | 271 | ha->flags.chip_reset_done = 0; |
e315cd28 | 272 | vha->flags.reset_active = 0; |
85880801 AV |
273 | ha->flags.pci_channel_io_perm_failure = 0; |
274 | ha->flags.eeh_busy = 0; | |
e315cd28 AC |
275 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); |
276 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
277 | vha->device_flags = DFLG_NO_CABLE; | |
278 | vha->dpc_flags = 0; | |
279 | vha->flags.management_server_logged_in = 0; | |
280 | vha->marker_needed = 0; | |
1da177e4 LT |
281 | ha->isp_abort_cnt = 0; |
282 | ha->beacon_blink_led = 0; | |
283 | ||
73208dfd AC |
284 | set_bit(0, ha->req_qid_map); |
285 | set_bit(0, ha->rsp_qid_map); | |
286 | ||
0107109e | 287 | qla_printk(KERN_INFO, ha, "Configuring PCI space...\n"); |
e315cd28 | 288 | rval = ha->isp_ops->pci_config(vha); |
1da177e4 | 289 | if (rval) { |
7c98a046 | 290 | DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n", |
e315cd28 | 291 | vha->host_no)); |
1da177e4 LT |
292 | return (rval); |
293 | } | |
294 | ||
e315cd28 | 295 | ha->isp_ops->reset_chip(vha); |
1da177e4 | 296 | |
e315cd28 | 297 | rval = qla2xxx_get_flash_info(vha); |
c00d8994 AV |
298 | if (rval) { |
299 | DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n", | |
e315cd28 | 300 | vha->host_no)); |
c00d8994 AV |
301 | return (rval); |
302 | } | |
303 | ||
73208dfd | 304 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 305 | |
1da177e4 | 306 | qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n"); |
0107109e | 307 | |
e315cd28 | 308 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 309 | |
d4c760c2 AV |
310 | if (ha->flags.disable_serdes) { |
311 | /* Mask HBA via NVRAM settings? */ | |
312 | qla_printk(KERN_INFO, ha, "Masking HBA WWPN " | |
313 | "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n", | |
e315cd28 AC |
314 | vha->port_name[0], vha->port_name[1], |
315 | vha->port_name[2], vha->port_name[3], | |
316 | vha->port_name[4], vha->port_name[5], | |
317 | vha->port_name[6], vha->port_name[7]); | |
d4c760c2 AV |
318 | return QLA_FUNCTION_FAILED; |
319 | } | |
320 | ||
1da177e4 LT |
321 | qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n"); |
322 | ||
e315cd28 AC |
323 | if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { |
324 | rval = ha->isp_ops->chip_diag(vha); | |
d19044c3 AV |
325 | if (rval) |
326 | return (rval); | |
e315cd28 | 327 | rval = qla2x00_setup_chip(vha); |
d19044c3 AV |
328 | if (rval) |
329 | return (rval); | |
1da177e4 | 330 | } |
4d4df193 | 331 | if (IS_QLA84XX(ha)) { |
e315cd28 | 332 | ha->cs84xx = qla84xx_get_chip(vha); |
4d4df193 HK |
333 | if (!ha->cs84xx) { |
334 | qla_printk(KERN_ERR, ha, | |
335 | "Unable to configure ISP84XX.\n"); | |
336 | return QLA_FUNCTION_FAILED; | |
337 | } | |
338 | } | |
e315cd28 | 339 | rval = qla2x00_init_rings(vha); |
2533cf67 | 340 | ha->flags.chip_reset_done = 1; |
1da177e4 | 341 | |
9a069e19 | 342 | if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { |
6c452a45 | 343 | /* Issue verify 84xx FW IOCB to complete 84xx initialization */ |
9a069e19 GM |
344 | rval = qla84xx_init_chip(vha); |
345 | if (rval != QLA_SUCCESS) { | |
346 | qla_printk(KERN_ERR, ha, | |
347 | "Unable to initialize ISP84XX.\n"); | |
348 | qla84xx_put_chip(vha); | |
349 | } | |
350 | } | |
351 | ||
09ff701a SR |
352 | if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) { |
353 | if (qla24xx_read_fcp_prio_cfg(vha)) | |
354 | qla_printk(KERN_ERR, ha, | |
355 | "Unable to read FCP priority data.\n"); | |
356 | } | |
357 | ||
1da177e4 LT |
358 | return (rval); |
359 | } | |
360 | ||
361 | /** | |
abbd8870 | 362 | * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. |
1da177e4 LT |
363 | * @ha: HA context |
364 | * | |
365 | * Returns 0 on success. | |
366 | */ | |
abbd8870 | 367 | int |
e315cd28 | 368 | qla2100_pci_config(scsi_qla_host_t *vha) |
1da177e4 | 369 | { |
a157b101 | 370 | uint16_t w; |
abbd8870 | 371 | unsigned long flags; |
e315cd28 | 372 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 373 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 374 | |
1da177e4 | 375 | pci_set_master(ha->pdev); |
af6177d8 | 376 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 377 | |
1da177e4 | 378 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 379 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
abbd8870 AV |
380 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
381 | ||
737faece | 382 | pci_disable_rom(ha->pdev); |
1da177e4 LT |
383 | |
384 | /* Get PCI bus information. */ | |
385 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 386 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
1da177e4 LT |
387 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
388 | ||
abbd8870 AV |
389 | return QLA_SUCCESS; |
390 | } | |
1da177e4 | 391 | |
abbd8870 AV |
392 | /** |
393 | * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. | |
394 | * @ha: HA context | |
395 | * | |
396 | * Returns 0 on success. | |
397 | */ | |
398 | int | |
e315cd28 | 399 | qla2300_pci_config(scsi_qla_host_t *vha) |
abbd8870 | 400 | { |
a157b101 | 401 | uint16_t w; |
abbd8870 AV |
402 | unsigned long flags = 0; |
403 | uint32_t cnt; | |
e315cd28 | 404 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 405 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 406 | |
abbd8870 | 407 | pci_set_master(ha->pdev); |
af6177d8 | 408 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 409 | |
abbd8870 | 410 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 411 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
1da177e4 | 412 | |
abbd8870 AV |
413 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) |
414 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
a157b101 | 415 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
1da177e4 | 416 | |
abbd8870 AV |
417 | /* |
418 | * If this is a 2300 card and not 2312, reset the | |
419 | * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, | |
420 | * the 2310 also reports itself as a 2300 so we need to get the | |
421 | * fb revision level -- a 6 indicates it really is a 2300 and | |
422 | * not a 2310. | |
423 | */ | |
424 | if (IS_QLA2300(ha)) { | |
425 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1da177e4 | 426 | |
abbd8870 | 427 | /* Pause RISC. */ |
3d71644c | 428 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); |
abbd8870 | 429 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 430 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) |
abbd8870 | 431 | break; |
1da177e4 | 432 | |
abbd8870 AV |
433 | udelay(10); |
434 | } | |
1da177e4 | 435 | |
abbd8870 | 436 | /* Select FPM registers. */ |
3d71644c AV |
437 | WRT_REG_WORD(®->ctrl_status, 0x20); |
438 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
439 | |
440 | /* Get the fb rev level */ | |
3d71644c | 441 | ha->fb_rev = RD_FB_CMD_REG(ha, reg); |
abbd8870 AV |
442 | |
443 | if (ha->fb_rev == FPM_2300) | |
a157b101 | 444 | pci_clear_mwi(ha->pdev); |
abbd8870 AV |
445 | |
446 | /* Deselect FPM registers. */ | |
3d71644c AV |
447 | WRT_REG_WORD(®->ctrl_status, 0x0); |
448 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
449 | |
450 | /* Release RISC module. */ | |
3d71644c | 451 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); |
abbd8870 | 452 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 453 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) |
abbd8870 AV |
454 | break; |
455 | ||
456 | udelay(10); | |
1da177e4 | 457 | } |
1da177e4 | 458 | |
abbd8870 AV |
459 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
460 | } | |
1da177e4 | 461 | |
abbd8870 AV |
462 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); |
463 | ||
737faece | 464 | pci_disable_rom(ha->pdev); |
1da177e4 | 465 | |
abbd8870 AV |
466 | /* Get PCI bus information. */ |
467 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 468 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
abbd8870 AV |
469 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
470 | ||
471 | return QLA_SUCCESS; | |
1da177e4 LT |
472 | } |
473 | ||
0107109e AV |
474 | /** |
475 | * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. | |
476 | * @ha: HA context | |
477 | * | |
478 | * Returns 0 on success. | |
479 | */ | |
480 | int | |
e315cd28 | 481 | qla24xx_pci_config(scsi_qla_host_t *vha) |
0107109e | 482 | { |
a157b101 | 483 | uint16_t w; |
0107109e | 484 | unsigned long flags = 0; |
e315cd28 | 485 | struct qla_hw_data *ha = vha->hw; |
0107109e | 486 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
0107109e AV |
487 | |
488 | pci_set_master(ha->pdev); | |
af6177d8 | 489 | pci_try_set_mwi(ha->pdev); |
0107109e AV |
490 | |
491 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
a157b101 | 492 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
0107109e AV |
493 | w &= ~PCI_COMMAND_INTX_DISABLE; |
494 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
495 | ||
496 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); | |
497 | ||
498 | /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ | |
f85ec187 AV |
499 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) |
500 | pcix_set_mmrbc(ha->pdev, 2048); | |
0107109e AV |
501 | |
502 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
f85ec187 AV |
503 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) |
504 | pcie_set_readrq(ha->pdev, 2048); | |
0107109e | 505 | |
737faece | 506 | pci_disable_rom(ha->pdev); |
0107109e | 507 | |
44c10138 | 508 | ha->chip_revision = ha->pdev->revision; |
a8488abe | 509 | |
0107109e AV |
510 | /* Get PCI bus information. */ |
511 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
512 | ha->pci_attr = RD_REG_DWORD(®->ctrl_status); | |
513 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
514 | ||
515 | return QLA_SUCCESS; | |
516 | } | |
517 | ||
c3a2f0df AV |
518 | /** |
519 | * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. | |
520 | * @ha: HA context | |
521 | * | |
522 | * Returns 0 on success. | |
523 | */ | |
524 | int | |
e315cd28 | 525 | qla25xx_pci_config(scsi_qla_host_t *vha) |
c3a2f0df AV |
526 | { |
527 | uint16_t w; | |
e315cd28 | 528 | struct qla_hw_data *ha = vha->hw; |
c3a2f0df AV |
529 | |
530 | pci_set_master(ha->pdev); | |
531 | pci_try_set_mwi(ha->pdev); | |
532 | ||
533 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
534 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); | |
535 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
536 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
537 | ||
538 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
539 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) | |
540 | pcie_set_readrq(ha->pdev, 2048); | |
541 | ||
737faece | 542 | pci_disable_rom(ha->pdev); |
c3a2f0df AV |
543 | |
544 | ha->chip_revision = ha->pdev->revision; | |
545 | ||
546 | return QLA_SUCCESS; | |
547 | } | |
548 | ||
1da177e4 LT |
549 | /** |
550 | * qla2x00_isp_firmware() - Choose firmware image. | |
551 | * @ha: HA context | |
552 | * | |
553 | * Returns 0 on success. | |
554 | */ | |
555 | static int | |
e315cd28 | 556 | qla2x00_isp_firmware(scsi_qla_host_t *vha) |
1da177e4 LT |
557 | { |
558 | int rval; | |
42e421b1 AV |
559 | uint16_t loop_id, topo, sw_cap; |
560 | uint8_t domain, area, al_pa; | |
e315cd28 | 561 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
562 | |
563 | /* Assume loading risc code */ | |
fa2a1ce5 | 564 | rval = QLA_FUNCTION_FAILED; |
1da177e4 LT |
565 | |
566 | if (ha->flags.disable_risc_code_load) { | |
567 | DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n", | |
e315cd28 | 568 | vha->host_no)); |
1da177e4 LT |
569 | qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n"); |
570 | ||
571 | /* Verify checksum of loaded RISC code. */ | |
e315cd28 | 572 | rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); |
42e421b1 AV |
573 | if (rval == QLA_SUCCESS) { |
574 | /* And, verify we are not in ROM code. */ | |
e315cd28 | 575 | rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, |
42e421b1 AV |
576 | &area, &domain, &topo, &sw_cap); |
577 | } | |
1da177e4 LT |
578 | } |
579 | ||
580 | if (rval) { | |
581 | DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n", | |
e315cd28 | 582 | vha->host_no)); |
1da177e4 LT |
583 | } |
584 | ||
585 | return (rval); | |
586 | } | |
587 | ||
588 | /** | |
589 | * qla2x00_reset_chip() - Reset ISP chip. | |
590 | * @ha: HA context | |
591 | * | |
592 | * Returns 0 on success. | |
593 | */ | |
abbd8870 | 594 | void |
e315cd28 | 595 | qla2x00_reset_chip(scsi_qla_host_t *vha) |
1da177e4 LT |
596 | { |
597 | unsigned long flags = 0; | |
e315cd28 | 598 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 599 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 600 | uint32_t cnt; |
1da177e4 LT |
601 | uint16_t cmd; |
602 | ||
85880801 AV |
603 | if (unlikely(pci_channel_offline(ha->pdev))) |
604 | return; | |
605 | ||
fd34f556 | 606 | ha->isp_ops->disable_intrs(ha); |
1da177e4 LT |
607 | |
608 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
609 | ||
610 | /* Turn off master enable */ | |
611 | cmd = 0; | |
612 | pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); | |
613 | cmd &= ~PCI_COMMAND_MASTER; | |
614 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
615 | ||
616 | if (!IS_QLA2100(ha)) { | |
617 | /* Pause RISC. */ | |
618 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); | |
619 | if (IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
620 | for (cnt = 0; cnt < 30000; cnt++) { | |
621 | if ((RD_REG_WORD(®->hccr) & | |
622 | HCCR_RISC_PAUSE) != 0) | |
623 | break; | |
624 | udelay(100); | |
625 | } | |
626 | } else { | |
627 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
628 | udelay(10); | |
629 | } | |
630 | ||
631 | /* Select FPM registers. */ | |
632 | WRT_REG_WORD(®->ctrl_status, 0x20); | |
633 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
634 | ||
635 | /* FPM Soft Reset. */ | |
636 | WRT_REG_WORD(®->fpm_diag_config, 0x100); | |
637 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
638 | ||
639 | /* Toggle Fpm Reset. */ | |
640 | if (!IS_QLA2200(ha)) { | |
641 | WRT_REG_WORD(®->fpm_diag_config, 0x0); | |
642 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
643 | } | |
644 | ||
645 | /* Select frame buffer registers. */ | |
646 | WRT_REG_WORD(®->ctrl_status, 0x10); | |
647 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
648 | ||
649 | /* Reset frame buffer FIFOs. */ | |
650 | if (IS_QLA2200(ha)) { | |
651 | WRT_FB_CMD_REG(ha, reg, 0xa000); | |
652 | RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ | |
653 | } else { | |
654 | WRT_FB_CMD_REG(ha, reg, 0x00fc); | |
655 | ||
656 | /* Read back fb_cmd until zero or 3 seconds max */ | |
657 | for (cnt = 0; cnt < 3000; cnt++) { | |
658 | if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) | |
659 | break; | |
660 | udelay(100); | |
661 | } | |
662 | } | |
663 | ||
664 | /* Select RISC module registers. */ | |
665 | WRT_REG_WORD(®->ctrl_status, 0); | |
666 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
667 | ||
668 | /* Reset RISC processor. */ | |
669 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
670 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
671 | ||
672 | /* Release RISC processor. */ | |
673 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
674 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
675 | } | |
676 | ||
677 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
678 | WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); | |
679 | ||
680 | /* Reset ISP chip. */ | |
681 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
682 | ||
683 | /* Wait for RISC to recover from reset. */ | |
684 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
685 | /* | |
686 | * It is necessary to for a delay here since the card doesn't | |
687 | * respond to PCI reads during a reset. On some architectures | |
688 | * this will result in an MCA. | |
689 | */ | |
690 | udelay(20); | |
691 | for (cnt = 30000; cnt; cnt--) { | |
692 | if ((RD_REG_WORD(®->ctrl_status) & | |
693 | CSR_ISP_SOFT_RESET) == 0) | |
694 | break; | |
695 | udelay(100); | |
696 | } | |
697 | } else | |
698 | udelay(10); | |
699 | ||
700 | /* Reset RISC processor. */ | |
701 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
702 | ||
703 | WRT_REG_WORD(®->semaphore, 0); | |
704 | ||
705 | /* Release RISC processor. */ | |
706 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
707 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
708 | ||
709 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
710 | for (cnt = 0; cnt < 30000; cnt++) { | |
ffb39f03 | 711 | if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) |
1da177e4 | 712 | break; |
1da177e4 LT |
713 | |
714 | udelay(100); | |
715 | } | |
716 | } else | |
717 | udelay(100); | |
718 | ||
719 | /* Turn on master enable */ | |
720 | cmd |= PCI_COMMAND_MASTER; | |
721 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
722 | ||
723 | /* Disable RISC pause on FPM parity error. */ | |
724 | if (!IS_QLA2100(ha)) { | |
725 | WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); | |
726 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
727 | } | |
728 | ||
729 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
730 | } | |
731 | ||
0107109e | 732 | /** |
88c26663 | 733 | * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. |
0107109e AV |
734 | * @ha: HA context |
735 | * | |
736 | * Returns 0 on success. | |
737 | */ | |
88c26663 | 738 | static inline void |
e315cd28 | 739 | qla24xx_reset_risc(scsi_qla_host_t *vha) |
0107109e AV |
740 | { |
741 | unsigned long flags = 0; | |
e315cd28 | 742 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
743 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
744 | uint32_t cnt, d2; | |
335a1cc9 | 745 | uint16_t wd; |
0107109e | 746 | |
0107109e AV |
747 | spin_lock_irqsave(&ha->hardware_lock, flags); |
748 | ||
749 | /* Reset RISC. */ | |
750 | WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
751 | for (cnt = 0; cnt < 30000; cnt++) { | |
752 | if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) | |
753 | break; | |
754 | ||
755 | udelay(10); | |
756 | } | |
757 | ||
758 | WRT_REG_DWORD(®->ctrl_status, | |
759 | CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
335a1cc9 | 760 | pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); |
88c26663 | 761 | |
335a1cc9 | 762 | udelay(100); |
88c26663 | 763 | /* Wait for firmware to complete NVRAM accesses. */ |
88c26663 AV |
764 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); |
765 | for (cnt = 10000 ; cnt && d2; cnt--) { | |
766 | udelay(5); | |
767 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
768 | barrier(); | |
769 | } | |
770 | ||
335a1cc9 | 771 | /* Wait for soft-reset to complete. */ |
0107109e AV |
772 | d2 = RD_REG_DWORD(®->ctrl_status); |
773 | for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { | |
774 | udelay(5); | |
775 | d2 = RD_REG_DWORD(®->ctrl_status); | |
776 | barrier(); | |
777 | } | |
778 | ||
779 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
780 | RD_REG_DWORD(®->hccr); | |
781 | ||
782 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
783 | RD_REG_DWORD(®->hccr); | |
784 | ||
785 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); | |
786 | RD_REG_DWORD(®->hccr); | |
787 | ||
788 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
789 | for (cnt = 6000000 ; cnt && d2; cnt--) { | |
790 | udelay(5); | |
791 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
792 | barrier(); | |
793 | } | |
794 | ||
795 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
124f85e6 AV |
796 | |
797 | if (IS_NOPOLLING_TYPE(ha)) | |
798 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
799 | } |
800 | ||
88c26663 AV |
801 | /** |
802 | * qla24xx_reset_chip() - Reset ISP24xx chip. | |
803 | * @ha: HA context | |
804 | * | |
805 | * Returns 0 on success. | |
806 | */ | |
807 | void | |
e315cd28 | 808 | qla24xx_reset_chip(scsi_qla_host_t *vha) |
88c26663 | 809 | { |
e315cd28 | 810 | struct qla_hw_data *ha = vha->hw; |
85880801 AV |
811 | |
812 | if (pci_channel_offline(ha->pdev) && | |
813 | ha->flags.pci_channel_io_perm_failure) { | |
814 | return; | |
815 | } | |
816 | ||
fd34f556 | 817 | ha->isp_ops->disable_intrs(ha); |
88c26663 AV |
818 | |
819 | /* Perform RISC reset. */ | |
e315cd28 | 820 | qla24xx_reset_risc(vha); |
88c26663 AV |
821 | } |
822 | ||
1da177e4 LT |
823 | /** |
824 | * qla2x00_chip_diag() - Test chip for proper operation. | |
825 | * @ha: HA context | |
826 | * | |
827 | * Returns 0 on success. | |
828 | */ | |
abbd8870 | 829 | int |
e315cd28 | 830 | qla2x00_chip_diag(scsi_qla_host_t *vha) |
1da177e4 LT |
831 | { |
832 | int rval; | |
e315cd28 | 833 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 834 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
835 | unsigned long flags = 0; |
836 | uint16_t data; | |
837 | uint32_t cnt; | |
838 | uint16_t mb[5]; | |
73208dfd | 839 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 LT |
840 | |
841 | /* Assume a failed state */ | |
842 | rval = QLA_FUNCTION_FAILED; | |
843 | ||
844 | DEBUG3(printk("scsi(%ld): Testing device at %lx.\n", | |
e315cd28 | 845 | vha->host_no, (u_long)®->flash_address)); |
1da177e4 LT |
846 | |
847 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
848 | ||
849 | /* Reset ISP chip. */ | |
850 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
851 | ||
852 | /* | |
853 | * We need to have a delay here since the card will not respond while | |
854 | * in reset causing an MCA on some architectures. | |
855 | */ | |
856 | udelay(20); | |
857 | data = qla2x00_debounce_register(®->ctrl_status); | |
858 | for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { | |
859 | udelay(5); | |
860 | data = RD_REG_WORD(®->ctrl_status); | |
861 | barrier(); | |
862 | } | |
863 | ||
864 | if (!cnt) | |
865 | goto chip_diag_failed; | |
866 | ||
867 | DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n", | |
7640335e | 868 | vha->host_no)); |
1da177e4 LT |
869 | |
870 | /* Reset RISC processor. */ | |
871 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
872 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
873 | ||
874 | /* Workaround for QLA2312 PCI parity error */ | |
875 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
876 | data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); | |
877 | for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { | |
878 | udelay(5); | |
879 | data = RD_MAILBOX_REG(ha, reg, 0); | |
fa2a1ce5 | 880 | barrier(); |
1da177e4 LT |
881 | } |
882 | } else | |
883 | udelay(10); | |
884 | ||
885 | if (!cnt) | |
886 | goto chip_diag_failed; | |
887 | ||
888 | /* Check product ID of chip */ | |
7640335e | 889 | DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no)); |
1da177e4 LT |
890 | |
891 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
892 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
893 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
894 | mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); | |
895 | if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || | |
896 | mb[3] != PROD_ID_3) { | |
897 | qla_printk(KERN_WARNING, ha, | |
898 | "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]); | |
899 | ||
900 | goto chip_diag_failed; | |
901 | } | |
902 | ha->product_id[0] = mb[1]; | |
903 | ha->product_id[1] = mb[2]; | |
904 | ha->product_id[2] = mb[3]; | |
905 | ha->product_id[3] = mb[4]; | |
906 | ||
907 | /* Adjust fw RISC transfer size */ | |
73208dfd | 908 | if (req->length > 1024) |
1da177e4 LT |
909 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; |
910 | else | |
911 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * | |
73208dfd | 912 | req->length; |
1da177e4 LT |
913 | |
914 | if (IS_QLA2200(ha) && | |
915 | RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { | |
916 | /* Limit firmware transfer size with a 2200A */ | |
917 | DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n", | |
e315cd28 | 918 | vha->host_no)); |
1da177e4 | 919 | |
ea5b6382 | 920 | ha->device_type |= DT_ISP2200A; |
1da177e4 LT |
921 | ha->fw_transfer_size = 128; |
922 | } | |
923 | ||
924 | /* Wrap Incoming Mailboxes Test. */ | |
925 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
926 | ||
e315cd28 AC |
927 | DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no)); |
928 | rval = qla2x00_mbx_reg_test(vha); | |
1da177e4 LT |
929 | if (rval) { |
930 | DEBUG(printk("scsi(%ld): Failed mailbox send register test\n", | |
e315cd28 | 931 | vha->host_no)); |
1da177e4 LT |
932 | qla_printk(KERN_WARNING, ha, |
933 | "Failed mailbox send register test\n"); | |
934 | } | |
935 | else { | |
936 | /* Flag a successful rval */ | |
937 | rval = QLA_SUCCESS; | |
938 | } | |
939 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
940 | ||
941 | chip_diag_failed: | |
942 | if (rval) | |
943 | DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED " | |
e315cd28 | 944 | "****\n", vha->host_no)); |
1da177e4 LT |
945 | |
946 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
947 | ||
948 | return (rval); | |
949 | } | |
950 | ||
0107109e AV |
951 | /** |
952 | * qla24xx_chip_diag() - Test ISP24xx for proper operation. | |
953 | * @ha: HA context | |
954 | * | |
955 | * Returns 0 on success. | |
956 | */ | |
957 | int | |
e315cd28 | 958 | qla24xx_chip_diag(scsi_qla_host_t *vha) |
0107109e AV |
959 | { |
960 | int rval; | |
e315cd28 | 961 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 962 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 963 | |
73208dfd | 964 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; |
0107109e | 965 | |
e315cd28 | 966 | rval = qla2x00_mbx_reg_test(vha); |
0107109e AV |
967 | if (rval) { |
968 | DEBUG(printk("scsi(%ld): Failed mailbox send register test\n", | |
e315cd28 | 969 | vha->host_no)); |
0107109e AV |
970 | qla_printk(KERN_WARNING, ha, |
971 | "Failed mailbox send register test\n"); | |
972 | } else { | |
973 | /* Flag a successful rval */ | |
974 | rval = QLA_SUCCESS; | |
975 | } | |
976 | ||
977 | return rval; | |
978 | } | |
979 | ||
a7a167bf | 980 | void |
e315cd28 | 981 | qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) |
0107109e | 982 | { |
a7a167bf AV |
983 | int rval; |
984 | uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, | |
73208dfd | 985 | eft_size, fce_size, mq_size; |
df613b96 AV |
986 | dma_addr_t tc_dma; |
987 | void *tc; | |
e315cd28 | 988 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
989 | struct req_que *req = ha->req_q_map[0]; |
990 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
a7a167bf AV |
991 | |
992 | if (ha->fw_dump) { | |
993 | qla_printk(KERN_WARNING, ha, | |
994 | "Firmware dump previously allocated.\n"); | |
995 | return; | |
996 | } | |
d4e3e04d | 997 | |
0107109e | 998 | ha->fw_dumped = 0; |
73208dfd | 999 | fixed_size = mem_size = eft_size = fce_size = mq_size = 0; |
d4e3e04d | 1000 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { |
a7a167bf | 1001 | fixed_size = sizeof(struct qla2100_fw_dump); |
d4e3e04d | 1002 | } else if (IS_QLA23XX(ha)) { |
a7a167bf AV |
1003 | fixed_size = offsetof(struct qla2300_fw_dump, data_ram); |
1004 | mem_size = (ha->fw_memory_size - 0x11000 + 1) * | |
1005 | sizeof(uint16_t); | |
e428924c | 1006 | } else if (IS_FWI2_CAPABLE(ha)) { |
3a03eb79 AV |
1007 | if (IS_QLA81XX(ha)) |
1008 | fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); | |
1009 | else if (IS_QLA25XX(ha)) | |
1010 | fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); | |
1011 | else | |
1012 | fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); | |
a7a167bf AV |
1013 | mem_size = (ha->fw_memory_size - 0x100000 + 1) * |
1014 | sizeof(uint32_t); | |
73208dfd AC |
1015 | if (ha->mqenable) |
1016 | mq_size = sizeof(struct qla2xxx_mq_chain); | |
df613b96 | 1017 | /* Allocate memory for Fibre Channel Event Buffer. */ |
3a03eb79 | 1018 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)) |
436a7b11 | 1019 | goto try_eft; |
df613b96 AV |
1020 | |
1021 | tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, | |
1022 | GFP_KERNEL); | |
1023 | if (!tc) { | |
1024 | qla_printk(KERN_WARNING, ha, "Unable to allocate " | |
1025 | "(%d KB) for FCE.\n", FCE_SIZE / 1024); | |
17d98630 | 1026 | goto try_eft; |
df613b96 AV |
1027 | } |
1028 | ||
1029 | memset(tc, 0, FCE_SIZE); | |
e315cd28 | 1030 | rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, |
df613b96 AV |
1031 | ha->fce_mb, &ha->fce_bufs); |
1032 | if (rval) { | |
1033 | qla_printk(KERN_WARNING, ha, "Unable to initialize " | |
1034 | "FCE (%d).\n", rval); | |
1035 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, | |
1036 | tc_dma); | |
1037 | ha->flags.fce_enabled = 0; | |
17d98630 | 1038 | goto try_eft; |
df613b96 AV |
1039 | } |
1040 | ||
1041 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n", | |
1042 | FCE_SIZE / 1024); | |
1043 | ||
7d9dade3 | 1044 | fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; |
df613b96 AV |
1045 | ha->flags.fce_enabled = 1; |
1046 | ha->fce_dma = tc_dma; | |
1047 | ha->fce = tc; | |
436a7b11 AV |
1048 | try_eft: |
1049 | /* Allocate memory for Extended Trace Buffer. */ | |
1050 | tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, | |
1051 | GFP_KERNEL); | |
1052 | if (!tc) { | |
1053 | qla_printk(KERN_WARNING, ha, "Unable to allocate " | |
1054 | "(%d KB) for EFT.\n", EFT_SIZE / 1024); | |
1055 | goto cont_alloc; | |
1056 | } | |
1057 | ||
1058 | memset(tc, 0, EFT_SIZE); | |
e315cd28 | 1059 | rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); |
436a7b11 AV |
1060 | if (rval) { |
1061 | qla_printk(KERN_WARNING, ha, "Unable to initialize " | |
1062 | "EFT (%d).\n", rval); | |
1063 | dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, | |
1064 | tc_dma); | |
1065 | goto cont_alloc; | |
1066 | } | |
1067 | ||
1068 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n", | |
1069 | EFT_SIZE / 1024); | |
1070 | ||
1071 | eft_size = EFT_SIZE; | |
1072 | ha->eft_dma = tc_dma; | |
1073 | ha->eft = tc; | |
d4e3e04d | 1074 | } |
a7a167bf | 1075 | cont_alloc: |
73208dfd AC |
1076 | req_q_size = req->length * sizeof(request_t); |
1077 | rsp_q_size = rsp->length * sizeof(response_t); | |
a7a167bf AV |
1078 | |
1079 | dump_size = offsetof(struct qla2xxx_fw_dump, isp); | |
2afa19a9 | 1080 | dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; |
bb99de67 AV |
1081 | ha->chain_offset = dump_size; |
1082 | dump_size += mq_size + fce_size; | |
d4e3e04d AV |
1083 | |
1084 | ha->fw_dump = vmalloc(dump_size); | |
a7a167bf | 1085 | if (!ha->fw_dump) { |
0107109e | 1086 | qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for " |
d4e3e04d | 1087 | "firmware dump!!!\n", dump_size / 1024); |
a7a167bf AV |
1088 | |
1089 | if (ha->eft) { | |
1090 | dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, | |
1091 | ha->eft_dma); | |
1092 | ha->eft = NULL; | |
1093 | ha->eft_dma = 0; | |
1094 | } | |
1095 | return; | |
1096 | } | |
a7a167bf AV |
1097 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n", |
1098 | dump_size / 1024); | |
1099 | ||
1100 | ha->fw_dump_len = dump_size; | |
1101 | ha->fw_dump->signature[0] = 'Q'; | |
1102 | ha->fw_dump->signature[1] = 'L'; | |
1103 | ha->fw_dump->signature[2] = 'G'; | |
1104 | ha->fw_dump->signature[3] = 'C'; | |
1105 | ha->fw_dump->version = __constant_htonl(1); | |
1106 | ||
1107 | ha->fw_dump->fixed_size = htonl(fixed_size); | |
1108 | ha->fw_dump->mem_size = htonl(mem_size); | |
1109 | ha->fw_dump->req_q_size = htonl(req_q_size); | |
1110 | ha->fw_dump->rsp_q_size = htonl(rsp_q_size); | |
1111 | ||
1112 | ha->fw_dump->eft_size = htonl(eft_size); | |
1113 | ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); | |
1114 | ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); | |
1115 | ||
1116 | ha->fw_dump->header_size = | |
1117 | htonl(offsetof(struct qla2xxx_fw_dump, isp)); | |
0107109e AV |
1118 | } |
1119 | ||
18e7555a AV |
1120 | static int |
1121 | qla81xx_mpi_sync(scsi_qla_host_t *vha) | |
1122 | { | |
1123 | #define MPS_MASK 0xe0 | |
1124 | int rval; | |
1125 | uint16_t dc; | |
1126 | uint32_t dw; | |
1127 | struct qla_hw_data *ha = vha->hw; | |
1128 | ||
1129 | if (!IS_QLA81XX(vha->hw)) | |
1130 | return QLA_SUCCESS; | |
1131 | ||
1132 | rval = qla2x00_write_ram_word(vha, 0x7c00, 1); | |
1133 | if (rval != QLA_SUCCESS) { | |
1134 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1135 | "Sync-MPI: Unable to acquire semaphore.\n")); | |
1136 | goto done; | |
1137 | } | |
1138 | ||
1139 | pci_read_config_word(vha->hw->pdev, 0x54, &dc); | |
1140 | rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); | |
1141 | if (rval != QLA_SUCCESS) { | |
1142 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1143 | "Sync-MPI: Unable to read sync.\n")); | |
1144 | goto done_release; | |
1145 | } | |
1146 | ||
1147 | dc &= MPS_MASK; | |
1148 | if (dc == (dw & MPS_MASK)) | |
1149 | goto done_release; | |
1150 | ||
1151 | dw &= ~MPS_MASK; | |
1152 | dw |= dc; | |
1153 | rval = qla2x00_write_ram_word(vha, 0x7a15, dw); | |
1154 | if (rval != QLA_SUCCESS) { | |
1155 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1156 | "Sync-MPI: Unable to gain sync.\n")); | |
1157 | } | |
1158 | ||
1159 | done_release: | |
1160 | rval = qla2x00_write_ram_word(vha, 0x7c00, 0); | |
1161 | if (rval != QLA_SUCCESS) { | |
1162 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1163 | "Sync-MPI: Unable to release semaphore.\n")); | |
1164 | } | |
1165 | ||
1166 | done: | |
1167 | return rval; | |
1168 | } | |
1169 | ||
1da177e4 LT |
1170 | /** |
1171 | * qla2x00_setup_chip() - Load and start RISC firmware. | |
1172 | * @ha: HA context | |
1173 | * | |
1174 | * Returns 0 on success. | |
1175 | */ | |
1176 | static int | |
e315cd28 | 1177 | qla2x00_setup_chip(scsi_qla_host_t *vha) |
1da177e4 | 1178 | { |
0107109e AV |
1179 | int rval; |
1180 | uint32_t srisc_address = 0; | |
e315cd28 | 1181 | struct qla_hw_data *ha = vha->hw; |
3db0652e AV |
1182 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1183 | unsigned long flags; | |
dda772e8 | 1184 | uint16_t fw_major_version; |
3db0652e AV |
1185 | |
1186 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { | |
1187 | /* Disable SRAM, Instruction RAM and GP RAM parity. */ | |
1188 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1189 | WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); | |
1190 | RD_REG_WORD(®->hccr); | |
1191 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1192 | } | |
1da177e4 | 1193 | |
18e7555a AV |
1194 | qla81xx_mpi_sync(vha); |
1195 | ||
1da177e4 | 1196 | /* Load firmware sequences */ |
e315cd28 | 1197 | rval = ha->isp_ops->load_risc(vha, &srisc_address); |
0107109e | 1198 | if (rval == QLA_SUCCESS) { |
1da177e4 | 1199 | DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC " |
e315cd28 | 1200 | "code.\n", vha->host_no)); |
1da177e4 | 1201 | |
e315cd28 | 1202 | rval = qla2x00_verify_checksum(vha, srisc_address); |
1da177e4 LT |
1203 | if (rval == QLA_SUCCESS) { |
1204 | /* Start firmware execution. */ | |
1205 | DEBUG(printk("scsi(%ld): Checksum OK, start " | |
e315cd28 | 1206 | "firmware.\n", vha->host_no)); |
1da177e4 | 1207 | |
e315cd28 | 1208 | rval = qla2x00_execute_fw(vha, srisc_address); |
1da177e4 | 1209 | /* Retrieve firmware information. */ |
dda772e8 AV |
1210 | if (rval == QLA_SUCCESS) { |
1211 | fw_major_version = ha->fw_major_version; | |
ca9e9c3e | 1212 | rval = qla2x00_get_fw_version(vha, |
1da177e4 LT |
1213 | &ha->fw_major_version, |
1214 | &ha->fw_minor_version, | |
1215 | &ha->fw_subminor_version, | |
3a03eb79 | 1216 | &ha->fw_attributes, &ha->fw_memory_size, |
55a96158 AV |
1217 | ha->mpi_version, &ha->mpi_capabilities, |
1218 | ha->phy_version); | |
ca9e9c3e AV |
1219 | if (rval != QLA_SUCCESS) |
1220 | goto failed; | |
2c3dfe3f | 1221 | ha->flags.npiv_supported = 0; |
e315cd28 | 1222 | if (IS_QLA2XXX_MIDTYPE(ha) && |
946fb891 | 1223 | (ha->fw_attributes & BIT_2)) { |
2c3dfe3f | 1224 | ha->flags.npiv_supported = 1; |
4d0ea247 SJ |
1225 | if ((!ha->max_npiv_vports) || |
1226 | ((ha->max_npiv_vports + 1) % | |
eb66dc60 | 1227 | MIN_MULTI_ID_FABRIC)) |
4d0ea247 | 1228 | ha->max_npiv_vports = |
eb66dc60 | 1229 | MIN_MULTI_ID_FABRIC - 1; |
4d0ea247 | 1230 | } |
24a08138 AV |
1231 | qla2x00_get_resource_cnts(vha, NULL, |
1232 | &ha->fw_xcb_count, NULL, NULL, | |
f3a0a77e | 1233 | &ha->max_npiv_vports, NULL); |
d743de66 AV |
1234 | |
1235 | if (!fw_major_version && ql2xallocfwdump) | |
1236 | qla2x00_alloc_fw_dump(vha); | |
1da177e4 LT |
1237 | } |
1238 | } else { | |
1239 | DEBUG2(printk(KERN_INFO | |
1240 | "scsi(%ld): ISP Firmware failed checksum.\n", | |
e315cd28 | 1241 | vha->host_no)); |
1da177e4 LT |
1242 | } |
1243 | } | |
1244 | ||
3db0652e AV |
1245 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1246 | /* Enable proper parity. */ | |
1247 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1248 | if (IS_QLA2300(ha)) | |
1249 | /* SRAM parity */ | |
1250 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); | |
1251 | else | |
1252 | /* SRAM, Instruction RAM and GP RAM parity */ | |
1253 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); | |
1254 | RD_REG_WORD(®->hccr); | |
1255 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1256 | } | |
1257 | ||
1d2874de JC |
1258 | if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { |
1259 | uint32_t size; | |
1260 | ||
1261 | rval = qla81xx_fac_get_sector_size(vha, &size); | |
1262 | if (rval == QLA_SUCCESS) { | |
1263 | ha->flags.fac_supported = 1; | |
1264 | ha->fdt_block_size = size << 2; | |
1265 | } else { | |
1266 | qla_printk(KERN_ERR, ha, | |
1267 | "Unsupported FAC firmware (%d.%02d.%02d).\n", | |
1268 | ha->fw_major_version, ha->fw_minor_version, | |
1269 | ha->fw_subminor_version); | |
1270 | } | |
1271 | } | |
ca9e9c3e | 1272 | failed: |
1da177e4 LT |
1273 | if (rval) { |
1274 | DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n", | |
e315cd28 | 1275 | vha->host_no)); |
1da177e4 LT |
1276 | } |
1277 | ||
1278 | return (rval); | |
1279 | } | |
1280 | ||
1281 | /** | |
1282 | * qla2x00_init_response_q_entries() - Initializes response queue entries. | |
1283 | * @ha: HA context | |
1284 | * | |
1285 | * Beginning of request ring has initialization control block already built | |
1286 | * by nvram config routine. | |
1287 | * | |
1288 | * Returns 0 on success. | |
1289 | */ | |
73208dfd AC |
1290 | void |
1291 | qla2x00_init_response_q_entries(struct rsp_que *rsp) | |
1da177e4 LT |
1292 | { |
1293 | uint16_t cnt; | |
1294 | response_t *pkt; | |
1295 | ||
2afa19a9 AC |
1296 | rsp->ring_ptr = rsp->ring; |
1297 | rsp->ring_index = 0; | |
1298 | rsp->status_srb = NULL; | |
e315cd28 AC |
1299 | pkt = rsp->ring_ptr; |
1300 | for (cnt = 0; cnt < rsp->length; cnt++) { | |
1da177e4 LT |
1301 | pkt->signature = RESPONSE_PROCESSED; |
1302 | pkt++; | |
1303 | } | |
1da177e4 LT |
1304 | } |
1305 | ||
1306 | /** | |
1307 | * qla2x00_update_fw_options() - Read and process firmware options. | |
1308 | * @ha: HA context | |
1309 | * | |
1310 | * Returns 0 on success. | |
1311 | */ | |
abbd8870 | 1312 | void |
e315cd28 | 1313 | qla2x00_update_fw_options(scsi_qla_host_t *vha) |
1da177e4 LT |
1314 | { |
1315 | uint16_t swing, emphasis, tx_sens, rx_sens; | |
e315cd28 | 1316 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1317 | |
1318 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
e315cd28 | 1319 | qla2x00_get_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1320 | |
1321 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
1322 | return; | |
1323 | ||
1324 | /* Serial Link options. */ | |
1325 | DEBUG3(printk("scsi(%ld): Serial link options:\n", | |
e315cd28 | 1326 | vha->host_no)); |
1da177e4 LT |
1327 | DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options, |
1328 | sizeof(ha->fw_seriallink_options))); | |
1329 | ||
1330 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; | |
1331 | if (ha->fw_seriallink_options[3] & BIT_2) { | |
1332 | ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; | |
1333 | ||
1334 | /* 1G settings */ | |
1335 | swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); | |
1336 | emphasis = (ha->fw_seriallink_options[2] & | |
1337 | (BIT_4 | BIT_3)) >> 3; | |
1338 | tx_sens = ha->fw_seriallink_options[0] & | |
fa2a1ce5 | 1339 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1340 | rx_sens = (ha->fw_seriallink_options[0] & |
1341 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1342 | ha->fw_options[10] = (emphasis << 14) | (swing << 8); | |
1343 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1344 | if (rx_sens == 0x0) | |
1345 | rx_sens = 0x3; | |
1346 | ha->fw_options[10] |= (tx_sens << 4) | rx_sens; | |
1347 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1348 | ha->fw_options[10] |= BIT_5 | | |
1349 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1350 | (tx_sens & (BIT_1 | BIT_0)); | |
1351 | ||
1352 | /* 2G settings */ | |
1353 | swing = (ha->fw_seriallink_options[2] & | |
1354 | (BIT_7 | BIT_6 | BIT_5)) >> 5; | |
1355 | emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); | |
1356 | tx_sens = ha->fw_seriallink_options[1] & | |
fa2a1ce5 | 1357 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1358 | rx_sens = (ha->fw_seriallink_options[1] & |
1359 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1360 | ha->fw_options[11] = (emphasis << 14) | (swing << 8); | |
1361 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1362 | if (rx_sens == 0x0) | |
1363 | rx_sens = 0x3; | |
1364 | ha->fw_options[11] |= (tx_sens << 4) | rx_sens; | |
1365 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1366 | ha->fw_options[11] |= BIT_5 | | |
1367 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1368 | (tx_sens & (BIT_1 | BIT_0)); | |
1369 | } | |
1370 | ||
1371 | /* FCP2 options. */ | |
1372 | /* Return command IOCBs without waiting for an ABTS to complete. */ | |
1373 | ha->fw_options[3] |= BIT_13; | |
1374 | ||
1375 | /* LED scheme. */ | |
1376 | if (ha->flags.enable_led_scheme) | |
1377 | ha->fw_options[2] |= BIT_12; | |
1378 | ||
48c02fde | 1379 | /* Detect ISP6312. */ |
1380 | if (IS_QLA6312(ha)) | |
1381 | ha->fw_options[2] |= BIT_13; | |
1382 | ||
1da177e4 | 1383 | /* Update firmware options. */ |
e315cd28 | 1384 | qla2x00_set_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1385 | } |
1386 | ||
0107109e | 1387 | void |
e315cd28 | 1388 | qla24xx_update_fw_options(scsi_qla_host_t *vha) |
0107109e AV |
1389 | { |
1390 | int rval; | |
e315cd28 | 1391 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
1392 | |
1393 | /* Update Serial Link options. */ | |
f94097ed | 1394 | if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) |
0107109e AV |
1395 | return; |
1396 | ||
e315cd28 | 1397 | rval = qla2x00_set_serdes_params(vha, |
f94097ed | 1398 | le16_to_cpu(ha->fw_seriallink_options24[1]), |
1399 | le16_to_cpu(ha->fw_seriallink_options24[2]), | |
1400 | le16_to_cpu(ha->fw_seriallink_options24[3])); | |
0107109e AV |
1401 | if (rval != QLA_SUCCESS) { |
1402 | qla_printk(KERN_WARNING, ha, | |
1403 | "Unable to update Serial Link options (%x).\n", rval); | |
1404 | } | |
1405 | } | |
1406 | ||
abbd8870 | 1407 | void |
e315cd28 | 1408 | qla2x00_config_rings(struct scsi_qla_host *vha) |
abbd8870 | 1409 | { |
e315cd28 | 1410 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1411 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
73208dfd AC |
1412 | struct req_que *req = ha->req_q_map[0]; |
1413 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
abbd8870 AV |
1414 | |
1415 | /* Setup ring parameters in initialization control block. */ | |
1416 | ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1417 | ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1418 | ha->init_cb->request_q_length = cpu_to_le16(req->length); |
1419 | ha->init_cb->response_q_length = cpu_to_le16(rsp->length); | |
1420 | ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1421 | ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1422 | ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1423 | ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
abbd8870 AV |
1424 | |
1425 | WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); | |
1426 | WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); | |
1427 | WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); | |
1428 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); | |
1429 | RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ | |
1430 | } | |
1431 | ||
0107109e | 1432 | void |
e315cd28 | 1433 | qla24xx_config_rings(struct scsi_qla_host *vha) |
0107109e | 1434 | { |
e315cd28 | 1435 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1436 | device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); |
1437 | struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; | |
1438 | struct qla_msix_entry *msix; | |
0107109e | 1439 | struct init_cb_24xx *icb; |
73208dfd AC |
1440 | uint16_t rid = 0; |
1441 | struct req_que *req = ha->req_q_map[0]; | |
1442 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
0107109e | 1443 | |
73208dfd | 1444 | /* Setup ring parameters in initialization control block. */ |
0107109e AV |
1445 | icb = (struct init_cb_24xx *)ha->init_cb; |
1446 | icb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1447 | icb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1448 | icb->request_q_length = cpu_to_le16(req->length); |
1449 | icb->response_q_length = cpu_to_le16(rsp->length); | |
1450 | icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1451 | icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1452 | icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1453 | icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
0107109e | 1454 | |
73208dfd AC |
1455 | if (ha->mqenable) { |
1456 | icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); | |
1457 | icb->rid = __constant_cpu_to_le16(rid); | |
1458 | if (ha->flags.msix_enabled) { | |
1459 | msix = &ha->msix_entries[1]; | |
1460 | DEBUG2_17(printk(KERN_INFO | |
2afa19a9 | 1461 | "Registering vector 0x%x for base que\n", msix->entry)); |
73208dfd AC |
1462 | icb->msix = cpu_to_le16(msix->entry); |
1463 | } | |
1464 | /* Use alternate PCI bus number */ | |
1465 | if (MSB(rid)) | |
1466 | icb->firmware_options_2 |= | |
1467 | __constant_cpu_to_le32(BIT_19); | |
1468 | /* Use alternate PCI devfn */ | |
1469 | if (LSB(rid)) | |
1470 | icb->firmware_options_2 |= | |
1471 | __constant_cpu_to_le32(BIT_18); | |
1472 | ||
3155754a AC |
1473 | /* Use Disable MSIX Handshake mode for capable adapters */ |
1474 | if (IS_MSIX_NACK_CAPABLE(ha)) { | |
1475 | icb->firmware_options_2 &= | |
1476 | __constant_cpu_to_le32(~BIT_22); | |
1477 | ha->flags.disable_msix_handshake = 1; | |
1478 | qla_printk(KERN_INFO, ha, | |
1479 | "MSIX Handshake Disable Mode turned on\n"); | |
1480 | } else { | |
1481 | icb->firmware_options_2 |= | |
1482 | __constant_cpu_to_le32(BIT_22); | |
1483 | } | |
73208dfd | 1484 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); |
73208dfd AC |
1485 | |
1486 | WRT_REG_DWORD(®->isp25mq.req_q_in, 0); | |
1487 | WRT_REG_DWORD(®->isp25mq.req_q_out, 0); | |
1488 | WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); | |
1489 | WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); | |
1490 | } else { | |
1491 | WRT_REG_DWORD(®->isp24.req_q_in, 0); | |
1492 | WRT_REG_DWORD(®->isp24.req_q_out, 0); | |
1493 | WRT_REG_DWORD(®->isp24.rsp_q_in, 0); | |
1494 | WRT_REG_DWORD(®->isp24.rsp_q_out, 0); | |
1495 | } | |
1496 | /* PCI posting */ | |
1497 | RD_REG_DWORD(&ioreg->hccr); | |
0107109e AV |
1498 | } |
1499 | ||
1da177e4 LT |
1500 | /** |
1501 | * qla2x00_init_rings() - Initializes firmware. | |
1502 | * @ha: HA context | |
1503 | * | |
1504 | * Beginning of request ring has initialization control block already built | |
1505 | * by nvram config routine. | |
1506 | * | |
1507 | * Returns 0 on success. | |
1508 | */ | |
1509 | static int | |
e315cd28 | 1510 | qla2x00_init_rings(scsi_qla_host_t *vha) |
1da177e4 LT |
1511 | { |
1512 | int rval; | |
1513 | unsigned long flags = 0; | |
29bdccbe | 1514 | int cnt, que; |
e315cd28 | 1515 | struct qla_hw_data *ha = vha->hw; |
29bdccbe AC |
1516 | struct req_que *req; |
1517 | struct rsp_que *rsp; | |
1518 | struct scsi_qla_host *vp; | |
2c3dfe3f SJ |
1519 | struct mid_init_cb_24xx *mid_init_cb = |
1520 | (struct mid_init_cb_24xx *) ha->init_cb; | |
1da177e4 LT |
1521 | |
1522 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1523 | ||
1524 | /* Clear outstanding commands array. */ | |
2afa19a9 | 1525 | for (que = 0; que < ha->max_req_queues; que++) { |
29bdccbe AC |
1526 | req = ha->req_q_map[que]; |
1527 | if (!req) | |
1528 | continue; | |
2afa19a9 | 1529 | for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) |
29bdccbe | 1530 | req->outstanding_cmds[cnt] = NULL; |
1da177e4 | 1531 | |
2afa19a9 | 1532 | req->current_outstanding_cmd = 1; |
1da177e4 | 1533 | |
29bdccbe AC |
1534 | /* Initialize firmware. */ |
1535 | req->ring_ptr = req->ring; | |
1536 | req->ring_index = 0; | |
1537 | req->cnt = req->length; | |
1538 | } | |
1da177e4 | 1539 | |
2afa19a9 | 1540 | for (que = 0; que < ha->max_rsp_queues; que++) { |
29bdccbe AC |
1541 | rsp = ha->rsp_q_map[que]; |
1542 | if (!rsp) | |
1543 | continue; | |
29bdccbe AC |
1544 | /* Initialize response queue entries */ |
1545 | qla2x00_init_response_q_entries(rsp); | |
1546 | } | |
1da177e4 | 1547 | |
29bdccbe AC |
1548 | /* Clear RSCN queue. */ |
1549 | list_for_each_entry(vp, &ha->vp_list, list) { | |
1550 | vp->rscn_in_ptr = 0; | |
1551 | vp->rscn_out_ptr = 0; | |
1552 | } | |
e315cd28 | 1553 | ha->isp_ops->config_rings(vha); |
1da177e4 LT |
1554 | |
1555 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1556 | ||
1557 | /* Update any ISP specific firmware options before initialization. */ | |
e315cd28 | 1558 | ha->isp_ops->update_fw_options(vha); |
1da177e4 | 1559 | |
e315cd28 | 1560 | DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no)); |
2c3dfe3f | 1561 | |
605aa2bc LC |
1562 | if (ha->flags.npiv_supported) { |
1563 | if (ha->operating_mode == LOOP) | |
1564 | ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; | |
c48339de | 1565 | mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); |
605aa2bc LC |
1566 | } |
1567 | ||
24a08138 AV |
1568 | if (IS_FWI2_CAPABLE(ha)) { |
1569 | mid_init_cb->options = __constant_cpu_to_le16(BIT_1); | |
1570 | mid_init_cb->init_cb.execution_throttle = | |
1571 | cpu_to_le16(ha->fw_xcb_count); | |
1572 | } | |
2c3dfe3f | 1573 | |
e315cd28 | 1574 | rval = qla2x00_init_firmware(vha, ha->init_cb_size); |
1da177e4 LT |
1575 | if (rval) { |
1576 | DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n", | |
e315cd28 | 1577 | vha->host_no)); |
1da177e4 LT |
1578 | } else { |
1579 | DEBUG3(printk("scsi(%ld): Init firmware -- success.\n", | |
e315cd28 | 1580 | vha->host_no)); |
1da177e4 LT |
1581 | } |
1582 | ||
1583 | return (rval); | |
1584 | } | |
1585 | ||
1586 | /** | |
1587 | * qla2x00_fw_ready() - Waits for firmware ready. | |
1588 | * @ha: HA context | |
1589 | * | |
1590 | * Returns 0 on success. | |
1591 | */ | |
1592 | static int | |
e315cd28 | 1593 | qla2x00_fw_ready(scsi_qla_host_t *vha) |
1da177e4 LT |
1594 | { |
1595 | int rval; | |
4d4df193 | 1596 | unsigned long wtime, mtime, cs84xx_time; |
1da177e4 LT |
1597 | uint16_t min_wait; /* Minimum wait time if loop is down */ |
1598 | uint16_t wait_time; /* Wait time if loop is coming ready */ | |
656e8912 | 1599 | uint16_t state[5]; |
e315cd28 | 1600 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1601 | |
1602 | rval = QLA_SUCCESS; | |
1603 | ||
1604 | /* 20 seconds for loop down. */ | |
fa2a1ce5 | 1605 | min_wait = 20; |
1da177e4 LT |
1606 | |
1607 | /* | |
1608 | * Firmware should take at most one RATOV to login, plus 5 seconds for | |
1609 | * our own processing. | |
1610 | */ | |
1611 | if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { | |
1612 | wait_time = min_wait; | |
1613 | } | |
1614 | ||
1615 | /* Min wait time if loop down */ | |
1616 | mtime = jiffies + (min_wait * HZ); | |
1617 | ||
1618 | /* wait time before firmware ready */ | |
1619 | wtime = jiffies + (wait_time * HZ); | |
1620 | ||
1621 | /* Wait for ISP to finish LIP */ | |
e315cd28 | 1622 | if (!vha->flags.init_done) |
1da177e4 LT |
1623 | qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n"); |
1624 | ||
1625 | DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n", | |
e315cd28 | 1626 | vha->host_no)); |
1da177e4 LT |
1627 | |
1628 | do { | |
e315cd28 | 1629 | rval = qla2x00_get_firmware_state(vha, state); |
1da177e4 | 1630 | if (rval == QLA_SUCCESS) { |
4d4df193 | 1631 | if (state[0] < FSTATE_LOSS_OF_SYNC) { |
e315cd28 | 1632 | vha->device_flags &= ~DFLG_NO_CABLE; |
1da177e4 | 1633 | } |
4d4df193 HK |
1634 | if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { |
1635 | DEBUG16(printk("scsi(%ld): fw_state=%x " | |
e315cd28 | 1636 | "84xx=%x.\n", vha->host_no, state[0], |
4d4df193 HK |
1637 | state[2])); |
1638 | if ((state[2] & FSTATE_LOGGED_IN) && | |
1639 | (state[2] & FSTATE_WAITING_FOR_VERIFY)) { | |
1640 | DEBUG16(printk("scsi(%ld): Sending " | |
e315cd28 | 1641 | "verify iocb.\n", vha->host_no)); |
4d4df193 HK |
1642 | |
1643 | cs84xx_time = jiffies; | |
e315cd28 | 1644 | rval = qla84xx_init_chip(vha); |
4d4df193 HK |
1645 | if (rval != QLA_SUCCESS) |
1646 | break; | |
1647 | ||
1648 | /* Add time taken to initialize. */ | |
1649 | cs84xx_time = jiffies - cs84xx_time; | |
1650 | wtime += cs84xx_time; | |
1651 | mtime += cs84xx_time; | |
1652 | DEBUG16(printk("scsi(%ld): Increasing " | |
1653 | "wait time by %ld. New time %ld\n", | |
e315cd28 | 1654 | vha->host_no, cs84xx_time, wtime)); |
4d4df193 HK |
1655 | } |
1656 | } else if (state[0] == FSTATE_READY) { | |
1da177e4 | 1657 | DEBUG(printk("scsi(%ld): F/W Ready - OK \n", |
e315cd28 | 1658 | vha->host_no)); |
1da177e4 | 1659 | |
e315cd28 | 1660 | qla2x00_get_retry_cnt(vha, &ha->retry_count, |
1da177e4 LT |
1661 | &ha->login_timeout, &ha->r_a_tov); |
1662 | ||
1663 | rval = QLA_SUCCESS; | |
1664 | break; | |
1665 | } | |
1666 | ||
1667 | rval = QLA_FUNCTION_FAILED; | |
1668 | ||
e315cd28 | 1669 | if (atomic_read(&vha->loop_down_timer) && |
4d4df193 | 1670 | state[0] != FSTATE_READY) { |
1da177e4 | 1671 | /* Loop down. Timeout on min_wait for states |
fa2a1ce5 AV |
1672 | * other than Wait for Login. |
1673 | */ | |
1da177e4 LT |
1674 | if (time_after_eq(jiffies, mtime)) { |
1675 | qla_printk(KERN_INFO, ha, | |
1676 | "Cable is unplugged...\n"); | |
1677 | ||
e315cd28 | 1678 | vha->device_flags |= DFLG_NO_CABLE; |
1da177e4 LT |
1679 | break; |
1680 | } | |
1681 | } | |
1682 | } else { | |
1683 | /* Mailbox cmd failed. Timeout on min_wait. */ | |
1684 | if (time_after_eq(jiffies, mtime)) | |
1685 | break; | |
1686 | } | |
1687 | ||
1688 | if (time_after_eq(jiffies, wtime)) | |
1689 | break; | |
1690 | ||
1691 | /* Delay for a while */ | |
1692 | msleep(500); | |
1693 | ||
1694 | DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n", | |
e315cd28 | 1695 | vha->host_no, state[0], jiffies)); |
1da177e4 LT |
1696 | } while (1); |
1697 | ||
656e8912 AV |
1698 | DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n", |
1699 | vha->host_no, state[0], state[1], state[2], state[3], state[4], | |
1700 | jiffies)); | |
1da177e4 LT |
1701 | |
1702 | if (rval) { | |
1703 | DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n", | |
e315cd28 | 1704 | vha->host_no)); |
1da177e4 LT |
1705 | } |
1706 | ||
1707 | return (rval); | |
1708 | } | |
1709 | ||
1710 | /* | |
1711 | * qla2x00_configure_hba | |
1712 | * Setup adapter context. | |
1713 | * | |
1714 | * Input: | |
1715 | * ha = adapter state pointer. | |
1716 | * | |
1717 | * Returns: | |
1718 | * 0 = success | |
1719 | * | |
1720 | * Context: | |
1721 | * Kernel context. | |
1722 | */ | |
1723 | static int | |
e315cd28 | 1724 | qla2x00_configure_hba(scsi_qla_host_t *vha) |
1da177e4 LT |
1725 | { |
1726 | int rval; | |
1727 | uint16_t loop_id; | |
1728 | uint16_t topo; | |
2c3dfe3f | 1729 | uint16_t sw_cap; |
1da177e4 LT |
1730 | uint8_t al_pa; |
1731 | uint8_t area; | |
1732 | uint8_t domain; | |
1733 | char connect_type[22]; | |
e315cd28 | 1734 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1735 | |
1736 | /* Get host addresses. */ | |
e315cd28 | 1737 | rval = qla2x00_get_adapter_id(vha, |
2c3dfe3f | 1738 | &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); |
1da177e4 | 1739 | if (rval != QLA_SUCCESS) { |
e315cd28 | 1740 | if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || |
33135aa2 RA |
1741 | (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { |
1742 | DEBUG2(printk("%s(%ld) Loop is in a transition state\n", | |
e315cd28 | 1743 | __func__, vha->host_no)); |
33135aa2 RA |
1744 | } else { |
1745 | qla_printk(KERN_WARNING, ha, | |
1746 | "ERROR -- Unable to get host loop ID.\n"); | |
e315cd28 | 1747 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
33135aa2 | 1748 | } |
1da177e4 LT |
1749 | return (rval); |
1750 | } | |
1751 | ||
1752 | if (topo == 4) { | |
1753 | qla_printk(KERN_INFO, ha, | |
1754 | "Cannot get topology - retrying.\n"); | |
1755 | return (QLA_FUNCTION_FAILED); | |
1756 | } | |
1757 | ||
e315cd28 | 1758 | vha->loop_id = loop_id; |
1da177e4 LT |
1759 | |
1760 | /* initialize */ | |
1761 | ha->min_external_loopid = SNS_FIRST_LOOP_ID; | |
1762 | ha->operating_mode = LOOP; | |
2c3dfe3f | 1763 | ha->switch_cap = 0; |
1da177e4 LT |
1764 | |
1765 | switch (topo) { | |
1766 | case 0: | |
1767 | DEBUG3(printk("scsi(%ld): HBA in NL topology.\n", | |
e315cd28 | 1768 | vha->host_no)); |
1da177e4 LT |
1769 | ha->current_topology = ISP_CFG_NL; |
1770 | strcpy(connect_type, "(Loop)"); | |
1771 | break; | |
1772 | ||
1773 | case 1: | |
1774 | DEBUG3(printk("scsi(%ld): HBA in FL topology.\n", | |
e315cd28 | 1775 | vha->host_no)); |
2c3dfe3f | 1776 | ha->switch_cap = sw_cap; |
1da177e4 LT |
1777 | ha->current_topology = ISP_CFG_FL; |
1778 | strcpy(connect_type, "(FL_Port)"); | |
1779 | break; | |
1780 | ||
1781 | case 2: | |
1782 | DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n", | |
e315cd28 | 1783 | vha->host_no)); |
1da177e4 LT |
1784 | ha->operating_mode = P2P; |
1785 | ha->current_topology = ISP_CFG_N; | |
1786 | strcpy(connect_type, "(N_Port-to-N_Port)"); | |
1787 | break; | |
1788 | ||
1789 | case 3: | |
1790 | DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n", | |
e315cd28 | 1791 | vha->host_no)); |
2c3dfe3f | 1792 | ha->switch_cap = sw_cap; |
1da177e4 LT |
1793 | ha->operating_mode = P2P; |
1794 | ha->current_topology = ISP_CFG_F; | |
1795 | strcpy(connect_type, "(F_Port)"); | |
1796 | break; | |
1797 | ||
1798 | default: | |
1799 | DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. " | |
1800 | "Using NL.\n", | |
e315cd28 | 1801 | vha->host_no, topo)); |
1da177e4 LT |
1802 | ha->current_topology = ISP_CFG_NL; |
1803 | strcpy(connect_type, "(Loop)"); | |
1804 | break; | |
1805 | } | |
1806 | ||
1807 | /* Save Host port and loop ID. */ | |
1808 | /* byte order - Big Endian */ | |
e315cd28 AC |
1809 | vha->d_id.b.domain = domain; |
1810 | vha->d_id.b.area = area; | |
1811 | vha->d_id.b.al_pa = al_pa; | |
1da177e4 | 1812 | |
e315cd28 | 1813 | if (!vha->flags.init_done) |
1da177e4 LT |
1814 | qla_printk(KERN_INFO, ha, |
1815 | "Topology - %s, Host Loop address 0x%x\n", | |
e315cd28 | 1816 | connect_type, vha->loop_id); |
1da177e4 LT |
1817 | |
1818 | if (rval) { | |
e315cd28 | 1819 | DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no)); |
1da177e4 | 1820 | } else { |
e315cd28 | 1821 | DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no)); |
1da177e4 LT |
1822 | } |
1823 | ||
1824 | return(rval); | |
1825 | } | |
1826 | ||
9bb9fcf2 | 1827 | static inline void |
e315cd28 AC |
1828 | qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, |
1829 | char *def) | |
9bb9fcf2 AV |
1830 | { |
1831 | char *st, *en; | |
1832 | uint16_t index; | |
e315cd28 | 1833 | struct qla_hw_data *ha = vha->hw; |
ab671149 AV |
1834 | int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && |
1835 | !IS_QLA81XX(ha); | |
9bb9fcf2 AV |
1836 | |
1837 | if (memcmp(model, BINZERO, len) != 0) { | |
1838 | strncpy(ha->model_number, model, len); | |
1839 | st = en = ha->model_number; | |
1840 | en += len - 1; | |
1841 | while (en > st) { | |
1842 | if (*en != 0x20 && *en != 0x00) | |
1843 | break; | |
1844 | *en-- = '\0'; | |
1845 | } | |
1846 | ||
1847 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
1848 | if (use_tbl && |
1849 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 | 1850 | index < QLA_MODEL_NAMES) |
1ee27146 JC |
1851 | strncpy(ha->model_desc, |
1852 | qla2x00_model_name[index * 2 + 1], | |
1853 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
1854 | } else { |
1855 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
1856 | if (use_tbl && |
1857 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 AV |
1858 | index < QLA_MODEL_NAMES) { |
1859 | strcpy(ha->model_number, | |
1860 | qla2x00_model_name[index * 2]); | |
1ee27146 JC |
1861 | strncpy(ha->model_desc, |
1862 | qla2x00_model_name[index * 2 + 1], | |
1863 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
1864 | } else { |
1865 | strcpy(ha->model_number, def); | |
1866 | } | |
1867 | } | |
1ee27146 | 1868 | if (IS_FWI2_CAPABLE(ha)) |
e315cd28 | 1869 | qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, |
1ee27146 | 1870 | sizeof(ha->model_desc)); |
9bb9fcf2 AV |
1871 | } |
1872 | ||
4e08df3f DM |
1873 | /* On sparc systems, obtain port and node WWN from firmware |
1874 | * properties. | |
1875 | */ | |
e315cd28 | 1876 | static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) |
4e08df3f DM |
1877 | { |
1878 | #ifdef CONFIG_SPARC | |
e315cd28 | 1879 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 1880 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
1881 | struct device_node *dp = pci_device_to_OF_node(pdev); |
1882 | const u8 *val; | |
4e08df3f DM |
1883 | int len; |
1884 | ||
1885 | val = of_get_property(dp, "port-wwn", &len); | |
1886 | if (val && len >= WWN_SIZE) | |
1887 | memcpy(nv->port_name, val, WWN_SIZE); | |
1888 | ||
1889 | val = of_get_property(dp, "node-wwn", &len); | |
1890 | if (val && len >= WWN_SIZE) | |
1891 | memcpy(nv->node_name, val, WWN_SIZE); | |
1892 | #endif | |
1893 | } | |
1894 | ||
1da177e4 LT |
1895 | /* |
1896 | * NVRAM configuration for ISP 2xxx | |
1897 | * | |
1898 | * Input: | |
1899 | * ha = adapter block pointer. | |
1900 | * | |
1901 | * Output: | |
1902 | * initialization control block in response_ring | |
1903 | * host adapters parameters in host adapter block | |
1904 | * | |
1905 | * Returns: | |
1906 | * 0 = success. | |
1907 | */ | |
abbd8870 | 1908 | int |
e315cd28 | 1909 | qla2x00_nvram_config(scsi_qla_host_t *vha) |
1da177e4 | 1910 | { |
4e08df3f | 1911 | int rval; |
0107109e AV |
1912 | uint8_t chksum = 0; |
1913 | uint16_t cnt; | |
1914 | uint8_t *dptr1, *dptr2; | |
e315cd28 | 1915 | struct qla_hw_data *ha = vha->hw; |
0107109e | 1916 | init_cb_t *icb = ha->init_cb; |
281afe19 SJ |
1917 | nvram_t *nv = ha->nvram; |
1918 | uint8_t *ptr = ha->nvram; | |
3d71644c | 1919 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 1920 | |
4e08df3f DM |
1921 | rval = QLA_SUCCESS; |
1922 | ||
1da177e4 | 1923 | /* Determine NVRAM starting address. */ |
0107109e | 1924 | ha->nvram_size = sizeof(nvram_t); |
1da177e4 LT |
1925 | ha->nvram_base = 0; |
1926 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) | |
1927 | if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) | |
1928 | ha->nvram_base = 0x80; | |
1929 | ||
1930 | /* Get NVRAM data and calculate checksum. */ | |
e315cd28 | 1931 | ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); |
0107109e AV |
1932 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) |
1933 | chksum += *ptr++; | |
1da177e4 | 1934 | |
e315cd28 | 1935 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
281afe19 | 1936 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
1da177e4 LT |
1937 | |
1938 | /* Bad NVRAM data, set defaults parameters. */ | |
1939 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || | |
1940 | nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { | |
1941 | /* Reset NVRAM data. */ | |
1942 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
1943 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
1944 | nv->nvram_version); | |
4e08df3f DM |
1945 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " |
1946 | "invalid -- WWPN) defaults.\n"); | |
1947 | ||
1948 | /* | |
1949 | * Set default initialization control block. | |
1950 | */ | |
1951 | memset(nv, 0, ha->nvram_size); | |
1952 | nv->parameter_block_version = ICB_VERSION; | |
1953 | ||
1954 | if (IS_QLA23XX(ha)) { | |
1955 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
1956 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
1957 | nv->add_firmware_options[0] = BIT_5; | |
1958 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
1959 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
1960 | nv->special_options[1] = BIT_7; | |
1961 | } else if (IS_QLA2200(ha)) { | |
1962 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
1963 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
1964 | nv->add_firmware_options[0] = BIT_5; | |
1965 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
1966 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
1967 | } else if (IS_QLA2100(ha)) { | |
1968 | nv->firmware_options[0] = BIT_3 | BIT_1; | |
1969 | nv->firmware_options[1] = BIT_5; | |
1970 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
1971 | } | |
1972 | ||
1973 | nv->max_iocb_allocation = __constant_cpu_to_le16(256); | |
1974 | nv->execution_throttle = __constant_cpu_to_le16(16); | |
1975 | nv->retry_count = 8; | |
1976 | nv->retry_delay = 1; | |
1977 | ||
1978 | nv->port_name[0] = 33; | |
1979 | nv->port_name[3] = 224; | |
1980 | nv->port_name[4] = 139; | |
1981 | ||
e315cd28 | 1982 | qla2xxx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
1983 | |
1984 | nv->login_timeout = 4; | |
1985 | ||
1986 | /* | |
1987 | * Set default host adapter parameters | |
1988 | */ | |
1989 | nv->host_p[1] = BIT_2; | |
1990 | nv->reset_delay = 5; | |
1991 | nv->port_down_retry_count = 8; | |
1992 | nv->max_luns_per_target = __constant_cpu_to_le16(8); | |
1993 | nv->link_down_timeout = 60; | |
1994 | ||
1995 | rval = 1; | |
1da177e4 LT |
1996 | } |
1997 | ||
1998 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | |
1999 | /* | |
2000 | * The SN2 does not provide BIOS emulation which means you can't change | |
2001 | * potentially bogus BIOS settings. Force the use of default settings | |
2002 | * for link rate and frame size. Hope that the rest of the settings | |
2003 | * are valid. | |
2004 | */ | |
2005 | if (ia64_platform_is("sn2")) { | |
2006 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
2007 | if (IS_QLA23XX(ha)) | |
2008 | nv->special_options[1] = BIT_7; | |
2009 | } | |
2010 | #endif | |
2011 | ||
2012 | /* Reset Initialization control block */ | |
0107109e | 2013 | memset(icb, 0, ha->init_cb_size); |
1da177e4 LT |
2014 | |
2015 | /* | |
2016 | * Setup driver NVRAM options. | |
2017 | */ | |
2018 | nv->firmware_options[0] |= (BIT_6 | BIT_1); | |
2019 | nv->firmware_options[0] &= ~(BIT_5 | BIT_4); | |
2020 | nv->firmware_options[1] |= (BIT_5 | BIT_0); | |
2021 | nv->firmware_options[1] &= ~BIT_4; | |
2022 | ||
2023 | if (IS_QLA23XX(ha)) { | |
2024 | nv->firmware_options[0] |= BIT_2; | |
2025 | nv->firmware_options[0] &= ~BIT_3; | |
0107109e | 2026 | nv->add_firmware_options[1] |= BIT_5 | BIT_4; |
1da177e4 LT |
2027 | |
2028 | if (IS_QLA2300(ha)) { | |
2029 | if (ha->fb_rev == FPM_2310) { | |
2030 | strcpy(ha->model_number, "QLA2310"); | |
2031 | } else { | |
2032 | strcpy(ha->model_number, "QLA2300"); | |
2033 | } | |
2034 | } else { | |
e315cd28 | 2035 | qla2x00_set_model_info(vha, nv->model_number, |
9bb9fcf2 | 2036 | sizeof(nv->model_number), "QLA23xx"); |
1da177e4 LT |
2037 | } |
2038 | } else if (IS_QLA2200(ha)) { | |
2039 | nv->firmware_options[0] |= BIT_2; | |
2040 | /* | |
2041 | * 'Point-to-point preferred, else loop' is not a safe | |
2042 | * connection mode setting. | |
2043 | */ | |
2044 | if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == | |
2045 | (BIT_5 | BIT_4)) { | |
2046 | /* Force 'loop preferred, else point-to-point'. */ | |
2047 | nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); | |
2048 | nv->add_firmware_options[0] |= BIT_5; | |
2049 | } | |
2050 | strcpy(ha->model_number, "QLA22xx"); | |
2051 | } else /*if (IS_QLA2100(ha))*/ { | |
2052 | strcpy(ha->model_number, "QLA2100"); | |
2053 | } | |
2054 | ||
2055 | /* | |
2056 | * Copy over NVRAM RISC parameter block to initialization control block. | |
2057 | */ | |
2058 | dptr1 = (uint8_t *)icb; | |
2059 | dptr2 = (uint8_t *)&nv->parameter_block_version; | |
2060 | cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; | |
2061 | while (cnt--) | |
2062 | *dptr1++ = *dptr2++; | |
2063 | ||
2064 | /* Copy 2nd half. */ | |
2065 | dptr1 = (uint8_t *)icb->add_firmware_options; | |
2066 | cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; | |
2067 | while (cnt--) | |
2068 | *dptr1++ = *dptr2++; | |
2069 | ||
5341e868 AV |
2070 | /* Use alternate WWN? */ |
2071 | if (nv->host_p[1] & BIT_7) { | |
2072 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
2073 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
2074 | } | |
2075 | ||
1da177e4 LT |
2076 | /* Prepare nodename */ |
2077 | if ((icb->firmware_options[1] & BIT_6) == 0) { | |
2078 | /* | |
2079 | * Firmware will apply the following mask if the nodename was | |
2080 | * not provided. | |
2081 | */ | |
2082 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
2083 | icb->node_name[0] &= 0xF0; | |
2084 | } | |
2085 | ||
2086 | /* | |
2087 | * Set host adapter parameters. | |
2088 | */ | |
0181944f | 2089 | if (nv->host_p[0] & BIT_7) |
11010fec | 2090 | ql2xextended_error_logging = 1; |
1da177e4 LT |
2091 | ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); |
2092 | /* Always load RISC code on non ISP2[12]00 chips. */ | |
2093 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) | |
2094 | ha->flags.disable_risc_code_load = 0; | |
2095 | ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); | |
2096 | ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); | |
2097 | ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); | |
06c22bd1 | 2098 | ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; |
d4c760c2 | 2099 | ha->flags.disable_serdes = 0; |
1da177e4 LT |
2100 | |
2101 | ha->operating_mode = | |
2102 | (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
2103 | ||
2104 | memcpy(ha->fw_seriallink_options, nv->seriallink_options, | |
2105 | sizeof(ha->fw_seriallink_options)); | |
2106 | ||
2107 | /* save HBA serial number */ | |
2108 | ha->serial0 = icb->port_name[5]; | |
2109 | ha->serial1 = icb->port_name[6]; | |
2110 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
2111 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
2112 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
1da177e4 LT |
2113 | |
2114 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
2115 | ||
2116 | ha->retry_count = nv->retry_count; | |
2117 | ||
2118 | /* Set minimum login_timeout to 4 seconds. */ | |
2119 | if (nv->login_timeout < ql2xlogintimeout) | |
2120 | nv->login_timeout = ql2xlogintimeout; | |
2121 | if (nv->login_timeout < 4) | |
2122 | nv->login_timeout = 4; | |
2123 | ha->login_timeout = nv->login_timeout; | |
2124 | icb->login_timeout = nv->login_timeout; | |
2125 | ||
00a537b8 AV |
2126 | /* Set minimum RATOV to 100 tenths of a second. */ |
2127 | ha->r_a_tov = 100; | |
1da177e4 | 2128 | |
1da177e4 LT |
2129 | ha->loop_reset_delay = nv->reset_delay; |
2130 | ||
1da177e4 LT |
2131 | /* Link Down Timeout = 0: |
2132 | * | |
2133 | * When Port Down timer expires we will start returning | |
2134 | * I/O's to OS with "DID_NO_CONNECT". | |
2135 | * | |
2136 | * Link Down Timeout != 0: | |
2137 | * | |
2138 | * The driver waits for the link to come up after link down | |
2139 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
fa2a1ce5 | 2140 | */ |
1da177e4 LT |
2141 | if (nv->link_down_timeout == 0) { |
2142 | ha->loop_down_abort_time = | |
354d6b21 | 2143 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); |
1da177e4 LT |
2144 | } else { |
2145 | ha->link_down_timeout = nv->link_down_timeout; | |
2146 | ha->loop_down_abort_time = | |
2147 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
fa2a1ce5 | 2148 | } |
1da177e4 | 2149 | |
1da177e4 LT |
2150 | /* |
2151 | * Need enough time to try and get the port back. | |
2152 | */ | |
2153 | ha->port_down_retry_count = nv->port_down_retry_count; | |
2154 | if (qlport_down_retry) | |
2155 | ha->port_down_retry_count = qlport_down_retry; | |
2156 | /* Set login_retry_count */ | |
2157 | ha->login_retry_count = nv->retry_count; | |
2158 | if (ha->port_down_retry_count == nv->port_down_retry_count && | |
2159 | ha->port_down_retry_count > 3) | |
2160 | ha->login_retry_count = ha->port_down_retry_count; | |
2161 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
2162 | ha->login_retry_count = ha->port_down_retry_count; | |
2163 | if (ql2xloginretrycount) | |
2164 | ha->login_retry_count = ql2xloginretrycount; | |
2165 | ||
1da177e4 LT |
2166 | icb->lun_enables = __constant_cpu_to_le16(0); |
2167 | icb->command_resource_count = 0; | |
2168 | icb->immediate_notify_resource_count = 0; | |
2169 | icb->timeout = __constant_cpu_to_le16(0); | |
2170 | ||
2171 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
2172 | /* Enable RIO */ | |
2173 | icb->firmware_options[0] &= ~BIT_3; | |
2174 | icb->add_firmware_options[0] &= | |
2175 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2176 | icb->add_firmware_options[0] |= BIT_2; | |
2177 | icb->response_accumulation_timer = 3; | |
2178 | icb->interrupt_delay_timer = 5; | |
2179 | ||
e315cd28 | 2180 | vha->flags.process_response_queue = 1; |
1da177e4 | 2181 | } else { |
4fdfefe5 | 2182 | /* Enable ZIO. */ |
e315cd28 | 2183 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
2184 | ha->zio_mode = icb->add_firmware_options[0] & |
2185 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2186 | ha->zio_timer = icb->interrupt_delay_timer ? | |
2187 | icb->interrupt_delay_timer: 2; | |
2188 | } | |
1da177e4 LT |
2189 | icb->add_firmware_options[0] &= |
2190 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
e315cd28 | 2191 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 2192 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d | 2193 | ha->zio_mode = QLA_ZIO_MODE_6; |
2194 | ||
4fdfefe5 | 2195 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer " |
e315cd28 | 2196 | "delay (%d us).\n", vha->host_no, ha->zio_mode, |
4fdfefe5 | 2197 | ha->zio_timer * 100)); |
1da177e4 | 2198 | qla_printk(KERN_INFO, ha, |
4fdfefe5 AV |
2199 | "ZIO mode %d enabled; timer delay (%d us).\n", |
2200 | ha->zio_mode, ha->zio_timer * 100); | |
1da177e4 | 2201 | |
4fdfefe5 AV |
2202 | icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; |
2203 | icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; | |
e315cd28 | 2204 | vha->flags.process_response_queue = 1; |
1da177e4 LT |
2205 | } |
2206 | } | |
2207 | ||
4e08df3f DM |
2208 | if (rval) { |
2209 | DEBUG2_3(printk(KERN_WARNING | |
e315cd28 | 2210 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); |
4e08df3f DM |
2211 | } |
2212 | return (rval); | |
1da177e4 LT |
2213 | } |
2214 | ||
19a7b4ae JSEC |
2215 | static void |
2216 | qla2x00_rport_del(void *data) | |
2217 | { | |
2218 | fc_port_t *fcport = data; | |
d97994dc | 2219 | struct fc_rport *rport; |
d97994dc | 2220 | |
e315cd28 | 2221 | spin_lock_irq(fcport->vha->host->host_lock); |
ac280b67 | 2222 | rport = fcport->drport ? fcport->drport: fcport->rport; |
d97994dc | 2223 | fcport->drport = NULL; |
e315cd28 | 2224 | spin_unlock_irq(fcport->vha->host->host_lock); |
d97994dc | 2225 | if (rport) |
2226 | fc_remote_port_delete(rport); | |
19a7b4ae JSEC |
2227 | } |
2228 | ||
1da177e4 LT |
2229 | /** |
2230 | * qla2x00_alloc_fcport() - Allocate a generic fcport. | |
2231 | * @ha: HA context | |
2232 | * @flags: allocation flags | |
2233 | * | |
2234 | * Returns a pointer to the allocated fcport, or NULL, if none available. | |
2235 | */ | |
9a069e19 | 2236 | fc_port_t * |
e315cd28 | 2237 | qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) |
1da177e4 LT |
2238 | { |
2239 | fc_port_t *fcport; | |
2240 | ||
bbfbbbc1 MK |
2241 | fcport = kzalloc(sizeof(fc_port_t), flags); |
2242 | if (!fcport) | |
2243 | return NULL; | |
1da177e4 LT |
2244 | |
2245 | /* Setup fcport template structure. */ | |
e315cd28 AC |
2246 | fcport->vha = vha; |
2247 | fcport->vp_idx = vha->vp_idx; | |
1da177e4 LT |
2248 | fcport->port_type = FCT_UNKNOWN; |
2249 | fcport->loop_id = FC_NO_LOOP_ID; | |
1da177e4 | 2250 | atomic_set(&fcport->state, FCS_UNCONFIGURED); |
ad3e0eda | 2251 | fcport->supported_classes = FC_COS_UNSPECIFIED; |
1da177e4 | 2252 | |
bbfbbbc1 | 2253 | return fcport; |
1da177e4 LT |
2254 | } |
2255 | ||
2256 | /* | |
2257 | * qla2x00_configure_loop | |
2258 | * Updates Fibre Channel Device Database with what is actually on loop. | |
2259 | * | |
2260 | * Input: | |
2261 | * ha = adapter block pointer. | |
2262 | * | |
2263 | * Returns: | |
2264 | * 0 = success. | |
2265 | * 1 = error. | |
2266 | * 2 = database was full and device was not configured. | |
2267 | */ | |
2268 | static int | |
e315cd28 | 2269 | qla2x00_configure_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2270 | { |
2271 | int rval; | |
2272 | unsigned long flags, save_flags; | |
e315cd28 | 2273 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2274 | rval = QLA_SUCCESS; |
2275 | ||
2276 | /* Get Initiator ID */ | |
e315cd28 AC |
2277 | if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { |
2278 | rval = qla2x00_configure_hba(vha); | |
1da177e4 LT |
2279 | if (rval != QLA_SUCCESS) { |
2280 | DEBUG(printk("scsi(%ld): Unable to configure HBA.\n", | |
e315cd28 | 2281 | vha->host_no)); |
1da177e4 LT |
2282 | return (rval); |
2283 | } | |
2284 | } | |
2285 | ||
e315cd28 | 2286 | save_flags = flags = vha->dpc_flags; |
1da177e4 | 2287 | DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n", |
e315cd28 | 2288 | vha->host_no, flags)); |
1da177e4 LT |
2289 | |
2290 | /* | |
2291 | * If we have both an RSCN and PORT UPDATE pending then handle them | |
2292 | * both at the same time. | |
2293 | */ | |
e315cd28 AC |
2294 | clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
2295 | clear_bit(RSCN_UPDATE, &vha->dpc_flags); | |
1da177e4 | 2296 | |
3064ff39 MH |
2297 | qla2x00_get_data_rate(vha); |
2298 | ||
1da177e4 LT |
2299 | /* Determine what we need to do */ |
2300 | if (ha->current_topology == ISP_CFG_FL && | |
2301 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2302 | ||
e315cd28 | 2303 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2304 | set_bit(RSCN_UPDATE, &flags); |
2305 | ||
2306 | } else if (ha->current_topology == ISP_CFG_F && | |
2307 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2308 | ||
e315cd28 | 2309 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2310 | set_bit(RSCN_UPDATE, &flags); |
2311 | clear_bit(LOCAL_LOOP_UPDATE, &flags); | |
21333b48 AV |
2312 | |
2313 | } else if (ha->current_topology == ISP_CFG_N) { | |
2314 | clear_bit(RSCN_UPDATE, &flags); | |
1da177e4 | 2315 | |
e315cd28 | 2316 | } else if (!vha->flags.online || |
1da177e4 LT |
2317 | (test_bit(ABORT_ISP_ACTIVE, &flags))) { |
2318 | ||
e315cd28 | 2319 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2320 | set_bit(RSCN_UPDATE, &flags); |
2321 | set_bit(LOCAL_LOOP_UPDATE, &flags); | |
2322 | } | |
2323 | ||
2324 | if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { | |
e315cd28 | 2325 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) |
1da177e4 | 2326 | rval = QLA_FUNCTION_FAILED; |
e315cd28 AC |
2327 | else |
2328 | rval = qla2x00_configure_local_loop(vha); | |
1da177e4 LT |
2329 | } |
2330 | ||
2331 | if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { | |
e315cd28 | 2332 | if (LOOP_TRANSITION(vha)) |
1da177e4 | 2333 | rval = QLA_FUNCTION_FAILED; |
e315cd28 AC |
2334 | else |
2335 | rval = qla2x00_configure_fabric(vha); | |
1da177e4 LT |
2336 | } |
2337 | ||
2338 | if (rval == QLA_SUCCESS) { | |
e315cd28 AC |
2339 | if (atomic_read(&vha->loop_down_timer) || |
2340 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { | |
1da177e4 LT |
2341 | rval = QLA_FUNCTION_FAILED; |
2342 | } else { | |
e315cd28 | 2343 | atomic_set(&vha->loop_state, LOOP_READY); |
1da177e4 | 2344 | |
e315cd28 | 2345 | DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no)); |
1da177e4 LT |
2346 | } |
2347 | } | |
2348 | ||
2349 | if (rval) { | |
2350 | DEBUG2_3(printk("%s(%ld): *** FAILED ***\n", | |
e315cd28 | 2351 | __func__, vha->host_no)); |
1da177e4 LT |
2352 | } else { |
2353 | DEBUG3(printk("%s: exiting normally\n", __func__)); | |
2354 | } | |
2355 | ||
cc3ef7bc | 2356 | /* Restore state if a resync event occurred during processing */ |
e315cd28 | 2357 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
1da177e4 | 2358 | if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) |
e315cd28 | 2359 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
f4658b6c | 2360 | if (test_bit(RSCN_UPDATE, &save_flags)) { |
e315cd28 | 2361 | set_bit(RSCN_UPDATE, &vha->dpc_flags); |
f4658b6c AV |
2362 | vha->flags.rscn_queue_overflow = 1; |
2363 | } | |
1da177e4 LT |
2364 | } |
2365 | ||
2366 | return (rval); | |
2367 | } | |
2368 | ||
2369 | ||
2370 | ||
2371 | /* | |
2372 | * qla2x00_configure_local_loop | |
2373 | * Updates Fibre Channel Device Database with local loop devices. | |
2374 | * | |
2375 | * Input: | |
2376 | * ha = adapter block pointer. | |
2377 | * | |
2378 | * Returns: | |
2379 | * 0 = success. | |
2380 | */ | |
2381 | static int | |
e315cd28 | 2382 | qla2x00_configure_local_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2383 | { |
2384 | int rval, rval2; | |
2385 | int found_devs; | |
2386 | int found; | |
2387 | fc_port_t *fcport, *new_fcport; | |
2388 | ||
2389 | uint16_t index; | |
2390 | uint16_t entries; | |
2391 | char *id_iter; | |
2392 | uint16_t loop_id; | |
2393 | uint8_t domain, area, al_pa; | |
e315cd28 | 2394 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2395 | |
2396 | found_devs = 0; | |
2397 | new_fcport = NULL; | |
2398 | entries = MAX_FIBRE_DEVICES; | |
2399 | ||
e315cd28 AC |
2400 | DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no)); |
2401 | DEBUG3(qla2x00_get_fcal_position_map(vha, NULL)); | |
1da177e4 LT |
2402 | |
2403 | /* Get list of logged in devices. */ | |
2404 | memset(ha->gid_list, 0, GID_LIST_SIZE); | |
e315cd28 | 2405 | rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, |
1da177e4 LT |
2406 | &entries); |
2407 | if (rval != QLA_SUCCESS) | |
2408 | goto cleanup_allocation; | |
2409 | ||
2410 | DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n", | |
7640335e | 2411 | vha->host_no, entries)); |
1da177e4 LT |
2412 | DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list, |
2413 | entries * sizeof(struct gid_list_info))); | |
2414 | ||
2415 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2416 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 LT |
2417 | if (new_fcport == NULL) { |
2418 | rval = QLA_MEMORY_ALLOC_FAILED; | |
2419 | goto cleanup_allocation; | |
2420 | } | |
2421 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2422 | ||
2423 | /* | |
2424 | * Mark local devices that were present with FCF_DEVICE_LOST for now. | |
2425 | */ | |
e315cd28 | 2426 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2427 | if (atomic_read(&fcport->state) == FCS_ONLINE && |
2428 | fcport->port_type != FCT_BROADCAST && | |
2429 | (fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
2430 | ||
2431 | DEBUG(printk("scsi(%ld): Marking port lost, " | |
2432 | "loop_id=0x%04x\n", | |
e315cd28 | 2433 | vha->host_no, fcport->loop_id)); |
1da177e4 LT |
2434 | |
2435 | atomic_set(&fcport->state, FCS_DEVICE_LOST); | |
1da177e4 LT |
2436 | } |
2437 | } | |
2438 | ||
2439 | /* Add devices to port list. */ | |
2440 | id_iter = (char *)ha->gid_list; | |
2441 | for (index = 0; index < entries; index++) { | |
2442 | domain = ((struct gid_list_info *)id_iter)->domain; | |
2443 | area = ((struct gid_list_info *)id_iter)->area; | |
2444 | al_pa = ((struct gid_list_info *)id_iter)->al_pa; | |
abbd8870 | 2445 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
1da177e4 LT |
2446 | loop_id = (uint16_t) |
2447 | ((struct gid_list_info *)id_iter)->loop_id_2100; | |
abbd8870 | 2448 | else |
1da177e4 LT |
2449 | loop_id = le16_to_cpu( |
2450 | ((struct gid_list_info *)id_iter)->loop_id); | |
abbd8870 | 2451 | id_iter += ha->gid_list_info_size; |
1da177e4 LT |
2452 | |
2453 | /* Bypass reserved domain fields. */ | |
2454 | if ((domain & 0xf0) == 0xf0) | |
2455 | continue; | |
2456 | ||
2457 | /* Bypass if not same domain and area of adapter. */ | |
f7d289f6 | 2458 | if (area && domain && |
e315cd28 | 2459 | (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) |
1da177e4 LT |
2460 | continue; |
2461 | ||
2462 | /* Bypass invalid local loop ID. */ | |
2463 | if (loop_id > LAST_LOCAL_LOOP_ID) | |
2464 | continue; | |
2465 | ||
2466 | /* Fill in member data. */ | |
2467 | new_fcport->d_id.b.domain = domain; | |
2468 | new_fcport->d_id.b.area = area; | |
2469 | new_fcport->d_id.b.al_pa = al_pa; | |
2470 | new_fcport->loop_id = loop_id; | |
e315cd28 AC |
2471 | new_fcport->vp_idx = vha->vp_idx; |
2472 | rval2 = qla2x00_get_port_database(vha, new_fcport, 0); | |
1da177e4 LT |
2473 | if (rval2 != QLA_SUCCESS) { |
2474 | DEBUG2(printk("scsi(%ld): Failed to retrieve fcport " | |
2475 | "information -- get_port_database=%x, " | |
2476 | "loop_id=0x%04x\n", | |
e315cd28 | 2477 | vha->host_no, rval2, new_fcport->loop_id)); |
c9d02acf | 2478 | DEBUG2(printk("scsi(%ld): Scheduling resync...\n", |
e315cd28 AC |
2479 | vha->host_no)); |
2480 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
2481 | continue; |
2482 | } | |
2483 | ||
2484 | /* Check for matching device in port list. */ | |
2485 | found = 0; | |
2486 | fcport = NULL; | |
e315cd28 | 2487 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2488 | if (memcmp(new_fcport->port_name, fcport->port_name, |
2489 | WWN_SIZE)) | |
2490 | continue; | |
2491 | ||
ddb9b126 | 2492 | fcport->flags &= ~FCF_FABRIC_DEVICE; |
1da177e4 LT |
2493 | fcport->loop_id = new_fcport->loop_id; |
2494 | fcport->port_type = new_fcport->port_type; | |
2495 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2496 | memcpy(fcport->node_name, new_fcport->node_name, | |
2497 | WWN_SIZE); | |
2498 | ||
2499 | found++; | |
2500 | break; | |
2501 | } | |
2502 | ||
2503 | if (!found) { | |
2504 | /* New device, add to fcports list. */ | |
e315cd28 AC |
2505 | if (vha->vp_idx) { |
2506 | new_fcport->vha = vha; | |
2507 | new_fcport->vp_idx = vha->vp_idx; | |
2c3dfe3f | 2508 | } |
e315cd28 | 2509 | list_add_tail(&new_fcport->list, &vha->vp_fcports); |
1da177e4 LT |
2510 | |
2511 | /* Allocate a new replacement fcport. */ | |
2512 | fcport = new_fcport; | |
e315cd28 | 2513 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 LT |
2514 | if (new_fcport == NULL) { |
2515 | rval = QLA_MEMORY_ALLOC_FAILED; | |
2516 | goto cleanup_allocation; | |
2517 | } | |
2518 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2519 | } | |
2520 | ||
d8b45213 | 2521 | /* Base iIDMA settings on HBA port speed. */ |
a3cbdfad | 2522 | fcport->fp_speed = ha->link_data_rate; |
d8b45213 | 2523 | |
e315cd28 | 2524 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
2525 | |
2526 | found_devs++; | |
2527 | } | |
2528 | ||
2529 | cleanup_allocation: | |
c9475cb0 | 2530 | kfree(new_fcport); |
1da177e4 LT |
2531 | |
2532 | if (rval != QLA_SUCCESS) { | |
2533 | DEBUG2(printk("scsi(%ld): Configure local loop error exit: " | |
e315cd28 | 2534 | "rval=%x\n", vha->host_no, rval)); |
1da177e4 LT |
2535 | } |
2536 | ||
1da177e4 LT |
2537 | return (rval); |
2538 | } | |
2539 | ||
d8b45213 | 2540 | static void |
e315cd28 | 2541 | qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
d8b45213 AV |
2542 | { |
2543 | #define LS_UNKNOWN 2 | |
9f8fddee AV |
2544 | static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" }; |
2545 | char *link_speed; | |
d8b45213 | 2546 | int rval; |
1bb39548 | 2547 | uint16_t mb[4]; |
e315cd28 | 2548 | struct qla_hw_data *ha = vha->hw; |
d8b45213 | 2549 | |
c76f2c01 | 2550 | if (!IS_IIDMA_CAPABLE(ha)) |
d8b45213 AV |
2551 | return; |
2552 | ||
39bd9622 AV |
2553 | if (fcport->fp_speed == PORT_SPEED_UNKNOWN || |
2554 | fcport->fp_speed > ha->link_data_rate) | |
d8b45213 AV |
2555 | return; |
2556 | ||
e315cd28 | 2557 | rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, |
a3cbdfad | 2558 | mb); |
d8b45213 AV |
2559 | if (rval != QLA_SUCCESS) { |
2560 | DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA " | |
2561 | "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n", | |
e315cd28 | 2562 | vha->host_no, fcport->port_name[0], fcport->port_name[1], |
d8b45213 AV |
2563 | fcport->port_name[2], fcport->port_name[3], |
2564 | fcport->port_name[4], fcport->port_name[5], | |
2565 | fcport->port_name[6], fcport->port_name[7], rval, | |
a3cbdfad | 2566 | fcport->fp_speed, mb[0], mb[1])); |
d8b45213 | 2567 | } else { |
9f8fddee AV |
2568 | link_speed = link_speeds[LS_UNKNOWN]; |
2569 | if (fcport->fp_speed < 5) | |
2570 | link_speed = link_speeds[fcport->fp_speed]; | |
2571 | else if (fcport->fp_speed == 0x13) | |
2572 | link_speed = link_speeds[5]; | |
d8b45213 AV |
2573 | DEBUG2(qla_printk(KERN_INFO, ha, |
2574 | "iIDMA adjusted to %s GB/s on " | |
2575 | "%02x%02x%02x%02x%02x%02x%02x%02x.\n", | |
9f8fddee | 2576 | link_speed, fcport->port_name[0], |
d8b45213 AV |
2577 | fcport->port_name[1], fcport->port_name[2], |
2578 | fcport->port_name[3], fcport->port_name[4], | |
2579 | fcport->port_name[5], fcport->port_name[6], | |
2580 | fcport->port_name[7])); | |
2581 | } | |
2582 | } | |
2583 | ||
23be331d | 2584 | static void |
e315cd28 | 2585 | qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) |
8482e118 | 2586 | { |
2587 | struct fc_rport_identifiers rport_ids; | |
bdf79621 | 2588 | struct fc_rport *rport; |
e315cd28 | 2589 | struct qla_hw_data *ha = vha->hw; |
8482e118 | 2590 | |
ac280b67 | 2591 | qla2x00_rport_del(fcport); |
8482e118 | 2592 | |
f8b02a85 AV |
2593 | rport_ids.node_name = wwn_to_u64(fcport->node_name); |
2594 | rport_ids.port_name = wwn_to_u64(fcport->port_name); | |
8482e118 | 2595 | rport_ids.port_id = fcport->d_id.b.domain << 16 | |
2596 | fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; | |
77d74143 | 2597 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
e315cd28 | 2598 | fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); |
77d74143 AV |
2599 | if (!rport) { |
2600 | qla_printk(KERN_WARNING, ha, | |
2601 | "Unable to allocate fc remote port!\n"); | |
2602 | return; | |
2603 | } | |
e315cd28 | 2604 | spin_lock_irq(fcport->vha->host->host_lock); |
19a7b4ae | 2605 | *((fc_port_t **)rport->dd_data) = fcport; |
e315cd28 | 2606 | spin_unlock_irq(fcport->vha->host->host_lock); |
d97994dc | 2607 | |
ad3e0eda | 2608 | rport->supported_classes = fcport->supported_classes; |
77d74143 | 2609 | |
8482e118 | 2610 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
2611 | if (fcport->port_type == FCT_INITIATOR) | |
2612 | rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; | |
2613 | if (fcport->port_type == FCT_TARGET) | |
2614 | rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; | |
77d74143 | 2615 | fc_remote_port_rolechg(rport, rport_ids.roles); |
1da177e4 LT |
2616 | } |
2617 | ||
23be331d AB |
2618 | /* |
2619 | * qla2x00_update_fcport | |
2620 | * Updates device on list. | |
2621 | * | |
2622 | * Input: | |
2623 | * ha = adapter block pointer. | |
2624 | * fcport = port structure pointer. | |
2625 | * | |
2626 | * Return: | |
2627 | * 0 - Success | |
2628 | * BIT_0 - error | |
2629 | * | |
2630 | * Context: | |
2631 | * Kernel context. | |
2632 | */ | |
2633 | void | |
e315cd28 | 2634 | qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
23be331d | 2635 | { |
e315cd28 | 2636 | struct qla_hw_data *ha = vha->hw; |
2c3dfe3f | 2637 | |
e315cd28 | 2638 | fcport->vha = vha; |
23be331d | 2639 | fcport->login_retry = 0; |
e315cd28 | 2640 | fcport->port_login_retry_count = ha->port_down_retry_count * |
23be331d | 2641 | PORT_RETRY_TIME; |
e315cd28 | 2642 | atomic_set(&fcport->port_down_timer, ha->port_down_retry_count * |
23be331d AB |
2643 | PORT_RETRY_TIME); |
2644 | fcport->flags &= ~FCF_LOGIN_NEEDED; | |
2645 | ||
e315cd28 | 2646 | qla2x00_iidma_fcport(vha, fcport); |
23be331d AB |
2647 | |
2648 | atomic_set(&fcport->state, FCS_ONLINE); | |
2649 | ||
e315cd28 | 2650 | qla2x00_reg_remote_port(vha, fcport); |
23be331d AB |
2651 | } |
2652 | ||
1da177e4 LT |
2653 | /* |
2654 | * qla2x00_configure_fabric | |
2655 | * Setup SNS devices with loop ID's. | |
2656 | * | |
2657 | * Input: | |
2658 | * ha = adapter block pointer. | |
2659 | * | |
2660 | * Returns: | |
2661 | * 0 = success. | |
2662 | * BIT_0 = error | |
2663 | */ | |
2664 | static int | |
e315cd28 | 2665 | qla2x00_configure_fabric(scsi_qla_host_t *vha) |
1da177e4 LT |
2666 | { |
2667 | int rval, rval2; | |
2668 | fc_port_t *fcport, *fcptemp; | |
2669 | uint16_t next_loopid; | |
2670 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
0107109e | 2671 | uint16_t loop_id; |
1da177e4 | 2672 | LIST_HEAD(new_fcports); |
e315cd28 AC |
2673 | struct qla_hw_data *ha = vha->hw; |
2674 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
1da177e4 LT |
2675 | |
2676 | /* If FL port exists, then SNS is present */ | |
e428924c | 2677 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2678 | loop_id = NPH_F_PORT; |
2679 | else | |
2680 | loop_id = SNS_FL_PORT; | |
e315cd28 | 2681 | rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); |
1da177e4 LT |
2682 | if (rval != QLA_SUCCESS) { |
2683 | DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL " | |
e315cd28 | 2684 | "Port\n", vha->host_no)); |
1da177e4 | 2685 | |
e315cd28 | 2686 | vha->device_flags &= ~SWITCH_FOUND; |
1da177e4 LT |
2687 | return (QLA_SUCCESS); |
2688 | } | |
e315cd28 | 2689 | vha->device_flags |= SWITCH_FOUND; |
1da177e4 LT |
2690 | |
2691 | /* Mark devices that need re-synchronization. */ | |
e315cd28 | 2692 | rval2 = qla2x00_device_resync(vha); |
1da177e4 LT |
2693 | if (rval2 == QLA_RSCNS_HANDLED) { |
2694 | /* No point doing the scan, just continue. */ | |
2695 | return (QLA_SUCCESS); | |
2696 | } | |
2697 | do { | |
cca5335c AV |
2698 | /* FDMI support. */ |
2699 | if (ql2xfdmienable && | |
e315cd28 AC |
2700 | test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) |
2701 | qla2x00_fdmi_register(vha); | |
cca5335c | 2702 | |
1da177e4 | 2703 | /* Ensure we are logged into the SNS. */ |
e428924c | 2704 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2705 | loop_id = NPH_SNS; |
2706 | else | |
2707 | loop_id = SIMPLE_NAME_SERVER; | |
e315cd28 | 2708 | ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, |
abbd8870 | 2709 | 0xfc, mb, BIT_1 | BIT_0); |
1da177e4 LT |
2710 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
2711 | DEBUG2(qla_printk(KERN_INFO, ha, | |
2712 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
0107109e | 2713 | "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id, |
1da177e4 LT |
2714 | mb[0], mb[1], mb[2], mb[6], mb[7])); |
2715 | return (QLA_SUCCESS); | |
2716 | } | |
2717 | ||
e315cd28 AC |
2718 | if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { |
2719 | if (qla2x00_rft_id(vha)) { | |
1da177e4 LT |
2720 | /* EMPTY */ |
2721 | DEBUG2(printk("scsi(%ld): Register FC-4 " | |
e315cd28 | 2722 | "TYPE failed.\n", vha->host_no)); |
1da177e4 | 2723 | } |
e315cd28 | 2724 | if (qla2x00_rff_id(vha)) { |
1da177e4 LT |
2725 | /* EMPTY */ |
2726 | DEBUG2(printk("scsi(%ld): Register FC-4 " | |
e315cd28 | 2727 | "Features failed.\n", vha->host_no)); |
1da177e4 | 2728 | } |
e315cd28 | 2729 | if (qla2x00_rnn_id(vha)) { |
1da177e4 LT |
2730 | /* EMPTY */ |
2731 | DEBUG2(printk("scsi(%ld): Register Node Name " | |
e315cd28 AC |
2732 | "failed.\n", vha->host_no)); |
2733 | } else if (qla2x00_rsnn_nn(vha)) { | |
1da177e4 LT |
2734 | /* EMPTY */ |
2735 | DEBUG2(printk("scsi(%ld): Register Symbolic " | |
e315cd28 | 2736 | "Node Name failed.\n", vha->host_no)); |
1da177e4 LT |
2737 | } |
2738 | } | |
2739 | ||
e315cd28 | 2740 | rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); |
1da177e4 LT |
2741 | if (rval != QLA_SUCCESS) |
2742 | break; | |
2743 | ||
2744 | /* | |
2745 | * Logout all previous fabric devices marked lost, except | |
f08b7251 | 2746 | * FCP2 devices. |
1da177e4 | 2747 | */ |
e315cd28 AC |
2748 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
2749 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2750 | break; |
2751 | ||
2752 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) | |
2753 | continue; | |
2754 | ||
2755 | if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { | |
e315cd28 | 2756 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 2757 | ql2xplogiabsentdevice, 0); |
1da177e4 | 2758 | if (fcport->loop_id != FC_NO_LOOP_ID && |
f08b7251 | 2759 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
1da177e4 LT |
2760 | fcport->port_type != FCT_INITIATOR && |
2761 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 2762 | ha->isp_ops->fabric_logout(vha, |
1c7c6357 AV |
2763 | fcport->loop_id, |
2764 | fcport->d_id.b.domain, | |
2765 | fcport->d_id.b.area, | |
2766 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
2767 | fcport->loop_id = FC_NO_LOOP_ID; |
2768 | } | |
2769 | } | |
2770 | } | |
2771 | ||
2772 | /* Starting free loop ID. */ | |
e315cd28 | 2773 | next_loopid = ha->min_external_loopid; |
1da177e4 LT |
2774 | |
2775 | /* | |
2776 | * Scan through our port list and login entries that need to be | |
2777 | * logged in. | |
2778 | */ | |
e315cd28 AC |
2779 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
2780 | if (atomic_read(&vha->loop_down_timer) || | |
2781 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2782 | break; |
2783 | ||
2784 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || | |
2785 | (fcport->flags & FCF_LOGIN_NEEDED) == 0) | |
2786 | continue; | |
2787 | ||
2788 | if (fcport->loop_id == FC_NO_LOOP_ID) { | |
2789 | fcport->loop_id = next_loopid; | |
d4486fd6 | 2790 | rval = qla2x00_find_new_loop_id( |
e315cd28 | 2791 | base_vha, fcport); |
1da177e4 LT |
2792 | if (rval != QLA_SUCCESS) { |
2793 | /* Ran out of IDs to use */ | |
2794 | break; | |
2795 | } | |
2796 | } | |
1da177e4 | 2797 | /* Login and update database */ |
e315cd28 | 2798 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
1da177e4 LT |
2799 | } |
2800 | ||
2801 | /* Exit if out of loop IDs. */ | |
2802 | if (rval != QLA_SUCCESS) { | |
2803 | break; | |
2804 | } | |
2805 | ||
2806 | /* | |
2807 | * Login and add the new devices to our port list. | |
2808 | */ | |
2809 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
e315cd28 AC |
2810 | if (atomic_read(&vha->loop_down_timer) || |
2811 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2812 | break; |
2813 | ||
2814 | /* Find a new loop ID to use. */ | |
2815 | fcport->loop_id = next_loopid; | |
e315cd28 | 2816 | rval = qla2x00_find_new_loop_id(base_vha, fcport); |
1da177e4 LT |
2817 | if (rval != QLA_SUCCESS) { |
2818 | /* Ran out of IDs to use */ | |
2819 | break; | |
2820 | } | |
2821 | ||
bdf79621 | 2822 | /* Login and update database */ |
e315cd28 AC |
2823 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
2824 | ||
2825 | if (vha->vp_idx) { | |
2826 | fcport->vha = vha; | |
2827 | fcport->vp_idx = vha->vp_idx; | |
2828 | } | |
2829 | list_move_tail(&fcport->list, &vha->vp_fcports); | |
1da177e4 LT |
2830 | } |
2831 | } while (0); | |
2832 | ||
2833 | /* Free all new device structures not processed. */ | |
2834 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
2835 | list_del(&fcport->list); | |
2836 | kfree(fcport); | |
2837 | } | |
2838 | ||
2839 | if (rval) { | |
2840 | DEBUG2(printk("scsi(%ld): Configure fabric error exit: " | |
e315cd28 | 2841 | "rval=%d\n", vha->host_no, rval)); |
1da177e4 LT |
2842 | } |
2843 | ||
2844 | return (rval); | |
2845 | } | |
2846 | ||
2847 | ||
2848 | /* | |
2849 | * qla2x00_find_all_fabric_devs | |
2850 | * | |
2851 | * Input: | |
2852 | * ha = adapter block pointer. | |
2853 | * dev = database device entry pointer. | |
2854 | * | |
2855 | * Returns: | |
2856 | * 0 = success. | |
2857 | * | |
2858 | * Context: | |
2859 | * Kernel context. | |
2860 | */ | |
2861 | static int | |
e315cd28 AC |
2862 | qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, |
2863 | struct list_head *new_fcports) | |
1da177e4 LT |
2864 | { |
2865 | int rval; | |
2866 | uint16_t loop_id; | |
2867 | fc_port_t *fcport, *new_fcport, *fcptemp; | |
2868 | int found; | |
2869 | ||
2870 | sw_info_t *swl; | |
2871 | int swl_idx; | |
2872 | int first_dev, last_dev; | |
2873 | port_id_t wrap, nxt_d_id; | |
e315cd28 AC |
2874 | struct qla_hw_data *ha = vha->hw; |
2875 | struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); | |
ee546b6e | 2876 | struct scsi_qla_host *tvp; |
1da177e4 LT |
2877 | |
2878 | rval = QLA_SUCCESS; | |
2879 | ||
2880 | /* Try GID_PT to get device list, else GAN. */ | |
4b89258c | 2881 | swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL); |
bbfbbbc1 | 2882 | if (!swl) { |
1da177e4 LT |
2883 | /*EMPTY*/ |
2884 | DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback " | |
e315cd28 | 2885 | "on GA_NXT\n", vha->host_no)); |
1da177e4 | 2886 | } else { |
e315cd28 | 2887 | if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
2888 | kfree(swl); |
2889 | swl = NULL; | |
e315cd28 | 2890 | } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
2891 | kfree(swl); |
2892 | swl = NULL; | |
e315cd28 | 2893 | } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
2894 | kfree(swl); |
2895 | swl = NULL; | |
e5896bd5 | 2896 | } else if (ql2xiidmaenable && |
e315cd28 AC |
2897 | qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { |
2898 | qla2x00_gpsc(vha, swl); | |
1da177e4 LT |
2899 | } |
2900 | } | |
2901 | swl_idx = 0; | |
2902 | ||
2903 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2904 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 2905 | if (new_fcport == NULL) { |
c9475cb0 | 2906 | kfree(swl); |
1da177e4 LT |
2907 | return (QLA_MEMORY_ALLOC_FAILED); |
2908 | } | |
2909 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
2910 | /* Set start port ID scan at adapter ID. */ |
2911 | first_dev = 1; | |
2912 | last_dev = 0; | |
2913 | ||
2914 | /* Starting free loop ID. */ | |
e315cd28 AC |
2915 | loop_id = ha->min_external_loopid; |
2916 | for (; loop_id <= ha->max_loop_id; loop_id++) { | |
2917 | if (qla2x00_is_reserved_id(vha, loop_id)) | |
1da177e4 LT |
2918 | continue; |
2919 | ||
bb2d52b2 AV |
2920 | if (atomic_read(&vha->loop_down_timer) || |
2921 | LOOP_TRANSITION(vha)) { | |
2922 | atomic_set(&vha->loop_down_timer, 0); | |
2923 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
2924 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1da177e4 | 2925 | break; |
bb2d52b2 | 2926 | } |
1da177e4 LT |
2927 | |
2928 | if (swl != NULL) { | |
2929 | if (last_dev) { | |
2930 | wrap.b24 = new_fcport->d_id.b24; | |
2931 | } else { | |
2932 | new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; | |
2933 | memcpy(new_fcport->node_name, | |
2934 | swl[swl_idx].node_name, WWN_SIZE); | |
2935 | memcpy(new_fcport->port_name, | |
2936 | swl[swl_idx].port_name, WWN_SIZE); | |
d8b45213 AV |
2937 | memcpy(new_fcport->fabric_port_name, |
2938 | swl[swl_idx].fabric_port_name, WWN_SIZE); | |
2939 | new_fcport->fp_speed = swl[swl_idx].fp_speed; | |
1da177e4 LT |
2940 | |
2941 | if (swl[swl_idx].d_id.b.rsvd_1 != 0) { | |
2942 | last_dev = 1; | |
2943 | } | |
2944 | swl_idx++; | |
2945 | } | |
2946 | } else { | |
2947 | /* Send GA_NXT to the switch */ | |
e315cd28 | 2948 | rval = qla2x00_ga_nxt(vha, new_fcport); |
1da177e4 LT |
2949 | if (rval != QLA_SUCCESS) { |
2950 | qla_printk(KERN_WARNING, ha, | |
2951 | "SNS scan failed -- assuming zero-entry " | |
2952 | "result...\n"); | |
2953 | list_for_each_entry_safe(fcport, fcptemp, | |
2954 | new_fcports, list) { | |
2955 | list_del(&fcport->list); | |
2956 | kfree(fcport); | |
2957 | } | |
2958 | rval = QLA_SUCCESS; | |
2959 | break; | |
2960 | } | |
2961 | } | |
2962 | ||
2963 | /* If wrap on switch device list, exit. */ | |
2964 | if (first_dev) { | |
2965 | wrap.b24 = new_fcport->d_id.b24; | |
2966 | first_dev = 0; | |
2967 | } else if (new_fcport->d_id.b24 == wrap.b24) { | |
2968 | DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n", | |
e315cd28 | 2969 | vha->host_no, new_fcport->d_id.b.domain, |
1da177e4 LT |
2970 | new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa)); |
2971 | break; | |
2972 | } | |
2973 | ||
2c3dfe3f | 2974 | /* Bypass if same physical adapter. */ |
e315cd28 | 2975 | if (new_fcport->d_id.b24 == base_vha->d_id.b24) |
1da177e4 LT |
2976 | continue; |
2977 | ||
2c3dfe3f | 2978 | /* Bypass virtual ports of the same host. */ |
e315cd28 AC |
2979 | found = 0; |
2980 | if (ha->num_vhosts) { | |
ee546b6e | 2981 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
2982 | if (new_fcport->d_id.b24 == vp->d_id.b24) { |
2983 | found = 1; | |
2c3dfe3f | 2984 | break; |
e315cd28 | 2985 | } |
2c3dfe3f | 2986 | } |
e315cd28 | 2987 | if (found) |
2c3dfe3f SJ |
2988 | continue; |
2989 | } | |
2990 | ||
f7d289f6 AV |
2991 | /* Bypass if same domain and area of adapter. */ |
2992 | if (((new_fcport->d_id.b24 & 0xffff00) == | |
e315cd28 | 2993 | (vha->d_id.b24 & 0xffff00)) && ha->current_topology == |
f7d289f6 AV |
2994 | ISP_CFG_FL) |
2995 | continue; | |
2996 | ||
1da177e4 LT |
2997 | /* Bypass reserved domain fields. */ |
2998 | if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) | |
2999 | continue; | |
3000 | ||
3001 | /* Locate matching device in database. */ | |
3002 | found = 0; | |
e315cd28 | 3003 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
3004 | if (memcmp(new_fcport->port_name, fcport->port_name, |
3005 | WWN_SIZE)) | |
3006 | continue; | |
3007 | ||
3008 | found++; | |
3009 | ||
d8b45213 AV |
3010 | /* Update port state. */ |
3011 | memcpy(fcport->fabric_port_name, | |
3012 | new_fcport->fabric_port_name, WWN_SIZE); | |
3013 | fcport->fp_speed = new_fcport->fp_speed; | |
3014 | ||
1da177e4 LT |
3015 | /* |
3016 | * If address the same and state FCS_ONLINE, nothing | |
3017 | * changed. | |
3018 | */ | |
3019 | if (fcport->d_id.b24 == new_fcport->d_id.b24 && | |
3020 | atomic_read(&fcport->state) == FCS_ONLINE) { | |
3021 | break; | |
3022 | } | |
3023 | ||
3024 | /* | |
3025 | * If device was not a fabric device before. | |
3026 | */ | |
3027 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
3028 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3029 | fcport->loop_id = FC_NO_LOOP_ID; | |
3030 | fcport->flags |= (FCF_FABRIC_DEVICE | | |
3031 | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
3032 | break; |
3033 | } | |
3034 | ||
3035 | /* | |
3036 | * Port ID changed or device was marked to be updated; | |
3037 | * Log it out if still logged in and mark it for | |
3038 | * relogin later. | |
3039 | */ | |
3040 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3041 | fcport->flags |= FCF_LOGIN_NEEDED; | |
3042 | if (fcport->loop_id != FC_NO_LOOP_ID && | |
f08b7251 | 3043 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
1da177e4 LT |
3044 | fcport->port_type != FCT_INITIATOR && |
3045 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 3046 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3047 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3048 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
3049 | fcport->loop_id = FC_NO_LOOP_ID; |
3050 | } | |
3051 | ||
3052 | break; | |
3053 | } | |
3054 | ||
3055 | if (found) | |
3056 | continue; | |
1da177e4 LT |
3057 | /* If device was not in our fcports list, then add it. */ |
3058 | list_add_tail(&new_fcport->list, new_fcports); | |
3059 | ||
3060 | /* Allocate a new replacement fcport. */ | |
3061 | nxt_d_id.b24 = new_fcport->d_id.b24; | |
e315cd28 | 3062 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 3063 | if (new_fcport == NULL) { |
c9475cb0 | 3064 | kfree(swl); |
1da177e4 LT |
3065 | return (QLA_MEMORY_ALLOC_FAILED); |
3066 | } | |
3067 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
3068 | new_fcport->d_id.b24 = nxt_d_id.b24; | |
3069 | } | |
3070 | ||
c9475cb0 JJ |
3071 | kfree(swl); |
3072 | kfree(new_fcport); | |
1da177e4 | 3073 | |
1da177e4 LT |
3074 | return (rval); |
3075 | } | |
3076 | ||
3077 | /* | |
3078 | * qla2x00_find_new_loop_id | |
3079 | * Scan through our port list and find a new usable loop ID. | |
3080 | * | |
3081 | * Input: | |
3082 | * ha: adapter state pointer. | |
3083 | * dev: port structure pointer. | |
3084 | * | |
3085 | * Returns: | |
3086 | * qla2x00 local function return status code. | |
3087 | * | |
3088 | * Context: | |
3089 | * Kernel context. | |
3090 | */ | |
413975a0 | 3091 | static int |
e315cd28 | 3092 | qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) |
1da177e4 LT |
3093 | { |
3094 | int rval; | |
3095 | int found; | |
3096 | fc_port_t *fcport; | |
3097 | uint16_t first_loop_id; | |
e315cd28 AC |
3098 | struct qla_hw_data *ha = vha->hw; |
3099 | struct scsi_qla_host *vp; | |
ee546b6e | 3100 | struct scsi_qla_host *tvp; |
1da177e4 LT |
3101 | |
3102 | rval = QLA_SUCCESS; | |
3103 | ||
3104 | /* Save starting loop ID. */ | |
3105 | first_loop_id = dev->loop_id; | |
3106 | ||
3107 | for (;;) { | |
3108 | /* Skip loop ID if already used by adapter. */ | |
e315cd28 | 3109 | if (dev->loop_id == vha->loop_id) |
1da177e4 | 3110 | dev->loop_id++; |
1da177e4 LT |
3111 | |
3112 | /* Skip reserved loop IDs. */ | |
e315cd28 | 3113 | while (qla2x00_is_reserved_id(vha, dev->loop_id)) |
1da177e4 | 3114 | dev->loop_id++; |
1da177e4 LT |
3115 | |
3116 | /* Reset loop ID if passed the end. */ | |
e315cd28 | 3117 | if (dev->loop_id > ha->max_loop_id) { |
1da177e4 LT |
3118 | /* first loop ID. */ |
3119 | dev->loop_id = ha->min_external_loopid; | |
3120 | } | |
3121 | ||
3122 | /* Check for loop ID being already in use. */ | |
3123 | found = 0; | |
3124 | fcport = NULL; | |
ee546b6e | 3125 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3126 | list_for_each_entry(fcport, &vp->vp_fcports, list) { |
3127 | if (fcport->loop_id == dev->loop_id && | |
3128 | fcport != dev) { | |
3129 | /* ID possibly in use */ | |
3130 | found++; | |
3131 | break; | |
3132 | } | |
1da177e4 | 3133 | } |
e315cd28 AC |
3134 | if (found) |
3135 | break; | |
1da177e4 LT |
3136 | } |
3137 | ||
3138 | /* If not in use then it is free to use. */ | |
3139 | if (!found) { | |
3140 | break; | |
3141 | } | |
3142 | ||
3143 | /* ID in use. Try next value. */ | |
3144 | dev->loop_id++; | |
3145 | ||
3146 | /* If wrap around. No free ID to use. */ | |
3147 | if (dev->loop_id == first_loop_id) { | |
3148 | dev->loop_id = FC_NO_LOOP_ID; | |
3149 | rval = QLA_FUNCTION_FAILED; | |
3150 | break; | |
3151 | } | |
3152 | } | |
3153 | ||
3154 | return (rval); | |
3155 | } | |
3156 | ||
3157 | /* | |
3158 | * qla2x00_device_resync | |
3159 | * Marks devices in the database that needs resynchronization. | |
3160 | * | |
3161 | * Input: | |
3162 | * ha = adapter block pointer. | |
3163 | * | |
3164 | * Context: | |
3165 | * Kernel context. | |
3166 | */ | |
3167 | static int | |
e315cd28 | 3168 | qla2x00_device_resync(scsi_qla_host_t *vha) |
1da177e4 LT |
3169 | { |
3170 | int rval; | |
1da177e4 LT |
3171 | uint32_t mask; |
3172 | fc_port_t *fcport; | |
3173 | uint32_t rscn_entry; | |
3174 | uint8_t rscn_out_iter; | |
3175 | uint8_t format; | |
3176 | port_id_t d_id; | |
3177 | ||
3178 | rval = QLA_RSCNS_HANDLED; | |
3179 | ||
e315cd28 AC |
3180 | while (vha->rscn_out_ptr != vha->rscn_in_ptr || |
3181 | vha->flags.rscn_queue_overflow) { | |
1da177e4 | 3182 | |
e315cd28 | 3183 | rscn_entry = vha->rscn_queue[vha->rscn_out_ptr]; |
1da177e4 LT |
3184 | format = MSB(MSW(rscn_entry)); |
3185 | d_id.b.domain = LSB(MSW(rscn_entry)); | |
3186 | d_id.b.area = MSB(LSW(rscn_entry)); | |
3187 | d_id.b.al_pa = LSB(LSW(rscn_entry)); | |
3188 | ||
3189 | DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = " | |
3190 | "[%02x/%02x%02x%02x].\n", | |
e315cd28 | 3191 | vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain, |
1da177e4 LT |
3192 | d_id.b.area, d_id.b.al_pa)); |
3193 | ||
e315cd28 AC |
3194 | vha->rscn_out_ptr++; |
3195 | if (vha->rscn_out_ptr == MAX_RSCN_COUNT) | |
3196 | vha->rscn_out_ptr = 0; | |
1da177e4 LT |
3197 | |
3198 | /* Skip duplicate entries. */ | |
e315cd28 AC |
3199 | for (rscn_out_iter = vha->rscn_out_ptr; |
3200 | !vha->flags.rscn_queue_overflow && | |
3201 | rscn_out_iter != vha->rscn_in_ptr; | |
1da177e4 LT |
3202 | rscn_out_iter = (rscn_out_iter == |
3203 | (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) { | |
3204 | ||
e315cd28 | 3205 | if (rscn_entry != vha->rscn_queue[rscn_out_iter]) |
1da177e4 LT |
3206 | break; |
3207 | ||
3208 | DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue " | |
e315cd28 | 3209 | "entry found at [%d].\n", vha->host_no, |
1da177e4 LT |
3210 | rscn_out_iter)); |
3211 | ||
e315cd28 | 3212 | vha->rscn_out_ptr = rscn_out_iter; |
1da177e4 LT |
3213 | } |
3214 | ||
3215 | /* Queue overflow, set switch default case. */ | |
e315cd28 | 3216 | if (vha->flags.rscn_queue_overflow) { |
1da177e4 | 3217 | DEBUG(printk("scsi(%ld): device_resync: rscn " |
e315cd28 | 3218 | "overflow.\n", vha->host_no)); |
1da177e4 LT |
3219 | |
3220 | format = 3; | |
e315cd28 | 3221 | vha->flags.rscn_queue_overflow = 0; |
1da177e4 LT |
3222 | } |
3223 | ||
3224 | switch (format) { | |
3225 | case 0: | |
1da177e4 LT |
3226 | mask = 0xffffff; |
3227 | break; | |
3228 | case 1: | |
3229 | mask = 0xffff00; | |
3230 | break; | |
3231 | case 2: | |
3232 | mask = 0xff0000; | |
3233 | break; | |
3234 | default: | |
3235 | mask = 0x0; | |
3236 | d_id.b24 = 0; | |
e315cd28 | 3237 | vha->rscn_out_ptr = vha->rscn_in_ptr; |
1da177e4 LT |
3238 | break; |
3239 | } | |
3240 | ||
3241 | rval = QLA_SUCCESS; | |
3242 | ||
e315cd28 | 3243 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
3244 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || |
3245 | (fcport->d_id.b24 & mask) != d_id.b24 || | |
3246 | fcport->port_type == FCT_BROADCAST) | |
3247 | continue; | |
3248 | ||
3249 | if (atomic_read(&fcport->state) == FCS_ONLINE) { | |
3250 | if (format != 3 || | |
3251 | fcport->port_type != FCT_INITIATOR) { | |
e315cd28 | 3252 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 3253 | 0, 0); |
1da177e4 LT |
3254 | } |
3255 | } | |
1da177e4 LT |
3256 | } |
3257 | } | |
3258 | return (rval); | |
3259 | } | |
3260 | ||
3261 | /* | |
3262 | * qla2x00_fabric_dev_login | |
3263 | * Login fabric target device and update FC port database. | |
3264 | * | |
3265 | * Input: | |
3266 | * ha: adapter state pointer. | |
3267 | * fcport: port structure list pointer. | |
3268 | * next_loopid: contains value of a new loop ID that can be used | |
3269 | * by the next login attempt. | |
3270 | * | |
3271 | * Returns: | |
3272 | * qla2x00 local function return status code. | |
3273 | * | |
3274 | * Context: | |
3275 | * Kernel context. | |
3276 | */ | |
3277 | static int | |
e315cd28 | 3278 | qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3279 | uint16_t *next_loopid) |
3280 | { | |
3281 | int rval; | |
3282 | int retry; | |
0107109e | 3283 | uint8_t opts; |
e315cd28 | 3284 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3285 | |
3286 | rval = QLA_SUCCESS; | |
3287 | retry = 0; | |
3288 | ||
ac280b67 AV |
3289 | if (IS_ALOGIO_CAPABLE(ha)) { |
3290 | rval = qla2x00_post_async_login_work(vha, fcport, NULL); | |
3291 | if (!rval) | |
3292 | return rval; | |
3293 | } | |
3294 | ||
e315cd28 | 3295 | rval = qla2x00_fabric_login(vha, fcport, next_loopid); |
1da177e4 | 3296 | if (rval == QLA_SUCCESS) { |
f08b7251 | 3297 | /* Send an ADISC to FCP2 devices.*/ |
0107109e | 3298 | opts = 0; |
f08b7251 | 3299 | if (fcport->flags & FCF_FCP2_DEVICE) |
0107109e | 3300 | opts |= BIT_1; |
e315cd28 | 3301 | rval = qla2x00_get_port_database(vha, fcport, opts); |
1da177e4 | 3302 | if (rval != QLA_SUCCESS) { |
e315cd28 | 3303 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3304 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3305 | fcport->d_id.b.al_pa); | |
e315cd28 | 3306 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 | 3307 | } else { |
e315cd28 | 3308 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
3309 | } |
3310 | } | |
3311 | ||
3312 | return (rval); | |
3313 | } | |
3314 | ||
3315 | /* | |
3316 | * qla2x00_fabric_login | |
3317 | * Issue fabric login command. | |
3318 | * | |
3319 | * Input: | |
3320 | * ha = adapter block pointer. | |
3321 | * device = pointer to FC device type structure. | |
3322 | * | |
3323 | * Returns: | |
3324 | * 0 - Login successfully | |
3325 | * 1 - Login failed | |
3326 | * 2 - Initiator device | |
3327 | * 3 - Fatal error | |
3328 | */ | |
3329 | int | |
e315cd28 | 3330 | qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3331 | uint16_t *next_loopid) |
3332 | { | |
3333 | int rval; | |
3334 | int retry; | |
3335 | uint16_t tmp_loopid; | |
3336 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 | 3337 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3338 | |
3339 | retry = 0; | |
3340 | tmp_loopid = 0; | |
3341 | ||
3342 | for (;;) { | |
3343 | DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x " | |
3344 | "for port %02x%02x%02x.\n", | |
e315cd28 | 3345 | vha->host_no, fcport->loop_id, fcport->d_id.b.domain, |
1da177e4 LT |
3346 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); |
3347 | ||
3348 | /* Login fcport on switch. */ | |
e315cd28 | 3349 | ha->isp_ops->fabric_login(vha, fcport->loop_id, |
1da177e4 LT |
3350 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3351 | fcport->d_id.b.al_pa, mb, BIT_0); | |
3352 | if (mb[0] == MBS_PORT_ID_USED) { | |
3353 | /* | |
3354 | * Device has another loop ID. The firmware team | |
0107109e AV |
3355 | * recommends the driver perform an implicit login with |
3356 | * the specified ID again. The ID we just used is save | |
3357 | * here so we return with an ID that can be tried by | |
3358 | * the next login. | |
1da177e4 LT |
3359 | */ |
3360 | retry++; | |
3361 | tmp_loopid = fcport->loop_id; | |
3362 | fcport->loop_id = mb[1]; | |
3363 | ||
3364 | DEBUG(printk("Fabric Login: port in use - next " | |
3365 | "loop id=0x%04x, port Id=%02x%02x%02x.\n", | |
3366 | fcport->loop_id, fcport->d_id.b.domain, | |
3367 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
3368 | ||
3369 | } else if (mb[0] == MBS_COMMAND_COMPLETE) { | |
3370 | /* | |
3371 | * Login succeeded. | |
3372 | */ | |
3373 | if (retry) { | |
3374 | /* A retry occurred before. */ | |
3375 | *next_loopid = tmp_loopid; | |
3376 | } else { | |
3377 | /* | |
3378 | * No retry occurred before. Just increment the | |
3379 | * ID value for next login. | |
3380 | */ | |
3381 | *next_loopid = (fcport->loop_id + 1); | |
3382 | } | |
3383 | ||
3384 | if (mb[1] & BIT_0) { | |
3385 | fcport->port_type = FCT_INITIATOR; | |
3386 | } else { | |
3387 | fcport->port_type = FCT_TARGET; | |
3388 | if (mb[1] & BIT_1) { | |
8474f3a0 | 3389 | fcport->flags |= FCF_FCP2_DEVICE; |
1da177e4 LT |
3390 | } |
3391 | } | |
3392 | ||
ad3e0eda AV |
3393 | if (mb[10] & BIT_0) |
3394 | fcport->supported_classes |= FC_COS_CLASS2; | |
3395 | if (mb[10] & BIT_1) | |
3396 | fcport->supported_classes |= FC_COS_CLASS3; | |
3397 | ||
1da177e4 LT |
3398 | rval = QLA_SUCCESS; |
3399 | break; | |
3400 | } else if (mb[0] == MBS_LOOP_ID_USED) { | |
3401 | /* | |
3402 | * Loop ID already used, try next loop ID. | |
3403 | */ | |
3404 | fcport->loop_id++; | |
e315cd28 | 3405 | rval = qla2x00_find_new_loop_id(vha, fcport); |
1da177e4 LT |
3406 | if (rval != QLA_SUCCESS) { |
3407 | /* Ran out of loop IDs to use */ | |
3408 | break; | |
3409 | } | |
3410 | } else if (mb[0] == MBS_COMMAND_ERROR) { | |
3411 | /* | |
3412 | * Firmware possibly timed out during login. If NO | |
3413 | * retries are left to do then the device is declared | |
3414 | * dead. | |
3415 | */ | |
3416 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3417 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3418 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3419 | fcport->d_id.b.al_pa); | |
e315cd28 | 3420 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 LT |
3421 | |
3422 | rval = 1; | |
3423 | break; | |
3424 | } else { | |
3425 | /* | |
3426 | * unrecoverable / not handled error | |
3427 | */ | |
3428 | DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x " | |
fa2a1ce5 | 3429 | "loop_id=%x jiffies=%lx.\n", |
e315cd28 | 3430 | __func__, vha->host_no, mb[0], |
1da177e4 LT |
3431 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3432 | fcport->d_id.b.al_pa, fcport->loop_id, jiffies)); | |
3433 | ||
3434 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3435 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3436 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3437 | fcport->d_id.b.al_pa); | |
1da177e4 | 3438 | fcport->loop_id = FC_NO_LOOP_ID; |
0eedfcf0 | 3439 | fcport->login_retry = 0; |
1da177e4 LT |
3440 | |
3441 | rval = 3; | |
3442 | break; | |
3443 | } | |
3444 | } | |
3445 | ||
3446 | return (rval); | |
3447 | } | |
3448 | ||
3449 | /* | |
3450 | * qla2x00_local_device_login | |
3451 | * Issue local device login command. | |
3452 | * | |
3453 | * Input: | |
3454 | * ha = adapter block pointer. | |
3455 | * loop_id = loop id of device to login to. | |
3456 | * | |
3457 | * Returns (Where's the #define!!!!): | |
3458 | * 0 - Login successfully | |
3459 | * 1 - Login failed | |
3460 | * 3 - Fatal error | |
3461 | */ | |
3462 | int | |
e315cd28 | 3463 | qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) |
1da177e4 LT |
3464 | { |
3465 | int rval; | |
3466 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
3467 | ||
3468 | memset(mb, 0, sizeof(mb)); | |
e315cd28 | 3469 | rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); |
1da177e4 LT |
3470 | if (rval == QLA_SUCCESS) { |
3471 | /* Interrogate mailbox registers for any errors */ | |
3472 | if (mb[0] == MBS_COMMAND_ERROR) | |
3473 | rval = 1; | |
3474 | else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) | |
3475 | /* device not in PCB table */ | |
3476 | rval = 3; | |
3477 | } | |
3478 | ||
3479 | return (rval); | |
3480 | } | |
3481 | ||
3482 | /* | |
3483 | * qla2x00_loop_resync | |
3484 | * Resync with fibre channel devices. | |
3485 | * | |
3486 | * Input: | |
3487 | * ha = adapter block pointer. | |
3488 | * | |
3489 | * Returns: | |
3490 | * 0 = success | |
3491 | */ | |
3492 | int | |
e315cd28 | 3493 | qla2x00_loop_resync(scsi_qla_host_t *vha) |
1da177e4 | 3494 | { |
73208dfd | 3495 | int rval = QLA_SUCCESS; |
1da177e4 | 3496 | uint32_t wait_time; |
67c2e93a AC |
3497 | struct req_que *req; |
3498 | struct rsp_que *rsp; | |
3499 | ||
7163ea81 | 3500 | if (vha->hw->flags.cpu_affinity_enabled) |
67c2e93a AC |
3501 | req = vha->hw->req_q_map[0]; |
3502 | else | |
3503 | req = vha->req; | |
3504 | rsp = req->rsp; | |
1da177e4 | 3505 | |
e315cd28 AC |
3506 | atomic_set(&vha->loop_state, LOOP_UPDATE); |
3507 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
3508 | if (vha->flags.online) { | |
3509 | if (!(rval = qla2x00_fw_ready(vha))) { | |
1da177e4 LT |
3510 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3511 | wait_time = 256; | |
3512 | do { | |
e315cd28 | 3513 | atomic_set(&vha->loop_state, LOOP_UPDATE); |
1da177e4 | 3514 | |
0107109e | 3515 | /* Issue a marker after FW becomes ready. */ |
73208dfd AC |
3516 | qla2x00_marker(vha, req, rsp, 0, 0, |
3517 | MK_SYNC_ALL); | |
e315cd28 | 3518 | vha->marker_needed = 0; |
1da177e4 LT |
3519 | |
3520 | /* Remap devices on Loop. */ | |
e315cd28 | 3521 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 | 3522 | |
e315cd28 | 3523 | qla2x00_configure_loop(vha); |
1da177e4 | 3524 | wait_time--; |
e315cd28 AC |
3525 | } while (!atomic_read(&vha->loop_down_timer) && |
3526 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3527 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3528 | &vha->dpc_flags))); | |
1da177e4 | 3529 | } |
1da177e4 LT |
3530 | } |
3531 | ||
e315cd28 | 3532 | if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) |
1da177e4 | 3533 | return (QLA_FUNCTION_FAILED); |
1da177e4 | 3534 | |
e315cd28 | 3535 | if (rval) |
1da177e4 | 3536 | DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__)); |
1da177e4 LT |
3537 | |
3538 | return (rval); | |
3539 | } | |
3540 | ||
d97994dc | 3541 | void |
67becc00 | 3542 | qla2x00_update_fcports(scsi_qla_host_t *base_vha) |
d97994dc | 3543 | { |
3544 | fc_port_t *fcport; | |
67becc00 | 3545 | struct scsi_qla_host *tvp, *vha; |
d97994dc | 3546 | |
3547 | /* Go with deferred removal of rport references. */ | |
67becc00 AV |
3548 | list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list) |
3549 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
3550 | if (fcport && fcport->drport && | |
3551 | atomic_read(&fcport->state) != FCS_UNCONFIGURED) | |
3552 | qla2x00_rport_del(fcport); | |
d97994dc | 3553 | } |
3554 | ||
1da177e4 LT |
3555 | /* |
3556 | * qla2x00_abort_isp | |
3557 | * Resets ISP and aborts all outstanding commands. | |
3558 | * | |
3559 | * Input: | |
3560 | * ha = adapter block pointer. | |
3561 | * | |
3562 | * Returns: | |
3563 | * 0 = success | |
3564 | */ | |
3565 | int | |
e315cd28 | 3566 | qla2x00_abort_isp(scsi_qla_host_t *vha) |
1da177e4 | 3567 | { |
476e8978 | 3568 | int rval; |
1da177e4 | 3569 | uint8_t status = 0; |
e315cd28 AC |
3570 | struct qla_hw_data *ha = vha->hw; |
3571 | struct scsi_qla_host *vp; | |
ee546b6e | 3572 | struct scsi_qla_host *tvp; |
73208dfd | 3573 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 | 3574 | |
e315cd28 AC |
3575 | if (vha->flags.online) { |
3576 | vha->flags.online = 0; | |
2533cf67 | 3577 | ha->flags.chip_reset_done = 0; |
e315cd28 | 3578 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
e5f5f6f7 | 3579 | ha->qla_stats.total_isp_aborts++; |
1da177e4 LT |
3580 | |
3581 | qla_printk(KERN_INFO, ha, | |
3582 | "Performing ISP error recovery - ha= %p.\n", ha); | |
e315cd28 AC |
3583 | ha->isp_ops->reset_chip(vha); |
3584 | ||
3585 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
3586 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
3587 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
3588 | qla2x00_mark_all_devices_lost(vha, 0); | |
1da177e4 | 3589 | } else { |
e315cd28 AC |
3590 | if (!atomic_read(&vha->loop_down_timer)) |
3591 | atomic_set(&vha->loop_down_timer, | |
1da177e4 LT |
3592 | LOOP_DOWN_TIME); |
3593 | } | |
3594 | ||
1da177e4 | 3595 | /* Requeue all commands in outstanding command list. */ |
e315cd28 | 3596 | qla2x00_abort_all_cmds(vha, DID_RESET << 16); |
1da177e4 | 3597 | |
85880801 AV |
3598 | if (unlikely(pci_channel_offline(ha->pdev) && |
3599 | ha->flags.pci_channel_io_perm_failure)) { | |
3600 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
3601 | status = 0; | |
3602 | return status; | |
3603 | } | |
3604 | ||
73208dfd | 3605 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 3606 | |
e315cd28 | 3607 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 3608 | |
e315cd28 AC |
3609 | if (!qla2x00_restart_isp(vha)) { |
3610 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
1da177e4 | 3611 | |
e315cd28 | 3612 | if (!atomic_read(&vha->loop_down_timer)) { |
1da177e4 LT |
3613 | /* |
3614 | * Issue marker command only when we are going | |
3615 | * to start the I/O . | |
3616 | */ | |
e315cd28 | 3617 | vha->marker_needed = 1; |
1da177e4 LT |
3618 | } |
3619 | ||
e315cd28 | 3620 | vha->flags.online = 1; |
1da177e4 | 3621 | |
fd34f556 | 3622 | ha->isp_ops->enable_intrs(ha); |
1da177e4 | 3623 | |
fa2a1ce5 | 3624 | ha->isp_abort_cnt = 0; |
e315cd28 | 3625 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
476e8978 | 3626 | |
29c5397f LC |
3627 | if (IS_QLA81XX(ha)) |
3628 | qla2x00_get_fw_version(vha, | |
3629 | &ha->fw_major_version, | |
3630 | &ha->fw_minor_version, | |
3631 | &ha->fw_subminor_version, | |
3632 | &ha->fw_attributes, &ha->fw_memory_size, | |
3633 | ha->mpi_version, &ha->mpi_capabilities, | |
3634 | ha->phy_version); | |
3635 | ||
df613b96 AV |
3636 | if (ha->fce) { |
3637 | ha->flags.fce_enabled = 1; | |
3638 | memset(ha->fce, 0, | |
3639 | fce_calc_size(ha->fce_bufs)); | |
e315cd28 | 3640 | rval = qla2x00_enable_fce_trace(vha, |
df613b96 AV |
3641 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, |
3642 | &ha->fce_bufs); | |
3643 | if (rval) { | |
3644 | qla_printk(KERN_WARNING, ha, | |
3645 | "Unable to reinitialize FCE " | |
3646 | "(%d).\n", rval); | |
3647 | ha->flags.fce_enabled = 0; | |
3648 | } | |
3649 | } | |
436a7b11 AV |
3650 | |
3651 | if (ha->eft) { | |
3652 | memset(ha->eft, 0, EFT_SIZE); | |
e315cd28 | 3653 | rval = qla2x00_enable_eft_trace(vha, |
436a7b11 AV |
3654 | ha->eft_dma, EFT_NUM_BUFFERS); |
3655 | if (rval) { | |
3656 | qla_printk(KERN_WARNING, ha, | |
3657 | "Unable to reinitialize EFT " | |
3658 | "(%d).\n", rval); | |
3659 | } | |
3660 | } | |
1da177e4 | 3661 | } else { /* failed the ISP abort */ |
e315cd28 AC |
3662 | vha->flags.online = 1; |
3663 | if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
1da177e4 LT |
3664 | if (ha->isp_abort_cnt == 0) { |
3665 | qla_printk(KERN_WARNING, ha, | |
3666 | "ISP error recovery failed - " | |
3667 | "board disabled\n"); | |
fa2a1ce5 | 3668 | /* |
1da177e4 LT |
3669 | * The next call disables the board |
3670 | * completely. | |
3671 | */ | |
e315cd28 AC |
3672 | ha->isp_ops->reset_adapter(vha); |
3673 | vha->flags.online = 0; | |
1da177e4 | 3674 | clear_bit(ISP_ABORT_RETRY, |
e315cd28 | 3675 | &vha->dpc_flags); |
1da177e4 LT |
3676 | status = 0; |
3677 | } else { /* schedule another ISP abort */ | |
3678 | ha->isp_abort_cnt--; | |
3679 | DEBUG(printk("qla%ld: ISP abort - " | |
0107109e | 3680 | "retry remaining %d\n", |
e315cd28 | 3681 | vha->host_no, ha->isp_abort_cnt)); |
1da177e4 LT |
3682 | status = 1; |
3683 | } | |
3684 | } else { | |
3685 | ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; | |
3686 | DEBUG(printk("qla2x00(%ld): ISP error recovery " | |
3687 | "- retrying (%d) more times\n", | |
e315cd28 AC |
3688 | vha->host_no, ha->isp_abort_cnt)); |
3689 | set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
1da177e4 LT |
3690 | status = 1; |
3691 | } | |
3692 | } | |
fa2a1ce5 | 3693 | |
1da177e4 LT |
3694 | } |
3695 | ||
e315cd28 AC |
3696 | if (!status) { |
3697 | DEBUG(printk(KERN_INFO | |
3698 | "qla2x00_abort_isp(%ld): succeeded.\n", | |
3699 | vha->host_no)); | |
ee546b6e | 3700 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3701 | if (vp->vp_idx) |
3702 | qla2x00_vp_abort_isp(vp); | |
3703 | } | |
3704 | } else { | |
1da177e4 LT |
3705 | qla_printk(KERN_INFO, ha, |
3706 | "qla2x00_abort_isp: **** FAILED ****\n"); | |
1da177e4 LT |
3707 | } |
3708 | ||
3709 | return(status); | |
3710 | } | |
3711 | ||
3712 | /* | |
3713 | * qla2x00_restart_isp | |
3714 | * restarts the ISP after a reset | |
3715 | * | |
3716 | * Input: | |
3717 | * ha = adapter block pointer. | |
3718 | * | |
3719 | * Returns: | |
3720 | * 0 = success | |
3721 | */ | |
3722 | static int | |
e315cd28 | 3723 | qla2x00_restart_isp(scsi_qla_host_t *vha) |
1da177e4 | 3724 | { |
c6b2fca8 | 3725 | int status = 0; |
1da177e4 | 3726 | uint32_t wait_time; |
e315cd28 | 3727 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
3728 | struct req_que *req = ha->req_q_map[0]; |
3729 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
1da177e4 LT |
3730 | |
3731 | /* If firmware needs to be loaded */ | |
e315cd28 AC |
3732 | if (qla2x00_isp_firmware(vha)) { |
3733 | vha->flags.online = 0; | |
3734 | status = ha->isp_ops->chip_diag(vha); | |
3735 | if (!status) | |
3736 | status = qla2x00_setup_chip(vha); | |
1da177e4 LT |
3737 | } |
3738 | ||
e315cd28 AC |
3739 | if (!status && !(status = qla2x00_init_rings(vha))) { |
3740 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
2533cf67 | 3741 | ha->flags.chip_reset_done = 1; |
73208dfd AC |
3742 | /* Initialize the queues in use */ |
3743 | qla25xx_init_queues(ha); | |
3744 | ||
e315cd28 AC |
3745 | status = qla2x00_fw_ready(vha); |
3746 | if (!status) { | |
1da177e4 | 3747 | DEBUG(printk("%s(): Start configure loop, " |
744f11fd | 3748 | "status = %d\n", __func__, status)); |
0107109e AV |
3749 | |
3750 | /* Issue a marker after FW becomes ready. */ | |
73208dfd | 3751 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
0107109e | 3752 | |
e315cd28 | 3753 | vha->flags.online = 1; |
1da177e4 LT |
3754 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3755 | wait_time = 256; | |
3756 | do { | |
e315cd28 AC |
3757 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
3758 | qla2x00_configure_loop(vha); | |
1da177e4 | 3759 | wait_time--; |
e315cd28 AC |
3760 | } while (!atomic_read(&vha->loop_down_timer) && |
3761 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3762 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3763 | &vha->dpc_flags))); | |
1da177e4 LT |
3764 | } |
3765 | ||
3766 | /* if no cable then assume it's good */ | |
e315cd28 | 3767 | if ((vha->device_flags & DFLG_NO_CABLE)) |
1da177e4 LT |
3768 | status = 0; |
3769 | ||
3770 | DEBUG(printk("%s(): Configure loop done, status = 0x%x\n", | |
3771 | __func__, | |
744f11fd | 3772 | status)); |
1da177e4 LT |
3773 | } |
3774 | return (status); | |
3775 | } | |
3776 | ||
73208dfd AC |
3777 | static int |
3778 | qla25xx_init_queues(struct qla_hw_data *ha) | |
3779 | { | |
3780 | struct rsp_que *rsp = NULL; | |
3781 | struct req_que *req = NULL; | |
3782 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
3783 | int ret = -1; | |
3784 | int i; | |
3785 | ||
2afa19a9 | 3786 | for (i = 1; i < ha->max_rsp_queues; i++) { |
73208dfd AC |
3787 | rsp = ha->rsp_q_map[i]; |
3788 | if (rsp) { | |
3789 | rsp->options &= ~BIT_0; | |
618a7523 | 3790 | ret = qla25xx_init_rsp_que(base_vha, rsp); |
73208dfd AC |
3791 | if (ret != QLA_SUCCESS) |
3792 | DEBUG2_17(printk(KERN_WARNING | |
3793 | "%s Rsp que:%d init failed\n", __func__, | |
3794 | rsp->id)); | |
3795 | else | |
3796 | DEBUG2_17(printk(KERN_INFO | |
3797 | "%s Rsp que:%d inited\n", __func__, | |
3798 | rsp->id)); | |
3799 | } | |
2afa19a9 AC |
3800 | } |
3801 | for (i = 1; i < ha->max_req_queues; i++) { | |
73208dfd AC |
3802 | req = ha->req_q_map[i]; |
3803 | if (req) { | |
29bdccbe | 3804 | /* Clear outstanding commands array. */ |
73208dfd | 3805 | req->options &= ~BIT_0; |
618a7523 | 3806 | ret = qla25xx_init_req_que(base_vha, req); |
73208dfd AC |
3807 | if (ret != QLA_SUCCESS) |
3808 | DEBUG2_17(printk(KERN_WARNING | |
3809 | "%s Req que:%d init failed\n", __func__, | |
3810 | req->id)); | |
3811 | else | |
3812 | DEBUG2_17(printk(KERN_WARNING | |
29bdccbe | 3813 | "%s Req que:%d inited\n", __func__, |
73208dfd AC |
3814 | req->id)); |
3815 | } | |
3816 | } | |
3817 | return ret; | |
3818 | } | |
3819 | ||
1da177e4 LT |
3820 | /* |
3821 | * qla2x00_reset_adapter | |
3822 | * Reset adapter. | |
3823 | * | |
3824 | * Input: | |
3825 | * ha = adapter block pointer. | |
3826 | */ | |
abbd8870 | 3827 | void |
e315cd28 | 3828 | qla2x00_reset_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
3829 | { |
3830 | unsigned long flags = 0; | |
e315cd28 | 3831 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 3832 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 3833 | |
e315cd28 | 3834 | vha->flags.online = 0; |
fd34f556 | 3835 | ha->isp_ops->disable_intrs(ha); |
1da177e4 | 3836 | |
1da177e4 LT |
3837 | spin_lock_irqsave(&ha->hardware_lock, flags); |
3838 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
3839 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
3840 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
3841 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
3842 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
3843 | } | |
0107109e AV |
3844 | |
3845 | void | |
e315cd28 | 3846 | qla24xx_reset_adapter(scsi_qla_host_t *vha) |
0107109e AV |
3847 | { |
3848 | unsigned long flags = 0; | |
e315cd28 | 3849 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
3850 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
3851 | ||
e315cd28 | 3852 | vha->flags.online = 0; |
fd34f556 | 3853 | ha->isp_ops->disable_intrs(ha); |
0107109e AV |
3854 | |
3855 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3856 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
3857 | RD_REG_DWORD(®->hccr); | |
3858 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
3859 | RD_REG_DWORD(®->hccr); | |
3860 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
09ff36d3 AV |
3861 | |
3862 | if (IS_NOPOLLING_TYPE(ha)) | |
3863 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
3864 | } |
3865 | ||
4e08df3f DM |
3866 | /* On sparc systems, obtain port and node WWN from firmware |
3867 | * properties. | |
3868 | */ | |
e315cd28 AC |
3869 | static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, |
3870 | struct nvram_24xx *nv) | |
4e08df3f DM |
3871 | { |
3872 | #ifdef CONFIG_SPARC | |
e315cd28 | 3873 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 3874 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
3875 | struct device_node *dp = pci_device_to_OF_node(pdev); |
3876 | const u8 *val; | |
4e08df3f DM |
3877 | int len; |
3878 | ||
3879 | val = of_get_property(dp, "port-wwn", &len); | |
3880 | if (val && len >= WWN_SIZE) | |
3881 | memcpy(nv->port_name, val, WWN_SIZE); | |
3882 | ||
3883 | val = of_get_property(dp, "node-wwn", &len); | |
3884 | if (val && len >= WWN_SIZE) | |
3885 | memcpy(nv->node_name, val, WWN_SIZE); | |
3886 | #endif | |
3887 | } | |
3888 | ||
0107109e | 3889 | int |
e315cd28 | 3890 | qla24xx_nvram_config(scsi_qla_host_t *vha) |
0107109e | 3891 | { |
4e08df3f | 3892 | int rval; |
0107109e AV |
3893 | struct init_cb_24xx *icb; |
3894 | struct nvram_24xx *nv; | |
3895 | uint32_t *dptr; | |
3896 | uint8_t *dptr1, *dptr2; | |
3897 | uint32_t chksum; | |
3898 | uint16_t cnt; | |
e315cd28 | 3899 | struct qla_hw_data *ha = vha->hw; |
0107109e | 3900 | |
4e08df3f | 3901 | rval = QLA_SUCCESS; |
0107109e | 3902 | icb = (struct init_cb_24xx *)ha->init_cb; |
281afe19 | 3903 | nv = ha->nvram; |
0107109e AV |
3904 | |
3905 | /* Determine NVRAM starting address. */ | |
e5b68a61 AC |
3906 | if (ha->flags.port0) { |
3907 | ha->nvram_base = FA_NVRAM_FUNC0_ADDR; | |
3908 | ha->vpd_base = FA_NVRAM_VPD0_ADDR; | |
3909 | } else { | |
0107109e | 3910 | ha->nvram_base = FA_NVRAM_FUNC1_ADDR; |
6f641790 | 3911 | ha->vpd_base = FA_NVRAM_VPD1_ADDR; |
3912 | } | |
e5b68a61 AC |
3913 | ha->nvram_size = sizeof(struct nvram_24xx); |
3914 | ha->vpd_size = FA_NVRAM_VPD_SIZE; | |
0107109e | 3915 | |
281afe19 SJ |
3916 | /* Get VPD data into cache */ |
3917 | ha->vpd = ha->nvram + VPD_OFFSET; | |
e315cd28 | 3918 | ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, |
281afe19 SJ |
3919 | ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); |
3920 | ||
3921 | /* Get NVRAM data into cache and calculate checksum. */ | |
0107109e | 3922 | dptr = (uint32_t *)nv; |
e315cd28 | 3923 | ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, |
0107109e AV |
3924 | ha->nvram_size); |
3925 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) | |
3926 | chksum += le32_to_cpu(*dptr++); | |
3927 | ||
7640335e | 3928 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
281afe19 | 3929 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
0107109e AV |
3930 | |
3931 | /* Bad NVRAM data, set defaults parameters. */ | |
3932 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
3933 | || nv->id[3] != ' ' || | |
3934 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
3935 | /* Reset NVRAM data. */ | |
3936 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
3937 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
3938 | le16_to_cpu(nv->nvram_version)); | |
4e08df3f DM |
3939 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " |
3940 | "invalid -- WWPN) defaults.\n"); | |
3941 | ||
3942 | /* | |
3943 | * Set default initialization control block. | |
3944 | */ | |
3945 | memset(nv, 0, ha->nvram_size); | |
3946 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
3947 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
3948 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
3949 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
3950 | nv->exchange_count = __constant_cpu_to_le16(0); | |
3951 | nv->hard_address = __constant_cpu_to_le16(124); | |
3952 | nv->port_name[0] = 0x21; | |
e5b68a61 | 3953 | nv->port_name[1] = 0x00 + ha->port_no; |
4e08df3f DM |
3954 | nv->port_name[2] = 0x00; |
3955 | nv->port_name[3] = 0xe0; | |
3956 | nv->port_name[4] = 0x8b; | |
3957 | nv->port_name[5] = 0x1c; | |
3958 | nv->port_name[6] = 0x55; | |
3959 | nv->port_name[7] = 0x86; | |
3960 | nv->node_name[0] = 0x20; | |
3961 | nv->node_name[1] = 0x00; | |
3962 | nv->node_name[2] = 0x00; | |
3963 | nv->node_name[3] = 0xe0; | |
3964 | nv->node_name[4] = 0x8b; | |
3965 | nv->node_name[5] = 0x1c; | |
3966 | nv->node_name[6] = 0x55; | |
3967 | nv->node_name[7] = 0x86; | |
e315cd28 | 3968 | qla24xx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
3969 | nv->login_retry_count = __constant_cpu_to_le16(8); |
3970 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
3971 | nv->login_timeout = __constant_cpu_to_le16(0); | |
3972 | nv->firmware_options_1 = | |
3973 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
3974 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
3975 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
3976 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
3977 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
3978 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
3979 | nv->reset_delay = 5; | |
3980 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
3981 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
3982 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
3983 | ||
3984 | rval = 1; | |
0107109e AV |
3985 | } |
3986 | ||
3987 | /* Reset Initialization control block */ | |
e315cd28 | 3988 | memset(icb, 0, ha->init_cb_size); |
0107109e AV |
3989 | |
3990 | /* Copy 1st segment. */ | |
3991 | dptr1 = (uint8_t *)icb; | |
3992 | dptr2 = (uint8_t *)&nv->version; | |
3993 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
3994 | while (cnt--) | |
3995 | *dptr1++ = *dptr2++; | |
3996 | ||
3997 | icb->login_retry_count = nv->login_retry_count; | |
3ea66e28 | 3998 | icb->link_down_on_nos = nv->link_down_on_nos; |
0107109e AV |
3999 | |
4000 | /* Copy 2nd segment. */ | |
4001 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
4002 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
4003 | cnt = (uint8_t *)&icb->reserved_3 - | |
4004 | (uint8_t *)&icb->interrupt_delay_timer; | |
4005 | while (cnt--) | |
4006 | *dptr1++ = *dptr2++; | |
4007 | ||
4008 | /* | |
4009 | * Setup driver NVRAM options. | |
4010 | */ | |
e315cd28 | 4011 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), |
9bb9fcf2 | 4012 | "QLA2462"); |
0107109e | 4013 | |
5341e868 AV |
4014 | /* Use alternate WWN? */ |
4015 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
4016 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
4017 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
4018 | } | |
4019 | ||
0107109e | 4020 | /* Prepare nodename */ |
fd0e7e4d | 4021 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { |
0107109e AV |
4022 | /* |
4023 | * Firmware will apply the following mask if the nodename was | |
4024 | * not provided. | |
4025 | */ | |
4026 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
4027 | icb->node_name[0] &= 0xF0; | |
4028 | } | |
4029 | ||
4030 | /* Set host adapter parameters. */ | |
4031 | ha->flags.disable_risc_code_load = 0; | |
0c8c39af AV |
4032 | ha->flags.enable_lip_reset = 0; |
4033 | ha->flags.enable_lip_full_login = | |
4034 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
4035 | ha->flags.enable_target_reset = | |
4036 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
0107109e | 4037 | ha->flags.enable_led_scheme = 0; |
d4c760c2 | 4038 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; |
0107109e | 4039 | |
fd0e7e4d AV |
4040 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & |
4041 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
0107109e AV |
4042 | |
4043 | memcpy(ha->fw_seriallink_options24, nv->seriallink_options, | |
4044 | sizeof(ha->fw_seriallink_options24)); | |
4045 | ||
4046 | /* save HBA serial number */ | |
4047 | ha->serial0 = icb->port_name[5]; | |
4048 | ha->serial1 = icb->port_name[6]; | |
4049 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
4050 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
4051 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
0107109e | 4052 | |
bc8fb3cb | 4053 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); |
4054 | ||
0107109e AV |
4055 | ha->retry_count = le16_to_cpu(nv->login_retry_count); |
4056 | ||
4057 | /* Set minimum login_timeout to 4 seconds. */ | |
4058 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
4059 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
4060 | if (le16_to_cpu(nv->login_timeout) < 4) | |
4061 | nv->login_timeout = __constant_cpu_to_le16(4); | |
4062 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
c6852c4c | 4063 | icb->login_timeout = nv->login_timeout; |
0107109e | 4064 | |
00a537b8 AV |
4065 | /* Set minimum RATOV to 100 tenths of a second. */ |
4066 | ha->r_a_tov = 100; | |
0107109e AV |
4067 | |
4068 | ha->loop_reset_delay = nv->reset_delay; | |
4069 | ||
4070 | /* Link Down Timeout = 0: | |
4071 | * | |
4072 | * When Port Down timer expires we will start returning | |
4073 | * I/O's to OS with "DID_NO_CONNECT". | |
4074 | * | |
4075 | * Link Down Timeout != 0: | |
4076 | * | |
4077 | * The driver waits for the link to come up after link down | |
4078 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
4079 | */ | |
4080 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
4081 | ha->loop_down_abort_time = | |
4082 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
4083 | } else { | |
4084 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
4085 | ha->loop_down_abort_time = | |
4086 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
4087 | } | |
4088 | ||
4089 | /* Need enough time to try and get the port back. */ | |
4090 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
4091 | if (qlport_down_retry) | |
4092 | ha->port_down_retry_count = qlport_down_retry; | |
4093 | ||
4094 | /* Set login_retry_count */ | |
4095 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
4096 | if (ha->port_down_retry_count == | |
4097 | le16_to_cpu(nv->port_down_retry_count) && | |
4098 | ha->port_down_retry_count > 3) | |
4099 | ha->login_retry_count = ha->port_down_retry_count; | |
4100 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
4101 | ha->login_retry_count = ha->port_down_retry_count; | |
4102 | if (ql2xloginretrycount) | |
4103 | ha->login_retry_count = ql2xloginretrycount; | |
4104 | ||
4fdfefe5 | 4105 | /* Enable ZIO. */ |
e315cd28 | 4106 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
4107 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & |
4108 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
4109 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
4110 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
4111 | } | |
4112 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
4113 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
e315cd28 | 4114 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 4115 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d | 4116 | ha->zio_mode = QLA_ZIO_MODE_6; |
4117 | ||
4fdfefe5 | 4118 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay " |
e315cd28 | 4119 | "(%d us).\n", vha->host_no, ha->zio_mode, |
4fdfefe5 AV |
4120 | ha->zio_timer * 100)); |
4121 | qla_printk(KERN_INFO, ha, | |
4122 | "ZIO mode %d enabled; timer delay (%d us).\n", | |
4123 | ha->zio_mode, ha->zio_timer * 100); | |
4124 | ||
4125 | icb->firmware_options_2 |= cpu_to_le32( | |
4126 | (uint32_t)ha->zio_mode); | |
4127 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
e315cd28 | 4128 | vha->flags.process_response_queue = 1; |
4fdfefe5 AV |
4129 | } |
4130 | ||
4e08df3f DM |
4131 | if (rval) { |
4132 | DEBUG2_3(printk(KERN_WARNING | |
e315cd28 | 4133 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); |
4e08df3f DM |
4134 | } |
4135 | return (rval); | |
0107109e AV |
4136 | } |
4137 | ||
413975a0 | 4138 | static int |
cbc8eb67 AV |
4139 | qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, |
4140 | uint32_t faddr) | |
d1c61909 | 4141 | { |
73208dfd | 4142 | int rval = QLA_SUCCESS; |
d1c61909 | 4143 | int segments, fragment; |
d1c61909 AV |
4144 | uint32_t *dcode, dlen; |
4145 | uint32_t risc_addr; | |
4146 | uint32_t risc_size; | |
4147 | uint32_t i; | |
e315cd28 | 4148 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4149 | struct req_que *req = ha->req_q_map[0]; |
eaac30be AV |
4150 | |
4151 | qla_printk(KERN_INFO, ha, | |
cbc8eb67 | 4152 | "FW: Loading from flash (%x)...\n", faddr); |
eaac30be | 4153 | |
d1c61909 AV |
4154 | rval = QLA_SUCCESS; |
4155 | ||
4156 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4157 | dcode = (uint32_t *)req->ring; |
d1c61909 AV |
4158 | *srisc_addr = 0; |
4159 | ||
4160 | /* Validate firmware image by checking version. */ | |
e315cd28 | 4161 | qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); |
d1c61909 AV |
4162 | for (i = 0; i < 4; i++) |
4163 | dcode[i] = be32_to_cpu(dcode[i]); | |
4164 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4165 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4166 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4167 | dcode[3] == 0)) { | |
4168 | qla_printk(KERN_WARNING, ha, | |
4169 | "Unable to verify integrity of flash firmware image!\n"); | |
4170 | qla_printk(KERN_WARNING, ha, | |
4171 | "Firmware data: %08x %08x %08x %08x!\n", dcode[0], | |
4172 | dcode[1], dcode[2], dcode[3]); | |
4173 | ||
4174 | return QLA_FUNCTION_FAILED; | |
4175 | } | |
4176 | ||
4177 | while (segments && rval == QLA_SUCCESS) { | |
4178 | /* Read segment's load information. */ | |
e315cd28 | 4179 | qla24xx_read_flash_data(vha, dcode, faddr, 4); |
d1c61909 AV |
4180 | |
4181 | risc_addr = be32_to_cpu(dcode[2]); | |
4182 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4183 | risc_size = be32_to_cpu(dcode[3]); | |
4184 | ||
4185 | fragment = 0; | |
4186 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4187 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4188 | if (dlen > risc_size) | |
4189 | dlen = risc_size; | |
4190 | ||
4191 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
4192 | "addr %x, number of dwords 0x%x, offset 0x%x.\n", | |
e315cd28 | 4193 | vha->host_no, risc_addr, dlen, faddr)); |
d1c61909 | 4194 | |
e315cd28 | 4195 | qla24xx_read_flash_data(vha, dcode, faddr, dlen); |
d1c61909 AV |
4196 | for (i = 0; i < dlen; i++) |
4197 | dcode[i] = swab32(dcode[i]); | |
4198 | ||
73208dfd | 4199 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
d1c61909 AV |
4200 | dlen); |
4201 | if (rval) { | |
4202 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4203 | "segment %d of firmware\n", vha->host_no, |
d1c61909 AV |
4204 | fragment)); |
4205 | qla_printk(KERN_WARNING, ha, | |
4206 | "[ERROR] Failed to load segment %d of " | |
4207 | "firmware\n", fragment); | |
4208 | break; | |
4209 | } | |
4210 | ||
4211 | faddr += dlen; | |
4212 | risc_addr += dlen; | |
4213 | risc_size -= dlen; | |
4214 | fragment++; | |
4215 | } | |
4216 | ||
4217 | /* Next segment. */ | |
4218 | segments--; | |
4219 | } | |
4220 | ||
4221 | return rval; | |
4222 | } | |
4223 | ||
d1c61909 AV |
4224 | #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/" |
4225 | ||
0107109e | 4226 | int |
e315cd28 | 4227 | qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) |
5433383e AV |
4228 | { |
4229 | int rval; | |
4230 | int i, fragment; | |
4231 | uint16_t *wcode, *fwcode; | |
4232 | uint32_t risc_addr, risc_size, fwclen, wlen, *seg; | |
4233 | struct fw_blob *blob; | |
e315cd28 | 4234 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4235 | struct req_que *req = ha->req_q_map[0]; |
5433383e AV |
4236 | |
4237 | /* Load firmware blob. */ | |
e315cd28 | 4238 | blob = qla2x00_request_firmware(vha); |
5433383e AV |
4239 | if (!blob) { |
4240 | qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n"); | |
d1c61909 AV |
4241 | qla_printk(KERN_ERR, ha, "Firmware images can be retrieved " |
4242 | "from: " QLA_FW_URL ".\n"); | |
5433383e AV |
4243 | return QLA_FUNCTION_FAILED; |
4244 | } | |
4245 | ||
4246 | rval = QLA_SUCCESS; | |
4247 | ||
73208dfd | 4248 | wcode = (uint16_t *)req->ring; |
5433383e AV |
4249 | *srisc_addr = 0; |
4250 | fwcode = (uint16_t *)blob->fw->data; | |
4251 | fwclen = 0; | |
4252 | ||
4253 | /* Validate firmware image by checking version. */ | |
4254 | if (blob->fw->size < 8 * sizeof(uint16_t)) { | |
4255 | qla_printk(KERN_WARNING, ha, | |
4256 | "Unable to verify integrity of firmware image (%Zd)!\n", | |
4257 | blob->fw->size); | |
4258 | goto fail_fw_integrity; | |
4259 | } | |
4260 | for (i = 0; i < 4; i++) | |
4261 | wcode[i] = be16_to_cpu(fwcode[i + 4]); | |
4262 | if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && | |
4263 | wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && | |
4264 | wcode[2] == 0 && wcode[3] == 0)) { | |
4265 | qla_printk(KERN_WARNING, ha, | |
4266 | "Unable to verify integrity of firmware image!\n"); | |
4267 | qla_printk(KERN_WARNING, ha, | |
4268 | "Firmware data: %04x %04x %04x %04x!\n", wcode[0], | |
4269 | wcode[1], wcode[2], wcode[3]); | |
4270 | goto fail_fw_integrity; | |
4271 | } | |
4272 | ||
4273 | seg = blob->segs; | |
4274 | while (*seg && rval == QLA_SUCCESS) { | |
4275 | risc_addr = *seg; | |
4276 | *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; | |
4277 | risc_size = be16_to_cpu(fwcode[3]); | |
4278 | ||
4279 | /* Validate firmware image size. */ | |
4280 | fwclen += risc_size * sizeof(uint16_t); | |
4281 | if (blob->fw->size < fwclen) { | |
4282 | qla_printk(KERN_WARNING, ha, | |
4283 | "Unable to verify integrity of firmware image " | |
4284 | "(%Zd)!\n", blob->fw->size); | |
4285 | goto fail_fw_integrity; | |
4286 | } | |
4287 | ||
4288 | fragment = 0; | |
4289 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4290 | wlen = (uint16_t)(ha->fw_transfer_size >> 1); | |
4291 | if (wlen > risc_size) | |
4292 | wlen = risc_size; | |
4293 | ||
4294 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
e315cd28 | 4295 | "addr %x, number of words 0x%x.\n", vha->host_no, |
5433383e AV |
4296 | risc_addr, wlen)); |
4297 | ||
4298 | for (i = 0; i < wlen; i++) | |
4299 | wcode[i] = swab16(fwcode[i]); | |
4300 | ||
73208dfd | 4301 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
5433383e AV |
4302 | wlen); |
4303 | if (rval) { | |
4304 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4305 | "segment %d of firmware\n", vha->host_no, |
5433383e AV |
4306 | fragment)); |
4307 | qla_printk(KERN_WARNING, ha, | |
4308 | "[ERROR] Failed to load segment %d of " | |
4309 | "firmware\n", fragment); | |
4310 | break; | |
4311 | } | |
4312 | ||
4313 | fwcode += wlen; | |
4314 | risc_addr += wlen; | |
4315 | risc_size -= wlen; | |
4316 | fragment++; | |
4317 | } | |
4318 | ||
4319 | /* Next segment. */ | |
4320 | seg++; | |
4321 | } | |
4322 | return rval; | |
4323 | ||
4324 | fail_fw_integrity: | |
4325 | return QLA_FUNCTION_FAILED; | |
4326 | } | |
4327 | ||
eaac30be AV |
4328 | static int |
4329 | qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
0107109e AV |
4330 | { |
4331 | int rval; | |
4332 | int segments, fragment; | |
4333 | uint32_t *dcode, dlen; | |
4334 | uint32_t risc_addr; | |
4335 | uint32_t risc_size; | |
4336 | uint32_t i; | |
5433383e | 4337 | struct fw_blob *blob; |
0107109e | 4338 | uint32_t *fwcode, fwclen; |
e315cd28 | 4339 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4340 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 4341 | |
5433383e | 4342 | /* Load firmware blob. */ |
e315cd28 | 4343 | blob = qla2x00_request_firmware(vha); |
5433383e AV |
4344 | if (!blob) { |
4345 | qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n"); | |
d1c61909 AV |
4346 | qla_printk(KERN_ERR, ha, "Firmware images can be retrieved " |
4347 | "from: " QLA_FW_URL ".\n"); | |
4348 | ||
eaac30be | 4349 | return QLA_FUNCTION_FAILED; |
0107109e AV |
4350 | } |
4351 | ||
eaac30be AV |
4352 | qla_printk(KERN_INFO, ha, |
4353 | "FW: Loading via request-firmware...\n"); | |
4354 | ||
0107109e AV |
4355 | rval = QLA_SUCCESS; |
4356 | ||
4357 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4358 | dcode = (uint32_t *)req->ring; |
0107109e | 4359 | *srisc_addr = 0; |
5433383e | 4360 | fwcode = (uint32_t *)blob->fw->data; |
0107109e AV |
4361 | fwclen = 0; |
4362 | ||
4363 | /* Validate firmware image by checking version. */ | |
5433383e | 4364 | if (blob->fw->size < 8 * sizeof(uint32_t)) { |
0107109e | 4365 | qla_printk(KERN_WARNING, ha, |
5433383e AV |
4366 | "Unable to verify integrity of firmware image (%Zd)!\n", |
4367 | blob->fw->size); | |
0107109e AV |
4368 | goto fail_fw_integrity; |
4369 | } | |
4370 | for (i = 0; i < 4; i++) | |
4371 | dcode[i] = be32_to_cpu(fwcode[i + 4]); | |
4372 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4373 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4374 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4375 | dcode[3] == 0)) { | |
4376 | qla_printk(KERN_WARNING, ha, | |
5433383e | 4377 | "Unable to verify integrity of firmware image!\n"); |
0107109e AV |
4378 | qla_printk(KERN_WARNING, ha, |
4379 | "Firmware data: %08x %08x %08x %08x!\n", dcode[0], | |
4380 | dcode[1], dcode[2], dcode[3]); | |
4381 | goto fail_fw_integrity; | |
4382 | } | |
4383 | ||
4384 | while (segments && rval == QLA_SUCCESS) { | |
4385 | risc_addr = be32_to_cpu(fwcode[2]); | |
4386 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4387 | risc_size = be32_to_cpu(fwcode[3]); | |
4388 | ||
4389 | /* Validate firmware image size. */ | |
4390 | fwclen += risc_size * sizeof(uint32_t); | |
5433383e | 4391 | if (blob->fw->size < fwclen) { |
0107109e | 4392 | qla_printk(KERN_WARNING, ha, |
5433383e AV |
4393 | "Unable to verify integrity of firmware image " |
4394 | "(%Zd)!\n", blob->fw->size); | |
4395 | ||
0107109e AV |
4396 | goto fail_fw_integrity; |
4397 | } | |
4398 | ||
4399 | fragment = 0; | |
4400 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4401 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4402 | if (dlen > risc_size) | |
4403 | dlen = risc_size; | |
4404 | ||
4405 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
e315cd28 | 4406 | "addr %x, number of dwords 0x%x.\n", vha->host_no, |
0107109e AV |
4407 | risc_addr, dlen)); |
4408 | ||
4409 | for (i = 0; i < dlen; i++) | |
4410 | dcode[i] = swab32(fwcode[i]); | |
4411 | ||
73208dfd | 4412 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
590f98e5 | 4413 | dlen); |
0107109e AV |
4414 | if (rval) { |
4415 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4416 | "segment %d of firmware\n", vha->host_no, |
0107109e AV |
4417 | fragment)); |
4418 | qla_printk(KERN_WARNING, ha, | |
4419 | "[ERROR] Failed to load segment %d of " | |
4420 | "firmware\n", fragment); | |
4421 | break; | |
4422 | } | |
4423 | ||
4424 | fwcode += dlen; | |
4425 | risc_addr += dlen; | |
4426 | risc_size -= dlen; | |
4427 | fragment++; | |
4428 | } | |
4429 | ||
4430 | /* Next segment. */ | |
4431 | segments--; | |
4432 | } | |
0107109e AV |
4433 | return rval; |
4434 | ||
4435 | fail_fw_integrity: | |
0107109e | 4436 | return QLA_FUNCTION_FAILED; |
0107109e | 4437 | } |
18c6c127 | 4438 | |
eaac30be AV |
4439 | int |
4440 | qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4441 | { | |
4442 | int rval; | |
4443 | ||
e337d907 AV |
4444 | if (ql2xfwloadbin == 1) |
4445 | return qla81xx_load_risc(vha, srisc_addr); | |
4446 | ||
eaac30be AV |
4447 | /* |
4448 | * FW Load priority: | |
4449 | * 1) Firmware via request-firmware interface (.bin file). | |
4450 | * 2) Firmware residing in flash. | |
4451 | */ | |
4452 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4453 | if (rval == QLA_SUCCESS) | |
4454 | return rval; | |
4455 | ||
cbc8eb67 AV |
4456 | return qla24xx_load_risc_flash(vha, srisc_addr, |
4457 | vha->hw->flt_region_fw); | |
eaac30be AV |
4458 | } |
4459 | ||
4460 | int | |
4461 | qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4462 | { | |
4463 | int rval; | |
cbc8eb67 | 4464 | struct qla_hw_data *ha = vha->hw; |
eaac30be | 4465 | |
e337d907 | 4466 | if (ql2xfwloadbin == 2) |
cbc8eb67 | 4467 | goto try_blob_fw; |
e337d907 | 4468 | |
eaac30be AV |
4469 | /* |
4470 | * FW Load priority: | |
4471 | * 1) Firmware residing in flash. | |
4472 | * 2) Firmware via request-firmware interface (.bin file). | |
cbc8eb67 | 4473 | * 3) Golden-Firmware residing in flash -- limited operation. |
eaac30be | 4474 | */ |
cbc8eb67 | 4475 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); |
eaac30be AV |
4476 | if (rval == QLA_SUCCESS) |
4477 | return rval; | |
4478 | ||
cbc8eb67 AV |
4479 | try_blob_fw: |
4480 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4481 | if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) | |
4482 | return rval; | |
4483 | ||
4484 | qla_printk(KERN_ERR, ha, | |
4485 | "FW: Attempting to fallback to golden firmware...\n"); | |
4486 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); | |
4487 | if (rval != QLA_SUCCESS) | |
4488 | return rval; | |
4489 | ||
4490 | qla_printk(KERN_ERR, ha, | |
4491 | "FW: Please update operational firmware...\n"); | |
4492 | ha->flags.running_gold_fw = 1; | |
4493 | ||
4494 | return rval; | |
eaac30be AV |
4495 | } |
4496 | ||
18c6c127 | 4497 | void |
e315cd28 | 4498 | qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) |
18c6c127 AV |
4499 | { |
4500 | int ret, retries; | |
e315cd28 | 4501 | struct qla_hw_data *ha = vha->hw; |
18c6c127 | 4502 | |
85880801 AV |
4503 | if (ha->flags.pci_channel_io_perm_failure) |
4504 | return; | |
e428924c | 4505 | if (!IS_FWI2_CAPABLE(ha)) |
18c6c127 | 4506 | return; |
75edf81d AV |
4507 | if (!ha->fw_major_version) |
4508 | return; | |
18c6c127 | 4509 | |
e315cd28 | 4510 | ret = qla2x00_stop_firmware(vha); |
7c7f1f29 | 4511 | for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && |
b469a7cb | 4512 | ret != QLA_INVALID_COMMAND && retries ; retries--) { |
e315cd28 AC |
4513 | ha->isp_ops->reset_chip(vha); |
4514 | if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) | |
18c6c127 | 4515 | continue; |
e315cd28 | 4516 | if (qla2x00_setup_chip(vha) != QLA_SUCCESS) |
18c6c127 AV |
4517 | continue; |
4518 | qla_printk(KERN_INFO, ha, | |
4519 | "Attempting retry of stop-firmware command...\n"); | |
e315cd28 | 4520 | ret = qla2x00_stop_firmware(vha); |
18c6c127 AV |
4521 | } |
4522 | } | |
2c3dfe3f SJ |
4523 | |
4524 | int | |
e315cd28 | 4525 | qla24xx_configure_vhba(scsi_qla_host_t *vha) |
2c3dfe3f SJ |
4526 | { |
4527 | int rval = QLA_SUCCESS; | |
4528 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 AC |
4529 | struct qla_hw_data *ha = vha->hw; |
4530 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
67c2e93a AC |
4531 | struct req_que *req; |
4532 | struct rsp_que *rsp; | |
2c3dfe3f | 4533 | |
e315cd28 | 4534 | if (!vha->vp_idx) |
2c3dfe3f SJ |
4535 | return -EINVAL; |
4536 | ||
e315cd28 | 4537 | rval = qla2x00_fw_ready(base_vha); |
7163ea81 | 4538 | if (ha->flags.cpu_affinity_enabled) |
67c2e93a AC |
4539 | req = ha->req_q_map[0]; |
4540 | else | |
4541 | req = vha->req; | |
4542 | rsp = req->rsp; | |
4543 | ||
2c3dfe3f | 4544 | if (rval == QLA_SUCCESS) { |
e315cd28 | 4545 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
73208dfd | 4546 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
2c3dfe3f SJ |
4547 | } |
4548 | ||
e315cd28 | 4549 | vha->flags.management_server_logged_in = 0; |
2c3dfe3f SJ |
4550 | |
4551 | /* Login to SNS first */ | |
e315cd28 | 4552 | ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1); |
2c3dfe3f SJ |
4553 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
4554 | DEBUG15(qla_printk(KERN_INFO, ha, | |
4555 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
4556 | "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS, | |
4557 | mb[0], mb[1], mb[2], mb[6], mb[7])); | |
4558 | return (QLA_FUNCTION_FAILED); | |
4559 | } | |
4560 | ||
e315cd28 AC |
4561 | atomic_set(&vha->loop_down_timer, 0); |
4562 | atomic_set(&vha->loop_state, LOOP_UP); | |
4563 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
4564 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
4565 | rval = qla2x00_loop_resync(base_vha); | |
2c3dfe3f SJ |
4566 | |
4567 | return rval; | |
4568 | } | |
4d4df193 HK |
4569 | |
4570 | /* 84XX Support **************************************************************/ | |
4571 | ||
4572 | static LIST_HEAD(qla_cs84xx_list); | |
4573 | static DEFINE_MUTEX(qla_cs84xx_mutex); | |
4574 | ||
4575 | static struct qla_chip_state_84xx * | |
e315cd28 | 4576 | qla84xx_get_chip(struct scsi_qla_host *vha) |
4d4df193 HK |
4577 | { |
4578 | struct qla_chip_state_84xx *cs84xx; | |
e315cd28 | 4579 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4580 | |
4581 | mutex_lock(&qla_cs84xx_mutex); | |
4582 | ||
4583 | /* Find any shared 84xx chip. */ | |
4584 | list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { | |
4585 | if (cs84xx->bus == ha->pdev->bus) { | |
4586 | kref_get(&cs84xx->kref); | |
4587 | goto done; | |
4588 | } | |
4589 | } | |
4590 | ||
4591 | cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); | |
4592 | if (!cs84xx) | |
4593 | goto done; | |
4594 | ||
4595 | kref_init(&cs84xx->kref); | |
4596 | spin_lock_init(&cs84xx->access_lock); | |
4597 | mutex_init(&cs84xx->fw_update_mutex); | |
4598 | cs84xx->bus = ha->pdev->bus; | |
4599 | ||
4600 | list_add_tail(&cs84xx->list, &qla_cs84xx_list); | |
4601 | done: | |
4602 | mutex_unlock(&qla_cs84xx_mutex); | |
4603 | return cs84xx; | |
4604 | } | |
4605 | ||
4606 | static void | |
4607 | __qla84xx_chip_release(struct kref *kref) | |
4608 | { | |
4609 | struct qla_chip_state_84xx *cs84xx = | |
4610 | container_of(kref, struct qla_chip_state_84xx, kref); | |
4611 | ||
4612 | mutex_lock(&qla_cs84xx_mutex); | |
4613 | list_del(&cs84xx->list); | |
4614 | mutex_unlock(&qla_cs84xx_mutex); | |
4615 | kfree(cs84xx); | |
4616 | } | |
4617 | ||
4618 | void | |
e315cd28 | 4619 | qla84xx_put_chip(struct scsi_qla_host *vha) |
4d4df193 | 4620 | { |
e315cd28 | 4621 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4622 | if (ha->cs84xx) |
4623 | kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); | |
4624 | } | |
4625 | ||
4626 | static int | |
e315cd28 | 4627 | qla84xx_init_chip(scsi_qla_host_t *vha) |
4d4df193 HK |
4628 | { |
4629 | int rval; | |
4630 | uint16_t status[2]; | |
e315cd28 | 4631 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4632 | |
4633 | mutex_lock(&ha->cs84xx->fw_update_mutex); | |
4634 | ||
e315cd28 | 4635 | rval = qla84xx_verify_chip(vha, status); |
4d4df193 HK |
4636 | |
4637 | mutex_unlock(&ha->cs84xx->fw_update_mutex); | |
4638 | ||
4639 | return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: | |
4640 | QLA_SUCCESS; | |
4641 | } | |
3a03eb79 AV |
4642 | |
4643 | /* 81XX Support **************************************************************/ | |
4644 | ||
4645 | int | |
4646 | qla81xx_nvram_config(scsi_qla_host_t *vha) | |
4647 | { | |
4648 | int rval; | |
4649 | struct init_cb_81xx *icb; | |
4650 | struct nvram_81xx *nv; | |
4651 | uint32_t *dptr; | |
4652 | uint8_t *dptr1, *dptr2; | |
4653 | uint32_t chksum; | |
4654 | uint16_t cnt; | |
4655 | struct qla_hw_data *ha = vha->hw; | |
4656 | ||
4657 | rval = QLA_SUCCESS; | |
4658 | icb = (struct init_cb_81xx *)ha->init_cb; | |
4659 | nv = ha->nvram; | |
4660 | ||
4661 | /* Determine NVRAM starting address. */ | |
4662 | ha->nvram_size = sizeof(struct nvram_81xx); | |
3a03eb79 | 4663 | ha->vpd_size = FA_NVRAM_VPD_SIZE; |
3a03eb79 AV |
4664 | |
4665 | /* Get VPD data into cache */ | |
4666 | ha->vpd = ha->nvram + VPD_OFFSET; | |
3d79038f AV |
4667 | ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, |
4668 | ha->vpd_size); | |
3a03eb79 AV |
4669 | |
4670 | /* Get NVRAM data into cache and calculate checksum. */ | |
3d79038f | 4671 | ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, |
3a03eb79 | 4672 | ha->nvram_size); |
3d79038f | 4673 | dptr = (uint32_t *)nv; |
3a03eb79 AV |
4674 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) |
4675 | chksum += le32_to_cpu(*dptr++); | |
4676 | ||
7640335e | 4677 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
3a03eb79 AV |
4678 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
4679 | ||
4680 | /* Bad NVRAM data, set defaults parameters. */ | |
4681 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
4682 | || nv->id[3] != ' ' || | |
4683 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
4684 | /* Reset NVRAM data. */ | |
4685 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
4686 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
4687 | le16_to_cpu(nv->nvram_version)); | |
4688 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " | |
4689 | "invalid -- WWPN) defaults.\n"); | |
4690 | ||
4691 | /* | |
4692 | * Set default initialization control block. | |
4693 | */ | |
4694 | memset(nv, 0, ha->nvram_size); | |
4695 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
4696 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
4697 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
4698 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4699 | nv->exchange_count = __constant_cpu_to_le16(0); | |
4700 | nv->port_name[0] = 0x21; | |
e5b68a61 | 4701 | nv->port_name[1] = 0x00 + ha->port_no; |
3a03eb79 AV |
4702 | nv->port_name[2] = 0x00; |
4703 | nv->port_name[3] = 0xe0; | |
4704 | nv->port_name[4] = 0x8b; | |
4705 | nv->port_name[5] = 0x1c; | |
4706 | nv->port_name[6] = 0x55; | |
4707 | nv->port_name[7] = 0x86; | |
4708 | nv->node_name[0] = 0x20; | |
4709 | nv->node_name[1] = 0x00; | |
4710 | nv->node_name[2] = 0x00; | |
4711 | nv->node_name[3] = 0xe0; | |
4712 | nv->node_name[4] = 0x8b; | |
4713 | nv->node_name[5] = 0x1c; | |
4714 | nv->node_name[6] = 0x55; | |
4715 | nv->node_name[7] = 0x86; | |
4716 | nv->login_retry_count = __constant_cpu_to_le16(8); | |
4717 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
4718 | nv->login_timeout = __constant_cpu_to_le16(0); | |
4719 | nv->firmware_options_1 = | |
4720 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
4721 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
4722 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
4723 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
4724 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
4725 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
4726 | nv->reset_delay = 5; | |
4727 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
4728 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
4729 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
eeebcc92 | 4730 | nv->enode_mac[0] = 0x00; |
3a03eb79 AV |
4731 | nv->enode_mac[1] = 0x02; |
4732 | nv->enode_mac[2] = 0x03; | |
4733 | nv->enode_mac[3] = 0x04; | |
4734 | nv->enode_mac[4] = 0x05; | |
e5b68a61 | 4735 | nv->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
4736 | |
4737 | rval = 1; | |
4738 | } | |
4739 | ||
4740 | /* Reset Initialization control block */ | |
4741 | memset(icb, 0, sizeof(struct init_cb_81xx)); | |
4742 | ||
4743 | /* Copy 1st segment. */ | |
4744 | dptr1 = (uint8_t *)icb; | |
4745 | dptr2 = (uint8_t *)&nv->version; | |
4746 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
4747 | while (cnt--) | |
4748 | *dptr1++ = *dptr2++; | |
4749 | ||
4750 | icb->login_retry_count = nv->login_retry_count; | |
4751 | ||
4752 | /* Copy 2nd segment. */ | |
4753 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
4754 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
4755 | cnt = (uint8_t *)&icb->reserved_5 - | |
4756 | (uint8_t *)&icb->interrupt_delay_timer; | |
4757 | while (cnt--) | |
4758 | *dptr1++ = *dptr2++; | |
4759 | ||
4760 | memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); | |
4761 | /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ | |
4762 | if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { | |
4763 | icb->enode_mac[0] = 0x01; | |
4764 | icb->enode_mac[1] = 0x02; | |
4765 | icb->enode_mac[2] = 0x03; | |
4766 | icb->enode_mac[3] = 0x04; | |
4767 | icb->enode_mac[4] = 0x05; | |
e5b68a61 | 4768 | icb->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
4769 | } |
4770 | ||
b64b0e8f AV |
4771 | /* Use extended-initialization control block. */ |
4772 | memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); | |
4773 | ||
3a03eb79 AV |
4774 | /* |
4775 | * Setup driver NVRAM options. | |
4776 | */ | |
4777 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), | |
4778 | "QLE81XX"); | |
4779 | ||
4780 | /* Use alternate WWN? */ | |
4781 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
4782 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
4783 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
4784 | } | |
4785 | ||
4786 | /* Prepare nodename */ | |
4787 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { | |
4788 | /* | |
4789 | * Firmware will apply the following mask if the nodename was | |
4790 | * not provided. | |
4791 | */ | |
4792 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
4793 | icb->node_name[0] &= 0xF0; | |
4794 | } | |
4795 | ||
4796 | /* Set host adapter parameters. */ | |
4797 | ha->flags.disable_risc_code_load = 0; | |
4798 | ha->flags.enable_lip_reset = 0; | |
4799 | ha->flags.enable_lip_full_login = | |
4800 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
4801 | ha->flags.enable_target_reset = | |
4802 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
4803 | ha->flags.enable_led_scheme = 0; | |
4804 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; | |
4805 | ||
4806 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & | |
4807 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
4808 | ||
4809 | /* save HBA serial number */ | |
4810 | ha->serial0 = icb->port_name[5]; | |
4811 | ha->serial1 = icb->port_name[6]; | |
4812 | ha->serial2 = icb->port_name[7]; | |
4813 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); | |
4814 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
4815 | ||
4816 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4817 | ||
4818 | ha->retry_count = le16_to_cpu(nv->login_retry_count); | |
4819 | ||
4820 | /* Set minimum login_timeout to 4 seconds. */ | |
4821 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
4822 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
4823 | if (le16_to_cpu(nv->login_timeout) < 4) | |
4824 | nv->login_timeout = __constant_cpu_to_le16(4); | |
4825 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
4826 | icb->login_timeout = nv->login_timeout; | |
4827 | ||
4828 | /* Set minimum RATOV to 100 tenths of a second. */ | |
4829 | ha->r_a_tov = 100; | |
4830 | ||
4831 | ha->loop_reset_delay = nv->reset_delay; | |
4832 | ||
4833 | /* Link Down Timeout = 0: | |
4834 | * | |
4835 | * When Port Down timer expires we will start returning | |
4836 | * I/O's to OS with "DID_NO_CONNECT". | |
4837 | * | |
4838 | * Link Down Timeout != 0: | |
4839 | * | |
4840 | * The driver waits for the link to come up after link down | |
4841 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
4842 | */ | |
4843 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
4844 | ha->loop_down_abort_time = | |
4845 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
4846 | } else { | |
4847 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
4848 | ha->loop_down_abort_time = | |
4849 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
4850 | } | |
4851 | ||
4852 | /* Need enough time to try and get the port back. */ | |
4853 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
4854 | if (qlport_down_retry) | |
4855 | ha->port_down_retry_count = qlport_down_retry; | |
4856 | ||
4857 | /* Set login_retry_count */ | |
4858 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
4859 | if (ha->port_down_retry_count == | |
4860 | le16_to_cpu(nv->port_down_retry_count) && | |
4861 | ha->port_down_retry_count > 3) | |
4862 | ha->login_retry_count = ha->port_down_retry_count; | |
4863 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
4864 | ha->login_retry_count = ha->port_down_retry_count; | |
4865 | if (ql2xloginretrycount) | |
4866 | ha->login_retry_count = ql2xloginretrycount; | |
4867 | ||
4868 | /* Enable ZIO. */ | |
4869 | if (!vha->flags.init_done) { | |
4870 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & | |
4871 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
4872 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
4873 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
4874 | } | |
4875 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
4876 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
4877 | vha->flags.process_response_queue = 0; | |
4878 | if (ha->zio_mode != QLA_ZIO_DISABLED) { | |
4879 | ha->zio_mode = QLA_ZIO_MODE_6; | |
4880 | ||
4881 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay " | |
4882 | "(%d us).\n", vha->host_no, ha->zio_mode, | |
4883 | ha->zio_timer * 100)); | |
4884 | qla_printk(KERN_INFO, ha, | |
4885 | "ZIO mode %d enabled; timer delay (%d us).\n", | |
4886 | ha->zio_mode, ha->zio_timer * 100); | |
4887 | ||
4888 | icb->firmware_options_2 |= cpu_to_le32( | |
4889 | (uint32_t)ha->zio_mode); | |
4890 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
4891 | vha->flags.process_response_queue = 1; | |
4892 | } | |
4893 | ||
4894 | if (rval) { | |
4895 | DEBUG2_3(printk(KERN_WARNING | |
4896 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); | |
4897 | } | |
4898 | return (rval); | |
4899 | } | |
4900 | ||
4901 | void | |
ae97c91e | 4902 | qla81xx_update_fw_options(scsi_qla_host_t *vha) |
3a03eb79 | 4903 | { |
ae97c91e AV |
4904 | struct qla_hw_data *ha = vha->hw; |
4905 | ||
4906 | if (!ql2xetsenable) | |
4907 | return; | |
4908 | ||
4909 | /* Enable ETS Burst. */ | |
4910 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
4911 | ha->fw_options[2] |= BIT_9; | |
4912 | qla2x00_set_fw_options(vha, ha->fw_options); | |
3a03eb79 | 4913 | } |
09ff701a SR |
4914 | |
4915 | /* | |
4916 | * qla24xx_get_fcp_prio | |
4917 | * Gets the fcp cmd priority value for the logged in port. | |
4918 | * Looks for a match of the port descriptors within | |
4919 | * each of the fcp prio config entries. If a match is found, | |
4920 | * the tag (priority) value is returned. | |
4921 | * | |
4922 | * Input: | |
4923 | * ha = adapter block po | |
4924 | * fcport = port structure pointer. | |
4925 | * | |
4926 | * Return: | |
6c452a45 | 4927 | * non-zero (if found) |
09ff701a SR |
4928 | * 0 (if not found) |
4929 | * | |
4930 | * Context: | |
4931 | * Kernel context | |
4932 | */ | |
4933 | uint8_t | |
4934 | qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) | |
4935 | { | |
4936 | int i, entries; | |
4937 | uint8_t pid_match, wwn_match; | |
4938 | uint8_t priority; | |
4939 | uint32_t pid1, pid2; | |
4940 | uint64_t wwn1, wwn2; | |
4941 | struct qla_fcp_prio_entry *pri_entry; | |
4942 | struct qla_hw_data *ha = vha->hw; | |
4943 | ||
4944 | if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) | |
4945 | return 0; | |
4946 | ||
4947 | priority = 0; | |
4948 | entries = ha->fcp_prio_cfg->num_entries; | |
4949 | pri_entry = &ha->fcp_prio_cfg->entry[0]; | |
4950 | ||
4951 | for (i = 0; i < entries; i++) { | |
4952 | pid_match = wwn_match = 0; | |
4953 | ||
4954 | if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { | |
4955 | pri_entry++; | |
4956 | continue; | |
4957 | } | |
4958 | ||
4959 | /* check source pid for a match */ | |
4960 | if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { | |
4961 | pid1 = pri_entry->src_pid & INVALID_PORT_ID; | |
4962 | pid2 = vha->d_id.b24 & INVALID_PORT_ID; | |
4963 | if (pid1 == INVALID_PORT_ID) | |
4964 | pid_match++; | |
4965 | else if (pid1 == pid2) | |
4966 | pid_match++; | |
4967 | } | |
4968 | ||
4969 | /* check destination pid for a match */ | |
4970 | if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { | |
4971 | pid1 = pri_entry->dst_pid & INVALID_PORT_ID; | |
4972 | pid2 = fcport->d_id.b24 & INVALID_PORT_ID; | |
4973 | if (pid1 == INVALID_PORT_ID) | |
4974 | pid_match++; | |
4975 | else if (pid1 == pid2) | |
4976 | pid_match++; | |
4977 | } | |
4978 | ||
4979 | /* check source WWN for a match */ | |
4980 | if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { | |
4981 | wwn1 = wwn_to_u64(vha->port_name); | |
4982 | wwn2 = wwn_to_u64(pri_entry->src_wwpn); | |
4983 | if (wwn2 == (uint64_t)-1) | |
4984 | wwn_match++; | |
4985 | else if (wwn1 == wwn2) | |
4986 | wwn_match++; | |
4987 | } | |
4988 | ||
4989 | /* check destination WWN for a match */ | |
4990 | if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { | |
4991 | wwn1 = wwn_to_u64(fcport->port_name); | |
4992 | wwn2 = wwn_to_u64(pri_entry->dst_wwpn); | |
4993 | if (wwn2 == (uint64_t)-1) | |
4994 | wwn_match++; | |
4995 | else if (wwn1 == wwn2) | |
4996 | wwn_match++; | |
4997 | } | |
4998 | ||
4999 | if (pid_match == 2 || wwn_match == 2) { | |
5000 | /* Found a matching entry */ | |
5001 | if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) | |
5002 | priority = pri_entry->tag; | |
5003 | break; | |
5004 | } | |
5005 | ||
5006 | pri_entry++; | |
5007 | } | |
5008 | ||
5009 | return priority; | |
5010 | } | |
5011 | ||
5012 | /* | |
5013 | * qla24xx_update_fcport_fcp_prio | |
5014 | * Activates fcp priority for the logged in fc port | |
5015 | * | |
5016 | * Input: | |
5017 | * ha = adapter block pointer. | |
5018 | * fcp = port structure pointer. | |
5019 | * | |
5020 | * Return: | |
5021 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
5022 | * | |
5023 | * Context: | |
5024 | * Kernel context. | |
5025 | */ | |
5026 | int | |
5027 | qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *ha, fc_port_t *fcport) | |
5028 | { | |
5029 | int ret; | |
5030 | uint8_t priority; | |
5031 | uint16_t mb[5]; | |
5032 | ||
5033 | if (atomic_read(&fcport->state) == FCS_UNCONFIGURED || | |
5034 | fcport->port_type != FCT_TARGET || | |
5035 | fcport->loop_id == FC_NO_LOOP_ID) | |
5036 | return QLA_FUNCTION_FAILED; | |
5037 | ||
5038 | priority = qla24xx_get_fcp_prio(ha, fcport); | |
5039 | ret = qla24xx_set_fcp_prio(ha, fcport->loop_id, priority, mb); | |
5040 | if (ret == QLA_SUCCESS) | |
5041 | fcport->fcp_prio = priority; | |
5042 | else | |
5043 | DEBUG2(printk(KERN_WARNING | |
5044 | "scsi(%ld): Unable to activate fcp priority, " | |
5045 | " ret=0x%x\n", ha->host_no, ret)); | |
5046 | ||
5047 | return ret; | |
5048 | } | |
5049 | ||
5050 | /* | |
5051 | * qla24xx_update_all_fcp_prio | |
5052 | * Activates fcp priority for all the logged in ports | |
5053 | * | |
5054 | * Input: | |
5055 | * ha = adapter block pointer. | |
5056 | * | |
5057 | * Return: | |
5058 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
5059 | * | |
5060 | * Context: | |
5061 | * Kernel context. | |
5062 | */ | |
5063 | int | |
5064 | qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) | |
5065 | { | |
5066 | int ret; | |
5067 | fc_port_t *fcport; | |
5068 | ||
5069 | ret = QLA_FUNCTION_FAILED; | |
5070 | /* We need to set priority for all logged in ports */ | |
5071 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
5072 | ret = qla24xx_update_fcport_fcp_prio(vha, fcport); | |
5073 | ||
5074 | return ret; | |
5075 | } |