scsi/NCR5380: reduce depth of sun3_scsi nested includes
[deliverable/linux.git] / drivers / scsi / sun3_scsi.c
CommitLineData
1da177e4
LT
1/*
2 * Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl)
3 *
4 * Sun3 DMA routines added by Sam Creasey (sammy@sammy.net)
5 *
6 * Adapted from mac_scsinew.c:
7 */
8/*
9 * Generic Macintosh NCR5380 driver
10 *
11 * Copyright 1998, Michael Schmitz <mschmitz@lbl.gov>
12 *
13 * derived in part from:
14 */
15/*
16 * Generic Generic NCR5380 driver
17 *
18 * Copyright 1995, Russell King
19 *
20 * ALPHA RELEASE 1.
21 *
22 * For more information, please consult
23 *
24 * NCR 5380 Family
25 * SCSI Protocol Controller
26 * Databook
27 *
28 * NCR Microelectronics
29 * 1635 Aeroplaza Drive
30 * Colorado Springs, CO 80916
31 * 1+ (719) 578-3400
32 * 1+ (800) 334-5454
33 */
34
35
36/*
37 * This is from mac_scsi.h, but hey, maybe this is useful for Sun3 too! :)
38 *
39 * Options :
40 *
41 * PARITY - enable parity checking. Not supported.
42 *
43 * SCSI2 - enable support for SCSI-II tagged queueing. Untested.
44 *
45 * USLEEP - enable support for devices that don't disconnect. Untested.
46 */
47
1da177e4
LT
48#define AUTOSENSE
49
50#include <linux/types.h>
51#include <linux/stddef.h>
52#include <linux/ctype.h>
53#include <linux/delay.h>
54
55#include <linux/module.h>
56#include <linux/signal.h>
1da177e4
LT
57#include <linux/ioport.h>
58#include <linux/init.h>
59#include <linux/blkdev.h>
60
61#include <asm/io.h>
1da177e4
LT
62
63#include <asm/sun3ints.h>
64#include <asm/dvma.h>
65#include <asm/idprom.h>
66#include <asm/machines.h>
67
68/* dma on! */
69#define REAL_DMA
70
71#include "scsi.h"
72#include <scsi/scsi_host.h>
73#include "sun3_scsi.h"
9f6620a3 74#include "NCR5380.h"
1da177e4 75
1da177e4
LT
76/* #define OLDDMA */
77
78#define USE_WRAPPER
79/*#define RESET_BOOT */
80#define DRIVER_SETUP
81
1da177e4
LT
82/*
83 * BUG can be used to trigger a strange code-size related hang on 2.1 kernels
84 */
85#ifdef BUG
86#undef RESET_BOOT
87#undef DRIVER_SETUP
88#endif
89
90/* #define SUPPORT_TAGS */
91
92#define ENABLE_IRQ() enable_irq( IRQ_SUN3_SCSI );
93
94
7d12e780 95static irqreturn_t scsi_sun3_intr(int irq, void *dummy);
1da177e4
LT
96static inline unsigned char sun3scsi_read(int reg);
97static inline void sun3scsi_write(int reg, int value);
98
99static int setup_can_queue = -1;
100module_param(setup_can_queue, int, 0);
101static int setup_cmd_per_lun = -1;
102module_param(setup_cmd_per_lun, int, 0);
103static int setup_sg_tablesize = -1;
104module_param(setup_sg_tablesize, int, 0);
105#ifdef SUPPORT_TAGS
106static int setup_use_tagged_queuing = -1;
107module_param(setup_use_tagged_queuing, int, 0);
108#endif
109static int setup_hostid = -1;
110module_param(setup_hostid, int, 0);
111
811c9366 112static struct scsi_cmnd *sun3_dma_setup_done = NULL;
1da177e4 113
2b0f834c
MS
114#define RESET_RUN_DONE
115
1da177e4
LT
116#define AFTER_RESET_DELAY (HZ/2)
117
118/* ms to wait after hitting dma regs */
119#define SUN3_DMA_DELAY 10
120
121/* dvma buffer to allocate -- 32k should hopefully be more than sufficient */
122#define SUN3_DVMA_BUFSIZE 0xe000
123
124/* minimum number of bytes to do dma on */
125#define SUN3_DMA_MINSIZE 128
126
127static volatile unsigned char *sun3_scsi_regp;
128static volatile struct sun3_dma_regs *dregs;
129#ifdef OLDDMA
130static unsigned char *dmabuf = NULL; /* dma memory buffer */
131#endif
132static struct sun3_udc_regs *udc_regs = NULL;
133static unsigned char *sun3_dma_orig_addr = NULL;
134static unsigned long sun3_dma_orig_count = 0;
135static int sun3_dma_active = 0;
136static unsigned long last_residual = 0;
137
138/*
139 * NCR 5380 register access functions
140 */
141
142static inline unsigned char sun3scsi_read(int reg)
143{
144 return( sun3_scsi_regp[reg] );
145}
146
147static inline void sun3scsi_write(int reg, int value)
148{
149 sun3_scsi_regp[reg] = value;
150}
151
152/* dma controller register access functions */
153
154static inline unsigned short sun3_udc_read(unsigned char reg)
155{
156 unsigned short ret;
157
158 dregs->udc_addr = UDC_CSR;
159 udelay(SUN3_DMA_DELAY);
160 ret = dregs->udc_data;
161 udelay(SUN3_DMA_DELAY);
162
163 return ret;
164}
165
166static inline void sun3_udc_write(unsigned short val, unsigned char reg)
167{
168 dregs->udc_addr = reg;
169 udelay(SUN3_DMA_DELAY);
170 dregs->udc_data = val;
171 udelay(SUN3_DMA_DELAY);
172}
173
174/*
175 * XXX: status debug
176 */
177static struct Scsi_Host *default_instance;
178
179/*
d0be4a7d 180 * Function : int sun3scsi_detect(struct scsi_host_template * tpnt)
1da177e4
LT
181 *
182 * Purpose : initializes mac NCR5380 driver based on the
183 * command line / compile time port and irq definitions.
184 *
185 * Inputs : tpnt - template for this SCSI adapter.
186 *
187 * Returns : 1 if a host adapter was found, 0 if not.
188 *
189 */
190
d559c49e 191int __init sun3scsi_detect(struct scsi_host_template * tpnt)
1da177e4
LT
192{
193 unsigned long ioaddr;
194 static int called = 0;
195 struct Scsi_Host *instance;
196
197 /* check that this machine has an onboard 5380 */
198 switch(idprom->id_machtype) {
199 case SM_SUN3|SM_3_50:
200 case SM_SUN3|SM_3_60:
201 break;
202
203 default:
204 return 0;
205 }
206
207 if(called)
208 return 0;
209
210 tpnt->proc_name = "Sun3 5380 SCSI";
211
212 /* setup variables */
213 tpnt->can_queue =
214 (setup_can_queue > 0) ? setup_can_queue : CAN_QUEUE;
215 tpnt->cmd_per_lun =
216 (setup_cmd_per_lun > 0) ? setup_cmd_per_lun : CMD_PER_LUN;
217 tpnt->sg_tablesize =
218 (setup_sg_tablesize >= 0) ? setup_sg_tablesize : SG_TABLESIZE;
219
220 if (setup_hostid >= 0)
221 tpnt->this_id = setup_hostid;
222 else {
223 /* use 7 as default */
224 tpnt->this_id = 7;
225 }
226
227 ioaddr = (unsigned long)ioremap(IOBASE_SUN3_SCSI, PAGE_SIZE);
228 sun3_scsi_regp = (unsigned char *)ioaddr;
229
230 dregs = (struct sun3_dma_regs *)(((unsigned char *)ioaddr) + 8);
231
232 if((udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs)))
233 == NULL) {
234 printk("SUN3 Scsi couldn't allocate DVMA memory!\n");
235 return 0;
236 }
237#ifdef OLDDMA
238 if((dmabuf = dvma_malloc_align(SUN3_DVMA_BUFSIZE, 0x10000)) == NULL) {
239 printk("SUN3 Scsi couldn't allocate DVMA memory!\n");
240 return 0;
241 }
242#endif
243#ifdef SUPPORT_TAGS
244 if (setup_use_tagged_queuing < 0)
245 setup_use_tagged_queuing = USE_TAGGED_QUEUING;
246#endif
247
248 instance = scsi_register (tpnt, sizeof(struct NCR5380_hostdata));
249 if(instance == NULL)
250 return 0;
251
252 default_instance = instance;
253
254 instance->io_port = (unsigned long) ioaddr;
255 instance->irq = IRQ_SUN3_SCSI;
256
257 NCR5380_init(instance, 0);
258
259 instance->n_io_port = 32;
260
261 ((struct NCR5380_hostdata *)instance->hostdata)->ctrl = 0;
262
263 if (request_irq(instance->irq, scsi_sun3_intr,
1e641664 264 0, "Sun3SCSI-5380", instance)) {
1da177e4
LT
265#ifndef REAL_DMA
266 printk("scsi%d: IRQ%d not free, interrupts disabled\n",
267 instance->host_no, instance->irq);
268 instance->irq = SCSI_IRQ_NONE;
269#else
270 printk("scsi%d: IRQ%d not free, bailing out\n",
271 instance->host_no, instance->irq);
272 return 0;
273#endif
274 }
275
276 printk("scsi%d: Sun3 5380 at port %lX irq", instance->host_no, instance->io_port);
277 if (instance->irq == SCSI_IRQ_NONE)
278 printk ("s disabled");
279 else
280 printk (" %d", instance->irq);
281 printk(" options CAN_QUEUE=%d CMD_PER_LUN=%d release=%d",
282 instance->can_queue, instance->cmd_per_lun,
283 SUN3SCSI_PUBLIC_RELEASE);
284 printk("\nscsi%d:", instance->host_no);
285 NCR5380_print_options(instance);
286 printk("\n");
287
288 dregs->csr = 0;
289 udelay(SUN3_DMA_DELAY);
290 dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR;
291 udelay(SUN3_DMA_DELAY);
292 dregs->fifo_count = 0;
293
294 called = 1;
295
296#ifdef RESET_BOOT
297 sun3_scsi_reset_boot(instance);
298#endif
299
300 return 1;
301}
302
303int sun3scsi_release (struct Scsi_Host *shpnt)
304{
305 if (shpnt->irq != SCSI_IRQ_NONE)
1e641664 306 free_irq(shpnt->irq, shpnt);
1da177e4
LT
307
308 iounmap((void *)sun3_scsi_regp);
309
19b6c51c 310 NCR5380_exit(shpnt);
1da177e4
LT
311 return 0;
312}
313
314#ifdef RESET_BOOT
315/*
316 * Our 'bus reset on boot' function
317 */
318
319static void sun3_scsi_reset_boot(struct Scsi_Host *instance)
320{
321 unsigned long end;
322
323 NCR5380_local_declare();
324 NCR5380_setup(instance);
325
326 /*
327 * Do a SCSI reset to clean up the bus during initialization. No
328 * messing with the queues, interrupts, or locks necessary here.
329 */
330
331 printk( "Sun3 SCSI: resetting the SCSI bus..." );
332
333 /* switch off SCSI IRQ - catch an interrupt without IRQ bit set else */
334// sun3_disable_irq( IRQ_SUN3_SCSI );
335
336 /* get in phase */
337 NCR5380_write( TARGET_COMMAND_REG,
338 PHASE_SR_TO_TCR( NCR5380_read(STATUS_REG) ));
339
340 /* assert RST */
341 NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST );
342
343 /* The min. reset hold time is 25us, so 40us should be enough */
344 udelay( 50 );
345
346 /* reset RST and interrupt */
347 NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE );
348 NCR5380_read( RESET_PARITY_INTERRUPT_REG );
349
350 for( end = jiffies + AFTER_RESET_DELAY; time_before(jiffies, end); )
351 barrier();
352
353 /* switch on SCSI IRQ again */
354// sun3_enable_irq( IRQ_SUN3_SCSI );
355
356 printk( " done\n" );
357}
358#endif
359
360const char * sun3scsi_info (struct Scsi_Host *spnt) {
361 return "";
362}
363
364// safe bits for the CSR
365#define CSR_GOOD 0x060f
366
7d12e780 367static irqreturn_t scsi_sun3_intr(int irq, void *dummy)
1da177e4
LT
368{
369 unsigned short csr = dregs->csr;
370 int handled = 0;
371
372 if(csr & ~CSR_GOOD) {
373 if(csr & CSR_DMA_BUSERR) {
374 printk("scsi%d: bus error in dma\n", default_instance->host_no);
375 }
376
377 if(csr & CSR_DMA_CONFLICT) {
378 printk("scsi%d: dma conflict\n", default_instance->host_no);
379 }
380 handled = 1;
381 }
382
383 if(csr & (CSR_SDB_INT | CSR_DMA_INT)) {
7d12e780 384 NCR5380_intr(irq, dummy);
1da177e4
LT
385 handled = 1;
386 }
387
388 return IRQ_RETVAL(handled);
389}
390
391/*
392 * Debug stuff - to be called on NMI, or sysrq key. Use at your own risk;
393 * reentering NCR5380_print_status seems to have ugly side effects
394 */
395
396/* this doesn't seem to get used at all -- sam */
397#if 0
398void sun3_sun3_debug (void)
399{
400 unsigned long flags;
401 NCR5380_local_declare();
402
403 if (default_instance) {
404 local_irq_save(flags);
405 NCR5380_print_status(default_instance);
406 local_irq_restore(flags);
407 }
408}
409#endif
410
411
412/* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */
413static unsigned long sun3scsi_dma_setup(void *data, unsigned long count, int write_flag)
414{
415#ifdef OLDDMA
416 if(write_flag)
417 memcpy(dmabuf, data, count);
418 else {
419 sun3_dma_orig_addr = data;
420 sun3_dma_orig_count = count;
421 }
422#else
423 void *addr;
424
425 if(sun3_dma_orig_addr != NULL)
426 dvma_unmap(sun3_dma_orig_addr);
427
428// addr = sun3_dvma_page((unsigned long)data, (unsigned long)dmabuf);
429 addr = (void *)dvma_map((unsigned long) data, count);
430
431 sun3_dma_orig_addr = addr;
432 sun3_dma_orig_count = count;
433#endif
434 dregs->fifo_count = 0;
435 sun3_udc_write(UDC_RESET, UDC_CSR);
436
437 /* reset fifo */
438 dregs->csr &= ~CSR_FIFO;
439 dregs->csr |= CSR_FIFO;
440
441 /* set direction */
442 if(write_flag)
443 dregs->csr |= CSR_SEND;
444 else
445 dregs->csr &= ~CSR_SEND;
446
447 /* byte count for fifo */
448 dregs->fifo_count = count;
449
450 sun3_udc_write(UDC_RESET, UDC_CSR);
451
452 /* reset fifo */
453 dregs->csr &= ~CSR_FIFO;
454 dregs->csr |= CSR_FIFO;
455
456 if(dregs->fifo_count != count) {
457 printk("scsi%d: fifo_mismatch %04x not %04x\n",
458 default_instance->host_no, dregs->fifo_count,
459 (unsigned int) count);
d614f068 460 NCR5380_dprint(NDEBUG_DMA, default_instance);
1da177e4
LT
461 }
462
463 /* setup udc */
464#ifdef OLDDMA
465 udc_regs->addr_hi = ((dvma_vtob(dmabuf) & 0xff0000) >> 8);
466 udc_regs->addr_lo = (dvma_vtob(dmabuf) & 0xffff);
467#else
468 udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8);
469 udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff);
470#endif
471 udc_regs->count = count/2; /* count in words */
472 udc_regs->mode_hi = UDC_MODE_HIWORD;
473 if(write_flag) {
474 if(count & 1)
475 udc_regs->count++;
476 udc_regs->mode_lo = UDC_MODE_LSEND;
477 udc_regs->rsel = UDC_RSEL_SEND;
478 } else {
479 udc_regs->mode_lo = UDC_MODE_LRECV;
480 udc_regs->rsel = UDC_RSEL_RECV;
481 }
482
483 /* announce location of regs block */
484 sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8),
485 UDC_CHN_HI);
486
487 sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO);
488
489 /* set dma master on */
490 sun3_udc_write(0xd, UDC_MODE);
491
492 /* interrupt enable */
493 sun3_udc_write(UDC_INT_ENABLE, UDC_CSR);
494
495 return count;
496
497}
498
499static inline unsigned long sun3scsi_dma_count(struct Scsi_Host *instance)
500{
501 unsigned short resid;
502
503 dregs->udc_addr = 0x32;
504 udelay(SUN3_DMA_DELAY);
505 resid = dregs->udc_data;
506 udelay(SUN3_DMA_DELAY);
507 resid *= 2;
508
509 return (unsigned long) resid;
510}
511
512static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance)
513{
514 return last_residual;
515}
516
811c9366
H
517static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted,
518 struct scsi_cmnd *cmd,
519 int write_flag)
1da177e4 520{
33659ebb 521 if (cmd->request->cmd_type == REQ_TYPE_FS)
1da177e4
LT
522 return wanted;
523 else
524 return 0;
525}
526
527static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data)
528{
529
530 sun3_udc_write(UDC_CHN_START, UDC_CSR);
531
532 return 0;
533}
534
535/* clean up after our dma is done */
536static int sun3scsi_dma_finish(int write_flag)
537{
538 unsigned short count;
539 unsigned short fifo;
540 int ret = 0;
541
542 sun3_dma_active = 0;
543#if 1
544 // check to empty the fifo on a read
545 if(!write_flag) {
546 int tmo = 20000; /* .2 sec */
547
548 while(1) {
549 if(dregs->csr & CSR_FIFO_EMPTY)
550 break;
551
552 if(--tmo <= 0) {
553 printk("sun3scsi: fifo failed to empty!\n");
554 return 1;
555 }
556 udelay(10);
557 }
558 }
559
560#endif
561
562 count = sun3scsi_dma_count(default_instance);
563#ifdef OLDDMA
564
565 /* if we've finished a read, copy out the data we read */
566 if(sun3_dma_orig_addr) {
567 /* check for residual bytes after dma end */
568 if(count && (NCR5380_read(BUS_AND_STATUS_REG) &
569 (BASR_PHASE_MATCH | BASR_ACK))) {
570 printk("scsi%d: sun3_scsi_finish: read overrun baby... ", default_instance->host_no);
571 printk("basr now %02x\n", NCR5380_read(BUS_AND_STATUS_REG));
572 ret = count;
573 }
574
575 /* copy in what we dma'd no matter what */
576 memcpy(sun3_dma_orig_addr, dmabuf, sun3_dma_orig_count);
577 sun3_dma_orig_addr = NULL;
578
579 }
580#else
581
582 fifo = dregs->fifo_count;
583 last_residual = fifo;
584
585 /* empty bytes from the fifo which didn't make it */
586 if((!write_flag) && (count - fifo) == 2) {
587 unsigned short data;
588 unsigned char *vaddr;
589
590 data = dregs->fifo_data;
591 vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr);
592
593 vaddr += (sun3_dma_orig_count - fifo);
594
595 vaddr[-2] = (data & 0xff00) >> 8;
596 vaddr[-1] = (data & 0xff);
597 }
598
599 dvma_unmap(sun3_dma_orig_addr);
600 sun3_dma_orig_addr = NULL;
601#endif
602 sun3_udc_write(UDC_RESET, UDC_CSR);
603 dregs->fifo_count = 0;
604 dregs->csr &= ~CSR_SEND;
605
606 /* reset fifo */
607 dregs->csr &= ~CSR_FIFO;
608 dregs->csr |= CSR_FIFO;
609
610 sun3_dma_setup_done = NULL;
611
612 return ret;
613
614}
615
616#include "sun3_NCR5380.c"
617
d0be4a7d 618static struct scsi_host_template driver_template = {
9dcc26cf 619 .show_info = sun3scsi_show_info,
1da177e4
LT
620 .name = SUN3_SCSI_NAME,
621 .detect = sun3scsi_detect,
622 .release = sun3scsi_release,
623 .info = sun3scsi_info,
624 .queuecommand = sun3scsi_queue_command,
625 .eh_abort_handler = sun3scsi_abort,
626 .eh_bus_reset_handler = sun3scsi_bus_reset,
627 .can_queue = CAN_QUEUE,
628 .this_id = 7,
629 .sg_tablesize = SG_TABLESIZE,
630 .cmd_per_lun = CMD_PER_LUN,
631 .use_clustering = DISABLE_CLUSTERING
632};
633
634
635#include "scsi_module.c"
636
637MODULE_LICENSE("GPL");
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