[deliverable/linux.git] / drivers / scsi / sun3_scsi.c

/*
 * Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl)
 *
 * Sun3 DMA routines added by Sam Creasey (sammy@sammy.net)
 *
 * VME support added by Sam Creasey
 *
 * TODO: modify this driver to support multiple Sun3 SCSI VME boards
 *
 * Adapted from mac_scsinew.c:
 */
/*
 * Generic Macintosh NCR5380 driver
 *
 * Copyright 1998, Michael Schmitz <mschmitz@lbl.gov>
 *
 * derived in part from:
 */
/*
 * Generic Generic NCR5380 driver
 *
 * Copyright 1995, Russell King
 */

#include <linux/types.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/platform_device.h>

#include <asm/io.h>
#include <asm/dvma.h>

#include <scsi/scsi_host.h>
#include "sun3_scsi.h"

/* Definitions for the core NCR5380 driver. */

/* #define SUPPORT_TAGS */
/* minimum number of bytes to do dma on */
#define DMA_MIN_SIZE                    129

/* #define MAX_TAGS                     32 */

#define NCR5380_implementation_fields   /* none */

#define NCR5380_read(reg)               sun3scsi_read(reg)
#define NCR5380_write(reg, value)       sun3scsi_write(reg, value)

#define NCR5380_queue_command           sun3scsi_queue_command
#define NCR5380_bus_reset               sun3scsi_bus_reset
#define NCR5380_abort                   sun3scsi_abort
#define NCR5380_info                    sun3scsi_info

#define NCR5380_dma_read_setup(instance, data, count) \
        sun3scsi_dma_setup(instance, data, count, 0)
#define NCR5380_dma_write_setup(instance, data, count) \
        sun3scsi_dma_setup(instance, data, count, 1)
#define NCR5380_dma_residual(instance) \
        sun3scsi_dma_residual(instance)
#define NCR5380_dma_xfer_len(instance, cmd, phase) \
        sun3scsi_dma_xfer_len(cmd->SCp.this_residual, cmd, !((phase) & SR_IO))

#define NCR5380_acquire_dma_irq(instance)    (1)
#define NCR5380_release_dma_irq(instance)

#include "NCR5380.h"


extern int sun3_map_test(unsigned long, char *);

static int setup_can_queue = -1;
module_param(setup_can_queue, int, 0);
static int setup_cmd_per_lun = -1;
module_param(setup_cmd_per_lun, int, 0);
static int setup_sg_tablesize = -1;
module_param(setup_sg_tablesize, int, 0);
#ifdef SUPPORT_TAGS
static int setup_use_tagged_queuing = -1;
module_param(setup_use_tagged_queuing, int, 0);
#endif
static int setup_hostid = -1;
module_param(setup_hostid, int, 0);

/* ms to wait after hitting dma regs */
#define SUN3_DMA_DELAY 10

/* dvma buffer to allocate -- 32k should hopefully be more than sufficient */
#define SUN3_DVMA_BUFSIZE 0xe000

static struct scsi_cmnd *sun3_dma_setup_done;
static unsigned char *sun3_scsi_regp;
static volatile struct sun3_dma_regs *dregs;
static struct sun3_udc_regs *udc_regs;
static unsigned char *sun3_dma_orig_addr;
static unsigned long sun3_dma_orig_count;
static int sun3_dma_active;
static unsigned long last_residual;

/*
 * NCR 5380 register access functions
 */

static inline unsigned char sun3scsi_read(int reg)
{
	return in_8(sun3_scsi_regp + reg);
}

static inline void sun3scsi_write(int reg, int value)
{
	out_8(sun3_scsi_regp + reg, value);
}

#ifndef SUN3_SCSI_VME
/* dma controller register access functions */

static inline unsigned short sun3_udc_read(unsigned char reg)
{
	unsigned short ret;

	dregs->udc_addr = UDC_CSR;
	udelay(SUN3_DMA_DELAY);
	ret = dregs->udc_data;
	udelay(SUN3_DMA_DELAY);
	
	return ret;
}

static inline void sun3_udc_write(unsigned short val, unsigned char reg)
{
	dregs->udc_addr = reg;
	udelay(SUN3_DMA_DELAY);
	dregs->udc_data = val;
	udelay(SUN3_DMA_DELAY);
}
#endif

// safe bits for the CSR
#define CSR_GOOD 0x060f

static irqreturn_t scsi_sun3_intr(int irq, void *dev)
{
	struct Scsi_Host *instance = dev;
	unsigned short csr = dregs->csr;
	int handled = 0;

#ifdef SUN3_SCSI_VME
	dregs->csr &= ~CSR_DMA_ENABLE;
#endif

	if(csr & ~CSR_GOOD) {
		if (csr & CSR_DMA_BUSERR)
			shost_printk(KERN_ERR, instance, "bus error in DMA\n");
		if (csr & CSR_DMA_CONFLICT)
			shost_printk(KERN_ERR, instance, "DMA conflict\n");
		handled = 1;
	}

	if(csr & (CSR_SDB_INT | CSR_DMA_INT)) {
		NCR5380_intr(irq, dev);
		handled = 1;
	}

	return IRQ_RETVAL(handled);
}

/* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */
static unsigned long sun3scsi_dma_setup(struct Scsi_Host *instance,
                                void *data, unsigned long count, int write_flag)
{
	void *addr;

	if(sun3_dma_orig_addr != NULL)
		dvma_unmap(sun3_dma_orig_addr);

#ifdef SUN3_SCSI_VME
	addr = (void *)dvma_map_vme((unsigned long) data, count);
#else
	addr = (void *)dvma_map((unsigned long) data, count);
#endif
		
	sun3_dma_orig_addr = addr;
	sun3_dma_orig_count = count;

#ifndef SUN3_SCSI_VME
	dregs->fifo_count = 0;
	sun3_udc_write(UDC_RESET, UDC_CSR);
	
	/* reset fifo */
	dregs->csr &= ~CSR_FIFO;
	dregs->csr |= CSR_FIFO;
#endif
	
	/* set direction */
	if(write_flag)
		dregs->csr |= CSR_SEND;
	else
		dregs->csr &= ~CSR_SEND;
	
#ifdef SUN3_SCSI_VME
	dregs->csr |= CSR_PACK_ENABLE;

	dregs->dma_addr_hi = ((unsigned long)addr >> 16);
	dregs->dma_addr_lo = ((unsigned long)addr & 0xffff);

	dregs->dma_count_hi = 0;
	dregs->dma_count_lo = 0;
	dregs->fifo_count_hi = 0;
	dregs->fifo_count = 0;
#else
	/* byte count for fifo */
	dregs->fifo_count = count;

	sun3_udc_write(UDC_RESET, UDC_CSR);
	
	/* reset fifo */
	dregs->csr &= ~CSR_FIFO;
	dregs->csr |= CSR_FIFO;
	
	if(dregs->fifo_count != count) { 
		shost_printk(KERN_ERR, instance, "FIFO mismatch %04x not %04x\n",
		             dregs->fifo_count, (unsigned int) count);
		NCR5380_dprint(NDEBUG_DMA, instance);
	}

	/* setup udc */
	udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8);
	udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff);
	udc_regs->count = count/2; /* count in words */
	udc_regs->mode_hi = UDC_MODE_HIWORD;
	if(write_flag) {
		if(count & 1)
			udc_regs->count++;
		udc_regs->mode_lo = UDC_MODE_LSEND;
		udc_regs->rsel = UDC_RSEL_SEND;
	} else {
		udc_regs->mode_lo = UDC_MODE_LRECV;
		udc_regs->rsel = UDC_RSEL_RECV;
	}
	
	/* announce location of regs block */
	sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8),
		       UDC_CHN_HI); 

	sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO);

	/* set dma master on */
	sun3_udc_write(0xd, UDC_MODE);

	/* interrupt enable */
	sun3_udc_write(UDC_INT_ENABLE, UDC_CSR);
#endif
	
       	return count;

}

static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance)
{
	return last_residual;
}

static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted,
						  struct scsi_cmnd *cmd,
						  int write_flag)
{
	if (cmd->request->cmd_type == REQ_TYPE_FS)
 		return wanted;
	else
		return 0;
}

static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data)
{
#ifdef SUN3_SCSI_VME
	unsigned short csr;

	csr = dregs->csr;

	dregs->dma_count_hi = (sun3_dma_orig_count >> 16);
	dregs->dma_count_lo = (sun3_dma_orig_count & 0xffff);

	dregs->fifo_count_hi = (sun3_dma_orig_count >> 16);
	dregs->fifo_count = (sun3_dma_orig_count & 0xffff);

/*	if(!(csr & CSR_DMA_ENABLE))
 *		dregs->csr |= CSR_DMA_ENABLE;
 */
#else
    sun3_udc_write(UDC_CHN_START, UDC_CSR);
#endif
    
    return 0;
}

/* clean up after our dma is done */
static int sun3scsi_dma_finish(int write_flag)
{
	unsigned short __maybe_unused count;
	unsigned short fifo;
	int ret = 0;
	
	sun3_dma_active = 0;

#ifdef SUN3_SCSI_VME
	dregs->csr &= ~CSR_DMA_ENABLE;

	fifo = dregs->fifo_count;
	if (write_flag) {
		if ((fifo > 0) && (fifo < sun3_dma_orig_count))
			fifo++;
	}

	last_residual = fifo;
	/* empty bytes from the fifo which didn't make it */
	if ((!write_flag) && (dregs->csr & CSR_LEFT)) {
		unsigned char *vaddr;

		vaddr = (unsigned char *)dvma_vmetov(sun3_dma_orig_addr);

		vaddr += (sun3_dma_orig_count - fifo);
		vaddr--;

		switch (dregs->csr & CSR_LEFT) {
		case CSR_LEFT_3:
			*vaddr = (dregs->bpack_lo & 0xff00) >> 8;
			vaddr--;

		case CSR_LEFT_2:
			*vaddr = (dregs->bpack_hi & 0x00ff);
			vaddr--;

		case CSR_LEFT_1:
			*vaddr = (dregs->bpack_hi & 0xff00) >> 8;
			break;
		}
	}
#else
	// check to empty the fifo on a read
	if(!write_flag) {
		int tmo = 20000; /* .2 sec */
		
		while(1) {
			if(dregs->csr & CSR_FIFO_EMPTY)
				break;

			if(--tmo <= 0) {
				printk("sun3scsi: fifo failed to empty!\n");
				return 1;
			}
			udelay(10);
		}
	}

	dregs->udc_addr = 0x32;
	udelay(SUN3_DMA_DELAY);
	count = 2 * dregs->udc_data;
	udelay(SUN3_DMA_DELAY);

	fifo = dregs->fifo_count;
	last_residual = fifo;

	/* empty bytes from the fifo which didn't make it */
	if((!write_flag) && (count - fifo) == 2) {
		unsigned short data;
		unsigned char *vaddr;

		data = dregs->fifo_data;
		vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr);
		
		vaddr += (sun3_dma_orig_count - fifo);

		vaddr[-2] = (data & 0xff00) >> 8;
		vaddr[-1] = (data & 0xff);
	}
#endif

	dvma_unmap(sun3_dma_orig_addr);
	sun3_dma_orig_addr = NULL;

#ifdef SUN3_SCSI_VME
	dregs->dma_addr_hi = 0;
	dregs->dma_addr_lo = 0;
	dregs->dma_count_hi = 0;
	dregs->dma_count_lo = 0;

	dregs->fifo_count = 0;
	dregs->fifo_count_hi = 0;

	dregs->csr &= ~CSR_SEND;
/*	dregs->csr |= CSR_DMA_ENABLE; */
#else
	sun3_udc_write(UDC_RESET, UDC_CSR);
	dregs->fifo_count = 0;
	dregs->csr &= ~CSR_SEND;

	/* reset fifo */
	dregs->csr &= ~CSR_FIFO;
	dregs->csr |= CSR_FIFO;
#endif
	
	sun3_dma_setup_done = NULL;

	return ret;

}
	
#include "atari_NCR5380.c"

#ifdef SUN3_SCSI_VME
#define SUN3_SCSI_NAME          "Sun3 NCR5380 VME SCSI"
#define DRV_MODULE_NAME         "sun3_scsi_vme"
#else
#define SUN3_SCSI_NAME          "Sun3 NCR5380 SCSI"
#define DRV_MODULE_NAME         "sun3_scsi"
#endif

#define PFX                     DRV_MODULE_NAME ": "

static struct scsi_host_template sun3_scsi_template = {
	.module			= THIS_MODULE,
	.proc_name		= DRV_MODULE_NAME,
	.name			= SUN3_SCSI_NAME,
	.info			= sun3scsi_info,
	.queuecommand		= sun3scsi_queue_command,
	.eh_abort_handler	= sun3scsi_abort,
	.eh_bus_reset_handler	= sun3scsi_bus_reset,
	.can_queue		= 16,
	.this_id		= 7,
	.sg_tablesize		= SG_NONE,
	.cmd_per_lun		= 2,
	.use_clustering		= DISABLE_CLUSTERING,
	.cmd_size		= NCR5380_CMD_SIZE,
};

static int __init sun3_scsi_probe(struct platform_device *pdev)
{
	struct Scsi_Host *instance;
	int error;
	struct resource *irq, *mem;
	unsigned char *ioaddr;
	int host_flags = 0;
#ifdef SUN3_SCSI_VME
	int i;
#endif

	if (setup_can_queue > 0)
		sun3_scsi_template.can_queue = setup_can_queue;
	if (setup_cmd_per_lun > 0)
		sun3_scsi_template.cmd_per_lun = setup_cmd_per_lun;
	if (setup_sg_tablesize >= 0)
		sun3_scsi_template.sg_tablesize = setup_sg_tablesize;
	if (setup_hostid >= 0)
		sun3_scsi_template.this_id = setup_hostid & 7;

#ifdef SUN3_SCSI_VME
	ioaddr = NULL;
	for (i = 0; i < 2; i++) {
		unsigned char x;

		irq = platform_get_resource(pdev, IORESOURCE_IRQ, i);
		mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
		if (!irq || !mem)
			break;

		ioaddr = sun3_ioremap(mem->start, resource_size(mem),
		                      SUN3_PAGE_TYPE_VME16);
		dregs = (struct sun3_dma_regs *)(ioaddr + 8);

		if (sun3_map_test((unsigned long)dregs, &x)) {
			unsigned short oldcsr;

			oldcsr = dregs->csr;
			dregs->csr = 0;
			udelay(SUN3_DMA_DELAY);
			if (dregs->csr == 0x1400)
				break;

			dregs->csr = oldcsr;
		}

		iounmap(ioaddr);
		ioaddr = NULL;
	}
	if (!ioaddr)
		return -ENODEV;
#else
	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!irq || !mem)
		return -ENODEV;

	ioaddr = ioremap(mem->start, resource_size(mem));
	dregs = (struct sun3_dma_regs *)(ioaddr + 8);

	udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs));
	if (!udc_regs) {
		pr_err(PFX "couldn't allocate DVMA memory!\n");
		iounmap(ioaddr);
		return -ENOMEM;
	}
#endif

	sun3_scsi_regp = ioaddr;

	instance = scsi_host_alloc(&sun3_scsi_template,
	                           sizeof(struct NCR5380_hostdata));
	if (!instance) {
		error = -ENOMEM;
		goto fail_alloc;
	}

	instance->io_port = (unsigned long)ioaddr;
	instance->irq = irq->start;

#ifdef SUPPORT_TAGS
	host_flags |= setup_use_tagged_queuing > 0 ? FLAG_TAGGED_QUEUING : 0;
#endif

	error = NCR5380_init(instance, host_flags);
	if (error)
		goto fail_init;

	error = request_irq(instance->irq, scsi_sun3_intr, 0,
	                    "NCR5380", instance);
	if (error) {
		pr_err(PFX "scsi%d: IRQ %d not free, bailing out\n",
		       instance->host_no, instance->irq);
		goto fail_irq;
	}

	dregs->csr = 0;
	udelay(SUN3_DMA_DELAY);
	dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR;
	udelay(SUN3_DMA_DELAY);
	dregs->fifo_count = 0;
#ifdef SUN3_SCSI_VME
	dregs->fifo_count_hi = 0;
	dregs->dma_addr_hi = 0;
	dregs->dma_addr_lo = 0;
	dregs->dma_count_hi = 0;
	dregs->dma_count_lo = 0;

	dregs->ivect = VME_DATA24 | (instance->irq & 0xff);
#endif

	NCR5380_maybe_reset_bus(instance);

	error = scsi_add_host(instance, NULL);
	if (error)
		goto fail_host;

	platform_set_drvdata(pdev, instance);

	scsi_scan_host(instance);
	return 0;

fail_host:
	free_irq(instance->irq, instance);
fail_irq:
	NCR5380_exit(instance);
fail_init:
	scsi_host_put(instance);
fail_alloc:
	if (udc_regs)
		dvma_free(udc_regs);
	iounmap(sun3_scsi_regp);
	return error;
}

static int __exit sun3_scsi_remove(struct platform_device *pdev)
{
	struct Scsi_Host *instance = platform_get_drvdata(pdev);

	scsi_remove_host(instance);
	free_irq(instance->irq, instance);
	NCR5380_exit(instance);
	scsi_host_put(instance);
	if (udc_regs)
		dvma_free(udc_regs);
	iounmap(sun3_scsi_regp);
	return 0;
}

static struct platform_driver sun3_scsi_driver = {
	.remove = __exit_p(sun3_scsi_remove),
	.driver = {
		.name	= DRV_MODULE_NAME,
	},
};

module_platform_driver_probe(sun3_scsi_driver, sun3_scsi_probe);

MODULE_ALIAS("platform:" DRV_MODULE_NAME);
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl)
	3	*
	4	* Sun3 DMA routines added by Sam Creasey (sammy@sammy.net)
	5	*
757f5bad FT	6	* VME support added by Sam Creasey
	7	*
	8	* TODO: modify this driver to support multiple Sun3 SCSI VME boards
	9	*
1da177e4 LT	10	* Adapted from mac_scsinew.c:
	11	*/
	12	/*
	13	* Generic Macintosh NCR5380 driver
	14	*
	15	* Copyright 1998, Michael Schmitz <mschmitz@lbl.gov>
	16	*
	17	* derived in part from:
	18	*/
	19	/*
	20	* Generic Generic NCR5380 driver
	21	*
	22	* Copyright 1995, Russell King
1da177e4 LT	23	*/
1da177e4 LT	24
1da177e4	25	#include <linux/types.h>
1da177e4	26	#include <linux/delay.h>
1da177e4	27	#include <linux/module.h>
1da177e4 LT	28	#include <linux/ioport.h>
	29	#include <linux/init.h>
	30	#include <linux/blkdev.h>
0d31f875	31	#include <linux/platform_device.h>
1da177e4 LT	32
1da177e4 LT	33	#include <asm/io.h>
1da177e4	34	#include <asm/dvma.h>
1da177e4	35
1da177e4 LT	36	#include <scsi/scsi_host.h>
1da177e4 LT	37	#include "sun3_scsi.h"
1da177e4	38
2231ef87	39	/* Definitions for the core NCR5380 driver. */
1da177e4	40
1da177e4	41	/* #define SUPPORT_TAGS */
8dad0c51 FT	42	/* minimum number of bytes to do dma on */
8dad0c51 FT	43	#define DMA_MIN_SIZE 129
1da177e4	44
2231ef87 FT	45	/* #define MAX_TAGS 32 */
	46
	47	#define NCR5380_implementation_fields /* none */
	48
	49	#define NCR5380_read(reg) sun3scsi_read(reg)
	50	#define NCR5380_write(reg, value) sun3scsi_write(reg, value)
	51
	52	#define NCR5380_queue_command sun3scsi_queue_command
	53	#define NCR5380_bus_reset sun3scsi_bus_reset
	54	#define NCR5380_abort sun3scsi_abort
2231ef87 FT	55	#define NCR5380_info sun3scsi_info
	56
	57	#define NCR5380_dma_read_setup(instance, data, count) \
cd46140a	58	sun3scsi_dma_setup(instance, data, count, 0)
2231ef87	59	#define NCR5380_dma_write_setup(instance, data, count) \
cd46140a	60	sun3scsi_dma_setup(instance, data, count, 1)
2231ef87 FT	61	#define NCR5380_dma_residual(instance) \
	62	sun3scsi_dma_residual(instance)
	63	#define NCR5380_dma_xfer_len(instance, cmd, phase) \
	64	sun3scsi_dma_xfer_len(cmd->SCp.this_residual, cmd, !((phase) & SR_IO))
	65
8dad0c51 FT	66	#define NCR5380_acquire_dma_irq(instance) (1)
	67	#define NCR5380_release_dma_irq(instance)
	68
2231ef87 FT	69	#include "NCR5380.h"
	70
	71
	72	extern int sun3_map_test(unsigned long, char *);
	73
1da177e4 LT	74	static int setup_can_queue = -1;
	75	module_param(setup_can_queue, int, 0);
	76	static int setup_cmd_per_lun = -1;
	77	module_param(setup_cmd_per_lun, int, 0);
	78	static int setup_sg_tablesize = -1;
	79	module_param(setup_sg_tablesize, int, 0);
	80	#ifdef SUPPORT_TAGS
	81	static int setup_use_tagged_queuing = -1;
	82	module_param(setup_use_tagged_queuing, int, 0);
	83	#endif
	84	static int setup_hostid = -1;
	85	module_param(setup_hostid, int, 0);
	86
1da177e4 LT	87	/* ms to wait after hitting dma regs */
	88	#define SUN3_DMA_DELAY 10
	89
	90	/* dvma buffer to allocate -- 32k should hopefully be more than sufficient */
	91	#define SUN3_DVMA_BUFSIZE 0xe000
	92
2231ef87	93	static struct scsi_cmnd *sun3_dma_setup_done;
0d31f875	94	static unsigned char *sun3_scsi_regp;
1da177e4	95	static volatile struct sun3_dma_regs *dregs;
0d31f875	96	static struct sun3_udc_regs *udc_regs;
d5f7e65d FT	97	static unsigned char *sun3_dma_orig_addr;
	98	static unsigned long sun3_dma_orig_count;
	99	static int sun3_dma_active;
	100	static unsigned long last_residual;
1da177e4 LT	101
	102	/*
	103	* NCR 5380 register access functions
	104	*/
	105
	106	static inline unsigned char sun3scsi_read(int reg)
	107	{
0d31f875	108	return in_8(sun3_scsi_regp + reg);
1da177e4 LT	109	}
	110
	111	static inline void sun3scsi_write(int reg, int value)
	112	{
0d31f875	113	out_8(sun3_scsi_regp + reg, value);
1da177e4 LT	114	}
1da177e4 LT	115
757f5bad	116	#ifndef SUN3_SCSI_VME
1da177e4 LT	117	/* dma controller register access functions */
	118
	119	static inline unsigned short sun3_udc_read(unsigned char reg)
	120	{
	121	unsigned short ret;
	122
	123	dregs->udc_addr = UDC_CSR;
	124	udelay(SUN3_DMA_DELAY);
	125	ret = dregs->udc_data;
	126	udelay(SUN3_DMA_DELAY);
	127
	128	return ret;
	129	}
	130
	131	static inline void sun3_udc_write(unsigned short val, unsigned char reg)
	132	{
	133	dregs->udc_addr = reg;
	134	udelay(SUN3_DMA_DELAY);
	135	dregs->udc_data = val;
	136	udelay(SUN3_DMA_DELAY);
	137	}
757f5bad	138	#endif
1da177e4	139
1da177e4 LT	140	// safe bits for the CSR
	141	#define CSR_GOOD 0x060f
	142
cd46140a	143	static irqreturn_t scsi_sun3_intr(int irq, void *dev)
1da177e4	144	{
cd46140a	145	struct Scsi_Host *instance = dev;
1da177e4 LT	146	unsigned short csr = dregs->csr;
	147	int handled = 0;
	148
757f5bad FT	149	#ifdef SUN3_SCSI_VME
	150	dregs->csr &= ~CSR_DMA_ENABLE;
	151	#endif
	152
1da177e4	153	if(csr & ~CSR_GOOD) {
cd46140a FT	154	if (csr & CSR_DMA_BUSERR)
	155	shost_printk(KERN_ERR, instance, "bus error in DMA\n");
	156	if (csr & CSR_DMA_CONFLICT)
	157	shost_printk(KERN_ERR, instance, "DMA conflict\n");
1da177e4 LT	158	handled = 1;
	159	}
	160
	161	if(csr & (CSR_SDB_INT \| CSR_DMA_INT)) {
cd46140a	162	NCR5380_intr(irq, dev);
1da177e4 LT	163	handled = 1;
	164	}
	165
	166	return IRQ_RETVAL(handled);
	167	}
	168
1da177e4	169	/* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */
cd46140a FT	170	static unsigned long sun3scsi_dma_setup(struct Scsi_Host *instance,
cd46140a FT	171	void *data, unsigned long count, int write_flag)
1da177e4	172	{
1da177e4 LT	173	void *addr;
	174
	175	if(sun3_dma_orig_addr != NULL)
	176	dvma_unmap(sun3_dma_orig_addr);
	177
757f5bad FT	178	#ifdef SUN3_SCSI_VME
	179	addr = (void *)dvma_map_vme((unsigned long) data, count);
	180	#else
1da177e4	181	addr = (void *)dvma_map((unsigned long) data, count);
757f5bad	182	#endif
1da177e4 LT	183
	184	sun3_dma_orig_addr = addr;
	185	sun3_dma_orig_count = count;
757f5bad FT	186
757f5bad FT	187	#ifndef SUN3_SCSI_VME
1da177e4 LT	188	dregs->fifo_count = 0;
	189	sun3_udc_write(UDC_RESET, UDC_CSR);
	190
	191	/* reset fifo */
	192	dregs->csr &= ~CSR_FIFO;
	193	dregs->csr \|= CSR_FIFO;
757f5bad	194	#endif
1da177e4 LT	195
	196	/* set direction */
	197	if(write_flag)
	198	dregs->csr \|= CSR_SEND;
	199	else
	200	dregs->csr &= ~CSR_SEND;
	201
757f5bad FT	202	#ifdef SUN3_SCSI_VME
	203	dregs->csr \|= CSR_PACK_ENABLE;
	204
	205	dregs->dma_addr_hi = ((unsigned long)addr >> 16);
	206	dregs->dma_addr_lo = ((unsigned long)addr & 0xffff);
	207
	208	dregs->dma_count_hi = 0;
	209	dregs->dma_count_lo = 0;
	210	dregs->fifo_count_hi = 0;
	211	dregs->fifo_count = 0;
	212	#else
1da177e4 LT	213	/* byte count for fifo */
	214	dregs->fifo_count = count;
	215
	216	sun3_udc_write(UDC_RESET, UDC_CSR);
	217
	218	/* reset fifo */
	219	dregs->csr &= ~CSR_FIFO;
	220	dregs->csr \|= CSR_FIFO;
	221
	222	if(dregs->fifo_count != count) {
cd46140a FT	223	shost_printk(KERN_ERR, instance, "FIFO mismatch %04x not %04x\n",
	224	dregs->fifo_count, (unsigned int) count);
	225	NCR5380_dprint(NDEBUG_DMA, instance);
1da177e4 LT	226	}
	227
	228	/* setup udc */
1da177e4 LT	229	udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8);
1da177e4 LT	230	udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff);
1da177e4 LT	231	udc_regs->count = count/2; /* count in words */
	232	udc_regs->mode_hi = UDC_MODE_HIWORD;
	233	if(write_flag) {
	234	if(count & 1)
	235	udc_regs->count++;
	236	udc_regs->mode_lo = UDC_MODE_LSEND;
	237	udc_regs->rsel = UDC_RSEL_SEND;
	238	} else {
	239	udc_regs->mode_lo = UDC_MODE_LRECV;
	240	udc_regs->rsel = UDC_RSEL_RECV;
	241	}
	242
	243	/* announce location of regs block */
	244	sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8),
	245	UDC_CHN_HI);
	246
	247	sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO);
	248
	249	/* set dma master on */
	250	sun3_udc_write(0xd, UDC_MODE);
	251
	252	/* interrupt enable */
	253	sun3_udc_write(UDC_INT_ENABLE, UDC_CSR);
757f5bad	254	#endif
1da177e4 LT	255
	256	return count;
	257
	258	}
	259
1da177e4 LT	260	static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance)
	261	{
	262	return last_residual;
	263	}
	264
811c9366 H	265	static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted,
	266	struct scsi_cmnd *cmd,
	267	int write_flag)
1da177e4	268	{
33659ebb	269	if (cmd->request->cmd_type == REQ_TYPE_FS)
1da177e4 LT	270	return wanted;
	271	else
	272	return 0;
	273	}
	274
	275	static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data)
	276	{
757f5bad FT	277	#ifdef SUN3_SCSI_VME
	278	unsigned short csr;
	279
	280	csr = dregs->csr;
	281
	282	dregs->dma_count_hi = (sun3_dma_orig_count >> 16);
	283	dregs->dma_count_lo = (sun3_dma_orig_count & 0xffff);
1da177e4	284
757f5bad FT	285	dregs->fifo_count_hi = (sun3_dma_orig_count >> 16);
	286	dregs->fifo_count = (sun3_dma_orig_count & 0xffff);
	287
	288	/* if(!(csr & CSR_DMA_ENABLE))
	289	* dregs->csr \|= CSR_DMA_ENABLE;
	290	*/
	291	#else
1da177e4	292	sun3_udc_write(UDC_CHN_START, UDC_CSR);
757f5bad	293	#endif
1da177e4 LT	294
	295	return 0;
	296	}
	297
	298	/* clean up after our dma is done */
	299	static int sun3scsi_dma_finish(int write_flag)
	300	{
757f5bad	301	unsigned short __maybe_unused count;
1da177e4 LT	302	unsigned short fifo;
	303	int ret = 0;
	304
	305	sun3_dma_active = 0;
757f5bad FT	306
	307	#ifdef SUN3_SCSI_VME
	308	dregs->csr &= ~CSR_DMA_ENABLE;
	309
	310	fifo = dregs->fifo_count;
	311	if (write_flag) {
	312	if ((fifo > 0) && (fifo < sun3_dma_orig_count))
	313	fifo++;
	314	}
	315
	316	last_residual = fifo;
	317	/* empty bytes from the fifo which didn't make it */
	318	if ((!write_flag) && (dregs->csr & CSR_LEFT)) {
	319	unsigned char *vaddr;
	320
	321	vaddr = (unsigned char *)dvma_vmetov(sun3_dma_orig_addr);
	322
	323	vaddr += (sun3_dma_orig_count - fifo);
	324	vaddr--;
	325
	326	switch (dregs->csr & CSR_LEFT) {
	327	case CSR_LEFT_3:
	328	*vaddr = (dregs->bpack_lo & 0xff00) >> 8;
	329	vaddr--;
	330
	331	case CSR_LEFT_2:
	332	*vaddr = (dregs->bpack_hi & 0x00ff);
	333	vaddr--;
	334
	335	case CSR_LEFT_1:
	336	*vaddr = (dregs->bpack_hi & 0xff00) >> 8;
	337	break;
	338	}
	339	}
	340	#else
1da177e4 LT	341	// check to empty the fifo on a read
	342	if(!write_flag) {
	343	int tmo = 20000; /* .2 sec */
	344
	345	while(1) {
	346	if(dregs->csr & CSR_FIFO_EMPTY)
	347	break;
	348
	349	if(--tmo <= 0) {
	350	printk("sun3scsi: fifo failed to empty!\n");
	351	return 1;
	352	}
	353	udelay(10);
	354	}
	355	}
1da177e4	356
cd46140a FT	357	dregs->udc_addr = 0x32;
	358	udelay(SUN3_DMA_DELAY);
	359	count = 2 * dregs->udc_data;
	360	udelay(SUN3_DMA_DELAY);
1da177e4 LT	361
	362	fifo = dregs->fifo_count;
	363	last_residual = fifo;
	364
	365	/* empty bytes from the fifo which didn't make it */
	366	if((!write_flag) && (count - fifo) == 2) {
	367	unsigned short data;
	368	unsigned char *vaddr;
	369
	370	data = dregs->fifo_data;
	371	vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr);
	372
	373	vaddr += (sun3_dma_orig_count - fifo);
	374
	375	vaddr[-2] = (data & 0xff00) >> 8;
	376	vaddr[-1] = (data & 0xff);
	377	}
757f5bad	378	#endif
1da177e4 LT	379
	380	dvma_unmap(sun3_dma_orig_addr);
	381	sun3_dma_orig_addr = NULL;
757f5bad FT	382
	383	#ifdef SUN3_SCSI_VME
	384	dregs->dma_addr_hi = 0;
	385	dregs->dma_addr_lo = 0;
	386	dregs->dma_count_hi = 0;
	387	dregs->dma_count_lo = 0;
	388
	389	dregs->fifo_count = 0;
	390	dregs->fifo_count_hi = 0;
	391
	392	dregs->csr &= ~CSR_SEND;
	393	/* dregs->csr \|= CSR_DMA_ENABLE; */
	394	#else
1da177e4 LT	395	sun3_udc_write(UDC_RESET, UDC_CSR);
	396	dregs->fifo_count = 0;
	397	dregs->csr &= ~CSR_SEND;
	398
	399	/* reset fifo */
	400	dregs->csr &= ~CSR_FIFO;
	401	dregs->csr \|= CSR_FIFO;
757f5bad	402	#endif
1da177e4 LT	403
	404	sun3_dma_setup_done = NULL;
	405
	406	return ret;
	407
	408	}
	409
8dad0c51	410	#include "atari_NCR5380.c"
1da177e4	411
0d31f875 FT	412	#ifdef SUN3_SCSI_VME
	413	#define SUN3_SCSI_NAME "Sun3 NCR5380 VME SCSI"
	414	#define DRV_MODULE_NAME "sun3_scsi_vme"
	415	#else
	416	#define SUN3_SCSI_NAME "Sun3 NCR5380 SCSI"
	417	#define DRV_MODULE_NAME "sun3_scsi"
	418	#endif
	419
	420	#define PFX DRV_MODULE_NAME ": "
	421
	422	static struct scsi_host_template sun3_scsi_template = {
	423	.module = THIS_MODULE,
	424	.proc_name = DRV_MODULE_NAME,
1da177e4	425	.name = SUN3_SCSI_NAME,
1da177e4 LT	426	.info = sun3scsi_info,
1da177e4 LT	427	.queuecommand = sun3scsi_queue_command,
aa2e2cb1 FT	428	.eh_abort_handler = sun3scsi_abort,
aa2e2cb1 FT	429	.eh_bus_reset_handler = sun3scsi_bus_reset,
d572f65f	430	.can_queue = 16,
1da177e4	431	.this_id = 7,
d572f65f FT	432	.sg_tablesize = SG_NONE,
d572f65f FT	433	.cmd_per_lun = 2,
aa2e2cb1	434	.use_clustering = DISABLE_CLUSTERING,
32b26a10	435	.cmd_size = NCR5380_CMD_SIZE,
1da177e4 LT	436	};
1da177e4 LT	437
0d31f875 FT	438	static int __init sun3_scsi_probe(struct platform_device *pdev)
	439	{
	440	struct Scsi_Host *instance;
	441	int error;
	442	struct resource irq, mem;
	443	unsigned char *ioaddr;
ca513fc9	444	int host_flags = 0;
0d31f875 FT	445	#ifdef SUN3_SCSI_VME
	446	int i;
	447	#endif
	448
	449	if (setup_can_queue > 0)
	450	sun3_scsi_template.can_queue = setup_can_queue;
	451	if (setup_cmd_per_lun > 0)
	452	sun3_scsi_template.cmd_per_lun = setup_cmd_per_lun;
	453	if (setup_sg_tablesize >= 0)
	454	sun3_scsi_template.sg_tablesize = setup_sg_tablesize;
	455	if (setup_hostid >= 0)
	456	sun3_scsi_template.this_id = setup_hostid & 7;
	457
0d31f875 FT	458	#ifdef SUN3_SCSI_VME
	459	ioaddr = NULL;
	460	for (i = 0; i < 2; i++) {
	461	unsigned char x;
	462
	463	irq = platform_get_resource(pdev, IORESOURCE_IRQ, i);
	464	mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
	465	if (!irq \|\| !mem)
	466	break;
	467
	468	ioaddr = sun3_ioremap(mem->start, resource_size(mem),
	469	SUN3_PAGE_TYPE_VME16);
	470	dregs = (struct sun3_dma_regs *)(ioaddr + 8);
	471
	472	if (sun3_map_test((unsigned long)dregs, &x)) {
	473	unsigned short oldcsr;
	474
	475	oldcsr = dregs->csr;
	476	dregs->csr = 0;
	477	udelay(SUN3_DMA_DELAY);
	478	if (dregs->csr == 0x1400)
	479	break;
	480
	481	dregs->csr = oldcsr;
	482	}
	483
	484	iounmap(ioaddr);
	485	ioaddr = NULL;
	486	}
	487	if (!ioaddr)
	488	return -ENODEV;
	489	#else
	490	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	491	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	492	if (!irq \|\| !mem)
	493	return -ENODEV;
	494
	495	ioaddr = ioremap(mem->start, resource_size(mem));
	496	dregs = (struct sun3_dma_regs *)(ioaddr + 8);
	497
	498	udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs));
	499	if (!udc_regs) {
	500	pr_err(PFX "couldn't allocate DVMA memory!\n");
	501	iounmap(ioaddr);
	502	return -ENOMEM;
	503	}
	504	#endif
	505
	506	sun3_scsi_regp = ioaddr;
	507
	508	instance = scsi_host_alloc(&sun3_scsi_template,
	509	sizeof(struct NCR5380_hostdata));
	510	if (!instance) {
	511	error = -ENOMEM;
	512	goto fail_alloc;
	513	}
0d31f875 FT	514
	515	instance->io_port = (unsigned long)ioaddr;
	516	instance->irq = irq->start;
	517
ca513fc9 FT	518	#ifdef SUPPORT_TAGS
	519	host_flags \|= setup_use_tagged_queuing > 0 ? FLAG_TAGGED_QUEUING : 0;
	520	#endif
	521
0ad0eff9 FT	522	error = NCR5380_init(instance, host_flags);
	523	if (error)
	524	goto fail_init;
0d31f875 FT	525
	526	error = request_irq(instance->irq, scsi_sun3_intr, 0,
	527	"NCR5380", instance);
	528	if (error) {
0d31f875 FT	529	pr_err(PFX "scsi%d: IRQ %d not free, bailing out\n",
	530	instance->host_no, instance->irq);
	531	goto fail_irq;
0d31f875 FT	532	}
	533
	534	dregs->csr = 0;
	535	udelay(SUN3_DMA_DELAY);
	536	dregs->csr = CSR_SCSI \| CSR_FIFO \| CSR_INTR;
	537	udelay(SUN3_DMA_DELAY);
	538	dregs->fifo_count = 0;
	539	#ifdef SUN3_SCSI_VME
	540	dregs->fifo_count_hi = 0;
	541	dregs->dma_addr_hi = 0;
	542	dregs->dma_addr_lo = 0;
	543	dregs->dma_count_hi = 0;
	544	dregs->dma_count_lo = 0;
	545
	546	dregs->ivect = VME_DATA24 \| (instance->irq & 0xff);
	547	#endif
	548
9c3f0e2b	549	NCR5380_maybe_reset_bus(instance);
0d31f875 FT	550
	551	error = scsi_add_host(instance, NULL);
	552	if (error)
	553	goto fail_host;
	554
	555	platform_set_drvdata(pdev, instance);
	556
	557	scsi_scan_host(instance);
	558	return 0;
	559
	560	fail_host:
e4dec680	561	free_irq(instance->irq, instance);
0d31f875 FT	562	fail_irq:
0d31f875 FT	563	NCR5380_exit(instance);
0ad0eff9	564	fail_init:
0d31f875 FT	565	scsi_host_put(instance);
	566	fail_alloc:
	567	if (udc_regs)
	568	dvma_free(udc_regs);
	569	iounmap(sun3_scsi_regp);
	570	return error;
	571	}
	572
	573	static int __exit sun3_scsi_remove(struct platform_device *pdev)
	574	{
	575	struct Scsi_Host *instance = platform_get_drvdata(pdev);
	576
	577	scsi_remove_host(instance);
e4dec680	578	free_irq(instance->irq, instance);
0d31f875 FT	579	NCR5380_exit(instance);
	580	scsi_host_put(instance);
	581	if (udc_regs)
	582	dvma_free(udc_regs);
	583	iounmap(sun3_scsi_regp);
	584	return 0;
	585	}
	586
	587	static struct platform_driver sun3_scsi_driver = {
	588	.remove = __exit_p(sun3_scsi_remove),
	589	.driver = {
	590	.name = DRV_MODULE_NAME,
0d31f875 FT	591	},
0d31f875 FT	592	};
1da177e4	593
0d31f875	594	module_platform_driver_probe(sun3_scsi_driver, sun3_scsi_probe);
1da177e4	595
0d31f875	596	MODULE_ALIAS("platform:" DRV_MODULE_NAME);
1da177e4	597	MODULE_LICENSE("GPL");