Merge branch 'master' of /pub/scm/linux/kernel/git/torvalds/linux-2.6
[deliverable/linux.git] / drivers / serial / 8250.h
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1da177e4
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1/*
2 * linux/drivers/char/8250.h
3 *
4 * Driver for 8250/16550-type serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 *
8 * Copyright (C) 2001 Russell King.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * $Id: 8250.h,v 1.8 2002/07/21 21:32:30 rmk Exp $
16 */
17
bc49a661 18#include <linux/serial_8250.h>
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19
20struct old_serial_port {
21 unsigned int uart;
22 unsigned int baud_base;
23 unsigned int port;
24 unsigned int irq;
25 unsigned int flags;
26 unsigned char hub6;
27 unsigned char io_type;
28 unsigned char *iomem_base;
29 unsigned short iomem_reg_shift;
30};
31
32/*
33 * This replaces serial_uart_config in include/linux/serial.h
34 */
35struct serial8250_config {
36 const char *name;
37 unsigned short fifo_size;
38 unsigned short tx_loadsz;
39 unsigned char fcr;
40 unsigned int flags;
41};
42
43#define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
44#define UART_CAP_EFR (1 << 9) /* UART has EFR */
45#define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
46#define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
47#define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
48
4ba5e35d 49#define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
55d3b282 50#define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
21c614a7 51#define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
4ba5e35d 52
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53#define PROBE_RSA (1 << 0)
54#define PROBE_ANY (~0)
55
56#define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
57
58#ifdef CONFIG_SERIAL_8250_SHARE_IRQ
59#define SERIAL8250_SHARE_IRQS 1
60#else
61#define SERIAL8250_SHARE_IRQS 0
62#endif
63
64#if defined(__alpha__) && !defined(CONFIG_PCI)
65/*
66 * Digital did something really horribly wrong with the OUT1 and OUT2
67 * lines on at least some ALPHA's. The failure mode is that if either
68 * is cleared, the machine locks up with endless interrupts.
69 */
70#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
71#elif defined(CONFIG_SBC8560)
72/*
73 * WindRiver did something similarly broken on their SBC8560 board. The
74 * UART tristates its IRQ output while OUT2 is clear, but they pulled
75 * the interrupt line _up_ instead of down, so if we register the IRQ
76 * while the UART is in that state, we die in an IRQ storm. */
77#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2)
78#else
79#define ALPHA_KLUDGE_MCR 0
80#endif
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