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1da177e4 LT |
1 | /* |
2 | * linux/drivers/char/clps711x.c | |
3 | * | |
4 | * Driver for CLPS711x serial ports | |
5 | * | |
6 | * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. | |
7 | * | |
8 | * Copyright 1999 ARM Limited | |
9 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
24 | * | |
25 | * $Id: clps711x.c,v 1.42 2002/07/28 10:03:28 rmk Exp $ | |
26 | * | |
27 | */ | |
28 | #include <linux/config.h> | |
29 | ||
30 | #if defined(CONFIG_SERIAL_CLPS711X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | |
31 | #define SUPPORT_SYSRQ | |
32 | #endif | |
33 | ||
34 | #include <linux/module.h> | |
35 | #include <linux/ioport.h> | |
36 | #include <linux/init.h> | |
37 | #include <linux/console.h> | |
38 | #include <linux/sysrq.h> | |
39 | #include <linux/spinlock.h> | |
40 | #include <linux/device.h> | |
41 | #include <linux/tty.h> | |
42 | #include <linux/tty_flip.h> | |
43 | #include <linux/serial_core.h> | |
44 | #include <linux/serial.h> | |
45 | ||
46 | #include <asm/hardware.h> | |
47 | #include <asm/io.h> | |
48 | #include <asm/irq.h> | |
49 | #include <asm/hardware/clps7111.h> | |
50 | ||
51 | #define UART_NR 2 | |
52 | ||
53 | #define SERIAL_CLPS711X_MAJOR 204 | |
54 | #define SERIAL_CLPS711X_MINOR 40 | |
55 | #define SERIAL_CLPS711X_NR UART_NR | |
56 | ||
57 | /* | |
58 | * We use the relevant SYSCON register as a base address for these ports. | |
59 | */ | |
60 | #define UBRLCR(port) ((port)->iobase + UBRLCR1 - SYSCON1) | |
61 | #define UARTDR(port) ((port)->iobase + UARTDR1 - SYSCON1) | |
62 | #define SYSFLG(port) ((port)->iobase + SYSFLG1 - SYSCON1) | |
63 | #define SYSCON(port) ((port)->iobase + SYSCON1 - SYSCON1) | |
64 | ||
65 | #define TX_IRQ(port) ((port)->irq) | |
66 | #define RX_IRQ(port) ((port)->irq + 1) | |
67 | ||
68 | #define UART_ANY_ERR (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR) | |
69 | ||
70 | #define tx_enabled(port) ((port)->unused[0]) | |
71 | ||
72 | static void | |
73 | clps711xuart_stop_tx(struct uart_port *port, unsigned int tty_stop) | |
74 | { | |
75 | if (tx_enabled(port)) { | |
76 | disable_irq(TX_IRQ(port)); | |
77 | tx_enabled(port) = 0; | |
78 | } | |
79 | } | |
80 | ||
81 | static void | |
82 | clps711xuart_start_tx(struct uart_port *port, unsigned int tty_start) | |
83 | { | |
84 | if (!tx_enabled(port)) { | |
85 | enable_irq(TX_IRQ(port)); | |
86 | tx_enabled(port) = 1; | |
87 | } | |
88 | } | |
89 | ||
90 | static void clps711xuart_stop_rx(struct uart_port *port) | |
91 | { | |
92 | disable_irq(RX_IRQ(port)); | |
93 | } | |
94 | ||
95 | static void clps711xuart_enable_ms(struct uart_port *port) | |
96 | { | |
97 | } | |
98 | ||
99 | static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id, struct pt_regs *regs) | |
100 | { | |
101 | struct uart_port *port = dev_id; | |
102 | struct tty_struct *tty = port->info->tty; | |
103 | unsigned int status, ch, flg, ignored = 0; | |
104 | ||
105 | status = clps_readl(SYSFLG(port)); | |
106 | while (!(status & SYSFLG_URXFE)) { | |
107 | ch = clps_readl(UARTDR(port)); | |
108 | ||
109 | if (tty->flip.count >= TTY_FLIPBUF_SIZE) | |
110 | goto ignore_char; | |
111 | port->icount.rx++; | |
112 | ||
113 | flg = TTY_NORMAL; | |
114 | ||
115 | /* | |
116 | * Note that the error handling code is | |
117 | * out of the main execution path | |
118 | */ | |
2a9604b8 RK |
119 | if (unlikely(ch & UART_ANY_ERR)) { |
120 | if (ch & UARTDR_PARERR) | |
121 | port->icount.parity++; | |
122 | else if (ch & UARTDR_FRMERR) | |
123 | port->icount.frame++; | |
124 | if (ch & UARTDR_OVERR) | |
125 | port->icount.overrun++; | |
1da177e4 | 126 | |
2a9604b8 | 127 | ch &= port->read_status_mask; |
1da177e4 | 128 | |
2a9604b8 RK |
129 | if (ch & UARTDR_PARERR) |
130 | flg = TTY_PARITY; | |
131 | else if (ch & UARTDR_FRMERR) | |
132 | flg = TTY_FRAME; | |
1da177e4 | 133 | |
2a9604b8 RK |
134 | #ifdef SUPPORT_SYSRQ |
135 | port->sysrq = 0; | |
136 | #endif | |
137 | } | |
1da177e4 | 138 | |
2a9604b8 RK |
139 | if (uart_handle_sysrq_char(port, ch, regs)) |
140 | goto ignore_char; | |
1da177e4 | 141 | |
1da177e4 LT |
142 | /* |
143 | * CHECK: does overrun affect the current character? | |
144 | * ASSUMPTION: it does not. | |
145 | */ | |
05ab3014 | 146 | uart_insert_char(port, ch, UARTDR_OVERR, ch, flg); |
2a9604b8 RK |
147 | |
148 | ignore_char: | |
149 | status = clps_readl(SYSFLG(port)); | |
1da177e4 | 150 | } |
2a9604b8 RK |
151 | tty_flip_buffer_push(tty); |
152 | return IRQ_HANDLED; | |
1da177e4 LT |
153 | } |
154 | ||
155 | static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id, struct pt_regs *regs) | |
156 | { | |
157 | struct uart_port *port = dev_id; | |
158 | struct circ_buf *xmit = &port->info->xmit; | |
159 | int count; | |
160 | ||
161 | if (port->x_char) { | |
162 | clps_writel(port->x_char, UARTDR(port)); | |
163 | port->icount.tx++; | |
164 | port->x_char = 0; | |
165 | return IRQ_HANDLED; | |
166 | } | |
167 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | |
168 | clps711xuart_stop_tx(port, 0); | |
169 | return IRQ_HANDLED; | |
170 | } | |
171 | ||
172 | count = port->fifosize >> 1; | |
173 | do { | |
174 | clps_writel(xmit->buf[xmit->tail], UARTDR(port)); | |
175 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
176 | port->icount.tx++; | |
177 | if (uart_circ_empty(xmit)) | |
178 | break; | |
179 | } while (--count > 0); | |
180 | ||
181 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
182 | uart_write_wakeup(port); | |
183 | ||
184 | if (uart_circ_empty(xmit)) | |
185 | clps711xuart_stop_tx(port, 0); | |
186 | ||
187 | return IRQ_HANDLED; | |
188 | } | |
189 | ||
190 | static unsigned int clps711xuart_tx_empty(struct uart_port *port) | |
191 | { | |
192 | unsigned int status = clps_readl(SYSFLG(port)); | |
193 | return status & SYSFLG_UBUSY ? 0 : TIOCSER_TEMT; | |
194 | } | |
195 | ||
196 | static unsigned int clps711xuart_get_mctrl(struct uart_port *port) | |
197 | { | |
198 | unsigned int port_addr; | |
199 | unsigned int result = 0; | |
200 | unsigned int status; | |
201 | ||
202 | port_addr = SYSFLG(port); | |
203 | if (port_addr == SYSFLG1) { | |
204 | status = clps_readl(SYSFLG1); | |
205 | if (status & SYSFLG1_DCD) | |
206 | result |= TIOCM_CAR; | |
207 | if (status & SYSFLG1_DSR) | |
208 | result |= TIOCM_DSR; | |
209 | if (status & SYSFLG1_CTS) | |
210 | result |= TIOCM_CTS; | |
211 | } | |
212 | ||
213 | return result; | |
214 | } | |
215 | ||
216 | static void | |
217 | clps711xuart_set_mctrl_null(struct uart_port *port, unsigned int mctrl) | |
218 | { | |
219 | } | |
220 | ||
221 | static void clps711xuart_break_ctl(struct uart_port *port, int break_state) | |
222 | { | |
223 | unsigned long flags; | |
224 | unsigned int ubrlcr; | |
225 | ||
226 | spin_lock_irqsave(&port->lock, flags); | |
227 | ubrlcr = clps_readl(UBRLCR(port)); | |
228 | if (break_state == -1) | |
229 | ubrlcr |= UBRLCR_BREAK; | |
230 | else | |
231 | ubrlcr &= ~UBRLCR_BREAK; | |
232 | clps_writel(ubrlcr, UBRLCR(port)); | |
233 | spin_unlock_irqrestore(&port->lock, flags); | |
234 | } | |
235 | ||
236 | static int clps711xuart_startup(struct uart_port *port) | |
237 | { | |
238 | unsigned int syscon; | |
239 | int retval; | |
240 | ||
241 | tx_enabled(port) = 1; | |
242 | ||
243 | /* | |
244 | * Allocate the IRQs | |
245 | */ | |
246 | retval = request_irq(TX_IRQ(port), clps711xuart_int_tx, 0, | |
247 | "clps711xuart_tx", port); | |
248 | if (retval) | |
249 | return retval; | |
250 | ||
251 | retval = request_irq(RX_IRQ(port), clps711xuart_int_rx, 0, | |
252 | "clps711xuart_rx", port); | |
253 | if (retval) { | |
254 | free_irq(TX_IRQ(port), port); | |
255 | return retval; | |
256 | } | |
257 | ||
258 | /* | |
259 | * enable the port | |
260 | */ | |
261 | syscon = clps_readl(SYSCON(port)); | |
262 | syscon |= SYSCON_UARTEN; | |
263 | clps_writel(syscon, SYSCON(port)); | |
264 | ||
265 | return 0; | |
266 | } | |
267 | ||
268 | static void clps711xuart_shutdown(struct uart_port *port) | |
269 | { | |
270 | unsigned int ubrlcr, syscon; | |
271 | ||
272 | /* | |
273 | * Free the interrupt | |
274 | */ | |
275 | free_irq(TX_IRQ(port), port); /* TX interrupt */ | |
276 | free_irq(RX_IRQ(port), port); /* RX interrupt */ | |
277 | ||
278 | /* | |
279 | * disable the port | |
280 | */ | |
281 | syscon = clps_readl(SYSCON(port)); | |
282 | syscon &= ~SYSCON_UARTEN; | |
283 | clps_writel(syscon, SYSCON(port)); | |
284 | ||
285 | /* | |
286 | * disable break condition and fifos | |
287 | */ | |
288 | ubrlcr = clps_readl(UBRLCR(port)); | |
289 | ubrlcr &= ~(UBRLCR_FIFOEN | UBRLCR_BREAK); | |
290 | clps_writel(ubrlcr, UBRLCR(port)); | |
291 | } | |
292 | ||
293 | static void | |
294 | clps711xuart_set_termios(struct uart_port *port, struct termios *termios, | |
295 | struct termios *old) | |
296 | { | |
297 | unsigned int ubrlcr, baud, quot; | |
298 | unsigned long flags; | |
299 | ||
300 | /* | |
301 | * We don't implement CREAD. | |
302 | */ | |
303 | termios->c_cflag |= CREAD; | |
304 | ||
305 | /* | |
306 | * Ask the core to calculate the divisor for us. | |
307 | */ | |
308 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | |
309 | quot = uart_get_divisor(port, baud); | |
310 | ||
311 | switch (termios->c_cflag & CSIZE) { | |
312 | case CS5: | |
313 | ubrlcr = UBRLCR_WRDLEN5; | |
314 | break; | |
315 | case CS6: | |
316 | ubrlcr = UBRLCR_WRDLEN6; | |
317 | break; | |
318 | case CS7: | |
319 | ubrlcr = UBRLCR_WRDLEN7; | |
320 | break; | |
321 | default: // CS8 | |
322 | ubrlcr = UBRLCR_WRDLEN8; | |
323 | break; | |
324 | } | |
325 | if (termios->c_cflag & CSTOPB) | |
326 | ubrlcr |= UBRLCR_XSTOP; | |
327 | if (termios->c_cflag & PARENB) { | |
328 | ubrlcr |= UBRLCR_PRTEN; | |
329 | if (!(termios->c_cflag & PARODD)) | |
330 | ubrlcr |= UBRLCR_EVENPRT; | |
331 | } | |
332 | if (port->fifosize > 1) | |
333 | ubrlcr |= UBRLCR_FIFOEN; | |
334 | ||
335 | spin_lock_irqsave(&port->lock, flags); | |
336 | ||
337 | /* | |
338 | * Update the per-port timeout. | |
339 | */ | |
340 | uart_update_timeout(port, termios->c_cflag, baud); | |
341 | ||
342 | port->read_status_mask = UARTDR_OVERR; | |
343 | if (termios->c_iflag & INPCK) | |
344 | port->read_status_mask |= UARTDR_PARERR | UARTDR_FRMERR; | |
345 | ||
346 | /* | |
347 | * Characters to ignore | |
348 | */ | |
349 | port->ignore_status_mask = 0; | |
350 | if (termios->c_iflag & IGNPAR) | |
351 | port->ignore_status_mask |= UARTDR_FRMERR | UARTDR_PARERR; | |
352 | if (termios->c_iflag & IGNBRK) { | |
353 | /* | |
354 | * If we're ignoring parity and break indicators, | |
355 | * ignore overruns to (for real raw support). | |
356 | */ | |
357 | if (termios->c_iflag & IGNPAR) | |
358 | port->ignore_status_mask |= UARTDR_OVERR; | |
359 | } | |
360 | ||
361 | quot -= 1; | |
362 | ||
363 | clps_writel(ubrlcr | quot, UBRLCR(port)); | |
364 | ||
365 | spin_unlock_irqrestore(&port->lock, flags); | |
366 | } | |
367 | ||
368 | static const char *clps711xuart_type(struct uart_port *port) | |
369 | { | |
370 | return port->type == PORT_CLPS711X ? "CLPS711x" : NULL; | |
371 | } | |
372 | ||
373 | /* | |
374 | * Configure/autoconfigure the port. | |
375 | */ | |
376 | static void clps711xuart_config_port(struct uart_port *port, int flags) | |
377 | { | |
378 | if (flags & UART_CONFIG_TYPE) | |
379 | port->type = PORT_CLPS711X; | |
380 | } | |
381 | ||
382 | static void clps711xuart_release_port(struct uart_port *port) | |
383 | { | |
384 | } | |
385 | ||
386 | static int clps711xuart_request_port(struct uart_port *port) | |
387 | { | |
388 | return 0; | |
389 | } | |
390 | ||
391 | static struct uart_ops clps711x_pops = { | |
392 | .tx_empty = clps711xuart_tx_empty, | |
393 | .set_mctrl = clps711xuart_set_mctrl_null, | |
394 | .get_mctrl = clps711xuart_get_mctrl, | |
395 | .stop_tx = clps711xuart_stop_tx, | |
396 | .start_tx = clps711xuart_start_tx, | |
397 | .stop_rx = clps711xuart_stop_rx, | |
398 | .enable_ms = clps711xuart_enable_ms, | |
399 | .break_ctl = clps711xuart_break_ctl, | |
400 | .startup = clps711xuart_startup, | |
401 | .shutdown = clps711xuart_shutdown, | |
402 | .set_termios = clps711xuart_set_termios, | |
403 | .type = clps711xuart_type, | |
404 | .config_port = clps711xuart_config_port, | |
405 | .release_port = clps711xuart_release_port, | |
406 | .request_port = clps711xuart_request_port, | |
407 | }; | |
408 | ||
409 | static struct uart_port clps711x_ports[UART_NR] = { | |
410 | { | |
411 | .iobase = SYSCON1, | |
412 | .irq = IRQ_UTXINT1, /* IRQ_URXINT1, IRQ_UMSINT */ | |
413 | .uartclk = 3686400, | |
414 | .fifosize = 16, | |
415 | .ops = &clps711x_pops, | |
416 | .line = 0, | |
417 | .flags = ASYNC_BOOT_AUTOCONF, | |
418 | }, | |
419 | { | |
420 | .iobase = SYSCON2, | |
421 | .irq = IRQ_UTXINT2, /* IRQ_URXINT2 */ | |
422 | .uartclk = 3686400, | |
423 | .fifosize = 16, | |
424 | .ops = &clps711x_pops, | |
425 | .line = 1, | |
426 | .flags = ASYNC_BOOT_AUTOCONF, | |
427 | } | |
428 | }; | |
429 | ||
430 | #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE | |
431 | /* | |
432 | * Print a string to the serial port trying not to disturb | |
433 | * any possible real use of the port... | |
434 | * | |
435 | * The console_lock must be held when we get here. | |
436 | * | |
437 | * Note that this is called with interrupts already disabled | |
438 | */ | |
439 | static void | |
440 | clps711xuart_console_write(struct console *co, const char *s, | |
441 | unsigned int count) | |
442 | { | |
443 | struct uart_port *port = clps711x_ports + co->index; | |
444 | unsigned int status, syscon; | |
445 | int i; | |
446 | ||
447 | /* | |
448 | * Ensure that the port is enabled. | |
449 | */ | |
450 | syscon = clps_readl(SYSCON(port)); | |
451 | clps_writel(syscon | SYSCON_UARTEN, SYSCON(port)); | |
452 | ||
453 | /* | |
454 | * Now, do each character | |
455 | */ | |
456 | for (i = 0; i < count; i++) { | |
457 | do { | |
458 | status = clps_readl(SYSFLG(port)); | |
459 | } while (status & SYSFLG_UTXFF); | |
460 | clps_writel(s[i], UARTDR(port)); | |
461 | if (s[i] == '\n') { | |
462 | do { | |
463 | status = clps_readl(SYSFLG(port)); | |
464 | } while (status & SYSFLG_UTXFF); | |
465 | clps_writel('\r', UARTDR(port)); | |
466 | } | |
467 | } | |
468 | ||
469 | /* | |
470 | * Finally, wait for transmitter to become empty | |
471 | * and restore the uart state. | |
472 | */ | |
473 | do { | |
474 | status = clps_readl(SYSFLG(port)); | |
475 | } while (status & SYSFLG_UBUSY); | |
476 | ||
477 | clps_writel(syscon, SYSCON(port)); | |
478 | } | |
479 | ||
480 | static void __init | |
481 | clps711xuart_console_get_options(struct uart_port *port, int *baud, | |
482 | int *parity, int *bits) | |
483 | { | |
484 | if (clps_readl(SYSCON(port)) & SYSCON_UARTEN) { | |
485 | unsigned int ubrlcr, quot; | |
486 | ||
487 | ubrlcr = clps_readl(UBRLCR(port)); | |
488 | ||
489 | *parity = 'n'; | |
490 | if (ubrlcr & UBRLCR_PRTEN) { | |
491 | if (ubrlcr & UBRLCR_EVENPRT) | |
492 | *parity = 'e'; | |
493 | else | |
494 | *parity = 'o'; | |
495 | } | |
496 | ||
497 | if ((ubrlcr & UBRLCR_WRDLEN_MASK) == UBRLCR_WRDLEN7) | |
498 | *bits = 7; | |
499 | else | |
500 | *bits = 8; | |
501 | ||
502 | quot = ubrlcr & UBRLCR_BAUD_MASK; | |
503 | *baud = port->uartclk / (16 * (quot + 1)); | |
504 | } | |
505 | } | |
506 | ||
507 | static int __init clps711xuart_console_setup(struct console *co, char *options) | |
508 | { | |
509 | struct uart_port *port; | |
510 | int baud = 38400; | |
511 | int bits = 8; | |
512 | int parity = 'n'; | |
513 | int flow = 'n'; | |
514 | ||
515 | /* | |
516 | * Check whether an invalid uart number has been specified, and | |
517 | * if so, search for the first available port that does have | |
518 | * console support. | |
519 | */ | |
520 | port = uart_get_console(clps711x_ports, UART_NR, co); | |
521 | ||
522 | if (options) | |
523 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
524 | else | |
525 | clps711xuart_console_get_options(port, &baud, &parity, &bits); | |
526 | ||
527 | return uart_set_options(port, co, baud, parity, bits, flow); | |
528 | } | |
529 | ||
530 | extern struct uart_driver clps711x_reg; | |
531 | static struct console clps711x_console = { | |
532 | .name = "ttyCL", | |
533 | .write = clps711xuart_console_write, | |
534 | .device = uart_console_device, | |
535 | .setup = clps711xuart_console_setup, | |
536 | .flags = CON_PRINTBUFFER, | |
537 | .index = -1, | |
538 | .data = &clps711x_reg, | |
539 | }; | |
540 | ||
541 | static int __init clps711xuart_console_init(void) | |
542 | { | |
543 | register_console(&clps711x_console); | |
544 | return 0; | |
545 | } | |
546 | console_initcall(clps711xuart_console_init); | |
547 | ||
548 | #define CLPS711X_CONSOLE &clps711x_console | |
549 | #else | |
550 | #define CLPS711X_CONSOLE NULL | |
551 | #endif | |
552 | ||
553 | static struct uart_driver clps711x_reg = { | |
554 | .driver_name = "ttyCL", | |
555 | .dev_name = "ttyCL", | |
556 | .major = SERIAL_CLPS711X_MAJOR, | |
557 | .minor = SERIAL_CLPS711X_MINOR, | |
558 | .nr = UART_NR, | |
559 | ||
560 | .cons = CLPS711X_CONSOLE, | |
561 | }; | |
562 | ||
563 | static int __init clps711xuart_init(void) | |
564 | { | |
565 | int ret, i; | |
566 | ||
567 | printk(KERN_INFO "Serial: CLPS711x driver $Revision: 1.42 $\n"); | |
568 | ||
569 | ret = uart_register_driver(&clps711x_reg); | |
570 | if (ret) | |
571 | return ret; | |
572 | ||
573 | for (i = 0; i < UART_NR; i++) | |
574 | uart_add_one_port(&clps711x_reg, &clps711x_ports[i]); | |
575 | ||
576 | return 0; | |
577 | } | |
578 | ||
579 | static void __exit clps711xuart_exit(void) | |
580 | { | |
581 | int i; | |
582 | ||
583 | for (i = 0; i < UART_NR; i++) | |
584 | uart_remove_one_port(&clps711x_reg, &clps711x_ports[i]); | |
585 | ||
586 | uart_unregister_driver(&clps711x_reg); | |
587 | } | |
588 | ||
589 | module_init(clps711xuart_init); | |
590 | module_exit(clps711xuart_exit); | |
591 | ||
592 | MODULE_AUTHOR("Deep Blue Solutions Ltd"); | |
593 | MODULE_DESCRIPTION("CLPS-711x generic serial driver $Revision: 1.42 $"); | |
594 | MODULE_LICENSE("GPL"); | |
595 | MODULE_ALIAS_CHARDEV(SERIAL_CLPS711X_MAJOR, SERIAL_CLPS711X_MINOR); |