[POWERPC] Update default irq servers when boot cpu is removed
[deliverable/linux.git] / drivers / serial / mpc52xx_uart.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
3 *
4 * FIXME According to the usermanual the status bits in the status register
5 * are only updated when the peripherals access the FIFO and not when the
6 * CPU access them. So since we use this bits to know when we stop writing
7 * and reading, they may not be updated in-time and a race condition may
8 * exists. But I haven't be able to prove this and I don't care. But if
9 * any problem arises, it might worth checking. The TX/RX FIFO Stats
10 * registers should be used in addition.
11 * Update: Actually, they seem updated ... At least the bits we use.
12 *
13 *
14 * Maintainer : Sylvain Munaut <tnt@246tNt.com>
9b9129e7 15 *
1da177e4
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16 * Some of the code has been inspired/copied from the 2.4 code written
17 * by Dale Farnsworth <dfarnsworth@mvista.com>.
9b9129e7 18 *
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19 * Copyright (C) 2008 Freescale Semiconductor Inc.
20 * John Rigby <jrigby@gmail.com>
21 * Added support for MPC5121
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22 * Copyright (C) 2006 Secret Lab Technologies Ltd.
23 * Grant Likely <grant.likely@secretlab.ca>
24 * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
1da177e4 25 * Copyright (C) 2003 MontaVista, Software, Inc.
9b9129e7 26 *
1da177e4
LT
27 * This file is licensed under the terms of the GNU General Public License
28 * version 2. This program is licensed "as is" without any warranty of any
29 * kind, whether express or implied.
30 */
9b9129e7 31
1da177e4
LT
32/* Platform device Usage :
33 *
34 * Since PSCs can have multiple function, the correct driver for each one
35 * is selected by calling mpc52xx_match_psc_function(...). The function
36 * handled by this driver is "uart".
37 *
38 * The driver init all necessary registers to place the PSC in uart mode without
39 * DCD. However, the pin multiplexing aren't changed and should be set either
40 * by the bootloader or in the platform init code.
41 *
406b7d4f 42 * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
d62de3aa
SM
43 * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
44 * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
45 * fpr the console code : without this 1:1 mapping, at early boot time, when we
c30fe7f7 46 * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
d62de3aa 47 * will be mapped to.
1da177e4
LT
48 */
49
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GL
50/* OF Platform device Usage :
51 *
52 * This driver is only used for PSCs configured in uart mode. The device
53 * tree will have a node for each PSC in uart mode w/ device_type = "serial"
54 * and "mpc52xx-psc-uart" in the compatible string
55 *
56 * By default, PSC devices are enumerated in the order they are found. However
57 * a particular PSC number can be forces by adding 'device_no = <port#>'
58 * to the device node.
59 *
60 * The driver init all necessary registers to place the PSC in uart mode without
61 * DCD. However, the pin multiplexing aren't changed and should be set either
62 * by the bootloader or in the platform init code.
63 */
64
65#undef DEBUG
66
67#include <linux/device.h>
1da177e4
LT
68#include <linux/module.h>
69#include <linux/tty.h>
70#include <linux/serial.h>
71#include <linux/sysrq.h>
72#include <linux/console.h>
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73#include <linux/delay.h>
74#include <linux/io.h>
1da177e4 75
b9272dfd 76#if defined(CONFIG_PPC_MERGE)
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77#include <linux/of.h>
78#include <linux/of_platform.h>
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79#else
80#include <linux/platform_device.h>
81#endif
82
1da177e4 83#include <asm/mpc52xx.h>
25ae3a07 84#include <asm/mpc512x.h>
1da177e4
LT
85#include <asm/mpc52xx_psc.h>
86
87#if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
88#define SUPPORT_SYSRQ
89#endif
90
91#include <linux/serial_core.h>
92
93
d62de3aa
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94/* We've been assigned a range on the "Low-density serial ports" major */
95#define SERIAL_PSC_MAJOR 204
96#define SERIAL_PSC_MINOR 148
97
1da177e4
LT
98
99#define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
100
101
102static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
103 /* Rem: - We use the read_status_mask as a shadow of
104 * psc->mpc52xx_psc_imr
105 * - It's important that is array is all zero on start as we
106 * use it to know if it's initialized or not ! If it's not sure
107 * it's cleared, then a memset(...,0,...) should be added to
108 * the console_init
109 */
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110#if defined(CONFIG_PPC_MERGE)
111/* lookup table for matching device nodes to index numbers */
112static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
113
114static void mpc52xx_uart_of_enumerate(void);
115#endif
1da177e4 116
599f030c 117
1da177e4
LT
118#define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
119
120
121/* Forward declaration of the interruption handling routine */
406b7d4f 122static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
1da177e4
LT
123
124
125/* Simple macro to test if a port is console or not. This one is taken
126 * for serial_core.c and maybe should be moved to serial_core.h ? */
127#ifdef CONFIG_SERIAL_CORE_CONSOLE
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128#define uart_console(port) \
129 ((port)->cons && (port)->cons->index == (port)->line)
1da177e4
LT
130#else
131#define uart_console(port) (0)
132#endif
133
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134#if defined(CONFIG_PPC_MERGE)
135static struct of_device_id mpc52xx_uart_of_match[] = {
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136#ifdef CONFIG_PPC_MPC52xx
137 { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
138 /* binding used by old lite5200 device trees: */
139 { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
140 /* binding used by efika: */
141 { .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, },
142#endif
143#ifdef CONFIG_PPC_MPC512x
144 { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
145 {},
146#endif
147};
148#if defined(CONFIG_PPC_MERGE)
149static const struct of_device_id mpc52xx_uart_of_match[] = {
150 {.type = "serial",
151 .compatible = "mpc5200-psc-uart",
152#endif
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153 {},
154};
155#endif
156
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157#endif
158
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159/* ======================================================================== */
160/* PSC fifo operations for isolating differences between 52xx and 512x */
161/* ======================================================================== */
162
163struct psc_ops {
164 void (*fifo_init)(struct uart_port *port);
165 int (*raw_rx_rdy)(struct uart_port *port);
166 int (*raw_tx_rdy)(struct uart_port *port);
167 int (*rx_rdy)(struct uart_port *port);
168 int (*tx_rdy)(struct uart_port *port);
169 int (*tx_empty)(struct uart_port *port);
170 void (*stop_rx)(struct uart_port *port);
171 void (*start_tx)(struct uart_port *port);
172 void (*stop_tx)(struct uart_port *port);
173 void (*rx_clr_irq)(struct uart_port *port);
174 void (*tx_clr_irq)(struct uart_port *port);
175 void (*write_char)(struct uart_port *port, unsigned char c);
176 unsigned char (*read_char)(struct uart_port *port);
177 void (*cw_disable_ints)(struct uart_port *port);
178 void (*cw_restore_ints)(struct uart_port *port);
179 unsigned long (*getuartclk)(void *p);
180};
181
25ae3a07 182#ifdef CONFIG_PPC_MPC52xx
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183#define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
184static void mpc52xx_psc_fifo_init(struct uart_port *port)
185{
186 struct mpc52xx_psc __iomem *psc = PSC(port);
187 struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
188
189 /* /32 prescaler */
190 out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
191
192 out_8(&fifo->rfcntl, 0x00);
193 out_be16(&fifo->rfalarm, 0x1ff);
194 out_8(&fifo->tfcntl, 0x07);
195 out_be16(&fifo->tfalarm, 0x80);
196
197 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
198 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
199}
200
201static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
202{
203 return in_be16(&PSC(port)->mpc52xx_psc_status)
204 & MPC52xx_PSC_SR_RXRDY;
205}
206
207static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
208{
209 return in_be16(&PSC(port)->mpc52xx_psc_status)
210 & MPC52xx_PSC_SR_TXRDY;
211}
212
213
214static int mpc52xx_psc_rx_rdy(struct uart_port *port)
215{
216 return in_be16(&PSC(port)->mpc52xx_psc_isr)
217 & port->read_status_mask
218 & MPC52xx_PSC_IMR_RXRDY;
219}
220
221static int mpc52xx_psc_tx_rdy(struct uart_port *port)
222{
223 return in_be16(&PSC(port)->mpc52xx_psc_isr)
224 & port->read_status_mask
225 & MPC52xx_PSC_IMR_TXRDY;
226}
227
228static int mpc52xx_psc_tx_empty(struct uart_port *port)
229{
230 return in_be16(&PSC(port)->mpc52xx_psc_status)
231 & MPC52xx_PSC_SR_TXEMP;
232}
233
234static void mpc52xx_psc_start_tx(struct uart_port *port)
235{
236 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
237 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
238}
239
240static void mpc52xx_psc_stop_tx(struct uart_port *port)
241{
242 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
243 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
244}
245
246static void mpc52xx_psc_stop_rx(struct uart_port *port)
247{
248 port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
249 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
250}
251
252static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
253{
254}
255
256static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
257{
258}
259
260static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
261{
262 out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
263}
264
265static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
266{
267 return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
268}
269
270static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
271{
272 out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
273}
274
275static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
276{
277 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
278}
279
280/* Search for bus-frequency property in this node or a parent */
281static unsigned long mpc52xx_getuartclk(void *p)
282{
283#if defined(CONFIG_PPC_MERGE)
284 /*
285 * 5200 UARTs have a / 32 prescaler
286 * but the generic serial code assumes 16
287 * so return ipb freq / 2
288 */
289 return mpc52xx_find_ipb_freq(p) / 2;
290#else
291 pr_debug("unexpected call to mpc52xx_getuartclk with arch/ppc\n");
292 return NULL;
293#endif
294}
295
296static struct psc_ops mpc52xx_psc_ops = {
297 .fifo_init = mpc52xx_psc_fifo_init,
298 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
299 .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
300 .rx_rdy = mpc52xx_psc_rx_rdy,
301 .tx_rdy = mpc52xx_psc_tx_rdy,
302 .tx_empty = mpc52xx_psc_tx_empty,
303 .stop_rx = mpc52xx_psc_stop_rx,
304 .start_tx = mpc52xx_psc_start_tx,
305 .stop_tx = mpc52xx_psc_stop_tx,
306 .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
307 .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
308 .write_char = mpc52xx_psc_write_char,
309 .read_char = mpc52xx_psc_read_char,
310 .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
311 .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
312 .getuartclk = mpc52xx_getuartclk,
313};
314
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315#endif /* CONFIG_MPC52xx */
316
317#ifdef CONFIG_PPC_MPC512x
318#define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
319static void mpc512x_psc_fifo_init(struct uart_port *port)
320{
321 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
322 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
323 out_be32(&FIFO_512x(port)->txalarm, 1);
324 out_be32(&FIFO_512x(port)->tximr, 0);
325
326 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
327 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
328 out_be32(&FIFO_512x(port)->rxalarm, 1);
329 out_be32(&FIFO_512x(port)->rximr, 0);
330
331 out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
332 out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
333}
334
335static int mpc512x_psc_raw_rx_rdy(struct uart_port *port)
336{
337 return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
338}
339
340static int mpc512x_psc_raw_tx_rdy(struct uart_port *port)
341{
342 return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL);
343}
344
345static int mpc512x_psc_rx_rdy(struct uart_port *port)
346{
347 return in_be32(&FIFO_512x(port)->rxsr)
348 & in_be32(&FIFO_512x(port)->rximr)
349 & MPC512x_PSC_FIFO_ALARM;
350}
351
352static int mpc512x_psc_tx_rdy(struct uart_port *port)
353{
354 return in_be32(&FIFO_512x(port)->txsr)
355 & in_be32(&FIFO_512x(port)->tximr)
356 & MPC512x_PSC_FIFO_ALARM;
357}
358
359static int mpc512x_psc_tx_empty(struct uart_port *port)
360{
361 return in_be32(&FIFO_512x(port)->txsr)
362 & MPC512x_PSC_FIFO_EMPTY;
363}
364
365static void mpc512x_psc_stop_rx(struct uart_port *port)
366{
367 unsigned long rx_fifo_imr;
368
369 rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr);
370 rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
371 out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
372}
373
374static void mpc512x_psc_start_tx(struct uart_port *port)
375{
376 unsigned long tx_fifo_imr;
377
378 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
379 tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
380 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
381}
382
383static void mpc512x_psc_stop_tx(struct uart_port *port)
384{
385 unsigned long tx_fifo_imr;
386
387 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
388 tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
389 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
390}
391
392static void mpc512x_psc_rx_clr_irq(struct uart_port *port)
393{
394 out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
395}
396
397static void mpc512x_psc_tx_clr_irq(struct uart_port *port)
398{
399 out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
400}
401
402static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c)
403{
404 out_8(&FIFO_512x(port)->txdata_8, c);
405}
406
407static unsigned char mpc512x_psc_read_char(struct uart_port *port)
408{
409 return in_8(&FIFO_512x(port)->rxdata_8);
410}
411
412static void mpc512x_psc_cw_disable_ints(struct uart_port *port)
413{
414 port->read_status_mask =
415 in_be32(&FIFO_512x(port)->tximr) << 16 |
416 in_be32(&FIFO_512x(port)->rximr);
417 out_be32(&FIFO_512x(port)->tximr, 0);
418 out_be32(&FIFO_512x(port)->rximr, 0);
419}
420
421static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
422{
423 out_be32(&FIFO_512x(port)->tximr,
424 (port->read_status_mask >> 16) & 0x7f);
425 out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
426}
427
428static unsigned long mpc512x_getuartclk(void *p)
429{
430 return mpc512x_find_ips_freq(p);
431}
432
433static struct psc_ops mpc512x_psc_ops = {
434 .fifo_init = mpc512x_psc_fifo_init,
435 .raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
436 .raw_tx_rdy = mpc512x_psc_raw_tx_rdy,
437 .rx_rdy = mpc512x_psc_rx_rdy,
438 .tx_rdy = mpc512x_psc_tx_rdy,
439 .tx_empty = mpc512x_psc_tx_empty,
440 .stop_rx = mpc512x_psc_stop_rx,
441 .start_tx = mpc512x_psc_start_tx,
442 .stop_tx = mpc512x_psc_stop_tx,
443 .rx_clr_irq = mpc512x_psc_rx_clr_irq,
444 .tx_clr_irq = mpc512x_psc_tx_clr_irq,
445 .write_char = mpc512x_psc_write_char,
446 .read_char = mpc512x_psc_read_char,
447 .cw_disable_ints = mpc512x_psc_cw_disable_ints,
448 .cw_restore_ints = mpc512x_psc_cw_restore_ints,
449 .getuartclk = mpc512x_getuartclk,
450};
451#endif
452
453static struct psc_ops *psc_ops;
1da177e4
LT
454
455/* ======================================================================== */
456/* UART operations */
457/* ======================================================================== */
458
9b9129e7 459static unsigned int
1da177e4
LT
460mpc52xx_uart_tx_empty(struct uart_port *port)
461{
599f030c 462 return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
1da177e4
LT
463}
464
9b9129e7 465static void
1da177e4
LT
466mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
467{
468 /* Not implemented */
469}
470
9b9129e7 471static unsigned int
1da177e4
LT
472mpc52xx_uart_get_mctrl(struct uart_port *port)
473{
474 /* Not implemented */
475 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
476}
477
9b9129e7 478static void
b129a8cc 479mpc52xx_uart_stop_tx(struct uart_port *port)
1da177e4
LT
480{
481 /* port->lock taken by caller */
599f030c 482 psc_ops->stop_tx(port);
1da177e4
LT
483}
484
9b9129e7 485static void
b129a8cc 486mpc52xx_uart_start_tx(struct uart_port *port)
1da177e4
LT
487{
488 /* port->lock taken by caller */
599f030c 489 psc_ops->start_tx(port);
1da177e4
LT
490}
491
9b9129e7 492static void
1da177e4
LT
493mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
494{
495 unsigned long flags;
496 spin_lock_irqsave(&port->lock, flags);
9b9129e7 497
1da177e4
LT
498 port->x_char = ch;
499 if (ch) {
500 /* Make sure tx interrupts are on */
501 /* Truly necessary ??? They should be anyway */
599f030c 502 psc_ops->start_tx(port);
1da177e4 503 }
9b9129e7 504
1da177e4
LT
505 spin_unlock_irqrestore(&port->lock, flags);
506}
507
508static void
509mpc52xx_uart_stop_rx(struct uart_port *port)
510{
511 /* port->lock taken by caller */
599f030c 512 psc_ops->stop_rx(port);
1da177e4
LT
513}
514
515static void
516mpc52xx_uart_enable_ms(struct uart_port *port)
517{
518 /* Not implemented */
519}
520
521static void
522mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
523{
524 unsigned long flags;
525 spin_lock_irqsave(&port->lock, flags);
526
406b7d4f
JR
527 if (ctl == -1)
528 out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
1da177e4 529 else
406b7d4f 530 out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
9b9129e7 531
1da177e4
LT
532 spin_unlock_irqrestore(&port->lock, flags);
533}
534
535static int
536mpc52xx_uart_startup(struct uart_port *port)
537{
538 struct mpc52xx_psc __iomem *psc = PSC(port);
539 int ret;
540
541 /* Request IRQ */
542 ret = request_irq(port->irq, mpc52xx_uart_int,
25ae3a07
JR
543 IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED,
544 "mpc52xx_psc_uart", port);
1da177e4
LT
545 if (ret)
546 return ret;
547
548 /* Reset/activate the port, clear and enable interrupts */
406b7d4f
JR
549 out_8(&psc->command, MPC52xx_PSC_RST_RX);
550 out_8(&psc->command, MPC52xx_PSC_RST_TX);
9b9129e7 551
406b7d4f 552 out_be32(&psc->sicr, 0); /* UART mode DCD ignored */
1da177e4 553
599f030c 554 psc_ops->fifo_init(port);
9b9129e7 555
406b7d4f
JR
556 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
557 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
9b9129e7 558
1da177e4
LT
559 return 0;
560}
561
562static void
563mpc52xx_uart_shutdown(struct uart_port *port)
564{
565 struct mpc52xx_psc __iomem *psc = PSC(port);
9b9129e7 566
a3481197 567 /* Shut down the port. Leave TX active if on a console port */
406b7d4f 568 out_8(&psc->command, MPC52xx_PSC_RST_RX);
a3481197 569 if (!uart_console(port))
406b7d4f 570 out_8(&psc->command, MPC52xx_PSC_RST_TX);
9b9129e7
GL
571
572 port->read_status_mask = 0;
406b7d4f 573 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
1da177e4
LT
574
575 /* Release interrupt */
576 free_irq(port->irq, port);
577}
578
9b9129e7 579static void
606d099c 580mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
406b7d4f 581 struct ktermios *old)
1da177e4
LT
582{
583 struct mpc52xx_psc __iomem *psc = PSC(port);
584 unsigned long flags;
585 unsigned char mr1, mr2;
586 unsigned short ctr;
587 unsigned int j, baud, quot;
9b9129e7 588
1da177e4
LT
589 /* Prepare what we're gonna write */
590 mr1 = 0;
9b9129e7 591
1da177e4 592 switch (new->c_cflag & CSIZE) {
406b7d4f
JR
593 case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
594 break;
595 case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
596 break;
597 case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
598 break;
599 case CS8:
600 default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
1da177e4
LT
601 }
602
603 if (new->c_cflag & PARENB) {
604 mr1 |= (new->c_cflag & PARODD) ?
605 MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
606 } else
607 mr1 |= MPC52xx_PSC_MODE_PARNONE;
9b9129e7
GL
608
609
1da177e4
LT
610 mr2 = 0;
611
612 if (new->c_cflag & CSTOPB)
613 mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
614 else
615 mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
616 MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
617 MPC52xx_PSC_MODE_ONE_STOP;
618
619
620 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
621 quot = uart_get_divisor(port, baud);
622 ctr = quot & 0xffff;
9b9129e7 623
1da177e4
LT
624 /* Get the lock */
625 spin_lock_irqsave(&port->lock, flags);
626
627 /* Update the per-port timeout */
628 uart_update_timeout(port, new->c_cflag, baud);
629
630 /* Do our best to flush TX & RX, so we don't loose anything */
631 /* But we don't wait indefinitly ! */
632 j = 5000000; /* Maximum wait */
633 /* FIXME Can't receive chars since set_termios might be called at early
634 * boot for the console, all stuff is not yet ready to receive at that
635 * time and that just makes the kernel oops */
636 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
599f030c 637 while (!mpc52xx_uart_tx_empty(port) && --j)
1da177e4
LT
638 udelay(1);
639
640 if (!j)
406b7d4f 641 printk(KERN_ERR "mpc52xx_uart.c: "
1da177e4 642 "Unable to flush RX & TX fifos in-time in set_termios."
406b7d4f 643 "Some chars may have been lost.\n");
1da177e4
LT
644
645 /* Reset the TX & RX */
406b7d4f
JR
646 out_8(&psc->command, MPC52xx_PSC_RST_RX);
647 out_8(&psc->command, MPC52xx_PSC_RST_TX);
1da177e4
LT
648
649 /* Send new mode settings */
406b7d4f
JR
650 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
651 out_8(&psc->mode, mr1);
652 out_8(&psc->mode, mr2);
653 out_8(&psc->ctur, ctr >> 8);
654 out_8(&psc->ctlr, ctr & 0xff);
9b9129e7 655
1da177e4 656 /* Reenable TX & RX */
406b7d4f
JR
657 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
658 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
1da177e4
LT
659
660 /* We're all set, release the lock */
661 spin_unlock_irqrestore(&port->lock, flags);
662}
663
664static const char *
665mpc52xx_uart_type(struct uart_port *port)
666{
667 return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
668}
669
670static void
671mpc52xx_uart_release_port(struct uart_port *port)
672{
406b7d4f
JR
673 /* remapped by us ? */
674 if (port->flags & UPF_IOREMAP) {
1da177e4
LT
675 iounmap(port->membase);
676 port->membase = NULL;
677 }
678
b9272dfd 679 release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
1da177e4
LT
680}
681
682static int
683mpc52xx_uart_request_port(struct uart_port *port)
684{
be618f55
AL
685 int err;
686
1da177e4 687 if (port->flags & UPF_IOREMAP) /* Need to remap ? */
b9272dfd 688 port->membase = ioremap(port->mapbase,
406b7d4f 689 sizeof(struct mpc52xx_psc));
1da177e4
LT
690
691 if (!port->membase)
692 return -EINVAL;
693
b9272dfd 694 err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
1da177e4 695 "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
be618f55
AL
696
697 if (err && (port->flags & UPF_IOREMAP)) {
698 iounmap(port->membase);
699 port->membase = NULL;
700 }
701
702 return err;
1da177e4
LT
703}
704
705static void
706mpc52xx_uart_config_port(struct uart_port *port, int flags)
707{
406b7d4f
JR
708 if ((flags & UART_CONFIG_TYPE)
709 && (mpc52xx_uart_request_port(port) == 0))
710 port->type = PORT_MPC52xx;
1da177e4
LT
711}
712
713static int
714mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
715{
406b7d4f 716 if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx)
1da177e4
LT
717 return -EINVAL;
718
406b7d4f
JR
719 if ((ser->irq != port->irq) ||
720 (ser->io_type != SERIAL_IO_MEM) ||
721 (ser->baud_base != port->uartclk) ||
722 (ser->iomem_base != (void *)port->mapbase) ||
723 (ser->hub6 != 0))
1da177e4
LT
724 return -EINVAL;
725
726 return 0;
727}
728
729
730static struct uart_ops mpc52xx_uart_ops = {
731 .tx_empty = mpc52xx_uart_tx_empty,
732 .set_mctrl = mpc52xx_uart_set_mctrl,
733 .get_mctrl = mpc52xx_uart_get_mctrl,
734 .stop_tx = mpc52xx_uart_stop_tx,
735 .start_tx = mpc52xx_uart_start_tx,
736 .send_xchar = mpc52xx_uart_send_xchar,
737 .stop_rx = mpc52xx_uart_stop_rx,
738 .enable_ms = mpc52xx_uart_enable_ms,
739 .break_ctl = mpc52xx_uart_break_ctl,
740 .startup = mpc52xx_uart_startup,
741 .shutdown = mpc52xx_uart_shutdown,
742 .set_termios = mpc52xx_uart_set_termios,
743/* .pm = mpc52xx_uart_pm, Not supported yet */
744/* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
745 .type = mpc52xx_uart_type,
746 .release_port = mpc52xx_uart_release_port,
747 .request_port = mpc52xx_uart_request_port,
748 .config_port = mpc52xx_uart_config_port,
749 .verify_port = mpc52xx_uart_verify_port
750};
751
9b9129e7 752
1da177e4
LT
753/* ======================================================================== */
754/* Interrupt handling */
755/* ======================================================================== */
9b9129e7 756
1da177e4 757static inline int
7d12e780 758mpc52xx_uart_int_rx_chars(struct uart_port *port)
1da177e4
LT
759{
760 struct tty_struct *tty = port->info->tty;
33f0f88f 761 unsigned char ch, flag;
1da177e4
LT
762 unsigned short status;
763
764 /* While we can read, do so ! */
599f030c 765 while (psc_ops->raw_rx_rdy(port)) {
1da177e4 766 /* Get the char */
599f030c 767 ch = psc_ops->read_char(port);
1da177e4
LT
768
769 /* Handle sysreq char */
770#ifdef SUPPORT_SYSRQ
7d12e780 771 if (uart_handle_sysrq_char(port, ch)) {
1da177e4
LT
772 port->sysrq = 0;
773 continue;
774 }
775#endif
776
777 /* Store it */
33f0f88f
AC
778
779 flag = TTY_NORMAL;
1da177e4 780 port->icount.rx++;
9b9129e7 781
599f030c
JR
782 status = in_be16(&PSC(port)->mpc52xx_psc_status);
783
406b7d4f
JR
784 if (status & (MPC52xx_PSC_SR_PE |
785 MPC52xx_PSC_SR_FE |
786 MPC52xx_PSC_SR_RB)) {
9b9129e7 787
1da177e4 788 if (status & MPC52xx_PSC_SR_RB) {
33f0f88f 789 flag = TTY_BREAK;
1da177e4
LT
790 uart_handle_break(port);
791 } else if (status & MPC52xx_PSC_SR_PE)
33f0f88f 792 flag = TTY_PARITY;
1da177e4 793 else if (status & MPC52xx_PSC_SR_FE)
33f0f88f 794 flag = TTY_FRAME;
1da177e4
LT
795
796 /* Clear error condition */
406b7d4f 797 out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
1da177e4
LT
798
799 }
33f0f88f
AC
800 tty_insert_flip_char(tty, ch, flag);
801 if (status & MPC52xx_PSC_SR_OE) {
802 /*
803 * Overrun is special, since it's
804 * reported immediately, and doesn't
805 * affect the current character
806 */
807 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
808 }
1da177e4
LT
809 }
810
811 tty_flip_buffer_push(tty);
9b9129e7 812
599f030c 813 return psc_ops->raw_rx_rdy(port);
1da177e4
LT
814}
815
816static inline int
817mpc52xx_uart_int_tx_chars(struct uart_port *port)
818{
819 struct circ_buf *xmit = &port->info->xmit;
820
821 /* Process out of band chars */
822 if (port->x_char) {
599f030c 823 psc_ops->write_char(port, port->x_char);
1da177e4
LT
824 port->icount.tx++;
825 port->x_char = 0;
826 return 1;
827 }
828
829 /* Nothing to do ? */
830 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
b129a8cc 831 mpc52xx_uart_stop_tx(port);
1da177e4
LT
832 return 0;
833 }
834
835 /* Send chars */
599f030c
JR
836 while (psc_ops->raw_tx_rdy(port)) {
837 psc_ops->write_char(port, xmit->buf[xmit->tail]);
1da177e4
LT
838 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
839 port->icount.tx++;
840 if (uart_circ_empty(xmit))
841 break;
842 }
843
844 /* Wake up */
845 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
846 uart_write_wakeup(port);
847
848 /* Maybe we're done after all */
849 if (uart_circ_empty(xmit)) {
b129a8cc 850 mpc52xx_uart_stop_tx(port);
1da177e4
LT
851 return 0;
852 }
853
854 return 1;
855}
856
9b9129e7 857static irqreturn_t
7d12e780 858mpc52xx_uart_int(int irq, void *dev_id)
1da177e4 859{
c7bec5ab 860 struct uart_port *port = dev_id;
1da177e4
LT
861 unsigned long pass = ISR_PASS_LIMIT;
862 unsigned int keepgoing;
9b9129e7 863
1da177e4 864 spin_lock(&port->lock);
9b9129e7 865
1da177e4
LT
866 /* While we have stuff to do, we continue */
867 do {
868 /* If we don't find anything to do, we stop */
9b9129e7
GL
869 keepgoing = 0;
870
599f030c
JR
871 psc_ops->rx_clr_irq(port);
872 if (psc_ops->rx_rdy(port))
7d12e780 873 keepgoing |= mpc52xx_uart_int_rx_chars(port);
1da177e4 874
599f030c
JR
875 psc_ops->tx_clr_irq(port);
876 if (psc_ops->tx_rdy(port))
1da177e4 877 keepgoing |= mpc52xx_uart_int_tx_chars(port);
9b9129e7 878
1da177e4 879 /* Limit number of iteration */
406b7d4f 880 if (!(--pass))
1da177e4
LT
881 keepgoing = 0;
882
883 } while (keepgoing);
9b9129e7 884
1da177e4 885 spin_unlock(&port->lock);
9b9129e7 886
1da177e4
LT
887 return IRQ_HANDLED;
888}
889
890
891/* ======================================================================== */
892/* Console ( if applicable ) */
893/* ======================================================================== */
894
895#ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
896
897static void __init
898mpc52xx_console_get_options(struct uart_port *port,
406b7d4f 899 int *baud, int *parity, int *bits, int *flow)
1da177e4
LT
900{
901 struct mpc52xx_psc __iomem *psc = PSC(port);
902 unsigned char mr1;
903
b9272dfd
GL
904 pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
905
1da177e4 906 /* Read the mode registers */
406b7d4f 907 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
1da177e4 908 mr1 = in_8(&psc->mode);
9b9129e7 909
1da177e4 910 /* CT{U,L}R are write-only ! */
b9272dfd
GL
911 *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
912#if !defined(CONFIG_PPC_MERGE)
913 if (__res.bi_baudrate)
914 *baud = __res.bi_baudrate;
915#endif
1da177e4
LT
916
917 /* Parse them */
918 switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
406b7d4f
JR
919 case MPC52xx_PSC_MODE_5_BITS:
920 *bits = 5;
921 break;
922 case MPC52xx_PSC_MODE_6_BITS:
923 *bits = 6;
924 break;
925 case MPC52xx_PSC_MODE_7_BITS:
926 *bits = 7;
927 break;
928 case MPC52xx_PSC_MODE_8_BITS:
929 default:
930 *bits = 8;
1da177e4 931 }
9b9129e7 932
1da177e4
LT
933 if (mr1 & MPC52xx_PSC_MODE_PARNONE)
934 *parity = 'n';
935 else
936 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
937}
938
9b9129e7 939static void
1da177e4
LT
940mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
941{
942 struct uart_port *port = &mpc52xx_uart_ports[co->index];
1da177e4 943 unsigned int i, j;
9b9129e7 944
1da177e4 945 /* Disable interrupts */
599f030c 946 psc_ops->cw_disable_ints(port);
1da177e4
LT
947
948 /* Wait the TX buffer to be empty */
9b9129e7 949 j = 5000000; /* Maximum wait */
599f030c 950 while (!mpc52xx_uart_tx_empty(port) && --j)
1da177e4
LT
951 udelay(1);
952
953 /* Write all the chars */
d358788f 954 for (i = 0; i < count; i++, s++) {
1da177e4 955 /* Line return handling */
d358788f 956 if (*s == '\n')
599f030c 957 psc_ops->write_char(port, '\r');
9b9129e7 958
d358788f 959 /* Send the char */
599f030c 960 psc_ops->write_char(port, *s);
d358788f 961
1da177e4 962 /* Wait the TX buffer to be empty */
9b9129e7 963 j = 20000; /* Maximum wait */
599f030c 964 while (!mpc52xx_uart_tx_empty(port) && --j)
1da177e4
LT
965 udelay(1);
966 }
967
968 /* Restore interrupt state */
599f030c 969 psc_ops->cw_restore_ints(port);
1da177e4
LT
970}
971
b9272dfd 972#if !defined(CONFIG_PPC_MERGE)
1da177e4
LT
973static int __init
974mpc52xx_console_setup(struct console *co, char *options)
975{
976 struct uart_port *port = &mpc52xx_uart_ports[co->index];
977
978 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
979 int bits = 8;
980 int parity = 'n';
981 int flow = 'n';
982
983 if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
984 return -EINVAL;
9b9129e7 985
1da177e4
LT
986 /* Basic port init. Needed since we use some uart_??? func before
987 * real init for early access */
988 spin_lock_init(&port->lock);
989 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
990 port->ops = &mpc52xx_uart_ops;
991 port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
992
993 /* We ioremap ourself */
994 port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
995 if (port->membase == NULL)
996 return -EINVAL;
997
998 /* Setup the port parameters accoding to options */
999 if (options)
1000 uart_parse_options(options, &baud, &parity, &bits, &flow);
1001 else
1002 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
1003
1004 return uart_set_options(port, co, baud, parity, bits, flow);
1005}
1006
b9272dfd
GL
1007#else
1008
1009static int __init
1010mpc52xx_console_setup(struct console *co, char *options)
1011{
1012 struct uart_port *port = &mpc52xx_uart_ports[co->index];
1013 struct device_node *np = mpc52xx_uart_nodes[co->index];
599f030c 1014 unsigned int uartclk;
b9272dfd
GL
1015 struct resource res;
1016 int ret;
1017
1018 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
1019 int bits = 8;
1020 int parity = 'n';
1021 int flow = 'n';
1022
1023 pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
1024 co, co->index, options);
1025
1026 if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
1027 pr_debug("PSC%x out of range\n", co->index);
1028 return -EINVAL;
1029 }
1030
1031 if (!np) {
1032 pr_debug("PSC%x not found in device tree\n", co->index);
1033 return -EINVAL;
1034 }
1035
1036 pr_debug("Console on ttyPSC%x is %s\n",
406b7d4f 1037 co->index, mpc52xx_uart_nodes[co->index]->full_name);
b9272dfd
GL
1038
1039 /* Fetch register locations */
406b7d4f
JR
1040 ret = of_address_to_resource(np, 0, &res);
1041 if (ret) {
b9272dfd
GL
1042 pr_debug("Could not get resources for PSC%x\n", co->index);
1043 return ret;
1044 }
1045
599f030c
JR
1046 uartclk = psc_ops->getuartclk(np);
1047 if (uartclk == 0) {
1048 pr_debug("Could not find uart clock frequency!\n");
b9272dfd
GL
1049 return -EINVAL;
1050 }
1051
1052 /* Basic port init. Needed since we use some uart_??? func before
1053 * real init for early access */
1054 spin_lock_init(&port->lock);
599f030c 1055 port->uartclk = uartclk;
b9272dfd
GL
1056 port->ops = &mpc52xx_uart_ops;
1057 port->mapbase = res.start;
1058 port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
1059 port->irq = irq_of_parse_and_map(np, 0);
1060
1061 if (port->membase == NULL)
1062 return -EINVAL;
1063
5dd80d5d 1064 pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
406b7d4f
JR
1065 (void *)port->mapbase, port->membase,
1066 port->irq, port->uartclk);
b9272dfd
GL
1067
1068 /* Setup the port parameters accoding to options */
1069 if (options)
1070 uart_parse_options(options, &baud, &parity, &bits, &flow);
1071 else
1072 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
1073
1074 pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
406b7d4f 1075 baud, bits, parity, flow);
b9272dfd
GL
1076
1077 return uart_set_options(port, co, baud, parity, bits, flow);
1078}
1079#endif /* defined(CONFIG_PPC_MERGE) */
1080
1da177e4 1081
2d8179c0 1082static struct uart_driver mpc52xx_uart_driver;
1da177e4
LT
1083
1084static struct console mpc52xx_console = {
d62de3aa 1085 .name = "ttyPSC",
1da177e4
LT
1086 .write = mpc52xx_console_write,
1087 .device = uart_console_device,
1088 .setup = mpc52xx_console_setup,
1089 .flags = CON_PRINTBUFFER,
406b7d4f 1090 .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */
1da177e4
LT
1091 .data = &mpc52xx_uart_driver,
1092};
1093
9b9129e7
GL
1094
1095static int __init
1da177e4
LT
1096mpc52xx_console_init(void)
1097{
c98750c2 1098#if defined(CONFIG_PPC_MERGE)
b9272dfd 1099 mpc52xx_uart_of_enumerate();
c98750c2 1100#endif
1da177e4
LT
1101 register_console(&mpc52xx_console);
1102 return 0;
1103}
1104
1105console_initcall(mpc52xx_console_init);
1106
1107#define MPC52xx_PSC_CONSOLE &mpc52xx_console
1108#else
1109#define MPC52xx_PSC_CONSOLE NULL
1110#endif
1111
1112
1113/* ======================================================================== */
1114/* UART Driver */
1115/* ======================================================================== */
1116
1117static struct uart_driver mpc52xx_uart_driver = {
1da177e4 1118 .driver_name = "mpc52xx_psc_uart",
d62de3aa 1119 .dev_name = "ttyPSC",
d62de3aa
SM
1120 .major = SERIAL_PSC_MAJOR,
1121 .minor = SERIAL_PSC_MINOR,
1da177e4
LT
1122 .nr = MPC52xx_PSC_MAXNUM,
1123 .cons = MPC52xx_PSC_CONSOLE,
1124};
1125
1126
b9272dfd 1127#if !defined(CONFIG_PPC_MERGE)
1da177e4
LT
1128/* ======================================================================== */
1129/* Platform Driver */
1130/* ======================================================================== */
1131
1132static int __devinit
3ae5eaec 1133mpc52xx_uart_probe(struct platform_device *dev)
1da177e4 1134{
3ae5eaec 1135 struct resource *res = dev->resource;
1da177e4
LT
1136
1137 struct uart_port *port = NULL;
1138 int i, idx, ret;
1139
1140 /* Check validity & presence */
38801e2e 1141 idx = dev->id;
1da177e4
LT
1142 if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
1143 return -EINVAL;
1144
406b7d4f 1145 if (!mpc52xx_match_psc_function(idx, "uart"))
1da177e4
LT
1146 return -ENODEV;
1147
1148 /* Init the port structure */
1149 port = &mpc52xx_uart_ports[idx];
1150
1da177e4
LT
1151 spin_lock_init(&port->lock);
1152 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
947deee8 1153 port->fifosize = 512;
1da177e4
LT
1154 port->iotype = UPIO_MEM;
1155 port->flags = UPF_BOOT_AUTOCONF |
406b7d4f 1156 (uart_console(port) ? 0 : UPF_IOREMAP);
1da177e4
LT
1157 port->line = idx;
1158 port->ops = &mpc52xx_uart_ops;
b9272dfd 1159 port->dev = &dev->dev;
1da177e4
LT
1160
1161 /* Search for IRQ and mapbase */
406b7d4f 1162 for (i = 0 ; i < dev->num_resources ; i++, res++) {
1da177e4
LT
1163 if (res->flags & IORESOURCE_MEM)
1164 port->mapbase = res->start;
1165 else if (res->flags & IORESOURCE_IRQ)
1166 port->irq = res->start;
1167 }
1168 if (!port->irq || !port->mapbase)
1169 return -EINVAL;
1170
1171 /* Add the port to the uart sub-system */
1172 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
1173 if (!ret)
406b7d4f 1174 platform_set_drvdata(dev, (void *)port);
1da177e4
LT
1175
1176 return ret;
1177}
1178
1179static int
3ae5eaec 1180mpc52xx_uart_remove(struct platform_device *dev)
1da177e4 1181{
3ae5eaec 1182 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1da177e4 1183
3ae5eaec 1184 platform_set_drvdata(dev, NULL);
1da177e4
LT
1185
1186 if (port)
1187 uart_remove_one_port(&mpc52xx_uart_driver, port);
1188
1189 return 0;
1190}
1191
1192#ifdef CONFIG_PM
1193static int
3ae5eaec 1194mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 1195{
3ae5eaec 1196 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1da177e4 1197
9b9129e7 1198 if (port)
1da177e4
LT
1199 uart_suspend_port(&mpc52xx_uart_driver, port);
1200
1201 return 0;
1202}
1203
1204static int
3ae5eaec 1205mpc52xx_uart_resume(struct platform_device *dev)
1da177e4 1206{
3ae5eaec 1207 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1da177e4 1208
9480e307 1209 if (port)
1da177e4
LT
1210 uart_resume_port(&mpc52xx_uart_driver, port);
1211
1212 return 0;
1213}
1214#endif
1215
b9272dfd 1216
3ae5eaec 1217static struct platform_driver mpc52xx_uart_platform_driver = {
1da177e4
LT
1218 .probe = mpc52xx_uart_probe,
1219 .remove = mpc52xx_uart_remove,
1220#ifdef CONFIG_PM
1221 .suspend = mpc52xx_uart_suspend,
1222 .resume = mpc52xx_uart_resume,
1223#endif
3ae5eaec 1224 .driver = {
406b7d4f 1225 .owner = THIS_MODULE,
3ae5eaec
RK
1226 .name = "mpc52xx-psc",
1227 },
1da177e4 1228};
b9272dfd
GL
1229#endif /* !defined(CONFIG_PPC_MERGE) */
1230
1231
1232#if defined(CONFIG_PPC_MERGE)
1233/* ======================================================================== */
1234/* OF Platform Driver */
1235/* ======================================================================== */
1236
1237static int __devinit
1238mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
1239{
1240 int idx = -1;
599f030c 1241 unsigned int uartclk;
b9272dfd
GL
1242 struct uart_port *port = NULL;
1243 struct resource res;
1244 int ret;
1245
1246 dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
1247
1248 /* Check validity & presence */
1249 for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
1250 if (mpc52xx_uart_nodes[idx] == op->node)
1251 break;
1252 if (idx >= MPC52xx_PSC_MAXNUM)
1253 return -EINVAL;
1254 pr_debug("Found %s assigned to ttyPSC%x\n",
406b7d4f 1255 mpc52xx_uart_nodes[idx]->full_name, idx);
b9272dfd 1256
599f030c
JR
1257 uartclk = psc_ops->getuartclk(op->node);
1258 if (uartclk == 0) {
1259 dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
b9272dfd
GL
1260 return -EINVAL;
1261 }
1262
1263 /* Init the port structure */
1264 port = &mpc52xx_uart_ports[idx];
1265
1266 spin_lock_init(&port->lock);
599f030c 1267 port->uartclk = uartclk;
b9272dfd
GL
1268 port->fifosize = 512;
1269 port->iotype = UPIO_MEM;
1270 port->flags = UPF_BOOT_AUTOCONF |
406b7d4f 1271 (uart_console(port) ? 0 : UPF_IOREMAP);
b9272dfd
GL
1272 port->line = idx;
1273 port->ops = &mpc52xx_uart_ops;
1274 port->dev = &op->dev;
1275
1276 /* Search for IRQ and mapbase */
406b7d4f
JR
1277 ret = of_address_to_resource(op->node, 0, &res);
1278 if (ret)
b9272dfd
GL
1279 return ret;
1280
1281 port->mapbase = res.start;
1282 port->irq = irq_of_parse_and_map(op->node, 0);
1283
5dd80d5d 1284 dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
406b7d4f 1285 (void *)port->mapbase, port->irq, port->uartclk);
b9272dfd 1286
406b7d4f 1287 if ((port->irq == NO_IRQ) || !port->mapbase) {
b9272dfd
GL
1288 printk(KERN_ERR "Could not allocate resources for PSC\n");
1289 return -EINVAL;
1290 }
1291
1292 /* Add the port to the uart sub-system */
1293 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
1294 if (!ret)
406b7d4f 1295 dev_set_drvdata(&op->dev, (void *)port);
b9272dfd
GL
1296
1297 return ret;
1298}
1299
1300static int
1301mpc52xx_uart_of_remove(struct of_device *op)
1302{
1303 struct uart_port *port = dev_get_drvdata(&op->dev);
1304 dev_set_drvdata(&op->dev, NULL);
1305
fc7900bb 1306 if (port) {
b9272dfd 1307 uart_remove_one_port(&mpc52xx_uart_driver, port);
fc7900bb
SM
1308 irq_dispose_mapping(port->irq);
1309 }
b9272dfd
GL
1310
1311 return 0;
1312}
1313
1314#ifdef CONFIG_PM
1315static int
1316mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
1317{
1318 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1319
1320 if (port)
1321 uart_suspend_port(&mpc52xx_uart_driver, port);
1322
1323 return 0;
1324}
1325
1326static int
1327mpc52xx_uart_of_resume(struct of_device *op)
1328{
1329 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1330
1331 if (port)
1332 uart_resume_port(&mpc52xx_uart_driver, port);
1333
1334 return 0;
1335}
1336#endif
1337
1338static void
1339mpc52xx_uart_of_assign(struct device_node *np, int idx)
1340{
1341 int free_idx = -1;
1342 int i;
1343
1344 /* Find the first free node */
1345 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1346 if (mpc52xx_uart_nodes[i] == NULL) {
1347 free_idx = i;
1348 break;
1349 }
1350 }
1351
1352 if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
1353 idx = free_idx;
1354
1355 if (idx < 0)
1356 return; /* No free slot; abort */
1357
406b7d4f 1358 of_node_get(np);
b9272dfd
GL
1359 /* If the slot is already occupied, then swap slots */
1360 if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
1361 mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
af6a9aab 1362 mpc52xx_uart_nodes[idx] = np;
b9272dfd
GL
1363}
1364
1365static void
1366mpc52xx_uart_of_enumerate(void)
1367{
406b7d4f 1368 static int enum_done;
b9272dfd
GL
1369 struct device_node *np;
1370 const unsigned int *devno;
25ae3a07 1371 const struct of_device_id *match;
b9272dfd
GL
1372 int i;
1373
1374 if (enum_done)
1375 return;
1376
1377 for_each_node_by_type(np, "serial") {
25ae3a07
JR
1378 match = of_match_node(mpc52xx_uart_of_match, np);
1379 if (!match)
b9272dfd
GL
1380 continue;
1381
25ae3a07
JR
1382 psc_ops = match->data;
1383
b9272dfd 1384 /* Is a particular device number requested? */
40cd3a45 1385 devno = of_get_property(np, "port-number", NULL);
406b7d4f 1386 mpc52xx_uart_of_assign(np, devno ? *devno : -1);
b9272dfd
GL
1387 }
1388
1389 enum_done = 1;
1390
1391 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1392 if (mpc52xx_uart_nodes[i])
1393 pr_debug("%s assigned to ttyPSC%x\n",
406b7d4f 1394 mpc52xx_uart_nodes[i]->full_name, i);
b9272dfd
GL
1395 }
1396}
1397
1398MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
1399
1400static struct of_platform_driver mpc52xx_uart_of_driver = {
b9272dfd
GL
1401 .match_table = mpc52xx_uart_of_match,
1402 .probe = mpc52xx_uart_of_probe,
1403 .remove = mpc52xx_uart_of_remove,
1404#ifdef CONFIG_PM
1405 .suspend = mpc52xx_uart_of_suspend,
1406 .resume = mpc52xx_uart_of_resume,
1407#endif
1408 .driver = {
1409 .name = "mpc52xx-psc-uart",
1410 },
1411};
1412#endif /* defined(CONFIG_PPC_MERGE) */
1da177e4
LT
1413
1414
1415/* ======================================================================== */
1416/* Module */
1417/* ======================================================================== */
1418
1419static int __init
1420mpc52xx_uart_init(void)
1421{
1422 int ret;
1423
b9272dfd 1424 printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
1da177e4 1425
406b7d4f
JR
1426 ret = uart_register_driver(&mpc52xx_uart_driver);
1427 if (ret) {
b9272dfd
GL
1428 printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
1429 __FILE__, ret);
1430 return ret;
1da177e4
LT
1431 }
1432
b9272dfd
GL
1433#if defined(CONFIG_PPC_MERGE)
1434 mpc52xx_uart_of_enumerate();
1435
1436 ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
1437 if (ret) {
1438 printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
1439 __FILE__, ret);
1440 uart_unregister_driver(&mpc52xx_uart_driver);
1441 return ret;
1442 }
1443#else
25ae3a07 1444 psc_ops = &mpc52xx_psc_ops;
b9272dfd
GL
1445 ret = platform_driver_register(&mpc52xx_uart_platform_driver);
1446 if (ret) {
1447 printk(KERN_ERR "%s: platform_driver_register failed (%i)\n",
1448 __FILE__, ret);
1449 uart_unregister_driver(&mpc52xx_uart_driver);
1450 return ret;
1451 }
1452#endif
1453
1454 return 0;
1da177e4
LT
1455}
1456
1457static void __exit
1458mpc52xx_uart_exit(void)
1459{
b9272dfd
GL
1460#if defined(CONFIG_PPC_MERGE)
1461 of_unregister_platform_driver(&mpc52xx_uart_of_driver);
1462#else
3ae5eaec 1463 platform_driver_unregister(&mpc52xx_uart_platform_driver);
b9272dfd 1464#endif
1da177e4
LT
1465 uart_unregister_driver(&mpc52xx_uart_driver);
1466}
1467
1468
1469module_init(mpc52xx_uart_init);
1470module_exit(mpc52xx_uart_exit);
1471
1472MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
1473MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
1474MODULE_LICENSE("GPL");
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