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sh: NR_IRQS consolidation.
[deliverable/linux.git] / drivers / serial / sh-sci.c
CommitLineData
1da177e4
LT		 1/*
2 * drivers/serial/sh-sci.c
3 *
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
5 *
e108b2ca 6 * Copyright (C) 2002 - 2006 Paul Mundt
1da177e4
LT		 7 *
8 * based off of the old drivers/char/sh-sci.c by:
9 *
10 * Copyright (C) 1999, 2000 Niibe Yutaka
11 * Copyright (C) 2000 Sugioka Toshinobu
12 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
13 * Modified to support SecureEdge. David McCullough (2002)
14 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
15 *
16 * This file is subject to the terms and conditions of the GNU General Public
17 * License. See the file "COPYING" in the main directory of this archive
18 * for more details.
19 */
0b3d4ef6
PM		 20#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
21#define SUPPORT_SYSRQ
22#endif
1da177e4
LT		 23
24#undef DEBUG
25
1da177e4
LT		 26#include <linux/module.h>
27#include <linux/errno.h>
1da177e4
LT		 28#include <linux/timer.h>
29#include <linux/interrupt.h>
30#include <linux/tty.h>
31#include <linux/tty_flip.h>
32#include <linux/serial.h>
33#include <linux/major.h>
34#include <linux/string.h>
35#include <linux/sysrq.h>
1da177e4
LT		 36#include <linux/ioport.h>
37#include <linux/mm.h>
1da177e4
LT		 38#include <linux/init.h>
39#include <linux/delay.h>
40#include <linux/console.h>
e108b2ca 41#include <linux/platform_device.h>
1da177e4
LT		 42
43#ifdef CONFIG_CPU_FREQ
44#include <linux/notifier.h>
45#include <linux/cpufreq.h>
46#endif
47
b7a76e4b 48#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
fa5da2f7 49#include <linux/ctype.h>
b7a76e4b 50#include <asm/clock.h>
1da177e4 51#include <asm/sh_bios.h>
e108b2ca 52#include <asm/kgdb.h>
1da177e4
LT		 53#endif
54
e108b2ca 55#include <asm/sci.h>
1da177e4
LT		 56#include "sh-sci.h"
57
e108b2ca
PM		 58struct sci_port {
59 struct uart_port port;
60
61 /* Port type */
62 unsigned int type;
63
64 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
65 unsigned int irqs[SCIx_NR_IRQS];
66
67 /* Port pin configuration */
68 void (*init_pins)(struct uart_port *port,
69 unsigned int cflag);
1da177e4 70
e108b2ca
PM		 71 /* Port enable callback */
72 void (*enable)(struct uart_port *port);
73
74 /* Port disable callback */
75 void (*disable)(struct uart_port *port);
76
77 /* Break timer */
78 struct timer_list break_timer;
79 int break_flag;
80};
81
82#ifdef CONFIG_SH_KGDB
1da177e4 83static struct sci_port *kgdb_sci_port;
e108b2ca 84#endif
1da177e4
LT		 85
86#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
e108b2ca
PM		 87static struct sci_port *serial_console_port;
88#endif
1da177e4
LT		 89
90/* Function prototypes */
b129a8cc 91static void sci_stop_tx(struct uart_port *port);
1da177e4 92
e108b2ca 93#define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
b7a76e4b 94
e108b2ca
PM		 95static struct sci_port sci_ports[SCI_NPORTS];
96static struct uart_driver sci_uart_driver;
1da177e4 97
e108b2ca
PM		 98#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
99 defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
100static inline void handle_error(struct uart_port *port)
101{
102 /* Clear error flags */
1da177e4
LT		 103 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
104}
105
106static int get_char(struct uart_port *port)
107{
108 unsigned long flags;
109 unsigned short status;
110 int c;
111
e108b2ca
PM		 112 spin_lock_irqsave(&port->lock, flags);
113 do {
1da177e4
LT		 114 status = sci_in(port, SCxSR);
115 if (status & SCxSR_ERRORS(port)) {
116 handle_error(port);
117 continue;
118 }
119 } while (!(status & SCxSR_RDxF(port)));
120 c = sci_in(port, SCxRDR);
121 sci_in(port, SCxSR); /* Dummy read */
122 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
e108b2ca 123 spin_unlock_irqrestore(&port->lock, flags);
1da177e4
LT		 124
125 return c;
126}
1da177e4
LT		 127#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
128
e108b2ca 129#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
1da177e4
LT		 130static void put_char(struct uart_port *port, char c)
131{
132 unsigned long flags;
133 unsigned short status;
134
e108b2ca 135 spin_lock_irqsave(&port->lock, flags);
1da177e4
LT		 136
137 do {
138 status = sci_in(port, SCxSR);
139 } while (!(status & SCxSR_TDxE(port)));
140
141 sci_out(port, SCxTDR, c);
142 sci_in(port, SCxSR); /* Dummy read */
143 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
144
e108b2ca 145 spin_unlock_irqrestore(&port->lock, flags);
1da177e4 146}
e108b2ca 147#endif
1da177e4 148
e108b2ca 149#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1da177e4
LT		 150static void put_string(struct sci_port *sci_port, const char *buffer, int count)
151{
152 struct uart_port *port = &sci_port->port;
153 const unsigned char *p = buffer;
154 int i;
155
156#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
157 int checksum;
158 int usegdb=0;
159
160#ifdef CONFIG_SH_STANDARD_BIOS
b7a76e4b 161 /* This call only does a trap the first time it is
1da177e4
LT		 162 * called, and so is safe to do here unconditionally
163 */
164 usegdb |= sh_bios_in_gdb_mode();
165#endif
166#ifdef CONFIG_SH_KGDB
fa5da2f7 167 usegdb |= (kgdb_in_gdb_mode && (sci_port == kgdb_sci_port));
1da177e4
LT		 168#endif
169
170 if (usegdb) {
171 /* $<packet info>#<checksum>. */
172 do {
173 unsigned char c;
174 put_char(port, '$');
175 put_char(port, 'O'); /* 'O'utput to console */
176 checksum = 'O';
177
178 for (i=0; i<count; i++) { /* Don't use run length encoding */
179 int h, l;
180
181 c = *p++;
182 h = highhex(c);
183 l = lowhex(c);
184 put_char(port, h);
185 put_char(port, l);
186 checksum += h + l;
187 }
188 put_char(port, '#');
189 put_char(port, highhex(checksum));
190 put_char(port, lowhex(checksum));
191 } while (get_char(port) != '+');
192 } else
193#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
194 for (i=0; i<count; i++) {
195 if (*p == 10)
196 put_char(port, '\r');
197 put_char(port, *p++);
198 }
199}
200#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
201
1da177e4 202#ifdef CONFIG_SH_KGDB
1da177e4
LT		 203static int kgdb_sci_getchar(void)
204{
e108b2ca 205 int c;
1da177e4
LT		 206
207 /* Keep trying to read a character, this could be neater */
fa5da2f7 208 while ((c = get_char(&kgdb_sci_port->port)) < 0)
e108b2ca 209 cpu_relax();
1da177e4
LT		 210
211 return c;
212}
213
e108b2ca 214static inline void kgdb_sci_putchar(int c)
1da177e4 215{
fa5da2f7 216 put_char(&kgdb_sci_port->port, c);
1da177e4 217}
1da177e4
LT		 218#endif /* CONFIG_SH_KGDB */
219
220#if defined(__H8300S__)
221enum { sci_disable, sci_enable };
222
e108b2ca 223static void h8300_sci_config(struct uart_port* port, unsigned int ctrl)
1da177e4
LT		 224{
225 volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL;
226 int ch = (port->mapbase - SMR0) >> 3;
227 unsigned char mask = 1 << (ch+1);
228
229 if (ctrl == sci_disable) {
230 *mstpcrl |= mask;
231 } else {
232 *mstpcrl &= ~mask;
233 }
234}
e108b2ca
PM		 235
236static inline void h8300_sci_enable(struct uart_port *port)
237{
238 h8300_sci_config(port, sci_enable);
239}
240
241static inline void h8300_sci_disable(struct uart_port *port)
242{
243 h8300_sci_config(port, sci_disable);
244}
1da177e4
LT		 245#endif
246
e108b2ca
PM		 247#if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \
248 defined(__H8300H__) || defined(__H8300S__)
1da177e4
LT		 249static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag)
250{
251 int ch = (port->mapbase - SMR0) >> 3;
252
253 /* set DDR regs */
e108b2ca
PM		 254 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
255 h8300_sci_pins[ch].rx,
256 H8300_GPIO_INPUT);
257 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
258 h8300_sci_pins[ch].tx,
259 H8300_GPIO_OUTPUT);
260
1da177e4
LT		 261 /* tx mark output*/
262 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
263}
e108b2ca
PM		 264#else
265#define sci_init_pins_sci NULL
266#endif
267
268#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
269static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
270{
271 unsigned int fcr_val = 0;
272
273 if (cflag & CRTSCTS)
274 fcr_val |= SCFCR_MCE;
275
276 sci_out(port, SCFCR, fcr_val);
277}
278#else
279#define sci_init_pins_irda NULL
1da177e4 280#endif
e108b2ca
PM		 281
282#ifdef SCI_ONLY
283#define sci_init_pins_scif NULL
1da177e4
LT		 284#endif
285
286#if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
e108b2ca 287#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
b7a76e4b
PM		 288/* SH7300 doesn't use RTS/CTS */
289static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
290{
291 sci_out(port, SCFCR, 0);
292}
293#elif defined(CONFIG_CPU_SH3)
e108b2ca 294/* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
1da177e4
LT		 295static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
296{
297 unsigned int fcr_val = 0;
b7a76e4b
PM		 298 unsigned short data;
299
300 /* We need to set SCPCR to enable RTS/CTS */
301 data = ctrl_inw(SCPCR);
302 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
303 ctrl_outw(data & 0x0fcf, SCPCR);
1da177e4 304
1da177e4
LT		 305 if (cflag & CRTSCTS)
306 fcr_val |= SCFCR_MCE;
307 else {
1da177e4
LT		 308 /* We need to set SCPCR to enable RTS/CTS */
309 data = ctrl_inw(SCPCR);
310 /* Clear out SCP7MD1,0, SCP4MD1,0,
311 Set SCP6MD1,0 = {01} (output) */
b7a76e4b 312 ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR);
1da177e4
LT		 313
314 data = ctrl_inb(SCPDR);
315 /* Set /RTS2 (bit6) = 0 */
b7a76e4b 316 ctrl_outb(data & 0xbf, SCPDR);
1da177e4 317 }
b7a76e4b 318
1da177e4
LT		 319 sci_out(port, SCFCR, fcr_val);
320}
41504c39
PM		 321#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
322static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
323{
324 unsigned int fcr_val = 0;
325
326 if (cflag & CRTSCTS) {
327 fcr_val |= SCFCR_MCE;
328
329 ctrl_outw(0x0000, PORT_PSCR);
330 } else {
331 unsigned short data;
332
333 data = ctrl_inw(PORT_PSCR);
334 data &= 0x033f;
335 data |= 0x0400;
336 ctrl_outw(data, PORT_PSCR);
337
338 ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0);
339 }
340
341 sci_out(port, SCFCR, fcr_val);
342}
1da177e4 343#else
1da177e4
LT		 344/* For SH7750 */
345static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
346{
347 unsigned int fcr_val = 0;
348
349 if (cflag & CRTSCTS) {
350 fcr_val |= SCFCR_MCE;
351 } else {
e108b2ca
PM		 352#ifdef CONFIG_CPU_SUBTYPE_SH7343
353 /* Nothing */
354#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
b7a76e4b
PM		 355 ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
356#else
1da177e4 357 ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
b7a76e4b 358#endif
1da177e4
LT		 359 }
360 sci_out(port, SCFCR, fcr_val);
361}
e108b2ca
PM		 362#endif
363
364#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
365static inline int scif_txroom(struct uart_port *port)
366{
367 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f);
368}
369
370static inline int scif_rxroom(struct uart_port *port)
371{
372 return sci_in(port, SCRFDR) & 0x7f;
373}
374#else
375static inline int scif_txroom(struct uart_port *port)
376{
377 return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
378}
1da177e4 379
e108b2ca
PM		 380static inline int scif_rxroom(struct uart_port *port)
381{
382 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
383}
1da177e4
LT		 384#endif
385#endif /* SCIF_ONLY || SCI_AND_SCIF */
386
e108b2ca
PM		 387static inline int sci_txroom(struct uart_port *port)
388{
389 return ((sci_in(port, SCxSR) & SCI_TDRE) != 0);
390}
391
392static inline int sci_rxroom(struct uart_port *port)
393{
394 return ((sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0);
395}
396
1da177e4
LT		 397/* ********************************************************************** *
398 * the interrupt related routines *
399 * ********************************************************************** */
400
401static void sci_transmit_chars(struct uart_port *port)
402{
403 struct circ_buf *xmit = &port->info->xmit;
404 unsigned int stopped = uart_tx_stopped(port);
1da177e4
LT		 405 unsigned short status;
406 unsigned short ctrl;
e108b2ca 407 int count;
1da177e4
LT		 408
409 status = sci_in(port, SCxSR);
410 if (!(status & SCxSR_TDxE(port))) {
1da177e4
LT		 411 ctrl = sci_in(port, SCSCR);
412 if (uart_circ_empty(xmit)) {
413 ctrl &= ~SCI_CTRL_FLAGS_TIE;
414 } else {
415 ctrl |= SCI_CTRL_FLAGS_TIE;
416 }
417 sci_out(port, SCSCR, ctrl);
1da177e4
LT		 418 return;
419 }
420
e108b2ca
PM		 421#ifndef SCI_ONLY
422 if (port->type == PORT_SCIF)
423 count = scif_txroom(port);
424 else
1da177e4 425#endif
e108b2ca 426 count = sci_txroom(port);
1da177e4
LT		 427
428 do {
429 unsigned char c;
430
431 if (port->x_char) {
432 c = port->x_char;
433 port->x_char = 0;
434 } else if (!uart_circ_empty(xmit) && !stopped) {
435 c = xmit->buf[xmit->tail];
436 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
437 } else {
438 break;
439 }
440
441 sci_out(port, SCxTDR, c);
442
443 port->icount.tx++;
444 } while (--count > 0);
445
446 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
447
448 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
449 uart_write_wakeup(port);
450 if (uart_circ_empty(xmit)) {
b129a8cc 451 sci_stop_tx(port);
1da177e4 452 } else {
1da177e4
LT		 453 ctrl = sci_in(port, SCSCR);
454
455#if !defined(SCI_ONLY)
456 if (port->type == PORT_SCIF) {
457 sci_in(port, SCxSR); /* Dummy read */
458 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
459 }
460#endif
461
462 ctrl |= SCI_CTRL_FLAGS_TIE;
463 sci_out(port, SCSCR, ctrl);
1da177e4
LT		 464 }
465}
466
467/* On SH3, SCIF may read end-of-break as a space->mark char */
468#define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); })
469
7d12e780 470static inline void sci_receive_chars(struct uart_port *port)
1da177e4 471{
e108b2ca 472 struct sci_port *sci_port = (struct sci_port *)port;
1da177e4
LT		 473 struct tty_struct *tty = port->info->tty;
474 int i, count, copied = 0;
475 unsigned short status;
33f0f88f 476 unsigned char flag;
1da177e4
LT		 477
478 status = sci_in(port, SCxSR);
479 if (!(status & SCxSR_RDxF(port)))
480 return;
481
482 while (1) {
483#if !defined(SCI_ONLY)
e108b2ca
PM		 484 if (port->type == PORT_SCIF)
485 count = scif_rxroom(port);
486 else
1da177e4 487#endif
e108b2ca 488 count = sci_rxroom(port);
1da177e4
LT		 489
490 /* Don't copy more bytes than there is room for in the buffer */
33f0f88f 491 count = tty_buffer_request_room(tty, count);
1da177e4
LT		 492
493 /* If for any reason we can't copy more data, we're done! */
494 if (count == 0)
495 break;
496
497 if (port->type == PORT_SCI) {
498 char c = sci_in(port, SCxRDR);
7d12e780 499 if (uart_handle_sysrq_char(port, c) || sci_port->break_flag)
1da177e4 500 count = 0;
e108b2ca
PM		 501 else {
502 tty_insert_flip_char(tty, c, TTY_NORMAL);
1da177e4
LT		 503 }
504 } else {
505 for (i=0; i<count; i++) {
506 char c = sci_in(port, SCxRDR);
507 status = sci_in(port, SCxSR);
508#if defined(CONFIG_CPU_SH3)
509 /* Skip "chars" during break */
e108b2ca 510 if (sci_port->break_flag) {
1da177e4
LT		 511 if ((c == 0) &&
512 (status & SCxSR_FER(port))) {
513 count--; i--;
514 continue;
515 }
e108b2ca 516
1da177e4
LT		 517 /* Nonzero => end-of-break */
518 pr_debug("scif: debounce<%02x>\n", c);
e108b2ca
PM		 519 sci_port->break_flag = 0;
520
1da177e4
LT		 521 if (STEPFN(c)) {
522 count--; i--;
523 continue;
524 }
525 }
526#endif /* CONFIG_CPU_SH3 */
7d12e780 527 if (uart_handle_sysrq_char(port, c)) {
1da177e4
LT		 528 count--; i--;
529 continue;
530 }
531
532 /* Store data and status */
1da177e4 533 if (status&SCxSR_FER(port)) {
33f0f88f 534 flag = TTY_FRAME;
1da177e4
LT		 535 pr_debug("sci: frame error\n");
536 } else if (status&SCxSR_PER(port)) {
33f0f88f 537 flag = TTY_PARITY;
1da177e4 538 pr_debug("sci: parity error\n");
33f0f88f
AC		 539 } else
540 flag = TTY_NORMAL;
541 tty_insert_flip_char(tty, c, flag);
1da177e4
LT		 542 }
543 }
544
545 sci_in(port, SCxSR); /* dummy read */
546 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
547
1da177e4
LT		 548 copied += count;
549 port->icount.rx += count;
550 }
551
552 if (copied) {
553 /* Tell the rest of the system the news. New characters! */
554 tty_flip_buffer_push(tty);
555 } else {
556 sci_in(port, SCxSR); /* dummy read */
557 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
558 }
559}
560
561#define SCI_BREAK_JIFFIES (HZ/20)
562/* The sci generates interrupts during the break,
563 * 1 per millisecond or so during the break period, for 9600 baud.
564 * So dont bother disabling interrupts.
565 * But dont want more than 1 break event.
566 * Use a kernel timer to periodically poll the rx line until
567 * the break is finished.
568 */
569static void sci_schedule_break_timer(struct sci_port *port)
570{
571 port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
572 add_timer(&port->break_timer);
573}
574/* Ensure that two consecutive samples find the break over. */
575static void sci_break_timer(unsigned long data)
576{
e108b2ca
PM		 577 struct sci_port *port = (struct sci_port *)data;
578
579 if (sci_rxd_in(&port->port) == 0) {
1da177e4 580 port->break_flag = 1;
e108b2ca
PM		 581 sci_schedule_break_timer(port);
582 } else if (port->break_flag == 1) {
1da177e4
LT		 583 /* break is over. */
584 port->break_flag = 2;
e108b2ca
PM		 585 sci_schedule_break_timer(port);
586 } else
587 port->break_flag = 0;
1da177e4
LT		 588}
589
590static inline int sci_handle_errors(struct uart_port *port)
591{
592 int copied = 0;
593 unsigned short status = sci_in(port, SCxSR);
594 struct tty_struct *tty = port->info->tty;
595
e108b2ca 596 if (status & SCxSR_ORER(port)) {
1da177e4 597 /* overrun error */
e108b2ca 598 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
33f0f88f 599 copied++;
1da177e4
LT		 600 pr_debug("sci: overrun error\n");
601 }
602
e108b2ca 603 if (status & SCxSR_FER(port)) {
1da177e4
LT		 604 if (sci_rxd_in(port) == 0) {
605 /* Notify of BREAK */
e108b2ca
PM		 606 struct sci_port *sci_port = (struct sci_port *)port;
607
608 if (!sci_port->break_flag) {
609 sci_port->break_flag = 1;
610 sci_schedule_break_timer(sci_port);
611
1da177e4 612 /* Do sysrq handling. */
e108b2ca 613 if (uart_handle_break(port))
1da177e4 614 return 0;
1da177e4 615 pr_debug("sci: BREAK detected\n");
e108b2ca 616 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
33f0f88f 617 copied++;
1da177e4 618 }
e108b2ca 619 } else {
1da177e4 620 /* frame error */
e108b2ca 621 if (tty_insert_flip_char(tty, 0, TTY_FRAME))
33f0f88f 622 copied++;
1da177e4
LT		 623 pr_debug("sci: frame error\n");
624 }
625 }
626
e108b2ca 627 if (status & SCxSR_PER(port)) {
1da177e4 628 /* parity error */
e108b2ca
PM		 629 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
630 copied++;
1da177e4
LT		 631 pr_debug("sci: parity error\n");
632 }
633
33f0f88f 634 if (copied)
1da177e4 635 tty_flip_buffer_push(tty);
1da177e4
LT		 636
637 return copied;
638}
639
640static inline int sci_handle_breaks(struct uart_port *port)
641{
642 int copied = 0;
643 unsigned short status = sci_in(port, SCxSR);
644 struct tty_struct *tty = port->info->tty;
645 struct sci_port *s = &sci_ports[port->line];
646
0b3d4ef6
PM		 647 if (uart_handle_break(port))
648 return 0;
649
b7a76e4b 650 if (!s->break_flag && status & SCxSR_BRK(port)) {
1da177e4
LT		 651#if defined(CONFIG_CPU_SH3)
652 /* Debounce break */
653 s->break_flag = 1;
654#endif
655 /* Notify of BREAK */
e108b2ca 656 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
33f0f88f 657 copied++;
1da177e4
LT		 658 pr_debug("sci: BREAK detected\n");
659 }
660
661#if defined(SCIF_ORER)
662 /* XXX: Handle SCIF overrun error */
663 if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) {
664 sci_out(port, SCLSR, 0);
e108b2ca 665 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) {
1da177e4 666 copied++;
1da177e4
LT		 667 pr_debug("sci: overrun error\n");
668 }
669 }
670#endif
671
33f0f88f 672 if (copied)
1da177e4 673 tty_flip_buffer_push(tty);
e108b2ca 674
1da177e4
LT		 675 return copied;
676}
677
7d12e780 678static irqreturn_t sci_rx_interrupt(int irq, void *port)
1da177e4 679{
1da177e4
LT		 680 /* I think sci_receive_chars has to be called irrespective
681 * of whether the I_IXOFF is set, otherwise, how is the interrupt
682 * to be disabled?
683 */
7d12e780 684 sci_receive_chars(port);
1da177e4
LT		 685
686 return IRQ_HANDLED;
687}
688
7d12e780 689static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
1da177e4
LT		 690{
691 struct uart_port *port = ptr;
692
e108b2ca 693 spin_lock_irq(&port->lock);
1da177e4 694 sci_transmit_chars(port);
e108b2ca 695 spin_unlock_irq(&port->lock);
1da177e4
LT		 696
697 return IRQ_HANDLED;
698}
699
7d12e780 700static irqreturn_t sci_er_interrupt(int irq, void *ptr)
1da177e4
LT		 701{
702 struct uart_port *port = ptr;
703
704 /* Handle errors */
705 if (port->type == PORT_SCI) {
706 if (sci_handle_errors(port)) {
707 /* discard character in rx buffer */
708 sci_in(port, SCxSR);
709 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
710 }
711 } else {
712#if defined(SCIF_ORER)
713 if((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
714 struct tty_struct *tty = port->info->tty;
715
716 sci_out(port, SCLSR, 0);
33f0f88f
AC		 717 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
718 tty_flip_buffer_push(tty);
719 pr_debug("scif: overrun error\n");
1da177e4
LT		 720 }
721#endif
7d12e780 722 sci_rx_interrupt(irq, ptr);
1da177e4
LT		 723 }
724
725 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
726
727 /* Kick the transmission */
7d12e780 728 sci_tx_interrupt(irq, ptr);
1da177e4
LT		 729
730 return IRQ_HANDLED;
731}
732
7d12e780 733static irqreturn_t sci_br_interrupt(int irq, void *ptr)
1da177e4
LT		 734{
735 struct uart_port *port = ptr;
736
737 /* Handle BREAKs */
738 sci_handle_breaks(port);
e108b2ca
PM		 739
740#ifdef CONFIG_SH_KGDB
741 /* Break into the debugger if a break is detected */
fa5da2f7 742 breakpoint();
e108b2ca
PM		 743#endif
744
1da177e4
LT		 745 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
746
747 return IRQ_HANDLED;
748}
749
7d12e780 750static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
1da177e4
LT		 751{
752 unsigned short ssr_status, scr_status;
753 struct uart_port *port = ptr;
754
755 ssr_status = sci_in(port,SCxSR);
756 scr_status = sci_in(port,SCSCR);
757
758 /* Tx Interrupt */
e108b2ca 759 if ((ssr_status & 0x0020) && (scr_status & 0x0080))
7d12e780 760 sci_tx_interrupt(irq, ptr);
1da177e4 761 /* Rx Interrupt */
e108b2ca 762 if ((ssr_status & 0x0002) && (scr_status & 0x0040))
7d12e780 763 sci_rx_interrupt(irq, ptr);
1da177e4 764 /* Error Interrupt */
e108b2ca 765 if ((ssr_status & 0x0080) && (scr_status & 0x0400))
7d12e780 766 sci_er_interrupt(irq, ptr);
1da177e4 767 /* Break Interrupt */
e108b2ca 768 if ((ssr_status & 0x0010) && (scr_status & 0x0200))
7d12e780 769 sci_br_interrupt(irq, ptr);
1da177e4
LT		 770
771 return IRQ_HANDLED;
772}
773
774#ifdef CONFIG_CPU_FREQ
775/*
776 * Here we define a transistion notifier so that we can update all of our
777 * ports' baud rate when the peripheral clock changes.
778 */
e108b2ca
PM		 779static int sci_notifier(struct notifier_block *self,
780 unsigned long phase, void *p)
1da177e4
LT		 781{
782 struct cpufreq_freqs *freqs = p;
783 int i;
784
785 if ((phase == CPUFREQ_POSTCHANGE) ||
786 (phase == CPUFREQ_RESUMECHANGE)){
787 for (i = 0; i < SCI_NPORTS; i++) {
788 struct uart_port *port = &sci_ports[i].port;
b7a76e4b 789 struct clk *clk;
1da177e4
LT		 790
791 /*
792 * Update the uartclk per-port if frequency has
793 * changed, since it will no longer necessarily be
794 * consistent with the old frequency.
795 *
796 * Really we want to be able to do something like
797 * uart_change_speed() or something along those lines
798 * here to implicitly reset the per-port baud rate..
799 *
800 * Clean this up later..
801 */
1d118562 802 clk = clk_get(NULL, "module_clk");
b7a76e4b
PM		 803 port->uartclk = clk_get_rate(clk) * 16;
804 clk_put(clk);
1da177e4
LT		 805 }
806
e108b2ca
PM		 807 printk(KERN_INFO "%s: got a postchange notification "
808 "for cpu %d (old %d, new %d)\n",
809 __FUNCTION__, freqs->cpu, freqs->old, freqs->new);
1da177e4
LT		 810 }
811
812 return NOTIFY_OK;
813}
814
815static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 };
816#endif /* CONFIG_CPU_FREQ */
817
818static int sci_request_irq(struct sci_port *port)
819{
820 int i;
7d12e780 821 irqreturn_t (*handlers[4])(int irq, void *ptr) = {
1da177e4
LT		 822 sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
823 sci_br_interrupt,
824 };
825 const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
826 "SCI Transmit Data Empty", "SCI Break" };
827
828 if (port->irqs[0] == port->irqs[1]) {
829 if (!port->irqs[0]) {
830 printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n");
831 return -ENODEV;
832 }
e108b2ca
PM		 833
834 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
35f3c518 835 IRQF_DISABLED, "sci", port)) {
1da177e4
LT		 836 printk(KERN_ERR "sci: Cannot allocate irq.\n");
837 return -ENODEV;
838 }
839 } else {
840 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
841 if (!port->irqs[i])
842 continue;
e108b2ca 843 if (request_irq(port->irqs[i], handlers[i],
35f3c518 844 IRQF_DISABLED, desc[i], port)) {
1da177e4
LT		 845 printk(KERN_ERR "sci: Cannot allocate irq.\n");
846 return -ENODEV;
847 }
848 }
849 }
850
851 return 0;
852}
853
854static void sci_free_irq(struct sci_port *port)
855{
856 int i;
857
858 if (port->irqs[0] == port->irqs[1]) {
859 if (!port->irqs[0])
860 printk("sci: sci_free_irq error\n");
861 else
862 free_irq(port->irqs[0], port);
863 } else {
864 for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
865 if (!port->irqs[i])
866 continue;
867
868 free_irq(port->irqs[i], port);
869 }
870 }
871}
872
873static unsigned int sci_tx_empty(struct uart_port *port)
874{
875 /* Can't detect */
876 return TIOCSER_TEMT;
877}
878
879static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
880{
881 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
882 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
883 /* If you have signals for DTR and DCD, please implement here. */
884}
885
886static unsigned int sci_get_mctrl(struct uart_port *port)
887{
888 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
889 and CTS/RTS */
890
891 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
892}
893
b129a8cc 894static void sci_start_tx(struct uart_port *port)
1da177e4 895{
e108b2ca 896 unsigned short ctrl;
1da177e4 897
e108b2ca
PM		 898 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
899 ctrl = sci_in(port, SCSCR);
900 ctrl |= SCI_CTRL_FLAGS_TIE;
901 sci_out(port, SCSCR, ctrl);
1da177e4
LT		 902}
903
b129a8cc 904static void sci_stop_tx(struct uart_port *port)
1da177e4 905{
1da177e4
LT		 906 unsigned short ctrl;
907
908 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
1da177e4
LT		 909 ctrl = sci_in(port, SCSCR);
910 ctrl &= ~SCI_CTRL_FLAGS_TIE;
911 sci_out(port, SCSCR, ctrl);
1da177e4
LT		 912}
913
914static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
915{
1da177e4
LT		 916 unsigned short ctrl;
917
918 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
1da177e4
LT		 919 ctrl = sci_in(port, SCSCR);
920 ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
921 sci_out(port, SCSCR, ctrl);
1da177e4
LT		 922}
923
924static void sci_stop_rx(struct uart_port *port)
925{
1da177e4
LT		 926 unsigned short ctrl;
927
928 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
1da177e4
LT		 929 ctrl = sci_in(port, SCSCR);
930 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
931 sci_out(port, SCSCR, ctrl);
1da177e4
LT		 932}
933
934static void sci_enable_ms(struct uart_port *port)
935{
936 /* Nothing here yet .. */
937}
938
939static void sci_break_ctl(struct uart_port *port, int break_state)
940{
941 /* Nothing here yet .. */
942}
943
944static int sci_startup(struct uart_port *port)
945{
946 struct sci_port *s = &sci_ports[port->line];
947
e108b2ca
PM		 948 if (s->enable)
949 s->enable(port);
1da177e4
LT		 950
951 sci_request_irq(s);
d656901b 952 sci_start_tx(port);
1da177e4
LT		 953 sci_start_rx(port, 1);
954
955 return 0;
956}
957
958static void sci_shutdown(struct uart_port *port)
959{
960 struct sci_port *s = &sci_ports[port->line];
961
962 sci_stop_rx(port);
b129a8cc 963 sci_stop_tx(port);
1da177e4
LT		 964 sci_free_irq(s);
965
e108b2ca
PM		 966 if (s->disable)
967 s->disable(port);
1da177e4
LT		 968}
969
606d099c
AC		 970static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
971 struct ktermios *old)
1da177e4
LT		 972{
973 struct sci_port *s = &sci_ports[port->line];
974 unsigned int status, baud, smr_val;
1da177e4
LT		 975 int t;
976
977 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
978
e108b2ca
PM		 979 switch (baud) {
980 case 0:
981 t = -1;
982 break;
983 default:
984 {
985#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
1d118562 986 struct clk *clk = clk_get(NULL, "module_clk");
e108b2ca
PM		 987 t = SCBRR_VALUE(baud, clk_get_rate(clk));
988 clk_put(clk);
989#else
990 t = SCBRR_VALUE(baud);
991#endif
e108b2ca 992 break;
fa5da2f7 993 }
e108b2ca
PM		 994 }
995
1da177e4
LT		 996 do {
997 status = sci_in(port, SCxSR);
998 } while (!(status & SCxSR_TEND(port)));
999
1000 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
1001
1002#if !defined(SCI_ONLY)
e108b2ca 1003 if (port->type == PORT_SCIF)
1da177e4 1004 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
1da177e4
LT		 1005#endif
1006
1007 smr_val = sci_in(port, SCSMR) & 3;
1008 if ((termios->c_cflag & CSIZE) == CS7)
1009 smr_val |= 0x40;
1010 if (termios->c_cflag & PARENB)
1011 smr_val |= 0x20;
1012 if (termios->c_cflag & PARODD)
1013 smr_val |= 0x30;
1014 if (termios->c_cflag & CSTOPB)
1015 smr_val |= 0x08;
1016
1017 uart_update_timeout(port, termios->c_cflag, baud);
1018
1019 sci_out(port, SCSMR, smr_val);
1020
1da177e4
LT		 1021 if (t > 0) {
1022 if(t >= 256) {
1023 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
1024 t >>= 2;
1025 } else {
1026 sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
1027 }
1028 sci_out(port, SCBRR, t);
1029 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
1030 }
1031
b7a76e4b
PM		 1032 if (likely(s->init_pins))
1033 s->init_pins(port, termios->c_cflag);
1034
1da177e4
LT		 1035 sci_out(port, SCSCR, SCSCR_INIT(port));
1036
1037 if ((termios->c_cflag & CREAD) != 0)
1038 sci_start_rx(port,0);
1da177e4
LT		 1039}
1040
1041static const char *sci_type(struct uart_port *port)
1042{
1043 switch (port->type) {
1044 case PORT_SCI: return "sci";
1045 case PORT_SCIF: return "scif";
1046 case PORT_IRDA: return "irda";
1047 }
1048
1049 return 0;
1050}
1051
1052static void sci_release_port(struct uart_port *port)
1053{
1054 /* Nothing here yet .. */
1055}
1056
1057static int sci_request_port(struct uart_port *port)
1058{
1059 /* Nothing here yet .. */
1060 return 0;
1061}
1062
1063static void sci_config_port(struct uart_port *port, int flags)
1064{
1065 struct sci_port *s = &sci_ports[port->line];
1066
1067 port->type = s->type;
1068
e108b2ca
PM		 1069 switch (port->type) {
1070 case PORT_SCI:
1071 s->init_pins = sci_init_pins_sci;
1072 break;
1073 case PORT_SCIF:
1074 s->init_pins = sci_init_pins_scif;
1075 break;
1076 case PORT_IRDA:
1077 s->init_pins = sci_init_pins_irda;
1078 break;
1079 }
1080
1da177e4
LT		 1081#if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
1082 if (port->mapbase == 0)
1083 port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF");
1084
e108b2ca 1085 port->membase = (void __iomem *)port->mapbase;
1da177e4
LT		 1086#endif
1087}
1088
1089static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
1090{
1091 struct sci_port *s = &sci_ports[port->line];
1092
1093 if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > NR_IRQS)
1094 return -EINVAL;
1095 if (ser->baud_base < 2400)
1096 /* No paper tape reader for Mitch.. */
1097 return -EINVAL;
1098
1099 return 0;
1100}
1101
1102static struct uart_ops sci_uart_ops = {
1103 .tx_empty = sci_tx_empty,
1104 .set_mctrl = sci_set_mctrl,
1105 .get_mctrl = sci_get_mctrl,
1106 .start_tx = sci_start_tx,
1107 .stop_tx = sci_stop_tx,
1108 .stop_rx = sci_stop_rx,
1109 .enable_ms = sci_enable_ms,
1110 .break_ctl = sci_break_ctl,
1111 .startup = sci_startup,
1112 .shutdown = sci_shutdown,
1113 .set_termios = sci_set_termios,
1114 .type = sci_type,
1115 .release_port = sci_release_port,
1116 .request_port = sci_request_port,
1117 .config_port = sci_config_port,
1118 .verify_port = sci_verify_port,
1119};
1120
e108b2ca
PM		 1121static void __init sci_init_ports(void)
1122{
1123 static int first = 1;
1124 int i;
1125
1126 if (!first)
1127 return;
1128
1129 first = 0;
1130
1131 for (i = 0; i < SCI_NPORTS; i++) {
1132 sci_ports[i].port.ops = &sci_uart_ops;
1133 sci_ports[i].port.iotype = UPIO_MEM;
1134 sci_ports[i].port.line = i;
1135 sci_ports[i].port.fifosize = 1;
1136
1137#if defined(__H8300H__) || defined(__H8300S__)
1138#ifdef __H8300S__
1139 sci_ports[i].enable = h8300_sci_enable;
1140 sci_ports[i].disable = h8300_sci_disable;
1141#endif
1142 sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK;
1143#elif defined(CONFIG_SUPERH64)
1144 sci_ports[i].port.uartclk = current_cpu_data.module_clock * 16;
1da177e4 1145#else
e108b2ca
PM		 1146 /*
1147 * XXX: We should use a proper SCI/SCIF clock
1148 */
1149 {
1d118562 1150 struct clk *clk = clk_get(NULL, "module_clk");
e108b2ca
PM		 1151 sci_ports[i].port.uartclk = clk_get_rate(clk) * 16;
1152 clk_put(clk);
1153 }
1da177e4 1154#endif
e108b2ca
PM		 1155
1156 sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i];
1157 sci_ports[i].break_timer.function = sci_break_timer;
1158
1159 init_timer(&sci_ports[i].break_timer);
1160 }
1161}
1162
1163int __init early_sci_setup(struct uart_port *port)
1164{
1165 if (unlikely(port->line > SCI_NPORTS))
1166 return -ENODEV;
1167
1168 sci_init_ports();
1169
1170 sci_ports[port->line].port.membase = port->membase;
1171 sci_ports[port->line].port.mapbase = port->mapbase;
1172 sci_ports[port->line].port.type = port->type;
1173
1174 return 0;
1175}
1da177e4
LT		 1176
1177#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1178/*
1179 * Print a string to the serial port trying not to disturb
1180 * any possible real use of the port...
1181 */
1182static void serial_console_write(struct console *co, const char *s,
1183 unsigned count)
1184{
1185 put_string(serial_console_port, s, count);
1186}
1187
1188static int __init serial_console_setup(struct console *co, char *options)
1189{
1190 struct uart_port *port;
1191 int baud = 115200;
1192 int bits = 8;
1193 int parity = 'n';
1194 int flow = 'n';
1195 int ret;
1196
e108b2ca
PM		 1197 /*
1198 * Check whether an invalid uart number has been specified, and
1199 * if so, search for the first available port that does have
1200 * console support.
1201 */
1202 if (co->index >= SCI_NPORTS)
1203 co->index = 0;
1204
1da177e4
LT		 1205 serial_console_port = &sci_ports[co->index];
1206 port = &serial_console_port->port;
1da177e4
LT		 1207
1208 /*
e108b2ca
PM		 1209 * Also need to check port->type, we don't actually have any
1210 * UPIO_PORT ports, but uart_report_port() handily misreports
1211 * it anyways if we don't have a port available by the time this is
1212 * called.
1da177e4 1213 */
e108b2ca
PM		 1214 if (!port->type)
1215 return -ENODEV;
1216 if (!port->membase || !port->mapbase)
1217 return -ENODEV;
1218
e108b2ca
PM		 1219 port->type = serial_console_port->type;
1220
1221 if (port->flags & UPF_IOREMAP)
1222 sci_config_port(port, 0);
1223
1224 if (serial_console_port->enable)
1225 serial_console_port->enable(port);
b7a76e4b 1226
1da177e4
LT		 1227 if (options)
1228 uart_parse_options(options, &baud, &parity, &bits, &flow);
1229
1230 ret = uart_set_options(port, co, baud, parity, bits, flow);
1231#if defined(__H8300H__) || defined(__H8300S__)
1232 /* disable rx interrupt */
1233 if (ret == 0)
1234 sci_stop_rx(port);
1235#endif
1236 return ret;
1237}
1238
1239static struct console serial_console = {
1240 .name = "ttySC",
1241 .device = uart_console_device,
1242 .write = serial_console_write,
1243 .setup = serial_console_setup,
fa5da2f7 1244 .flags = CON_PRINTBUFFER,
1da177e4
LT		 1245 .index = -1,
1246 .data = &sci_uart_driver,
1247};
1248
1249static int __init sci_console_init(void)
1250{
e108b2ca 1251 sci_init_ports();
1da177e4
LT		 1252 register_console(&serial_console);
1253 return 0;
1254}
1da177e4
LT		 1255console_initcall(sci_console_init);
1256#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1257
1258#ifdef CONFIG_SH_KGDB
1259/*
1260 * FIXME: Most of this can go away.. at the moment, we rely on
1261 * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
1262 * most of that can easily be done here instead.
1263 *
1264 * For the time being, just accept the values that were parsed earlier..
1265 */
1266static void __init kgdb_console_get_options(struct uart_port *port, int *baud,
1267 int *parity, int *bits)
1268{
1269 *baud = kgdb_baud;
1270 *parity = tolower(kgdb_parity);
1271 *bits = kgdb_bits - '0';
1272}
1273
1274/*
1275 * The naming here is somewhat misleading, since kgdb_console_setup() takes
1276 * care of the early-on initialization for kgdb, regardless of whether we
1277 * actually use kgdb as a console or not.
1278 *
1279 * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
1280 */
1281int __init kgdb_console_setup(struct console *co, char *options)
1282{
1283 struct uart_port *port = &sci_ports[kgdb_portnum].port;
1284 int baud = 38400;
1285 int bits = 8;
1286 int parity = 'n';
1287 int flow = 'n';
1288
b7a76e4b 1289 if (co->index != kgdb_portnum)
1da177e4
LT		 1290 co->index = kgdb_portnum;
1291
fa5da2f7
PM		 1292 kgdb_sci_port = &sci_ports[co->index];
1293 port = &kgdb_sci_port->port;
1294
1295 /*
1296 * Also need to check port->type, we don't actually have any
1297 * UPIO_PORT ports, but uart_report_port() handily misreports
1298 * it anyways if we don't have a port available by the time this is
1299 * called.
1300 */
1301 if (!port->type)
1302 return -ENODEV;
1303 if (!port->membase || !port->mapbase)
1304 return -ENODEV;
1305
1da177e4
LT		 1306 if (options)
1307 uart_parse_options(options, &baud, &parity, &bits, &flow);
1308 else
1309 kgdb_console_get_options(port, &baud, &parity, &bits);
1310
1311 kgdb_getchar = kgdb_sci_getchar;
1312 kgdb_putchar = kgdb_sci_putchar;
1313
1314 return uart_set_options(port, co, baud, parity, bits, flow);
1315}
1316#endif /* CONFIG_SH_KGDB */
1317
1318#ifdef CONFIG_SH_KGDB_CONSOLE
1319static struct console kgdb_console = {
fa5da2f7
PM		 1320 .name = "ttySC",
1321 .device = uart_console_device,
1322 .write = kgdb_console_write,
1323 .setup = kgdb_console_setup,
1324 .flags = CON_PRINTBUFFER,
1325 .index = -1,
1da177e4
LT		 1326 .data = &sci_uart_driver,
1327};
1328
1329/* Register the KGDB console so we get messages (d'oh!) */
1330static int __init kgdb_console_init(void)
1331{
e108b2ca 1332 sci_init_ports();
1da177e4
LT		 1333 register_console(&kgdb_console);
1334 return 0;
1335}
1da177e4
LT		 1336console_initcall(kgdb_console_init);
1337#endif /* CONFIG_SH_KGDB_CONSOLE */
1338
1339#if defined(CONFIG_SH_KGDB_CONSOLE)
1340#define SCI_CONSOLE &kgdb_console
1341#elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1342#define SCI_CONSOLE &serial_console
1343#else
b7a76e4b 1344#define SCI_CONSOLE 0
1da177e4
LT		 1345#endif
1346
1347static char banner[] __initdata =
1348 KERN_INFO "SuperH SCI(F) driver initialized\n";
1349
1350static struct uart_driver sci_uart_driver = {
1351 .owner = THIS_MODULE,
1352 .driver_name = "sci",
1da177e4
LT		 1353 .dev_name = "ttySC",
1354 .major = SCI_MAJOR,
1355 .minor = SCI_MINOR_START,
e108b2ca 1356 .nr = SCI_NPORTS,
1da177e4
LT		 1357 .cons = SCI_CONSOLE,
1358};
1359
e108b2ca
PM		 1360/*
1361 * Register a set of serial devices attached to a platform device. The
1362 * list is terminated with a zero flags entry, which means we expect
1363 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1364 * remapping (such as sh64) should also set UPF_IOREMAP.
1365 */
1366static int __devinit sci_probe(struct platform_device *dev)
1da177e4 1367{
e108b2ca
PM		 1368 struct plat_sci_port *p = dev->dev.platform_data;
1369 int i;
1da177e4 1370
e108b2ca
PM		 1371 for (i = 0; p && p->flags != 0 && i < SCI_NPORTS; p++, i++) {
1372 struct sci_port *sciport = &sci_ports[i];
1da177e4 1373
e108b2ca 1374 sciport->port.mapbase = p->mapbase;
b7a76e4b 1375
e108b2ca
PM		 1376 /*
1377 * For the simple (and majority of) cases where we don't need
1378 * to do any remapping, just cast the cookie directly.
1379 */
1380 if (p->mapbase && !p->membase && !(p->flags & UPF_IOREMAP))
1381 p->membase = (void __iomem *)p->mapbase;
1da177e4 1382
e108b2ca
PM		 1383 sciport->port.membase = p->membase;
1384
1385 sciport->port.irq = p->irqs[SCIx_TXI_IRQ];
1386 sciport->port.flags = p->flags;
1387 sciport->port.dev = &dev->dev;
1388
1389 sciport->type = sciport->port.type = p->type;
1390
1391 memcpy(&sciport->irqs, &p->irqs, sizeof(p->irqs));
1392
1393 uart_add_one_port(&sci_uart_driver, &sciport->port);
1da177e4
LT		 1394 }
1395
fa5da2f7
PM		 1396#if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE)
1397 kgdb_sci_port = &sci_ports[kgdb_portnum];
1398 kgdb_getchar = kgdb_sci_getchar;
1399 kgdb_putchar = kgdb_sci_putchar;
1400#endif
1401
1da177e4
LT		 1402#ifdef CONFIG_CPU_FREQ
1403 cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
e108b2ca 1404 dev_info(&dev->dev, "sci: CPU frequency notifier registered\n");
1da177e4
LT		 1405#endif
1406
1407#ifdef CONFIG_SH_STANDARD_BIOS
1408 sh_bios_gdb_detach();
1409#endif
1410
e108b2ca 1411 return 0;
1da177e4
LT		 1412}
1413
e108b2ca
PM		 1414static int __devexit sci_remove(struct platform_device *dev)
1415{
1416 int i;
1417
1418 for (i = 0; i < SCI_NPORTS; i++)
1419 uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port);
1420
1421 return 0;
1422}
1423
1424static int sci_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 1425{
e108b2ca
PM		 1426 int i;
1427
1428 for (i = 0; i < SCI_NPORTS; i++) {
1429 struct sci_port *p = &sci_ports[i];
1430
1431 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1432 uart_suspend_port(&sci_uart_driver, &p->port);
1433 }
1da177e4 1434
e108b2ca
PM		 1435 return 0;
1436}
1da177e4 1437
e108b2ca
PM		 1438static int sci_resume(struct platform_device *dev)
1439{
1440 int i;
1441
1442 for (i = 0; i < SCI_NPORTS; i++) {
1443 struct sci_port *p = &sci_ports[i];
1444
1445 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1446 uart_resume_port(&sci_uart_driver, &p->port);
1447 }
1448
1449 return 0;
1450}
1451
1452static struct platform_driver sci_driver = {
1453 .probe = sci_probe,
1454 .remove = __devexit_p(sci_remove),
1455 .suspend = sci_suspend,
1456 .resume = sci_resume,
1457 .driver = {
1458 .name = "sh-sci",
1459 .owner = THIS_MODULE,
1460 },
1461};
1462
1463static int __init sci_init(void)
1464{
1465 int ret;
1466
1467 printk(banner);
1468
1469 sci_init_ports();
1470
1471 ret = uart_register_driver(&sci_uart_driver);
1472 if (likely(ret == 0)) {
1473 ret = platform_driver_register(&sci_driver);
1474 if (unlikely(ret))
1475 uart_unregister_driver(&sci_uart_driver);
1476 }
1477
1478 return ret;
1479}
1480
1481static void __exit sci_exit(void)
1482{
1483 platform_driver_unregister(&sci_driver);
1da177e4
LT		 1484 uart_unregister_driver(&sci_uart_driver);
1485}
1486
1487module_init(sci_init);
1488module_exit(sci_exit);
1489
e108b2ca 1490MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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