[deliverable/linux.git] / drivers / sn / ioc4.c

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2005 Silicon Graphics, Inc.  All Rights Reserved.
 */

/* This file contains the master driver module for use by SGI IOC4 subdrivers.
 *
 * It allocates any resources shared between multiple subdevices, and
 * provides accessor functions (where needed) and the like for those
 * resources.  It also provides a mechanism for the subdevice modules
 * to support loading and unloading.
 *
 * Non-shared resources (e.g. external interrupt A_INT_OUT register page
 * alias, serial port and UART registers) are handled by the subdevice
 * modules themselves.
 *
 * This is all necessary because IOC4 is not implemented as a multi-function
 * PCI device, but an amalgamation of disparate registers for several
 * types of device (ATA, serial, external interrupts).  The normal
 * resource management in the kernel doesn't have quite the right interfaces
 * to handle this situation (e.g. multiple modules can't claim the same
 * PCI ID), thus this IOC4 master module.
 */

#include <linux/errno.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/ioc4.h>
#include <linux/mmtimer.h>
#include <linux/rtc.h>
#include <linux/mutex.h>
#include <asm/sn/addrs.h>
#include <asm/sn/clksupport.h>
#include <asm/sn/shub_mmr.h>

/***************
 * Definitions *
 ***************/

/* Tweakable values */

/* PCI bus speed detection/calibration */
#define IOC4_CALIBRATE_COUNT 63	/* Calibration cycle period */
#define IOC4_CALIBRATE_CYCLES 256	/* Average over this many cycles */
#define IOC4_CALIBRATE_DISCARD 2	/* Discard first few cycles */
#define IOC4_CALIBRATE_LOW_MHZ 25	/* Lower bound on bus speed sanity */
#define IOC4_CALIBRATE_HIGH_MHZ 75	/* Upper bound on bus speed sanity */
#define IOC4_CALIBRATE_DEFAULT_MHZ 66	/* Assumed if sanity check fails */

/************************
 * Submodule management *
 ************************/

static DEFINE_MUTEX(ioc4_mutex);

static LIST_HEAD(ioc4_devices);
static LIST_HEAD(ioc4_submodules);

/* Register an IOC4 submodule */
int
ioc4_register_submodule(struct ioc4_submodule *is)
{
	struct ioc4_driver_data *idd;

	mutex_lock(&ioc4_mutex);
	list_add(&is->is_list, &ioc4_submodules);

	/* Initialize submodule for each IOC4 */
	if (!is->is_probe)
		goto out;

	list_for_each_entry(idd, &ioc4_devices, idd_list) {
		if (is->is_probe(idd)) {
			printk(KERN_WARNING
			       "%s: IOC4 submodule %s probe failed "
			       "for pci_dev %s",
			       __FUNCTION__, module_name(is->is_owner),
			       pci_name(idd->idd_pdev));
		}
	}
 out:
	mutex_unlock(&ioc4_mutex);
	return 0;
}

/* Unregister an IOC4 submodule */
void
ioc4_unregister_submodule(struct ioc4_submodule *is)
{
	struct ioc4_driver_data *idd;

	mutex_lock(&ioc4_mutex);
	list_del(&is->is_list);

	/* Remove submodule for each IOC4 */
	if (!is->is_remove)
		goto out;

	list_for_each_entry(idd, &ioc4_devices, idd_list) {
		if (is->is_remove(idd)) {
			printk(KERN_WARNING
			       "%s: IOC4 submodule %s remove failed "
			       "for pci_dev %s.\n",
			       __FUNCTION__, module_name(is->is_owner),
			       pci_name(idd->idd_pdev));
		}
	}
 out:
	mutex_unlock(&ioc4_mutex);
}

/*********************
 * Device management *
 *********************/

#define IOC4_CALIBRATE_LOW_LIMIT \
	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_LOW_MHZ)
#define IOC4_CALIBRATE_HIGH_LIMIT \
	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_HIGH_MHZ)
#define IOC4_CALIBRATE_DEFAULT \
	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_DEFAULT_MHZ)

#define IOC4_CALIBRATE_END \
	(IOC4_CALIBRATE_CYCLES + IOC4_CALIBRATE_DISCARD)

#define IOC4_INT_OUT_MODE_TOGGLE 0x7	/* Toggle INT_OUT every COUNT+1 ticks */

/* Determines external interrupt output clock period of the PCI bus an
 * IOC4 is attached to.  This value can be used to determine the PCI
 * bus speed.
 *
 * IOC4 has a design feature that various internal timers are derived from
 * the PCI bus clock.  This causes IOC4 device drivers to need to take the
 * bus speed into account when setting various register values (e.g. INT_OUT
 * register COUNT field, UART divisors, etc).  Since this information is
 * needed by several subdrivers, it is determined by the main IOC4 driver,
 * even though the following code utilizes external interrupt registers
 * to perform the speed calculation.
 */
static void
ioc4_clock_calibrate(struct ioc4_driver_data *idd)
{
	extern unsigned long sn_rtc_cycles_per_second;
	union ioc4_int_out int_out;
	union ioc4_gpcr gpcr;
	unsigned int state, last_state = 1;
	uint64_t start = 0, end, period;
	unsigned int count = 0;

	/* Enable output */
	gpcr.raw = 0;
	gpcr.fields.dir = IOC4_GPCR_DIR_0;
	gpcr.fields.int_out_en = 1;
	writel(gpcr.raw, &idd->idd_misc_regs->gpcr_s.raw);

	/* Reset to power-on state */
	writel(0, &idd->idd_misc_regs->int_out.raw);
	mmiowb();

	/* Set up square wave */
	int_out.raw = 0;
	int_out.fields.count = IOC4_CALIBRATE_COUNT;
	int_out.fields.mode = IOC4_INT_OUT_MODE_TOGGLE;
	int_out.fields.diag = 0;
	writel(int_out.raw, &idd->idd_misc_regs->int_out.raw);
	mmiowb();

	/* Check square wave period averaged over some number of cycles */
	do {
		int_out.raw = readl(&idd->idd_misc_regs->int_out.raw);
		state = int_out.fields.int_out;
		if (!last_state && state) {
			count++;
			if (count == IOC4_CALIBRATE_END) {
				end = rtc_time();
				break;
			} else if (count == IOC4_CALIBRATE_DISCARD)
				start = rtc_time();
		}
		last_state = state;
	} while (1);

	/* Calculation rearranged to preserve intermediate precision.
	 * Logically:
	 * 1. "end - start" gives us number of RTC cycles over all the
	 *    square wave cycles measured.
	 * 2. Divide by number of square wave cycles to get number of
	 *    RTC cycles per square wave cycle.
	 * 3. Divide by 2*(int_out.fields.count+1), which is the formula
	 *    by which the IOC4 generates the square wave, to get the
	 *    number of RTC cycles per IOC4 INT_OUT count.
	 * 4. Divide by sn_rtc_cycles_per_second to get seconds per
	 *    count.
	 * 5. Multiply by 1E9 to get nanoseconds per count.
	 */
	period = ((end - start) * 1000000000) /
	    (IOC4_CALIBRATE_CYCLES * 2 * (IOC4_CALIBRATE_COUNT + 1)
	     * sn_rtc_cycles_per_second);

	/* Bounds check the result. */
	if (period > IOC4_CALIBRATE_LOW_LIMIT ||
	    period < IOC4_CALIBRATE_HIGH_LIMIT) {
		printk(KERN_INFO
		       "IOC4 %s: Clock calibration failed.  Assuming"
		       "PCI clock is %d ns.\n",
		       pci_name(idd->idd_pdev),
		       IOC4_CALIBRATE_DEFAULT / IOC4_EXTINT_COUNT_DIVISOR);
		period = IOC4_CALIBRATE_DEFAULT;
	} else {
		printk(KERN_DEBUG
		       "IOC4 %s: PCI clock is %ld ns.\n",
		       pci_name(idd->idd_pdev),
		       period / IOC4_EXTINT_COUNT_DIVISOR);
	}

	/* Remember results.  We store the extint clock period rather
	 * than the PCI clock period so that greater precision is
	 * retained.  Divide by IOC4_EXTINT_COUNT_DIVISOR to get
	 * PCI clock period.
	 */
	idd->count_period = period;
}

/* There are three variants of IOC4 cards: IO9, IO10, and PCI-RT.
 * Each brings out different combinations of IOC4 signals, thus.
 * the IOC4 subdrivers need to know to which we're attached.
 *
 * We look for the presence of a SCSI (IO9) or SATA (IO10) controller
 * on the same PCI bus at slot number 3 to differentiate IO9 from IO10.
 * If neither is present, it's a PCI-RT.
 */
static unsigned int
ioc4_variant(struct ioc4_driver_data *idd)
{
	struct pci_dev *pdev = NULL;
	int found = 0;

	/* IO9: Look for a QLogic ISP 12160 at the same bus and slot 3. */
	do {
		pdev = pci_get_device(PCI_VENDOR_ID_QLOGIC,
				      PCI_DEVICE_ID_QLOGIC_ISP12160, pdev);
		if (pdev &&
		    idd->idd_pdev->bus->number == pdev->bus->number &&
		    3 == PCI_SLOT(pdev->devfn))
			found = 1;
		pci_dev_put(pdev);
	} while (pdev && !found);
	if (NULL != pdev)
		return IOC4_VARIANT_IO9;

	/* IO10: Look for a Vitesse VSC 7174 at the same bus and slot 3. */
	pdev = NULL;
	do {
		pdev = pci_get_device(PCI_VENDOR_ID_VITESSE,
				      PCI_DEVICE_ID_VITESSE_VSC7174, pdev);
		if (pdev &&
		    idd->idd_pdev->bus->number == pdev->bus->number &&
		    3 == PCI_SLOT(pdev->devfn))
			found = 1;
		pci_dev_put(pdev);
	} while (pdev && !found);
	if (NULL != pdev)
		return IOC4_VARIANT_IO10;

	/* PCI-RT: No SCSI/SATA controller will be present */
	return IOC4_VARIANT_PCI_RT;
}

/* Adds a new instance of an IOC4 card */
static int
ioc4_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
{
	struct ioc4_driver_data *idd;
	struct ioc4_submodule *is;
	uint32_t pcmd;
	int ret;

	/* Enable IOC4 and take ownership of it */
	if ((ret = pci_enable_device(pdev))) {
		printk(KERN_WARNING
		       "%s: Failed to enable IOC4 device for pci_dev %s.\n",
		       __FUNCTION__, pci_name(pdev));
		goto out;
	}
	pci_set_master(pdev);

	/* Set up per-IOC4 data */
	idd = kmalloc(sizeof(struct ioc4_driver_data), GFP_KERNEL);
	if (!idd) {
		printk(KERN_WARNING
		       "%s: Failed to allocate IOC4 data for pci_dev %s.\n",
		       __FUNCTION__, pci_name(pdev));
		ret = -ENODEV;
		goto out_idd;
	}
	idd->idd_pdev = pdev;
	idd->idd_pci_id = pci_id;

	/* Map IOC4 misc registers.  These are shared between subdevices
	 * so the main IOC4 module manages them.
	 */
	idd->idd_bar0 = pci_resource_start(idd->idd_pdev, 0);
	if (!idd->idd_bar0) {
		printk(KERN_WARNING
		       "%s: Unable to find IOC4 misc resource "
		       "for pci_dev %s.\n",
		       __FUNCTION__, pci_name(idd->idd_pdev));
		ret = -ENODEV;
		goto out_pci;
	}
	if (!request_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs),
			    "ioc4_misc")) {
		printk(KERN_WARNING
		       "%s: Unable to request IOC4 misc region "
		       "for pci_dev %s.\n",
		       __FUNCTION__, pci_name(idd->idd_pdev));
		ret = -ENODEV;
		goto out_pci;
	}
	idd->idd_misc_regs = ioremap(idd->idd_bar0,
				     sizeof(struct ioc4_misc_regs));
	if (!idd->idd_misc_regs) {
		printk(KERN_WARNING
		       "%s: Unable to remap IOC4 misc region "
		       "for pci_dev %s.\n",
		       __FUNCTION__, pci_name(idd->idd_pdev));
		ret = -ENODEV;
		goto out_misc_region;
	}

	/* Failsafe portion of per-IOC4 initialization */

	/* Detect card variant */
	idd->idd_variant = ioc4_variant(idd);
	printk(KERN_INFO "IOC4 %s: %s card detected.\n", pci_name(pdev),
	       idd->idd_variant == IOC4_VARIANT_IO9 ? "IO9" :
	       idd->idd_variant == IOC4_VARIANT_PCI_RT ? "PCI-RT" :
	       idd->idd_variant == IOC4_VARIANT_IO10 ? "IO10" : "unknown");

	/* Initialize IOC4 */
	pci_read_config_dword(idd->idd_pdev, PCI_COMMAND, &pcmd);
	pci_write_config_dword(idd->idd_pdev, PCI_COMMAND,
			       pcmd | PCI_COMMAND_PARITY | PCI_COMMAND_SERR);

	/* Determine PCI clock */
	ioc4_clock_calibrate(idd);

	/* Disable/clear all interrupts.  Need to do this here lest
	 * one submodule request the shared IOC4 IRQ, but interrupt
	 * is generated by a different subdevice.
	 */
	/* Disable */
	writel(~0, &idd->idd_misc_regs->other_iec.raw);
	writel(~0, &idd->idd_misc_regs->sio_iec);
	/* Clear (i.e. acknowledge) */
	writel(~0, &idd->idd_misc_regs->other_ir.raw);
	writel(~0, &idd->idd_misc_regs->sio_ir);

	/* Track PCI-device specific data */
	idd->idd_serial_data = NULL;
	pci_set_drvdata(idd->idd_pdev, idd);

	mutex_lock(&ioc4_mutex);
	list_add_tail(&idd->idd_list, &ioc4_devices);

	/* Add this IOC4 to all submodules */
	list_for_each_entry(is, &ioc4_submodules, is_list) {
		if (is->is_probe && is->is_probe(idd)) {
			printk(KERN_WARNING
			       "%s: IOC4 submodule 0x%s probe failed "
			       "for pci_dev %s.\n",
			       __FUNCTION__, module_name(is->is_owner),
			       pci_name(idd->idd_pdev));
		}
	}
	mutex_unlock(&ioc4_mutex);

	return 0;

out_misc_region:
	release_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
out_pci:
	kfree(idd);
out_idd:
	pci_disable_device(pdev);
out:
	return ret;
}

/* Removes a particular instance of an IOC4 card. */
static void
ioc4_remove(struct pci_dev *pdev)
{
	struct ioc4_submodule *is;
	struct ioc4_driver_data *idd;

	idd = pci_get_drvdata(pdev);

	/* Remove this IOC4 from all submodules */
	mutex_lock(&ioc4_mutex);
	list_for_each_entry(is, &ioc4_submodules, is_list) {
		if (is->is_remove && is->is_remove(idd)) {
			printk(KERN_WARNING
			       "%s: IOC4 submodule 0x%s remove failed "
			       "for pci_dev %s.\n",
			       __FUNCTION__, module_name(is->is_owner),
			       pci_name(idd->idd_pdev));
		}
	}
	mutex_unlock(&ioc4_mutex);

	/* Release resources */
	iounmap(idd->idd_misc_regs);
	if (!idd->idd_bar0) {
		printk(KERN_WARNING
		       "%s: Unable to get IOC4 misc mapping for pci_dev %s. "
		       "Device removal may be incomplete.\n",
		       __FUNCTION__, pci_name(idd->idd_pdev));
	}
	release_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));

	/* Disable IOC4 and relinquish */
	pci_disable_device(pdev);

	/* Remove and free driver data */
	mutex_lock(&ioc4_mutex);
	list_del(&idd->idd_list);
	mutex_unlock(&ioc4_mutex);
	kfree(idd);
}

static struct pci_device_id ioc4_id_table[] = {
	{PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC4, PCI_ANY_ID,
	 PCI_ANY_ID, 0x0b4000, 0xFFFFFF},
	{0}
};

static struct pci_driver ioc4_driver = {
	.name = "IOC4",
	.id_table = ioc4_id_table,
	.probe = ioc4_probe,
	.remove = ioc4_remove,
};

MODULE_DEVICE_TABLE(pci, ioc4_id_table);

/*********************
 * Module management *
 *********************/

/* Module load */
static int __devinit
ioc4_init(void)
{
	return pci_register_driver(&ioc4_driver);
}

/* Module unload */
static void __devexit
ioc4_exit(void)
{
	pci_unregister_driver(&ioc4_driver);
}

module_init(ioc4_init);
module_exit(ioc4_exit);

MODULE_AUTHOR("Brent Casavant - Silicon Graphics, Inc. <bcasavan@sgi.com>");
MODULE_DESCRIPTION("PCI driver master module for SGI IOC4 Base-IO Card");
MODULE_LICENSE("GPL");

EXPORT_SYMBOL(ioc4_register_submodule);
EXPORT_SYMBOL(ioc4_unregister_submodule);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 2005 Silicon Graphics, Inc. All Rights Reserved.
	7	*/
	8
22329b51 BC	9	/* This file contains the master driver module for use by SGI IOC4 subdrivers.
	10	*
	11	* It allocates any resources shared between multiple subdevices, and
	12	* provides accessor functions (where needed) and the like for those
	13	* resources. It also provides a mechanism for the subdevice modules
	14	* to support loading and unloading.
	15	*
	16	* Non-shared resources (e.g. external interrupt A_INT_OUT register page
	17	* alias, serial port and UART registers) are handled by the subdevice
	18	* modules themselves.
	19	*
	20	* This is all necessary because IOC4 is not implemented as a multi-function
	21	* PCI device, but an amalgamation of disparate registers for several
	22	* types of device (ATA, serial, external interrupts). The normal
	23	* resource management in the kernel doesn't have quite the right interfaces
	24	* to handle this situation (e.g. multiple modules can't claim the same
	25	* PCI ID), thus this IOC4 master module.
1da177e4 LT	26	*/
	27
	28	#include <linux/errno.h>
	29	#include <linux/module.h>
	30	#include <linux/pci.h>
22329b51	31	#include <linux/ioc4.h>
d4c477ca BC	32	#include <linux/mmtimer.h>
d4c477ca BC	33	#include <linux/rtc.h>
6e586f32	34	#include <linux/mutex.h>
d4c477ca BC	35	#include <asm/sn/addrs.h>
	36	#include <asm/sn/clksupport.h>
	37	#include <asm/sn/shub_mmr.h>
	38
	39	/***************
	40	* Definitions *
	41	***************/
	42
	43	/* Tweakable values */
	44
	45	/* PCI bus speed detection/calibration */
	46	#define IOC4_CALIBRATE_COUNT 63 /* Calibration cycle period */
	47	#define IOC4_CALIBRATE_CYCLES 256 /* Average over this many cycles */
	48	#define IOC4_CALIBRATE_DISCARD 2 /* Discard first few cycles */
	49	#define IOC4_CALIBRATE_LOW_MHZ 25 /* Lower bound on bus speed sanity */
	50	#define IOC4_CALIBRATE_HIGH_MHZ 75 /* Upper bound on bus speed sanity */
	51	#define IOC4_CALIBRATE_DEFAULT_MHZ 66 /* Assumed if sanity check fails */
1da177e4	52
22329b51 BC	53	/************************
	54	* Submodule management *
	55	************************/
1da177e4	56
6e586f32	57	static DEFINE_MUTEX(ioc4_mutex);
22329b51	58
6e586f32	59	static LIST_HEAD(ioc4_devices);
22329b51	60	static LIST_HEAD(ioc4_submodules);
22329b51 BC	61
	62	/* Register an IOC4 submodule */
	63	int
	64	ioc4_register_submodule(struct ioc4_submodule *is)
	65	{
	66	struct ioc4_driver_data *idd;
	67
6e586f32	68	mutex_lock(&ioc4_mutex);
22329b51	69	list_add(&is->is_list, &ioc4_submodules);
22329b51 BC	70
	71	/* Initialize submodule for each IOC4 */
	72	if (!is->is_probe)
6e586f32	73	goto out;
22329b51	74
22329b51 BC	75	list_for_each_entry(idd, &ioc4_devices, idd_list) {
	76	if (is->is_probe(idd)) {
	77	printk(KERN_WARNING
	78	"%s: IOC4 submodule %s probe failed "
	79	"for pci_dev %s",
	80	__FUNCTION__, module_name(is->is_owner),
	81	pci_name(idd->idd_pdev));
	82	}
	83	}
6e586f32 JS	84	out:
6e586f32 JS	85	mutex_unlock(&ioc4_mutex);
22329b51 BC	86	return 0;
	87	}
	88
	89	/* Unregister an IOC4 submodule */
	90	void
	91	ioc4_unregister_submodule(struct ioc4_submodule *is)
1da177e4	92	{
22329b51 BC	93	struct ioc4_driver_data *idd;
22329b51 BC	94
6e586f32	95	mutex_lock(&ioc4_mutex);
22329b51	96	list_del(&is->is_list);
22329b51 BC	97
	98	/* Remove submodule for each IOC4 */
	99	if (!is->is_remove)
6e586f32	100	goto out;
22329b51	101
22329b51 BC	102	list_for_each_entry(idd, &ioc4_devices, idd_list) {
	103	if (is->is_remove(idd)) {
	104	printk(KERN_WARNING
	105	"%s: IOC4 submodule %s remove failed "
	106	"for pci_dev %s.\n",
	107	__FUNCTION__, module_name(is->is_owner),
	108	pci_name(idd->idd_pdev));
	109	}
	110	}
6e586f32 JS	111	out:
6e586f32 JS	112	mutex_unlock(&ioc4_mutex);
22329b51 BC	113	}
	114
	115	/*********************
	116	* Device management *
	117	*********************/
	118
d4c477ca BC	119	#define IOC4_CALIBRATE_LOW_LIMIT \
	120	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_LOW_MHZ)
	121	#define IOC4_CALIBRATE_HIGH_LIMIT \
	122	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_HIGH_MHZ)
	123	#define IOC4_CALIBRATE_DEFAULT \
	124	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_DEFAULT_MHZ)
	125
	126	#define IOC4_CALIBRATE_END \
	127	(IOC4_CALIBRATE_CYCLES + IOC4_CALIBRATE_DISCARD)
	128
	129	#define IOC4_INT_OUT_MODE_TOGGLE 0x7 /* Toggle INT_OUT every COUNT+1 ticks */
	130
	131	/* Determines external interrupt output clock period of the PCI bus an
	132	* IOC4 is attached to. This value can be used to determine the PCI
	133	* bus speed.
	134	*
	135	* IOC4 has a design feature that various internal timers are derived from
	136	* the PCI bus clock. This causes IOC4 device drivers to need to take the
	137	* bus speed into account when setting various register values (e.g. INT_OUT
	138	* register COUNT field, UART divisors, etc). Since this information is
	139	* needed by several subdrivers, it is determined by the main IOC4 driver,
	140	* even though the following code utilizes external interrupt registers
	141	* to perform the speed calculation.
	142	*/
	143	static void
	144	ioc4_clock_calibrate(struct ioc4_driver_data *idd)
	145	{
	146	extern unsigned long sn_rtc_cycles_per_second;
	147	union ioc4_int_out int_out;
	148	union ioc4_gpcr gpcr;
	149	unsigned int state, last_state = 1;
	150	uint64_t start = 0, end, period;
	151	unsigned int count = 0;
	152
	153	/* Enable output */
	154	gpcr.raw = 0;
	155	gpcr.fields.dir = IOC4_GPCR_DIR_0;
	156	gpcr.fields.int_out_en = 1;
	157	writel(gpcr.raw, &idd->idd_misc_regs->gpcr_s.raw);
	158
	159	/* Reset to power-on state */
	160	writel(0, &idd->idd_misc_regs->int_out.raw);
	161	mmiowb();
	162
d4c477ca BC	163	/* Set up square wave */
	164	int_out.raw = 0;
	165	int_out.fields.count = IOC4_CALIBRATE_COUNT;
	166	int_out.fields.mode = IOC4_INT_OUT_MODE_TOGGLE;
	167	int_out.fields.diag = 0;
	168	writel(int_out.raw, &idd->idd_misc_regs->int_out.raw);
	169	mmiowb();
	170
	171	/* Check square wave period averaged over some number of cycles */
	172	do {
	173	int_out.raw = readl(&idd->idd_misc_regs->int_out.raw);
	174	state = int_out.fields.int_out;
	175	if (!last_state && state) {
	176	count++;
	177	if (count == IOC4_CALIBRATE_END) {
	178	end = rtc_time();
	179	break;
	180	} else if (count == IOC4_CALIBRATE_DISCARD)
	181	start = rtc_time();
	182	}
	183	last_state = state;
	184	} while (1);
	185
	186	/* Calculation rearranged to preserve intermediate precision.
	187	* Logically:
	188	* 1. "end - start" gives us number of RTC cycles over all the
	189	* square wave cycles measured.
	190	* 2. Divide by number of square wave cycles to get number of
	191	* RTC cycles per square wave cycle.
	192	* 3. Divide by 2*(int_out.fields.count+1), which is the formula
	193	* by which the IOC4 generates the square wave, to get the
	194	* number of RTC cycles per IOC4 INT_OUT count.
	195	* 4. Divide by sn_rtc_cycles_per_second to get seconds per
	196	* count.
	197	* 5. Multiply by 1E9 to get nanoseconds per count.
	198	*/
	199	period = ((end - start) * 1000000000) /
	200	(IOC4_CALIBRATE_CYCLES * 2 * (IOC4_CALIBRATE_COUNT + 1)
	201	* sn_rtc_cycles_per_second);
	202
	203	/* Bounds check the result. */
	204	if (period > IOC4_CALIBRATE_LOW_LIMIT \|\|
	205	period < IOC4_CALIBRATE_HIGH_LIMIT) {
f5befceb BC	206	printk(KERN_INFO
	207	"IOC4 %s: Clock calibration failed. Assuming"
	208	"PCI clock is %d ns.\n",
	209	pci_name(idd->idd_pdev),
d4c477ca BC	210	IOC4_CALIBRATE_DEFAULT / IOC4_EXTINT_COUNT_DIVISOR);
	211	period = IOC4_CALIBRATE_DEFAULT;
	212	} else {
f5befceb BC	213	printk(KERN_DEBUG
	214	"IOC4 %s: PCI clock is %ld ns.\n",
	215	pci_name(idd->idd_pdev),
d4c477ca BC	216	period / IOC4_EXTINT_COUNT_DIVISOR);
	217	}
	218
	219	/* Remember results. We store the extint clock period rather
	220	* than the PCI clock period so that greater precision is
	221	* retained. Divide by IOC4_EXTINT_COUNT_DIVISOR to get
	222	* PCI clock period.
	223	*/
	224	idd->count_period = period;
	225	}
	226
f5befceb BC	227	/* There are three variants of IOC4 cards: IO9, IO10, and PCI-RT.
	228	* Each brings out different combinations of IOC4 signals, thus.
	229	* the IOC4 subdrivers need to know to which we're attached.
	230	*
	231	* We look for the presence of a SCSI (IO9) or SATA (IO10) controller
	232	* on the same PCI bus at slot number 3 to differentiate IO9 from IO10.
	233	* If neither is present, it's a PCI-RT.
	234	*/
	235	static unsigned int
	236	ioc4_variant(struct ioc4_driver_data *idd)
	237	{
	238	struct pci_dev *pdev = NULL;
	239	int found = 0;
	240
	241	/* IO9: Look for a QLogic ISP 12160 at the same bus and slot 3. */
	242	do {
	243	pdev = pci_get_device(PCI_VENDOR_ID_QLOGIC,
	244	PCI_DEVICE_ID_QLOGIC_ISP12160, pdev);
	245	if (pdev &&
	246	idd->idd_pdev->bus->number == pdev->bus->number &&
	247	3 == PCI_SLOT(pdev->devfn))
	248	found = 1;
	249	pci_dev_put(pdev);
	250	} while (pdev && !found);
	251	if (NULL != pdev)
	252	return IOC4_VARIANT_IO9;
	253
	254	/* IO10: Look for a Vitesse VSC 7174 at the same bus and slot 3. */
	255	pdev = NULL;
	256	do {
	257	pdev = pci_get_device(PCI_VENDOR_ID_VITESSE,
	258	PCI_DEVICE_ID_VITESSE_VSC7174, pdev);
	259	if (pdev &&
	260	idd->idd_pdev->bus->number == pdev->bus->number &&
	261	3 == PCI_SLOT(pdev->devfn))
	262	found = 1;
	263	pci_dev_put(pdev);
	264	} while (pdev && !found);
	265	if (NULL != pdev)
	266	return IOC4_VARIANT_IO10;
	267
	268	/* PCI-RT: No SCSI/SATA controller will be present */
	269	return IOC4_VARIANT_PCI_RT;
	270	}
	271
22329b51 BC	272	/* Adds a new instance of an IOC4 card */
	273	static int
	274	ioc4_probe(struct pci_dev pdev, const struct pci_device_id pci_id)
	275	{
	276	struct ioc4_driver_data *idd;
	277	struct ioc4_submodule *is;
	278	uint32_t pcmd;
1da177e4 LT	279	int ret;
1da177e4 LT	280
22329b51	281	/* Enable IOC4 and take ownership of it */
1da177e4 LT	282	if ((ret = pci_enable_device(pdev))) {
1da177e4 LT	283	printk(KERN_WARNING
22329b51 BC	284	"%s: Failed to enable IOC4 device for pci_dev %s.\n",
	285	__FUNCTION__, pci_name(pdev));
	286	goto out;
1da177e4 LT	287	}
	288	pci_set_master(pdev);
	289
22329b51 BC	290	/* Set up per-IOC4 data */
	291	idd = kmalloc(sizeof(struct ioc4_driver_data), GFP_KERNEL);
	292	if (!idd) {
	293	printk(KERN_WARNING
	294	"%s: Failed to allocate IOC4 data for pci_dev %s.\n",
	295	__FUNCTION__, pci_name(pdev));
	296	ret = -ENODEV;
	297	goto out_idd;
	298	}
	299	idd->idd_pdev = pdev;
	300	idd->idd_pci_id = pci_id;
	301
	302	/* Map IOC4 misc registers. These are shared between subdevices
	303	* so the main IOC4 module manages them.
	304	*/
	305	idd->idd_bar0 = pci_resource_start(idd->idd_pdev, 0);
	306	if (!idd->idd_bar0) {
	307	printk(KERN_WARNING
	308	"%s: Unable to find IOC4 misc resource "
	309	"for pci_dev %s.\n",
	310	__FUNCTION__, pci_name(idd->idd_pdev));
	311	ret = -ENODEV;
	312	goto out_pci;
	313	}
	314	if (!request_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs),
	315	"ioc4_misc")) {
	316	printk(KERN_WARNING
	317	"%s: Unable to request IOC4 misc region "
	318	"for pci_dev %s.\n",
	319	__FUNCTION__, pci_name(idd->idd_pdev));
	320	ret = -ENODEV;
	321	goto out_pci;
	322	}
	323	idd->idd_misc_regs = ioremap(idd->idd_bar0,
	324	sizeof(struct ioc4_misc_regs));
	325	if (!idd->idd_misc_regs) {
	326	printk(KERN_WARNING
	327	"%s: Unable to remap IOC4 misc region "
	328	"for pci_dev %s.\n",
	329	__FUNCTION__, pci_name(idd->idd_pdev));
	330	ret = -ENODEV;
	331	goto out_misc_region;
	332	}
	333
	334	/* Failsafe portion of per-IOC4 initialization */
	335
f5befceb BC	336	/* Detect card variant */
	337	idd->idd_variant = ioc4_variant(idd);
	338	printk(KERN_INFO "IOC4 %s: %s card detected.\n", pci_name(pdev),
	339	idd->idd_variant == IOC4_VARIANT_IO9 ? "IO9" :
	340	idd->idd_variant == IOC4_VARIANT_PCI_RT ? "PCI-RT" :
	341	idd->idd_variant == IOC4_VARIANT_IO10 ? "IO10" : "unknown");
	342
22329b51 BC	343	/* Initialize IOC4 */
	344	pci_read_config_dword(idd->idd_pdev, PCI_COMMAND, &pcmd);
	345	pci_write_config_dword(idd->idd_pdev, PCI_COMMAND,
	346	pcmd \| PCI_COMMAND_PARITY \| PCI_COMMAND_SERR);
	347
d4c477ca BC	348	/* Determine PCI clock */
	349	ioc4_clock_calibrate(idd);
	350
22329b51 BC	351	/* Disable/clear all interrupts. Need to do this here lest
	352	* one submodule request the shared IOC4 IRQ, but interrupt
	353	* is generated by a different subdevice.
	354	*/
	355	/* Disable */
	356	writel(~0, &idd->idd_misc_regs->other_iec.raw);
	357	writel(~0, &idd->idd_misc_regs->sio_iec);
	358	/* Clear (i.e. acknowledge) */
	359	writel(~0, &idd->idd_misc_regs->other_ir.raw);
	360	writel(~0, &idd->idd_misc_regs->sio_ir);
	361
	362	/* Track PCI-device specific data */
	363	idd->idd_serial_data = NULL;
	364	pci_set_drvdata(idd->idd_pdev, idd);
6e586f32 JS	365
6e586f32 JS	366	mutex_lock(&ioc4_mutex);
8683dc99	367	list_add_tail(&idd->idd_list, &ioc4_devices);
22329b51 BC	368
22329b51 BC	369	/* Add this IOC4 to all submodules */
22329b51 BC	370	list_for_each_entry(is, &ioc4_submodules, is_list) {
	371	if (is->is_probe && is->is_probe(idd)) {
	372	printk(KERN_WARNING
	373	"%s: IOC4 submodule 0x%s probe failed "
	374	"for pci_dev %s.\n",
	375	__FUNCTION__, module_name(is->is_owner),
	376	pci_name(idd->idd_pdev));
	377	}
	378	}
6e586f32	379	mutex_unlock(&ioc4_mutex);
22329b51 BC	380
	381	return 0;
	382
	383	out_misc_region:
	384	release_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
	385	out_pci:
	386	kfree(idd);
	387	out_idd:
	388	pci_disable_device(pdev);
	389	out:
	390	return ret;
1da177e4 LT	391	}
1da177e4 LT	392
22329b51 BC	393	/* Removes a particular instance of an IOC4 card. */
	394	static void
	395	ioc4_remove(struct pci_dev *pdev)
	396	{
	397	struct ioc4_submodule *is;
	398	struct ioc4_driver_data *idd;
	399
	400	idd = pci_get_drvdata(pdev);
	401
	402	/* Remove this IOC4 from all submodules */
6e586f32	403	mutex_lock(&ioc4_mutex);
22329b51 BC	404	list_for_each_entry(is, &ioc4_submodules, is_list) {
	405	if (is->is_remove && is->is_remove(idd)) {
	406	printk(KERN_WARNING
	407	"%s: IOC4 submodule 0x%s remove failed "
	408	"for pci_dev %s.\n",
	409	__FUNCTION__, module_name(is->is_owner),
	410	pci_name(idd->idd_pdev));
	411	}
	412	}
6e586f32	413	mutex_unlock(&ioc4_mutex);
22329b51 BC	414
	415	/* Release resources */
	416	iounmap(idd->idd_misc_regs);
	417	if (!idd->idd_bar0) {
	418	printk(KERN_WARNING
	419	"%s: Unable to get IOC4 misc mapping for pci_dev %s. "
	420	"Device removal may be incomplete.\n",
	421	__FUNCTION__, pci_name(idd->idd_pdev));
	422	}
	423	release_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
	424
	425	/* Disable IOC4 and relinquish */
	426	pci_disable_device(pdev);
	427
	428	/* Remove and free driver data */
6e586f32	429	mutex_lock(&ioc4_mutex);
22329b51	430	list_del(&idd->idd_list);
6e586f32	431	mutex_unlock(&ioc4_mutex);
22329b51 BC	432	kfree(idd);
	433	}
	434
	435	static struct pci_device_id ioc4_id_table[] = {
1da177e4 LT	436	{PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC4, PCI_ANY_ID,
	437	PCI_ANY_ID, 0x0b4000, 0xFFFFFF},
	438	{0}
	439	};
1da177e4	440
85bd8434	441	static struct pci_driver ioc4_driver = {
22329b51 BC	442	.name = "IOC4",
	443	.id_table = ioc4_id_table,
	444	.probe = ioc4_probe,
	445	.remove = ioc4_remove,
1da177e4 LT	446	};
1da177e4 LT	447
22329b51 BC	448	MODULE_DEVICE_TABLE(pci, ioc4_id_table);
	449
	450	/*********************
	451	* Module management *
	452	*********************/
	453
	454	/* Module load */
	455	static int __devinit
	456	ioc4_init(void)
1da177e4	457	{
22329b51 BC	458	return pci_register_driver(&ioc4_driver);
22329b51 BC	459	}
1da177e4	460
22329b51 BC	461	/* Module unload */
	462	static void __devexit
	463	ioc4_exit(void)
	464	{
	465	pci_unregister_driver(&ioc4_driver);
1da177e4	466	}
1da177e4	467
22329b51 BC	468	module_init(ioc4_init);
	469	module_exit(ioc4_exit);
	470
	471	MODULE_AUTHOR("Brent Casavant - Silicon Graphics, Inc. <bcasavan@sgi.com>");
	472	MODULE_DESCRIPTION("PCI driver master module for SGI IOC4 Base-IO Card");
1da177e4	473	MODULE_LICENSE("GPL");
22329b51 BC	474
	475	EXPORT_SYMBOL(ioc4_register_submodule);
	476	EXPORT_SYMBOL(ioc4_unregister_submodule);