Commit | Line | Data |
---|---|---|
8ae12a0d DB |
1 | # |
2 | # SPI driver configuration | |
3 | # | |
4 | # NOTE: the reason this doesn't show SPI slave support is mostly that | |
5 | # nobody's needed a slave side API yet. The master-role API is not | |
6 | # fully appropriate there, so it'd need some thought to do well. | |
7 | # | |
79d8c7a8 | 8 | menuconfig SPI |
8ae12a0d | 9 | bool "SPI support" |
79d8c7a8 | 10 | depends on HAS_IOMEM |
8ae12a0d DB |
11 | help |
12 | The "Serial Peripheral Interface" is a low level synchronous | |
13 | protocol. Chips that support SPI can have data transfer rates | |
14 | up to several tens of Mbit/sec. Chips are addressed with a | |
15 | controller and a chipselect. Most SPI slaves don't support | |
16 | dynamic device discovery; some are even write-only or read-only. | |
17 | ||
3cb2fccc | 18 | SPI is widely used by microcontrollers to talk with sensors, |
8ae12a0d DB |
19 | eeprom and flash memory, codecs and various other controller |
20 | chips, analog to digital (and d-to-a) converters, and more. | |
21 | MMC and SD cards can be accessed using SPI protocol; and for | |
22 | DataFlash cards used in MMC sockets, SPI must always be used. | |
23 | ||
24 | SPI is one of a family of similar protocols using a four wire | |
25 | interface (select, clock, data in, data out) including Microwire | |
26 | (half duplex), SSP, SSI, and PSP. This driver framework should | |
27 | work with most such devices and controllers. | |
28 | ||
79d8c7a8 AG |
29 | if SPI |
30 | ||
8ae12a0d DB |
31 | config SPI_DEBUG |
32 | boolean "Debug support for SPI drivers" | |
79d8c7a8 | 33 | depends on DEBUG_KERNEL |
8ae12a0d DB |
34 | help |
35 | Say "yes" to enable debug messaging (like dev_dbg and pr_debug), | |
36 | sysfs, and debugfs support in SPI controller and protocol drivers. | |
37 | ||
38 | # | |
39 | # MASTER side ... talking to discrete SPI slave chips including microcontrollers | |
40 | # | |
41 | ||
42 | config SPI_MASTER | |
43 | # boolean "SPI Master Support" | |
44 | boolean | |
45 | default SPI | |
46 | help | |
47 | If your system has an master-capable SPI controller (which | |
48 | provides the clock and chipselect), you can enable that | |
49 | controller and the protocol drivers for the SPI slave chips | |
50 | that are connected. | |
51 | ||
6291fe2a RD |
52 | if SPI_MASTER |
53 | ||
8ae12a0d | 54 | comment "SPI Master Controller Drivers" |
8ae12a0d | 55 | |
0b782531 TC |
56 | config SPI_ALTERA |
57 | tristate "Altera SPI Controller" | |
58 | select SPI_BITBANG | |
59 | help | |
60 | This is the driver for the Altera SPI Controller. | |
61 | ||
8efaef4d GJ |
62 | config SPI_ATH79 |
63 | tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver" | |
76ec9d18 | 64 | depends on ATH79 && GPIOLIB |
8efaef4d GJ |
65 | select SPI_BITBANG |
66 | help | |
67 | This enables support for the SPI controller present on the | |
68 | Atheros AR71XX/AR724X/AR913X SoCs. | |
69 | ||
754ce4f2 HS |
70 | config SPI_ATMEL |
71 | tristate "Atmel SPI Controller" | |
dd1053a9 | 72 | depends on (ARCH_AT91 || AVR32 || COMPILE_TEST) |
754ce4f2 HS |
73 | help |
74 | This selects a driver for the Atmel SPI Controller, present on | |
75 | many AT32 (AVR32) and AT91 (ARM) chips. | |
76 | ||
f8043872 CB |
77 | config SPI_BCM2835 |
78 | tristate "BCM2835 SPI controller" | |
dd1053a9 | 79 | depends on ARCH_BCM2835 || COMPILE_TEST |
f8043872 CB |
80 | help |
81 | This selects a driver for the Broadcom BCM2835 SPI master. | |
82 | ||
83 | The BCM2835 contains two types of SPI master controller; the | |
84 | "universal SPI master", and the regular SPI controller. This driver | |
85 | is for the regular SPI controller. Slave mode operation is not also | |
86 | not supported. | |
87 | ||
22ac3e82 | 88 | config SPI_BFIN5XX |
a5f6abd4 | 89 | tristate "SPI controller driver for ADI Blackfin5xx" |
fa4bd4f1 | 90 | depends on BLACKFIN && !BF60x |
a5f6abd4 WB |
91 | help |
92 | This is the SPI controller master driver for Blackfin 5xx processor. | |
93 | ||
fa4bd4f1 SJ |
94 | config SPI_BFIN_V3 |
95 | tristate "SPI controller v3 for Blackfin" | |
96 | depends on BF60x | |
97 | help | |
98 | This is the SPI controller v3 master driver | |
99 | found on Blackfin 60x processor. | |
100 | ||
9c3e7375 CC |
101 | config SPI_BFIN_SPORT |
102 | tristate "SPI bus via Blackfin SPORT" | |
103 | depends on BLACKFIN | |
104 | help | |
105 | Enable support for a SPI bus via the Blackfin SPORT peripheral. | |
106 | ||
63bd2359 | 107 | config SPI_AU1550 |
809f36c6 | 108 | tristate "Au1550/Au1200/Au1300 SPI Controller" |
6d1f56aa | 109 | depends on MIPS_ALCHEMY |
63bd2359 JN |
110 | select SPI_BITBANG |
111 | help | |
112 | If you say yes to this option, support will be included for the | |
809f36c6 | 113 | PSC SPI controller found on Au1550, Au1200 and Au1300 series. |
63bd2359 | 114 | |
b42dfed8 FF |
115 | config SPI_BCM63XX |
116 | tristate "Broadcom BCM63xx SPI controller" | |
117 | depends on BCM63XX | |
118 | help | |
119 | Enable support for the SPI controller on the Broadcom BCM63xx SoCs. | |
120 | ||
9904f22a | 121 | config SPI_BITBANG |
d29389de | 122 | tristate "Utilities for Bitbanging SPI masters" |
9904f22a DB |
123 | help |
124 | With a few GPIO pins, your system can bitbang the SPI protocol. | |
125 | Select this to get SPI support through I/O pins (GPIO, parallel | |
126 | port, etc). Or, some systems' SPI master controller drivers use | |
127 | this code to manage the per-word or per-transfer accesses to the | |
128 | hardware shift registers. | |
129 | ||
130 | This is library code, and is automatically selected by drivers that | |
131 | need it. You only need to select this explicitly to support driver | |
132 | modules that aren't part of this kernel tree. | |
8ae12a0d | 133 | |
7111763d DB |
134 | config SPI_BUTTERFLY |
135 | tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)" | |
6291fe2a | 136 | depends on PARPORT |
7111763d DB |
137 | select SPI_BITBANG |
138 | help | |
139 | This uses a custom parallel port cable to connect to an AVR | |
140 | Butterfly <http://www.atmel.com/products/avr/butterfly>, an | |
141 | inexpensive battery powered microcontroller evaluation board. | |
142 | This same cable can be used to flash new firmware. | |
143 | ||
161b96c3 AS |
144 | config SPI_CLPS711X |
145 | tristate "CLPS711X host SPI controller" | |
146 | depends on ARCH_CLPS711X | |
147 | help | |
148 | This enables dedicated general purpose SPI/Microwire1-compatible | |
149 | master mode interface (SSI1) for CLPS711X-based CPUs. | |
150 | ||
34b8c661 SK |
151 | config SPI_COLDFIRE_QSPI |
152 | tristate "Freescale Coldfire QSPI controller" | |
bce4d12b | 153 | depends on (M520x || M523x || M5249 || M525x || M527x || M528x || M532x) |
34b8c661 SK |
154 | help |
155 | This enables support for the Coldfire QSPI controller in master | |
156 | mode. | |
157 | ||
358934a6 | 158 | config SPI_DAVINCI |
23ce17ad | 159 | tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller" |
78848914 | 160 | depends on ARCH_DAVINCI || ARCH_KEYSTONE |
358934a6 | 161 | select SPI_BITBANG |
b5f14330 | 162 | select TI_EDMA |
358934a6 | 163 | help |
23ce17ad SN |
164 | SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules. |
165 | ||
86f8973c UKK |
166 | config SPI_EFM32 |
167 | tristate "EFM32 SPI controller" | |
168 | depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST) | |
169 | select SPI_BITBANG | |
170 | help | |
171 | Driver for the spi controller found on Energy Micro's EFM32 SoCs. | |
172 | ||
011f23a3 MW |
173 | config SPI_EP93XX |
174 | tristate "Cirrus Logic EP93xx SPI controller" | |
dd1053a9 | 175 | depends on ARCH_EP93XX || COMPILE_TEST |
011f23a3 MW |
176 | help |
177 | This enables using the Cirrus EP93xx SPI controller in master | |
178 | mode. | |
179 | ||
6cd3c7e2 TL |
180 | config SPI_FALCON |
181 | tristate "Falcon SPI controller support" | |
182 | depends on SOC_FALCON | |
183 | help | |
184 | The external bus unit (EBU) found on the FALC-ON SoC has SPI | |
185 | emulation that is designed for serial flash access. This driver | |
186 | has only been tested with m25p80 type chips. The hardware has no | |
187 | support for other types of SPI peripherals. | |
188 | ||
d29389de DB |
189 | config SPI_GPIO |
190 | tristate "GPIO-based bitbanging SPI Master" | |
76ec9d18 | 191 | depends on GPIOLIB |
d29389de DB |
192 | select SPI_BITBANG |
193 | help | |
194 | This simple GPIO bitbanging SPI master uses the arch-neutral GPIO | |
195 | interface to manage MOSI, MISO, SCK, and chipselect signals. SPI | |
196 | slaves connected to a bus using this driver are configured as usual, | |
197 | except that the spi_board_info.controller_data holds the GPIO number | |
198 | for the chipselect used by this controller driver. | |
199 | ||
200 | Note that this driver often won't achieve even 1 Mbit/sec speeds, | |
201 | making it unusually slow for SPI. If your platform can inline | |
202 | GPIO operations, you should be able to leverage that for better | |
203 | speed with a custom version of this driver; see the source code. | |
204 | ||
b5f3294f SH |
205 | config SPI_IMX |
206 | tristate "Freescale i.MX SPI controllers" | |
dd1053a9 | 207 | depends on ARCH_MXC || COMPILE_TEST |
b5f3294f | 208 | select SPI_BITBANG |
e89524d3 | 209 | default m if IMX_HAVE_PLATFORM_SPI_IMX |
b5f3294f SH |
210 | help |
211 | This enables using the Freescale i.MX SPI controllers in master | |
212 | mode. | |
213 | ||
78961a57 KB |
214 | config SPI_LM70_LLP |
215 | tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)" | |
6d1f56aa | 216 | depends on PARPORT |
78961a57 KB |
217 | select SPI_BITBANG |
218 | help | |
219 | This driver supports the NS LM70 LLP Evaluation Board, | |
220 | which interfaces to an LM70 temperature sensor using | |
221 | a parallel port. | |
222 | ||
42bbb709 GL |
223 | config SPI_MPC52xx |
224 | tristate "Freescale MPC52xx SPI (non-PSC) controller support" | |
7433f2b7 | 225 | depends on PPC_MPC52xx |
42bbb709 GL |
226 | help |
227 | This drivers supports the MPC52xx SPI controller in master SPI | |
228 | mode. | |
229 | ||
00b8fd23 DC |
230 | config SPI_MPC52xx_PSC |
231 | tristate "Freescale MPC52xx PSC SPI controller" | |
6d1f56aa | 232 | depends on PPC_MPC52xx |
00b8fd23 DC |
233 | help |
234 | This enables using the Freescale MPC52xx Programmable Serial | |
235 | Controller in master SPI mode. | |
236 | ||
6e27388f AG |
237 | config SPI_MPC512x_PSC |
238 | tristate "Freescale MPC512x PSC SPI controller" | |
5e8afa34 | 239 | depends on PPC_MPC512x |
6e27388f AG |
240 | help |
241 | This enables using the Freescale MPC5121 Programmable Serial | |
242 | Controller in SPI master mode. | |
243 | ||
b36ece83 | 244 | config SPI_FSL_LIB |
e8beacbb AL |
245 | tristate |
246 | depends on OF | |
247 | ||
248 | config SPI_FSL_CPM | |
b36ece83 MH |
249 | tristate |
250 | depends on FSL_SOC | |
251 | ||
3272029f | 252 | config SPI_FSL_SPI |
447b0c7b | 253 | bool "Freescale SPI controller and Aeroflex Gaisler GRLIB SPI controller" |
e8beacbb | 254 | depends on OF |
b36ece83 | 255 | select SPI_FSL_LIB |
e8beacbb | 256 | select SPI_FSL_CPM if FSL_SOC |
ccf06998 | 257 | help |
3272029f MH |
258 | This enables using the Freescale SPI controllers in master mode. |
259 | MPC83xx platform uses the controller in cpu mode or CPM/QE mode. | |
260 | MPC8569 uses the controller in QE mode, MPC8610 in cpu mode. | |
447b0c7b AL |
261 | This also enables using the Aeroflex Gaisler GRLIB SPI controller in |
262 | master mode. | |
ccf06998 | 263 | |
349ad66c CF |
264 | config SPI_FSL_DSPI |
265 | tristate "Freescale DSPI controller" | |
266 | select SPI_BITBANG | |
267 | help | |
268 | This enables support for the Freescale DSPI controller in master | |
269 | mode. VF610 platform uses the controller. | |
270 | ||
8b60d6c2 | 271 | config SPI_FSL_ESPI |
d9ddcec3 | 272 | bool "Freescale eSPI controller" |
8b60d6c2 MH |
273 | depends on FSL_SOC |
274 | select SPI_FSL_LIB | |
275 | help | |
276 | This enables using the Freescale eSPI controllers in master mode. | |
277 | From MPC8536, 85xx platform uses the controller, and all P10xx, | |
278 | P20xx, P30xx,P40xx, P50xx uses this controller. | |
279 | ||
ce792580 TC |
280 | config SPI_OC_TINY |
281 | tristate "OpenCores tiny SPI" | |
76ec9d18 | 282 | depends on GPIOLIB |
ce792580 TC |
283 | select SPI_BITBANG |
284 | help | |
285 | This is the driver for OpenCores tiny SPI master controller. | |
286 | ||
6b52c00f DD |
287 | config SPI_OCTEON |
288 | tristate "Cavium OCTEON SPI controller" | |
9ddebc46 | 289 | depends on CAVIUM_OCTEON_SOC |
6b52c00f DD |
290 | help |
291 | SPI host driver for the hardware found on some Cavium OCTEON | |
292 | SOCs. | |
293 | ||
fdb3c18d DB |
294 | config SPI_OMAP_UWIRE |
295 | tristate "OMAP1 MicroWire" | |
6291fe2a | 296 | depends on ARCH_OMAP1 |
fdb3c18d DB |
297 | select SPI_BITBANG |
298 | help | |
299 | This hooks up to the MicroWire controller on OMAP1 chips. | |
300 | ||
ccdc7bf9 | 301 | config SPI_OMAP24XX |
8ebeb545 | 302 | tristate "McSPI driver for OMAP" |
dd1053a9 | 303 | depends on ARCH_OMAP2PLUS || COMPILE_TEST |
ccdc7bf9 | 304 | help |
8ebeb545 | 305 | SPI master controller for OMAP24XX and later Multichannel SPI |
ccdc7bf9 | 306 | (McSPI) modules. |
69c202af | 307 | |
505a1495 SP |
308 | config SPI_TI_QSPI |
309 | tristate "DRA7xxx QSPI controller support" | |
310 | depends on ARCH_OMAP2PLUS || COMPILE_TEST | |
311 | help | |
312 | QSPI master controller for DRA7xxx used for flash devices. | |
313 | This device supports single, dual and quad read support, while | |
314 | it only supports single write mode. | |
315 | ||
35c9049b CM |
316 | config SPI_OMAP_100K |
317 | tristate "OMAP SPI 100K" | |
dd1053a9 | 318 | depends on ARCH_OMAP850 || ARCH_OMAP730 || COMPILE_TEST |
35c9049b CM |
319 | help |
320 | OMAP SPI 100K master controller for omap7xx boards. | |
321 | ||
60cadec9 | 322 | config SPI_ORION |
6d1f56aa | 323 | tristate "Orion SPI master" |
dd1053a9 | 324 | depends on PLAT_ORION || COMPILE_TEST |
60cadec9 SA |
325 | help |
326 | This enables using the SPI master controller on the Orion chips. | |
327 | ||
b43d65f7 | 328 | config SPI_PL022 |
7f9a4b97 LW |
329 | tristate "ARM AMBA PL022 SSP controller" |
330 | depends on ARM_AMBA | |
b43d65f7 | 331 | default y if MACH_U300 |
f33b29ee | 332 | default y if ARCH_REALVIEW |
333 | default y if INTEGRATOR_IMPD1 | |
334 | default y if ARCH_VERSATILE | |
b43d65f7 LW |
335 | help |
336 | This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP | |
337 | controller. If you have an embedded system with an AMBA(R) | |
338 | bus and a PL022 controller, say Y or M here. | |
339 | ||
44dab88e SF |
340 | config SPI_PPC4xx |
341 | tristate "PPC4xx SPI Controller" | |
5e8afa34 | 342 | depends on PPC32 && 4xx |
44dab88e SF |
343 | select SPI_BITBANG |
344 | help | |
345 | This selects a driver for the PPC4xx SPI Controller. | |
346 | ||
cd7bed00 MW |
347 | config SPI_PXA2XX_PXADMA |
348 | bool "PXA2xx SSP legacy PXA DMA API support" | |
349 | depends on SPI_PXA2XX && ARCH_PXA | |
350 | help | |
5928808e MW |
351 | Enable PXA private legacy DMA API support. Note that this is |
352 | deprecated in favor of generic DMA engine API. | |
353 | ||
354 | config SPI_PXA2XX_DMA | |
355 | def_bool y | |
356 | depends on SPI_PXA2XX && !SPI_PXA2XX_PXADMA | |
cd7bed00 | 357 | |
e0c9905e SS |
358 | config SPI_PXA2XX |
359 | tristate "PXA2xx SSP SPI master" | |
0244ad00 | 360 | depends on (ARCH_PXA || PCI || ACPI) |
d6ea3df0 | 361 | select PXA_SSP if ARCH_PXA |
e0c9905e | 362 | help |
d6ea3df0 SAS |
363 | This enables using a PXA2xx or Sodaville SSP port as a SPI master |
364 | controller. The driver can be configured to use any SSP port and | |
365 | additional documentation can be found a Documentation/spi/pxa2xx. | |
366 | ||
367 | config SPI_PXA2XX_PCI | |
2b49ebda | 368 | def_tristate SPI_PXA2XX && PCI |
e0c9905e | 369 | |
0b2182dd SY |
370 | config SPI_RSPI |
371 | tristate "Renesas RSPI controller" | |
838af505 | 372 | depends on SUPERH && SH_DMAE_BASE |
0b2182dd SY |
373 | help |
374 | SPI driver for Renesas RSPI blocks. | |
375 | ||
85abfaa7 DB |
376 | config SPI_S3C24XX |
377 | tristate "Samsung S3C24XX series SPI" | |
6d1f56aa | 378 | depends on ARCH_S3C24XX |
da0abc27 | 379 | select SPI_BITBANG |
85abfaa7 DB |
380 | help |
381 | SPI driver for Samsung S3C24XX series ARM SoCs | |
382 | ||
bec0806c BD |
383 | config SPI_S3C24XX_FIQ |
384 | bool "S3C24XX driver with FIQ pseudo-DMA" | |
385 | depends on SPI_S3C24XX | |
386 | select FIQ | |
387 | help | |
388 | Enable FIQ support for the S3C24XX SPI driver to provide pseudo | |
389 | DMA by using the fast-interrupt request framework, This allows | |
390 | the driver to get DMA-like performance when there are either | |
391 | no free DMA channels, or when doing transfers that required both | |
392 | TX and RX data paths. | |
393 | ||
230d42d4 JB |
394 | config SPI_S3C64XX |
395 | tristate "Samsung S3C64XX series type SPI" | |
c4bec603 | 396 | depends on (ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || ARCH_EXYNOS) |
5f35765d | 397 | select S3C64XX_DMA if ARCH_S3C64XX |
230d42d4 JB |
398 | help |
399 | SPI driver for Samsung S3C64XX and newer SoCs. | |
400 | ||
3ce8859e GR |
401 | config SPI_SC18IS602 |
402 | tristate "NXP SC18IS602/602B/603 I2C to SPI bridge" | |
403 | depends on I2C | |
404 | help | |
405 | SPI driver for NXP SC18IS602/602B/603 I2C to SPI bridge. | |
406 | ||
8051effc MD |
407 | config SPI_SH_MSIOF |
408 | tristate "SuperH MSIOF SPI controller" | |
746aeffd | 409 | depends on (SUPERH || ARCH_SHMOBILE) && HAVE_CLK |
8051effc MD |
410 | select SPI_BITBANG |
411 | help | |
746aeffd | 412 | SPI driver for SuperH and SH Mobile MSIOF blocks. |
8051effc | 413 | |
5c05dd07 YS |
414 | config SPI_SH |
415 | tristate "SuperH SPI controller" | |
dd1053a9 | 416 | depends on SUPERH || COMPILE_TEST |
5c05dd07 YS |
417 | help |
418 | SPI driver for SuperH SPI blocks. | |
419 | ||
37e46640 MD |
420 | config SPI_SH_SCI |
421 | tristate "SuperH SCI SPI controller" | |
6291fe2a | 422 | depends on SUPERH |
37e46640 MD |
423 | select SPI_BITBANG |
424 | help | |
425 | SPI driver for SuperH SCI blocks. | |
426 | ||
d1c8bbd7 KM |
427 | config SPI_SH_HSPI |
428 | tristate "SuperH HSPI controller" | |
dd1053a9 | 429 | depends on ARCH_SHMOBILE || COMPILE_TEST |
d1c8bbd7 KM |
430 | help |
431 | SPI driver for SuperH HSPI blocks. | |
432 | ||
1cc2df9d ZS |
433 | config SPI_SIRF |
434 | tristate "CSR SiRFprimaII SPI controller" | |
7668c294 | 435 | depends on SIRF_DMA |
1cc2df9d ZS |
436 | select SPI_BITBANG |
437 | help | |
438 | SPI driver for CSR SiRFprimaII SoCs | |
439 | ||
646781d3 MV |
440 | config SPI_MXS |
441 | tristate "Freescale MXS SPI controller" | |
442 | depends on ARCH_MXS | |
443 | select STMP_DEVICE | |
444 | help | |
445 | SPI driver for Freescale MXS devices. | |
446 | ||
f333a331 LD |
447 | config SPI_TEGRA114 |
448 | tristate "NVIDIA Tegra114 SPI Controller" | |
dd1053a9 | 449 | depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST |
f333a331 LD |
450 | help |
451 | SPI driver for NVIDIA Tegra114 SPI Controller interface. This controller | |
452 | is different than the older SoCs SPI controller and also register interface | |
453 | get changed with this controller. | |
454 | ||
8528547b LD |
455 | config SPI_TEGRA20_SFLASH |
456 | tristate "Nvidia Tegra20 Serial flash Controller" | |
dd1053a9 | 457 | depends on ARCH_TEGRA || COMPILE_TEST |
8528547b LD |
458 | help |
459 | SPI driver for Nvidia Tegra20 Serial flash Controller interface. | |
460 | The main usecase of this controller is to use spi flash as boot | |
461 | device. | |
462 | ||
dc4dc360 LD |
463 | config SPI_TEGRA20_SLINK |
464 | tristate "Nvidia Tegra20/Tegra30 SLINK Controller" | |
dd1053a9 | 465 | depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST |
dc4dc360 LD |
466 | help |
467 | SPI driver for Nvidia Tegra20/Tegra30 SLINK Controller interface. | |
468 | ||
a72aeefe CC |
469 | config SPI_TI_SSP |
470 | tristate "TI Sequencer Serial Port - SPI Support" | |
471 | depends on MFD_TI_SSP | |
472 | help | |
473 | This selects an SPI master implementation using a TI sequencer | |
474 | serial port. | |
475 | ||
e8b17b5b | 476 | config SPI_TOPCLIFF_PCH |
92b3a5c1 | 477 | tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) SPI" |
e8b17b5b MO |
478 | depends on PCI |
479 | help | |
cdbc8f04 GL |
480 | SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus |
481 | used in some x86 embedded processors. | |
e8b17b5b | 482 | |
92b3a5c1 TM |
483 | This driver also supports the ML7213/ML7223/ML7831, a companion chip |
484 | for the Atom E6xx series and compatible with the Intel EG20T PCH. | |
f016aeb6 | 485 | |
f2cac67d AN |
486 | config SPI_TXX9 |
487 | tristate "Toshiba TXx9 SPI controller" | |
dd1053a9 | 488 | depends on GPIOLIB && (CPU_TX49XX || COMPILE_TEST) |
f2cac67d AN |
489 | help |
490 | SPI driver for Toshiba TXx9 MIPS SoCs | |
491 | ||
b3165900 LPC |
492 | config SPI_XCOMM |
493 | tristate "Analog Devices AD-FMCOMMS1-EBZ SPI-I2C-bridge driver" | |
494 | depends on I2C | |
495 | help | |
496 | Support for the SPI-I2C bridge found on the Analog Devices | |
497 | AD-FMCOMMS1-EBZ board. | |
498 | ||
ae918c02 | 499 | config SPI_XILINX |
c9da2e12 | 500 | tristate "Xilinx SPI controller common module" |
6d1f56aa | 501 | depends on HAS_IOMEM |
ae918c02 AK |
502 | select SPI_BITBANG |
503 | help | |
504 | This exposes the SPI controller IP from the Xilinx EDK. | |
505 | ||
506 | See the "OPB Serial Peripheral Interface (SPI) (v1.00e)" | |
507 | Product Specification document (DS464) for hardware details. | |
508 | ||
c9da2e12 RR |
509 | Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)" |
510 | ||
30eaed05 WZ |
511 | config SPI_NUC900 |
512 | tristate "Nuvoton NUC900 series SPI" | |
6d1f56aa | 513 | depends on ARCH_W90X900 |
30eaed05 WZ |
514 | select SPI_BITBANG |
515 | help | |
516 | SPI driver for Nuvoton NUC900 series ARM SoCs | |
517 | ||
8ae12a0d DB |
518 | # |
519 | # Add new SPI master controllers in alphabetical order above this line | |
520 | # | |
521 | ||
e24c7452 | 522 | config SPI_DESIGNWARE |
8ca8d15a | 523 | tristate "DesignWare SPI controller core support" |
e24c7452 FT |
524 | help |
525 | general driver for SPI controller core from DesignWare | |
526 | ||
527 | config SPI_DW_PCI | |
528 | tristate "PCI interface driver for DW SPI core" | |
529 | depends on SPI_DESIGNWARE && PCI | |
530 | ||
7063c0d9 FT |
531 | config SPI_DW_MID_DMA |
532 | bool "DMA support for DW SPI controller on Intel Moorestown platform" | |
533 | depends on SPI_DW_PCI && INTEL_MID_DMAC | |
534 | ||
f7b6fd6d JHD |
535 | config SPI_DW_MMIO |
536 | tristate "Memory-mapped io interface driver for DW SPI core" | |
212b3c8b | 537 | depends on SPI_DESIGNWARE && HAVE_CLK |
f7b6fd6d | 538 | |
8ae12a0d DB |
539 | # |
540 | # There are lots of SPI device types, with sensors and memory | |
541 | # being probably the most widely used ones. | |
542 | # | |
543 | comment "SPI Protocol Masters" | |
8ae12a0d | 544 | |
814a8d50 AP |
545 | config SPI_SPIDEV |
546 | tristate "User mode SPI device driver support" | |
814a8d50 AP |
547 | help |
548 | This supports user mode SPI protocol drivers. | |
549 | ||
550 | Note that this application programming interface is EXPERIMENTAL | |
551 | and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes. | |
552 | ||
447aef1a BD |
553 | config SPI_TLE62X0 |
554 | tristate "Infineon TLE62X0 (for power switching)" | |
6291fe2a | 555 | depends on SYSFS |
447aef1a BD |
556 | help |
557 | SPI driver for Infineon TLE62X0 series line driver chips, | |
558 | such as the TLE6220, TLE6230 and TLE6240. This provides a | |
559 | sysfs interface, with each line presented as a kind of GPIO | |
560 | exposing both switch control and diagnostic feedback. | |
561 | ||
8ae12a0d DB |
562 | # |
563 | # Add new SPI protocol masters in alphabetical order above this line | |
564 | # | |
565 | ||
6291fe2a RD |
566 | endif # SPI_MASTER |
567 | ||
8ae12a0d DB |
568 | # (slave support would go here) |
569 | ||
79d8c7a8 | 570 | endif # SPI |