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0b782531 TC |
1 | /* |
2 | * Altera SPI driver | |
3 | * | |
4 | * Copyright (C) 2008 Thomas Chou <thomas@wytron.com.tw> | |
5 | * | |
6 | * Based on spi_s3c24xx.c, which is: | |
7 | * Copyright (c) 2006 Ben Dooks | |
8 | * Copyright (c) 2006 Simtec Electronics | |
9 | * Ben Dooks <ben@simtec.co.uk> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
16 | #include <linux/init.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/errno.h> | |
d7614de4 | 19 | #include <linux/module.h> |
0b782531 TC |
20 | #include <linux/platform_device.h> |
21 | #include <linux/spi/spi.h> | |
22 | #include <linux/spi/spi_bitbang.h> | |
23 | #include <linux/io.h> | |
24 | #include <linux/of.h> | |
25 | ||
26 | #define DRV_NAME "spi_altera" | |
27 | ||
28 | #define ALTERA_SPI_RXDATA 0 | |
29 | #define ALTERA_SPI_TXDATA 4 | |
30 | #define ALTERA_SPI_STATUS 8 | |
31 | #define ALTERA_SPI_CONTROL 12 | |
32 | #define ALTERA_SPI_SLAVE_SEL 20 | |
33 | ||
34 | #define ALTERA_SPI_STATUS_ROE_MSK 0x8 | |
35 | #define ALTERA_SPI_STATUS_TOE_MSK 0x10 | |
36 | #define ALTERA_SPI_STATUS_TMT_MSK 0x20 | |
37 | #define ALTERA_SPI_STATUS_TRDY_MSK 0x40 | |
38 | #define ALTERA_SPI_STATUS_RRDY_MSK 0x80 | |
39 | #define ALTERA_SPI_STATUS_E_MSK 0x100 | |
40 | ||
41 | #define ALTERA_SPI_CONTROL_IROE_MSK 0x8 | |
42 | #define ALTERA_SPI_CONTROL_ITOE_MSK 0x10 | |
43 | #define ALTERA_SPI_CONTROL_ITRDY_MSK 0x40 | |
44 | #define ALTERA_SPI_CONTROL_IRRDY_MSK 0x80 | |
45 | #define ALTERA_SPI_CONTROL_IE_MSK 0x100 | |
46 | #define ALTERA_SPI_CONTROL_SSO_MSK 0x400 | |
47 | ||
48 | struct altera_spi { | |
49 | /* bitbang has to be first */ | |
50 | struct spi_bitbang bitbang; | |
51 | struct completion done; | |
52 | ||
53 | void __iomem *base; | |
54 | int irq; | |
55 | int len; | |
56 | int count; | |
57 | int bytes_per_word; | |
58 | unsigned long imr; | |
59 | ||
60 | /* data buffers */ | |
61 | const unsigned char *tx; | |
62 | unsigned char *rx; | |
63 | }; | |
64 | ||
65 | static inline struct altera_spi *altera_spi_to_hw(struct spi_device *sdev) | |
66 | { | |
67 | return spi_master_get_devdata(sdev->master); | |
68 | } | |
69 | ||
70 | static void altera_spi_chipsel(struct spi_device *spi, int value) | |
71 | { | |
72 | struct altera_spi *hw = altera_spi_to_hw(spi); | |
73 | ||
74 | if (spi->mode & SPI_CS_HIGH) { | |
75 | switch (value) { | |
76 | case BITBANG_CS_INACTIVE: | |
77 | writel(1 << spi->chip_select, | |
78 | hw->base + ALTERA_SPI_SLAVE_SEL); | |
79 | hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK; | |
80 | writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); | |
81 | break; | |
82 | ||
83 | case BITBANG_CS_ACTIVE: | |
84 | hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK; | |
85 | writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); | |
86 | writel(0, hw->base + ALTERA_SPI_SLAVE_SEL); | |
87 | break; | |
88 | } | |
89 | } else { | |
90 | switch (value) { | |
91 | case BITBANG_CS_INACTIVE: | |
92 | hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK; | |
93 | writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); | |
94 | break; | |
95 | ||
96 | case BITBANG_CS_ACTIVE: | |
97 | writel(1 << spi->chip_select, | |
98 | hw->base + ALTERA_SPI_SLAVE_SEL); | |
99 | hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK; | |
100 | writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); | |
101 | break; | |
102 | } | |
103 | } | |
104 | } | |
105 | ||
0b782531 TC |
106 | static inline unsigned int hw_txbyte(struct altera_spi *hw, int count) |
107 | { | |
108 | if (hw->tx) { | |
109 | switch (hw->bytes_per_word) { | |
110 | case 1: | |
111 | return hw->tx[count]; | |
112 | case 2: | |
113 | return (hw->tx[count * 2] | |
114 | | (hw->tx[count * 2 + 1] << 8)); | |
115 | } | |
116 | } | |
117 | return 0; | |
118 | } | |
119 | ||
120 | static int altera_spi_txrx(struct spi_device *spi, struct spi_transfer *t) | |
121 | { | |
122 | struct altera_spi *hw = altera_spi_to_hw(spi); | |
123 | ||
124 | hw->tx = t->tx_buf; | |
125 | hw->rx = t->rx_buf; | |
126 | hw->count = 0; | |
f073d37d | 127 | hw->bytes_per_word = DIV_ROUND_UP(t->bits_per_word, 8); |
0b782531 TC |
128 | hw->len = t->len / hw->bytes_per_word; |
129 | ||
130 | if (hw->irq >= 0) { | |
131 | /* enable receive interrupt */ | |
132 | hw->imr |= ALTERA_SPI_CONTROL_IRRDY_MSK; | |
133 | writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); | |
134 | ||
135 | /* send the first byte */ | |
136 | writel(hw_txbyte(hw, 0), hw->base + ALTERA_SPI_TXDATA); | |
137 | ||
138 | wait_for_completion(&hw->done); | |
139 | /* disable receive interrupt */ | |
140 | hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK; | |
141 | writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); | |
142 | } else { | |
72be0ee4 | 143 | while (hw->count < hw->len) { |
0b782531 TC |
144 | unsigned int rxd; |
145 | ||
72be0ee4 AL |
146 | writel(hw_txbyte(hw, hw->count), |
147 | hw->base + ALTERA_SPI_TXDATA); | |
148 | ||
0b782531 TC |
149 | while (!(readl(hw->base + ALTERA_SPI_STATUS) & |
150 | ALTERA_SPI_STATUS_RRDY_MSK)) | |
151 | cpu_relax(); | |
152 | ||
153 | rxd = readl(hw->base + ALTERA_SPI_RXDATA); | |
154 | if (hw->rx) { | |
155 | switch (hw->bytes_per_word) { | |
156 | case 1: | |
157 | hw->rx[hw->count] = rxd; | |
158 | break; | |
159 | case 2: | |
160 | hw->rx[hw->count * 2] = rxd; | |
161 | hw->rx[hw->count * 2 + 1] = rxd >> 8; | |
162 | break; | |
163 | } | |
164 | } | |
165 | ||
166 | hw->count++; | |
0b782531 | 167 | } |
0b782531 TC |
168 | } |
169 | ||
170 | return hw->count * hw->bytes_per_word; | |
171 | } | |
172 | ||
173 | static irqreturn_t altera_spi_irq(int irq, void *dev) | |
174 | { | |
175 | struct altera_spi *hw = dev; | |
176 | unsigned int rxd; | |
177 | ||
178 | rxd = readl(hw->base + ALTERA_SPI_RXDATA); | |
179 | if (hw->rx) { | |
180 | switch (hw->bytes_per_word) { | |
181 | case 1: | |
182 | hw->rx[hw->count] = rxd; | |
183 | break; | |
184 | case 2: | |
185 | hw->rx[hw->count * 2] = rxd; | |
186 | hw->rx[hw->count * 2 + 1] = rxd >> 8; | |
187 | break; | |
188 | } | |
189 | } | |
190 | ||
191 | hw->count++; | |
192 | ||
193 | if (hw->count < hw->len) | |
194 | writel(hw_txbyte(hw, hw->count), hw->base + ALTERA_SPI_TXDATA); | |
195 | else | |
196 | complete(&hw->done); | |
197 | ||
198 | return IRQ_HANDLED; | |
199 | } | |
200 | ||
fd4a319b | 201 | static int altera_spi_probe(struct platform_device *pdev) |
0b782531 TC |
202 | { |
203 | struct altera_spi_platform_data *platp = pdev->dev.platform_data; | |
204 | struct altera_spi *hw; | |
205 | struct spi_master *master; | |
206 | struct resource *res; | |
207 | int err = -ENODEV; | |
208 | ||
209 | master = spi_alloc_master(&pdev->dev, sizeof(struct altera_spi)); | |
210 | if (!master) | |
211 | return err; | |
212 | ||
213 | /* setup the master state. */ | |
214 | master->bus_num = pdev->id; | |
215 | master->num_chipselect = 16; | |
216 | master->mode_bits = SPI_CS_HIGH; | |
0b782531 TC |
217 | |
218 | hw = spi_master_get_devdata(master); | |
219 | platform_set_drvdata(pdev, hw); | |
220 | ||
221 | /* setup the state for the bitbang driver */ | |
222 | hw->bitbang.master = spi_master_get(master); | |
223 | if (!hw->bitbang.master) | |
224 | return err; | |
0b782531 TC |
225 | hw->bitbang.chipselect = altera_spi_chipsel; |
226 | hw->bitbang.txrx_bufs = altera_spi_txrx; | |
227 | ||
228 | /* find and map our resources */ | |
229 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
b3136f8f JL |
230 | hw->base = devm_ioremap_resource(&pdev->dev, res); |
231 | if (IS_ERR(hw->base)) { | |
232 | err = PTR_ERR(hw->base); | |
233 | goto exit; | |
234 | } | |
0b782531 TC |
235 | /* program defaults into the registers */ |
236 | hw->imr = 0; /* disable spi interrupts */ | |
237 | writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); | |
238 | writel(0, hw->base + ALTERA_SPI_STATUS); /* clear status reg */ | |
239 | if (readl(hw->base + ALTERA_SPI_STATUS) & ALTERA_SPI_STATUS_RRDY_MSK) | |
240 | readl(hw->base + ALTERA_SPI_RXDATA); /* flush rxdata */ | |
241 | /* irq is optional */ | |
242 | hw->irq = platform_get_irq(pdev, 0); | |
243 | if (hw->irq >= 0) { | |
244 | init_completion(&hw->done); | |
245 | err = devm_request_irq(&pdev->dev, hw->irq, altera_spi_irq, 0, | |
246 | pdev->name, hw); | |
247 | if (err) | |
248 | goto exit; | |
249 | } | |
250 | /* find platform data */ | |
251 | if (!platp) | |
252 | hw->bitbang.master->dev.of_node = pdev->dev.of_node; | |
253 | ||
254 | /* register our spi controller */ | |
255 | err = spi_bitbang_start(&hw->bitbang); | |
256 | if (err) | |
257 | goto exit; | |
258 | dev_info(&pdev->dev, "base %p, irq %d\n", hw->base, hw->irq); | |
259 | ||
260 | return 0; | |
0b782531 | 261 | exit: |
0b782531 TC |
262 | spi_master_put(master); |
263 | return err; | |
264 | } | |
265 | ||
fd4a319b | 266 | static int altera_spi_remove(struct platform_device *dev) |
0b782531 TC |
267 | { |
268 | struct altera_spi *hw = platform_get_drvdata(dev); | |
269 | struct spi_master *master = hw->bitbang.master; | |
270 | ||
271 | spi_bitbang_stop(&hw->bitbang); | |
0b782531 TC |
272 | spi_master_put(master); |
273 | return 0; | |
274 | } | |
275 | ||
276 | #ifdef CONFIG_OF | |
277 | static const struct of_device_id altera_spi_match[] = { | |
278 | { .compatible = "ALTR,spi-1.0", }, | |
279 | {}, | |
280 | }; | |
281 | MODULE_DEVICE_TABLE(of, altera_spi_match); | |
0b782531 TC |
282 | #endif /* CONFIG_OF */ |
283 | ||
284 | static struct platform_driver altera_spi_driver = { | |
285 | .probe = altera_spi_probe, | |
fd4a319b | 286 | .remove = altera_spi_remove, |
0b782531 TC |
287 | .driver = { |
288 | .name = DRV_NAME, | |
289 | .owner = THIS_MODULE, | |
290 | .pm = NULL, | |
89f98dc5 | 291 | .of_match_table = of_match_ptr(altera_spi_match), |
0b782531 TC |
292 | }, |
293 | }; | |
940ab889 | 294 | module_platform_driver(altera_spi_driver); |
0b782531 TC |
295 | |
296 | MODULE_DESCRIPTION("Altera SPI driver"); | |
297 | MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>"); | |
298 | MODULE_LICENSE("GPL"); | |
299 | MODULE_ALIAS("platform:" DRV_NAME); |