Commit | Line | Data |
---|---|---|
161b96c3 AS |
1 | /* |
2 | * CLPS711X SPI bus driver | |
3 | * | |
98984796 | 4 | * Copyright (C) 2012-2014 Alexander Shiyan <shc_work@mail.ru> |
161b96c3 AS |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/io.h> | |
13 | #include <linux/clk.h> | |
14 | #include <linux/init.h> | |
15 | #include <linux/gpio.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/platform_device.h> | |
20 | #include <linux/spi/spi.h> | |
21 | #include <linux/platform_data/spi-clps711x.h> | |
22 | ||
23 | #include <mach/hardware.h> | |
24 | ||
25 | #define DRIVER_NAME "spi-clps711x" | |
26 | ||
27 | struct spi_clps711x_data { | |
161b96c3 AS |
28 | struct clk *spi_clk; |
29 | u32 max_speed_hz; | |
30 | ||
31 | u8 *tx_buf; | |
32 | u8 *rx_buf; | |
8dda9d9a | 33 | unsigned int bpw; |
161b96c3 | 34 | int len; |
161b96c3 AS |
35 | }; |
36 | ||
37 | static int spi_clps711x_setup(struct spi_device *spi) | |
38 | { | |
161b96c3 | 39 | /* We are expect that SPI-device is not selected */ |
3e9ea4b4 | 40 | gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); |
161b96c3 AS |
41 | |
42 | return 0; | |
43 | } | |
44 | ||
8dda9d9a AS |
45 | static void spi_clps711x_setup_xfer(struct spi_device *spi, |
46 | struct spi_transfer *xfer) | |
161b96c3 | 47 | { |
161b96c3 AS |
48 | struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master); |
49 | ||
161b96c3 | 50 | /* Setup SPI frequency divider */ |
bed890b4 | 51 | if (!xfer->speed_hz || (xfer->speed_hz >= hw->max_speed_hz)) |
161b96c3 AS |
52 | clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) | |
53 | SYSCON1_ADCKSEL(3), SYSCON1); | |
bed890b4 | 54 | else if (xfer->speed_hz >= (hw->max_speed_hz / 2)) |
161b96c3 AS |
55 | clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) | |
56 | SYSCON1_ADCKSEL(2), SYSCON1); | |
bed890b4 | 57 | else if (xfer->speed_hz >= (hw->max_speed_hz / 8)) |
161b96c3 AS |
58 | clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) | |
59 | SYSCON1_ADCKSEL(1), SYSCON1); | |
60 | else | |
61 | clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) | | |
62 | SYSCON1_ADCKSEL(0), SYSCON1); | |
161b96c3 AS |
63 | } |
64 | ||
bf5c2e27 AL |
65 | static int spi_clps711x_prepare_message(struct spi_master *master, |
66 | struct spi_message *msg) | |
161b96c3 | 67 | { |
8dda9d9a | 68 | struct spi_device *spi = msg->spi; |
161b96c3 | 69 | |
bf5c2e27 AL |
70 | /* Setup edge for transfer */ |
71 | if (spi->mode & SPI_CPHA) | |
72 | clps_writew(clps_readw(SYSCON3) | SYSCON3_ADCCKNSEN, SYSCON3); | |
73 | else | |
74 | clps_writew(clps_readw(SYSCON3) & ~SYSCON3_ADCCKNSEN, SYSCON3); | |
161b96c3 | 75 | |
bf5c2e27 AL |
76 | return 0; |
77 | } | |
161b96c3 | 78 | |
bf5c2e27 AL |
79 | static int spi_clps711x_transfer_one(struct spi_master *master, |
80 | struct spi_device *spi, | |
81 | struct spi_transfer *xfer) | |
82 | { | |
83 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); | |
84 | u8 data; | |
161b96c3 | 85 | |
bf5c2e27 | 86 | spi_clps711x_setup_xfer(spi, xfer); |
161b96c3 | 87 | |
bf5c2e27 | 88 | hw->len = xfer->len; |
bed890b4 | 89 | hw->bpw = xfer->bits_per_word; |
bf5c2e27 AL |
90 | hw->tx_buf = (u8 *)xfer->tx_buf; |
91 | hw->rx_buf = (u8 *)xfer->rx_buf; | |
161b96c3 | 92 | |
bf5c2e27 AL |
93 | /* Initiate transfer */ |
94 | data = hw->tx_buf ? *hw->tx_buf++ : 0; | |
95 | clps_writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, SYNCIO); | |
96 | return 1; | |
161b96c3 AS |
97 | } |
98 | ||
99 | static irqreturn_t spi_clps711x_isr(int irq, void *dev_id) | |
100 | { | |
bf5c2e27 AL |
101 | struct spi_master *master = dev_id; |
102 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); | |
c7a26f12 | 103 | u8 data; |
161b96c3 AS |
104 | |
105 | /* Handle RX */ | |
106 | data = clps_readb(SYNCIO); | |
107 | if (hw->rx_buf) | |
c7a26f12 | 108 | *hw->rx_buf++ = data; |
161b96c3 AS |
109 | |
110 | /* Handle TX */ | |
c7a26f12 AS |
111 | if (--hw->len > 0) { |
112 | data = hw->tx_buf ? *hw->tx_buf++ : 0; | |
8dda9d9a AS |
113 | clps_writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, |
114 | SYNCIO); | |
161b96c3 | 115 | } else |
bf5c2e27 | 116 | spi_finalize_current_transfer(master); |
161b96c3 AS |
117 | |
118 | return IRQ_HANDLED; | |
119 | } | |
120 | ||
fd4a319b | 121 | static int spi_clps711x_probe(struct platform_device *pdev) |
161b96c3 AS |
122 | { |
123 | int i, ret; | |
124 | struct spi_master *master; | |
125 | struct spi_clps711x_data *hw; | |
126 | struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev); | |
127 | ||
128 | if (!pdata) { | |
129 | dev_err(&pdev->dev, "No platform data supplied\n"); | |
130 | return -EINVAL; | |
131 | } | |
132 | ||
133 | if (pdata->num_chipselect < 1) { | |
134 | dev_err(&pdev->dev, "At least one CS must be defined\n"); | |
135 | return -EINVAL; | |
136 | } | |
137 | ||
3e9ea4b4 AS |
138 | master = spi_alloc_master(&pdev->dev, sizeof(*hw)); |
139 | if (!master) | |
161b96c3 | 140 | return -ENOMEM; |
3e9ea4b4 AS |
141 | |
142 | master->cs_gpios = devm_kzalloc(&pdev->dev, sizeof(int) * | |
143 | pdata->num_chipselect, GFP_KERNEL); | |
144 | if (!master->cs_gpios) { | |
145 | ret = -ENOMEM; | |
146 | goto err_out; | |
161b96c3 AS |
147 | } |
148 | ||
149 | master->bus_num = pdev->id; | |
150 | master->mode_bits = SPI_CPHA | SPI_CS_HIGH; | |
8dda9d9a | 151 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 8); |
161b96c3 AS |
152 | master->num_chipselect = pdata->num_chipselect; |
153 | master->setup = spi_clps711x_setup; | |
bf5c2e27 AL |
154 | master->prepare_message = spi_clps711x_prepare_message; |
155 | master->transfer_one = spi_clps711x_transfer_one; | |
161b96c3 AS |
156 | |
157 | hw = spi_master_get_devdata(master); | |
158 | ||
159 | for (i = 0; i < master->num_chipselect; i++) { | |
3e9ea4b4 | 160 | master->cs_gpios[i] = pdata->chipselect[i]; |
fcba212d AL |
161 | ret = devm_gpio_request(&pdev->dev, master->cs_gpios[i], |
162 | DRIVER_NAME); | |
163 | if (ret) { | |
161b96c3 | 164 | dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i); |
161b96c3 AS |
165 | goto err_out; |
166 | } | |
167 | } | |
168 | ||
169 | hw->spi_clk = devm_clk_get(&pdev->dev, "spi"); | |
170 | if (IS_ERR(hw->spi_clk)) { | |
171 | dev_err(&pdev->dev, "Can't get clocks\n"); | |
172 | ret = PTR_ERR(hw->spi_clk); | |
173 | goto err_out; | |
174 | } | |
175 | hw->max_speed_hz = clk_get_rate(hw->spi_clk); | |
176 | ||
161b96c3 AS |
177 | platform_set_drvdata(pdev, master); |
178 | ||
179 | /* Disable extended mode due hardware problems */ | |
180 | clps_writew(clps_readw(SYSCON3) & ~SYSCON3_ADCCON, SYSCON3); | |
181 | ||
182 | /* Clear possible pending interrupt */ | |
183 | clps_readl(SYNCIO); | |
184 | ||
185 | ret = devm_request_irq(&pdev->dev, IRQ_SSEOTI, spi_clps711x_isr, 0, | |
bf5c2e27 | 186 | dev_name(&pdev->dev), master); |
161b96c3 AS |
187 | if (ret) { |
188 | dev_err(&pdev->dev, "Can't request IRQ\n"); | |
c7083790 | 189 | goto err_out; |
161b96c3 AS |
190 | } |
191 | ||
c493fc4b | 192 | ret = devm_spi_register_master(&pdev->dev, master); |
161b96c3 AS |
193 | if (!ret) { |
194 | dev_info(&pdev->dev, | |
195 | "SPI bus driver initialized. Master clock %u Hz\n", | |
196 | hw->max_speed_hz); | |
197 | return 0; | |
198 | } | |
199 | ||
200 | dev_err(&pdev->dev, "Failed to register master\n"); | |
161b96c3 | 201 | |
161b96c3 | 202 | err_out: |
161b96c3 | 203 | spi_master_put(master); |
161b96c3 AS |
204 | |
205 | return ret; | |
206 | } | |
207 | ||
161b96c3 AS |
208 | static struct platform_driver clps711x_spi_driver = { |
209 | .driver = { | |
210 | .name = DRIVER_NAME, | |
211 | .owner = THIS_MODULE, | |
212 | }, | |
213 | .probe = spi_clps711x_probe, | |
161b96c3 AS |
214 | }; |
215 | module_platform_driver(clps711x_spi_driver); | |
216 | ||
217 | MODULE_LICENSE("GPL"); | |
218 | MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>"); | |
219 | MODULE_DESCRIPTION("CLPS711X SPI bus driver"); | |
350a9b33 | 220 | MODULE_ALIAS("platform:" DRIVER_NAME); |