[deliverable/linux.git] / drivers / spi / spi-sc18is602.c

/*
 * NXP SC18IS602/603 SPI driver
 *
 * Copyright (C) Guenter Roeck <linux@roeck-us.net>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/kernel.h>
#include <linux/err.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <linux/pm_runtime.h>
#include <linux/of.h>
#include <linux/platform_data/sc18is602.h>

enum chips { sc18is602, sc18is602b, sc18is603 };

#define SC18IS602_BUFSIZ		200
#define SC18IS602_CLOCK			7372000

#define SC18IS602_MODE_CPHA		BIT(2)
#define SC18IS602_MODE_CPOL		BIT(3)
#define SC18IS602_MODE_LSB_FIRST	BIT(5)
#define SC18IS602_MODE_CLOCK_DIV_4	0x0
#define SC18IS602_MODE_CLOCK_DIV_16	0x1
#define SC18IS602_MODE_CLOCK_DIV_64	0x2
#define SC18IS602_MODE_CLOCK_DIV_128	0x3

struct sc18is602 {
	struct spi_master	*master;
	struct device		*dev;
	u8			ctrl;
	u32			freq;
	u32			speed;

	/* I2C data */
	struct i2c_client	*client;
	enum chips		id;
	u8			buffer[SC18IS602_BUFSIZ + 1];
	int			tlen;	/* Data queued for tx in buffer */
	int			rindex;	/* Receive data index in buffer */
};

static int sc18is602_wait_ready(struct sc18is602 *hw, int len)
{
	int i, err;
	int usecs = 1000000 * len / hw->speed + 1;
	u8 dummy[1];

	for (i = 0; i < 10; i++) {
		err = i2c_master_recv(hw->client, dummy, 1);
		if (err >= 0)
			return 0;
		usleep_range(usecs, usecs * 2);
	}
	return -ETIMEDOUT;
}

static int sc18is602_txrx(struct sc18is602 *hw, struct spi_message *msg,
			  struct spi_transfer *t, bool do_transfer)
{
	unsigned int len = t->len;
	int ret;

	if (hw->tlen == 0) {
		/* First byte (I2C command) is chip select */
		hw->buffer[0] = 1 << msg->spi->chip_select;
		hw->tlen = 1;
		hw->rindex = 0;
	}
	/*
	 * We can not immediately send data to the chip, since each I2C message
	 * resembles a full SPI message (from CS active to CS inactive).
	 * Enqueue messages up to the first read or until do_transfer is true.
	 */
	if (t->tx_buf) {
		memcpy(&hw->buffer[hw->tlen], t->tx_buf, len);
		hw->tlen += len;
		if (t->rx_buf)
			do_transfer = true;
		else
			hw->rindex = hw->tlen - 1;
	} else if (t->rx_buf) {
		/*
		 * For receive-only transfers we still need to perform a dummy
		 * write to receive data from the SPI chip.
		 * Read data starts at the end of transmit data (minus 1 to
		 * account for CS).
		 */
		hw->rindex = hw->tlen - 1;
		memset(&hw->buffer[hw->tlen], 0, len);
		hw->tlen += len;
		do_transfer = true;
	}

	if (do_transfer && hw->tlen > 1) {
		ret = sc18is602_wait_ready(hw, SC18IS602_BUFSIZ);
		if (ret < 0)
			return ret;
		ret = i2c_master_send(hw->client, hw->buffer, hw->tlen);
		if (ret < 0)
			return ret;
		if (ret != hw->tlen)
			return -EIO;

		if (t->rx_buf) {
			int rlen = hw->rindex + len;

			ret = sc18is602_wait_ready(hw, hw->tlen);
			if (ret < 0)
				return ret;
			ret = i2c_master_recv(hw->client, hw->buffer, rlen);
			if (ret < 0)
				return ret;
			if (ret != rlen)
				return -EIO;
			memcpy(t->rx_buf, &hw->buffer[hw->rindex], len);
		}
		hw->tlen = 0;
	}
	return len;
}

static int sc18is602_setup_transfer(struct sc18is602 *hw, u32 hz, u8 mode)
{
	u8 ctrl = 0;
	int ret;

	if (mode & SPI_CPHA)
		ctrl |= SC18IS602_MODE_CPHA;
	if (mode & SPI_CPOL)
		ctrl |= SC18IS602_MODE_CPOL;
	if (mode & SPI_LSB_FIRST)
		ctrl |= SC18IS602_MODE_LSB_FIRST;

	/* Find the closest clock speed */
	if (hz >= hw->freq / 4) {
		ctrl |= SC18IS602_MODE_CLOCK_DIV_4;
		hw->speed = hw->freq / 4;
	} else if (hz >= hw->freq / 16) {
		ctrl |= SC18IS602_MODE_CLOCK_DIV_16;
		hw->speed = hw->freq / 16;
	} else if (hz >= hw->freq / 64) {
		ctrl |= SC18IS602_MODE_CLOCK_DIV_64;
		hw->speed = hw->freq / 64;
	} else {
		ctrl |= SC18IS602_MODE_CLOCK_DIV_128;
		hw->speed = hw->freq / 128;
	}

	/*
	 * Don't do anything if the control value did not change. The initial
	 * value of 0xff for hw->ctrl ensures that the correct mode will be set
	 * with the first call to this function.
	 */
	if (ctrl == hw->ctrl)
		return 0;

	ret = i2c_smbus_write_byte_data(hw->client, 0xf0, ctrl);
	if (ret < 0)
		return ret;

	hw->ctrl = ctrl;

	return 0;
}

static int sc18is602_check_transfer(struct spi_device *spi,
				    struct spi_transfer *t, int tlen)
{
	uint32_t hz;

	if (t && t->len + tlen > SC18IS602_BUFSIZ)
		return -EINVAL;

	hz = spi->max_speed_hz;
	if (t && t->speed_hz)
		hz = t->speed_hz;
	if (hz == 0)
		return -EINVAL;

	return 0;
}

static int sc18is602_transfer_one(struct spi_master *master,
				  struct spi_message *m)
{
	struct sc18is602 *hw = spi_master_get_devdata(master);
	struct spi_device *spi = m->spi;
	struct spi_transfer *t;
	int status = 0;

	hw->tlen = 0;
	list_for_each_entry(t, &m->transfers, transfer_list) {
		u32 hz = t->speed_hz ? : spi->max_speed_hz;
		bool do_transfer;

		status = sc18is602_check_transfer(spi, t, hw->tlen);
		if (status < 0)
			break;

		status = sc18is602_setup_transfer(hw, hz, spi->mode);
		if (status < 0)
			break;

		do_transfer = t->cs_change || list_is_last(&t->transfer_list,
							   &m->transfers);

		if (t->len) {
			status = sc18is602_txrx(hw, m, t, do_transfer);
			if (status < 0)
				break;
			m->actual_length += status;
		}
		status = 0;

		if (t->delay_usecs)
			udelay(t->delay_usecs);
	}
	m->status = status;
	spi_finalize_current_message(master);

	return status;
}

static int sc18is602_setup(struct spi_device *spi)
{
	struct sc18is602 *hw = spi_master_get_devdata(spi->master);

	/* SC18IS602 does not support CS2 */
	if (hw->id == sc18is602 && spi->chip_select == 2)
		return -ENXIO;

	return 0;
}

static int sc18is602_probe(struct i2c_client *client,
			   const struct i2c_device_id *id)
{
	struct device *dev = &client->dev;
	struct device_node *np = dev->of_node;
	struct sc18is602_platform_data *pdata = dev_get_platdata(dev);
	struct sc18is602 *hw;
	struct spi_master *master;
	int error;

	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
				     I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
		return -EINVAL;

	master = spi_alloc_master(dev, sizeof(struct sc18is602));
	if (!master)
		return -ENOMEM;

	hw = spi_master_get_devdata(master);
	i2c_set_clientdata(client, hw);

	hw->master = master;
	hw->client = client;
	hw->dev = dev;
	hw->ctrl = 0xff;

	hw->id = id->driver_data;

	switch (hw->id) {
	case sc18is602:
	case sc18is602b:
		master->num_chipselect = 4;
		hw->freq = SC18IS602_CLOCK;
		break;
	case sc18is603:
		master->num_chipselect = 2;
		if (pdata) {
			hw->freq = pdata->clock_frequency;
		} else {
			const __be32 *val;
			int len;

			val = of_get_property(np, "clock-frequency", &len);
			if (val && len >= sizeof(__be32))
				hw->freq = be32_to_cpup(val);
		}
		if (!hw->freq)
			hw->freq = SC18IS602_CLOCK;
		break;
	}
	master->bus_num = client->adapter->nr;
	master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST;
	master->bits_per_word_mask = SPI_BPW_MASK(8);
	master->setup = sc18is602_setup;
	master->transfer_one_message = sc18is602_transfer_one;
	master->dev.of_node = np;

	error = devm_spi_register_master(dev, master);
	if (error)
		goto error_reg;

	return 0;

error_reg:
	spi_master_put(master);
	return error;
}

static const struct i2c_device_id sc18is602_id[] = {
	{ "sc18is602", sc18is602 },
	{ "sc18is602b", sc18is602b },
	{ "sc18is603", sc18is603 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, sc18is602_id);

static struct i2c_driver sc18is602_driver = {
	.driver = {
		.name = "sc18is602",
	},
	.probe = sc18is602_probe,
	.id_table = sc18is602_id,
};

module_i2c_driver(sc18is602_driver);

MODULE_DESCRIPTION("SC18IC602/603 SPI Master Driver");
MODULE_AUTHOR("Guenter Roeck");
MODULE_LICENSE("GPL");
Commit	Line	Data
3ce8859e GR	1	/*
	2	* NXP SC18IS602/603 SPI driver
	3	*
	4	* Copyright (C) Guenter Roeck <linux@roeck-us.net>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*/
	20
	21	#include <linux/kernel.h>
	22	#include <linux/err.h>
	23	#include <linux/module.h>
	24	#include <linux/spi/spi.h>
	25	#include <linux/i2c.h>
	26	#include <linux/delay.h>
	27	#include <linux/pm_runtime.h>
	28	#include <linux/of.h>
	29	#include <linux/platform_data/sc18is602.h>
	30
	31	enum chips { sc18is602, sc18is602b, sc18is603 };
	32
	33	#define SC18IS602_BUFSIZ 200
	34	#define SC18IS602_CLOCK 7372000
	35
	36	#define SC18IS602_MODE_CPHA BIT(2)
	37	#define SC18IS602_MODE_CPOL BIT(3)
	38	#define SC18IS602_MODE_LSB_FIRST BIT(5)
	39	#define SC18IS602_MODE_CLOCK_DIV_4 0x0
	40	#define SC18IS602_MODE_CLOCK_DIV_16 0x1
	41	#define SC18IS602_MODE_CLOCK_DIV_64 0x2
	42	#define SC18IS602_MODE_CLOCK_DIV_128 0x3
	43
	44	struct sc18is602 {
	45	struct spi_master *master;
	46	struct device *dev;
	47	u8 ctrl;
	48	u32 freq;
	49	u32 speed;
	50
	51	/* I2C data */
	52	struct i2c_client *client;
	53	enum chips id;
	54	u8 buffer[SC18IS602_BUFSIZ + 1];
	55	int tlen; /* Data queued for tx in buffer */
	56	int rindex; /* Receive data index in buffer */
	57	};
	58
	59	static int sc18is602_wait_ready(struct sc18is602 *hw, int len)
	60	{
	61	int i, err;
	62	int usecs = 1000000 * len / hw->speed + 1;
	63	u8 dummy[1];
	64
65	for (i = 0; i < 10; i++) {
66	err = i2c_master_recv(hw->client, dummy, 1);
67	if (err >= 0)
68	return 0;
69	usleep_range(usecs, usecs * 2);
70	}
71	return -ETIMEDOUT;
72	}
73
74	static int sc18is602_txrx(struct sc18is602 hw, struct spi_message msg,
75	struct spi_transfer *t, bool do_transfer)
76	{
77	unsigned int len = t->len;
78	int ret;
79
80	if (hw->tlen == 0) {
81	/* First byte (I2C command) is chip select */
82	hw->buffer[0] = 1 << msg->spi->chip_select;
83	hw->tlen = 1;
84	hw->rindex = 0;
85	}
86	/*
87	* We can not immediately send data to the chip, since each I2C message
88	* resembles a full SPI message (from CS active to CS inactive).
89	* Enqueue messages up to the first read or until do_transfer is true.
90	*/
91	if (t->tx_buf) {
92	memcpy(&hw->buffer[hw->tlen], t->tx_buf, len);
93	hw->tlen += len;
94	if (t->rx_buf)
95	do_transfer = true;
96	else
97	hw->rindex = hw->tlen - 1;
98	} else if (t->rx_buf) {
99	/*
100	* For receive-only transfers we still need to perform a dummy
101	* write to receive data from the SPI chip.
102	* Read data starts at the end of transmit data (minus 1 to
103	* account for CS).
104	*/
105	hw->rindex = hw->tlen - 1;
106	memset(&hw->buffer[hw->tlen], 0, len);
107	hw->tlen += len;
108	do_transfer = true;
109	}
110
111	if (do_transfer && hw->tlen > 1) {
112	ret = sc18is602_wait_ready(hw, SC18IS602_BUFSIZ);
113	if (ret < 0)
114	return ret;
115	ret = i2c_master_send(hw->client, hw->buffer, hw->tlen);
116	if (ret < 0)
117	return ret;
118	if (ret != hw->tlen)
119	return -EIO;
120
121	if (t->rx_buf) {
122	int rlen = hw->rindex + len;
123
124	ret = sc18is602_wait_ready(hw, hw->tlen);
125	if (ret < 0)
126	return ret;
127	ret = i2c_master_recv(hw->client, hw->buffer, rlen);
128	if (ret < 0)
129	return ret;
130	if (ret != rlen)
131	return -EIO;
132	memcpy(t->rx_buf, &hw->buffer[hw->rindex], len);
133	}
134	hw->tlen = 0;
135	}
136	return len;
137	}
138
139	static int sc18is602_setup_transfer(struct sc18is602 *hw, u32 hz, u8 mode)
140	{
141	u8 ctrl = 0;
142	int ret;
143
144	if (mode & SPI_CPHA)
145	ctrl \|= SC18IS602_MODE_CPHA;
146	if (mode & SPI_CPOL)
147	ctrl \|= SC18IS602_MODE_CPOL;
148	if (mode & SPI_LSB_FIRST)
149	ctrl \|= SC18IS602_MODE_LSB_FIRST;
150
151	/* Find the closest clock speed */
152	if (hz >= hw->freq / 4) {
153	ctrl \|= SC18IS602_MODE_CLOCK_DIV_4;
154	hw->speed = hw->freq / 4;
155	} else if (hz >= hw->freq / 16) {
156	ctrl \|= SC18IS602_MODE_CLOCK_DIV_16;
157	hw->speed = hw->freq / 16;
158	} else if (hz >= hw->freq / 64) {
159	ctrl \|= SC18IS602_MODE_CLOCK_DIV_64;
160	hw->speed = hw->freq / 64;
161	} else {
162	ctrl \|= SC18IS602_MODE_CLOCK_DIV_128;
163	hw->speed = hw->freq / 128;
164	}
165
166	/*
167	* Don't do anything if the control value did not change. The initial
168	* value of 0xff for hw->ctrl ensures that the correct mode will be set
169	* with the first call to this function.
170	*/
171	if (ctrl == hw->ctrl)
172	return 0;
173
174	ret = i2c_smbus_write_byte_data(hw->client, 0xf0, ctrl);
175	if (ret < 0)
176	return ret;
177
178	hw->ctrl = ctrl;
179
180	return 0;
181	}
182
183	static int sc18is602_check_transfer(struct spi_device *spi,
184	struct spi_transfer *t, int tlen)
185	{
3ce8859e GR	186	uint32_t hz;
	187
	188	if (t && t->len + tlen > SC18IS602_BUFSIZ)
	189	return -EINVAL;
	190
3ce8859e GR	191	hz = spi->max_speed_hz;
	192	if (t && t->speed_hz)
	193	hz = t->speed_hz;
	194	if (hz == 0)
	195	return -EINVAL;
	196
	197	return 0;
	198	}
	199
	200	static int sc18is602_transfer_one(struct spi_master *master,
	201	struct spi_message *m)
	202	{
	203	struct sc18is602 *hw = spi_master_get_devdata(master);
	204	struct spi_device *spi = m->spi;
	205	struct spi_transfer *t;
	206	int status = 0;
	207
3ce8859e GR	208	hw->tlen = 0;
	209	list_for_each_entry(t, &m->transfers, transfer_list) {
	210	u32 hz = t->speed_hz ? : spi->max_speed_hz;
	211	bool do_transfer;
	212
	213	status = sc18is602_check_transfer(spi, t, hw->tlen);
	214	if (status < 0)
	215	break;
	216
	217	status = sc18is602_setup_transfer(hw, hz, spi->mode);
	218	if (status < 0)
	219	break;
	220
	221	do_transfer = t->cs_change \|\| list_is_last(&t->transfer_list,
	222	&m->transfers);
	223
	224	if (t->len) {
	225	status = sc18is602_txrx(hw, m, t, do_transfer);
	226	if (status < 0)
	227	break;
	228	m->actual_length += status;
	229	}
	230	status = 0;
	231
	232	if (t->delay_usecs)
	233	udelay(t->delay_usecs);
	234	}
3ce8859e GR	235	m->status = status;
	236	spi_finalize_current_message(master);
	237
	238	return status;
	239	}
	240
c5c67e31 AL	241	static int sc18is602_setup(struct spi_device *spi)
	242	{
	243	struct sc18is602 *hw = spi_master_get_devdata(spi->master);
	244
	245	/* SC18IS602 does not support CS2 */
	246	if (hw->id == sc18is602 && spi->chip_select == 2)
	247	return -ENXIO;
	248
	249	return 0;
	250	}
	251
3ce8859e GR	252	static int sc18is602_probe(struct i2c_client *client,
	253	const struct i2c_device_id *id)
	254	{
	255	struct device *dev = &client->dev;
	256	struct device_node *np = dev->of_node;
	257	struct sc18is602_platform_data *pdata = dev_get_platdata(dev);
	258	struct sc18is602 *hw;
	259	struct spi_master *master;
	260	int error;
	261
	262	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C \|
	263	I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
58ed90de	264	return -EINVAL;
3ce8859e GR	265
	266	master = spi_alloc_master(dev, sizeof(struct sc18is602));
	267	if (!master)
	268	return -ENOMEM;
	269
	270	hw = spi_master_get_devdata(master);
	271	i2c_set_clientdata(client, hw);
	272
	273	hw->master = master;
	274	hw->client = client;
	275	hw->dev = dev;
	276	hw->ctrl = 0xff;
	277
	278	hw->id = id->driver_data;
	279
	280	switch (hw->id) {
	281	case sc18is602:
	282	case sc18is602b:
	283	master->num_chipselect = 4;
	284	hw->freq = SC18IS602_CLOCK;
	285	break;
	286	case sc18is603:
	287	master->num_chipselect = 2;
	288	if (pdata) {
	289	hw->freq = pdata->clock_frequency;
	290	} else {
	291	const __be32 *val;
	292	int len;
	293
	294	val = of_get_property(np, "clock-frequency", &len);
	295	if (val && len >= sizeof(__be32))
	296	hw->freq = be32_to_cpup(val);
	297	}
	298	if (!hw->freq)
	299	hw->freq = SC18IS602_CLOCK;
	300	break;
	301	}
	302	master->bus_num = client->adapter->nr;
	303	master->mode_bits = SPI_CPHA \| SPI_CPOL \| SPI_LSB_FIRST;
463654ce	304	master->bits_per_word_mask = SPI_BPW_MASK(8);
c5c67e31	305	master->setup = sc18is602_setup;
3ce8859e GR	306	master->transfer_one_message = sc18is602_transfer_one;
	307	master->dev.of_node = np;
	308
15e0964d	309	error = devm_spi_register_master(dev, master);
3ce8859e GR	310	if (error)
	311	goto error_reg;
	312
	313	return 0;
	314
	315	error_reg:
	316	spi_master_put(master);
	317	return error;
	318	}
	319
3ce8859e GR	320	static const struct i2c_device_id sc18is602_id[] = {
	321	{ "sc18is602", sc18is602 },
	322	{ "sc18is602b", sc18is602b },
	323	{ "sc18is603", sc18is603 },
	324	{ }
	325	};
	326	MODULE_DEVICE_TABLE(i2c, sc18is602_id);
	327
	328	static struct i2c_driver sc18is602_driver = {
	329	.driver = {
	330	.name = "sc18is602",
	331	},
	332	.probe = sc18is602_probe,
3ce8859e GR	333	.id_table = sc18is602_id,
	334	};
	335
	336	module_i2c_driver(sc18is602_driver);
	337
	338	MODULE_DESCRIPTION("SC18IC602/603 SPI Master Driver");
	339	MODULE_AUTHOR("Guenter Roeck");
	340	MODULE_LICENSE("GPL");