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mac80211: fix hardware scan completion
[deliverable/linux.git] / drivers / ssb / main.c
CommitLineData
61e115a5
MB		 1/*
2 * Sonics Silicon Backplane
3 * Subsystem core
4 *
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
7 *
8 * Licensed under the GNU/GPL. See COPYING for details.
9 */
10
11#include "ssb_private.h"
12
13#include <linux/delay.h>
6faf035c 14#include <linux/io.h>
61e115a5
MB		 15#include <linux/ssb/ssb.h>
16#include <linux/ssb/ssb_regs.h>
17#include <linux/dma-mapping.h>
18#include <linux/pci.h>
19
20#include <pcmcia/cs_types.h>
21#include <pcmcia/cs.h>
22#include <pcmcia/cistpl.h>
23#include <pcmcia/ds.h>
24
25
26MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
27MODULE_LICENSE("GPL");
28
29
30/* Temporary list of yet-to-be-attached buses */
31static LIST_HEAD(attach_queue);
32/* List if running buses */
33static LIST_HEAD(buses);
34/* Software ID counter */
35static unsigned int next_busnumber;
36/* buses_mutes locks the two buslists and the next_busnumber.
37 * Don't lock this directly, but use ssb_buses_[un]lock() below. */
38static DEFINE_MUTEX(buses_mutex);
39
40/* There are differences in the codeflow, if the bus is
41 * initialized from early boot, as various needed services
42 * are not available early. This is a mechanism to delay
43 * these initializations to after early boot has finished.
44 * It's also used to avoid mutex locking, as that's not
45 * available and needed early. */
46static bool ssb_is_early_boot = 1;
47
48static void ssb_buses_lock(void);
49static void ssb_buses_unlock(void);
50
51
52#ifdef CONFIG_SSB_PCIHOST
53struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
54{
55 struct ssb_bus *bus;
56
57 ssb_buses_lock();
58 list_for_each_entry(bus, &buses, list) {
59 if (bus->bustype == SSB_BUSTYPE_PCI &&
60 bus->host_pci == pdev)
61 goto found;
62 }
63 bus = NULL;
64found:
65 ssb_buses_unlock();
66
67 return bus;
68}
69#endif /* CONFIG_SSB_PCIHOST */
70
71static struct ssb_device *ssb_device_get(struct ssb_device *dev)
72{
73 if (dev)
74 get_device(dev->dev);
75 return dev;
76}
77
78static void ssb_device_put(struct ssb_device *dev)
79{
80 if (dev)
81 put_device(dev->dev);
82}
83
84static int ssb_bus_resume(struct ssb_bus *bus)
85{
86 int err;
87
88 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
89 err = ssb_pcmcia_init(bus);
90 if (err) {
91 /* No need to disable XTAL, as we don't have one on PCMCIA. */
92 return err;
93 }
94 ssb_chipco_resume(&bus->chipco);
95
96 return 0;
97}
98
99static int ssb_device_resume(struct device *dev)
100{
101 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
102 struct ssb_driver *ssb_drv;
103 struct ssb_bus *bus;
104 int err = 0;
105
106 bus = ssb_dev->bus;
107 if (bus->suspend_cnt == bus->nr_devices) {
108 err = ssb_bus_resume(bus);
109 if (err)
110 return err;
111 }
112 bus->suspend_cnt--;
113 if (dev->driver) {
114 ssb_drv = drv_to_ssb_drv(dev->driver);
115 if (ssb_drv && ssb_drv->resume)
116 err = ssb_drv->resume(ssb_dev);
117 if (err)
118 goto out;
119 }
120out:
121 return err;
122}
123
124static void ssb_bus_suspend(struct ssb_bus *bus, pm_message_t state)
125{
126 ssb_chipco_suspend(&bus->chipco, state);
127 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
128
129 /* Reset HW state information in memory, so that HW is
130 * completely reinitialized on resume. */
131 bus->mapped_device = NULL;
132#ifdef CONFIG_SSB_DRIVER_PCICORE
133 bus->pcicore.setup_done = 0;
134#endif
135#ifdef CONFIG_SSB_DEBUG
136 bus->powered_up = 0;
137#endif
138}
139
140static int ssb_device_suspend(struct device *dev, pm_message_t state)
141{
142 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
143 struct ssb_driver *ssb_drv;
144 struct ssb_bus *bus;
145 int err = 0;
146
147 if (dev->driver) {
148 ssb_drv = drv_to_ssb_drv(dev->driver);
149 if (ssb_drv && ssb_drv->suspend)
150 err = ssb_drv->suspend(ssb_dev, state);
151 if (err)
152 goto out;
153 }
154
155 bus = ssb_dev->bus;
156 bus->suspend_cnt++;
157 if (bus->suspend_cnt == bus->nr_devices) {
158 /* All devices suspended. Shutdown the bus. */
159 ssb_bus_suspend(bus, state);
160 }
161
162out:
163 return err;
164}
165
166#ifdef CONFIG_SSB_PCIHOST
167int ssb_devices_freeze(struct ssb_bus *bus)
168{
169 struct ssb_device *dev;
170 struct ssb_driver *drv;
171 int err = 0;
172 int i;
173 pm_message_t state = PMSG_FREEZE;
174
175 /* First check that we are capable to freeze all devices. */
176 for (i = 0; i < bus->nr_devices; i++) {
177 dev = &(bus->devices[i]);
178 if (!dev->dev ||
179 !dev->dev->driver ||
180 !device_is_registered(dev->dev))
181 continue;
182 drv = drv_to_ssb_drv(dev->dev->driver);
183 if (!drv)
184 continue;
185 if (!drv->suspend) {
186 /* Nope, can't suspend this one. */
187 return -EOPNOTSUPP;
188 }
189 }
190 /* Now suspend all devices */
191 for (i = 0; i < bus->nr_devices; i++) {
192 dev = &(bus->devices[i]);
193 if (!dev->dev ||
194 !dev->dev->driver ||
195 !device_is_registered(dev->dev))
196 continue;
197 drv = drv_to_ssb_drv(dev->dev->driver);
198 if (!drv)
199 continue;
200 err = drv->suspend(dev, state);
201 if (err) {
202 ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n",
203 dev->dev->bus_id);
204 goto err_unwind;
205 }
206 }
207
208 return 0;
209err_unwind:
210 for (i--; i >= 0; i--) {
211 dev = &(bus->devices[i]);
212 if (!dev->dev ||
213 !dev->dev->driver ||
214 !device_is_registered(dev->dev))
215 continue;
216 drv = drv_to_ssb_drv(dev->dev->driver);
217 if (!drv)
218 continue;
219 if (drv->resume)
220 drv->resume(dev);
221 }
222 return err;
223}
224
225int ssb_devices_thaw(struct ssb_bus *bus)
226{
227 struct ssb_device *dev;
228 struct ssb_driver *drv;
229 int err;
230 int i;
231
232 for (i = 0; i < bus->nr_devices; i++) {
233 dev = &(bus->devices[i]);
234 if (!dev->dev ||
235 !dev->dev->driver ||
236 !device_is_registered(dev->dev))
237 continue;
238 drv = drv_to_ssb_drv(dev->dev->driver);
239 if (!drv)
240 continue;
241 if (SSB_WARN_ON(!drv->resume))
242 continue;
243 err = drv->resume(dev);
244 if (err) {
245 ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
246 dev->dev->bus_id);
247 }
248 }
249
250 return 0;
251}
252#endif /* CONFIG_SSB_PCIHOST */
253
254static void ssb_device_shutdown(struct device *dev)
255{
256 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
257 struct ssb_driver *ssb_drv;
258
259 if (!dev->driver)
260 return;
261 ssb_drv = drv_to_ssb_drv(dev->driver);
262 if (ssb_drv && ssb_drv->shutdown)
263 ssb_drv->shutdown(ssb_dev);
264}
265
266static int ssb_device_remove(struct device *dev)
267{
268 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
269 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
270
271 if (ssb_drv && ssb_drv->remove)
272 ssb_drv->remove(ssb_dev);
273 ssb_device_put(ssb_dev);
274
275 return 0;
276}
277
278static int ssb_device_probe(struct device *dev)
279{
280 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
281 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
282 int err = 0;
283
284 ssb_device_get(ssb_dev);
285 if (ssb_drv && ssb_drv->probe)
286 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
287 if (err)
288 ssb_device_put(ssb_dev);
289
290 return err;
291}
292
293static int ssb_match_devid(const struct ssb_device_id *tabid,
294 const struct ssb_device_id *devid)
295{
296 if ((tabid->vendor != devid->vendor) &&
297 tabid->vendor != SSB_ANY_VENDOR)
298 return 0;
299 if ((tabid->coreid != devid->coreid) &&
300 tabid->coreid != SSB_ANY_ID)
301 return 0;
302 if ((tabid->revision != devid->revision) &&
303 tabid->revision != SSB_ANY_REV)
304 return 0;
305 return 1;
306}
307
308static int ssb_bus_match(struct device *dev, struct device_driver *drv)
309{
310 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
311 struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
312 const struct ssb_device_id *id;
313
314 for (id = ssb_drv->id_table;
315 id->vendor || id->coreid || id->revision;
316 id++) {
317 if (ssb_match_devid(id, &ssb_dev->id))
318 return 1; /* found */
319 }
320
321 return 0;
322}
323
7ac0326c 324static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
61e115a5
MB		 325{
326 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
61e115a5
MB		 327
328 if (!dev)
329 return -ENODEV;
330
7ac0326c 331 return add_uevent_var(env,
61e115a5
MB		 332 "MODALIAS=ssb:v%04Xid%04Xrev%02X",
333 ssb_dev->id.vendor, ssb_dev->id.coreid,
334 ssb_dev->id.revision);
61e115a5
MB		 335}
336
337static struct bus_type ssb_bustype = {
338 .name = "ssb",
339 .match = ssb_bus_match,
340 .probe = ssb_device_probe,
341 .remove = ssb_device_remove,
342 .shutdown = ssb_device_shutdown,
343 .suspend = ssb_device_suspend,
344 .resume = ssb_device_resume,
345 .uevent = ssb_device_uevent,
346};
347
348static void ssb_buses_lock(void)
349{
350 /* See the comment at the ssb_is_early_boot definition */
351 if (!ssb_is_early_boot)
352 mutex_lock(&buses_mutex);
353}
354
355static void ssb_buses_unlock(void)
356{
357 /* See the comment at the ssb_is_early_boot definition */
358 if (!ssb_is_early_boot)
359 mutex_unlock(&buses_mutex);
360}
361
362static void ssb_devices_unregister(struct ssb_bus *bus)
363{
364 struct ssb_device *sdev;
365 int i;
366
367 for (i = bus->nr_devices - 1; i >= 0; i--) {
368 sdev = &(bus->devices[i]);
369 if (sdev->dev)
370 device_unregister(sdev->dev);
371 }
372}
373
374void ssb_bus_unregister(struct ssb_bus *bus)
375{
376 ssb_buses_lock();
377 ssb_devices_unregister(bus);
378 list_del(&bus->list);
379 ssb_buses_unlock();
380
381 /* ssb_pcmcia_exit(bus); */
382 ssb_pci_exit(bus);
383 ssb_iounmap(bus);
384}
385EXPORT_SYMBOL(ssb_bus_unregister);
386
387static void ssb_release_dev(struct device *dev)
388{
389 struct __ssb_dev_wrapper *devwrap;
390
391 devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
392 kfree(devwrap);
393}
394
395static int ssb_devices_register(struct ssb_bus *bus)
396{
397 struct ssb_device *sdev;
398 struct device *dev;
399 struct __ssb_dev_wrapper *devwrap;
400 int i, err = 0;
401 int dev_idx = 0;
402
403 for (i = 0; i < bus->nr_devices; i++) {
404 sdev = &(bus->devices[i]);
405
406 /* We don't register SSB-system devices to the kernel,
407 * as the drivers for them are built into SSB. */
408 switch (sdev->id.coreid) {
409 case SSB_DEV_CHIPCOMMON:
410 case SSB_DEV_PCI:
411 case SSB_DEV_PCIE:
412 case SSB_DEV_PCMCIA:
413 case SSB_DEV_MIPS:
414 case SSB_DEV_MIPS_3302:
415 case SSB_DEV_EXTIF:
416 continue;
417 }
418
419 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
420 if (!devwrap) {
421 ssb_printk(KERN_ERR PFX
422 "Could not allocate device\n");
423 err = -ENOMEM;
424 goto error;
425 }
426 dev = &devwrap->dev;
427 devwrap->sdev = sdev;
428
429 dev->release = ssb_release_dev;
430 dev->bus = &ssb_bustype;
431 snprintf(dev->bus_id, sizeof(dev->bus_id),
432 "ssb%u:%d", bus->busnumber, dev_idx);
433
434 switch (bus->bustype) {
435 case SSB_BUSTYPE_PCI:
436#ifdef CONFIG_SSB_PCIHOST
437 sdev->irq = bus->host_pci->irq;
438 dev->parent = &bus->host_pci->dev;
439#endif
440 break;
441 case SSB_BUSTYPE_PCMCIA:
442#ifdef CONFIG_SSB_PCMCIAHOST
60d78c44 443 sdev->irq = bus->host_pcmcia->irq.AssignedIRQ;
61e115a5
MB		 444 dev->parent = &bus->host_pcmcia->dev;
445#endif
446 break;
447 case SSB_BUSTYPE_SSB:
448 break;
449 }
450
451 sdev->dev = dev;
452 err = device_register(dev);
453 if (err) {
454 ssb_printk(KERN_ERR PFX
455 "Could not register %s\n",
456 dev->bus_id);
457 /* Set dev to NULL to not unregister
458 * dev on error unwinding. */
459 sdev->dev = NULL;
460 kfree(devwrap);
461 goto error;
462 }
463 dev_idx++;
464 }
465
466 return 0;
467error:
468 /* Unwind the already registered devices. */
469 ssb_devices_unregister(bus);
470 return err;
471}
472
473/* Needs ssb_buses_lock() */
474static int ssb_attach_queued_buses(void)
475{
476 struct ssb_bus *bus, *n;
477 int err = 0;
478 int drop_them_all = 0;
479
480 list_for_each_entry_safe(bus, n, &attach_queue, list) {
481 if (drop_them_all) {
482 list_del(&bus->list);
483 continue;
484 }
485 /* Can't init the PCIcore in ssb_bus_register(), as that
486 * is too early in boot for embedded systems
487 * (no udelay() available). So do it here in attach stage.
488 */
489 err = ssb_bus_powerup(bus, 0);
490 if (err)
491 goto error;
492 ssb_pcicore_init(&bus->pcicore);
493 ssb_bus_may_powerdown(bus);
494
495 err = ssb_devices_register(bus);
496error:
497 if (err) {
498 drop_them_all = 1;
499 list_del(&bus->list);
500 continue;
501 }
502 list_move_tail(&bus->list, &buses);
503 }
504
505 return err;
506}
507
ffc7689d
MB		 508static u8 ssb_ssb_read8(struct ssb_device *dev, u16 offset)
509{
510 struct ssb_bus *bus = dev->bus;
511
512 offset += dev->core_index * SSB_CORE_SIZE;
513 return readb(bus->mmio + offset);
514}
515
61e115a5
MB		 516static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
517{
518 struct ssb_bus *bus = dev->bus;
519
520 offset += dev->core_index * SSB_CORE_SIZE;
521 return readw(bus->mmio + offset);
522}
523
524static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
525{
526 struct ssb_bus *bus = dev->bus;
527
528 offset += dev->core_index * SSB_CORE_SIZE;
529 return readl(bus->mmio + offset);
530}
531
ffc7689d
MB		 532static void ssb_ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
533{
534 struct ssb_bus *bus = dev->bus;
535
536 offset += dev->core_index * SSB_CORE_SIZE;
537 writeb(value, bus->mmio + offset);
538}
539
61e115a5
MB		 540static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
541{
542 struct ssb_bus *bus = dev->bus;
543
544 offset += dev->core_index * SSB_CORE_SIZE;
545 writew(value, bus->mmio + offset);
546}
547
548static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
549{
550 struct ssb_bus *bus = dev->bus;
551
552 offset += dev->core_index * SSB_CORE_SIZE;
553 writel(value, bus->mmio + offset);
554}
555
556/* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
557static const struct ssb_bus_ops ssb_ssb_ops = {
ffc7689d 558 .read8 = ssb_ssb_read8,
61e115a5
MB		 559 .read16 = ssb_ssb_read16,
560 .read32 = ssb_ssb_read32,
ffc7689d 561 .write8 = ssb_ssb_write8,
61e115a5
MB		 562 .write16 = ssb_ssb_write16,
563 .write32 = ssb_ssb_write32,
564};
565
566static int ssb_fetch_invariants(struct ssb_bus *bus,
567 ssb_invariants_func_t get_invariants)
568{
569 struct ssb_init_invariants iv;
570 int err;
571
572 memset(&iv, 0, sizeof(iv));
573 err = get_invariants(bus, &iv);
574 if (err)
575 goto out;
576 memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
577 memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
7cb44615 578 bus->has_cardbus_slot = iv.has_cardbus_slot;
61e115a5
MB		 579out:
580 return err;
581}
582
583static int ssb_bus_register(struct ssb_bus *bus,
584 ssb_invariants_func_t get_invariants,
585 unsigned long baseaddr)
586{
587 int err;
588
589 spin_lock_init(&bus->bar_lock);
590 INIT_LIST_HEAD(&bus->list);
53521d8c
MB		 591#ifdef CONFIG_SSB_EMBEDDED
592 spin_lock_init(&bus->gpio_lock);
593#endif
61e115a5
MB		 594
595 /* Powerup the bus */
596 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
597 if (err)
598 goto out;
599 ssb_buses_lock();
600 bus->busnumber = next_busnumber;
601 /* Scan for devices (cores) */
602 err = ssb_bus_scan(bus, baseaddr);
603 if (err)
604 goto err_disable_xtal;
605
606 /* Init PCI-host device (if any) */
607 err = ssb_pci_init(bus);
608 if (err)
609 goto err_unmap;
610 /* Init PCMCIA-host device (if any) */
611 err = ssb_pcmcia_init(bus);
612 if (err)
613 goto err_pci_exit;
614
615 /* Initialize basic system devices (if available) */
616 err = ssb_bus_powerup(bus, 0);
617 if (err)
618 goto err_pcmcia_exit;
619 ssb_chipcommon_init(&bus->chipco);
620 ssb_mipscore_init(&bus->mipscore);
621 err = ssb_fetch_invariants(bus, get_invariants);
622 if (err) {
623 ssb_bus_may_powerdown(bus);
624 goto err_pcmcia_exit;
625 }
626 ssb_bus_may_powerdown(bus);
627
628 /* Queue it for attach.
629 * See the comment at the ssb_is_early_boot definition. */
630 list_add_tail(&bus->list, &attach_queue);
631 if (!ssb_is_early_boot) {
632 /* This is not early boot, so we must attach the bus now */
633 err = ssb_attach_queued_buses();
634 if (err)
635 goto err_dequeue;
636 }
637 next_busnumber++;
638 ssb_buses_unlock();
639
640out:
641 return err;
642
643err_dequeue:
644 list_del(&bus->list);
645err_pcmcia_exit:
646/* ssb_pcmcia_exit(bus); */
647err_pci_exit:
648 ssb_pci_exit(bus);
649err_unmap:
650 ssb_iounmap(bus);
651err_disable_xtal:
652 ssb_buses_unlock();
653 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
654 return err;
655}
656
657#ifdef CONFIG_SSB_PCIHOST
658int ssb_bus_pcibus_register(struct ssb_bus *bus,
659 struct pci_dev *host_pci)
660{
661 int err;
662
663 bus->bustype = SSB_BUSTYPE_PCI;
664 bus->host_pci = host_pci;
665 bus->ops = &ssb_pci_ops;
666
667 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
668 if (!err) {
669 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
670 "PCI device %s\n", host_pci->dev.bus_id);
671 }
672
673 return err;
674}
675EXPORT_SYMBOL(ssb_bus_pcibus_register);
676#endif /* CONFIG_SSB_PCIHOST */
677
678#ifdef CONFIG_SSB_PCMCIAHOST
679int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
680 struct pcmcia_device *pcmcia_dev,
681 unsigned long baseaddr)
682{
683 int err;
684
685 bus->bustype = SSB_BUSTYPE_PCMCIA;
686 bus->host_pcmcia = pcmcia_dev;
687 bus->ops = &ssb_pcmcia_ops;
688
689 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
690 if (!err) {
691 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
692 "PCMCIA device %s\n", pcmcia_dev->devname);
693 }
694
695 return err;
696}
697EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
698#endif /* CONFIG_SSB_PCMCIAHOST */
699
700int ssb_bus_ssbbus_register(struct ssb_bus *bus,
701 unsigned long baseaddr,
702 ssb_invariants_func_t get_invariants)
703{
704 int err;
705
706 bus->bustype = SSB_BUSTYPE_SSB;
707 bus->ops = &ssb_ssb_ops;
708
709 err = ssb_bus_register(bus, get_invariants, baseaddr);
710 if (!err) {
711 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
712 "address 0x%08lX\n", baseaddr);
713 }
714
715 return err;
716}
717
718int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
719{
720 drv->drv.name = drv->name;
721 drv->drv.bus = &ssb_bustype;
722 drv->drv.owner = owner;
723
724 return driver_register(&drv->drv);
725}
726EXPORT_SYMBOL(__ssb_driver_register);
727
728void ssb_driver_unregister(struct ssb_driver *drv)
729{
730 driver_unregister(&drv->drv);
731}
732EXPORT_SYMBOL(ssb_driver_unregister);
733
734void ssb_set_devtypedata(struct ssb_device *dev, void *data)
735{
736 struct ssb_bus *bus = dev->bus;
737 struct ssb_device *ent;
738 int i;
739
740 for (i = 0; i < bus->nr_devices; i++) {
741 ent = &(bus->devices[i]);
742 if (ent->id.vendor != dev->id.vendor)
743 continue;
744 if (ent->id.coreid != dev->id.coreid)
745 continue;
746
747 ent->devtypedata = data;
748 }
749}
750EXPORT_SYMBOL(ssb_set_devtypedata);
751
752static u32 clkfactor_f6_resolve(u32 v)
753{
754 /* map the magic values */
755 switch (v) {
756 case SSB_CHIPCO_CLK_F6_2:
757 return 2;
758 case SSB_CHIPCO_CLK_F6_3:
759 return 3;
760 case SSB_CHIPCO_CLK_F6_4:
761 return 4;
762 case SSB_CHIPCO_CLK_F6_5:
763 return 5;
764 case SSB_CHIPCO_CLK_F6_6:
765 return 6;
766 case SSB_CHIPCO_CLK_F6_7:
767 return 7;
768 }
769 return 0;
770}
771
772/* Calculate the speed the backplane would run at a given set of clockcontrol values */
773u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
774{
775 u32 n1, n2, clock, m1, m2, m3, mc;
776
777 n1 = (n & SSB_CHIPCO_CLK_N1);
778 n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
779
780 switch (plltype) {
781 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
782 if (m & SSB_CHIPCO_CLK_T6_MMASK)
783 return SSB_CHIPCO_CLK_T6_M0;
784 return SSB_CHIPCO_CLK_T6_M1;
785 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
786 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
787 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
788 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
789 n1 = clkfactor_f6_resolve(n1);
790 n2 += SSB_CHIPCO_CLK_F5_BIAS;
791 break;
792 case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
793 n1 += SSB_CHIPCO_CLK_T2_BIAS;
794 n2 += SSB_CHIPCO_CLK_T2_BIAS;
795 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
796 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
797 break;
798 case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
799 return 100000000;
800 default:
801 SSB_WARN_ON(1);
802 }
803
804 switch (plltype) {
805 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
806 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
807 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
808 break;
809 default:
810 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
811 }
812 if (!clock)
813 return 0;
814
815 m1 = (m & SSB_CHIPCO_CLK_M1);
816 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
817 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
818 mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
819
820 switch (plltype) {
821 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
822 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
823 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
824 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
825 m1 = clkfactor_f6_resolve(m1);
826 if ((plltype == SSB_PLLTYPE_1) ||
827 (plltype == SSB_PLLTYPE_3))
828 m2 += SSB_CHIPCO_CLK_F5_BIAS;
829 else
830 m2 = clkfactor_f6_resolve(m2);
831 m3 = clkfactor_f6_resolve(m3);
832
833 switch (mc) {
834 case SSB_CHIPCO_CLK_MC_BYPASS:
835 return clock;
836 case SSB_CHIPCO_CLK_MC_M1:
837 return (clock / m1);
838 case SSB_CHIPCO_CLK_MC_M1M2:
839 return (clock / (m1 * m2));
840 case SSB_CHIPCO_CLK_MC_M1M2M3:
841 return (clock / (m1 * m2 * m3));
842 case SSB_CHIPCO_CLK_MC_M1M3:
843 return (clock / (m1 * m3));
844 }
845 return 0;
846 case SSB_PLLTYPE_2:
847 m1 += SSB_CHIPCO_CLK_T2_BIAS;
848 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
849 m3 += SSB_CHIPCO_CLK_T2_BIAS;
850 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
851 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
852 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
853
854 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
855 clock /= m1;
856 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
857 clock /= m2;
858 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
859 clock /= m3;
860 return clock;
861 default:
862 SSB_WARN_ON(1);
863 }
864 return 0;
865}
866
867/* Get the current speed the backplane is running at */
868u32 ssb_clockspeed(struct ssb_bus *bus)
869{
870 u32 rate;
871 u32 plltype;
872 u32 clkctl_n, clkctl_m;
873
874 if (ssb_extif_available(&bus->extif))
875 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
876 &clkctl_n, &clkctl_m);
877 else if (bus->chipco.dev)
878 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
879 &clkctl_n, &clkctl_m);
880 else
881 return 0;
882
883 if (bus->chip_id == 0x5365) {
884 rate = 100000000;
885 } else {
886 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
887 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
888 rate /= 2;
889 }
890
891 return rate;
892}
893EXPORT_SYMBOL(ssb_clockspeed);
894
895static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
896{
c272ef44
LF		 897 u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
898
61e115a5
MB		 899 /* The REJECT bit changed position in TMSLOW between
900 * Backplane revisions. */
c272ef44 901 switch (rev) {
61e115a5
MB		 902 case SSB_IDLOW_SSBREV_22:
903 return SSB_TMSLOW_REJECT_22;
904 case SSB_IDLOW_SSBREV_23:
905 return SSB_TMSLOW_REJECT_23;
c272ef44
LF		 906 case SSB_IDLOW_SSBREV_24: /* TODO - find the proper REJECT bits */
907 case SSB_IDLOW_SSBREV_25: /* same here */
908 case SSB_IDLOW_SSBREV_26: /* same here */
909 case SSB_IDLOW_SSBREV_27: /* same here */
910 return SSB_TMSLOW_REJECT_23; /* this is a guess */
61e115a5 911 default:
c272ef44 912 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
61e115a5
MB		 913 WARN_ON(1);
914 }
915 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23);
916}
917
918int ssb_device_is_enabled(struct ssb_device *dev)
919{
920 u32 val;
921 u32 reject;
922
923 reject = ssb_tmslow_reject_bitmask(dev);
924 val = ssb_read32(dev, SSB_TMSLOW);
925 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
926
927 return (val == SSB_TMSLOW_CLOCK);
928}
929EXPORT_SYMBOL(ssb_device_is_enabled);
930
931static void ssb_flush_tmslow(struct ssb_device *dev)
932{
933 /* Make _really_ sure the device has finished the TMSLOW
934 * register write transaction, as we risk running into
935 * a machine check exception otherwise.
936 * Do this by reading the register back to commit the
937 * PCI write and delay an additional usec for the device
938 * to react to the change. */
939 ssb_read32(dev, SSB_TMSLOW);
940 udelay(1);
941}
942
943void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
944{
945 u32 val;
946
947 ssb_device_disable(dev, core_specific_flags);
948 ssb_write32(dev, SSB_TMSLOW,
949 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
950 SSB_TMSLOW_FGC | core_specific_flags);
951 ssb_flush_tmslow(dev);
952
953 /* Clear SERR if set. This is a hw bug workaround. */
954 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
955 ssb_write32(dev, SSB_TMSHIGH, 0);
956
957 val = ssb_read32(dev, SSB_IMSTATE);
958 if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
959 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
960 ssb_write32(dev, SSB_IMSTATE, val);
961 }
962
963 ssb_write32(dev, SSB_TMSLOW,
964 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
965 core_specific_flags);
966 ssb_flush_tmslow(dev);
967
968 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
969 core_specific_flags);
970 ssb_flush_tmslow(dev);
971}
972EXPORT_SYMBOL(ssb_device_enable);
973
974/* Wait for a bit in a register to get set or unset.
975 * timeout is in units of ten-microseconds */
976static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
977 int timeout, int set)
978{
979 int i;
980 u32 val;
981
982 for (i = 0; i < timeout; i++) {
983 val = ssb_read32(dev, reg);
984 if (set) {
985 if (val & bitmask)
986 return 0;
987 } else {
988 if (!(val & bitmask))
989 return 0;
990 }
991 udelay(10);
992 }
993 printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
994 "register %04X to %s.\n",
995 bitmask, reg, (set ? "set" : "clear"));
996
997 return -ETIMEDOUT;
998}
999
1000void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1001{
1002 u32 reject;
1003
1004 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
1005 return;
1006
1007 reject = ssb_tmslow_reject_bitmask(dev);
1008 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
1009 ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
1010 ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
1011 ssb_write32(dev, SSB_TMSLOW,
1012 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1013 reject | SSB_TMSLOW_RESET |
1014 core_specific_flags);
1015 ssb_flush_tmslow(dev);
1016
1017 ssb_write32(dev, SSB_TMSLOW,
1018 reject | SSB_TMSLOW_RESET |
1019 core_specific_flags);
1020 ssb_flush_tmslow(dev);
1021}
1022EXPORT_SYMBOL(ssb_device_disable);
1023
1024u32 ssb_dma_translation(struct ssb_device *dev)
1025{
1026 switch (dev->bus->bustype) {
1027 case SSB_BUSTYPE_SSB:
1028 return 0;
1029 case SSB_BUSTYPE_PCI:
1030 case SSB_BUSTYPE_PCMCIA:
1031 return SSB_PCI_DMA;
1032 }
1033 return 0;
1034}
1035EXPORT_SYMBOL(ssb_dma_translation);
1036
1037int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask)
1038{
1039 struct device *dev = ssb_dev->dev;
1040
1041#ifdef CONFIG_SSB_PCIHOST
1042 if (ssb_dev->bus->bustype == SSB_BUSTYPE_PCI &&
1043 !dma_supported(dev, mask))
1044 return -EIO;
1045#endif
1046 dev->coherent_dma_mask = mask;
1047 dev->dma_mask = &dev->coherent_dma_mask;
1048
1049 return 0;
1050}
1051EXPORT_SYMBOL(ssb_dma_set_mask);
1052
1053int ssb_bus_may_powerdown(struct ssb_bus *bus)
1054{
1055 struct ssb_chipcommon *cc;
1056 int err = 0;
1057
1058 /* On buses where more than one core may be working
1059 * at a time, we must not powerdown stuff if there are
1060 * still cores that may want to run. */
1061 if (bus->bustype == SSB_BUSTYPE_SSB)
1062 goto out;
1063
1064 cc = &bus->chipco;
1065 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1066 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1067 if (err)
1068 goto error;
1069out:
1070#ifdef CONFIG_SSB_DEBUG
1071 bus->powered_up = 0;
1072#endif
1073 return err;
1074error:
1075 ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1076 goto out;
1077}
1078EXPORT_SYMBOL(ssb_bus_may_powerdown);
1079
1080int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1081{
1082 struct ssb_chipcommon *cc;
1083 int err;
1084 enum ssb_clkmode mode;
1085
1086 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1087 if (err)
1088 goto error;
1089 cc = &bus->chipco;
1090 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1091 ssb_chipco_set_clockmode(cc, mode);
1092
1093#ifdef CONFIG_SSB_DEBUG
1094 bus->powered_up = 1;
1095#endif
1096 return 0;
1097error:
1098 ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1099 return err;
1100}
1101EXPORT_SYMBOL(ssb_bus_powerup);
1102
1103u32 ssb_admatch_base(u32 adm)
1104{
1105 u32 base = 0;
1106
1107 switch (adm & SSB_ADM_TYPE) {
1108 case SSB_ADM_TYPE0:
1109 base = (adm & SSB_ADM_BASE0);
1110 break;
1111 case SSB_ADM_TYPE1:
1112 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1113 base = (adm & SSB_ADM_BASE1);
1114 break;
1115 case SSB_ADM_TYPE2:
1116 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1117 base = (adm & SSB_ADM_BASE2);
1118 break;
1119 default:
1120 SSB_WARN_ON(1);
1121 }
1122
1123 return base;
1124}
1125EXPORT_SYMBOL(ssb_admatch_base);
1126
1127u32 ssb_admatch_size(u32 adm)
1128{
1129 u32 size = 0;
1130
1131 switch (adm & SSB_ADM_TYPE) {
1132 case SSB_ADM_TYPE0:
1133 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1134 break;
1135 case SSB_ADM_TYPE1:
1136 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1137 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1138 break;
1139 case SSB_ADM_TYPE2:
1140 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1141 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1142 break;
1143 default:
1144 SSB_WARN_ON(1);
1145 }
1146 size = (1 << (size + 1));
1147
1148 return size;
1149}
1150EXPORT_SYMBOL(ssb_admatch_size);
1151
1152static int __init ssb_modinit(void)
1153{
1154 int err;
1155
1156 /* See the comment at the ssb_is_early_boot definition */
1157 ssb_is_early_boot = 0;
1158 err = bus_register(&ssb_bustype);
1159 if (err)
1160 return err;
1161
1162 /* Maybe we already registered some buses at early boot.
1163 * Check for this and attach them
1164 */
1165 ssb_buses_lock();
1166 err = ssb_attach_queued_buses();
1167 ssb_buses_unlock();
1168 if (err)
1169 bus_unregister(&ssb_bustype);
1170
1171 err = b43_pci_ssb_bridge_init();
1172 if (err) {
1173 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1174 "initialization failed");
1175 /* don't fail SSB init because of this */
1176 err = 0;
1177 }
1178
1179 return err;
1180}
8d8c90e3
MB		 1181/* ssb must be initialized after PCI but before the ssb drivers.
1182 * That means we must use some initcall between subsys_initcall
1183 * and device_initcall. */
1184fs_initcall(ssb_modinit);
61e115a5
MB		 1185
1186static void __exit ssb_modexit(void)
1187{
1188 b43_pci_ssb_bridge_exit();
1189 bus_unregister(&ssb_bustype);
1190}
1191module_exit(ssb_modexit)
Linux kernel - Deliverables
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