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Fix common misspellings
[deliverable/linux.git] / drivers / staging / comedi / drivers / addi-data / hwdrv_apci3120.h
CommitLineData
c995fe94 1
2696fb57 2/* hwdrv_apci3120.h */
c995fe94 3
c995fe94 4/*
15d8826a
GKH		 5 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
6 *
7 * ADDI-DATA GmbH
8 * Dieselstrasse 3
9 * D-77833 Ottersweier
10 * Tel: +19(0)7223/9493-0
11 * Fax: +49(0)7223/9493-92
25417922 12 * http://www.addi-data.com
15d8826a
GKH		 13 * info@addi-data.com
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the Free
17 * Software Foundation; either version 2 of the License, or (at your option)
18 * any later version.
19 */
c995fe94 20
2696fb57 21/* comedi related defines */
c995fe94 22
2696fb57 23/* ANALOG INPUT RANGE */
9ced1de6 24static const struct comedi_lrange range_apci3120_ai = { 8, {
15d8826a
GKH		 25 BIP_RANGE(10),
26 BIP_RANGE(5),
27 BIP_RANGE(2),
28 BIP_RANGE(1),
29 UNI_RANGE(10),
30 UNI_RANGE(5),
31 UNI_RANGE(2),
32 UNI_RANGE(1)
33 }
c995fe94
ADG		 34};
35
2696fb57 36/* ANALOG OUTPUT RANGE */
9ced1de6 37static const struct comedi_lrange range_apci3120_ao = { 2, {
15d8826a
GKH		 38 BIP_RANGE(10),
39 UNI_RANGE(10)
40 }
c995fe94
ADG		 41};
42
2696fb57 43#define APCI3120_BIPOLAR_RANGES 4 /* used for test on mixture of BIP/UNI ranges */
c995fe94
ADG		 44
45#define APCI3120_BOARD_VENDOR_ID 0x10E8
46#define APCI3120_ADDRESS_RANGE 16
47
48#define APCI3120_DISABLE 0
49#define APCI3120_ENABLE 1
50
51#define APCI3120_START 1
52#define APCI3120_STOP 0
53
54#define APCI3120_EOC_MODE 1
55#define APCI3120_EOS_MODE 2
56#define APCI3120_DMA_MODE 3
57
2696fb57 58/* DIGITAL INPUT-OUTPUT DEFINE */
c995fe94
ADG		 59
60#define APCI3120_DIGITAL_OUTPUT 0x0D
61#define APCI3120_RD_STATUS 0x02
62#define APCI3120_RD_FIFO 0x00
63
2696fb57 64/* digital output insn_write ON /OFF selection */
c995fe94
ADG		 65#define APCI3120_SET4DIGITALOUTPUTON 1
66#define APCI3120_SET4DIGITALOUTPUTOFF 0
67
2696fb57 68/* analog output SELECT BIT */
c995fe94
ADG		 69#define APCI3120_ANALOG_OP_CHANNEL_1 0x0000
70#define APCI3120_ANALOG_OP_CHANNEL_2 0x4000
71#define APCI3120_ANALOG_OP_CHANNEL_3 0x8000
72#define APCI3120_ANALOG_OP_CHANNEL_4 0xC000
73#define APCI3120_ANALOG_OP_CHANNEL_5 0x0000
74#define APCI3120_ANALOG_OP_CHANNEL_6 0x4000
75#define APCI3120_ANALOG_OP_CHANNEL_7 0x8000
76#define APCI3120_ANALOG_OP_CHANNEL_8 0xC000
77
2696fb57 78/* Enable external trigger bit in nWrAddress */
c995fe94
ADG		 79#define APCI3120_ENABLE_EXT_TRIGGER 0x8000
80
2696fb57
BP		 81/* ANALOG OUTPUT AND INPUT DEFINE */
82#define APCI3120_UNIPOLAR 0x80 /* $$ RAM sequence polarity BIT */
83#define APCI3120_BIPOLAR 0x00 /* $$ RAM sequence polarity BIT */
84#define APCI3120_ANALOG_OUTPUT_1 0x08 /* (ADDRESS ) */
85#define APCI3120_ANALOG_OUTPUT_2 0x0A /* (ADDRESS ) */
86#define APCI3120_1_GAIN 0x00 /* $$ RAM sequence Gain Bits for gain 1 */
87#define APCI3120_2_GAIN 0x10 /* $$ RAM sequence Gain Bits for gain 2 */
88#define APCI3120_5_GAIN 0x20 /* $$ RAM sequence Gain Bits for gain 5 */
89#define APCI3120_10_GAIN 0x30 /* $$ RAM sequence Gain Bits for gain 10 */
90#define APCI3120_SEQ_RAM_ADDRESS 0x06 /* $$ EARLIER NAMED APCI3120_FIFO_ADDRESS */
91#define APCI3120_RESET_FIFO 0x0C /* (ADDRESS) */
92#define APCI3120_TIMER_0_MODE_2 0x01 /* $$ Bits for timer mode */
c995fe94
ADG		 93#define APCI3120_TIMER_0_MODE_4 0x2
94#define APCI3120_SELECT_TIMER_0_WORD 0x00
2696fb57 95#define APCI3120_ENABLE_TIMER0 0x1000 /* $$Gatebit 0 in nWrAddress */
c995fe94
ADG		 96#define APCI3120_CLEAR_PR 0xF0FF
97#define APCI3120_CLEAR_PA 0xFFF0
98#define APCI3120_CLEAR_PA_PR (APCI3120_CLEAR_PR & APCI3120_CLEAR_PA)
99
2696fb57
BP		 100/* nWrMode_Select */
101#define APCI3120_ENABLE_SCAN 0x8 /* $$ bit in nWrMode_Select */
c995fe94 102#define APCI3120_DISABLE_SCAN (~APCI3120_ENABLE_SCAN)
2696fb57 103#define APCI3120_ENABLE_EOS_INT 0x2 /* $$ bit in nWrMode_Select */
c995fe94
ADG		 104
105#define APCI3120_DISABLE_EOS_INT (~APCI3120_ENABLE_EOS_INT)
106#define APCI3120_ENABLE_EOC_INT 0x1
107#define APCI3120_DISABLE_EOC_INT (~APCI3120_ENABLE_EOC_INT)
108#define APCI3120_DISABLE_ALL_INTERRUPT_WITHOUT_TIMER (APCI3120_DISABLE_EOS_INT & APCI3120_DISABLE_EOC_INT)
109#define APCI3120_DISABLE_ALL_INTERRUPT (APCI3120_DISABLE_TIMER_INT & APCI3120_DISABLE_EOS_INT & APCI3120_DISABLE_EOC_INT)
110
2696fb57 111/* status register bits */
c995fe94
ADG		 112#define APCI3120_EOC 0x8000
113#define APCI3120_EOS 0x2000
114
2696fb57
BP		 115/* software trigger dummy register */
116#define APCI3120_START_CONVERSION 0x02 /* (ADDRESS) */
c995fe94 117
2696fb57 118/* TIMER DEFINE */
c995fe94
ADG		 119#define APCI3120_QUARTZ_A 70
120#define APCI3120_QUARTZ_B 50
121#define APCI3120_TIMER 1
122#define APCI3120_WATCHDOG 2
123#define APCI3120_TIMER_DISABLE 0
124#define APCI3120_TIMER_ENABLE 1
2696fb57 125#define APCI3120_ENABLE_TIMER2 0x4000 /* $$ gatebit 2 in nWrAddress */
c995fe94 126#define APCI3120_DISABLE_TIMER2 (~APCI3120_ENABLE_TIMER2)
2696fb57 127#define APCI3120_ENABLE_TIMER_INT 0x04 /* $$ ENAIRQ_FC_Bit in nWrModeSelect */
c995fe94 128#define APCI3120_DISABLE_TIMER_INT (~APCI3120_ENABLE_TIMER_INT)
2696fb57 129#define APCI3120_WRITE_MODE_SELECT 0x0E /* (ADDRESS) */
c995fe94
ADG		 130#define APCI3120_SELECT_TIMER_0_WORD 0x00
131#define APCI3120_SELECT_TIMER_1_WORD 0x01
132#define APCI3120_TIMER_1_MODE_2 0x4
133
2696fb57 134/* $$ BIT FOR MODE IN nCsTimerCtr1 */
c995fe94
ADG		 135#define APCI3120_TIMER_2_MODE_0 0x0
136#define APCI3120_TIMER_2_MODE_2 0x10
137#define APCI3120_TIMER_2_MODE_5 0x30
138
2696fb57 139/* $$ BIT FOR MODE IN nCsTimerCtr0 */
c995fe94
ADG		 140#define APCI3120_SELECT_TIMER_2_LOW_WORD 0x02
141#define APCI3120_SELECT_TIMER_2_HIGH_WORD 0x03
142
2696fb57
BP		 143#define APCI3120_TIMER_CRT0 0x0D /* (ADDRESS for cCsTimerCtr0) */
144#define APCI3120_TIMER_CRT1 0x0C /* (ADDRESS for cCsTimerCtr1) */
c995fe94 145
2696fb57
BP		 146#define APCI3120_TIMER_VALUE 0x04 /* ADDRESS for nCsTimerWert */
147#define APCI3120_TIMER_STATUS_REGISTER 0x0D /* ADDRESS for delete timer 2 interrupt */
148#define APCI3120_RD_STATUS 0x02 /* ADDRESS */
149#define APCI3120_WR_ADDRESS 0x00 /* ADDRESS */
150#define APCI3120_ENABLE_WATCHDOG 0x20 /* $$BIT in nWrMode_Select */
c995fe94 151#define APCI3120_DISABLE_WATCHDOG (~APCI3120_ENABLE_WATCHDOG)
2696fb57 152#define APCI3120_ENABLE_TIMER_COUNTER 0x10 /* $$BIT in nWrMode_Select */
c995fe94 153#define APCI3120_DISABLE_TIMER_COUNTER (~APCI3120_ENABLE_TIMER_COUNTER)
2696fb57 154#define APCI3120_FC_TIMER 0x1000 /* bit in status register */
c995fe94
ADG		 155#define APCI3120_ENABLE_TIMER0 0x1000
156#define APCI3120_ENABLE_TIMER1 0x2000
157#define APCI3120_ENABLE_TIMER2 0x4000
158#define APCI3120_DISABLE_TIMER0 (~APCI3120_ENABLE_TIMER0)
159#define APCI3120_DISABLE_TIMER1 (~APCI3120_ENABLE_TIMER1)
160#define APCI3120_DISABLE_TIMER2 (~APCI3120_ENABLE_TIMER2)
161
2696fb57
BP		 162#define APCI3120_TIMER2_SELECT_EOS 0xC0 /* ADDED on 20-6 */
163#define APCI3120_COUNTER 3 /* on 20-6 */
53106ae6 164#define APCI3120_DISABLE_ALL_TIMER (APCI3120_DISABLE_TIMER0 & APCI3120_DISABLE_TIMER1 & APCI3120_DISABLE_TIMER2) /* on 20-6 */
c995fe94
ADG		 165
166#define MAX_ANALOGINPUT_CHANNELS 32
167
0077f93c
BP		 168struct str_AnalogReadInformation {
169
1783fbfe
BP		 170 unsigned char b_Type; /* EOC or EOS */
171 unsigned char b_InterruptFlag; /* Interrupt use or not */
25985edc 172 unsigned int ui_ConvertTiming; /* Selection of the conversion time */
1783fbfe 173 unsigned char b_NbrOfChannel; /* Number of channel to read */
117102b0
BP		 174 unsigned int ui_ChannelList[MAX_ANALOGINPUT_CHANNELS]; /* Number of the channel to be read */
175 unsigned int ui_RangeList[MAX_ANALOGINPUT_CHANNELS]; /* Gain of each channel */
c995fe94 176
0077f93c
BP		 177};
178
c995fe94 179
2696fb57 180/* Function Declaration For APCI-3120 */
c995fe94 181
2696fb57 182/* Internal functions */
34c43922 183int i_APCI3120_SetupChannelList(struct comedi_device *dev, struct comedi_subdevice *s,
15d8826a 184 int n_chan, unsigned int *chanlist, char check);
71b5f4f1
BP		 185int i_APCI3120_ExttrigEnable(struct comedi_device *dev);
186int i_APCI3120_ExttrigDisable(struct comedi_device *dev);
34c43922 187int i_APCI3120_StopCyclicAcquisition(struct comedi_device *dev, struct comedi_subdevice *s);
71b5f4f1
BP		 188int i_APCI3120_Reset(struct comedi_device *dev);
189int i_APCI3120_CyclicAnalogInput(int mode, struct comedi_device *dev,
34c43922 190 struct comedi_subdevice *s);
2696fb57 191/* Interrupt functions */
c995fe94 192void v_APCI3120_Interrupt(int irq, void *d);
2696fb57 193/* UPDATE-0.7.57->0.7.68 void v_APCI3120_InterruptDmaMoveBlock16bit(struct comedi_device *dev,struct comedi_subdevice *s,short *dma,short *data,int n); */
71b5f4f1 194void v_APCI3120_InterruptDmaMoveBlock16bit(struct comedi_device *dev,
34c43922 195 struct comedi_subdevice *s,
790c5541 196 short *dma_buffer,
15d8826a 197 unsigned int num_samples);
71b5f4f1 198int i_APCI3120_InterruptHandleEos(struct comedi_device *dev);
c995fe94
ADG		 199void v_APCI3120_InterruptDma(int irq, void *d);
200
2696fb57 201/* TIMER */
c995fe94 202
34c43922 203int i_APCI3120_InsnConfigTimer(struct comedi_device *dev, struct comedi_subdevice *s,
90035c08 204 struct comedi_insn *insn, unsigned int *data);
34c43922 205int i_APCI3120_InsnWriteTimer(struct comedi_device *dev, struct comedi_subdevice *s,
90035c08 206 struct comedi_insn *insn, unsigned int *data);
34c43922 207int i_APCI3120_InsnReadTimer(struct comedi_device *dev, struct comedi_subdevice *s,
90035c08 208 struct comedi_insn *insn, unsigned int *data);
c995fe94 209
2696fb57
BP		 210/*
211* DI for di read
212*/
c995fe94 213
34c43922 214int i_APCI3120_InsnBitsDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
90035c08 215 struct comedi_insn *insn, unsigned int *data);
34c43922 216int i_APCI3120_InsnReadDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
90035c08 217 struct comedi_insn *insn, unsigned int *data);
c995fe94 218
2696fb57
BP		 219/* DO */
220/* int i_APCI3120_WriteDigitalOutput(struct comedi_device *dev,
221 * unsigned char data);
222 */
71b5f4f1 223int i_APCI3120_InsnConfigDigitalOutput(struct comedi_device *dev,
90035c08 224 struct comedi_subdevice *s, struct comedi_insn *insn,
790c5541 225 unsigned int *data);
34c43922 226int i_APCI3120_InsnBitsDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
90035c08 227 struct comedi_insn *insn, unsigned int *data);
34c43922 228int i_APCI3120_InsnWriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
90035c08 229 struct comedi_insn *insn, unsigned int *data);
c995fe94 230
2696fb57
BP		 231/* AO */
232/* int i_APCI3120_Write1AnalogValue(struct comedi_device *dev,UINT ui_Range,
233 * UINT ui_Channel,UINT data );
234 */
235
34c43922 236int i_APCI3120_InsnWriteAnalogOutput(struct comedi_device *dev, struct comedi_subdevice *s,
90035c08 237 struct comedi_insn *insn, unsigned int *data);
c995fe94 238
2696fb57 239/* AI HArdware layer */
c995fe94 240
34c43922 241int i_APCI3120_InsnConfigAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
90035c08 242 struct comedi_insn *insn, unsigned int *data);
34c43922 243int i_APCI3120_InsnReadAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
90035c08 244 struct comedi_insn *insn, unsigned int *data);
34c43922 245int i_APCI3120_CommandTestAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
ea6d0d4c 246 struct comedi_cmd *cmd);
34c43922 247int i_APCI3120_CommandAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s);
2696fb57 248/* int i_APCI3120_CancelAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s); */
34c43922 249int i_APCI3120_StopCyclicAcquisition(struct comedi_device *dev, struct comedi_subdevice *s);
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