[deliverable/linux.git] / drivers / staging / comedi / drivers / mf6x4.c

/*
 *  comedi/drivers/mf6x4.c
 *  Driver for Humusoft MF634 and MF624 Data acquisition cards
 *
 *  COMEDI - Linux Control and Measurement Device Interface
 *  Copyright (C) 2000 David A. Schleef <ds@schleef.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 */
/*
 * Driver: mf6x4
 * Description: Humusoft MF634 and MF624 Data acquisition card driver
 * Devices: [Humusoft] MF634 (mf634), MF624 (mf624)
 * Author: Rostislav Lisovy <lisovy@gmail.com>
 * Status: works
 * Updated:
 * Configuration Options: none
 */

#include <linux/module.h>
#include <linux/delay.h>

#include "../comedi_pci.h"

/* Registers present in BAR0 memory region */
#define MF624_GPIOC_R		0x54

#define MF6X4_GPIOC_EOLC	BIT(17)	/* End Of Last Conversion */
#define MF6X4_GPIOC_LDAC	BIT(23)	/* Load DACs */
#define MF6X4_GPIOC_DACEN	BIT(26)

/* BAR1 registers */
#define MF6X4_ADDATA_REG	0x00
#define MF6X4_ADCTRL_REG	0x00
#define MF6X4_ADCTRL_CHAN(x)	BIT(chan)
#define MF6X4_DIN_R		0x10
#define MF6X4_DIN_M		0xff
#define MF6X4_DOUT_R		0x10
#define MF6X4_DOUT_M		0xff
#define MF6X4_ADSTART_R		0x20
#define MF6X4_DAC_R(x)		(0x20 + ((x) * 2))

/* BAR2 registers */
#define MF634_GPIOC_R		0x68

enum mf6x4_boardid {
	BOARD_MF634,
	BOARD_MF624,
};

struct mf6x4_board {
	const char *name;
	unsigned int bar_nums[3]; /* We need to keep track of the
				     order of BARs used by the cards */
};

static const struct mf6x4_board mf6x4_boards[] = {
	[BOARD_MF634] = {
		.name           = "mf634",
		.bar_nums	= {0, 2, 3},
	},
	[BOARD_MF624] = {
		.name           = "mf624",
		.bar_nums	= {0, 2, 4},
	},
};

struct mf6x4_private {
	/*
	 * Documentation for both MF634 and MF624 describes registers
	 * present in BAR0, 1 and 2 regions.
	 * The real (i.e. in HW) BAR numbers are different for MF624
	 * and MF634 yet we will call them 0, 1, 2
	 */
	void __iomem *bar0_mem;
	void __iomem *bar2_mem;

	/*
	 * This configuration register has the same function and fields
	 * for both cards however it lies in different BARs on different
	 * offsets -- this variable makes the access easier
	 */
	void __iomem *gpioc_R;
};

static int mf6x4_di_insn_bits(struct comedi_device *dev,
			      struct comedi_subdevice *s,
			      struct comedi_insn *insn,
			      unsigned int *data)
{
	data[1] = ioread16(dev->mmio + MF6X4_DIN_R) & MF6X4_DIN_M;

	return insn->n;
}

static int mf6x4_do_insn_bits(struct comedi_device *dev,
			      struct comedi_subdevice *s,
			      struct comedi_insn *insn,
			      unsigned int *data)
{
	if (comedi_dio_update_state(s, data))
		iowrite16(s->state & MF6X4_DOUT_M, dev->mmio + MF6X4_DOUT_R);

	data[1] = s->state;

	return insn->n;
}

static int mf6x4_ai_eoc(struct comedi_device *dev,
			struct comedi_subdevice *s,
			struct comedi_insn *insn,
			unsigned long context)
{
	struct mf6x4_private *devpriv = dev->private;
	unsigned int status;

	status = ioread32(devpriv->gpioc_R);
	if (status & MF6X4_GPIOC_EOLC)
		return 0;
	return -EBUSY;
}

static int mf6x4_ai_insn_read(struct comedi_device *dev,
			      struct comedi_subdevice *s,
			      struct comedi_insn *insn,
			      unsigned int *data)
{
	unsigned int chan = CR_CHAN(insn->chanspec);
	unsigned int d;
	int ret;
	int i;

	/* Set the ADC channel number in the scan list */
	iowrite16(MF6X4_ADCTRL_CHAN(chan), dev->mmio + MF6X4_ADCTRL_REG);

	for (i = 0; i < insn->n; i++) {
		/* Trigger ADC conversion by reading ADSTART */
		ioread16(dev->mmio + MF6X4_ADSTART_R);

		ret = comedi_timeout(dev, s, insn, mf6x4_ai_eoc, 0);
		if (ret)
			return ret;

		/* Read the actual value */
		d = ioread16(dev->mmio + MF6X4_ADDATA_REG);
		d &= s->maxdata;
		/* munge the 2's complement data to offset binary */
		data[i] = comedi_offset_munge(s, d);
	}

	iowrite16(0x0, dev->mmio + MF6X4_ADCTRL_REG);

	return insn->n;
}

static int mf6x4_ao_insn_write(struct comedi_device *dev,
			       struct comedi_subdevice *s,
			       struct comedi_insn *insn,
			       unsigned int *data)
{
	struct mf6x4_private *devpriv = dev->private;
	unsigned int chan = CR_CHAN(insn->chanspec);
	unsigned int val = s->readback[chan];
	uint32_t gpioc;
	int i;

	/* Enable instantaneous update of converters outputs + Enable DACs */
	gpioc = ioread32(devpriv->gpioc_R);
	iowrite32((gpioc & ~MF6X4_GPIOC_LDAC) | MF6X4_GPIOC_DACEN,
		  devpriv->gpioc_R);

	for (i = 0; i < insn->n; i++) {
		val = data[i];
		iowrite16(val, dev->mmio + MF6X4_DAC_R(chan));
	}
	s->readback[chan] = val;

	return insn->n;
}

static int mf6x4_auto_attach(struct comedi_device *dev, unsigned long context)
{
	struct pci_dev *pcidev = comedi_to_pci_dev(dev);
	const struct mf6x4_board *board = NULL;
	struct mf6x4_private *devpriv;
	struct comedi_subdevice *s;
	int ret;

	if (context < ARRAY_SIZE(mf6x4_boards))
		board = &mf6x4_boards[context];
	else
		return -ENODEV;

	dev->board_ptr = board;
	dev->board_name = board->name;

	ret = comedi_pci_enable(dev);
	if (ret)
		return ret;

	devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
	if (!devpriv)
		return -ENOMEM;

	devpriv->bar0_mem = pci_ioremap_bar(pcidev, board->bar_nums[0]);
	if (!devpriv->bar0_mem)
		return -ENODEV;

	dev->mmio = pci_ioremap_bar(pcidev, board->bar_nums[1]);
	if (!dev->mmio)
		return -ENODEV;

	devpriv->bar2_mem = pci_ioremap_bar(pcidev, board->bar_nums[2]);
	if (!devpriv->bar2_mem)
		return -ENODEV;

	if (board == &mf6x4_boards[BOARD_MF634])
		devpriv->gpioc_R = devpriv->bar2_mem + MF634_GPIOC_R;
	else
		devpriv->gpioc_R = devpriv->bar0_mem + MF624_GPIOC_R;

	ret = comedi_alloc_subdevices(dev, 4);
	if (ret)
		return ret;

	/* ADC */
	s = &dev->subdevices[0];
	s->type = COMEDI_SUBD_AI;
	s->subdev_flags = SDF_READABLE | SDF_GROUND;
	s->n_chan = 8;
	s->maxdata = 0x3fff; /* 14 bits ADC */
	s->range_table = &range_bipolar10;
	s->insn_read = mf6x4_ai_insn_read;

	/* DAC */
	s = &dev->subdevices[1];
	s->type = COMEDI_SUBD_AO;
	s->subdev_flags = SDF_WRITABLE;
	s->n_chan = 8;
	s->maxdata = 0x3fff; /* 14 bits DAC */
	s->range_table = &range_bipolar10;
	s->insn_write = mf6x4_ao_insn_write;

	ret = comedi_alloc_subdev_readback(s);
	if (ret)
		return ret;

	/* DIN */
	s = &dev->subdevices[2];
	s->type = COMEDI_SUBD_DI;
	s->subdev_flags = SDF_READABLE;
	s->n_chan = 8;
	s->maxdata = 1;
	s->range_table = &range_digital;
	s->insn_bits = mf6x4_di_insn_bits;

	/* DOUT */
	s = &dev->subdevices[3];
	s->type = COMEDI_SUBD_DO;
	s->subdev_flags = SDF_WRITABLE;
	s->n_chan = 8;
	s->maxdata = 1;
	s->range_table = &range_digital;
	s->insn_bits = mf6x4_do_insn_bits;

	return 0;
}

static void mf6x4_detach(struct comedi_device *dev)
{
	struct mf6x4_private *devpriv = dev->private;

	if (devpriv) {
		if (devpriv->bar0_mem)
			iounmap(devpriv->bar0_mem);
		if (devpriv->bar2_mem)
			iounmap(devpriv->bar2_mem);
	}
	comedi_pci_detach(dev);
}

static struct comedi_driver mf6x4_driver = {
	.driver_name    = "mf6x4",
	.module         = THIS_MODULE,
	.auto_attach    = mf6x4_auto_attach,
	.detach         = mf6x4_detach,
};

static int mf6x4_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
	return comedi_pci_auto_config(dev, &mf6x4_driver, id->driver_data);
}

static const struct pci_device_id mf6x4_pci_table[] = {
	{ PCI_VDEVICE(HUMUSOFT, 0x0634), BOARD_MF634 },
	{ PCI_VDEVICE(HUMUSOFT, 0x0624), BOARD_MF624 },
	{ 0 }
};
MODULE_DEVICE_TABLE(pci, mf6x4_pci_table);

static struct pci_driver mf6x4_pci_driver = {
	.name           = "mf6x4",
	.id_table       = mf6x4_pci_table,
	.probe          = mf6x4_pci_probe,
	.remove         = comedi_pci_auto_unconfig,
};

module_comedi_pci_driver(mf6x4_driver, mf6x4_pci_driver);

MODULE_AUTHOR("Rostislav Lisovy <lisovy@gmail.com>");
MODULE_DESCRIPTION("Comedi MF634 and MF624 DAQ cards driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
04b56502 RL	1	/*
	2	* comedi/drivers/mf6x4.c
	3	* Driver for Humusoft MF634 and MF624 Data acquisition cards
	4	*
	5	* COMEDI - Linux Control and Measurement Device Interface
	6	* Copyright (C) 2000 David A. Schleef <ds@schleef.org>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*/
	18	/*
	19	* Driver: mf6x4
	20	* Description: Humusoft MF634 and MF624 Data acquisition card driver
63f9384f	21	* Devices: [Humusoft] MF634 (mf634), MF624 (mf624)
04b56502 RL	22	* Author: Rostislav Lisovy <lisovy@gmail.com>
	23	* Status: works
	24	* Updated:
	25	* Configuration Options: none
	26	*/
	27
	28	#include <linux/module.h>
04b56502	29	#include <linux/delay.h>
31ba5981 IA	30
31ba5981 IA	31	#include "../comedi_pci.h"
04b56502 RL	32
04b56502 RL	33	/* Registers present in BAR0 memory region */
77eb7416	34	#define MF624_GPIOC_R 0x54
04b56502	35
0b7cbf14 HS	36	#define MF6X4_GPIOC_EOLC BIT(17) /* End Of Last Conversion */
	37	#define MF6X4_GPIOC_LDAC BIT(23) /* Load DACs */
	38	#define MF6X4_GPIOC_DACEN BIT(26)
04b56502 RL	39
04b56502 RL	40	/* BAR1 registers */
59706334	41	#define MF6X4_ADDATA_REG 0x00
c9ab3023 HS	42	#define MF6X4_ADCTRL_REG 0x00
c9ab3023 HS	43	#define MF6X4_ADCTRL_CHAN(x) BIT(chan)
77eb7416 HS	44	#define MF6X4_DIN_R 0x10
	45	#define MF6X4_DIN_M 0xff
	46	#define MF6X4_DOUT_R 0x10
	47	#define MF6X4_DOUT_M 0xff
77eb7416	48	#define MF6X4_ADSTART_R 0x20
77eb7416	49	#define MF6X4_DAC_R(x) (0x20 + ((x) * 2))
04b56502 RL	50
04b56502 RL	51	/* BAR2 registers */
77eb7416	52	#define MF634_GPIOC_R 0x68
04b56502 RL	53
	54	enum mf6x4_boardid {
	55	BOARD_MF634,
	56	BOARD_MF624,
	57	};
	58
	59	struct mf6x4_board {
	60	const char *name;
	61	unsigned int bar_nums[3]; /* We need to keep track of the
	62	order of BARs used by the cards */
	63	};
	64
	65	static const struct mf6x4_board mf6x4_boards[] = {
	66	[BOARD_MF634] = {
	67	.name = "mf634",
	68	.bar_nums = {0, 2, 3},
	69	},
	70	[BOARD_MF624] = {
	71	.name = "mf624",
	72	.bar_nums = {0, 2, 4},
	73	},
	74	};
	75
	76	struct mf6x4_private {
	77	/*
	78	* Documentation for both MF634 and MF624 describes registers
	79	* present in BAR0, 1 and 2 regions.
	80	* The real (i.e. in HW) BAR numbers are different for MF624
	81	* and MF634 yet we will call them 0, 1, 2
	82	*/
	83	void __iomem *bar0_mem;
04b56502 RL	84	void __iomem *bar2_mem;
	85
	86	/*
	87	* This configuration register has the same function and fields
	88	* for both cards however it lies in different BARs on different
	89	* offsets -- this variable makes the access easier
	90	*/
	91	void __iomem *gpioc_R;
04b56502 RL	92	};
	93
	94	static int mf6x4_di_insn_bits(struct comedi_device *dev,
56570044 HS	95	struct comedi_subdevice *s,
	96	struct comedi_insn *insn,
	97	unsigned int *data)
04b56502	98	{
56570044	99	data[1] = ioread16(dev->mmio + MF6X4_DIN_R) & MF6X4_DIN_M;
04b56502 RL	100
	101	return insn->n;
	102	}
	103
	104	static int mf6x4_do_insn_bits(struct comedi_device *dev,
56570044 HS	105	struct comedi_subdevice *s,
	106	struct comedi_insn *insn,
	107	unsigned int *data)
04b56502	108	{
04b56502	109	if (comedi_dio_update_state(s, data))
56570044	110	iowrite16(s->state & MF6X4_DOUT_M, dev->mmio + MF6X4_DOUT_R);
04b56502 RL	111
	112	data[1] = s->state;
	113
	114	return insn->n;
	115	}
	116
acb069c0 HS	117	static int mf6x4_ai_eoc(struct comedi_device *dev,
	118	struct comedi_subdevice *s,
	119	struct comedi_insn *insn,
	120	unsigned long context)
04b56502 RL	121	{
04b56502 RL	122	struct mf6x4_private *devpriv = dev->private;
acb069c0	123	unsigned int status;
04b56502	124
acb069c0 HS	125	status = ioread32(devpriv->gpioc_R);
	126	if (status & MF6X4_GPIOC_EOLC)
	127	return 0;
	128	return -EBUSY;
04b56502 RL	129	}
	130
	131	static int mf6x4_ai_insn_read(struct comedi_device *dev,
	132	struct comedi_subdevice *s,
56570044 HS	133	struct comedi_insn *insn,
56570044 HS	134	unsigned int *data)
04b56502	135	{
c9ab3023	136	unsigned int chan = CR_CHAN(insn->chanspec);
59706334	137	unsigned int d;
04b56502 RL	138	int ret;
04b56502 RL	139	int i;
04b56502 RL	140
04b56502 RL	141	/* Set the ADC channel number in the scan list */
c9ab3023	142	iowrite16(MF6X4_ADCTRL_CHAN(chan), dev->mmio + MF6X4_ADCTRL_REG);
04b56502 RL	143
	144	for (i = 0; i < insn->n; i++) {
	145	/* Trigger ADC conversion by reading ADSTART */
56570044	146	ioread16(dev->mmio + MF6X4_ADSTART_R);
04b56502	147
acb069c0	148	ret = comedi_timeout(dev, s, insn, mf6x4_ai_eoc, 0);
04b56502 RL	149	if (ret)
	150	return ret;
	151
	152	/* Read the actual value */
59706334	153	d = ioread16(dev->mmio + MF6X4_ADDATA_REG);
04b56502	154	d &= s->maxdata;
59706334 HS	155	/* munge the 2's complement data to offset binary */
59706334 HS	156	data[i] = comedi_offset_munge(s, d);
04b56502 RL	157	}
04b56502 RL	158
c9ab3023	159	iowrite16(0x0, dev->mmio + MF6X4_ADCTRL_REG);
04b56502 RL	160
	161	return insn->n;
	162	}
	163
	164	static int mf6x4_ao_insn_write(struct comedi_device *dev,
	165	struct comedi_subdevice *s,
56570044 HS	166	struct comedi_insn *insn,
56570044 HS	167	unsigned int *data)
04b56502 RL	168	{
	169	struct mf6x4_private *devpriv = dev->private;
	170	unsigned int chan = CR_CHAN(insn->chanspec);
0c8fb386	171	unsigned int val = s->readback[chan];
04b56502 RL	172	uint32_t gpioc;
	173	int i;
	174
	175	/* Enable instantaneous update of converters outputs + Enable DACs */
	176	gpioc = ioread32(devpriv->gpioc_R);
	177	iowrite32((gpioc & ~MF6X4_GPIOC_LDAC) \| MF6X4_GPIOC_DACEN,
	178	devpriv->gpioc_R);
	179
	180	for (i = 0; i < insn->n; i++) {
496e7cd9 HS	181	val = data[i];
496e7cd9 HS	182	iowrite16(val, dev->mmio + MF6X4_DAC_R(chan));
04b56502	183	}
0c8fb386	184	s->readback[chan] = val;
04b56502 RL	185
	186	return insn->n;
	187	}
	188
	189	static int mf6x4_auto_attach(struct comedi_device *dev, unsigned long context)
	190	{
	191	struct pci_dev *pcidev = comedi_to_pci_dev(dev);
	192	const struct mf6x4_board *board = NULL;
	193	struct mf6x4_private *devpriv;
	194	struct comedi_subdevice *s;
	195	int ret;
	196
	197	if (context < ARRAY_SIZE(mf6x4_boards))
	198	board = &mf6x4_boards[context];
	199	else
	200	return -ENODEV;
	201
	202	dev->board_ptr = board;
	203	dev->board_name = board->name;
	204
	205	ret = comedi_pci_enable(dev);
	206	if (ret)
	207	return ret;
	208
	209	devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
	210	if (!devpriv)
	211	return -ENOMEM;
	212
	213	devpriv->bar0_mem = pci_ioremap_bar(pcidev, board->bar_nums[0]);
	214	if (!devpriv->bar0_mem)
	215	return -ENODEV;
	216
56570044 HS	217	dev->mmio = pci_ioremap_bar(pcidev, board->bar_nums[1]);
56570044 HS	218	if (!dev->mmio)
04b56502 RL	219	return -ENODEV;
	220
	221	devpriv->bar2_mem = pci_ioremap_bar(pcidev, board->bar_nums[2]);
	222	if (!devpriv->bar2_mem)
	223	return -ENODEV;
	224
	225	if (board == &mf6x4_boards[BOARD_MF634])
	226	devpriv->gpioc_R = devpriv->bar2_mem + MF634_GPIOC_R;
	227	else
	228	devpriv->gpioc_R = devpriv->bar0_mem + MF624_GPIOC_R;
	229
04b56502 RL	230	ret = comedi_alloc_subdevices(dev, 4);
	231	if (ret)
	232	return ret;
	233
	234	/* ADC */
	235	s = &dev->subdevices[0];
	236	s->type = COMEDI_SUBD_AI;
	237	s->subdev_flags = SDF_READABLE \| SDF_GROUND;
	238	s->n_chan = 8;
	239	s->maxdata = 0x3fff; /* 14 bits ADC */
	240	s->range_table = &range_bipolar10;
	241	s->insn_read = mf6x4_ai_insn_read;
	242
	243	/* DAC */
	244	s = &dev->subdevices[1];
	245	s->type = COMEDI_SUBD_AO;
	246	s->subdev_flags = SDF_WRITABLE;
	247	s->n_chan = 8;
	248	s->maxdata = 0x3fff; /* 14 bits DAC */
	249	s->range_table = &range_bipolar10;
	250	s->insn_write = mf6x4_ao_insn_write;
0c8fb386 HS	251
	252	ret = comedi_alloc_subdev_readback(s);
	253	if (ret)
	254	return ret;
04b56502 RL	255
	256	/* DIN */
	257	s = &dev->subdevices[2];
	258	s->type = COMEDI_SUBD_DI;
	259	s->subdev_flags = SDF_READABLE;
	260	s->n_chan = 8;
	261	s->maxdata = 1;
	262	s->range_table = &range_digital;
	263	s->insn_bits = mf6x4_di_insn_bits;
	264
	265	/* DOUT */
	266	s = &dev->subdevices[3];
	267	s->type = COMEDI_SUBD_DO;
	268	s->subdev_flags = SDF_WRITABLE;
	269	s->n_chan = 8;
	270	s->maxdata = 1;
	271	s->range_table = &range_digital;
	272	s->insn_bits = mf6x4_do_insn_bits;
	273
	274	return 0;
	275	}
	276
	277	static void mf6x4_detach(struct comedi_device *dev)
	278	{
	279	struct mf6x4_private *devpriv = dev->private;
	280
aac307f9 HS	281	if (devpriv) {
	282	if (devpriv->bar0_mem)
	283	iounmap(devpriv->bar0_mem);
	284	if (devpriv->bar2_mem)
	285	iounmap(devpriv->bar2_mem);
	286	}
	287	comedi_pci_detach(dev);
04b56502 RL	288	}
	289
	290	static struct comedi_driver mf6x4_driver = {
	291	.driver_name = "mf6x4",
	292	.module = THIS_MODULE,
	293	.auto_attach = mf6x4_auto_attach,
	294	.detach = mf6x4_detach,
	295	};
	296
	297	static int mf6x4_pci_probe(struct pci_dev dev, const struct pci_device_id id)
	298	{
	299	return comedi_pci_auto_config(dev, &mf6x4_driver, id->driver_data);
	300	}
	301
	302	static const struct pci_device_id mf6x4_pci_table[] = {
	303	{ PCI_VDEVICE(HUMUSOFT, 0x0634), BOARD_MF634 },
	304	{ PCI_VDEVICE(HUMUSOFT, 0x0624), BOARD_MF624 },
	305	{ 0 }
	306	};
	307	MODULE_DEVICE_TABLE(pci, mf6x4_pci_table);
	308
	309	static struct pci_driver mf6x4_pci_driver = {
	310	.name = "mf6x4",
	311	.id_table = mf6x4_pci_table,
	312	.probe = mf6x4_pci_probe,
	313	.remove = comedi_pci_auto_unconfig,
	314	};
	315
	316	module_comedi_pci_driver(mf6x4_driver, mf6x4_pci_driver);
	317
	318	MODULE_AUTHOR("Rostislav Lisovy <lisovy@gmail.com>");
	319	MODULE_DESCRIPTION("Comedi MF634 and MF624 DAQ cards driver");
	320	MODULE_LICENSE("GPL");