[deliverable/linux.git] / drivers / staging / comedi / drivers / mf6x4.c

/*
 *  comedi/drivers/mf6x4.c
 *  Driver for Humusoft MF634 and MF624 Data acquisition cards
 *
 *  COMEDI - Linux Control and Measurement Device Interface
 *  Copyright (C) 2000 David A. Schleef <ds@schleef.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 */
/*
 * Driver: mf6x4
 * Description: Humusoft MF634 and MF624 Data acquisition card driver
 * Devices: [Humusoft] MF634 (mf634), MF624 (mf624)
 * Author: Rostislav Lisovy <lisovy@gmail.com>
 * Status: works
 * Updated:
 * Configuration Options: none
 */

#include <linux/module.h>
#include <linux/delay.h>

#include "../comedi_pci.h"

/* Registers present in BAR0 memory region */
#define MF624_GPIOC_REG		0x54

#define MF6X4_GPIOC_EOLC	BIT(17)	/* End Of Last Conversion */
#define MF6X4_GPIOC_LDAC	BIT(23)	/* Load DACs */
#define MF6X4_GPIOC_DACEN	BIT(26)

/* BAR1 registers */
#define MF6X4_ADDATA_REG	0x00
#define MF6X4_ADCTRL_REG	0x00
#define MF6X4_ADCTRL_CHAN(x)	BIT(chan)
#define MF6X4_DIN_REG		0x10
#define MF6X4_DIN_MASK		0xff
#define MF6X4_DOUT_REG		0x10
#define MF6X4_ADSTART_REG	0x20
#define MF6X4_DAC_REG(x)	(0x20 + ((x) * 2))

/* BAR2 registers */
#define MF634_GPIOC_REG		0x68

enum mf6x4_boardid {
	BOARD_MF634,
	BOARD_MF624,
};

struct mf6x4_board {
	const char *name;
	/* We need to keep track of the order of BARs used by the cards */
	unsigned int bar_nums[3];
};

static const struct mf6x4_board mf6x4_boards[] = {
	[BOARD_MF634] = {
		.name           = "mf634",
		.bar_nums	= {0, 2, 3},
	},
	[BOARD_MF624] = {
		.name           = "mf624",
		.bar_nums	= {0, 2, 4},
	},
};

struct mf6x4_private {
	/*
	 * Documentation for both MF634 and MF624 describes registers
	 * present in BAR0, 1 and 2 regions.
	 * The real (i.e. in HW) BAR numbers are different for MF624
	 * and MF634 yet we will call them 0, 1, 2
	 */
	void __iomem *bar0_mem;
	void __iomem *bar2_mem;

	/*
	 * This configuration register has the same function and fields
	 * for both cards however it lies in different BARs on different
	 * offsets -- this variable makes the access easier
	 */
	void __iomem *gpioc_reg;
};

static int mf6x4_di_insn_bits(struct comedi_device *dev,
			      struct comedi_subdevice *s,
			      struct comedi_insn *insn,
			      unsigned int *data)
{
	data[1] = ioread16(dev->mmio + MF6X4_DIN_REG) & MF6X4_DIN_MASK;

	return insn->n;
}

static int mf6x4_do_insn_bits(struct comedi_device *dev,
			      struct comedi_subdevice *s,
			      struct comedi_insn *insn,
			      unsigned int *data)
{
	if (comedi_dio_update_state(s, data))
		iowrite16(s->state, dev->mmio + MF6X4_DOUT_REG);

	data[1] = s->state;

	return insn->n;
}

static int mf6x4_ai_eoc(struct comedi_device *dev,
			struct comedi_subdevice *s,
			struct comedi_insn *insn,
			unsigned long context)
{
	struct mf6x4_private *devpriv = dev->private;
	unsigned int status;

	status = ioread32(devpriv->gpioc_reg);
	if (status & MF6X4_GPIOC_EOLC)
		return 0;
	return -EBUSY;
}

static int mf6x4_ai_insn_read(struct comedi_device *dev,
			      struct comedi_subdevice *s,
			      struct comedi_insn *insn,
			      unsigned int *data)
{
	unsigned int chan = CR_CHAN(insn->chanspec);
	unsigned int d;
	int ret;
	int i;

	/* Set the ADC channel number in the scan list */
	iowrite16(MF6X4_ADCTRL_CHAN(chan), dev->mmio + MF6X4_ADCTRL_REG);

	for (i = 0; i < insn->n; i++) {
		/* Trigger ADC conversion by reading ADSTART */
		ioread16(dev->mmio + MF6X4_ADSTART_REG);

		ret = comedi_timeout(dev, s, insn, mf6x4_ai_eoc, 0);
		if (ret)
			return ret;

		/* Read the actual value */
		d = ioread16(dev->mmio + MF6X4_ADDATA_REG);
		d &= s->maxdata;
		/* munge the 2's complement data to offset binary */
		data[i] = comedi_offset_munge(s, d);
	}

	iowrite16(0x0, dev->mmio + MF6X4_ADCTRL_REG);

	return insn->n;
}

static int mf6x4_ao_insn_write(struct comedi_device *dev,
			       struct comedi_subdevice *s,
			       struct comedi_insn *insn,
			       unsigned int *data)
{
	struct mf6x4_private *devpriv = dev->private;
	unsigned int chan = CR_CHAN(insn->chanspec);
	unsigned int val = s->readback[chan];
	unsigned int gpioc;
	int i;

	/* Enable instantaneous update of converters outputs + Enable DACs */
	gpioc = ioread32(devpriv->gpioc_reg);
	iowrite32((gpioc & ~MF6X4_GPIOC_LDAC) | MF6X4_GPIOC_DACEN,
		  devpriv->gpioc_reg);

	for (i = 0; i < insn->n; i++) {
		val = data[i];
		iowrite16(val, dev->mmio + MF6X4_DAC_REG(chan));
	}
	s->readback[chan] = val;

	return insn->n;
}

static int mf6x4_auto_attach(struct comedi_device *dev, unsigned long context)
{
	struct pci_dev *pcidev = comedi_to_pci_dev(dev);
	const struct mf6x4_board *board = NULL;
	struct mf6x4_private *devpriv;
	struct comedi_subdevice *s;
	int ret;

	if (context < ARRAY_SIZE(mf6x4_boards))
		board = &mf6x4_boards[context];
	else
		return -ENODEV;

	dev->board_ptr = board;
	dev->board_name = board->name;

	ret = comedi_pci_enable(dev);
	if (ret)
		return ret;

	devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
	if (!devpriv)
		return -ENOMEM;

	devpriv->bar0_mem = pci_ioremap_bar(pcidev, board->bar_nums[0]);
	if (!devpriv->bar0_mem)
		return -ENODEV;

	dev->mmio = pci_ioremap_bar(pcidev, board->bar_nums[1]);
	if (!dev->mmio)
		return -ENODEV;

	devpriv->bar2_mem = pci_ioremap_bar(pcidev, board->bar_nums[2]);
	if (!devpriv->bar2_mem)
		return -ENODEV;

	if (board == &mf6x4_boards[BOARD_MF634])
		devpriv->gpioc_reg = devpriv->bar2_mem + MF634_GPIOC_REG;
	else
		devpriv->gpioc_reg = devpriv->bar0_mem + MF624_GPIOC_REG;

	ret = comedi_alloc_subdevices(dev, 4);
	if (ret)
		return ret;

	/* Analog Input subdevice */
	s = &dev->subdevices[0];
	s->type		= COMEDI_SUBD_AI;
	s->subdev_flags	= SDF_READABLE | SDF_GROUND;
	s->n_chan	= 8;
	s->maxdata	= 0x3fff;
	s->range_table	= &range_bipolar10;
	s->insn_read	= mf6x4_ai_insn_read;

	/* Analog Output subdevice */
	s = &dev->subdevices[1];
	s->type		= COMEDI_SUBD_AO;
	s->subdev_flags	= SDF_WRITABLE;
	s->n_chan	= 8;
	s->maxdata	= 0x3fff;
	s->range_table	= &range_bipolar10;
	s->insn_write	= mf6x4_ao_insn_write;

	ret = comedi_alloc_subdev_readback(s);
	if (ret)
		return ret;

	/* Digital Input subdevice */
	s = &dev->subdevices[2];
	s->type		= COMEDI_SUBD_DI;
	s->subdev_flags	= SDF_READABLE;
	s->n_chan	= 8;
	s->maxdata	= 1;
	s->range_table	= &range_digital;
	s->insn_bits	= mf6x4_di_insn_bits;

	/* Digital Output subdevice */
	s = &dev->subdevices[3];
	s->type		= COMEDI_SUBD_DO;
	s->subdev_flags	= SDF_WRITABLE;
	s->n_chan	= 8;
	s->maxdata	= 1;
	s->range_table	= &range_digital;
	s->insn_bits	= mf6x4_do_insn_bits;

	return 0;
}

static void mf6x4_detach(struct comedi_device *dev)
{
	struct mf6x4_private *devpriv = dev->private;

	if (devpriv) {
		if (devpriv->bar0_mem)
			iounmap(devpriv->bar0_mem);
		if (devpriv->bar2_mem)
			iounmap(devpriv->bar2_mem);
	}
	comedi_pci_detach(dev);
}

static struct comedi_driver mf6x4_driver = {
	.driver_name    = "mf6x4",
	.module         = THIS_MODULE,
	.auto_attach    = mf6x4_auto_attach,
	.detach         = mf6x4_detach,
};

static int mf6x4_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
	return comedi_pci_auto_config(dev, &mf6x4_driver, id->driver_data);
}

static const struct pci_device_id mf6x4_pci_table[] = {
	{ PCI_VDEVICE(HUMUSOFT, 0x0634), BOARD_MF634 },
	{ PCI_VDEVICE(HUMUSOFT, 0x0624), BOARD_MF624 },
	{ 0 }
};
MODULE_DEVICE_TABLE(pci, mf6x4_pci_table);

static struct pci_driver mf6x4_pci_driver = {
	.name           = "mf6x4",
	.id_table       = mf6x4_pci_table,
	.probe          = mf6x4_pci_probe,
	.remove         = comedi_pci_auto_unconfig,
};

module_comedi_pci_driver(mf6x4_driver, mf6x4_pci_driver);

MODULE_AUTHOR("Rostislav Lisovy <lisovy@gmail.com>");
MODULE_DESCRIPTION("Comedi MF634 and MF624 DAQ cards driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
04b56502 RL	1	/*
	2	* comedi/drivers/mf6x4.c
	3	* Driver for Humusoft MF634 and MF624 Data acquisition cards
	4	*
	5	* COMEDI - Linux Control and Measurement Device Interface
	6	* Copyright (C) 2000 David A. Schleef <ds@schleef.org>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*/
	18	/*
	19	* Driver: mf6x4
	20	* Description: Humusoft MF634 and MF624 Data acquisition card driver
63f9384f	21	* Devices: [Humusoft] MF634 (mf634), MF624 (mf624)
04b56502 RL	22	* Author: Rostislav Lisovy <lisovy@gmail.com>
	23	* Status: works
	24	* Updated:
	25	* Configuration Options: none
	26	*/
	27
	28	#include <linux/module.h>
04b56502	29	#include <linux/delay.h>
31ba5981 IA	30
31ba5981 IA	31	#include "../comedi_pci.h"
04b56502 RL	32
04b56502 RL	33	/* Registers present in BAR0 memory region */
1df2abb3	34	#define MF624_GPIOC_REG 0x54
04b56502	35
0b7cbf14 HS	36	#define MF6X4_GPIOC_EOLC BIT(17) /* End Of Last Conversion */
	37	#define MF6X4_GPIOC_LDAC BIT(23) /* Load DACs */
	38	#define MF6X4_GPIOC_DACEN BIT(26)
04b56502 RL	39
04b56502 RL	40	/* BAR1 registers */
59706334	41	#define MF6X4_ADDATA_REG 0x00
c9ab3023 HS	42	#define MF6X4_ADCTRL_REG 0x00
c9ab3023 HS	43	#define MF6X4_ADCTRL_CHAN(x) BIT(chan)
b02530f5 HS	44	#define MF6X4_DIN_REG 0x10
b02530f5 HS	45	#define MF6X4_DIN_MASK 0xff
418c9713	46	#define MF6X4_DOUT_REG 0x10
19e02434 HS	47	#define MF6X4_ADSTART_REG 0x20
19e02434 HS	48	#define MF6X4_DAC_REG(x) (0x20 + ((x) * 2))
04b56502 RL	49
04b56502 RL	50	/* BAR2 registers */
1df2abb3	51	#define MF634_GPIOC_REG 0x68
04b56502 RL	52
	53	enum mf6x4_boardid {
	54	BOARD_MF634,
	55	BOARD_MF624,
	56	};
	57
	58	struct mf6x4_board {
	59	const char *name;
ae573713 HS	60	/* We need to keep track of the order of BARs used by the cards */
ae573713 HS	61	unsigned int bar_nums[3];
04b56502 RL	62	};
	63
	64	static const struct mf6x4_board mf6x4_boards[] = {
	65	[BOARD_MF634] = {
	66	.name = "mf634",
	67	.bar_nums = {0, 2, 3},
	68	},
	69	[BOARD_MF624] = {
	70	.name = "mf624",
	71	.bar_nums = {0, 2, 4},
	72	},
	73	};
	74
	75	struct mf6x4_private {
	76	/*
	77	* Documentation for both MF634 and MF624 describes registers
	78	* present in BAR0, 1 and 2 regions.
	79	* The real (i.e. in HW) BAR numbers are different for MF624
	80	* and MF634 yet we will call them 0, 1, 2
	81	*/
	82	void __iomem *bar0_mem;
04b56502 RL	83	void __iomem *bar2_mem;
	84
	85	/*
	86	* This configuration register has the same function and fields
	87	* for both cards however it lies in different BARs on different
	88	* offsets -- this variable makes the access easier
	89	*/
1df2abb3	90	void __iomem *gpioc_reg;
04b56502 RL	91	};
	92
	93	static int mf6x4_di_insn_bits(struct comedi_device *dev,
56570044 HS	94	struct comedi_subdevice *s,
	95	struct comedi_insn *insn,
	96	unsigned int *data)
04b56502	97	{
b02530f5	98	data[1] = ioread16(dev->mmio + MF6X4_DIN_REG) & MF6X4_DIN_MASK;
04b56502 RL	99
	100	return insn->n;
	101	}
	102
	103	static int mf6x4_do_insn_bits(struct comedi_device *dev,
56570044 HS	104	struct comedi_subdevice *s,
	105	struct comedi_insn *insn,
	106	unsigned int *data)
04b56502	107	{
04b56502	108	if (comedi_dio_update_state(s, data))
418c9713	109	iowrite16(s->state, dev->mmio + MF6X4_DOUT_REG);
04b56502 RL	110
	111	data[1] = s->state;
	112
	113	return insn->n;
	114	}
	115
acb069c0 HS	116	static int mf6x4_ai_eoc(struct comedi_device *dev,
	117	struct comedi_subdevice *s,
	118	struct comedi_insn *insn,
	119	unsigned long context)
04b56502 RL	120	{
04b56502 RL	121	struct mf6x4_private *devpriv = dev->private;
acb069c0	122	unsigned int status;
04b56502	123
1df2abb3	124	status = ioread32(devpriv->gpioc_reg);
acb069c0 HS	125	if (status & MF6X4_GPIOC_EOLC)
	126	return 0;
	127	return -EBUSY;
04b56502 RL	128	}
	129
	130	static int mf6x4_ai_insn_read(struct comedi_device *dev,
	131	struct comedi_subdevice *s,
56570044 HS	132	struct comedi_insn *insn,
56570044 HS	133	unsigned int *data)
04b56502	134	{
c9ab3023	135	unsigned int chan = CR_CHAN(insn->chanspec);
59706334	136	unsigned int d;
04b56502 RL	137	int ret;
04b56502 RL	138	int i;
04b56502 RL	139
04b56502 RL	140	/* Set the ADC channel number in the scan list */
c9ab3023	141	iowrite16(MF6X4_ADCTRL_CHAN(chan), dev->mmio + MF6X4_ADCTRL_REG);
04b56502 RL	142
	143	for (i = 0; i < insn->n; i++) {
	144	/* Trigger ADC conversion by reading ADSTART */
19e02434	145	ioread16(dev->mmio + MF6X4_ADSTART_REG);
04b56502	146
acb069c0	147	ret = comedi_timeout(dev, s, insn, mf6x4_ai_eoc, 0);
04b56502 RL	148	if (ret)
	149	return ret;
	150
	151	/* Read the actual value */
59706334	152	d = ioread16(dev->mmio + MF6X4_ADDATA_REG);
04b56502	153	d &= s->maxdata;
59706334 HS	154	/* munge the 2's complement data to offset binary */
59706334 HS	155	data[i] = comedi_offset_munge(s, d);
04b56502 RL	156	}
04b56502 RL	157
c9ab3023	158	iowrite16(0x0, dev->mmio + MF6X4_ADCTRL_REG);
04b56502 RL	159
	160	return insn->n;
	161	}
	162
	163	static int mf6x4_ao_insn_write(struct comedi_device *dev,
	164	struct comedi_subdevice *s,
56570044 HS	165	struct comedi_insn *insn,
56570044 HS	166	unsigned int *data)
04b56502 RL	167	{
	168	struct mf6x4_private *devpriv = dev->private;
	169	unsigned int chan = CR_CHAN(insn->chanspec);
0c8fb386	170	unsigned int val = s->readback[chan];
21cf4eed	171	unsigned int gpioc;
04b56502 RL	172	int i;
	173
	174	/* Enable instantaneous update of converters outputs + Enable DACs */
1df2abb3	175	gpioc = ioread32(devpriv->gpioc_reg);
04b56502	176	iowrite32((gpioc & ~MF6X4_GPIOC_LDAC) \| MF6X4_GPIOC_DACEN,
1df2abb3	177	devpriv->gpioc_reg);
04b56502 RL	178
04b56502 RL	179	for (i = 0; i < insn->n; i++) {
496e7cd9	180	val = data[i];
19e02434	181	iowrite16(val, dev->mmio + MF6X4_DAC_REG(chan));
04b56502	182	}
0c8fb386	183	s->readback[chan] = val;
04b56502 RL	184
	185	return insn->n;
	186	}
	187
	188	static int mf6x4_auto_attach(struct comedi_device *dev, unsigned long context)
	189	{
	190	struct pci_dev *pcidev = comedi_to_pci_dev(dev);
	191	const struct mf6x4_board *board = NULL;
	192	struct mf6x4_private *devpriv;
	193	struct comedi_subdevice *s;
	194	int ret;
	195
	196	if (context < ARRAY_SIZE(mf6x4_boards))
	197	board = &mf6x4_boards[context];
	198	else
	199	return -ENODEV;
	200
	201	dev->board_ptr = board;
	202	dev->board_name = board->name;
	203
	204	ret = comedi_pci_enable(dev);
	205	if (ret)
	206	return ret;
	207
	208	devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
	209	if (!devpriv)
	210	return -ENOMEM;
	211
	212	devpriv->bar0_mem = pci_ioremap_bar(pcidev, board->bar_nums[0]);
	213	if (!devpriv->bar0_mem)
	214	return -ENODEV;
	215
56570044 HS	216	dev->mmio = pci_ioremap_bar(pcidev, board->bar_nums[1]);
56570044 HS	217	if (!dev->mmio)
04b56502 RL	218	return -ENODEV;
	219
	220	devpriv->bar2_mem = pci_ioremap_bar(pcidev, board->bar_nums[2]);
	221	if (!devpriv->bar2_mem)
	222	return -ENODEV;
	223
	224	if (board == &mf6x4_boards[BOARD_MF634])
1df2abb3	225	devpriv->gpioc_reg = devpriv->bar2_mem + MF634_GPIOC_REG;
04b56502	226	else
1df2abb3	227	devpriv->gpioc_reg = devpriv->bar0_mem + MF624_GPIOC_REG;
04b56502	228
04b56502 RL	229	ret = comedi_alloc_subdevices(dev, 4);
	230	if (ret)
	231	return ret;
	232
fa7ac9c0	233	/* Analog Input subdevice */
04b56502	234	s = &dev->subdevices[0];
fa7ac9c0 HS	235	s->type = COMEDI_SUBD_AI;
	236	s->subdev_flags = SDF_READABLE \| SDF_GROUND;
	237	s->n_chan = 8;
	238	s->maxdata = 0x3fff;
	239	s->range_table = &range_bipolar10;
	240	s->insn_read = mf6x4_ai_insn_read;
	241
	242	/* Analog Output subdevice */
04b56502	243	s = &dev->subdevices[1];
fa7ac9c0 HS	244	s->type = COMEDI_SUBD_AO;
	245	s->subdev_flags = SDF_WRITABLE;
	246	s->n_chan = 8;
	247	s->maxdata = 0x3fff;
	248	s->range_table = &range_bipolar10;
	249	s->insn_write = mf6x4_ao_insn_write;
0c8fb386 HS	250
	251	ret = comedi_alloc_subdev_readback(s);
	252	if (ret)
	253	return ret;
04b56502	254
fa7ac9c0	255	/* Digital Input subdevice */
04b56502	256	s = &dev->subdevices[2];
fa7ac9c0 HS	257	s->type = COMEDI_SUBD_DI;
	258	s->subdev_flags = SDF_READABLE;
	259	s->n_chan = 8;
	260	s->maxdata = 1;
	261	s->range_table = &range_digital;
	262	s->insn_bits = mf6x4_di_insn_bits;
	263
	264	/* Digital Output subdevice */
04b56502	265	s = &dev->subdevices[3];
fa7ac9c0 HS	266	s->type = COMEDI_SUBD_DO;
	267	s->subdev_flags = SDF_WRITABLE;
	268	s->n_chan = 8;
	269	s->maxdata = 1;
	270	s->range_table = &range_digital;
	271	s->insn_bits = mf6x4_do_insn_bits;
04b56502 RL	272
	273	return 0;
	274	}
	275
	276	static void mf6x4_detach(struct comedi_device *dev)
	277	{
	278	struct mf6x4_private *devpriv = dev->private;
	279
aac307f9 HS	280	if (devpriv) {
	281	if (devpriv->bar0_mem)
	282	iounmap(devpriv->bar0_mem);
	283	if (devpriv->bar2_mem)
	284	iounmap(devpriv->bar2_mem);
	285	}
	286	comedi_pci_detach(dev);
04b56502 RL	287	}
	288
	289	static struct comedi_driver mf6x4_driver = {
	290	.driver_name = "mf6x4",
	291	.module = THIS_MODULE,
	292	.auto_attach = mf6x4_auto_attach,
	293	.detach = mf6x4_detach,
	294	};
	295
	296	static int mf6x4_pci_probe(struct pci_dev dev, const struct pci_device_id id)
	297	{
	298	return comedi_pci_auto_config(dev, &mf6x4_driver, id->driver_data);
	299	}
	300
	301	static const struct pci_device_id mf6x4_pci_table[] = {
	302	{ PCI_VDEVICE(HUMUSOFT, 0x0634), BOARD_MF634 },
	303	{ PCI_VDEVICE(HUMUSOFT, 0x0624), BOARD_MF624 },
	304	{ 0 }
	305	};
	306	MODULE_DEVICE_TABLE(pci, mf6x4_pci_table);
	307
	308	static struct pci_driver mf6x4_pci_driver = {
	309	.name = "mf6x4",
	310	.id_table = mf6x4_pci_table,
	311	.probe = mf6x4_pci_probe,
	312	.remove = comedi_pci_auto_unconfig,
	313	};
	314
	315	module_comedi_pci_driver(mf6x4_driver, mf6x4_pci_driver);
	316
	317	MODULE_AUTHOR("Rostislav Lisovy <lisovy@gmail.com>");
	318	MODULE_DESCRIPTION("Comedi MF634 and MF624 DAQ cards driver");
	319	MODULE_LICENSE("GPL");