staging: comedi: quatech_daqp_cs: store private data in the comedi_device
[deliverable/linux.git] / drivers / staging / comedi / drivers / quatech_daqp_cs.c
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1/*======================================================================
2
3 comedi/drivers/quatech_daqp_cs.c
4
5 Quatech DAQP PCMCIA data capture cards COMEDI client driver
6 Copyright (C) 2000, 2003 Brent Baccala <baccala@freesoft.org>
7 The DAQP interface code in this file is released into the public domain.
8
9 COMEDI - Linux Control and Measurement Device Interface
10 Copyright (C) 1998 David A. Schleef <ds@schleef.org>
11 http://www.comedi.org/
12
13 quatech_daqp_cs.c 1.10
14
15 Documentation for the DAQP PCMCIA cards can be found on Quatech's site:
16
3420f6b4 17 ftp://ftp.quatech.com/Manuals/daqp-208.pdf
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18
19 This manual is for both the DAQP-208 and the DAQP-308.
20
21 What works:
22
23 - A/D conversion
24 - 8 channels
25 - 4 gain ranges
26 - ground ref or differential
27 - single-shot and timed both supported
28 - D/A conversion, single-shot
29 - digital I/O
30
31 What doesn't:
32
33 - any kind of triggering - external or D/A channel 1
34 - the card's optional expansion board
35 - the card's timer (for anything other than A/D conversion)
36 - D/A update modes other than immediate (i.e, timed)
37 - fancier timing modes
38 - setting card's FIFO buffer thresholds to anything but default
39
40======================================================================*/
41
42/*
43Driver: quatech_daqp_cs
44Description: Quatech DAQP PCMCIA data capture cards
45Author: Brent Baccala <baccala@freesoft.org>
46Status: works
47Devices: [Quatech] DAQP-208 (daqp), DAQP-308
48*/
49
50#include "../comedidev.h"
3142788b 51#include <linux/semaphore.h>
62ed6662 52
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53#include <pcmcia/cistpl.h>
54#include <pcmcia/cisreg.h>
55#include <pcmcia/ds.h>
56
7ec52ed2
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57#include <linux/completion.h>
58
27020ffe
HS
59#include "comedi_fc.h"
60
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61/* Maximum number of separate DAQP devices we'll allow */
62#define MAX_DEV 4
63
ab64f663 64struct local_info_t {
62ed6662 65 int stop;
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66
67 enum { semaphore, buffer } interrupt_mode;
68
7ec52ed2 69 struct completion eos;
62ed6662 70
62ed6662 71 int count;
ab64f663 72};
62ed6662 73
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74/* The DAQP communicates with the system through a 16 byte I/O window. */
75
76#define DAQP_FIFO_SIZE 4096
77
78#define DAQP_FIFO 0
79#define DAQP_SCANLIST 1
80#define DAQP_CONTROL 2
81#define DAQP_STATUS 2
82#define DAQP_DIGITAL_IO 3
83#define DAQP_PACER_LOW 4
84#define DAQP_PACER_MID 5
85#define DAQP_PACER_HIGH 6
86#define DAQP_COMMAND 7
87#define DAQP_DA 8
88#define DAQP_TIMER 10
89#define DAQP_AUX 15
90
91#define DAQP_SCANLIST_DIFFERENTIAL 0x4000
92#define DAQP_SCANLIST_GAIN(x) ((x)<<12)
93#define DAQP_SCANLIST_CHANNEL(x) ((x)<<8)
94#define DAQP_SCANLIST_START 0x0080
95#define DAQP_SCANLIST_EXT_GAIN(x) ((x)<<4)
96#define DAQP_SCANLIST_EXT_CHANNEL(x) (x)
97
98#define DAQP_CONTROL_PACER_100kHz 0xc0
99#define DAQP_CONTROL_PACER_1MHz 0x80
100#define DAQP_CONTROL_PACER_5MHz 0x40
101#define DAQP_CONTROL_PACER_EXTERNAL 0x00
102#define DAQP_CONTORL_EXPANSION 0x20
103#define DAQP_CONTROL_EOS_INT_ENABLE 0x10
104#define DAQP_CONTROL_FIFO_INT_ENABLE 0x08
105#define DAQP_CONTROL_TRIGGER_ONESHOT 0x00
106#define DAQP_CONTROL_TRIGGER_CONTINUOUS 0x04
107#define DAQP_CONTROL_TRIGGER_INTERNAL 0x00
108#define DAQP_CONTROL_TRIGGER_EXTERNAL 0x02
109#define DAQP_CONTROL_TRIGGER_RISING 0x00
110#define DAQP_CONTROL_TRIGGER_FALLING 0x01
111
112#define DAQP_STATUS_IDLE 0x80
113#define DAQP_STATUS_RUNNING 0x40
114#define DAQP_STATUS_EVENTS 0x38
115#define DAQP_STATUS_DATA_LOST 0x20
116#define DAQP_STATUS_END_OF_SCAN 0x10
117#define DAQP_STATUS_FIFO_THRESHOLD 0x08
118#define DAQP_STATUS_FIFO_FULL 0x04
119#define DAQP_STATUS_FIFO_NEARFULL 0x02
120#define DAQP_STATUS_FIFO_EMPTY 0x01
121
122#define DAQP_COMMAND_ARM 0x80
123#define DAQP_COMMAND_RSTF 0x40
124#define DAQP_COMMAND_RSTQ 0x20
125#define DAQP_COMMAND_STOP 0x10
126#define DAQP_COMMAND_LATCH 0x08
127#define DAQP_COMMAND_100kHz 0x00
128#define DAQP_COMMAND_50kHz 0x02
129#define DAQP_COMMAND_25kHz 0x04
130#define DAQP_COMMAND_FIFO_DATA 0x01
131#define DAQP_COMMAND_FIFO_PROGRAM 0x00
132
133#define DAQP_AUX_TRIGGER_TTL 0x00
134#define DAQP_AUX_TRIGGER_ANALOG 0x80
135#define DAQP_AUX_TRIGGER_PRETRIGGER 0x40
136#define DAQP_AUX_TIMER_INT_ENABLE 0x20
137#define DAQP_AUX_TIMER_RELOAD 0x00
138#define DAQP_AUX_TIMER_PAUSE 0x08
139#define DAQP_AUX_TIMER_GO 0x10
140#define DAQP_AUX_TIMER_GO_EXTERNAL 0x18
141#define DAQP_AUX_TIMER_EXTERNAL_SRC 0x04
142#define DAQP_AUX_TIMER_INTERNAL_SRC 0x00
143#define DAQP_AUX_DA_DIRECT 0x00
144#define DAQP_AUX_DA_OVERFLOW 0x01
145#define DAQP_AUX_DA_EXTERNAL 0x02
146#define DAQP_AUX_DA_PACER 0x03
147
148#define DAQP_AUX_RUNNING 0x80
149#define DAQP_AUX_TRIGGERED 0x40
150#define DAQP_AUX_DA_BUFFER 0x20
151#define DAQP_AUX_TIMER_OVERFLOW 0x10
152#define DAQP_AUX_CONVERSION 0x08
153#define DAQP_AUX_DATA_LOST 0x04
154#define DAQP_AUX_FIFO_NEARFULL 0x02
155#define DAQP_AUX_FIFO_EMPTY 0x01
156
e23fe9a1
HS
157static const struct comedi_lrange range_daqp_ai = {
158 4, {
159 BIP_RANGE(10),
160 BIP_RANGE(5),
161 BIP_RANGE(2.5),
162 BIP_RANGE(1.25)
163 }
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164};
165
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166/* Cancel a running acquisition */
167
da91b269 168static int daqp_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
62ed6662 169{
c1271742 170 struct local_info_t *local = dev->private;
62ed6662 171
3420f6b4 172 if (local->stop)
62ed6662 173 return -EIO;
3420f6b4 174
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175
176 outb(DAQP_COMMAND_STOP, dev->iobase + DAQP_COMMAND);
177
178 /* flush any linguring data in FIFO - superfluous here */
179 /* outb(DAQP_COMMAND_RSTF, dev->iobase+DAQP_COMMAND); */
180
181 local->interrupt_mode = semaphore;
182
183 return 0;
184}
185
186/* Interrupt handler
187 *
188 * Operates in one of two modes. If local->interrupt_mode is
7ec52ed2 189 * 'semaphore', just signal the local->eos completion and return
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190 * (one-shot mode). Otherwise (continuous mode), read data in from
191 * the card, transfer it to the buffer provided by the higher-level
192 * comedi kernel module, and signal various comedi callback routines,
193 * which run pretty quick.
194 */
e3752a1d 195static enum irqreturn daqp_interrupt(int irq, void *dev_id)
62ed6662 196{
c1271742
HS
197 struct comedi_device *dev = dev_id;
198 struct local_info_t *local = dev->private;
199 struct comedi_subdevice *s = dev->read_subdev;
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200 int loop_limit = 10000;
201 int status;
202
c1271742 203 if (!dev->attached)
e3752a1d 204 return IRQ_NONE;
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205
206 switch (local->interrupt_mode) {
207
208 case semaphore:
209
7ec52ed2 210 complete(&local->eos);
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211 break;
212
213 case buffer:
214
215 while (!((status = inb(dev->iobase + DAQP_STATUS))
0a85b6f0 216 & DAQP_STATUS_FIFO_EMPTY)) {
62ed6662 217
790c5541 218 short data;
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219
220 if (status & DAQP_STATUS_DATA_LOST) {
221 s->async->events |=
0a85b6f0 222 COMEDI_CB_EOA | COMEDI_CB_OVERFLOW;
53f63dc7 223 dev_warn(dev->class_dev, "data lost\n");
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224 daqp_ai_cancel(dev, s);
225 break;
226 }
227
228 data = inb(dev->iobase + DAQP_FIFO);
229 data |= inb(dev->iobase + DAQP_FIFO) << 8;
230 data ^= 0x8000;
231
232 comedi_buf_put(s->async, data);
233
234 /* If there's a limit, decrement it
235 * and stop conversion if zero
236 */
237
238 if (local->count > 0) {
239 local->count--;
240 if (local->count == 0) {
241 daqp_ai_cancel(dev, s);
242 s->async->events |= COMEDI_CB_EOA;
243 break;
244 }
245 }
246
247 if ((loop_limit--) <= 0)
248 break;
249 }
250
251 if (loop_limit <= 0) {
ce3ed9f0
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252 dev_warn(dev->class_dev,
253 "loop_limit reached in daqp_interrupt()\n");
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254 daqp_ai_cancel(dev, s);
255 s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
256 }
257
258 s->async->events |= COMEDI_CB_BLOCK;
259
260 comedi_event(dev, s);
261 }
e3752a1d 262 return IRQ_HANDLED;
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263}
264
265/* One-shot analog data acquisition routine */
266
0a85b6f0
MT
267static int daqp_ai_insn_read(struct comedi_device *dev,
268 struct comedi_subdevice *s,
269 struct comedi_insn *insn, unsigned int *data)
62ed6662 270{
c1271742 271 struct local_info_t *local = dev->private;
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272 int i;
273 int v;
274 int counter = 10000;
275
3420f6b4 276 if (local->stop)
62ed6662 277 return -EIO;
3420f6b4 278
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279
280 /* Stop any running conversion */
281 daqp_ai_cancel(dev, s);
282
283 outb(0, dev->iobase + DAQP_AUX);
284
285 /* Reset scan list queue */
286 outb(DAQP_COMMAND_RSTQ, dev->iobase + DAQP_COMMAND);
287
288 /* Program one scan list entry */
289
290 v = DAQP_SCANLIST_CHANNEL(CR_CHAN(insn->chanspec))
0a85b6f0 291 | DAQP_SCANLIST_GAIN(CR_RANGE(insn->chanspec));
62ed6662 292
3420f6b4 293 if (CR_AREF(insn->chanspec) == AREF_DIFF)
62ed6662 294 v |= DAQP_SCANLIST_DIFFERENTIAL;
3420f6b4 295
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296
297 v |= DAQP_SCANLIST_START;
298
299 outb(v & 0xff, dev->iobase + DAQP_SCANLIST);
300 outb(v >> 8, dev->iobase + DAQP_SCANLIST);
301
302 /* Reset data FIFO (see page 28 of DAQP User's Manual) */
303
304 outb(DAQP_COMMAND_RSTF, dev->iobase + DAQP_COMMAND);
305
306 /* Set trigger */
307
308 v = DAQP_CONTROL_TRIGGER_ONESHOT | DAQP_CONTROL_TRIGGER_INTERNAL
0a85b6f0 309 | DAQP_CONTROL_PACER_100kHz | DAQP_CONTROL_EOS_INT_ENABLE;
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310
311 outb(v, dev->iobase + DAQP_CONTROL);
312
25985edc 313 /* Reset any pending interrupts (my card has a tendency to require
62ed6662
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314 * require multiple reads on the status register to achieve this)
315 */
316
317 while (--counter
543a09e9
YT
318 && (inb(dev->iobase + DAQP_STATUS) & DAQP_STATUS_EVENTS))
319 ;
62ed6662 320 if (!counter) {
53f63dc7
YT
321 dev_err(dev->class_dev,
322 "couldn't clear interrupts in status register\n");
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323 return -1;
324 }
325
7ec52ed2 326 init_completion(&local->eos);
62ed6662 327 local->interrupt_mode = semaphore;
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328
329 for (i = 0; i < insn->n; i++) {
330
331 /* Start conversion */
332 outb(DAQP_COMMAND_ARM | DAQP_COMMAND_FIFO_DATA,
0a85b6f0 333 dev->iobase + DAQP_COMMAND);
62ed6662 334
7ec52ed2 335 /* Wait for interrupt service routine to unblock completion */
62ed6662 336 /* Maybe could use a timeout here, but it's interruptible */
7ec52ed2 337 if (wait_for_completion_interruptible(&local->eos))
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338 return -EINTR;
339
340 data[i] = inb(dev->iobase + DAQP_FIFO);
341 data[i] |= inb(dev->iobase + DAQP_FIFO) << 8;
342 data[i] ^= 0x8000;
343 }
344
345 return insn->n;
346}
347
348/* This function converts ns nanoseconds to a counter value suitable
349 * for programming the device. We always use the DAQP's 5 MHz clock,
350 * which with its 24-bit counter, allows values up to 84 seconds.
351 * Also, the function adjusts ns so that it cooresponds to the actual
352 * time that the device will use.
353 */
354
355static int daqp_ns_to_timer(unsigned int *ns, int round)
356{
357 int timer;
358
359 timer = *ns / 200;
360 *ns = timer * 200;
361
362 return timer;
363}
364
365/* cmdtest tests a particular command to see if it is valid.
366 * Using the cmdtest ioctl, a user can create a valid cmd
367 * and then have it executed by the cmd ioctl.
368 *
369 * cmdtest returns 1,2,3,4 or 0, depending on which tests
370 * the command passes.
371 */
372
0a85b6f0
MT
373static int daqp_ai_cmdtest(struct comedi_device *dev,
374 struct comedi_subdevice *s, struct comedi_cmd *cmd)
62ed6662
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375{
376 int err = 0;
377 int tmp;
378
27020ffe 379 /* Step 1 : check if triggers are trivially valid */
62ed6662 380
27020ffe
HS
381 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
382 err |= cfc_check_trigger_src(&cmd->scan_begin_src,
383 TRIG_TIMER | TRIG_FOLLOW);
384 err |= cfc_check_trigger_src(&cmd->convert_src,
385 TRIG_TIMER | TRIG_NOW);
386 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
387 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
62ed6662
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388
389 if (err)
390 return 1;
391
27020ffe 392 /* Step 2a : make sure trigger sources are unique */
62ed6662 393
27020ffe
HS
394 err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
395 err |= cfc_check_trigger_is_unique(cmd->convert_src);
396 err |= cfc_check_trigger_is_unique(cmd->stop_src);
397
398 /* Step 2b : and mutually compatible */
62ed6662
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399
400 if (err)
401 return 2;
402
42cae4a1
HS
403 /* Step 3: check if arguments are trivially valid */
404
405 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
62ed6662 406
62ed6662
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407#define MAX_SPEED 10000 /* 100 kHz - in nanoseconds */
408
42cae4a1
HS
409 if (cmd->scan_begin_src == TRIG_TIMER)
410 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
411 MAX_SPEED);
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412
413 /* If both scan_begin and convert are both timer values, the only
414 * way that can make sense is if the scan time is the number of
415 * conversions times the convert time
416 */
417
418 if (cmd->scan_begin_src == TRIG_TIMER && cmd->convert_src == TRIG_TIMER
0a85b6f0 419 && cmd->scan_begin_arg != cmd->convert_arg * cmd->scan_end_arg) {
42cae4a1 420 err |= -EINVAL;
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421 }
422
42cae4a1
HS
423 if (cmd->convert_src == TRIG_TIMER)
424 err |= cfc_check_trigger_arg_min(&cmd->convert_arg, MAX_SPEED);
62ed6662 425
42cae4a1
HS
426 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
427
428 if (cmd->stop_src == TRIG_COUNT)
429 err |= cfc_check_trigger_arg_max(&cmd->stop_arg, 0x00ffffff);
430 else /* TRIG_NONE */
431 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
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BB
432
433 if (err)
434 return 3;
435
436 /* step 4: fix up any arguments */
437
438 if (cmd->scan_begin_src == TRIG_TIMER) {
439 tmp = cmd->scan_begin_arg;
440 daqp_ns_to_timer(&cmd->scan_begin_arg,
0a85b6f0 441 cmd->flags & TRIG_ROUND_MASK);
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BB
442 if (tmp != cmd->scan_begin_arg)
443 err++;
444 }
445
446 if (cmd->convert_src == TRIG_TIMER) {
447 tmp = cmd->convert_arg;
448 daqp_ns_to_timer(&cmd->convert_arg,
0a85b6f0 449 cmd->flags & TRIG_ROUND_MASK);
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BB
450 if (tmp != cmd->convert_arg)
451 err++;
452 }
453
454 if (err)
455 return 4;
456
457 return 0;
458}
459
da91b269 460static int daqp_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
62ed6662 461{
c1271742 462 struct local_info_t *local = dev->private;
ea6d0d4c 463 struct comedi_cmd *cmd = &s->async->cmd;
e3752a1d 464 int counter;
62ed6662
BB
465 int scanlist_start_on_every_entry;
466 int threshold;
467
468 int i;
469 int v;
470
3420f6b4 471 if (local->stop)
62ed6662 472 return -EIO;
3420f6b4 473
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BB
474
475 /* Stop any running conversion */
476 daqp_ai_cancel(dev, s);
477
478 outb(0, dev->iobase + DAQP_AUX);
479
480 /* Reset scan list queue */
481 outb(DAQP_COMMAND_RSTQ, dev->iobase + DAQP_COMMAND);
482
483 /* Program pacer clock
484 *
485 * There's two modes we can operate in. If convert_src is
486 * TRIG_TIMER, then convert_arg specifies the time between
487 * each conversion, so we program the pacer clock to that
488 * frequency and set the SCANLIST_START bit on every scanlist
489 * entry. Otherwise, convert_src is TRIG_NOW, which means
490 * we want the fastest possible conversions, scan_begin_src
491 * is TRIG_TIMER, and scan_begin_arg specifies the time between
492 * each scan, so we program the pacer clock to this frequency
493 * and only set the SCANLIST_START bit on the first entry.
494 */
495
496 if (cmd->convert_src == TRIG_TIMER) {
e3752a1d 497 counter = daqp_ns_to_timer(&cmd->convert_arg,
0a85b6f0 498 cmd->flags & TRIG_ROUND_MASK);
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BB
499 outb(counter & 0xff, dev->iobase + DAQP_PACER_LOW);
500 outb((counter >> 8) & 0xff, dev->iobase + DAQP_PACER_MID);
501 outb((counter >> 16) & 0xff, dev->iobase + DAQP_PACER_HIGH);
502 scanlist_start_on_every_entry = 1;
503 } else {
e3752a1d 504 counter = daqp_ns_to_timer(&cmd->scan_begin_arg,
0a85b6f0 505 cmd->flags & TRIG_ROUND_MASK);
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BB
506 outb(counter & 0xff, dev->iobase + DAQP_PACER_LOW);
507 outb((counter >> 8) & 0xff, dev->iobase + DAQP_PACER_MID);
508 outb((counter >> 16) & 0xff, dev->iobase + DAQP_PACER_HIGH);
509 scanlist_start_on_every_entry = 0;
510 }
511
512 /* Program scan list */
513
514 for (i = 0; i < cmd->chanlist_len; i++) {
515
516 int chanspec = cmd->chanlist[i];
517
518 /* Program one scan list entry */
519
520 v = DAQP_SCANLIST_CHANNEL(CR_CHAN(chanspec))
0a85b6f0 521 | DAQP_SCANLIST_GAIN(CR_RANGE(chanspec));
62ed6662 522
3420f6b4 523 if (CR_AREF(chanspec) == AREF_DIFF)
62ed6662 524 v |= DAQP_SCANLIST_DIFFERENTIAL;
62ed6662 525
3420f6b4 526 if (i == 0 || scanlist_start_on_every_entry)
62ed6662 527 v |= DAQP_SCANLIST_START;
62ed6662
BB
528
529 outb(v & 0xff, dev->iobase + DAQP_SCANLIST);
530 outb(v >> 8, dev->iobase + DAQP_SCANLIST);
531 }
532
533 /* Now it's time to program the FIFO threshold, basically the
534 * number of samples the card will buffer before it interrupts
535 * the CPU.
536 *
537 * If we don't have a stop count, then use half the size of
538 * the FIFO (the manufacturer's recommendation). Consider
539 * that the FIFO can hold 2K samples (4K bytes). With the
540 * threshold set at half the FIFO size, we have a margin of
541 * error of 1024 samples. At the chip's maximum sample rate
542 * of 100,000 Hz, the CPU would have to delay interrupt
543 * service for a full 10 milliseconds in order to lose data
544 * here (as opposed to higher up in the kernel). I've never
545 * seen it happen. However, for slow sample rates it may
546 * buffer too much data and introduce too much delay for the
547 * user application.
548 *
549 * If we have a stop count, then things get more interesting.
550 * If the stop count is less than the FIFO size (actually
551 * three-quarters of the FIFO size - see below), we just use
552 * the stop count itself as the threshold, the card interrupts
553 * us when that many samples have been taken, and we kill the
554 * acquisition at that point and are done. If the stop count
555 * is larger than that, then we divide it by 2 until it's less
556 * than three quarters of the FIFO size (we always leave the
557 * top quarter of the FIFO as protection against sluggish CPU
558 * interrupt response) and use that as the threshold. So, if
559 * the stop count is 4000 samples, we divide by two twice to
560 * get 1000 samples, use that as the threshold, take four
561 * interrupts to get our 4000 samples and are done.
562 *
563 * The algorithm could be more clever. For example, if 81000
564 * samples are requested, we could set the threshold to 1500
565 * samples and take 54 interrupts to get 81000. But 54 isn't
566 * a power of two, so this algorithm won't find that option.
567 * Instead, it'll set the threshold at 1266 and take 64
568 * interrupts to get 81024 samples, of which the last 24 will
569 * be discarded... but we won't get the last interrupt until
570 * they've been collected. To find the first option, the
571 * computer could look at the prime decomposition of the
572 * sample count (81000 = 3^4 * 5^3 * 2^3) and factor it into a
573 * threshold (1500 = 3 * 5^3 * 2^2) and an interrupt count (54
574 * = 3^3 * 2). Hmmm... a one-line while loop or prime
575 * decomposition of integers... I'll leave it the way it is.
576 *
577 * I'll also note a mini-race condition before ignoring it in
578 * the code. Let's say we're taking 4000 samples, as before.
579 * After 1000 samples, we get an interrupt. But before that
580 * interrupt is completely serviced, another sample is taken
581 * and loaded into the FIFO. Since the interrupt handler
582 * empties the FIFO before returning, it will read 1001 samples.
583 * If that happens four times, we'll end up taking 4004 samples,
584 * not 4000. The interrupt handler will discard the extra four
585 * samples (by halting the acquisition with four samples still
586 * in the FIFO), but we will have to wait for them.
587 *
588 * In short, this code works pretty well, but for either of
589 * the two reasons noted, might end up waiting for a few more
590 * samples than actually requested. Shouldn't make too much
591 * of a difference.
592 */
593
594 /* Save away the number of conversions we should perform, and
595 * compute the FIFO threshold (in bytes, not samples - that's
596 * why we multiple local->count by 2 = sizeof(sample))
597 */
598
599 if (cmd->stop_src == TRIG_COUNT) {
600 local->count = cmd->stop_arg * cmd->scan_end_arg;
601 threshold = 2 * local->count;
602 while (threshold > DAQP_FIFO_SIZE * 3 / 4)
603 threshold /= 2;
604 } else {
605 local->count = -1;
606 threshold = DAQP_FIFO_SIZE / 2;
607 }
608
609 /* Reset data FIFO (see page 28 of DAQP User's Manual) */
610
611 outb(DAQP_COMMAND_RSTF, dev->iobase + DAQP_COMMAND);
612
613 /* Set FIFO threshold. First two bytes are near-empty
614 * threshold, which is unused; next two bytes are near-full
615 * threshold. We computed the number of bytes we want in the
616 * FIFO when the interrupt is generated, what the card wants
617 * is actually the number of available bytes left in the FIFO
618 * when the interrupt is to happen.
619 */
620
621 outb(0x00, dev->iobase + DAQP_FIFO);
622 outb(0x00, dev->iobase + DAQP_FIFO);
623
624 outb((DAQP_FIFO_SIZE - threshold) & 0xff, dev->iobase + DAQP_FIFO);
625 outb((DAQP_FIFO_SIZE - threshold) >> 8, dev->iobase + DAQP_FIFO);
626
627 /* Set trigger */
628
629 v = DAQP_CONTROL_TRIGGER_CONTINUOUS | DAQP_CONTROL_TRIGGER_INTERNAL
0a85b6f0 630 | DAQP_CONTROL_PACER_5MHz | DAQP_CONTROL_FIFO_INT_ENABLE;
62ed6662
BB
631
632 outb(v, dev->iobase + DAQP_CONTROL);
633
25985edc 634 /* Reset any pending interrupts (my card has a tendency to require
62ed6662
BB
635 * require multiple reads on the status register to achieve this)
636 */
e3752a1d 637 counter = 100;
62ed6662 638 while (--counter
543a09e9
YT
639 && (inb(dev->iobase + DAQP_STATUS) & DAQP_STATUS_EVENTS))
640 ;
62ed6662 641 if (!counter) {
ce3ed9f0
YT
642 dev_err(dev->class_dev,
643 "couldn't clear interrupts in status register\n");
62ed6662
BB
644 return -1;
645 }
646
647 local->interrupt_mode = buffer;
62ed6662
BB
648
649 /* Start conversion */
650 outb(DAQP_COMMAND_ARM | DAQP_COMMAND_FIFO_DATA,
0a85b6f0 651 dev->iobase + DAQP_COMMAND);
62ed6662
BB
652
653 return 0;
654}
655
656/* Single-shot analog output routine */
657
0a85b6f0
MT
658static int daqp_ao_insn_write(struct comedi_device *dev,
659 struct comedi_subdevice *s,
660 struct comedi_insn *insn, unsigned int *data)
62ed6662 661{
c1271742 662 struct local_info_t *local = dev->private;
62ed6662
BB
663 int d;
664 unsigned int chan;
665
3420f6b4 666 if (local->stop)
62ed6662 667 return -EIO;
62ed6662
BB
668
669 chan = CR_CHAN(insn->chanspec);
670 d = data[0];
671 d &= 0x0fff;
672 d ^= 0x0800; /* Flip the sign */
673 d |= chan << 12;
674
675 /* Make sure D/A update mode is direct update */
676 outb(0, dev->iobase + DAQP_AUX);
677
678 outw(d, dev->iobase + DAQP_DA);
679
680 return 1;
681}
682
683/* Digital input routine */
684
0a85b6f0
MT
685static int daqp_di_insn_read(struct comedi_device *dev,
686 struct comedi_subdevice *s,
687 struct comedi_insn *insn, unsigned int *data)
62ed6662 688{
c1271742 689 struct local_info_t *local = dev->private;
62ed6662 690
3420f6b4 691 if (local->stop)
62ed6662 692 return -EIO;
62ed6662
BB
693
694 data[0] = inb(dev->iobase + DAQP_DIGITAL_IO);
695
696 return 1;
697}
698
699/* Digital output routine */
700
0a85b6f0
MT
701static int daqp_do_insn_write(struct comedi_device *dev,
702 struct comedi_subdevice *s,
703 struct comedi_insn *insn, unsigned int *data)
62ed6662 704{
c1271742 705 struct local_info_t *local = dev->private;
62ed6662 706
3420f6b4 707 if (local->stop)
62ed6662 708 return -EIO;
62ed6662
BB
709
710 outw(data[0] & 0xf, dev->iobase + DAQP_DIGITAL_IO);
711
712 return 1;
713}
714
c04edbf2
HS
715static int daqp_auto_attach(struct comedi_device *dev,
716 unsigned long context)
62ed6662 717{
c04edbf2 718 struct pcmcia_device *link = comedi_to_pcmcia_dev(dev);
c65c64d0 719 struct local_info_t *local;
34c43922 720 struct comedi_subdevice *s;
c65c64d0 721 int ret;
62ed6662 722
c04edbf2 723 dev->board_name = dev->driver->driver_name;
c65c64d0 724
c04edbf2
HS
725 /* Allocate space for private device-specific data */
726 local = kzalloc(sizeof(*local), GFP_KERNEL);
c65c64d0 727 if (!local)
c04edbf2 728 return -ENOMEM;
c1271742 729 dev->private = local;
62ed6662 730
c04edbf2 731 link->config_flags |= CONF_AUTO_SET_IO | CONF_ENABLE_IRQ;
87fe1452 732 ret = comedi_pcmcia_enable(dev);
c04edbf2
HS
733 if (ret)
734 return ret;
87fe1452 735 dev->iobase = link->resource[0]->start;
62ed6662 736
c1271742 737 link->priv = dev;
c04edbf2
HS
738 ret = pcmcia_request_irq(link, daqp_interrupt);
739 if (ret)
740 return ret;
741
2f0b9d08 742 ret = comedi_alloc_subdevices(dev, 4);
8b6c5694 743 if (ret)
62ed6662
BB
744 return ret;
745
123c0e03 746 s = &dev->subdevices[0];
62ed6662 747 dev->read_subdev = s;
b7c0afa4
HS
748 s->type = COMEDI_SUBD_AI;
749 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF | SDF_CMD_READ;
750 s->n_chan = 8;
751 s->len_chanlist = 2048;
752 s->maxdata = 0xffff;
753 s->range_table = &range_daqp_ai;
754 s->insn_read = daqp_ai_insn_read;
755 s->do_cmdtest = daqp_ai_cmdtest;
756 s->do_cmd = daqp_ai_cmd;
757 s->cancel = daqp_ai_cancel;
62ed6662 758
123c0e03 759 s = &dev->subdevices[1];
b7c0afa4
HS
760 s->type = COMEDI_SUBD_AO;
761 s->subdev_flags = SDF_WRITEABLE;
762 s->n_chan = 2;
763 s->maxdata = 0x0fff;
764 s->range_table = &range_bipolar5;
765 s->insn_write = daqp_ao_insn_write;
62ed6662 766
123c0e03 767 s = &dev->subdevices[2];
b7c0afa4
HS
768 s->type = COMEDI_SUBD_DI;
769 s->subdev_flags = SDF_READABLE;
770 s->n_chan = 1;
771 s->insn_read = daqp_di_insn_read;
62ed6662 772
123c0e03 773 s = &dev->subdevices[3];
b7c0afa4
HS
774 s->type = COMEDI_SUBD_DO;
775 s->subdev_flags = SDF_WRITEABLE;
776 s->n_chan = 1;
777 s->len_chanlist = 1;
778 s->insn_write = daqp_do_insn_write;
62ed6662 779
b7c0afa4 780 return 0;
62ed6662
BB
781}
782
d1db2a41
HS
783static struct comedi_driver driver_daqp = {
784 .driver_name = "quatech_daqp_cs",
785 .module = THIS_MODULE,
c04edbf2 786 .auto_attach = daqp_auto_attach,
25736670 787 .detach = comedi_pcmcia_disable,
d1db2a41
HS
788};
789
d1db2a41 790static int daqp_cs_suspend(struct pcmcia_device *link)
62ed6662 791{
c1271742
HS
792 struct comedi_device *dev = link->priv;
793 struct local_info_t *local = dev ? dev->private : NULL;
62ed6662 794
d1db2a41 795 /* Mark the device as stopped, to block IO until later */
c1271742
HS
796 if (local)
797 local->stop = 1;
798
d1db2a41
HS
799 return 0;
800}
62ed6662 801
d1db2a41
HS
802static int daqp_cs_resume(struct pcmcia_device *link)
803{
c1271742
HS
804 struct comedi_device *dev = link->priv;
805 struct local_info_t *local = dev ? dev->private : NULL;
62ed6662 806
c1271742
HS
807 if (local)
808 local->stop = 0;
62ed6662
BB
809
810 return 0;
d1db2a41 811}
62ed6662 812
d1db2a41 813static int daqp_cs_attach(struct pcmcia_device *link)
62ed6662 814{
c04edbf2 815 return comedi_pcmcia_auto_config(link, &driver_daqp);
62ed6662
BB
816}
817
2202a5a7 818static const struct pcmcia_device_id daqp_cs_id_table[] = {
62ed6662
BB
819 PCMCIA_DEVICE_MANF_CARD(0x0137, 0x0027),
820 PCMCIA_DEVICE_NULL
821};
62ed6662
BB
822MODULE_DEVICE_TABLE(pcmcia, daqp_cs_id_table);
823
e3752a1d 824static struct pcmcia_driver daqp_cs_driver = {
433a0e22
HS
825 .name = "quatech_daqp_cs",
826 .owner = THIS_MODULE,
827 .id_table = daqp_cs_id_table,
828 .probe = daqp_cs_attach,
c04edbf2 829 .remove = comedi_pcmcia_auto_unconfig,
433a0e22
HS
830 .suspend = daqp_cs_suspend,
831 .resume = daqp_cs_resume,
62ed6662 832};
f3493a97 833module_comedi_pcmcia_driver(driver_daqp, daqp_cs_driver);
04c59041
HS
834
835MODULE_DESCRIPTION("Comedi driver for Quatech DAQP PCMCIA data capture cards");
836MODULE_AUTHOR("Brent Baccala <baccala@freesoft.org>");
837MODULE_LICENSE("GPL");
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