Merge branch 'linus' into x86/cleanups
[deliverable/linux.git] / drivers / staging / dgap / dgap.c
CommitLineData
c84b8b50
S
1/*
2 * Copyright 2003 Digi International (www.digi.com)
3 * Scott H Kilau <Scott_Kilau at digi dot com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2, or (at your option)
8 * any later version.
818cc6fe 9 *
c84b8b50 10 * This program is distributed in the hope that it will be useful,
818cc6fe
MI
11 * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
12 * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
c84b8b50 13 * PURPOSE. See the GNU General Public License for more details.
818cc6fe 14 *
c84b8b50
S
15 */
16
b28ec88a
MH
17/*
18 * In the original out of kernel Digi dgap driver, firmware
19 * loading was done via user land to driver handshaking.
20 *
21 * For cards that support a concentrator (port expander),
22 * I believe the concentrator its self told the card which
23 * concentrator is actually attached and then that info
24 * was used to tell user land which concentrator firmware
25 * image was to be downloaded. I think even the BIOS or
26 * FEP images required could change with the connection
27 * of a particular concentrator.
28 *
29 * Since I have no access to any of these cards or
30 * concentrators, I cannot put the correct concentrator
31 * firmware file names into the firmware_info structure
32 * as is now done for the BIOS and FEP images.
33 *
34 * I think, but am not certain, that the cards supporting
35 * concentrators will function without them. So support
36 * of these cards has been left in this driver.
37 *
38 * In order to fully support those cards, they would
39 * either have to be acquired for dissection or maybe
40 * Digi International could provide some assistance.
41 */
42#undef DIGI_CONCENTRATORS_SUPPORTED
c84b8b50 43
6c66843d
DY
44#define pr_fmt(fmt) "dgap: " fmt
45
c84b8b50 46#include <linux/kernel.h>
c84b8b50
S
47#include <linux/module.h>
48#include <linux/pci.h>
49#include <linux/delay.h> /* For udelay */
351699d7 50#include <linux/slab.h>
3d9dc5db 51#include <linux/uaccess.h>
c84b8b50 52#include <linux/sched.h>
c84b8b50 53
a6792a3e
MH
54#include <linux/interrupt.h> /* For tasklet and interrupt structs/defines */
55#include <linux/ctype.h>
56#include <linux/tty.h>
57#include <linux/tty_flip.h>
58#include <linux/serial_reg.h>
3d9dc5db 59#include <linux/io.h> /* For read[bwl]/write[bwl] */
a6792a3e 60
7568f7d3
MH
61#include <linux/string.h>
62#include <linux/device.h>
63#include <linux/kdev_t.h>
b28ec88a 64#include <linux/firmware.h>
7568f7d3 65
ffc1c1da 66#include "dgap.h"
a6792a3e 67
c84b8b50
S
68/*
69 * File operations permitted on Control/Management major.
70 */
fea0683e 71static const struct file_operations dgap_board_fops = {
305ec874 72 .owner = THIS_MODULE,
c84b8b50
S
73};
74
fea0683e
MH
75static uint dgap_numboards;
76static struct board_t *dgap_board[MAXBOARDS];
b115b024 77static ulong dgap_poll_counter;
b115b024 78static int dgap_driver_state = DRIVER_INITIALIZED;
b115b024 79static int dgap_poll_tick = 20; /* Poll interval - 20 ms */
c84b8b50 80
b115b024 81static struct class *dgap_class;
c84b8b50 82
b053bb86 83static uint dgap_count = 500;
a6792a3e 84
c84b8b50
S
85/*
86 * Poller stuff
87 */
45c44ddd 88static DEFINE_SPINLOCK(dgap_poll_lock); /* Poll scheduling lock */
b115b024
MH
89static ulong dgap_poll_time; /* Time of next poll */
90static uint dgap_poll_stop; /* Used to tell poller to stop */
c84b8b50
S
91static struct timer_list dgap_poll_timer;
92
b28ec88a
MH
93/*
94 SUPPORTED PRODUCTS
95
96 Card Model Number of Ports Interface
97 ----------------------------------------------------------------
98 Acceleport Xem 4 - 64 (EIA232 & EIA422)
99 Acceleport Xr 4 & 8 (EIA232)
100 Acceleport Xr 920 4 & 8 (EIA232)
101 Acceleport C/X 8 - 128 (EIA232)
102 Acceleport EPC/X 8 - 224 (EIA232)
103 Acceleport Xr/422 4 & 8 (EIA422)
104 Acceleport 2r/920 2 (EIA232)
105 Acceleport 4r/920 4 (EIA232)
106 Acceleport 8r/920 8 (EIA232)
107
108 IBM 8-Port Asynchronous PCI Adapter (EIA232)
109 IBM 128-Port Asynchronous PCI Adapter (EIA232 & EIA422)
110*/
c84b8b50
S
111
112static struct pci_device_id dgap_pci_tbl[] = {
2f60b333
MH
113 { DIGI_VID, PCI_DEV_XEM_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
114 { DIGI_VID, PCI_DEV_CX_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
115 { DIGI_VID, PCI_DEV_CX_IBM_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
116 { DIGI_VID, PCI_DEV_EPCJ_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
117 { DIGI_VID, PCI_DEV_920_2_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
118 { DIGI_VID, PCI_DEV_920_4_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
119 { DIGI_VID, PCI_DEV_920_8_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
120 { DIGI_VID, PCI_DEV_XR_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
121 { DIGI_VID, PCI_DEV_XRJ_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
122 { DIGI_VID, PCI_DEV_XR_422_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
123 { DIGI_VID, PCI_DEV_XR_IBM_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
124 { DIGI_VID, PCI_DEV_XR_SAIP_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
125 { DIGI_VID, PCI_DEV_XR_BULL_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
126 { DIGI_VID, PCI_DEV_920_8_HP_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 13 },
127 { DIGI_VID, PCI_DEV_XEM_HP_DID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 14 },
c84b8b50
S
128 {0,} /* 0 terminated list. */
129};
130MODULE_DEVICE_TABLE(pci, dgap_pci_tbl);
131
c84b8b50
S
132/*
133 * A generic list of Product names, PCI Vendor ID, and PCI Device ID.
134 */
135struct board_id {
136 uint config_type;
2023d18e 137 u8 *name;
c84b8b50
S
138 uint maxports;
139 uint dpatype;
140};
141
fea0683e 142static struct board_id dgap_ids[] = {
a9108b71
IC
143 {PPCM, PCI_DEV_XEM_NAME, 64, (T_PCXM | T_PCLITE | T_PCIBUS)},
144 {PCX, PCI_DEV_CX_NAME, 128, (T_CX | T_PCIBUS) },
145 {PCX, PCI_DEV_CX_IBM_NAME, 128, (T_CX | T_PCIBUS) },
146 {PEPC, PCI_DEV_EPCJ_NAME, 224, (T_EPC | T_PCIBUS) },
147 {APORT2_920P, PCI_DEV_920_2_NAME, 2, (T_PCXR | T_PCLITE | T_PCIBUS)},
148 {APORT4_920P, PCI_DEV_920_4_NAME, 4, (T_PCXR | T_PCLITE | T_PCIBUS)},
149 {APORT8_920P, PCI_DEV_920_8_NAME, 8, (T_PCXR | T_PCLITE | T_PCIBUS)},
150 {PAPORT8, PCI_DEV_XR_NAME, 8, (T_PCXR | T_PCLITE | T_PCIBUS)},
151 {PAPORT8, PCI_DEV_XRJ_NAME, 8, (T_PCXR | T_PCLITE | T_PCIBUS)},
152 {PAPORT8, PCI_DEV_XR_422_NAME, 8, (T_PCXR | T_PCLITE | T_PCIBUS)},
153 {PAPORT8, PCI_DEV_XR_IBM_NAME, 8, (T_PCXR | T_PCLITE | T_PCIBUS)},
154 {PAPORT8, PCI_DEV_XR_SAIP_NAME, 8, (T_PCXR | T_PCLITE | T_PCIBUS)},
155 {PAPORT8, PCI_DEV_XR_BULL_NAME, 8, (T_PCXR | T_PCLITE | T_PCIBUS)},
156 {APORT8_920P, PCI_DEV_920_8_HP_NAME, 8, (T_PCXR | T_PCLITE | T_PCIBUS)},
157 {PPCM, PCI_DEV_XEM_HP_NAME, 64, (T_PCXM | T_PCLITE | T_PCIBUS)},
c84b8b50
S
158 {0,} /* 0 terminated list. */
159};
160
b28ec88a 161struct firmware_info {
174efc1f 162 u8 *conf_name; /* dgap.conf */
2023d18e
MH
163 u8 *bios_name; /* BIOS filename */
164 u8 *fep_name; /* FEP filename */
165 u8 *con_name; /* Concentrator filename FIXME*/
174efc1f 166 int num; /* sequence number */
b28ec88a
MH
167};
168
169/*
170 * Firmware - BIOS, FEP, and CONC filenames
171 */
172static struct firmware_info fw_info[] = {
8f5879c4
MH
173 { "dgap/dgap.conf", "dgap/sxbios.bin", "dgap/sxfep.bin", NULL, 0 },
174 { "dgap/dgap.conf", "dgap/cxpbios.bin", "dgap/cxpfep.bin", NULL, 1 },
175 { "dgap/dgap.conf", "dgap/cxpbios.bin", "dgap/cxpfep.bin", NULL, 2 },
176 { "dgap/dgap.conf", "dgap/pcibios.bin", "dgap/pcifep.bin", NULL, 3 },
177 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", NULL, 4 },
178 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", NULL, 5 },
179 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", NULL, 6 },
180 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", NULL, 7 },
181 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", NULL, 8 },
182 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", NULL, 9 },
183 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", NULL, 10 },
184 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", NULL, 11 },
185 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", NULL, 12 },
186 { "dgap/dgap.conf", "dgap/xrbios.bin", "dgap/xrfep.bin", NULL, 13 },
187 { "dgap/dgap.conf", "dgap/sxbios.bin", "dgap/sxfep.bin", NULL, 14 },
188 {NULL,}
b28ec88a 189};
c84b8b50 190
a6792a3e
MH
191/*
192 * Default transparent print information.
193 */
194static struct digi_t dgap_digi_init = {
195 .digi_flags = DIGI_COOK, /* Flags */
196 .digi_maxcps = 100, /* Max CPS */
197 .digi_maxchar = 50, /* Max chars in print queue */
198 .digi_bufsize = 100, /* Printer buffer size */
199 .digi_onlen = 4, /* size of printer on string */
200 .digi_offlen = 4, /* size of printer off string */
201 .digi_onstr = "\033[5i", /* ANSI printer on string ] */
202 .digi_offstr = "\033[4i", /* ANSI printer off string ] */
203 .digi_term = "ansi" /* default terminal type */
204};
205
a6792a3e
MH
206/*
207 * Define a local default termios struct. All ports will be created
208 * with this termios initially.
209 *
210 * This defines a raw port at 9600 baud, 8 data bits, no parity,
211 * 1 stop bit.
212 */
213
fea0683e 214static struct ktermios dgap_default_termios = {
a6792a3e
MH
215 .c_iflag = (DEFAULT_IFLAGS), /* iflags */
216 .c_oflag = (DEFAULT_OFLAGS), /* oflags */
217 .c_cflag = (DEFAULT_CFLAGS), /* cflags */
218 .c_lflag = (DEFAULT_LFLAGS), /* lflags */
219 .c_cc = INIT_C_CC,
7d6069d7 220 .c_line = 0,
a6792a3e
MH
221};
222
69edaa21
MH
223/*
224 * Our needed internal static variables from dgap_parse.c
225 */
226static struct cnode dgap_head;
227#define MAXCWORD 200
228static char dgap_cword[MAXCWORD];
229
230struct toklist {
174efc1f
MH
231 int token;
232 char *string;
69edaa21
MH
233};
234
77a4492f 235static struct toklist dgap_brdtype[] = {
2f60b333
MH
236 { PCX, "Digi_AccelePort_C/X_PCI" },
237 { PEPC, "Digi_AccelePort_EPC/X_PCI" },
238 { PPCM, "Digi_AccelePort_Xem_PCI" },
239 { APORT2_920P, "Digi_AccelePort_2r_920_PCI" },
240 { APORT4_920P, "Digi_AccelePort_4r_920_PCI" },
241 { APORT8_920P, "Digi_AccelePort_8r_920_PCI" },
242 { PAPORT4, "Digi_AccelePort_4r_PCI(EIA-232/RS-422)" },
243 { PAPORT8, "Digi_AccelePort_8r_PCI(EIA-232/RS-422)" },
77a4492f
DY
244 { 0, NULL }
245};
246
247static struct toklist dgap_tlist[] = {
248 { BEGIN, "config_begin" },
249 { END, "config_end" },
250 { BOARD, "board" },
2f60b333
MH
251 { PCIINFO, "pciinfo" },
252 { LINE, "line" },
253 { CONC, "conc" },
254 { CONC, "concentrator" },
255 { CX, "cx" },
256 { CX, "ccon" },
257 { EPC, "epccon" },
258 { EPC, "epc" },
259 { MOD, "module" },
260 { ID, "id" },
261 { STARTO, "start" },
262 { SPEED, "speed" },
263 { CABLE, "cable" },
264 { CONNECT, "connect" },
265 { METHOD, "method" },
266 { STATUS, "status" },
267 { CUSTOM, "Custom" },
268 { BASIC, "Basic" },
269 { MEM, "mem" },
270 { MEM, "memory" },
271 { PORTS, "ports" },
272 { MODEM, "modem" },
273 { NPORTS, "nports" },
274 { TTYN, "ttyname" },
275 { CU, "cuname" },
276 { PRINT, "prname" },
277 { CMAJOR, "major" },
278 { ALTPIN, "altpin" },
279 { USEINTR, "useintr" },
280 { TTSIZ, "ttysize" },
281 { CHSIZ, "chsize" },
282 { BSSIZ, "boardsize" },
283 { UNTSIZ, "schedsize" },
284 { F2SIZ, "f2200size" },
285 { VPSIZ, "vpixsize" },
286 { 0, NULL }
69edaa21 287};
c84b8b50 288
c84b8b50 289/*
0b2cf5c8
DY
290 * get a word from the input stream, also keep track of current line number.
291 * words are separated by whitespace.
c84b8b50 292 */
0b2cf5c8 293static char *dgap_getword(char **in)
c84b8b50 294{
0b2cf5c8 295 char *ret_ptr = *in;
c84b8b50 296
b9f7f1d0 297 char *ptr = strpbrk(*in, " \t\n");
af07daa0 298
0b2cf5c8
DY
299 /* If no word found, return null */
300 if (!ptr)
301 return NULL;
af07daa0 302
0b2cf5c8
DY
303 /* Mark new location for our buffer */
304 *ptr = '\0';
305 *in = ptr + 1;
0669e5fa 306
0b2cf5c8
DY
307 /* Eat any extra spaces/tabs/newlines that might be present */
308 while (*in && **in && ((**in == ' ') ||
309 (**in == '\t') ||
310 (**in == '\n'))) {
311 **in = '\0';
312 *in = *in + 1;
0669e5fa 313 }
af07daa0 314
0b2cf5c8 315 return ret_ptr;
c84b8b50
S
316}
317
ebf72ccf 318
0b2cf5c8
DY
319/*
320 * Get a token from the input file; return 0 if end of file is reached
321 */
322static int dgap_gettok(char **in)
323{
324 char *w;
325 struct toklist *t;
ebf72ccf 326
0b2cf5c8
DY
327 if (strstr(dgap_cword, "board")) {
328 w = dgap_getword(in);
39be6b8b
SM
329 if (!w)
330 return 0;
0b2cf5c8
DY
331 snprintf(dgap_cword, MAXCWORD, "%s", w);
332 for (t = dgap_brdtype; t->token != 0; t++) {
333 if (!strcmp(w, t->string))
334 return t->token;
335 }
336 } else {
337 while ((w = dgap_getword(in))) {
338 snprintf(dgap_cword, MAXCWORD, "%s", w);
339 for (t = dgap_tlist; t->token != 0; t++) {
340 if (!strcmp(w, t->string))
341 return t->token;
342 }
343 }
344 }
ebf72ccf 345
0b2cf5c8 346 return 0;
ebf72ccf
DY
347}
348
0b2cf5c8
DY
349/*
350 * dgap_checknode: see if all the necessary info has been supplied for a node
351 * before creating the next node.
352 */
353static int dgap_checknode(struct cnode *p)
c84b8b50 354{
0b2cf5c8
DY
355 switch (p->type) {
356 case LNODE:
357 if (p->u.line.v_speed == 0) {
358 pr_err("line speed not specified");
359 return 1;
360 }
361 return 0;
acfd4aae 362
0b2cf5c8
DY
363 case CNODE:
364 if (p->u.conc.v_speed == 0) {
365 pr_err("concentrator line speed not specified");
366 return 1;
367 }
368 if (p->u.conc.v_nport == 0) {
369 pr_err("number of ports on concentrator not specified");
370 return 1;
371 }
372 if (p->u.conc.v_id == 0) {
373 pr_err("concentrator id letter not specified");
374 return 1;
375 }
376 return 0;
3c3befef 377
0b2cf5c8
DY
378 case MNODE:
379 if (p->u.module.v_nport == 0) {
380 pr_err("number of ports on EBI module not specified");
381 return 1;
382 }
383 if (p->u.module.v_id == 0) {
384 pr_err("EBI module id letter not specified");
385 return 1;
386 }
387 return 0;
388 }
389 return 0;
390}
3c3befef 391
0b2cf5c8
DY
392/*
393 * Given a board pointer, returns whether we should use interrupts or not.
394 */
395static uint dgap_config_get_useintr(struct board_t *bd)
396{
397 struct cnode *p;
3c3befef 398
0b2cf5c8
DY
399 if (!bd)
400 return 0;
3c3befef 401
0b2cf5c8
DY
402 for (p = bd->bd_config; p; p = p->next) {
403 if (p->type == INTRNODE) {
404 /*
405 * check for pcxr types.
406 */
407 return p->u.useintr;
408 }
409 }
7bc26a68 410
0b2cf5c8 411 /* If not found, then don't turn on interrupts. */
3c3befef 412 return 0;
c84b8b50
S
413}
414
c84b8b50 415/*
0b2cf5c8 416 * Given a board pointer, returns whether we turn on altpin or not.
c84b8b50 417 */
0b2cf5c8 418static uint dgap_config_get_altpin(struct board_t *bd)
c84b8b50 419{
0b2cf5c8 420 struct cnode *p;
c84b8b50 421
0b2cf5c8
DY
422 if (!bd)
423 return 0;
c84b8b50 424
0b2cf5c8
DY
425 for (p = bd->bd_config; p; p = p->next) {
426 if (p->type == ANODE) {
427 /*
428 * check for pcxr types.
429 */
430 return p->u.altpin;
431 }
c84b8b50
S
432 }
433
0b2cf5c8
DY
434 /* If not found, then don't turn on interrupts. */
435 return 0;
c84b8b50
S
436}
437
c84b8b50 438/*
0b2cf5c8
DY
439 * Given a specific type of board, if found, detached link and
440 * returns the first occurrence in the list.
c84b8b50 441 */
0b2cf5c8 442static struct cnode *dgap_find_config(int type, int bus, int slot)
c84b8b50 443{
0b2cf5c8 444 struct cnode *p, *prev, *prev2, *found;
c84b8b50 445
0b2cf5c8 446 p = &dgap_head;
c84b8b50 447
0b2cf5c8
DY
448 while (p->next) {
449 prev = p;
450 p = p->next;
c84b8b50 451
0b2cf5c8
DY
452 if (p->type != BNODE)
453 continue;
c84b8b50 454
0b2cf5c8
DY
455 if (p->u.board.type != type)
456 continue;
c84b8b50 457
0b2cf5c8
DY
458 if (p->u.board.v_pcibus &&
459 p->u.board.pcibus != bus)
460 continue;
c84b8b50 461
0b2cf5c8
DY
462 if (p->u.board.v_pcislot &&
463 p->u.board.pcislot != slot)
464 continue;
c84b8b50 465
0b2cf5c8
DY
466 found = p;
467 /*
468 * Keep walking thru the list till we
469 * find the next board.
470 */
471 while (p->next) {
472 prev2 = p;
473 p = p->next;
c84b8b50 474
0b2cf5c8
DY
475 if (p->type != BNODE)
476 continue;
477
478 /*
479 * Mark the end of our 1 board
480 * chain of configs.
481 */
482 prev2->next = NULL;
483
484 /*
485 * Link the "next" board to the
486 * previous board, effectively
487 * "unlinking" our board from
488 * the main config.
489 */
490 prev->next = p;
491
492 return found;
493 }
494 /*
495 * It must be the last board in the list.
496 */
497 prev->next = NULL;
498 return found;
499 }
500 return NULL;
c84b8b50
S
501}
502
c84b8b50 503/*
0b2cf5c8
DY
504 * Given a board pointer, walks the config link, counting up
505 * all ports user specified should be on the board.
506 * (This does NOT mean they are all actually present right now tho)
c84b8b50 507 */
0b2cf5c8 508static uint dgap_config_get_num_prts(struct board_t *bd)
c84b8b50 509{
0b2cf5c8
DY
510 int count = 0;
511 struct cnode *p;
c84b8b50 512
0b2cf5c8
DY
513 if (!bd)
514 return 0;
c84b8b50 515
0b2cf5c8 516 for (p = bd->bd_config; p; p = p->next) {
0b2cf5c8
DY
517 switch (p->type) {
518 case BNODE:
519 /*
520 * check for pcxr types.
521 */
522 if (p->u.board.type > EPCFE)
523 count += p->u.board.nport;
524 break;
525 case CNODE:
526 count += p->u.conc.nport;
527 break;
528 case MNODE:
529 count += p->u.module.nport;
530 break;
531 }
f86c55c9 532 }
0b2cf5c8
DY
533 return count;
534}
c84b8b50 535
0b2cf5c8
DY
536static char *dgap_create_config_string(struct board_t *bd, char *string)
537{
538 char *ptr = string;
539 struct cnode *p;
540 struct cnode *q;
541 int speed;
c84b8b50 542
0b2cf5c8
DY
543 if (!bd) {
544 *ptr = 0xff;
545 return string;
c84b8b50
S
546 }
547
0b2cf5c8 548 for (p = bd->bd_config; p; p = p->next) {
0b2cf5c8
DY
549 switch (p->type) {
550 case LNODE:
551 *ptr = '\0';
552 ptr++;
553 *ptr = p->u.line.speed;
554 ptr++;
555 break;
556 case CNODE:
557 /*
558 * Because the EPC/con concentrators can have EM modules
559 * hanging off of them, we have to walk ahead in the
560 * list and keep adding the number of ports on each EM
561 * to the config. UGH!
562 */
563 speed = p->u.conc.speed;
564 q = p->next;
565 if (q && (q->type == MNODE)) {
566 *ptr = (p->u.conc.nport + 0x80);
567 ptr++;
568 p = q;
569 while (q->next && (q->next->type) == MNODE) {
570 *ptr = (q->u.module.nport + 0x80);
571 ptr++;
572 p = q;
573 q = q->next;
574 }
575 *ptr = q->u.module.nport;
576 ptr++;
577 } else {
578 *ptr = p->u.conc.nport;
579 ptr++;
580 }
f86c55c9 581
0b2cf5c8
DY
582 *ptr = speed;
583 ptr++;
584 break;
585 }
586 }
f86c55c9 587
0b2cf5c8
DY
588 *ptr = 0xff;
589 return string;
c84b8b50
S
590}
591
0b2cf5c8
DY
592/*
593 * Parse a configuration file read into memory as a string.
594 */
595static int dgap_parsefile(char **in)
305ec874 596{
0b2cf5c8 597 struct cnode *p, *brd, *line, *conc;
7d6069d7 598 int rc;
0b2cf5c8
DY
599 char *s;
600 int linecnt = 0;
c84b8b50 601
0b2cf5c8
DY
602 p = &dgap_head;
603 brd = line = conc = NULL;
c84b8b50 604
0b2cf5c8
DY
605 /* perhaps we are adding to an existing list? */
606 while (p->next)
607 p = p->next;
c84b8b50 608
0b2cf5c8
DY
609 /* file must start with a BEGIN */
610 while ((rc = dgap_gettok(in)) != BEGIN) {
611 if (rc == 0) {
612 pr_err("unexpected EOF");
613 return -1;
614 }
c84b8b50 615 }
c84b8b50 616
0b2cf5c8
DY
617 for (; ;) {
618 int board_type = 0;
619 int conc_type = 0;
620 int module_type = 0;
78a7966e 621
0b2cf5c8
DY
622 rc = dgap_gettok(in);
623 if (rc == 0) {
624 pr_err("unexpected EOF");
625 return -1;
626 }
b28ec88a 627
0b2cf5c8
DY
628 switch (rc) {
629 case BEGIN: /* should only be 1 begin */
630 pr_err("unexpected config_begin\n");
631 return -1;
b28ec88a 632
0b2cf5c8
DY
633 case END:
634 return 0;
9e844016 635
0b2cf5c8
DY
636 case BOARD: /* board info */
637 if (dgap_checknode(p))
638 return -1;
b28ec88a 639
0b2cf5c8
DY
640 p->next = kzalloc(sizeof(struct cnode), GFP_KERNEL);
641 if (!p->next)
e98631d8 642 return -ENOMEM;
b28ec88a 643
0b2cf5c8 644 p = p->next;
23aa2ad4 645
0b2cf5c8
DY
646 p->type = BNODE;
647 p->u.board.status = kstrdup("No", GFP_KERNEL);
648 line = conc = NULL;
649 brd = p;
650 linecnt = -1;
b28ec88a 651
0b2cf5c8
DY
652 board_type = dgap_gettok(in);
653 if (board_type == 0) {
654 pr_err("board !!type not specified");
655 return -1;
656 }
b28ec88a 657
0b2cf5c8 658 p->u.board.type = board_type;
b28ec88a 659
0b2cf5c8 660 break;
b28ec88a 661
0b2cf5c8
DY
662 case MEM: /* memory address */
663 if (p->type != BNODE) {
664 pr_err("memory address only valid for boards");
665 return -1;
666 }
667 s = dgap_getword(in);
668 if (!s) {
669 pr_err("unexpected end of file");
670 return -1;
671 }
5b62408f 672 kfree(p->u.board.addrstr);
0b2cf5c8
DY
673 p->u.board.addrstr = kstrdup(s, GFP_KERNEL);
674 if (kstrtoul(s, 0, &p->u.board.addr)) {
675 pr_err("bad number for memory address");
676 return -1;
c84b8b50 677 }
0b2cf5c8
DY
678 p->u.board.v_addr = 1;
679 break;
c84b8b50 680
0b2cf5c8
DY
681 case PCIINFO: /* pci information */
682 if (p->type != BNODE) {
683 pr_err("memory address only valid for boards");
684 return -1;
685 }
686 s = dgap_getword(in);
687 if (!s) {
688 pr_err("unexpected end of file");
689 return -1;
690 }
5b62408f 691 kfree(p->u.board.pcibusstr);
0b2cf5c8
DY
692 p->u.board.pcibusstr = kstrdup(s, GFP_KERNEL);
693 if (kstrtoul(s, 0, &p->u.board.pcibus)) {
694 pr_err("bad number for pci bus");
695 return -1;
696 }
697 p->u.board.v_pcibus = 1;
698 s = dgap_getword(in);
699 if (!s) {
700 pr_err("unexpected end of file");
701 return -1;
702 }
5b62408f 703 kfree(p->u.board.pcislotstr);
0b2cf5c8
DY
704 p->u.board.pcislotstr = kstrdup(s, GFP_KERNEL);
705 if (kstrtoul(s, 0, &p->u.board.pcislot)) {
706 pr_err("bad number for pci slot");
707 return -1;
708 }
709 p->u.board.v_pcislot = 1;
710 break;
c84b8b50 711
0b2cf5c8
DY
712 case METHOD:
713 if (p->type != BNODE) {
714 pr_err("install method only valid for boards");
715 return -1;
716 }
717 s = dgap_getword(in);
718 if (!s) {
719 pr_err("unexpected end of file");
720 return -1;
721 }
5b62408f 722 kfree(p->u.board.method);
0b2cf5c8
DY
723 p->u.board.method = kstrdup(s, GFP_KERNEL);
724 p->u.board.v_method = 1;
725 break;
a6792a3e 726
0b2cf5c8
DY
727 case STATUS:
728 if (p->type != BNODE) {
729 pr_err("config status only valid for boards");
730 return -1;
731 }
732 s = dgap_getword(in);
733 if (!s) {
734 pr_err("unexpected end of file");
735 return -1;
736 }
5b62408f 737 kfree(p->u.board.status);
0b2cf5c8
DY
738 p->u.board.status = kstrdup(s, GFP_KERNEL);
739 break;
a6792a3e 740
0b2cf5c8
DY
741 case NPORTS: /* number of ports */
742 if (p->type == BNODE) {
743 s = dgap_getword(in);
744 if (!s) {
745 pr_err("unexpected end of file");
746 return -1;
747 }
748 if (kstrtol(s, 0, &p->u.board.nport)) {
749 pr_err("bad number for number of ports");
750 return -1;
751 }
752 p->u.board.v_nport = 1;
753 } else if (p->type == CNODE) {
754 s = dgap_getword(in);
755 if (!s) {
756 pr_err("unexpected end of file");
757 return -1;
758 }
759 if (kstrtol(s, 0, &p->u.conc.nport)) {
760 pr_err("bad number for number of ports");
761 return -1;
762 }
763 p->u.conc.v_nport = 1;
764 } else if (p->type == MNODE) {
765 s = dgap_getword(in);
766 if (!s) {
767 pr_err("unexpected end of file");
768 return -1;
769 }
770 if (kstrtol(s, 0, &p->u.module.nport)) {
771 pr_err("bad number for number of ports");
772 return -1;
773 }
774 p->u.module.v_nport = 1;
775 } else {
776 pr_err("nports only valid for concentrators or modules");
777 return -1;
778 }
779 break;
a6792a3e 780
0b2cf5c8
DY
781 case ID: /* letter ID used in tty name */
782 s = dgap_getword(in);
783 if (!s) {
784 pr_err("unexpected end of file");
785 return -1;
786 }
5b62408f 787 kfree(p->u.board.status);
0b2cf5c8 788 p->u.board.status = kstrdup(s, GFP_KERNEL);
a6792a3e 789
0b2cf5c8 790 if (p->type == CNODE) {
5b62408f 791 kfree(p->u.conc.id);
0b2cf5c8
DY
792 p->u.conc.id = kstrdup(s, GFP_KERNEL);
793 p->u.conc.v_id = 1;
794 } else if (p->type == MNODE) {
5b62408f 795 kfree(p->u.module.id);
0b2cf5c8
DY
796 p->u.module.id = kstrdup(s, GFP_KERNEL);
797 p->u.module.v_id = 1;
798 } else {
799 pr_err("id only valid for concentrators or modules");
800 return -1;
801 }
802 break;
a6792a3e 803
0b2cf5c8
DY
804 case STARTO: /* start offset of ID */
805 if (p->type == BNODE) {
806 s = dgap_getword(in);
807 if (!s) {
808 pr_err("unexpected end of file");
809 return -1;
810 }
811 if (kstrtol(s, 0, &p->u.board.start)) {
812 pr_err("bad number for start of tty count");
813 return -1;
814 }
815 p->u.board.v_start = 1;
816 } else if (p->type == CNODE) {
817 s = dgap_getword(in);
818 if (!s) {
819 pr_err("unexpected end of file");
820 return -1;
821 }
822 if (kstrtol(s, 0, &p->u.conc.start)) {
823 pr_err("bad number for start of tty count");
824 return -1;
825 }
826 p->u.conc.v_start = 1;
827 } else if (p->type == MNODE) {
828 s = dgap_getword(in);
829 if (!s) {
830 pr_err("unexpected end of file");
831 return -1;
832 }
833 if (kstrtol(s, 0, &p->u.module.start)) {
834 pr_err("bad number for start of tty count");
835 return -1;
836 }
837 p->u.module.v_start = 1;
838 } else {
839 pr_err("start only valid for concentrators or modules");
840 return -1;
841 }
842 break;
a6792a3e 843
0b2cf5c8
DY
844 case TTYN: /* tty name prefix */
845 if (dgap_checknode(p))
846 return -1;
a6792a3e 847
0b2cf5c8
DY
848 p->next = kzalloc(sizeof(struct cnode), GFP_KERNEL);
849 if (!p->next)
e98631d8 850 return -ENOMEM;
a6792a3e 851
0b2cf5c8
DY
852 p = p->next;
853 p->type = TNODE;
a6792a3e 854
0b2cf5c8
DY
855 s = dgap_getword(in);
856 if (!s) {
857 pr_err("unexpeced end of file");
858 return -1;
859 }
860 p->u.ttyname = kstrdup(s, GFP_KERNEL);
861 if (!p->u.ttyname)
862 return -1;
a6792a3e 863
0b2cf5c8 864 break;
a6792a3e 865
0b2cf5c8
DY
866 case CU: /* cu name prefix */
867 if (dgap_checknode(p))
868 return -1;
a6792a3e 869
0b2cf5c8
DY
870 p->next = kzalloc(sizeof(struct cnode), GFP_KERNEL);
871 if (!p->next)
e98631d8 872 return -ENOMEM;
a6792a3e 873
0b2cf5c8
DY
874 p = p->next;
875 p->type = CUNODE;
a6792a3e 876
0b2cf5c8
DY
877 s = dgap_getword(in);
878 if (!s) {
879 pr_err("unexpeced end of file");
880 return -1;
881 }
882 p->u.cuname = kstrdup(s, GFP_KERNEL);
883 if (!p->u.cuname)
884 return -1;
a6792a3e 885
0b2cf5c8 886 break;
a6792a3e 887
0b2cf5c8
DY
888 case LINE: /* line information */
889 if (dgap_checknode(p))
890 return -1;
891 if (!brd) {
892 pr_err("must specify board before line info");
893 return -1;
894 }
895 switch (brd->u.board.type) {
896 case PPCM:
897 pr_err("line not valid for PC/em");
898 return -1;
899 }
a6792a3e 900
0b2cf5c8
DY
901 p->next = kzalloc(sizeof(struct cnode), GFP_KERNEL);
902 if (!p->next)
e98631d8 903 return -ENOMEM;
a6792a3e 904
0b2cf5c8
DY
905 p = p->next;
906 p->type = LNODE;
907 conc = NULL;
908 line = p;
909 linecnt++;
a6792a3e
MH
910 break;
911
0b2cf5c8
DY
912 case CONC: /* concentrator information */
913 if (dgap_checknode(p))
914 return -1;
915 if (!line) {
916 pr_err("must specify line info before concentrator");
917 return -1;
918 }
a6792a3e 919
0b2cf5c8
DY
920 p->next = kzalloc(sizeof(struct cnode), GFP_KERNEL);
921 if (!p->next)
e98631d8 922 return -ENOMEM;
a6792a3e 923
0b2cf5c8
DY
924 p = p->next;
925 p->type = CNODE;
926 conc = p;
a6792a3e 927
0b2cf5c8
DY
928 if (linecnt)
929 brd->u.board.conc2++;
930 else
931 brd->u.board.conc1++;
a6792a3e 932
0b2cf5c8 933 conc_type = dgap_gettok(in);
629c7349
IC
934 if (conc_type == 0 ||
935 (conc_type != CX && conc_type != EPC)) {
0b2cf5c8
DY
936 pr_err("failed to set a type of concentratros");
937 return -1;
938 }
a6792a3e 939
0b2cf5c8 940 p->u.conc.type = conc_type;
a6792a3e 941
0b2cf5c8 942 break;
a6792a3e 943
0b2cf5c8
DY
944 case MOD: /* EBI module */
945 if (dgap_checknode(p))
946 return -1;
947 if (!brd) {
948 pr_err("must specify board info before EBI modules");
949 return -1;
950 }
951 switch (brd->u.board.type) {
952 case PPCM:
953 linecnt = 0;
954 break;
955 default:
956 if (!conc) {
957 pr_err("must specify concentrator info before EBI module");
958 return -1;
959 }
960 }
a6792a3e 961
0b2cf5c8
DY
962 p->next = kzalloc(sizeof(struct cnode), GFP_KERNEL);
963 if (!p->next)
e98631d8 964 return -ENOMEM;
a6792a3e 965
0b2cf5c8
DY
966 p = p->next;
967 p->type = MNODE;
a6792a3e 968
0b2cf5c8
DY
969 if (linecnt)
970 brd->u.board.module2++;
971 else
972 brd->u.board.module1++;
a6792a3e 973
0b2cf5c8 974 module_type = dgap_gettok(in);
629c7349
IC
975 if (module_type == 0 ||
976 (module_type != PORTS && module_type != MODEM)) {
0b2cf5c8
DY
977 pr_err("failed to set a type of module");
978 return -1;
979 }
a6792a3e 980
0b2cf5c8 981 p->u.module.type = module_type;
a6792a3e 982
0b2cf5c8 983 break;
a6792a3e 984
0b2cf5c8
DY
985 case CABLE:
986 if (p->type == LNODE) {
987 s = dgap_getword(in);
988 if (!s) {
989 pr_err("unexpected end of file");
990 return -1;
991 }
5b62408f 992 kfree(p->u.line.cable);
0b2cf5c8
DY
993 p->u.line.cable = kstrdup(s, GFP_KERNEL);
994 p->u.line.v_cable = 1;
995 }
996 break;
a6792a3e 997
0b2cf5c8
DY
998 case SPEED: /* sync line speed indication */
999 if (p->type == LNODE) {
1000 s = dgap_getword(in);
1001 if (!s) {
1002 pr_err("unexpected end of file");
1003 return -1;
1004 }
1005 if (kstrtol(s, 0, &p->u.line.speed)) {
1006 pr_err("bad number for line speed");
1007 return -1;
1008 }
1009 p->u.line.v_speed = 1;
1010 } else if (p->type == CNODE) {
1011 s = dgap_getword(in);
1012 if (!s) {
1013 pr_err("unexpected end of file");
1014 return -1;
1015 }
1016 if (kstrtol(s, 0, &p->u.conc.speed)) {
1017 pr_err("bad number for line speed");
1018 return -1;
1019 }
1020 p->u.conc.v_speed = 1;
1021 } else {
1022 pr_err("speed valid only for lines or concentrators.");
1023 return -1;
1024 }
1025 break;
a6792a3e 1026
0b2cf5c8
DY
1027 case CONNECT:
1028 if (p->type == CNODE) {
1029 s = dgap_getword(in);
1030 if (!s) {
1031 pr_err("unexpected end of file");
1032 return -1;
1033 }
5b62408f 1034 kfree(p->u.conc.connect);
0b2cf5c8
DY
1035 p->u.conc.connect = kstrdup(s, GFP_KERNEL);
1036 p->u.conc.v_connect = 1;
1037 }
1038 break;
1039 case PRINT: /* transparent print name prefix */
1040 if (dgap_checknode(p))
1041 return -1;
a6792a3e 1042
0b2cf5c8
DY
1043 p->next = kzalloc(sizeof(struct cnode), GFP_KERNEL);
1044 if (!p->next)
e98631d8 1045 return -ENOMEM;
a6792a3e 1046
0b2cf5c8
DY
1047 p = p->next;
1048 p->type = PNODE;
a6792a3e 1049
0b2cf5c8
DY
1050 s = dgap_getword(in);
1051 if (!s) {
1052 pr_err("unexpeced end of file");
1053 return -1;
1054 }
1055 p->u.printname = kstrdup(s, GFP_KERNEL);
1056 if (!p->u.printname)
1057 return -1;
a6792a3e 1058
0b2cf5c8 1059 break;
a6792a3e 1060
0b2cf5c8
DY
1061 case CMAJOR: /* major number */
1062 if (dgap_checknode(p))
1063 return -1;
a6792a3e 1064
0b2cf5c8
DY
1065 p->next = kzalloc(sizeof(struct cnode), GFP_KERNEL);
1066 if (!p->next)
e98631d8 1067 return -ENOMEM;
a6792a3e 1068
0b2cf5c8
DY
1069 p = p->next;
1070 p->type = JNODE;
a6792a3e 1071
0b2cf5c8
DY
1072 s = dgap_getword(in);
1073 if (!s) {
1074 pr_err("unexpected end of file");
1075 return -1;
1076 }
1077 if (kstrtol(s, 0, &p->u.majornumber)) {
1078 pr_err("bad number for major number");
1079 return -1;
1080 }
1081 break;
a6792a3e 1082
0b2cf5c8
DY
1083 case ALTPIN: /* altpin setting */
1084 if (dgap_checknode(p))
1085 return -1;
a6792a3e 1086
0b2cf5c8
DY
1087 p->next = kzalloc(sizeof(struct cnode), GFP_KERNEL);
1088 if (!p->next)
e98631d8 1089 return -ENOMEM;
a6792a3e 1090
0b2cf5c8
DY
1091 p = p->next;
1092 p->type = ANODE;
a6792a3e 1093
0b2cf5c8
DY
1094 s = dgap_getword(in);
1095 if (!s) {
1096 pr_err("unexpected end of file");
1097 return -1;
1098 }
1099 if (kstrtol(s, 0, &p->u.altpin)) {
1100 pr_err("bad number for altpin");
1101 return -1;
1102 }
1103 break;
a6792a3e 1104
0b2cf5c8
DY
1105 case USEINTR: /* enable interrupt setting */
1106 if (dgap_checknode(p))
1107 return -1;
a6792a3e 1108
0b2cf5c8
DY
1109 p->next = kzalloc(sizeof(struct cnode), GFP_KERNEL);
1110 if (!p->next)
e98631d8 1111 return -ENOMEM;
a6792a3e 1112
0b2cf5c8
DY
1113 p = p->next;
1114 p->type = INTRNODE;
1115 s = dgap_getword(in);
1116 if (!s) {
1117 pr_err("unexpected end of file");
1118 return -1;
1119 }
1120 if (kstrtol(s, 0, &p->u.useintr)) {
1121 pr_err("bad number for useintr");
1122 return -1;
1123 }
1124 break;
a6792a3e 1125
0b2cf5c8
DY
1126 case TTSIZ: /* size of tty structure */
1127 if (dgap_checknode(p))
1128 return -1;
a6792a3e 1129
0b2cf5c8
DY
1130 p->next = kzalloc(sizeof(struct cnode), GFP_KERNEL);
1131 if (!p->next)
e98631d8 1132 return -ENOMEM;
a6792a3e 1133
0b2cf5c8
DY
1134 p = p->next;
1135 p->type = TSNODE;
a6792a3e 1136
0b2cf5c8
DY
1137 s = dgap_getword(in);
1138 if (!s) {
1139 pr_err("unexpected end of file");
1140 return -1;
1141 }
1142 if (kstrtol(s, 0, &p->u.ttysize)) {
1143 pr_err("bad number for ttysize");
1144 return -1;
1145 }
1146 break;
a6792a3e 1147
0b2cf5c8
DY
1148 case CHSIZ: /* channel structure size */
1149 if (dgap_checknode(p))
1150 return -1;
a6792a3e 1151
0b2cf5c8
DY
1152 p->next = kzalloc(sizeof(struct cnode), GFP_KERNEL);
1153 if (!p->next)
e98631d8 1154 return -ENOMEM;
a6792a3e 1155
0b2cf5c8
DY
1156 p = p->next;
1157 p->type = CSNODE;
a6792a3e 1158
0b2cf5c8
DY
1159 s = dgap_getword(in);
1160 if (!s) {
1161 pr_err("unexpected end of file");
1162 return -1;
1163 }
1164 if (kstrtol(s, 0, &p->u.chsize)) {
1165 pr_err("bad number for chsize");
1166 return -1;
1167 }
1168 break;
a6792a3e 1169
0b2cf5c8
DY
1170 case BSSIZ: /* board structure size */
1171 if (dgap_checknode(p))
1172 return -1;
a6792a3e 1173
0b2cf5c8
DY
1174 p->next = kzalloc(sizeof(struct cnode), GFP_KERNEL);
1175 if (!p->next)
e98631d8 1176 return -ENOMEM;
a6792a3e 1177
0b2cf5c8
DY
1178 p = p->next;
1179 p->type = BSNODE;
a6792a3e 1180
0b2cf5c8
DY
1181 s = dgap_getword(in);
1182 if (!s) {
1183 pr_err("unexpected end of file");
1184 return -1;
1185 }
1186 if (kstrtol(s, 0, &p->u.bssize)) {
1187 pr_err("bad number for bssize");
1188 return -1;
1189 }
1190 break;
a6792a3e 1191
0b2cf5c8
DY
1192 case UNTSIZ: /* sched structure size */
1193 if (dgap_checknode(p))
1194 return -1;
a6792a3e 1195
0b2cf5c8
DY
1196 p->next = kzalloc(sizeof(struct cnode), GFP_KERNEL);
1197 if (!p->next)
e98631d8 1198 return -ENOMEM;
a6792a3e 1199
0b2cf5c8
DY
1200 p = p->next;
1201 p->type = USNODE;
a6792a3e 1202
0b2cf5c8
DY
1203 s = dgap_getword(in);
1204 if (!s) {
1205 pr_err("unexpected end of file");
1206 return -1;
1207 }
1208 if (kstrtol(s, 0, &p->u.unsize)) {
1209 pr_err("bad number for schedsize");
1210 return -1;
1211 }
1212 break;
a6792a3e 1213
0b2cf5c8
DY
1214 case F2SIZ: /* f2200 structure size */
1215 if (dgap_checknode(p))
1216 return -1;
a6792a3e 1217
0b2cf5c8
DY
1218 p->next = kzalloc(sizeof(struct cnode), GFP_KERNEL);
1219 if (!p->next)
e98631d8 1220 return -ENOMEM;
0b2cf5c8
DY
1221
1222 p = p->next;
1223 p->type = FSNODE;
1224
1225 s = dgap_getword(in);
1226 if (!s) {
1227 pr_err("unexpected end of file");
1228 return -1;
1229 }
1230 if (kstrtol(s, 0, &p->u.f2size)) {
1231 pr_err("bad number for f2200size");
1232 return -1;
1233 }
1234 break;
a6792a3e 1235
0b2cf5c8
DY
1236 case VPSIZ: /* vpix structure size */
1237 if (dgap_checknode(p))
1238 return -1;
a6792a3e 1239
0b2cf5c8
DY
1240 p->next = kzalloc(sizeof(struct cnode), GFP_KERNEL);
1241 if (!p->next)
e98631d8 1242 return -ENOMEM;
a6792a3e 1243
0b2cf5c8
DY
1244 p = p->next;
1245 p->type = VSNODE;
a6792a3e 1246
0b2cf5c8
DY
1247 s = dgap_getword(in);
1248 if (!s) {
1249 pr_err("unexpected end of file");
1250 return -1;
1251 }
1252 if (kstrtol(s, 0, &p->u.vpixsize)) {
1253 pr_err("bad number for vpixsize");
1254 return -1;
1255 }
1256 break;
1257 }
1258 }
1259}
a6792a3e 1260
0b2cf5c8
DY
1261static void dgap_cleanup_nodes(void)
1262{
1263 struct cnode *p;
a6792a3e 1264
0b2cf5c8 1265 p = &dgap_head;
a6792a3e 1266
0b2cf5c8
DY
1267 while (p) {
1268 struct cnode *tmp = p->next;
a6792a3e 1269
0b2cf5c8
DY
1270 if (p->type == NULLNODE) {
1271 p = tmp;
1272 continue;
1273 }
a6792a3e 1274
0b2cf5c8
DY
1275 switch (p->type) {
1276 case BNODE:
0b2cf5c8
DY
1277 kfree(p->u.board.addrstr);
1278 kfree(p->u.board.pcibusstr);
1279 kfree(p->u.board.pcislotstr);
1280 kfree(p->u.board.method);
1281 break;
1282 case CNODE:
1283 kfree(p->u.conc.id);
1284 kfree(p->u.conc.connect);
1285 break;
1286 case MNODE:
1287 kfree(p->u.module.id);
1288 break;
1289 case TNODE:
1290 kfree(p->u.ttyname);
1291 break;
1292 case CUNODE:
1293 kfree(p->u.cuname);
1294 break;
1295 case LNODE:
1296 kfree(p->u.line.cable);
1297 break;
1298 case PNODE:
1299 kfree(p->u.printname);
1300 break;
1301 }
a6792a3e 1302
0b2cf5c8
DY
1303 kfree(p->u.board.status);
1304 kfree(p);
1305 p = tmp;
1306 }
a6792a3e
MH
1307}
1308
a6792a3e 1309/*
0b2cf5c8
DY
1310 * Retrives the current custom baud rate from FEP memory,
1311 * and returns it back to the user.
1312 * Returns 0 on error.
a6792a3e 1313 */
0b2cf5c8 1314static uint dgap_get_custom_baud(struct channel_t *ch)
a6792a3e 1315{
0b2cf5c8
DY
1316 u8 __iomem *vaddr;
1317 ulong offset;
a6792a3e 1318
0b2cf5c8
DY
1319 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
1320 return 0;
a6792a3e 1321
0b2cf5c8
DY
1322 if (!ch->ch_bd || ch->ch_bd->magic != DGAP_BOARD_MAGIC)
1323 return 0;
a6792a3e 1324
0b2cf5c8
DY
1325 if (!(ch->ch_bd->bd_flags & BD_FEP5PLUS))
1326 return 0;
a6792a3e 1327
0b2cf5c8 1328 vaddr = ch->ch_bd->re_map_membase;
a6792a3e 1329
0b2cf5c8
DY
1330 if (!vaddr)
1331 return 0;
a6792a3e 1332
0b2cf5c8
DY
1333 /*
1334 * Go get from fep mem, what the fep
1335 * believes the custom baud rate is.
1336 */
1337 offset = (ioread16(vaddr + ECS_SEG) << 4) + (ch->ch_portnum * 0x28)
1338 + LINE_SPEED;
a6792a3e 1339
6019ee40 1340 return readw(vaddr + offset);
0b2cf5c8 1341}
a6792a3e 1342
0b2cf5c8
DY
1343/*
1344 * Remap PCI memory.
1345 */
1346static int dgap_remap(struct board_t *brd)
1347{
1348 if (!brd || brd->magic != DGAP_BOARD_MAGIC)
1349 return -EIO;
a6792a3e 1350
0b2cf5c8
DY
1351 if (!request_mem_region(brd->membase, 0x200000, "dgap"))
1352 return -ENOMEM;
a6792a3e 1353
629c7349 1354 if (!request_mem_region(brd->membase + PCI_IO_OFFSET, 0x200000, "dgap"))
aa9895da 1355 goto err_req_mem;
a6792a3e 1356
0b2cf5c8 1357 brd->re_map_membase = ioremap(brd->membase, 0x200000);
aa9895da
DY
1358 if (!brd->re_map_membase)
1359 goto err_remap_mem;
a6792a3e 1360
0b2cf5c8 1361 brd->re_map_port = ioremap((brd->membase + PCI_IO_OFFSET), 0x200000);
aa9895da
DY
1362 if (!brd->re_map_port)
1363 goto err_remap_port;
a6792a3e 1364
0b2cf5c8 1365 return 0;
aa9895da
DY
1366
1367err_remap_port:
1368 iounmap(brd->re_map_membase);
1369err_remap_mem:
1370 release_mem_region(brd->membase + PCI_IO_OFFSET, 0x200000);
1371err_req_mem:
1372 release_mem_region(brd->membase, 0x200000);
1373
1374 return -ENOMEM;
0b2cf5c8 1375}
a6792a3e 1376
0b2cf5c8
DY
1377static void dgap_unmap(struct board_t *brd)
1378{
1379 iounmap(brd->re_map_port);
1380 iounmap(brd->re_map_membase);
1381 release_mem_region(brd->membase + PCI_IO_OFFSET, 0x200000);
1382 release_mem_region(brd->membase, 0x200000);
1383}
a6792a3e 1384
0b2cf5c8
DY
1385/*
1386 * dgap_parity_scan()
1387 *
1388 * Convert the FEP5 way of reporting parity errors and breaks into
1389 * the Linux line discipline way.
1390 */
1391static void dgap_parity_scan(struct channel_t *ch, unsigned char *cbuf,
629c7349 1392 unsigned char *fbuf, int *len)
0b2cf5c8
DY
1393{
1394 int l = *len;
1395 int count = 0;
1396 unsigned char *in, *cout, *fout;
1397 unsigned char c;
a6792a3e 1398
0b2cf5c8
DY
1399 in = cbuf;
1400 cout = cbuf;
1401 fout = fbuf;
1402
1403 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
1404 return;
1405
1406 while (l--) {
1407 c = *in++;
1408 switch (ch->pscan_state) {
1409 default:
1410 /* reset to sanity and fall through */
1411 ch->pscan_state = 0;
a6792a3e 1412
0b2cf5c8
DY
1413 case 0:
1414 /* No FF seen yet */
18122553 1415 if (c == (unsigned char)'\377')
0b2cf5c8
DY
1416 /* delete this character from stream */
1417 ch->pscan_state = 1;
1418 else {
1419 *cout++ = c;
1420 *fout++ = TTY_NORMAL;
1421 count += 1;
1422 }
1423 break;
a6792a3e 1424
0b2cf5c8
DY
1425 case 1:
1426 /* first FF seen */
18122553 1427 if (c == (unsigned char)'\377') {
0b2cf5c8
DY
1428 /* doubled ff, transform to single ff */
1429 *cout++ = c;
1430 *fout++ = TTY_NORMAL;
1431 count += 1;
1432 ch->pscan_state = 0;
1433 } else {
1434 /* save value examination in next state */
1435 ch->pscan_savechar = c;
1436 ch->pscan_state = 2;
1437 }
1438 break;
a6792a3e 1439
0b2cf5c8
DY
1440 case 2:
1441 /* third character of ff sequence */
a6792a3e 1442
0b2cf5c8 1443 *cout++ = c;
a6792a3e 1444
0b2cf5c8 1445 if (ch->pscan_savechar == 0x0) {
0b2cf5c8
DY
1446 if (c == 0x0) {
1447 ch->ch_err_break++;
1448 *fout++ = TTY_BREAK;
1449 } else {
1450 ch->ch_err_parity++;
1451 *fout++ = TTY_PARITY;
1452 }
1453 }
a6792a3e 1454
0b2cf5c8
DY
1455 count += 1;
1456 ch->pscan_state = 0;
1457 }
1458 }
1459 *len = count;
a6792a3e
MH
1460}
1461
0b2cf5c8 1462/*=======================================================================
a6792a3e 1463 *
0b2cf5c8
DY
1464 * dgap_input - Process received data.
1465 *
1466 * ch - Pointer to channel structure.
1467 *
1468 *=======================================================================*/
1469
1470static void dgap_input(struct channel_t *ch)
a6792a3e 1471{
174efc1f 1472 struct board_t *bd;
0b2cf5c8
DY
1473 struct bs_t __iomem *bs;
1474 struct tty_struct *tp;
1475 struct tty_ldisc *ld;
1476 uint rmask;
1477 uint head;
1478 uint tail;
1479 int data_len;
1480 ulong lock_flags;
1481 ulong lock_flags2;
1482 int flip_len;
1483 int len;
1484 int n;
1485 u8 *buf;
1486 u8 tmpchar;
1487 int s;
a6792a3e 1488
0b2cf5c8 1489 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
a6792a3e
MH
1490 return;
1491
0b2cf5c8 1492 tp = ch->ch_tun.un_tty;
a6792a3e 1493
0b2cf5c8
DY
1494 bs = ch->ch_bs;
1495 if (!bs)
a6792a3e
MH
1496 return;
1497
1498 bd = ch->ch_bd;
1499 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
1500 return;
1501
0b2cf5c8
DY
1502 spin_lock_irqsave(&bd->bd_lock, lock_flags);
1503 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
a6792a3e 1504
0b2cf5c8
DY
1505 /*
1506 * Figure the number of characters in the buffer.
1507 * Exit immediately if none.
1508 */
a6792a3e 1509
0b2cf5c8 1510 rmask = ch->ch_rsize - 1;
a6792a3e 1511
44209c93 1512 head = readw(&bs->rx_head);
0b2cf5c8 1513 head &= rmask;
44209c93 1514 tail = readw(&bs->rx_tail);
0b2cf5c8
DY
1515 tail &= rmask;
1516
1517 data_len = (head - tail) & rmask;
1518
1519 if (data_len == 0) {
44209c93 1520 writeb(1, &bs->idata);
0b2cf5c8
DY
1521 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
1522 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
a6792a3e 1523 return;
0b2cf5c8 1524 }
a6792a3e 1525
0b2cf5c8
DY
1526 /*
1527 * If the device is not open, or CREAD is off, flush
1528 * input data and return immediately.
1529 */
1530 if ((bd->state != BOARD_READY) || !tp ||
1531 (tp->magic != TTY_MAGIC) ||
1532 !(ch->ch_tun.un_flags & UN_ISOPEN) ||
1533 !(tp->termios.c_cflag & CREAD) ||
1534 (ch->ch_tun.un_flags & UN_CLOSING)) {
44209c93
IC
1535 writew(head, &bs->rx_tail);
1536 writeb(1, &bs->idata);
0b2cf5c8
DY
1537 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
1538 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
a6792a3e 1539 return;
0b2cf5c8 1540 }
a6792a3e 1541
0b2cf5c8
DY
1542 /*
1543 * If we are throttled, simply don't read any data.
1544 */
1545 if (ch->ch_flags & CH_RXBLOCK) {
44209c93 1546 writeb(1, &bs->idata);
0b2cf5c8
DY
1547 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
1548 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
a6792a3e 1549 return;
0b2cf5c8 1550 }
a6792a3e 1551
0b2cf5c8
DY
1552 /*
1553 * Ignore oruns.
1554 */
44209c93 1555 tmpchar = readb(&bs->orun);
0b2cf5c8
DY
1556 if (tmpchar) {
1557 ch->ch_err_overrun++;
44209c93 1558 writeb(0, &bs->orun);
0b2cf5c8 1559 }
a6792a3e 1560
0b2cf5c8
DY
1561 /* Decide how much data we can send into the tty layer */
1562 flip_len = TTY_FLIPBUF_SIZE;
1563
1564 /* Chop down the length, if needed */
1565 len = min(data_len, flip_len);
1566 len = min(len, (N_TTY_BUF_SIZE - 1));
1567
1568 ld = tty_ldisc_ref(tp);
a6792a3e 1569
0b2cf5c8 1570#ifdef TTY_DONT_FLIP
a6792a3e 1571 /*
0b2cf5c8
DY
1572 * If the DONT_FLIP flag is on, don't flush our buffer, and act
1573 * like the ld doesn't have any space to put the data right now.
a6792a3e 1574 */
0b2cf5c8
DY
1575 if (test_bit(TTY_DONT_FLIP, &tp->flags))
1576 len = 0;
1577#endif
1578
1579 /*
1580 * If we were unable to get a reference to the ld,
1581 * don't flush our buffer, and act like the ld doesn't
1582 * have any space to put the data right now.
1583 */
1584 if (!ld) {
1585 len = 0;
1586 } else {
a6792a3e 1587 /*
0b2cf5c8
DY
1588 * If ld doesn't have a pointer to a receive_buf function,
1589 * flush the data, then act like the ld doesn't have any
1590 * space to put the data right now.
a6792a3e 1591 */
0b2cf5c8 1592 if (!ld->ops->receive_buf) {
44209c93 1593 writew(head, &bs->rx_tail);
0b2cf5c8
DY
1594 len = 0;
1595 }
82ed9774 1596 }
a6792a3e 1597
0b2cf5c8 1598 if (len <= 0) {
44209c93 1599 writeb(1, &bs->idata);
0b2cf5c8
DY
1600 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
1601 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
1602 if (ld)
1603 tty_ldisc_deref(ld);
7d6069d7
MH
1604 return;
1605 }
a6792a3e 1606
0b2cf5c8
DY
1607 buf = ch->ch_bd->flipbuf;
1608 n = len;
1609
1610 /*
1611 * n now contains the most amount of data we can copy,
1612 * bounded either by our buffer size or the amount
1613 * of data the card actually has pending...
1614 */
1615 while (n) {
0b2cf5c8
DY
1616 s = ((head >= tail) ? head : ch->ch_rsize) - tail;
1617 s = min(s, n);
1618
1619 if (s <= 0)
1620 break;
1621
1622 memcpy_fromio(buf, ch->ch_raddr + tail, s);
1623
1624 tail += s;
1625 buf += s;
a6792a3e 1626
0b2cf5c8
DY
1627 n -= s;
1628 /* Flip queue if needed */
1629 tail &= rmask;
1630 }
a6792a3e 1631
44209c93
IC
1632 writew(tail, &bs->rx_tail);
1633 writeb(1, &bs->idata);
0b2cf5c8 1634 ch->ch_rxcount += len;
a6792a3e
MH
1635
1636 /*
0b2cf5c8
DY
1637 * If we are completely raw, we don't need to go through a lot
1638 * of the tty layers that exist.
1639 * In this case, we take the shortest and fastest route we
1640 * can to relay the data to the user.
1641 *
1642 * On the other hand, if we are not raw, we need to go through
1643 * the tty layer, which has its API more well defined.
a6792a3e 1644 */
0b2cf5c8
DY
1645 if (I_PARMRK(tp) || I_BRKINT(tp) || I_INPCK(tp)) {
1646 dgap_parity_scan(ch, ch->ch_bd->flipbuf,
1647 ch->ch_bd->flipflagbuf, &len);
a6792a3e 1648
0b2cf5c8
DY
1649 len = tty_buffer_request_room(tp->port, len);
1650 tty_insert_flip_string_flags(tp->port, ch->ch_bd->flipbuf,
629c7349 1651 ch->ch_bd->flipflagbuf, len);
0b2cf5c8
DY
1652 } else {
1653 len = tty_buffer_request_room(tp->port, len);
1654 tty_insert_flip_string(tp->port, ch->ch_bd->flipbuf, len);
1655 }
a6792a3e 1656
0b2cf5c8
DY
1657 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
1658 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
a6792a3e 1659
0b2cf5c8
DY
1660 /* Tell the tty layer its okay to "eat" the data now */
1661 tty_flip_buffer_push(tp->port);
a6792a3e 1662
0b2cf5c8
DY
1663 if (ld)
1664 tty_ldisc_deref(ld);
0b2cf5c8 1665}
a6792a3e 1666
0b2cf5c8
DY
1667static void dgap_write_wakeup(struct board_t *bd, struct channel_t *ch,
1668 struct un_t *un, u32 mask,
1669 unsigned long *irq_flags1,
1670 unsigned long *irq_flags2)
1671{
1672 if (!(un->un_flags & mask))
1673 return;
492a1e7b 1674
0b2cf5c8 1675 un->un_flags &= ~mask;
492a1e7b 1676
0b2cf5c8
DY
1677 if (!(un->un_flags & UN_ISOPEN))
1678 return;
a6792a3e 1679
0b2cf5c8
DY
1680 if ((un->un_tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
1681 un->un_tty->ldisc->ops->write_wakeup) {
1682 spin_unlock_irqrestore(&ch->ch_lock, *irq_flags2);
1683 spin_unlock_irqrestore(&bd->bd_lock, *irq_flags1);
a6792a3e 1684
0b2cf5c8 1685 (un->un_tty->ldisc->ops->write_wakeup)(un->un_tty);
a6792a3e 1686
0b2cf5c8
DY
1687 spin_lock_irqsave(&bd->bd_lock, *irq_flags1);
1688 spin_lock_irqsave(&ch->ch_lock, *irq_flags2);
a6792a3e 1689 }
0b2cf5c8 1690 wake_up_interruptible(&un->un_tty->write_wait);
a6792a3e 1691 wake_up_interruptible(&un->un_flags_wait);
a6792a3e
MH
1692}
1693
0b2cf5c8
DY
1694/************************************************************************
1695 * Determines when CARRIER changes state and takes appropriate
1696 * action.
1697 ************************************************************************/
1698static void dgap_carrier(struct channel_t *ch)
a6792a3e 1699{
7dfa3831 1700 struct board_t *bd;
a6792a3e 1701
0b2cf5c8
DY
1702 int virt_carrier = 0;
1703 int phys_carrier = 0;
a6792a3e 1704
a6792a3e 1705 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
0b2cf5c8 1706 return;
a6792a3e
MH
1707
1708 bd = ch->ch_bd;
0b2cf5c8 1709
a6792a3e 1710 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
0b2cf5c8 1711 return;
a6792a3e 1712
0b2cf5c8
DY
1713 /* Make sure altpin is always set correctly */
1714 if (ch->ch_digi.digi_flags & DIGI_ALTPIN) {
1715 ch->ch_dsr = DM_CD;
1716 ch->ch_cd = DM_DSR;
1717 } else {
1718 ch->ch_dsr = DM_DSR;
1719 ch->ch_cd = DM_CD;
1720 }
a6792a3e 1721
0b2cf5c8
DY
1722 if (ch->ch_mistat & D_CD(ch))
1723 phys_carrier = 1;
a6792a3e 1724
0b2cf5c8
DY
1725 if (ch->ch_digi.digi_flags & DIGI_FORCEDCD)
1726 virt_carrier = 1;
a6792a3e 1727
0b2cf5c8
DY
1728 if (ch->ch_c_cflag & CLOCAL)
1729 virt_carrier = 1;
a6792a3e 1730
0b2cf5c8
DY
1731 /*
1732 * Test for a VIRTUAL carrier transition to HIGH.
1733 */
1734 if (((ch->ch_flags & CH_FCAR) == 0) && (virt_carrier == 1)) {
0b2cf5c8
DY
1735 /*
1736 * When carrier rises, wake any threads waiting
1737 * for carrier in the open routine.
1738 */
a6792a3e 1739
0b2cf5c8
DY
1740 if (waitqueue_active(&(ch->ch_flags_wait)))
1741 wake_up_interruptible(&ch->ch_flags_wait);
1742 }
a6792a3e
MH
1743
1744 /*
0b2cf5c8 1745 * Test for a PHYSICAL carrier transition to HIGH.
7d6069d7 1746 */
0b2cf5c8 1747 if (((ch->ch_flags & CH_CD) == 0) && (phys_carrier == 1)) {
a6792a3e 1748 /*
0b2cf5c8
DY
1749 * When carrier rises, wake any threads waiting
1750 * for carrier in the open routine.
a6792a3e 1751 */
0b2cf5c8
DY
1752
1753 if (waitqueue_active(&(ch->ch_flags_wait)))
1754 wake_up_interruptible(&ch->ch_flags_wait);
1755 }
1756
1757 /*
1758 * Test for a PHYSICAL transition to low, so long as we aren't
1759 * currently ignoring physical transitions (which is what "virtual
1760 * carrier" indicates).
1761 *
1762 * The transition of the virtual carrier to low really doesn't
1763 * matter... it really only means "ignore carrier state", not
1764 * "make pretend that carrier is there".
1765 */
1766 if ((virt_carrier == 0) &&
1767 ((ch->ch_flags & CH_CD) != 0) &&
1768 (phys_carrier == 0)) {
0b2cf5c8
DY
1769 /*
1770 * When carrier drops:
1771 *
1772 * Drop carrier on all open units.
1773 *
1774 * Flush queues, waking up any task waiting in the
1775 * line discipline.
1776 *
1777 * Send a hangup to the control terminal.
1778 *
1779 * Enable all select calls.
1780 */
1781 if (waitqueue_active(&(ch->ch_flags_wait)))
1782 wake_up_interruptible(&ch->ch_flags_wait);
1783
1784 if (ch->ch_tun.un_open_count > 0)
1785 tty_hangup(ch->ch_tun.un_tty);
1786
1787 if (ch->ch_pun.un_open_count > 0)
1788 tty_hangup(ch->ch_pun.un_tty);
a6792a3e
MH
1789 }
1790
0b2cf5c8
DY
1791 /*
1792 * Make sure that our cached values reflect the current reality.
1793 */
1794 if (virt_carrier == 1)
1795 ch->ch_flags |= CH_FCAR;
1796 else
1797 ch->ch_flags &= ~CH_FCAR;
1798
1799 if (phys_carrier == 1)
1800 ch->ch_flags |= CH_CD;
1801 else
1802 ch->ch_flags &= ~CH_CD;
a6792a3e
MH
1803}
1804
0b2cf5c8
DY
1805/*=======================================================================
1806 *
1807 * dgap_event - FEP to host event processing routine.
1808 *
1809 * bd - Board of current event.
1810 *
1811 *=======================================================================*/
1812static int dgap_event(struct board_t *bd)
a6792a3e
MH
1813{
1814 struct channel_t *ch;
0b2cf5c8
DY
1815 ulong lock_flags;
1816 ulong lock_flags2;
405b26d9 1817 struct bs_t __iomem *bs;
0b2cf5c8
DY
1818 u8 __iomem *event;
1819 u8 __iomem *vaddr;
1820 struct ev_t __iomem *eaddr;
1821 uint head;
1822 uint tail;
1823 int port;
1824 int reason;
1825 int modem;
a6792a3e 1826
0b2cf5c8 1827 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
7dfa3831 1828 return -EIO;
a6792a3e 1829
0b2cf5c8 1830 spin_lock_irqsave(&bd->bd_lock, lock_flags);
a6792a3e 1831
0b2cf5c8 1832 vaddr = bd->re_map_membase;
a6792a3e 1833
0b2cf5c8
DY
1834 if (!vaddr) {
1835 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
7dfa3831 1836 return -EIO;
0b2cf5c8 1837 }
a6792a3e 1838
18122553 1839 eaddr = (struct ev_t __iomem *)(vaddr + EVBUF);
a6792a3e 1840
0b2cf5c8 1841 /* Get our head and tail */
44209c93
IC
1842 head = readw(&eaddr->ev_head);
1843 tail = readw(&eaddr->ev_tail);
a6792a3e 1844
0b2cf5c8
DY
1845 /*
1846 * Forget it if pointers out of range.
1847 */
a6792a3e 1848
0b2cf5c8
DY
1849 if (head >= EVMAX - EVSTART || tail >= EVMAX - EVSTART ||
1850 (head | tail) & 03) {
1851 /* Let go of board lock */
1852 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
1853 return -EIO;
a6792a3e
MH
1854 }
1855
a6792a3e 1856 /*
0b2cf5c8 1857 * Loop to process all the events in the buffer.
a6792a3e 1858 */
0b2cf5c8 1859 while (tail != head) {
0b2cf5c8
DY
1860 /*
1861 * Get interrupt information.
1862 */
a6792a3e 1863
0b2cf5c8 1864 event = bd->re_map_membase + tail + EVSTART;
a6792a3e 1865
0b2cf5c8
DY
1866 port = ioread8(event);
1867 reason = ioread8(event + 1);
1868 modem = ioread8(event + 2);
045ec412 1869 ioread8(event + 3);
a6792a3e 1870
0b2cf5c8
DY
1871 /*
1872 * Make sure the interrupt is valid.
1873 */
1874 if (port >= bd->nasync)
1875 goto next;
a6792a3e 1876
0b2cf5c8
DY
1877 if (!(reason & (IFMODEM | IFBREAK | IFTLW | IFTEM | IFDATA)))
1878 goto next;
a6792a3e 1879
0b2cf5c8 1880 ch = bd->channels[port];
a6792a3e 1881
0b2cf5c8
DY
1882 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
1883 goto next;
1884
1885 /*
1886 * If we have made it here, the event was valid.
1887 * Lock down the channel.
1888 */
1889 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
1890
1891 bs = ch->ch_bs;
1892
1893 if (!bs) {
1894 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
1895 goto next;
a6792a3e 1896 }
a6792a3e 1897
0b2cf5c8
DY
1898 /*
1899 * Process received data.
1900 */
1901 if (reason & IFDATA) {
0b2cf5c8
DY
1902 /*
1903 * ALL LOCKS *MUST* BE DROPPED BEFORE CALLING INPUT!
1904 * input could send some data to ld, which in turn
1905 * could do a callback to one of our other functions.
1906 */
1907 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
1908 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
a6792a3e 1909
0b2cf5c8 1910 dgap_input(ch);
a6792a3e 1911
0b2cf5c8
DY
1912 spin_lock_irqsave(&bd->bd_lock, lock_flags);
1913 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
a6792a3e 1914
0b2cf5c8
DY
1915 if (ch->ch_flags & CH_RACTIVE)
1916 ch->ch_flags |= CH_RENABLE;
1917 else
44209c93 1918 writeb(1, &bs->idata);
a6792a3e 1919
0b2cf5c8
DY
1920 if (ch->ch_flags & CH_RWAIT) {
1921 ch->ch_flags &= ~CH_RWAIT;
a6792a3e 1922
0b2cf5c8
DY
1923 wake_up_interruptible
1924 (&ch->ch_tun.un_flags_wait);
1925 }
1926 }
a6792a3e 1927
0b2cf5c8
DY
1928 /*
1929 * Process Modem change signals.
1930 */
1931 if (reason & IFMODEM) {
1932 ch->ch_mistat = modem;
1933 dgap_carrier(ch);
1934 }
1935
1936 /*
1937 * Process break.
1938 */
1939 if (reason & IFBREAK) {
0b2cf5c8
DY
1940 if (ch->ch_tun.un_tty) {
1941 /* A break has been indicated */
1942 ch->ch_err_break++;
1943 tty_buffer_request_room
1944 (ch->ch_tun.un_tty->port, 1);
1945 tty_insert_flip_char(ch->ch_tun.un_tty->port,
1946 0, TTY_BREAK);
1947 tty_flip_buffer_push(ch->ch_tun.un_tty->port);
1948 }
1949 }
a6792a3e 1950
0b2cf5c8
DY
1951 /*
1952 * Process Transmit low.
1953 */
1954 if (reason & IFTLW) {
1955 dgap_write_wakeup(bd, ch, &ch->ch_tun, UN_LOW,
1956 &lock_flags, &lock_flags2);
1957 dgap_write_wakeup(bd, ch, &ch->ch_pun, UN_LOW,
1958 &lock_flags, &lock_flags2);
1959 if (ch->ch_flags & CH_WLOW) {
1960 ch->ch_flags &= ~CH_WLOW;
1961 wake_up_interruptible(&ch->ch_flags_wait);
1962 }
1963 }
a6792a3e 1964
0b2cf5c8
DY
1965 /*
1966 * Process Transmit empty.
1967 */
1968 if (reason & IFTEM) {
1969 dgap_write_wakeup(bd, ch, &ch->ch_tun, UN_EMPTY,
1970 &lock_flags, &lock_flags2);
1971 dgap_write_wakeup(bd, ch, &ch->ch_pun, UN_EMPTY,
1972 &lock_flags, &lock_flags2);
1973 if (ch->ch_flags & CH_WEMPTY) {
1974 ch->ch_flags &= ~CH_WEMPTY;
1975 wake_up_interruptible(&ch->ch_flags_wait);
1976 }
1977 }
a6792a3e 1978
0b2cf5c8 1979 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
a6792a3e 1980
0b2cf5c8
DY
1981next:
1982 tail = (tail + 4) & (EVMAX - EVSTART - 4);
1983 }
a6792a3e 1984
44209c93 1985 writew(tail, &eaddr->ev_tail);
0b2cf5c8 1986 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
a6792a3e 1987
0b2cf5c8 1988 return 0;
a6792a3e
MH
1989}
1990
a6792a3e 1991/*
0b2cf5c8 1992 * Our board poller function.
a6792a3e 1993 */
0b2cf5c8 1994static void dgap_poll_tasklet(unsigned long data)
a6792a3e 1995{
18122553 1996 struct board_t *bd = (struct board_t *)data;
a6792a3e 1997 ulong lock_flags;
0b2cf5c8
DY
1998 char __iomem *vaddr;
1999 u16 head, tail;
a6792a3e 2000
0b2cf5c8
DY
2001 if (!bd || (bd->magic != DGAP_BOARD_MAGIC))
2002 return;
a6792a3e 2003
0b2cf5c8
DY
2004 if (bd->inhibit_poller)
2005 return;
a6792a3e 2006
0b2cf5c8 2007 spin_lock_irqsave(&bd->bd_lock, lock_flags);
a6792a3e 2008
0b2cf5c8 2009 vaddr = bd->re_map_membase;
a6792a3e 2010
0b2cf5c8
DY
2011 /*
2012 * If board is ready, parse deeper to see if there is anything to do.
2013 */
2014 if (bd->state == BOARD_READY) {
0b2cf5c8 2015 struct ev_t __iomem *eaddr;
a6792a3e 2016
0b2cf5c8
DY
2017 if (!bd->re_map_membase) {
2018 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
2019 return;
2020 }
2021 if (!bd->re_map_port) {
2022 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
2023 return;
2024 }
a6792a3e 2025
0b2cf5c8
DY
2026 if (!bd->nasync)
2027 goto out;
a6792a3e 2028
18122553 2029 eaddr = (struct ev_t __iomem *)(vaddr + EVBUF);
a6792a3e 2030
0b2cf5c8 2031 /* Get our head and tail */
44209c93
IC
2032 head = readw(&eaddr->ev_head);
2033 tail = readw(&eaddr->ev_tail);
a6792a3e 2034
0b2cf5c8
DY
2035 /*
2036 * If there is an event pending. Go service it.
2037 */
2038 if (head != tail) {
2039 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
2040 dgap_event(bd);
2041 spin_lock_irqsave(&bd->bd_lock, lock_flags);
2042 }
a6792a3e 2043
0b2cf5c8
DY
2044out:
2045 /*
2046 * If board is doing interrupts, ACK the interrupt.
2047 */
258e7af2 2048 if (bd->intr_running)
0b2cf5c8 2049 readb(bd->re_map_port + 2);
a6792a3e 2050
0b2cf5c8
DY
2051 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
2052 return;
a6792a3e
MH
2053 }
2054
0b2cf5c8
DY
2055 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
2056}
a6792a3e 2057
0b2cf5c8
DY
2058/*
2059 * dgap_found_board()
2060 *
2061 * A board has been found, init it.
2062 */
2063static struct board_t *dgap_found_board(struct pci_dev *pdev, int id,
2064 int boardnum)
2065{
2066 struct board_t *brd;
2067 unsigned int pci_irq;
2068 int i;
2069 int ret;
a6792a3e 2070
0b2cf5c8
DY
2071 /* get the board structure and prep it */
2072 brd = kzalloc(sizeof(struct board_t), GFP_KERNEL);
2073 if (!brd)
2074 return ERR_PTR(-ENOMEM);
a6792a3e 2075
0b2cf5c8
DY
2076 /* store the info for the board we've found */
2077 brd->magic = DGAP_BOARD_MAGIC;
2078 brd->boardnum = boardnum;
2079 brd->vendor = dgap_pci_tbl[id].vendor;
2080 brd->device = dgap_pci_tbl[id].device;
2081 brd->pdev = pdev;
2082 brd->pci_bus = pdev->bus->number;
2083 brd->pci_slot = PCI_SLOT(pdev->devfn);
2084 brd->name = dgap_ids[id].name;
2085 brd->maxports = dgap_ids[id].maxports;
2086 brd->type = dgap_ids[id].config_type;
2087 brd->dpatype = dgap_ids[id].dpatype;
2088 brd->dpastatus = BD_NOFEP;
2089 init_waitqueue_head(&brd->state_wait);
a6792a3e 2090
0b2cf5c8 2091 spin_lock_init(&brd->bd_lock);
a6792a3e 2092
0b2cf5c8
DY
2093 brd->inhibit_poller = FALSE;
2094 brd->wait_for_bios = 0;
2095 brd->wait_for_fep = 0;
a6792a3e 2096
0b2cf5c8
DY
2097 for (i = 0; i < MAXPORTS; i++)
2098 brd->channels[i] = NULL;
2099
2100 /* store which card & revision we have */
2101 pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &brd->subvendor);
2102 pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &brd->subdevice);
2103 pci_read_config_byte(pdev, PCI_REVISION_ID, &brd->rev);
2104
2105 pci_irq = pdev->irq;
2106 brd->irq = pci_irq;
a6792a3e 2107
0b2cf5c8 2108 /* get the PCI Base Address Registers */
a6792a3e 2109
0b2cf5c8
DY
2110 /* Xr Jupiter and EPC use BAR 2 */
2111 if (brd->device == PCI_DEV_XRJ_DID || brd->device == PCI_DEV_EPCJ_DID) {
2112 brd->membase = pci_resource_start(pdev, 2);
2113 brd->membase_end = pci_resource_end(pdev, 2);
2114 }
2115 /* Everyone else uses BAR 0 */
2116 else {
2117 brd->membase = pci_resource_start(pdev, 0);
2118 brd->membase_end = pci_resource_end(pdev, 0);
a6792a3e
MH
2119 }
2120
0b2cf5c8
DY
2121 if (!brd->membase) {
2122 ret = -ENODEV;
2123 goto free_brd;
a6792a3e
MH
2124 }
2125
0b2cf5c8
DY
2126 if (brd->membase & 1)
2127 brd->membase &= ~3;
2128 else
2129 brd->membase &= ~15;
a6792a3e
MH
2130
2131 /*
0b2cf5c8
DY
2132 * On the PCI boards, there is no IO space allocated
2133 * The I/O registers will be in the first 3 bytes of the
2134 * upper 2MB of the 4MB memory space. The board memory
2135 * will be mapped into the low 2MB of the 4MB memory space
a6792a3e 2136 */
0b2cf5c8 2137 brd->port = brd->membase + PCI_IO_OFFSET;
4c1d2dcb 2138 brd->port_end = brd->port + PCI_IO_SIZE_DGAP;
a6792a3e 2139
0b2cf5c8
DY
2140 /*
2141 * Special initialization for non-PLX boards
2142 */
2143 if (brd->device != PCI_DEV_XRJ_DID && brd->device != PCI_DEV_EPCJ_DID) {
2144 unsigned short cmd;
a6792a3e 2145
0b2cf5c8
DY
2146 pci_write_config_byte(pdev, 0x40, 0);
2147 pci_write_config_byte(pdev, 0x46, 0);
a6792a3e 2148
0b2cf5c8
DY
2149 /* Limit burst length to 2 doubleword transactions */
2150 pci_write_config_byte(pdev, 0x42, 1);
a6792a3e 2151
0b2cf5c8
DY
2152 /*
2153 * Enable IO and mem if not already done.
2154 * This was needed for support on Itanium.
2155 */
2156 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
2157 cmd |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
2158 pci_write_config_word(pdev, PCI_COMMAND, cmd);
2159 }
a6792a3e 2160
0b2cf5c8
DY
2161 /* init our poll helper tasklet */
2162 tasklet_init(&brd->helper_tasklet, dgap_poll_tasklet,
629c7349 2163 (unsigned long)brd);
a6792a3e 2164
0b2cf5c8
DY
2165 ret = dgap_remap(brd);
2166 if (ret)
2167 goto free_brd;
a6792a3e 2168
0b2cf5c8
DY
2169 pr_info("dgap: board %d: %s (rev %d), irq %ld\n",
2170 boardnum, brd->name, brd->rev, brd->irq);
a6792a3e 2171
0b2cf5c8 2172 return brd;
a6792a3e 2173
0b2cf5c8
DY
2174free_brd:
2175 kfree(brd);
a6792a3e 2176
0b2cf5c8 2177 return ERR_PTR(ret);
a6792a3e
MH
2178}
2179
a6792a3e 2180/*
0b2cf5c8 2181 * dgap_intr()
a6792a3e 2182 *
0b2cf5c8 2183 * Driver interrupt handler.
a6792a3e 2184 */
0b2cf5c8 2185static irqreturn_t dgap_intr(int irq, void *voidbrd)
a6792a3e 2186{
0b2cf5c8 2187 struct board_t *brd = voidbrd;
a6792a3e 2188
0b2cf5c8
DY
2189 if (!brd)
2190 return IRQ_NONE;
a6792a3e 2191
0b2cf5c8
DY
2192 /*
2193 * Check to make sure its for us.
2194 */
2195 if (brd->magic != DGAP_BOARD_MAGIC)
2196 return IRQ_NONE;
a6792a3e 2197
0b2cf5c8 2198 brd->intr_count++;
a6792a3e 2199
0b2cf5c8
DY
2200 /*
2201 * Schedule tasklet to run at a better time.
2202 */
2203 tasklet_schedule(&brd->helper_tasklet);
2204 return IRQ_HANDLED;
2205}
a6792a3e 2206
0b2cf5c8
DY
2207/*****************************************************************************
2208*
2209* Function:
2210*
2211* dgap_poll_handler
2212*
2213* Author:
2214*
2215* Scott H Kilau
2216*
2217* Parameters:
2218*
2219* dummy -- ignored
2220*
2221* Return Values:
2222*
2223* none
2224*
2225* Description:
2226*
2227* As each timer expires, it determines (a) whether the "transmit"
2228* waiter needs to be woken up, and (b) whether the poller needs to
2229* be rescheduled.
2230*
2231******************************************************************************/
a6792a3e 2232
0b2cf5c8
DY
2233static void dgap_poll_handler(ulong dummy)
2234{
2235 unsigned int i;
2236 struct board_t *brd;
2237 unsigned long lock_flags;
2238 ulong new_time;
a6792a3e 2239
0b2cf5c8 2240 dgap_poll_counter++;
a6792a3e 2241
0b2cf5c8
DY
2242 /*
2243 * Do not start the board state machine until
2244 * driver tells us its up and running, and has
2245 * everything it needs.
2246 */
2247 if (dgap_driver_state != DRIVER_READY)
2248 goto schedule_poller;
a6792a3e 2249
0b2cf5c8
DY
2250 /*
2251 * If we have just 1 board, or the system is not SMP,
2252 * then use the typical old style poller.
2253 * Otherwise, use our new tasklet based poller, which should
2254 * speed things up for multiple boards.
2255 */
2256 if ((dgap_numboards == 1) || (num_online_cpus() <= 1)) {
2257 for (i = 0; i < dgap_numboards; i++) {
0b2cf5c8 2258 brd = dgap_board[i];
a6792a3e 2259
0b2cf5c8
DY
2260 if (brd->state == BOARD_FAILED)
2261 continue;
2262 if (!brd->intr_running)
2263 /* Call the real board poller directly */
18122553 2264 dgap_poll_tasklet((unsigned long)brd);
0b2cf5c8
DY
2265 }
2266 } else {
2267 /*
2268 * Go thru each board, kicking off a
2269 * tasklet for each if needed
2270 */
2271 for (i = 0; i < dgap_numboards; i++) {
2272 brd = dgap_board[i];
2273
2274 /*
2275 * Attempt to grab the board lock.
2276 *
2277 * If we can't get it, no big deal, the next poll
2278 * will get it. Basically, I just really don't want
2279 * to spin in here, because I want to kick off my
2280 * tasklets as fast as I can, and then get out the
2281 * poller.
2282 */
2283 if (!spin_trylock(&brd->bd_lock))
2284 continue;
a6792a3e 2285
0b2cf5c8
DY
2286 /*
2287 * If board is in a failed state, don't bother
2288 * scheduling a tasklet
2289 */
2290 if (brd->state == BOARD_FAILED) {
2291 spin_unlock(&brd->bd_lock);
2292 continue;
2293 }
a6792a3e 2294
0b2cf5c8
DY
2295 /* Schedule a poll helper task */
2296 if (!brd->intr_running)
2297 tasklet_schedule(&brd->helper_tasklet);
a6792a3e 2298
0b2cf5c8
DY
2299 /*
2300 * Can't do DGAP_UNLOCK here, as we don't have
2301 * lock_flags because we did a trylock above.
2302 */
2303 spin_unlock(&brd->bd_lock);
2304 }
2305 }
a6792a3e 2306
0b2cf5c8 2307schedule_poller:
a6792a3e 2308
0b2cf5c8
DY
2309 /*
2310 * Schedule ourself back at the nominal wakeup interval.
2311 */
2312 spin_lock_irqsave(&dgap_poll_lock, lock_flags);
2313 dgap_poll_time += dgap_jiffies_from_ms(dgap_poll_tick);
a6792a3e 2314
0b2cf5c8 2315 new_time = dgap_poll_time - jiffies;
a6792a3e 2316
18122553 2317 if ((ulong)new_time >= 2 * dgap_poll_tick) {
0b2cf5c8
DY
2318 dgap_poll_time =
2319 jiffies + dgap_jiffies_from_ms(dgap_poll_tick);
a6792a3e
MH
2320 }
2321
0b2cf5c8
DY
2322 dgap_poll_timer.function = dgap_poll_handler;
2323 dgap_poll_timer.data = 0;
2324 dgap_poll_timer.expires = dgap_poll_time;
2325 spin_unlock_irqrestore(&dgap_poll_lock, lock_flags);
a6792a3e 2326
0b2cf5c8
DY
2327 if (!dgap_poll_stop)
2328 add_timer(&dgap_poll_timer);
a6792a3e
MH
2329}
2330
0b2cf5c8 2331/*=======================================================================
a6792a3e 2332 *
0b2cf5c8 2333 * dgap_cmdb - Sends a 2 byte command to the FEP.
a6792a3e 2334 *
0b2cf5c8
DY
2335 * ch - Pointer to channel structure.
2336 * cmd - Command to be sent.
2337 * byte1 - Integer containing first byte to be sent.
2338 * byte2 - Integer containing second byte to be sent.
2339 * ncmds - Wait until ncmds or fewer cmds are left
2340 * in the cmd buffer before returning.
2341 *
2342 *=======================================================================*/
2343static void dgap_cmdb(struct channel_t *ch, u8 cmd, u8 byte1,
629c7349 2344 u8 byte2, uint ncmds)
a6792a3e 2345{
0b2cf5c8
DY
2346 char __iomem *vaddr;
2347 struct __iomem cm_t *cm_addr;
2348 uint count;
2349 uint n;
2350 u16 head;
2351 u16 tail;
a6792a3e 2352
0b2cf5c8 2353 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
a6792a3e
MH
2354 return;
2355
0b2cf5c8
DY
2356 /*
2357 * Check if board is still alive.
2358 */
2359 if (ch->ch_bd->state == BOARD_FAILED)
a6792a3e
MH
2360 return;
2361
0b2cf5c8
DY
2362 /*
2363 * Make sure the pointers are in range before
2364 * writing to the FEP memory.
2365 */
2366 vaddr = ch->ch_bd->re_map_membase;
2367
2368 if (!vaddr)
a6792a3e
MH
2369 return;
2370
18122553 2371 cm_addr = (struct cm_t __iomem *)(vaddr + CMDBUF);
44209c93 2372 head = readw(&cm_addr->cm_head);
0b2cf5c8
DY
2373
2374 /*
2375 * Forget it if pointers out of range.
2376 */
2377 if (head >= (CMDMAX - CMDSTART) || (head & 03)) {
2378 ch->ch_bd->state = BOARD_FAILED;
a6792a3e 2379 return;
0b2cf5c8 2380 }
a6792a3e 2381
0b2cf5c8
DY
2382 /*
2383 * Put the data in the circular command buffer.
2384 */
2385 writeb(cmd, (vaddr + head + CMDSTART + 0));
18122553 2386 writeb((u8)ch->ch_portnum, (vaddr + head + CMDSTART + 1));
0b2cf5c8
DY
2387 writeb(byte1, (vaddr + head + CMDSTART + 2));
2388 writeb(byte2, (vaddr + head + CMDSTART + 3));
2389
2390 head = (head + 4) & (CMDMAX - CMDSTART - 4);
2391
44209c93 2392 writew(head, &cm_addr->cm_head);
a6792a3e
MH
2393
2394 /*
0b2cf5c8
DY
2395 * Wait if necessary before updating the head
2396 * pointer to limit the number of outstanding
2397 * commands to the FEP. If the time spent waiting
2398 * is outlandish, declare the FEP dead.
a6792a3e 2399 */
0b2cf5c8 2400 for (count = dgap_count ;;) {
44209c93
IC
2401 head = readw(&cm_addr->cm_head);
2402 tail = readw(&cm_addr->cm_tail);
a6792a3e 2403
0b2cf5c8 2404 n = (head - tail) & (CMDMAX - CMDSTART - 4);
a6792a3e 2405
0b2cf5c8
DY
2406 if (n <= ncmds * sizeof(struct cm_t))
2407 break;
a6792a3e 2408
0b2cf5c8
DY
2409 if (--count == 0) {
2410 ch->ch_bd->state = BOARD_FAILED;
2411 return;
2412 }
2413 udelay(10);
2414 }
2415}
a6792a3e 2416
0b2cf5c8
DY
2417/*=======================================================================
2418 *
2419 * dgap_cmdw - Sends a 1 word command to the FEP.
2420 *
2421 * ch - Pointer to channel structure.
2422 * cmd - Command to be sent.
2423 * word - Integer containing word to be sent.
2424 * ncmds - Wait until ncmds or fewer cmds are left
2425 * in the cmd buffer before returning.
2426 *
2427 *=======================================================================*/
2428static void dgap_cmdw(struct channel_t *ch, u8 cmd, u16 word, uint ncmds)
2429{
2430 char __iomem *vaddr;
2431 struct __iomem cm_t *cm_addr;
2432 uint count;
2433 uint n;
2434 u16 head;
2435 u16 tail;
a6792a3e 2436
0b2cf5c8
DY
2437 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
2438 return;
a6792a3e 2439
0b2cf5c8
DY
2440 /*
2441 * Check if board is still alive.
2442 */
2443 if (ch->ch_bd->state == BOARD_FAILED)
2444 return;
2445
2446 /*
2447 * Make sure the pointers are in range before
2448 * writing to the FEP memory.
2449 */
2450 vaddr = ch->ch_bd->re_map_membase;
2451 if (!vaddr)
2452 return;
a6792a3e 2453
18122553 2454 cm_addr = (struct cm_t __iomem *)(vaddr + CMDBUF);
44209c93 2455 head = readw(&cm_addr->cm_head);
a6792a3e 2456
0b2cf5c8
DY
2457 /*
2458 * Forget it if pointers out of range.
2459 */
2460 if (head >= (CMDMAX - CMDSTART) || (head & 03)) {
2461 ch->ch_bd->state = BOARD_FAILED;
2462 return;
2463 }
a6792a3e 2464
0b2cf5c8
DY
2465 /*
2466 * Put the data in the circular command buffer.
2467 */
2468 writeb(cmd, (vaddr + head + CMDSTART + 0));
18122553
IC
2469 writeb((u8)ch->ch_portnum, (vaddr + head + CMDSTART + 1));
2470 writew((u16)word, (vaddr + head + CMDSTART + 2));
a6792a3e 2471
0b2cf5c8 2472 head = (head + 4) & (CMDMAX - CMDSTART - 4);
a6792a3e 2473
44209c93 2474 writew(head, &cm_addr->cm_head);
a6792a3e 2475
0b2cf5c8
DY
2476 /*
2477 * Wait if necessary before updating the head
2478 * pointer to limit the number of outstanding
2479 * commands to the FEP. If the time spent waiting
2480 * is outlandish, declare the FEP dead.
2481 */
2482 for (count = dgap_count ;;) {
44209c93
IC
2483 head = readw(&cm_addr->cm_head);
2484 tail = readw(&cm_addr->cm_tail);
a6792a3e 2485
0b2cf5c8 2486 n = (head - tail) & (CMDMAX - CMDSTART - 4);
a6792a3e 2487
0b2cf5c8
DY
2488 if (n <= ncmds * sizeof(struct cm_t))
2489 break;
2490
2491 if (--count == 0) {
2492 ch->ch_bd->state = BOARD_FAILED;
2493 return;
7d6069d7 2494 }
0b2cf5c8
DY
2495 udelay(10);
2496 }
2497}
a6792a3e 2498
0b2cf5c8
DY
2499/*=======================================================================
2500 *
2501 * dgap_cmdw_ext - Sends a extended word command to the FEP.
2502 *
2503 * ch - Pointer to channel structure.
2504 * cmd - Command to be sent.
2505 * word - Integer containing word to be sent.
2506 * ncmds - Wait until ncmds or fewer cmds are left
2507 * in the cmd buffer before returning.
2508 *
2509 *=======================================================================*/
2510static void dgap_cmdw_ext(struct channel_t *ch, u16 cmd, u16 word, uint ncmds)
2511{
2512 char __iomem *vaddr;
2513 struct __iomem cm_t *cm_addr;
2514 uint count;
2515 uint n;
2516 u16 head;
2517 u16 tail;
a6792a3e 2518
0b2cf5c8
DY
2519 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
2520 return;
a6792a3e 2521
0b2cf5c8
DY
2522 /*
2523 * Check if board is still alive.
2524 */
2525 if (ch->ch_bd->state == BOARD_FAILED)
2526 return;
a6792a3e 2527
0b2cf5c8
DY
2528 /*
2529 * Make sure the pointers are in range before
2530 * writing to the FEP memory.
2531 */
2532 vaddr = ch->ch_bd->re_map_membase;
2533 if (!vaddr)
2534 return;
a6792a3e 2535
18122553 2536 cm_addr = (struct cm_t __iomem *)(vaddr + CMDBUF);
44209c93 2537 head = readw(&cm_addr->cm_head);
a6792a3e 2538
0b2cf5c8
DY
2539 /*
2540 * Forget it if pointers out of range.
2541 */
2542 if (head >= (CMDMAX - CMDSTART) || (head & 03)) {
2543 ch->ch_bd->state = BOARD_FAILED;
2544 return;
a6792a3e
MH
2545 }
2546
0b2cf5c8
DY
2547 /*
2548 * Put the data in the circular command buffer.
2549 */
a6792a3e 2550
0b2cf5c8 2551 /* Write an FF to tell the FEP that we want an extended command */
18122553 2552 writeb((u8)0xff, (vaddr + head + CMDSTART + 0));
a6792a3e 2553
18122553
IC
2554 writeb((u8)ch->ch_portnum, (vaddr + head + CMDSTART + 1));
2555 writew((u16)cmd, (vaddr + head + CMDSTART + 2));
a6792a3e 2556
0b2cf5c8
DY
2557 /*
2558 * If the second part of the command won't fit,
2559 * put it at the beginning of the circular buffer.
2560 */
2561 if (((head + 4) >= ((CMDMAX - CMDSTART)) || (head & 03)))
18122553 2562 writew((u16)word, (vaddr + CMDSTART));
0b2cf5c8 2563 else
18122553 2564 writew((u16)word, (vaddr + head + CMDSTART + 4));
a6792a3e 2565
0b2cf5c8 2566 head = (head + 8) & (CMDMAX - CMDSTART - 4);
a6792a3e 2567
44209c93 2568 writew(head, &cm_addr->cm_head);
a6792a3e 2569
0b2cf5c8
DY
2570 /*
2571 * Wait if necessary before updating the head
2572 * pointer to limit the number of outstanding
2573 * commands to the FEP. If the time spent waiting
2574 * is outlandish, declare the FEP dead.
2575 */
2576 for (count = dgap_count ;;) {
44209c93
IC
2577 head = readw(&cm_addr->cm_head);
2578 tail = readw(&cm_addr->cm_tail);
a6792a3e 2579
0b2cf5c8 2580 n = (head - tail) & (CMDMAX - CMDSTART - 4);
a6792a3e 2581
0b2cf5c8
DY
2582 if (n <= ncmds * sizeof(struct cm_t))
2583 break;
2584
2585 if (--count == 0) {
2586 ch->ch_bd->state = BOARD_FAILED;
2587 return;
2588 }
2589 udelay(10);
2590 }
a6792a3e
MH
2591}
2592
0b2cf5c8 2593/*=======================================================================
a6792a3e 2594 *
0b2cf5c8 2595 * dgap_wmove - Write data to FEP buffer.
a6792a3e 2596 *
0b2cf5c8 2597 * ch - Pointer to channel structure.
469caabe 2598 * buf - Pointer to characters to be moved.
0b2cf5c8 2599 * cnt - Number of characters to move.
a6792a3e 2600 *
0b2cf5c8
DY
2601 *=======================================================================*/
2602static void dgap_wmove(struct channel_t *ch, char *buf, uint cnt)
a6792a3e 2603{
0b2cf5c8
DY
2604 int n;
2605 char __iomem *taddr;
2606 struct bs_t __iomem *bs;
2607 u16 head;
a6792a3e 2608
0b2cf5c8
DY
2609 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
2610 return;
a6792a3e 2611
0b2cf5c8
DY
2612 /*
2613 * Check parameters.
2614 */
2615 bs = ch->ch_bs;
44209c93 2616 head = readw(&bs->tx_head);
a6792a3e 2617
0b2cf5c8
DY
2618 /*
2619 * If pointers are out of range, just return.
2620 */
2621 if ((cnt > ch->ch_tsize) ||
2622 (unsigned)(head - ch->ch_tstart) >= ch->ch_tsize)
2623 return;
a6792a3e 2624
0b2cf5c8
DY
2625 /*
2626 * If the write wraps over the top of the circular buffer,
2627 * move the portion up to the wrap point, and reset the
2628 * pointers to the bottom.
2629 */
2630 n = ch->ch_tstart + ch->ch_tsize - head;
a6792a3e 2631
0b2cf5c8
DY
2632 if (cnt >= n) {
2633 cnt -= n;
2634 taddr = ch->ch_taddr + head;
2635 memcpy_toio(taddr, buf, n);
2636 head = ch->ch_tstart;
2637 buf += n;
2638 }
a6792a3e 2639
0b2cf5c8
DY
2640 /*
2641 * Move rest of data.
2642 */
2643 taddr = ch->ch_taddr + head;
2644 n = cnt;
2645 memcpy_toio(taddr, buf, n);
2646 head += cnt;
a6792a3e 2647
44209c93 2648 writew(head, &bs->tx_head);
a6792a3e
MH
2649}
2650
a6792a3e 2651/*
0b2cf5c8 2652 * Calls the firmware to reset this channel.
a6792a3e 2653 */
0b2cf5c8 2654static void dgap_firmware_reset_port(struct channel_t *ch)
a6792a3e 2655{
0b2cf5c8 2656 dgap_cmdb(ch, CHRESET, 0, 0, 0);
a6792a3e 2657
0b2cf5c8
DY
2658 /*
2659 * Now that the channel is reset, we need to make sure
2660 * all the current settings get reapplied to the port
2661 * in the firmware.
2662 *
2663 * So we will set the driver's cache of firmware
2664 * settings all to 0, and then call param.
2665 */
2666 ch->ch_fepiflag = 0;
2667 ch->ch_fepcflag = 0;
2668 ch->ch_fepoflag = 0;
2669 ch->ch_fepstartc = 0;
2670 ch->ch_fepstopc = 0;
2671 ch->ch_fepastartc = 0;
2672 ch->ch_fepastopc = 0;
2673 ch->ch_mostat = 0;
2674 ch->ch_hflow = 0;
2675}
a6792a3e 2676
0b2cf5c8
DY
2677/*=======================================================================
2678 *
2679 * dgap_param - Set Digi parameters.
2680 *
2681 * struct tty_struct * - TTY for port.
2682 *
2683 *=======================================================================*/
2684static int dgap_param(struct channel_t *ch, struct board_t *bd, u32 un_type)
2685{
2686 u16 head;
2687 u16 cflag;
2688 u16 iflag;
2689 u8 mval;
2690 u8 hflow;
a6792a3e 2691
0b2cf5c8
DY
2692 /*
2693 * If baud rate is zero, flush queues, and set mval to drop DTR.
2694 */
2695 if ((ch->ch_c_cflag & (CBAUD)) == 0) {
0b2cf5c8 2696 /* flush rx */
44209c93
IC
2697 head = readw(&ch->ch_bs->rx_head);
2698 writew(head, &ch->ch_bs->rx_tail);
a6792a3e 2699
0b2cf5c8 2700 /* flush tx */
44209c93
IC
2701 head = readw(&ch->ch_bs->tx_head);
2702 writew(head, &ch->ch_bs->tx_tail);
a6792a3e 2703
0b2cf5c8 2704 ch->ch_flags |= (CH_BAUD0);
a6792a3e 2705
0b2cf5c8 2706 /* Drop RTS and DTR */
a9108b71 2707 ch->ch_mval &= ~(D_RTS(ch) | D_DTR(ch));
0b2cf5c8
DY
2708 mval = D_DTR(ch) | D_RTS(ch);
2709 ch->ch_baud_info = 0;
a6792a3e 2710
0b2cf5c8
DY
2711 } else if (ch->ch_custom_speed && (bd->bd_flags & BD_FEP5PLUS)) {
2712 /*
2713 * Tell the fep to do the command
2714 */
a6792a3e 2715
0b2cf5c8 2716 dgap_cmdw_ext(ch, 0xff01, ch->ch_custom_speed, 0);
a6792a3e 2717
0b2cf5c8
DY
2718 /*
2719 * Now go get from fep mem, what the fep
2720 * believes the custom baud rate is.
2721 */
2722 ch->ch_custom_speed = dgap_get_custom_baud(ch);
2723 ch->ch_baud_info = ch->ch_custom_speed;
a6792a3e 2724
0b2cf5c8
DY
2725 /* Handle transition from B0 */
2726 if (ch->ch_flags & CH_BAUD0) {
2727 ch->ch_flags &= ~(CH_BAUD0);
a9108b71 2728 ch->ch_mval |= (D_RTS(ch) | D_DTR(ch));
0b2cf5c8
DY
2729 }
2730 mval = D_DTR(ch) | D_RTS(ch);
a6792a3e 2731
0b2cf5c8
DY
2732 } else {
2733 /*
2734 * Set baud rate, character size, and parity.
2735 */
a6792a3e 2736
a6792a3e 2737
0b2cf5c8
DY
2738 int iindex = 0;
2739 int jindex = 0;
2740 int baud = 0;
a6792a3e 2741
0b2cf5c8
DY
2742 ulong bauds[4][16] = {
2743 { /* slowbaud */
2744 0, 50, 75, 110,
2745 134, 150, 200, 300,
2746 600, 1200, 1800, 2400,
2747 4800, 9600, 19200, 38400 },
2748 { /* slowbaud & CBAUDEX */
2749 0, 57600, 115200, 230400,
2750 460800, 150, 200, 921600,
2751 600, 1200, 1800, 2400,
2752 4800, 9600, 19200, 38400 },
2753 { /* fastbaud */
2754 0, 57600, 76800, 115200,
2755 14400, 57600, 230400, 76800,
2756 115200, 230400, 28800, 460800,
2757 921600, 9600, 19200, 38400 },
2758 { /* fastbaud & CBAUDEX */
2759 0, 57600, 115200, 230400,
2760 460800, 150, 200, 921600,
2761 600, 1200, 1800, 2400,
2762 4800, 9600, 19200, 38400 }
2763 };
a6792a3e 2764
0b2cf5c8
DY
2765 /*
2766 * Only use the TXPrint baud rate if the
2767 * terminal unit is NOT open
2768 */
2769 if (!(ch->ch_tun.un_flags & UN_ISOPEN) &&
2770 un_type == DGAP_PRINT)
2771 baud = C_BAUD(ch->ch_pun.un_tty) & 0xff;
2772 else
2773 baud = C_BAUD(ch->ch_tun.un_tty) & 0xff;
a6792a3e 2774
0b2cf5c8
DY
2775 if (ch->ch_c_cflag & CBAUDEX)
2776 iindex = 1;
a6792a3e 2777
0b2cf5c8
DY
2778 if (ch->ch_digi.digi_flags & DIGI_FAST)
2779 iindex += 2;
a6792a3e 2780
0b2cf5c8 2781 jindex = baud;
a6792a3e 2782
0b2cf5c8
DY
2783 if ((iindex >= 0) && (iindex < 4) &&
2784 (jindex >= 0) && (jindex < 16))
2785 baud = bauds[iindex][jindex];
2786 else
2787 baud = 0;
a6792a3e 2788
0b2cf5c8
DY
2789 if (baud == 0)
2790 baud = 9600;
a6792a3e 2791
0b2cf5c8 2792 ch->ch_baud_info = baud;
a6792a3e 2793
0b2cf5c8
DY
2794 /*
2795 * CBAUD has bit position 0x1000 set these days to
2796 * indicate Linux baud rate remap.
2797 * We use a different bit assignment for high speed.
2798 * Clear this bit out while grabbing the parts of
2799 * "cflag" we want.
2800 */
2801 cflag = ch->ch_c_cflag & ((CBAUD ^ CBAUDEX) | PARODD | PARENB |
2802 CSTOPB | CSIZE);
a6792a3e 2803
0b2cf5c8
DY
2804 /*
2805 * HUPCL bit is used by FEP to indicate fast baud
2806 * table is to be used.
2807 */
2808 if ((ch->ch_digi.digi_flags & DIGI_FAST) ||
2809 (ch->ch_c_cflag & CBAUDEX))
2810 cflag |= HUPCL;
a6792a3e 2811
0b2cf5c8
DY
2812 if ((ch->ch_c_cflag & CBAUDEX) &&
2813 !(ch->ch_digi.digi_flags & DIGI_FAST)) {
2814 /*
2815 * The below code is trying to guarantee that only
2816 * baud rates 115200, 230400, 460800, 921600 are
2817 * remapped. We use exclusive or because the various
2818 * baud rates share common bit positions and therefore
2819 * can't be tested for easily.
2820 */
2821 tcflag_t tcflag = (ch->ch_c_cflag & CBAUD) | CBAUDEX;
2822 int baudpart = 0;
a6792a3e 2823
0b2cf5c8
DY
2824 /*
2825 * Map high speed requests to index
2826 * into FEP's baud table
2827 */
2828 switch (tcflag) {
2829 case B57600:
2830 baudpart = 1;
2831 break;
2832#ifdef B76800
2833 case B76800:
2834 baudpart = 2;
2835 break;
2836#endif
2837 case B115200:
2838 baudpart = 3;
2839 break;
2840 case B230400:
2841 baudpart = 9;
2842 break;
2843 case B460800:
2844 baudpart = 11;
2845 break;
2846#ifdef B921600
2847 case B921600:
2848 baudpart = 12;
2849 break;
2850#endif
2851 default:
2852 baudpart = 0;
2853 }
a6792a3e 2854
0b2cf5c8
DY
2855 if (baudpart)
2856 cflag = (cflag & ~(CBAUD | CBAUDEX)) | baudpart;
2857 }
a6792a3e 2858
0b2cf5c8 2859 cflag &= 0xffff;
a6792a3e 2860
0b2cf5c8 2861 if (cflag != ch->ch_fepcflag) {
18122553 2862 ch->ch_fepcflag = (u16)(cflag & 0xffff);
a6792a3e 2863
0b2cf5c8
DY
2864 /*
2865 * Okay to have channel and board
2866 * locks held calling this
2867 */
18122553 2868 dgap_cmdw(ch, SCFLAG, (u16)cflag, 0);
0b2cf5c8 2869 }
a6792a3e 2870
0b2cf5c8
DY
2871 /* Handle transition from B0 */
2872 if (ch->ch_flags & CH_BAUD0) {
2873 ch->ch_flags &= ~(CH_BAUD0);
a9108b71 2874 ch->ch_mval |= (D_RTS(ch) | D_DTR(ch));
0b2cf5c8
DY
2875 }
2876 mval = D_DTR(ch) | D_RTS(ch);
2877 }
a6792a3e 2878
0b2cf5c8
DY
2879 /*
2880 * Get input flags.
2881 */
2882 iflag = ch->ch_c_iflag & (IGNBRK | BRKINT | IGNPAR | PARMRK |
2883 INPCK | ISTRIP | IXON | IXANY | IXOFF);
a6792a3e 2884
0b2cf5c8
DY
2885 if ((ch->ch_startc == _POSIX_VDISABLE) ||
2886 (ch->ch_stopc == _POSIX_VDISABLE)) {
2887 iflag &= ~(IXON | IXOFF);
2888 ch->ch_c_iflag &= ~(IXON | IXOFF);
2889 }
a6792a3e 2890
0b2cf5c8
DY
2891 /*
2892 * Only the IBM Xr card can switch between
2893 * 232 and 422 modes on the fly
2894 */
2895 if (bd->device == PCI_DEV_XR_IBM_DID) {
2896 if (ch->ch_digi.digi_flags & DIGI_422)
2897 dgap_cmdb(ch, SCOMMODE, MODE_422, 0, 0);
2898 else
2899 dgap_cmdb(ch, SCOMMODE, MODE_232, 0, 0);
2900 }
a6792a3e 2901
0b2cf5c8
DY
2902 if (ch->ch_digi.digi_flags & DIGI_ALTPIN)
2903 iflag |= IALTPIN;
a6792a3e 2904
0b2cf5c8
DY
2905 if (iflag != ch->ch_fepiflag) {
2906 ch->ch_fepiflag = iflag;
a6792a3e 2907
0b2cf5c8 2908 /* Okay to have channel and board locks held calling this */
18122553 2909 dgap_cmdw(ch, SIFLAG, (u16)ch->ch_fepiflag, 0);
0b2cf5c8 2910 }
a6792a3e 2911
0b2cf5c8
DY
2912 /*
2913 * Select hardware handshaking.
2914 */
2915 hflow = 0;
a6792a3e 2916
0b2cf5c8
DY
2917 if (ch->ch_c_cflag & CRTSCTS)
2918 hflow |= (D_RTS(ch) | D_CTS(ch));
2919 if (ch->ch_digi.digi_flags & RTSPACE)
2920 hflow |= D_RTS(ch);
2921 if (ch->ch_digi.digi_flags & DTRPACE)
2922 hflow |= D_DTR(ch);
2923 if (ch->ch_digi.digi_flags & CTSPACE)
2924 hflow |= D_CTS(ch);
2925 if (ch->ch_digi.digi_flags & DSRPACE)
2926 hflow |= D_DSR(ch);
2927 if (ch->ch_digi.digi_flags & DCDPACE)
2928 hflow |= D_CD(ch);
a6792a3e 2929
0b2cf5c8
DY
2930 if (hflow != ch->ch_hflow) {
2931 ch->ch_hflow = hflow;
a6792a3e 2932
0b2cf5c8 2933 /* Okay to have channel and board locks held calling this */
18122553 2934 dgap_cmdb(ch, SHFLOW, (u8)hflow, 0xff, 0);
0b2cf5c8 2935 }
a6792a3e 2936
0b2cf5c8
DY
2937 /*
2938 * Set RTS and/or DTR Toggle if needed,
2939 * but only if product is FEP5+ based.
2940 */
2941 if (bd->bd_flags & BD_FEP5PLUS) {
2942 u16 hflow2 = 0;
a6792a3e 2943
0b2cf5c8
DY
2944 if (ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE)
2945 hflow2 |= (D_RTS(ch));
2946 if (ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE)
2947 hflow2 |= (D_DTR(ch));
a6792a3e 2948
0b2cf5c8
DY
2949 dgap_cmdw_ext(ch, 0xff03, hflow2, 0);
2950 }
a6792a3e 2951
0b2cf5c8
DY
2952 /*
2953 * Set modem control lines.
2954 */
a6792a3e 2955
0b2cf5c8 2956 mval ^= ch->ch_mforce & (mval ^ ch->ch_mval);
a6792a3e 2957
0b2cf5c8
DY
2958 if (ch->ch_mostat ^ mval) {
2959 ch->ch_mostat = mval;
a6792a3e 2960
0b2cf5c8 2961 /* Okay to have channel and board locks held calling this */
18122553 2962 dgap_cmdb(ch, SMODEM, (u8)mval, D_RTS(ch) | D_DTR(ch), 0);
0b2cf5c8 2963 }
a6792a3e 2964
0b2cf5c8
DY
2965 /*
2966 * Read modem signals, and then call carrier function.
2967 */
44209c93 2968 ch->ch_mistat = readb(&ch->ch_bs->m_stat);
0b2cf5c8 2969 dgap_carrier(ch);
a6792a3e 2970
0b2cf5c8
DY
2971 /*
2972 * Set the start and stop characters.
2973 */
2974 if (ch->ch_startc != ch->ch_fepstartc ||
2975 ch->ch_stopc != ch->ch_fepstopc) {
2976 ch->ch_fepstartc = ch->ch_startc;
2977 ch->ch_fepstopc = ch->ch_stopc;
a6792a3e 2978
0b2cf5c8
DY
2979 /* Okay to have channel and board locks held calling this */
2980 dgap_cmdb(ch, SFLOWC, ch->ch_fepstartc, ch->ch_fepstopc, 0);
2981 }
a6792a3e 2982
0b2cf5c8
DY
2983 /*
2984 * Set the Auxiliary start and stop characters.
2985 */
2986 if (ch->ch_astartc != ch->ch_fepastartc ||
2987 ch->ch_astopc != ch->ch_fepastopc) {
2988 ch->ch_fepastartc = ch->ch_astartc;
2989 ch->ch_fepastopc = ch->ch_astopc;
a6792a3e 2990
0b2cf5c8
DY
2991 /* Okay to have channel and board locks held calling this */
2992 dgap_cmdb(ch, SAFLOWC, ch->ch_fepastartc, ch->ch_fepastopc, 0);
2993 }
a6792a3e 2994
0b2cf5c8 2995 return 0;
a6792a3e
MH
2996}
2997
0b2cf5c8
DY
2998/*
2999 * dgap_block_til_ready()
3000 *
3001 * Wait for DCD, if needed.
3002 */
3003static int dgap_block_til_ready(struct tty_struct *tty, struct file *file,
3004 struct channel_t *ch)
a6792a3e 3005{
0b2cf5c8 3006 int retval = 0;
a6792a3e 3007 struct un_t *un;
174efc1f 3008 ulong lock_flags;
0b2cf5c8
DY
3009 uint old_flags;
3010 int sleep_on_un_flags;
a6792a3e 3011
0b2cf5c8 3012 if (!tty || tty->magic != TTY_MAGIC || !file || !ch ||
629c7349 3013 ch->magic != DGAP_CHANNEL_MAGIC)
0b2cf5c8 3014 return -EIO;
a6792a3e
MH
3015
3016 un = tty->driver_data;
3017 if (!un || un->magic != DGAP_UNIT_MAGIC)
0b2cf5c8 3018 return -EIO;
a6792a3e 3019
0b2cf5c8 3020 spin_lock_irqsave(&ch->ch_lock, lock_flags);
a6792a3e 3021
0b2cf5c8 3022 ch->ch_wopen++;
a6792a3e 3023
0b2cf5c8
DY
3024 /* Loop forever */
3025 while (1) {
0b2cf5c8 3026 sleep_on_un_flags = 0;
a6792a3e 3027
0b2cf5c8
DY
3028 /*
3029 * If board has failed somehow during our sleep,
3030 * bail with error.
3031 */
3032 if (ch->ch_bd->state == BOARD_FAILED) {
3033 retval = -EIO;
3034 break;
3035 }
a6792a3e 3036
0b2cf5c8
DY
3037 /* If tty was hung up, break out of loop and set error. */
3038 if (tty_hung_up_p(file)) {
3039 retval = -EAGAIN;
3040 break;
3041 }
a6792a3e 3042
0b2cf5c8
DY
3043 /*
3044 * If either unit is in the middle of the fragile part of close,
3045 * we just cannot touch the channel safely.
3046 * Go back to sleep, knowing that when the channel can be
3047 * touched safely, the close routine will signal the
3048 * ch_wait_flags to wake us back up.
3049 */
3050 if (!((ch->ch_tun.un_flags | ch->ch_pun.un_flags) &
3051 UN_CLOSING)) {
0b2cf5c8
DY
3052 /*
3053 * Our conditions to leave cleanly and happily:
3054 * 1) NONBLOCKING on the tty is set.
3055 * 2) CLOCAL is set.
3056 * 3) DCD (fake or real) is active.
3057 */
a6792a3e 3058
0b2cf5c8
DY
3059 if (file->f_flags & O_NONBLOCK)
3060 break;
a6792a3e 3061
0b2cf5c8
DY
3062 if (tty->flags & (1 << TTY_IO_ERROR))
3063 break;
a6792a3e 3064
0b2cf5c8
DY
3065 if (ch->ch_flags & CH_CD)
3066 break;
a6792a3e 3067
0b2cf5c8
DY
3068 if (ch->ch_flags & CH_FCAR)
3069 break;
3070 } else {
3071 sleep_on_un_flags = 1;
3072 }
a6792a3e 3073
0b2cf5c8
DY
3074 /*
3075 * If there is a signal pending, the user probably
3076 * interrupted (ctrl-c) us.
3077 * Leave loop with error set.
3078 */
3079 if (signal_pending(current)) {
3080 retval = -ERESTARTSYS;
3081 break;
3082 }
a6792a3e 3083
0b2cf5c8
DY
3084 /*
3085 * Store the flags before we let go of channel lock
3086 */
3087 if (sleep_on_un_flags)
3088 old_flags = ch->ch_tun.un_flags | ch->ch_pun.un_flags;
3089 else
3090 old_flags = ch->ch_flags;
a6792a3e 3091
0b2cf5c8
DY
3092 /*
3093 * Let go of channel lock before calling schedule.
3094 * Our poller will get any FEP events and wake us up when DCD
3095 * eventually goes active.
3096 */
a6792a3e 3097
0b2cf5c8 3098 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
a6792a3e 3099
0b2cf5c8
DY
3100 /*
3101 * Wait for something in the flags to change
3102 * from the current value.
3103 */
3104 if (sleep_on_un_flags) {
3105 retval = wait_event_interruptible(un->un_flags_wait,
3106 (old_flags != (ch->ch_tun.un_flags |
3107 ch->ch_pun.un_flags)));
3108 } else {
3109 retval = wait_event_interruptible(ch->ch_flags_wait,
3110 (old_flags != ch->ch_flags));
3111 }
a6792a3e 3112
0b2cf5c8
DY
3113 /*
3114 * We got woken up for some reason.
3115 * Before looping around, grab our channel lock.
3116 */
3117 spin_lock_irqsave(&ch->ch_lock, lock_flags);
3118 }
a6792a3e 3119
0b2cf5c8 3120 ch->ch_wopen--;
a6792a3e 3121
0b2cf5c8 3122 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
a6792a3e 3123
0b2cf5c8 3124 return retval;
a6792a3e
MH
3125}
3126
a6792a3e
MH
3127/*
3128 * dgap_tty_flush_buffer()
3129 *
3130 * Flush Tx buffer (make in == out)
3131 */
3132static void dgap_tty_flush_buffer(struct tty_struct *tty)
3133{
3134 struct board_t *bd;
3135 struct channel_t *ch;
3136 struct un_t *un;
174efc1f
MH
3137 ulong lock_flags;
3138 ulong lock_flags2;
3139 u16 head;
a6792a3e
MH
3140
3141 if (!tty || tty->magic != TTY_MAGIC)
3142 return;
3143
3144 un = tty->driver_data;
3145 if (!un || un->magic != DGAP_UNIT_MAGIC)
3146 return;
3147
7d6069d7
MH
3148 ch = un->un_ch;
3149 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 3150 return;
a6792a3e
MH
3151
3152 bd = ch->ch_bd;
3153 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
3154 return;
3155
c43846a9
MH
3156 spin_lock_irqsave(&bd->bd_lock, lock_flags);
3157 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
a6792a3e
MH
3158
3159 ch->ch_flags &= ~CH_STOP;
44209c93 3160 head = readw(&ch->ch_bs->tx_head);
18122553 3161 dgap_cmdw(ch, FLUSHTX, (u16)head, 0);
a6792a3e 3162 dgap_cmdw(ch, RESUMETX, 0, 0);
a9108b71
IC
3163 if (ch->ch_tun.un_flags & (UN_LOW | UN_EMPTY)) {
3164 ch->ch_tun.un_flags &= ~(UN_LOW | UN_EMPTY);
a6792a3e
MH
3165 wake_up_interruptible(&ch->ch_tun.un_flags_wait);
3166 }
a9108b71
IC
3167 if (ch->ch_pun.un_flags & (UN_LOW | UN_EMPTY)) {
3168 ch->ch_pun.un_flags &= ~(UN_LOW | UN_EMPTY);
a6792a3e
MH
3169 wake_up_interruptible(&ch->ch_pun.un_flags_wait);
3170 }
3171
c43846a9
MH
3172 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
3173 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
a6792a3e
MH
3174 if (waitqueue_active(&tty->write_wait))
3175 wake_up_interruptible(&tty->write_wait);
3176 tty_wakeup(tty);
a6792a3e
MH
3177}
3178
a6792a3e 3179/*
0b2cf5c8 3180 * dgap_tty_hangup()
a6792a3e 3181 *
0b2cf5c8 3182 * Hangup the port. Like a close, but don't wait for output to drain.
a6792a3e 3183 */
0b2cf5c8 3184static void dgap_tty_hangup(struct tty_struct *tty)
a6792a3e
MH
3185{
3186 struct board_t *bd;
3187 struct channel_t *ch;
3188 struct un_t *un;
a6792a3e
MH
3189
3190 if (!tty || tty->magic != TTY_MAGIC)
0b2cf5c8 3191 return;
a6792a3e
MH
3192
3193 un = tty->driver_data;
3194 if (!un || un->magic != DGAP_UNIT_MAGIC)
0b2cf5c8 3195 return;
a6792a3e
MH
3196
3197 ch = un->un_ch;
3198 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
0b2cf5c8 3199 return;
a6792a3e
MH
3200
3201 bd = ch->ch_bd;
3202 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
0b2cf5c8 3203 return;
a6792a3e 3204
0b2cf5c8
DY
3205 /* flush the transmit queues */
3206 dgap_tty_flush_buffer(tty);
3207}
a6792a3e 3208
0b2cf5c8
DY
3209/*
3210 * dgap_tty_chars_in_buffer()
3211 *
3212 * Return number of characters that have not been transmitted yet.
3213 *
3214 * This routine is used by the line discipline to determine if there
3215 * is data waiting to be transmitted/drained/flushed or not.
3216 */
3217static int dgap_tty_chars_in_buffer(struct tty_struct *tty)
3218{
3219 struct board_t *bd;
3220 struct channel_t *ch;
3221 struct un_t *un;
3222 struct bs_t __iomem *bs;
3223 u8 tbusy;
3224 uint chars;
3225 u16 thead, ttail, tmask, chead, ctail;
3226 ulong lock_flags = 0;
3227 ulong lock_flags2 = 0;
a6792a3e 3228
0b2cf5c8
DY
3229 if (!tty)
3230 return 0;
a6792a3e 3231
0b2cf5c8
DY
3232 un = tty->driver_data;
3233 if (!un || un->magic != DGAP_UNIT_MAGIC)
3234 return 0;
a6792a3e 3235
0b2cf5c8
DY
3236 ch = un->un_ch;
3237 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
3238 return 0;
a6792a3e 3239
0b2cf5c8
DY
3240 bd = ch->ch_bd;
3241 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
3242 return 0;
a6792a3e 3243
0b2cf5c8
DY
3244 bs = ch->ch_bs;
3245 if (!bs)
cf42c34d 3246 return 0;
a6792a3e 3247
0b2cf5c8
DY
3248 spin_lock_irqsave(&bd->bd_lock, lock_flags);
3249 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
a6792a3e 3250
0b2cf5c8 3251 tmask = (ch->ch_tsize - 1);
a6792a3e 3252
0b2cf5c8 3253 /* Get Transmit queue pointers */
44209c93
IC
3254 thead = readw(&bs->tx_head) & tmask;
3255 ttail = readw(&bs->tx_tail) & tmask;
a6792a3e 3256
0b2cf5c8 3257 /* Get tbusy flag */
44209c93 3258 tbusy = readb(&bs->tbusy);
a6792a3e 3259
0b2cf5c8 3260 /* Get Command queue pointers */
44209c93
IC
3261 chead = readw(&ch->ch_cm->cm_head);
3262 ctail = readw(&ch->ch_cm->cm_tail);
a6792a3e 3263
0b2cf5c8
DY
3264 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
3265 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
a6792a3e 3266
0b2cf5c8
DY
3267 /*
3268 * The only way we know for sure if there is no pending
3269 * data left to be transferred, is if:
3270 * 1) Transmit head and tail are equal (empty).
3271 * 2) Command queue head and tail are equal (empty).
3272 * 3) The "TBUSY" flag is 0. (Transmitter not busy).
3273 */
a6792a3e 3274
0b2cf5c8
DY
3275 if ((ttail == thead) && (tbusy == 0) && (chead == ctail)) {
3276 chars = 0;
3277 } else {
3278 if (thead >= ttail)
3279 chars = thead - ttail;
3280 else
3281 chars = thead - ttail + ch->ch_tsize;
a6792a3e 3282 /*
0b2cf5c8
DY
3283 * Fudge factor here.
3284 * If chars is zero, we know that the command queue had
3285 * something in it or tbusy was set. Because we cannot
3286 * be sure if there is still some data to be transmitted,
3287 * lets lie, and tell ld we have 1 byte left.
a6792a3e 3288 */
0b2cf5c8
DY
3289 if (chars == 0) {
3290 /*
3291 * If TBUSY is still set, and our tx buffers are empty,
3292 * force the firmware to send me another wakeup after
3293 * TBUSY has been cleared.
3294 */
3295 if (tbusy != 0) {
3296 spin_lock_irqsave(&ch->ch_lock, lock_flags);
3297 un->un_flags |= UN_EMPTY;
44209c93 3298 writeb(1, &bs->iempty);
0b2cf5c8
DY
3299 spin_unlock_irqrestore(&ch->ch_lock,
3300 lock_flags);
3301 }
3302 chars = 1;
3303 }
3304 }
a6792a3e 3305
0b2cf5c8
DY
3306 return chars;
3307}
a6792a3e 3308
0b2cf5c8
DY
3309static int dgap_wait_for_drain(struct tty_struct *tty)
3310{
3311 struct channel_t *ch;
3312 struct un_t *un;
3313 struct bs_t __iomem *bs;
3314 int ret = 0;
3315 uint count = 1;
3316 ulong lock_flags = 0;
a6792a3e 3317
0b2cf5c8
DY
3318 if (!tty || tty->magic != TTY_MAGIC)
3319 return -EIO;
a6792a3e 3320
0b2cf5c8
DY
3321 un = tty->driver_data;
3322 if (!un || un->magic != DGAP_UNIT_MAGIC)
3323 return -EIO;
a6792a3e 3324
0b2cf5c8
DY
3325 ch = un->un_ch;
3326 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
3327 return -EIO;
a6792a3e 3328
0b2cf5c8
DY
3329 bs = ch->ch_bs;
3330 if (!bs)
3331 return -EIO;
a6792a3e 3332
0b2cf5c8
DY
3333 /* Loop until data is drained */
3334 while (count != 0) {
0b2cf5c8 3335 count = dgap_tty_chars_in_buffer(tty);
a6792a3e 3336
0b2cf5c8
DY
3337 if (count == 0)
3338 break;
a6792a3e 3339
0b2cf5c8
DY
3340 /* Set flag waiting for drain */
3341 spin_lock_irqsave(&ch->ch_lock, lock_flags);
3342 un->un_flags |= UN_EMPTY;
44209c93 3343 writeb(1, &bs->iempty);
0b2cf5c8 3344 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
a6792a3e 3345
0b2cf5c8
DY
3346 /* Go to sleep till we get woken up */
3347 ret = wait_event_interruptible(un->un_flags_wait,
3348 ((un->un_flags & UN_EMPTY) == 0));
3349 /* If ret is non-zero, user ctrl-c'ed us */
3350 if (ret)
3351 break;
3352 }
a6792a3e 3353
0b2cf5c8
DY
3354 spin_lock_irqsave(&ch->ch_lock, lock_flags);
3355 un->un_flags &= ~(UN_EMPTY);
3356 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
a6792a3e 3357
0b2cf5c8
DY
3358 return ret;
3359}
a6792a3e 3360
0b2cf5c8
DY
3361/*
3362 * dgap_maxcps_room
3363 *
3364 * Reduces bytes_available to the max number of characters
3365 * that can be sent currently given the maxcps value, and
3366 * returns the new bytes_available. This only affects printer
3367 * output.
3368 */
3369static int dgap_maxcps_room(struct channel_t *ch, struct un_t *un,
3370 int bytes_available)
3371{
3372 /*
3373 * If its not the Transparent print device, return
3374 * the full data amount.
3375 */
3376 if (un->un_type != DGAP_PRINT)
3377 return bytes_available;
a6792a3e 3378
0b2cf5c8
DY
3379 if (ch->ch_digi.digi_maxcps > 0 && ch->ch_digi.digi_bufsize > 0) {
3380 int cps_limit = 0;
3381 unsigned long current_time = jiffies;
3382 unsigned long buffer_time = current_time +
3383 (HZ * ch->ch_digi.digi_bufsize) /
3384 ch->ch_digi.digi_maxcps;
a6792a3e 3385
0b2cf5c8
DY
3386 if (ch->ch_cpstime < current_time) {
3387 /* buffer is empty */
3388 ch->ch_cpstime = current_time; /* reset ch_cpstime */
3389 cps_limit = ch->ch_digi.digi_bufsize;
3390 } else if (ch->ch_cpstime < buffer_time) {
3391 /* still room in the buffer */
3392 cps_limit = ((buffer_time - ch->ch_cpstime) *
3393 ch->ch_digi.digi_maxcps) / HZ;
3394 } else {
3395 /* no room in the buffer */
3396 cps_limit = 0;
a6792a3e
MH
3397 }
3398
0b2cf5c8
DY
3399 bytes_available = min(cps_limit, bytes_available);
3400 }
a6792a3e 3401
0b2cf5c8
DY
3402 return bytes_available;
3403}
70d97a61 3404
0b2cf5c8
DY
3405static inline void dgap_set_firmware_event(struct un_t *un, unsigned int event)
3406{
3407 struct channel_t *ch;
3408 struct bs_t __iomem *bs;
3409
3410 if (!un || un->magic != DGAP_UNIT_MAGIC)
3411 return;
3412 ch = un->un_ch;
3413 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
3414 return;
3415 bs = ch->ch_bs;
3416 if (!bs)
3417 return;
a6792a3e 3418
0b2cf5c8
DY
3419 if ((event & UN_LOW) != 0) {
3420 if ((un->un_flags & UN_LOW) == 0) {
3421 un->un_flags |= UN_LOW;
44209c93 3422 writeb(1, &bs->ilow);
70d97a61 3423 }
0b2cf5c8
DY
3424 }
3425 if ((event & UN_LOW) != 0) {
3426 if ((un->un_flags & UN_EMPTY) == 0) {
3427 un->un_flags |= UN_EMPTY;
44209c93 3428 writeb(1, &bs->iempty);
70d97a61 3429 }
0b2cf5c8
DY
3430 }
3431}
70d97a61 3432
0b2cf5c8
DY
3433/*
3434 * dgap_tty_write_room()
3435 *
3436 * Return space available in Tx buffer
3437 */
3438static int dgap_tty_write_room(struct tty_struct *tty)
3439{
3440 struct channel_t *ch;
3441 struct un_t *un;
3442 struct bs_t __iomem *bs;
3443 u16 head, tail, tmask;
3444 int ret;
3445 ulong lock_flags = 0;
a6792a3e 3446
0b2cf5c8
DY
3447 if (!tty)
3448 return 0;
a6792a3e 3449
0b2cf5c8
DY
3450 un = tty->driver_data;
3451 if (!un || un->magic != DGAP_UNIT_MAGIC)
3452 return 0;
a6792a3e 3453
0b2cf5c8
DY
3454 ch = un->un_ch;
3455 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
3456 return 0;
a6792a3e 3457
0b2cf5c8
DY
3458 bs = ch->ch_bs;
3459 if (!bs)
3460 return 0;
a6792a3e 3461
0b2cf5c8 3462 spin_lock_irqsave(&ch->ch_lock, lock_flags);
a6792a3e 3463
0b2cf5c8 3464 tmask = ch->ch_tsize - 1;
44209c93
IC
3465 head = readw(&bs->tx_head) & tmask;
3466 tail = readw(&bs->tx_tail) & tmask;
a6792a3e 3467
0b2cf5c8
DY
3468 ret = tail - head - 1;
3469 if (ret < 0)
3470 ret += ch->ch_tsize;
a6792a3e 3471
0b2cf5c8
DY
3472 /* Limit printer to maxcps */
3473 ret = dgap_maxcps_room(ch, un, ret);
a6792a3e 3474
0b2cf5c8
DY
3475 /*
3476 * If we are printer device, leave space for
3477 * possibly both the on and off strings.
3478 */
3479 if (un->un_type == DGAP_PRINT) {
3480 if (!(ch->ch_flags & CH_PRON))
3481 ret -= ch->ch_digi.digi_onlen;
3482 ret -= ch->ch_digi.digi_offlen;
3483 } else {
3484 if (ch->ch_flags & CH_PRON)
3485 ret -= ch->ch_digi.digi_offlen;
3486 }
a6792a3e 3487
0b2cf5c8
DY
3488 if (ret < 0)
3489 ret = 0;
a6792a3e 3490
0b2cf5c8
DY
3491 /*
3492 * Schedule FEP to wake us up if needed.
3493 *
3494 * TODO: This might be overkill...
3495 * Do we really need to schedule callbacks from the FEP
3496 * in every case? Can we get smarter based on ret?
3497 */
3498 dgap_set_firmware_event(un, UN_LOW | UN_EMPTY);
3499 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
a6792a3e 3500
0b2cf5c8
DY
3501 return ret;
3502}
a6792a3e 3503
0b2cf5c8
DY
3504/*
3505 * dgap_tty_write()
3506 *
3507 * Take data from the user or kernel and send it out to the FEP.
3508 * In here exists all the Transparent Print magic as well.
3509 */
3510static int dgap_tty_write(struct tty_struct *tty, const unsigned char *buf,
629c7349 3511 int count)
0b2cf5c8
DY
3512{
3513 struct channel_t *ch;
3514 struct un_t *un;
3515 struct bs_t __iomem *bs;
3516 char __iomem *vaddr;
3517 u16 head, tail, tmask, remain;
3518 int bufcount, n;
3519 ulong lock_flags;
a6792a3e 3520
0b2cf5c8
DY
3521 if (!tty)
3522 return 0;
a6792a3e 3523
0b2cf5c8
DY
3524 un = tty->driver_data;
3525 if (!un || un->magic != DGAP_UNIT_MAGIC)
3526 return 0;
a6792a3e 3527
0b2cf5c8
DY
3528 ch = un->un_ch;
3529 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
3530 return 0;
a6792a3e 3531
0b2cf5c8
DY
3532 bs = ch->ch_bs;
3533 if (!bs)
3534 return 0;
a6792a3e 3535
0b2cf5c8
DY
3536 if (!count)
3537 return 0;
a6792a3e 3538
0b2cf5c8 3539 spin_lock_irqsave(&ch->ch_lock, lock_flags);
a6792a3e 3540
0b2cf5c8
DY
3541 /* Get our space available for the channel from the board */
3542 tmask = ch->ch_tsize - 1;
3543 head = readw(&(bs->tx_head)) & tmask;
3544 tail = readw(&(bs->tx_tail)) & tmask;
a6792a3e 3545
0b2cf5c8
DY
3546 bufcount = tail - head - 1;
3547 if (bufcount < 0)
3548 bufcount += ch->ch_tsize;
3549
3550 /*
3551 * Limit printer output to maxcps overall, with bursts allowed
3552 * up to bufsize characters.
3553 */
3554 bufcount = dgap_maxcps_room(ch, un, bufcount);
3555
3556 /*
3557 * Take minimum of what the user wants to send, and the
3558 * space available in the FEP buffer.
3559 */
3560 count = min(count, bufcount);
a6792a3e 3561
0b2cf5c8
DY
3562 /*
3563 * Bail if no space left.
3564 */
3565 if (count <= 0) {
3566 dgap_set_firmware_event(un, UN_LOW | UN_EMPTY);
3567 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
3568 return 0;
a6792a3e 3569 }
b053bb86 3570
b28ec88a 3571 /*
0b2cf5c8
DY
3572 * Output the printer ON string, if we are in terminal mode, but
3573 * need to be in printer mode.
b28ec88a 3574 */
0b2cf5c8
DY
3575 if ((un->un_type == DGAP_PRINT) && !(ch->ch_flags & CH_PRON)) {
3576 dgap_wmove(ch, ch->ch_digi.digi_onstr,
629c7349 3577 (int)ch->ch_digi.digi_onlen);
44209c93 3578 head = readw(&bs->tx_head) & tmask;
0b2cf5c8 3579 ch->ch_flags |= CH_PRON;
b053bb86
MH
3580 }
3581
0b2cf5c8
DY
3582 /*
3583 * On the other hand, output the printer OFF string, if we are
3584 * currently in printer mode, but need to output to the terminal.
3585 */
3586 if ((un->un_type != DGAP_PRINT) && (ch->ch_flags & CH_PRON)) {
3587 dgap_wmove(ch, ch->ch_digi.digi_offstr,
629c7349 3588 (int)ch->ch_digi.digi_offlen);
44209c93 3589 head = readw(&bs->tx_head) & tmask;
0b2cf5c8
DY
3590 ch->ch_flags &= ~CH_PRON;
3591 }
b053bb86 3592
0b2cf5c8 3593 n = count;
91177d53 3594
0b2cf5c8
DY
3595 /*
3596 * If the write wraps over the top of the circular buffer,
3597 * move the portion up to the wrap point, and reset the
3598 * pointers to the bottom.
3599 */
3600 remain = ch->ch_tstart + ch->ch_tsize - head;
6c8b84ef 3601
0b2cf5c8
DY
3602 if (n >= remain) {
3603 n -= remain;
3604 vaddr = ch->ch_taddr + head;
6c8b84ef 3605
18122553 3606 memcpy_toio(vaddr, (u8 *)buf, remain);
0ade4a34 3607
0b2cf5c8
DY
3608 head = ch->ch_tstart;
3609 buf += remain;
a66369a5 3610 }
b053bb86 3611
0b2cf5c8 3612 if (n > 0) {
0b2cf5c8
DY
3613 /*
3614 * Move rest of data.
3615 */
3616 vaddr = ch->ch_taddr + head;
3617 remain = n;
6c8b84ef 3618
18122553 3619 memcpy_toio(vaddr, (u8 *)buf, remain);
0b2cf5c8 3620 head += remain;
0b2cf5c8 3621 }
72d0f6fc 3622
0b2cf5c8
DY
3623 if (count) {
3624 ch->ch_txcount += count;
3625 head &= tmask;
44209c93 3626 writew(head, &bs->tx_head);
b28ec88a 3627 }
6c8b84ef 3628
0b2cf5c8 3629 dgap_set_firmware_event(un, UN_LOW | UN_EMPTY);
72d0f6fc 3630
0b2cf5c8
DY
3631 /*
3632 * If this is the print device, and the
3633 * printer is still on, we need to turn it
3634 * off before going idle. If the buffer is
3635 * non-empty, wait until it goes empty.
3636 * Otherwise turn it off right now.
3637 */
3638 if ((un->un_type == DGAP_PRINT) && (ch->ch_flags & CH_PRON)) {
44209c93 3639 tail = readw(&bs->tx_tail) & tmask;
72d0f6fc 3640
0b2cf5c8
DY
3641 if (tail != head) {
3642 un->un_flags |= UN_EMPTY;
44209c93 3643 writeb(1, &bs->iempty);
0b2cf5c8
DY
3644 } else {
3645 dgap_wmove(ch, ch->ch_digi.digi_offstr,
629c7349 3646 (int)ch->ch_digi.digi_offlen);
44209c93 3647 head = readw(&bs->tx_head) & tmask;
0b2cf5c8 3648 ch->ch_flags &= ~CH_PRON;
72d0f6fc 3649 }
72d0f6fc
DY
3650 }
3651
0b2cf5c8
DY
3652 /* Update printer buffer empty time. */
3653 if ((un->un_type == DGAP_PRINT) && (ch->ch_digi.digi_maxcps > 0)
3654 && (ch->ch_digi.digi_bufsize > 0)) {
3655 ch->ch_cpstime += (HZ * count) / ch->ch_digi.digi_maxcps;
72d0f6fc
DY
3656 }
3657
0b2cf5c8 3658 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
72d0f6fc 3659
0b2cf5c8 3660 return count;
b053bb86
MH
3661}
3662
b053bb86 3663/*
0b2cf5c8
DY
3664 * dgap_tty_put_char()
3665 *
3666 * Put a character into ch->ch_buf
3667 *
3668 * - used by the line discipline for OPOST processing
b053bb86 3669 */
0b2cf5c8 3670static int dgap_tty_put_char(struct tty_struct *tty, unsigned char c)
b053bb86 3671{
b053bb86 3672 /*
0b2cf5c8 3673 * Simply call tty_write.
b053bb86 3674 */
0b2cf5c8
DY
3675 dgap_tty_write(tty, &c, 1);
3676 return 1;
b053bb86
MH
3677}
3678
b053bb86 3679/*
0b2cf5c8 3680 * Return modem signals to ld.
b053bb86 3681 */
0b2cf5c8 3682static int dgap_tty_tiocmget(struct tty_struct *tty)
b053bb86 3683{
0b2cf5c8
DY
3684 struct channel_t *ch;
3685 struct un_t *un;
3686 int result;
3687 u8 mstat;
3688 ulong lock_flags;
b053bb86 3689
0b2cf5c8
DY
3690 if (!tty || tty->magic != TTY_MAGIC)
3691 return -EIO;
b053bb86 3692
0b2cf5c8
DY
3693 un = tty->driver_data;
3694 if (!un || un->magic != DGAP_UNIT_MAGIC)
3695 return -EIO;
b053bb86 3696
0b2cf5c8
DY
3697 ch = un->un_ch;
3698 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
3699 return -EIO;
b28ec88a 3700
0b2cf5c8
DY
3701 spin_lock_irqsave(&ch->ch_lock, lock_flags);
3702
44209c93 3703 mstat = readb(&ch->ch_bs->m_stat);
0b2cf5c8
DY
3704 /* Append any outbound signals that might be pending... */
3705 mstat |= ch->ch_mostat;
3706
3707 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
3708
3709 result = 0;
3710
3711 if (mstat & D_DTR(ch))
3712 result |= TIOCM_DTR;
3713 if (mstat & D_RTS(ch))
3714 result |= TIOCM_RTS;
3715 if (mstat & D_CTS(ch))
3716 result |= TIOCM_CTS;
3717 if (mstat & D_DSR(ch))
3718 result |= TIOCM_DSR;
3719 if (mstat & D_RI(ch))
3720 result |= TIOCM_RI;
3721 if (mstat & D_CD(ch))
3722 result |= TIOCM_CD;
bd3e43e5 3723
0b2cf5c8 3724 return result;
b053bb86
MH
3725}
3726
b053bb86 3727/*
0b2cf5c8
DY
3728 * dgap_tty_tiocmset()
3729 *
3730 * Set modem signals, called by ld.
b053bb86 3731 */
0b2cf5c8 3732static int dgap_tty_tiocmset(struct tty_struct *tty,
629c7349 3733 unsigned int set, unsigned int clear)
b053bb86 3734{
0b2cf5c8
DY
3735 struct board_t *bd;
3736 struct channel_t *ch;
3737 struct un_t *un;
3738 ulong lock_flags;
3739 ulong lock_flags2;
b053bb86 3740
0b2cf5c8
DY
3741 if (!tty || tty->magic != TTY_MAGIC)
3742 return -EIO;
b053bb86 3743
0b2cf5c8
DY
3744 un = tty->driver_data;
3745 if (!un || un->magic != DGAP_UNIT_MAGIC)
3746 return -EIO;
b053bb86 3747
0b2cf5c8
DY
3748 ch = un->un_ch;
3749 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
3750 return -EIO;
b053bb86 3751
0b2cf5c8
DY
3752 bd = ch->ch_bd;
3753 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
3754 return -EIO;
b053bb86 3755
0b2cf5c8
DY
3756 spin_lock_irqsave(&bd->bd_lock, lock_flags);
3757 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
b053bb86 3758
0b2cf5c8
DY
3759 if (set & TIOCM_RTS) {
3760 ch->ch_mforce |= D_RTS(ch);
3761 ch->ch_mval |= D_RTS(ch);
b053bb86
MH
3762 }
3763
0b2cf5c8
DY
3764 if (set & TIOCM_DTR) {
3765 ch->ch_mforce |= D_DTR(ch);
3766 ch->ch_mval |= D_DTR(ch);
3767 }
3768
3769 if (clear & TIOCM_RTS) {
3770 ch->ch_mforce |= D_RTS(ch);
3771 ch->ch_mval &= ~(D_RTS(ch));
3772 }
3773
3774 if (clear & TIOCM_DTR) {
3775 ch->ch_mforce |= D_DTR(ch);
3776 ch->ch_mval &= ~(D_DTR(ch));
3777 }
3778
3779 dgap_param(ch, bd, un->un_type);
b053bb86 3780
0b2cf5c8
DY
3781 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
3782 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
3783
3784 return 0;
b053bb86
MH
3785}
3786
b053bb86 3787/*
0b2cf5c8
DY
3788 * dgap_tty_send_break()
3789 *
3790 * Send a Break, called by ld.
b053bb86 3791 */
0b2cf5c8 3792static int dgap_tty_send_break(struct tty_struct *tty, int msec)
b053bb86 3793{
0b2cf5c8
DY
3794 struct board_t *bd;
3795 struct channel_t *ch;
3796 struct un_t *un;
3797 ulong lock_flags;
3798 ulong lock_flags2;
b053bb86 3799
0b2cf5c8
DY
3800 if (!tty || tty->magic != TTY_MAGIC)
3801 return -EIO;
b053bb86 3802
0b2cf5c8
DY
3803 un = tty->driver_data;
3804 if (!un || un->magic != DGAP_UNIT_MAGIC)
3805 return -EIO;
b053bb86 3806
0b2cf5c8
DY
3807 ch = un->un_ch;
3808 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
3809 return -EIO;
b053bb86 3810
0b2cf5c8
DY
3811 bd = ch->ch_bd;
3812 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
3813 return -EIO;
3814
3815 switch (msec) {
3816 case -1:
3817 msec = 0xFFFF;
3818 break;
3819 case 0:
3820 msec = 1;
3821 break;
3822 default:
3823 msec /= 10;
3824 break;
b053bb86
MH
3825 }
3826
0b2cf5c8
DY
3827 spin_lock_irqsave(&bd->bd_lock, lock_flags);
3828 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
3829#if 0
3830 dgap_cmdw(ch, SBREAK, (u16) SBREAK_TIME, 0);
3831#endif
18122553 3832 dgap_cmdw(ch, SBREAK, (u16)msec, 0);
bd3e43e5 3833
0b2cf5c8
DY
3834 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
3835 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
3836
3837 return 0;
b053bb86
MH
3838}
3839
b053bb86 3840/*
0b2cf5c8
DY
3841 * dgap_tty_wait_until_sent()
3842 *
3843 * wait until data has been transmitted, called by ld.
b053bb86 3844 */
0b2cf5c8 3845static void dgap_tty_wait_until_sent(struct tty_struct *tty, int timeout)
b053bb86 3846{
0b2cf5c8
DY
3847 dgap_wait_for_drain(tty);
3848}
b053bb86 3849
0b2cf5c8
DY
3850/*
3851 * dgap_send_xchar()
3852 *
3853 * send a high priority character, called by ld.
3854 */
3855static void dgap_tty_send_xchar(struct tty_struct *tty, char c)
3856{
3857 struct board_t *bd;
3858 struct channel_t *ch;
3859 struct un_t *un;
3860 ulong lock_flags;
3861 ulong lock_flags2;
3862
3863 if (!tty || tty->magic != TTY_MAGIC)
b053bb86 3864 return;
b053bb86 3865
0b2cf5c8
DY
3866 un = tty->driver_data;
3867 if (!un || un->magic != DGAP_UNIT_MAGIC)
3868 return;
b053bb86 3869
0b2cf5c8
DY
3870 ch = un->un_ch;
3871 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
3872 return;
b053bb86 3873
0b2cf5c8
DY
3874 bd = ch->ch_bd;
3875 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
31960c16 3876 return;
0b2cf5c8
DY
3877
3878 spin_lock_irqsave(&bd->bd_lock, lock_flags);
3879 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
b053bb86
MH
3880
3881 /*
0b2cf5c8
DY
3882 * This is technically what we should do.
3883 * However, the NIST tests specifically want
3884 * to see each XON or XOFF character that it
3885 * sends, so lets just send each character
3886 * by hand...
b053bb86 3887 */
0b2cf5c8
DY
3888#if 0
3889 if (c == STOP_CHAR(tty))
3890 dgap_cmdw(ch, RPAUSE, 0, 0);
3891 else if (c == START_CHAR(tty))
3892 dgap_cmdw(ch, RRESUME, 0, 0);
3893 else
3894 dgap_wmove(ch, &c, 1);
3895#else
3896 dgap_wmove(ch, &c, 1);
3897#endif
b053bb86 3898
0b2cf5c8
DY
3899 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
3900 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
b053bb86
MH
3901}
3902
b053bb86 3903/*
0b2cf5c8 3904 * Return modem signals to ld.
b053bb86 3905 */
0b2cf5c8 3906static int dgap_get_modem_info(struct channel_t *ch, unsigned int __user *value)
b053bb86 3907{
0b2cf5c8
DY
3908 int result;
3909 u8 mstat;
3910 ulong lock_flags;
b053bb86 3911
0b2cf5c8 3912 spin_lock_irqsave(&ch->ch_lock, lock_flags);
b053bb86 3913
44209c93 3914 mstat = readb(&ch->ch_bs->m_stat);
0b2cf5c8
DY
3915 /* Append any outbound signals that might be pending... */
3916 mstat |= ch->ch_mostat;
b053bb86 3917
0b2cf5c8 3918 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
b053bb86 3919
0b2cf5c8 3920 result = 0;
b053bb86 3921
0b2cf5c8
DY
3922 if (mstat & D_DTR(ch))
3923 result |= TIOCM_DTR;
3924 if (mstat & D_RTS(ch))
3925 result |= TIOCM_RTS;
3926 if (mstat & D_CTS(ch))
3927 result |= TIOCM_CTS;
3928 if (mstat & D_DSR(ch))
3929 result |= TIOCM_DSR;
3930 if (mstat & D_RI(ch))
3931 result |= TIOCM_RI;
3932 if (mstat & D_CD(ch))
3933 result |= TIOCM_CD;
b053bb86 3934
e20af8ac 3935 return put_user(result, value);
0b2cf5c8 3936}
b053bb86 3937
0b2cf5c8
DY
3938/*
3939 * dgap_set_modem_info()
3940 *
3941 * Set modem signals, called by ld.
3942 */
3943static int dgap_set_modem_info(struct channel_t *ch, struct board_t *bd,
3944 struct un_t *un, unsigned int command,
3945 unsigned int __user *value)
3946{
3947 int ret;
3948 unsigned int arg;
3949 ulong lock_flags;
3950 ulong lock_flags2;
b053bb86 3951
0b2cf5c8
DY
3952 ret = get_user(arg, value);
3953 if (ret)
3954 return ret;
b053bb86 3955
0b2cf5c8
DY
3956 switch (command) {
3957 case TIOCMBIS:
3958 if (arg & TIOCM_RTS) {
3959 ch->ch_mforce |= D_RTS(ch);
3960 ch->ch_mval |= D_RTS(ch);
3961 }
b053bb86 3962
0b2cf5c8
DY
3963 if (arg & TIOCM_DTR) {
3964 ch->ch_mforce |= D_DTR(ch);
3965 ch->ch_mval |= D_DTR(ch);
3966 }
b053bb86 3967
0b2cf5c8 3968 break;
b053bb86 3969
0b2cf5c8
DY
3970 case TIOCMBIC:
3971 if (arg & TIOCM_RTS) {
3972 ch->ch_mforce |= D_RTS(ch);
3973 ch->ch_mval &= ~(D_RTS(ch));
3974 }
b053bb86 3975
0b2cf5c8
DY
3976 if (arg & TIOCM_DTR) {
3977 ch->ch_mforce |= D_DTR(ch);
3978 ch->ch_mval &= ~(D_DTR(ch));
3979 }
b053bb86 3980
0b2cf5c8 3981 break;
b053bb86 3982
0b2cf5c8 3983 case TIOCMSET:
a9108b71 3984 ch->ch_mforce = D_DTR(ch) | D_RTS(ch);
b053bb86 3985
0b2cf5c8
DY
3986 if (arg & TIOCM_RTS)
3987 ch->ch_mval |= D_RTS(ch);
3988 else
3989 ch->ch_mval &= ~(D_RTS(ch));
b053bb86 3990
0b2cf5c8
DY
3991 if (arg & TIOCM_DTR)
3992 ch->ch_mval |= (D_DTR(ch));
3993 else
3994 ch->ch_mval &= ~(D_DTR(ch));
b053bb86 3995
0b2cf5c8 3996 break;
b053bb86 3997
0b2cf5c8
DY
3998 default:
3999 return -EINVAL;
b053bb86
MH
4000 }
4001
0b2cf5c8
DY
4002 spin_lock_irqsave(&bd->bd_lock, lock_flags);
4003 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
4004
4005 dgap_param(ch, bd, un->un_type);
4006
4007 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4008 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
4009
4010 return 0;
b053bb86
MH
4011}
4012
b053bb86 4013/*
0b2cf5c8
DY
4014 * dgap_tty_digigeta()
4015 *
4016 * Ioctl to get the information for ditty.
4017 *
4018 *
4019 *
b053bb86 4020 */
0b2cf5c8
DY
4021static int dgap_tty_digigeta(struct channel_t *ch,
4022 struct digi_t __user *retinfo)
b053bb86 4023{
0b2cf5c8 4024 struct digi_t tmp;
174efc1f 4025 ulong lock_flags;
b053bb86 4026
0b2cf5c8
DY
4027 if (!retinfo)
4028 return -EFAULT;
b053bb86 4029
0b2cf5c8 4030 memset(&tmp, 0, sizeof(tmp));
b053bb86 4031
0b2cf5c8
DY
4032 spin_lock_irqsave(&ch->ch_lock, lock_flags);
4033 memcpy(&tmp, &ch->ch_digi, sizeof(tmp));
4034 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
b053bb86 4035
0b2cf5c8
DY
4036 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
4037 return -EFAULT;
b053bb86 4038
0b2cf5c8
DY
4039 return 0;
4040}
b053bb86 4041
0b2cf5c8
DY
4042/*
4043 * dgap_tty_digiseta()
4044 *
4045 * Ioctl to set the information for ditty.
4046 *
4047 *
4048 *
4049 */
4050static int dgap_tty_digiseta(struct channel_t *ch, struct board_t *bd,
4051 struct un_t *un, struct digi_t __user *new_info)
4052{
4053 struct digi_t new_digi;
4054 ulong lock_flags = 0;
4055 unsigned long lock_flags2;
b053bb86 4056
0b2cf5c8
DY
4057 if (copy_from_user(&new_digi, new_info, sizeof(struct digi_t)))
4058 return -EFAULT;
4059
4060 spin_lock_irqsave(&bd->bd_lock, lock_flags);
4061 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
b053bb86 4062
0b2cf5c8 4063 memcpy(&ch->ch_digi, &new_digi, sizeof(struct digi_t));
b053bb86 4064
0b2cf5c8
DY
4065 if (ch->ch_digi.digi_maxcps < 1)
4066 ch->ch_digi.digi_maxcps = 1;
b053bb86 4067
0b2cf5c8
DY
4068 if (ch->ch_digi.digi_maxcps > 10000)
4069 ch->ch_digi.digi_maxcps = 10000;
b053bb86 4070
0b2cf5c8
DY
4071 if (ch->ch_digi.digi_bufsize < 10)
4072 ch->ch_digi.digi_bufsize = 10;
b053bb86 4073
0b2cf5c8
DY
4074 if (ch->ch_digi.digi_maxchar < 1)
4075 ch->ch_digi.digi_maxchar = 1;
b053bb86 4076
0b2cf5c8
DY
4077 if (ch->ch_digi.digi_maxchar > ch->ch_digi.digi_bufsize)
4078 ch->ch_digi.digi_maxchar = ch->ch_digi.digi_bufsize;
4079
4080 if (ch->ch_digi.digi_onlen > DIGI_PLEN)
4081 ch->ch_digi.digi_onlen = DIGI_PLEN;
4082
4083 if (ch->ch_digi.digi_offlen > DIGI_PLEN)
4084 ch->ch_digi.digi_offlen = DIGI_PLEN;
b053bb86 4085
0b2cf5c8
DY
4086 dgap_param(ch, bd, un->un_type);
4087
4088 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
c43846a9 4089 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
0b2cf5c8
DY
4090
4091 return 0;
b053bb86
MH
4092}
4093
0b2cf5c8
DY
4094/*
4095 * dgap_tty_digigetedelay()
b053bb86 4096 *
0b2cf5c8 4097 * Ioctl to get the current edelay setting.
b053bb86 4098 *
b053bb86 4099 *
0b2cf5c8
DY
4100 *
4101 */
4102static int dgap_tty_digigetedelay(struct tty_struct *tty, int __user *retinfo)
b053bb86 4103{
0b2cf5c8
DY
4104 struct channel_t *ch;
4105 struct un_t *un;
4106 int tmp;
4107 ulong lock_flags;
b053bb86 4108
0b2cf5c8
DY
4109 if (!retinfo)
4110 return -EFAULT;
b053bb86 4111
0b2cf5c8
DY
4112 if (!tty || tty->magic != TTY_MAGIC)
4113 return -EFAULT;
b053bb86 4114
0b2cf5c8
DY
4115 un = tty->driver_data;
4116 if (!un || un->magic != DGAP_UNIT_MAGIC)
4117 return -EFAULT;
b053bb86 4118
0b2cf5c8
DY
4119 ch = un->un_ch;
4120 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
4121 return -EFAULT;
b053bb86 4122
0b2cf5c8 4123 memset(&tmp, 0, sizeof(tmp));
b053bb86 4124
0b2cf5c8 4125 spin_lock_irqsave(&ch->ch_lock, lock_flags);
44209c93 4126 tmp = readw(&ch->ch_bs->edelay);
0b2cf5c8 4127 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
b053bb86 4128
0b2cf5c8
DY
4129 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
4130 return -EFAULT;
b053bb86 4131
0b2cf5c8
DY
4132 return 0;
4133}
b053bb86 4134
0b2cf5c8
DY
4135/*
4136 * dgap_tty_digisetedelay()
4137 *
4138 * Ioctl to set the EDELAY setting
4139 *
4140 */
4141static int dgap_tty_digisetedelay(struct channel_t *ch, struct board_t *bd,
4142 struct un_t *un, int __user *new_info)
4143{
4144 int new_digi;
4145 ulong lock_flags;
4146 ulong lock_flags2;
b053bb86 4147
0b2cf5c8
DY
4148 if (copy_from_user(&new_digi, new_info, sizeof(int)))
4149 return -EFAULT;
b053bb86 4150
0b2cf5c8
DY
4151 spin_lock_irqsave(&bd->bd_lock, lock_flags);
4152 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
b053bb86 4153
18122553 4154 writew((u16)new_digi, &ch->ch_bs->edelay);
b053bb86 4155
0b2cf5c8 4156 dgap_param(ch, bd, un->un_type);
b053bb86 4157
0b2cf5c8
DY
4158 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4159 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
4160
4161 return 0;
b053bb86
MH
4162}
4163
0b2cf5c8
DY
4164/*
4165 * dgap_tty_digigetcustombaud()
b053bb86 4166 *
0b2cf5c8
DY
4167 * Ioctl to get the current custom baud rate setting.
4168 */
4169static int dgap_tty_digigetcustombaud(struct channel_t *ch, struct un_t *un,
4170 int __user *retinfo)
4171{
4172 int tmp;
4173 ulong lock_flags;
4174
4175 if (!retinfo)
4176 return -EFAULT;
4177
4178 memset(&tmp, 0, sizeof(tmp));
4179
4180 spin_lock_irqsave(&ch->ch_lock, lock_flags);
4181 tmp = dgap_get_custom_baud(ch);
4182 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
4183
4184 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
4185 return -EFAULT;
4186
4187 return 0;
4188}
4189
4190/*
4191 * dgap_tty_digisetcustombaud()
b053bb86 4192 *
0b2cf5c8
DY
4193 * Ioctl to set the custom baud rate setting
4194 */
4195static int dgap_tty_digisetcustombaud(struct channel_t *ch, struct board_t *bd,
4196 struct un_t *un, int __user *new_info)
b053bb86 4197{
0b2cf5c8
DY
4198 uint new_rate;
4199 ulong lock_flags;
4200 ulong lock_flags2;
b053bb86 4201
0b2cf5c8
DY
4202 if (copy_from_user(&new_rate, new_info, sizeof(unsigned int)))
4203 return -EFAULT;
b053bb86 4204
0b2cf5c8 4205 if (bd->bd_flags & BD_FEP5PLUS) {
0b2cf5c8
DY
4206 spin_lock_irqsave(&bd->bd_lock, lock_flags);
4207 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
b053bb86 4208
0b2cf5c8 4209 ch->ch_custom_speed = new_rate;
b053bb86 4210
0b2cf5c8
DY
4211 dgap_param(ch, bd, un->un_type);
4212
4213 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4214 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
b053bb86
MH
4215 }
4216
0b2cf5c8
DY
4217 return 0;
4218}
4219
4220/*
4221 * dgap_set_termios()
4222 */
4223static void dgap_tty_set_termios(struct tty_struct *tty,
629c7349 4224 struct ktermios *old_termios)
0b2cf5c8
DY
4225{
4226 struct board_t *bd;
4227 struct channel_t *ch;
4228 struct un_t *un;
4229 unsigned long lock_flags;
4230 unsigned long lock_flags2;
4231
4232 if (!tty || tty->magic != TTY_MAGIC)
4233 return;
b053bb86 4234
0b2cf5c8
DY
4235 un = tty->driver_data;
4236 if (!un || un->magic != DGAP_UNIT_MAGIC)
4237 return;
b053bb86 4238
0b2cf5c8
DY
4239 ch = un->un_ch;
4240 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
4241 return;
b053bb86 4242
0b2cf5c8
DY
4243 bd = ch->ch_bd;
4244 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
4245 return;
b053bb86 4246
0b2cf5c8
DY
4247 spin_lock_irqsave(&bd->bd_lock, lock_flags);
4248 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
b053bb86 4249
0b2cf5c8
DY
4250 ch->ch_c_cflag = tty->termios.c_cflag;
4251 ch->ch_c_iflag = tty->termios.c_iflag;
4252 ch->ch_c_oflag = tty->termios.c_oflag;
4253 ch->ch_c_lflag = tty->termios.c_lflag;
4254 ch->ch_startc = tty->termios.c_cc[VSTART];
4255 ch->ch_stopc = tty->termios.c_cc[VSTOP];
b053bb86 4256
0b2cf5c8
DY
4257 dgap_carrier(ch);
4258 dgap_param(ch, bd, un->un_type);
b053bb86 4259
0b2cf5c8
DY
4260 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4261 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
b053bb86
MH
4262}
4263
0b2cf5c8 4264static void dgap_tty_throttle(struct tty_struct *tty)
b053bb86 4265{
0b2cf5c8
DY
4266 struct board_t *bd;
4267 struct channel_t *ch;
4268 struct un_t *un;
4269 ulong lock_flags;
4270 ulong lock_flags2;
b053bb86 4271
0b2cf5c8 4272 if (!tty || tty->magic != TTY_MAGIC)
b053bb86
MH
4273 return;
4274
0b2cf5c8
DY
4275 un = tty->driver_data;
4276 if (!un || un->magic != DGAP_UNIT_MAGIC)
b053bb86 4277 return;
b053bb86 4278
0b2cf5c8
DY
4279 ch = un->un_ch;
4280 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
b053bb86
MH
4281 return;
4282
0b2cf5c8
DY
4283 bd = ch->ch_bd;
4284 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
b053bb86 4285 return;
b053bb86 4286
0b2cf5c8
DY
4287 spin_lock_irqsave(&bd->bd_lock, lock_flags);
4288 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
b053bb86 4289
0b2cf5c8
DY
4290 ch->ch_flags |= (CH_RXBLOCK);
4291#if 1
4292 dgap_cmdw(ch, RPAUSE, 0, 0);
4293#endif
b053bb86 4294
0b2cf5c8
DY
4295 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4296 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
0b2cf5c8 4297}
b053bb86 4298
0b2cf5c8
DY
4299static void dgap_tty_unthrottle(struct tty_struct *tty)
4300{
4301 struct board_t *bd;
4302 struct channel_t *ch;
4303 struct un_t *un;
4304 ulong lock_flags;
4305 ulong lock_flags2;
b053bb86 4306
0b2cf5c8
DY
4307 if (!tty || tty->magic != TTY_MAGIC)
4308 return;
b053bb86 4309
0b2cf5c8
DY
4310 un = tty->driver_data;
4311 if (!un || un->magic != DGAP_UNIT_MAGIC)
4312 return;
b053bb86 4313
0b2cf5c8
DY
4314 ch = un->un_ch;
4315 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
4316 return;
b053bb86 4317
0b2cf5c8
DY
4318 bd = ch->ch_bd;
4319 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
4320 return;
b053bb86 4321
0b2cf5c8
DY
4322 spin_lock_irqsave(&bd->bd_lock, lock_flags);
4323 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
b053bb86 4324
0b2cf5c8
DY
4325 ch->ch_flags &= ~(CH_RXBLOCK);
4326
4327#if 1
4328 dgap_cmdw(ch, RRESUME, 0, 0);
4329#endif
4330
4331 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4332 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
b053bb86
MH
4333}
4334
48d43be4
DY
4335static struct board_t *find_board_by_major(unsigned int major)
4336{
4337 unsigned int i;
4338
4339 for (i = 0; i < MAXBOARDS; i++) {
4340 struct board_t *brd = dgap_board[i];
d268b50e 4341
48d43be4
DY
4342 if (!brd)
4343 return NULL;
4344 if (major == brd->serial_driver->major ||
4345 major == brd->print_driver->major)
4346 return brd;
4347 }
4348
4349 return NULL;
4350}
4351
0b2cf5c8 4352/************************************************************************
b053bb86 4353 *
0b2cf5c8 4354 * TTY Entry points and helper functions
b053bb86 4355 *
0b2cf5c8
DY
4356 ************************************************************************/
4357
4358/*
4359 * dgap_tty_open()
b053bb86 4360 *
0b2cf5c8
DY
4361 */
4362static int dgap_tty_open(struct tty_struct *tty, struct file *file)
b053bb86 4363{
0b2cf5c8
DY
4364 struct board_t *brd;
4365 struct channel_t *ch;
4366 struct un_t *un;
405b26d9 4367 struct bs_t __iomem *bs;
0b2cf5c8
DY
4368 uint major;
4369 uint minor;
4370 int rc;
4371 ulong lock_flags;
4372 ulong lock_flags2;
174efc1f 4373 u16 head;
b053bb86 4374
0b2cf5c8
DY
4375 major = MAJOR(tty_devnum(tty));
4376 minor = MINOR(tty_devnum(tty));
4377
48d43be4 4378 brd = find_board_by_major(major);
0b2cf5c8
DY
4379 if (!brd)
4380 return -EIO;
b053bb86
MH
4381
4382 /*
0b2cf5c8
DY
4383 * If board is not yet up to a state of READY, go to
4384 * sleep waiting for it to happen or they cancel the open.
b053bb86 4385 */
0b2cf5c8 4386 rc = wait_event_interruptible(brd->state_wait,
629c7349 4387 (brd->state & BOARD_READY));
0b2cf5c8
DY
4388
4389 if (rc)
4390 return rc;
4391
4392 spin_lock_irqsave(&brd->bd_lock, lock_flags);
4393
4394 /* The wait above should guarantee this cannot happen */
4395 if (brd->state != BOARD_READY) {
4396 spin_unlock_irqrestore(&brd->bd_lock, lock_flags);
4397 return -EIO;
4398 }
4399
4400 /* If opened device is greater than our number of ports, bail. */
4401 if (MINOR(tty_devnum(tty)) > brd->nasync) {
4402 spin_unlock_irqrestore(&brd->bd_lock, lock_flags);
4403 return -EIO;
4404 }
4405
4406 ch = brd->channels[minor];
4407 if (!ch) {
4408 spin_unlock_irqrestore(&brd->bd_lock, lock_flags);
4409 return -EIO;
4410 }
4411
4412 /* Grab channel lock */
4413 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
4414
4415 /* Figure out our type */
4c5dbca6 4416 if (major == brd->serial_driver->major) {
0b2cf5c8
DY
4417 un = &brd->channels[minor]->ch_tun;
4418 un->un_type = DGAP_SERIAL;
4c5dbca6 4419 } else if (major == brd->print_driver->major) {
0b2cf5c8
DY
4420 un = &brd->channels[minor]->ch_pun;
4421 un->un_type = DGAP_PRINT;
4422 } else {
4423 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4424 spin_unlock_irqrestore(&brd->bd_lock, lock_flags);
4425 return -EIO;
4426 }
4427
4428 /* Store our unit into driver_data, so we always have it available. */
4429 tty->driver_data = un;
b053bb86
MH
4430
4431 /*
0b2cf5c8 4432 * Error if channel info pointer is NULL.
b053bb86 4433 */
0b2cf5c8
DY
4434 bs = ch->ch_bs;
4435 if (!bs) {
4436 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4437 spin_unlock_irqrestore(&brd->bd_lock, lock_flags);
4438 return -EIO;
4439 }
b053bb86
MH
4440
4441 /*
0b2cf5c8 4442 * Initialize tty's
b053bb86 4443 */
0b2cf5c8
DY
4444 if (!(un->un_flags & UN_ISOPEN)) {
4445 /* Store important variables. */
4446 un->un_tty = tty;
b053bb86 4447
0b2cf5c8 4448 /* Maybe do something here to the TTY struct as well? */
b053bb86
MH
4449 }
4450
4451 /*
0b2cf5c8 4452 * Initialize if neither terminal or printer is open.
b053bb86 4453 */
0b2cf5c8 4454 if (!((ch->ch_tun.un_flags | ch->ch_pun.un_flags) & UN_ISOPEN)) {
0b2cf5c8
DY
4455 ch->ch_mforce = 0;
4456 ch->ch_mval = 0;
b053bb86 4457
0b2cf5c8
DY
4458 /*
4459 * Flush input queue.
4460 */
44209c93
IC
4461 head = readw(&bs->rx_head);
4462 writew(head, &bs->rx_tail);
b053bb86 4463
0b2cf5c8
DY
4464 ch->ch_flags = 0;
4465 ch->pscan_state = 0;
4466 ch->pscan_savechar = 0;
b053bb86 4467
0b2cf5c8
DY
4468 ch->ch_c_cflag = tty->termios.c_cflag;
4469 ch->ch_c_iflag = tty->termios.c_iflag;
4470 ch->ch_c_oflag = tty->termios.c_oflag;
4471 ch->ch_c_lflag = tty->termios.c_lflag;
4472 ch->ch_startc = tty->termios.c_cc[VSTART];
4473 ch->ch_stopc = tty->termios.c_cc[VSTOP];
b053bb86 4474
0b2cf5c8
DY
4475 /* TODO: flush our TTY struct here? */
4476 }
b053bb86 4477
0b2cf5c8
DY
4478 dgap_carrier(ch);
4479 /*
4480 * Run param in case we changed anything
4481 */
4482 dgap_param(ch, brd, un->un_type);
b053bb86
MH
4483
4484 /*
0b2cf5c8 4485 * follow protocol for opening port
b053bb86 4486 */
b053bb86 4487
0b2cf5c8
DY
4488 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4489 spin_unlock_irqrestore(&brd->bd_lock, lock_flags);
b053bb86 4490
0b2cf5c8 4491 rc = dgap_block_til_ready(tty, file, ch);
b053bb86 4492
0b2cf5c8
DY
4493 if (!un->un_tty)
4494 return -ENODEV;
4495
4496 /* No going back now, increment our unit and channel counters */
4497 spin_lock_irqsave(&ch->ch_lock, lock_flags);
4498 ch->ch_open_count++;
4499 un->un_open_count++;
4500 un->un_flags |= (UN_ISOPEN);
4501 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
4502
4503 return rc;
b053bb86
MH
4504}
4505
0b2cf5c8
DY
4506/*
4507 * dgap_tty_close()
b053bb86 4508 *
0b2cf5c8
DY
4509 */
4510static void dgap_tty_close(struct tty_struct *tty, struct file *file)
b053bb86 4511{
0b2cf5c8
DY
4512 struct board_t *bd;
4513 struct channel_t *ch;
4514 struct un_t *un;
4515 ulong lock_flags;
b053bb86 4516
0b2cf5c8
DY
4517 if (!tty || tty->magic != TTY_MAGIC)
4518 return;
b053bb86 4519
0b2cf5c8
DY
4520 un = tty->driver_data;
4521 if (!un || un->magic != DGAP_UNIT_MAGIC)
4522 return;
b053bb86 4523
0b2cf5c8
DY
4524 ch = un->un_ch;
4525 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
4526 return;
b053bb86 4527
0b2cf5c8
DY
4528 bd = ch->ch_bd;
4529 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
4530 return;
b053bb86 4531
0b2cf5c8 4532 spin_lock_irqsave(&ch->ch_lock, lock_flags);
b053bb86 4533
0b2cf5c8
DY
4534 /*
4535 * Determine if this is the last close or not - and if we agree about
4536 * which type of close it is with the Line Discipline
4537 */
4538 if ((tty->count == 1) && (un->un_open_count != 1)) {
b053bb86 4539 /*
0b2cf5c8
DY
4540 * Uh, oh. tty->count is 1, which means that the tty
4541 * structure will be freed. un_open_count should always
4542 * be one in these conditions. If it's greater than
4543 * one, we've got real problems, since it means the
4544 * serial port won't be shutdown.
b053bb86 4545 */
0b2cf5c8
DY
4546 un->un_open_count = 1;
4547 }
b053bb86 4548
0b2cf5c8
DY
4549 if (--un->un_open_count < 0)
4550 un->un_open_count = 0;
b053bb86 4551
0b2cf5c8 4552 ch->ch_open_count--;
b053bb86 4553
0b2cf5c8
DY
4554 if (ch->ch_open_count && un->un_open_count) {
4555 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
4556 return;
4557 }
b053bb86 4558
0b2cf5c8 4559 /* OK, its the last close on the unit */
b053bb86 4560
0b2cf5c8 4561 un->un_flags |= UN_CLOSING;
b053bb86 4562
0b2cf5c8
DY
4563 tty->closing = 1;
4564
4565 /*
4566 * Only officially close channel if count is 0 and
4567 * DIGI_PRINTER bit is not set.
4568 */
4569 if ((ch->ch_open_count == 0) &&
4570 !(ch->ch_digi.digi_flags & DIGI_PRINTER)) {
0b2cf5c8 4571 ch->ch_flags &= ~(CH_RXBLOCK);
b053bb86 4572
0b2cf5c8 4573 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
b053bb86 4574
0b2cf5c8
DY
4575 /* wait for output to drain */
4576 /* This will also return if we take an interrupt */
b053bb86 4577
0b2cf5c8 4578 dgap_wait_for_drain(tty);
b053bb86 4579
0b2cf5c8
DY
4580 dgap_tty_flush_buffer(tty);
4581 tty_ldisc_flush(tty);
b053bb86 4582
0b2cf5c8 4583 spin_lock_irqsave(&ch->ch_lock, lock_flags);
b053bb86 4584
0b2cf5c8 4585 tty->closing = 0;
b053bb86
MH
4586
4587 /*
0b2cf5c8 4588 * If we have HUPCL set, lower DTR and RTS
b053bb86 4589 */
0b2cf5c8 4590 if (ch->ch_c_cflag & HUPCL) {
a9108b71
IC
4591 ch->ch_mostat &= ~(D_RTS(ch) | D_DTR(ch));
4592 dgap_cmdb(ch, SMODEM, 0, D_DTR(ch) | D_RTS(ch), 0);
b053bb86 4593
af5b80be 4594 /*
0b2cf5c8
DY
4595 * Go to sleep to ensure RTS/DTR
4596 * have been dropped for modems to see it.
af5b80be 4597 */
0b2cf5c8 4598 spin_unlock_irqrestore(&ch->ch_lock,
629c7349 4599 lock_flags);
b053bb86 4600
0b2cf5c8
DY
4601 /* .25 second delay for dropping RTS/DTR */
4602 schedule_timeout_interruptible(msecs_to_jiffies(250));
b053bb86 4603
0b2cf5c8 4604 spin_lock_irqsave(&ch->ch_lock, lock_flags);
b053bb86
MH
4605 }
4606
0b2cf5c8
DY
4607 ch->pscan_state = 0;
4608 ch->pscan_savechar = 0;
4609 ch->ch_baud_info = 0;
b053bb86
MH
4610 }
4611
4612 /*
0b2cf5c8 4613 * turn off print device when closing print device.
b053bb86 4614 */
0b2cf5c8
DY
4615 if ((un->un_type == DGAP_PRINT) && (ch->ch_flags & CH_PRON)) {
4616 dgap_wmove(ch, ch->ch_digi.digi_offstr,
629c7349 4617 (int)ch->ch_digi.digi_offlen);
0b2cf5c8 4618 ch->ch_flags &= ~CH_PRON;
b053bb86
MH
4619 }
4620
0b2cf5c8
DY
4621 un->un_tty = NULL;
4622 un->un_flags &= ~(UN_ISOPEN | UN_CLOSING);
4623 tty->driver_data = NULL;
b053bb86 4624
0b2cf5c8
DY
4625 wake_up_interruptible(&ch->ch_flags_wait);
4626 wake_up_interruptible(&un->un_flags_wait);
b053bb86 4627
0b2cf5c8
DY
4628 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
4629}
b053bb86 4630
0b2cf5c8
DY
4631static void dgap_tty_start(struct tty_struct *tty)
4632{
4633 struct board_t *bd;
4634 struct channel_t *ch;
4635 struct un_t *un;
4636 ulong lock_flags;
4637 ulong lock_flags2;
b053bb86 4638
0b2cf5c8
DY
4639 if (!tty || tty->magic != TTY_MAGIC)
4640 return;
b053bb86 4641
0b2cf5c8
DY
4642 un = tty->driver_data;
4643 if (!un || un->magic != DGAP_UNIT_MAGIC)
4644 return;
b053bb86 4645
0b2cf5c8
DY
4646 ch = un->un_ch;
4647 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
4648 return;
b053bb86 4649
0b2cf5c8
DY
4650 bd = ch->ch_bd;
4651 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
4652 return;
b053bb86 4653
0b2cf5c8
DY
4654 spin_lock_irqsave(&bd->bd_lock, lock_flags);
4655 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
96045db8 4656
0b2cf5c8 4657 dgap_cmdw(ch, RESUMETX, 0, 0);
b053bb86 4658
0b2cf5c8
DY
4659 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4660 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
4661}
b053bb86 4662
0b2cf5c8
DY
4663static void dgap_tty_stop(struct tty_struct *tty)
4664{
4665 struct board_t *bd;
4666 struct channel_t *ch;
4667 struct un_t *un;
4668 ulong lock_flags;
4669 ulong lock_flags2;
b053bb86 4670
0b2cf5c8
DY
4671 if (!tty || tty->magic != TTY_MAGIC)
4672 return;
b053bb86 4673
0b2cf5c8
DY
4674 un = tty->driver_data;
4675 if (!un || un->magic != DGAP_UNIT_MAGIC)
4676 return;
4677
4678 ch = un->un_ch;
4679 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
4680 return;
4681
4682 bd = ch->ch_bd;
4683 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
4684 return;
4685
4686 spin_lock_irqsave(&bd->bd_lock, lock_flags);
4687 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
4688
4689 dgap_cmdw(ch, PAUSETX, 0, 0);
4690
4691 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4692 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
4693}
4694
4695/*
4696 * dgap_tty_flush_chars()
4697 *
4698 * Flush the cook buffer
4699 *
4700 * Note to self, and any other poor souls who venture here:
4701 *
4702 * flush in this case DOES NOT mean dispose of the data.
4703 * instead, it means "stop buffering and send it if you
4704 * haven't already." Just guess how I figured that out... SRW 2-Jun-98
4705 *
4706 * It is also always called in interrupt context - JAR 8-Sept-99
4707 */
4708static void dgap_tty_flush_chars(struct tty_struct *tty)
4709{
4710 struct board_t *bd;
4711 struct channel_t *ch;
4712 struct un_t *un;
4713 ulong lock_flags;
4714 ulong lock_flags2;
b053bb86 4715
0b2cf5c8
DY
4716 if (!tty || tty->magic != TTY_MAGIC)
4717 return;
b053bb86 4718
0b2cf5c8
DY
4719 un = tty->driver_data;
4720 if (!un || un->magic != DGAP_UNIT_MAGIC)
4721 return;
b053bb86 4722
0b2cf5c8
DY
4723 ch = un->un_ch;
4724 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
4725 return;
b053bb86 4726
0b2cf5c8
DY
4727 bd = ch->ch_bd;
4728 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
4729 return;
b053bb86 4730
0b2cf5c8
DY
4731 spin_lock_irqsave(&bd->bd_lock, lock_flags);
4732 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
b053bb86 4733
0b2cf5c8 4734 /* TODO: Do something here */
b053bb86 4735
0b2cf5c8
DY
4736 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4737 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
b053bb86
MH
4738}
4739
0b2cf5c8
DY
4740/*****************************************************************************
4741 *
4742 * The IOCTL function and all of its helpers
4743 *
4744 *****************************************************************************/
4745
b053bb86 4746/*
0b2cf5c8 4747 * dgap_tty_ioctl()
b053bb86 4748 *
0b2cf5c8 4749 * The usual assortment of ioctl's
b053bb86 4750 */
0b2cf5c8 4751static int dgap_tty_ioctl(struct tty_struct *tty, unsigned int cmd,
629c7349 4752 unsigned long arg)
b053bb86 4753{
0b2cf5c8
DY
4754 struct board_t *bd;
4755 struct channel_t *ch;
4756 struct un_t *un;
4757 int rc;
4758 u16 head;
4759 ulong lock_flags = 0;
4760 ulong lock_flags2 = 0;
18122553 4761 void __user *uarg = (void __user *)arg;
b053bb86 4762
0b2cf5c8
DY
4763 if (!tty || tty->magic != TTY_MAGIC)
4764 return -ENODEV;
4765
4766 un = tty->driver_data;
4767 if (!un || un->magic != DGAP_UNIT_MAGIC)
4768 return -ENODEV;
b053bb86 4769
0b2cf5c8 4770 ch = un->un_ch;
b053bb86 4771 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
0b2cf5c8 4772 return -ENODEV;
b053bb86 4773
0b2cf5c8
DY
4774 bd = ch->ch_bd;
4775 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
4776 return -ENODEV;
b053bb86 4777
0b2cf5c8
DY
4778 spin_lock_irqsave(&bd->bd_lock, lock_flags);
4779 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
b053bb86 4780
0b2cf5c8
DY
4781 if (un->un_open_count <= 0) {
4782 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4783 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
4784 return -EIO;
4785 }
b053bb86 4786
0b2cf5c8 4787 switch (cmd) {
0b2cf5c8 4788 /* Here are all the standard ioctl's that we MUST implement */
0b2cf5c8
DY
4789 case TCSBRK:
4790 /*
4791 * TCSBRK is SVID version: non-zero arg --> no break
4792 * this behaviour is exploited by tcdrain().
4793 *
4794 * According to POSIX.1 spec (7.2.2.1.2) breaks should be
4795 * between 0.25 and 0.5 seconds so we'll ask for something
4796 * in the middle: 0.375 seconds.
4797 */
4798 rc = tty_check_change(tty);
4799 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4800 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
4801 if (rc)
4802 return rc;
b053bb86 4803
0b2cf5c8 4804 rc = dgap_wait_for_drain(tty);
b053bb86 4805
0b2cf5c8
DY
4806 if (rc)
4807 return -EINTR;
b053bb86 4808
0b2cf5c8
DY
4809 spin_lock_irqsave(&bd->bd_lock, lock_flags);
4810 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
8cdd7639 4811
0b2cf5c8 4812 if (((cmd == TCSBRK) && (!arg)) || (cmd == TCSBRKP))
18122553 4813 dgap_cmdw(ch, SBREAK, (u16)SBREAK_TIME, 0);
8cdd7639 4814
0b2cf5c8
DY
4815 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4816 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
8cdd7639 4817
0b2cf5c8 4818 return 0;
8cdd7639 4819
0b2cf5c8
DY
4820 case TCSBRKP:
4821 /* support for POSIX tcsendbreak()
8cdd7639 4822
0b2cf5c8
DY
4823 * According to POSIX.1 spec (7.2.2.1.2) breaks should be
4824 * between 0.25 and 0.5 seconds so we'll ask for something
4825 * in the middle: 0.375 seconds.
4826 */
4827 rc = tty_check_change(tty);
4828 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4829 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
4830 if (rc)
4831 return rc;
8cdd7639 4832
0b2cf5c8
DY
4833 rc = dgap_wait_for_drain(tty);
4834 if (rc)
4835 return -EINTR;
4836
4837 spin_lock_irqsave(&bd->bd_lock, lock_flags);
4838 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
4839
18122553 4840 dgap_cmdw(ch, SBREAK, (u16)SBREAK_TIME, 0);
0b2cf5c8
DY
4841
4842 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4843 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
4844
4845 return 0;
4846
4847 case TIOCSBRK:
4848 /*
4849 * FEP5 doesn't support turning on a break unconditionally.
4850 * The FEP5 device will stop sending a break automatically
4851 * after the specified time value that was sent when turning on
4852 * the break.
4853 */
4854 rc = tty_check_change(tty);
4855 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4856 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
4857 if (rc)
4858 return rc;
4859
4860 rc = dgap_wait_for_drain(tty);
4861 if (rc)
4862 return -EINTR;
b053bb86 4863
0b2cf5c8
DY
4864 spin_lock_irqsave(&bd->bd_lock, lock_flags);
4865 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
b053bb86 4866
18122553 4867 dgap_cmdw(ch, SBREAK, (u16)SBREAK_TIME, 0);
b053bb86 4868
0b2cf5c8
DY
4869 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4870 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
b053bb86 4871
0b2cf5c8
DY
4872 return 0;
4873
4874 case TIOCCBRK:
4875 /*
4876 * FEP5 doesn't support turning off a break unconditionally.
4877 * The FEP5 device will stop sending a break automatically
4878 * after the specified time value that was sent when turning on
4879 * the break.
4880 */
4881 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
c43846a9 4882 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
0b2cf5c8 4883 return 0;
b053bb86 4884
0b2cf5c8 4885 case TIOCGSOFTCAR:
b053bb86 4886
0b2cf5c8
DY
4887 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4888 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
b053bb86 4889
6ba4df24 4890 return put_user(C_CLOCAL(tty) ? 1 : 0,
18122553 4891 (unsigned long __user *)arg);
b053bb86 4892
0b2cf5c8
DY
4893 case TIOCSSOFTCAR:
4894 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
c43846a9 4895 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
b053bb86 4896
18122553 4897 rc = get_user(arg, (unsigned long __user *)arg);
0b2cf5c8
DY
4898 if (rc)
4899 return rc;
4900
4901 spin_lock_irqsave(&bd->bd_lock, lock_flags);
4902 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
4903 tty->termios.c_cflag = ((tty->termios.c_cflag & ~CLOCAL) |
4904 (arg ? CLOCAL : 0));
4905 dgap_param(ch, bd, un->un_type);
4906 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4907 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
4908
4909 return 0;
4910
4911 case TIOCMGET:
4912 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4913 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
4914 return dgap_get_modem_info(ch, uarg);
4915
4916 case TIOCMBIS:
4917 case TIOCMBIC:
4918 case TIOCMSET:
4919 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4920 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
4921 return dgap_set_modem_info(ch, bd, un, cmd, uarg);
b053bb86
MH
4922
4923 /*
0b2cf5c8 4924 * Here are any additional ioctl's that we want to implement
b053bb86
MH
4925 */
4926
0b2cf5c8
DY
4927 case TCFLSH:
4928 /*
4929 * The linux tty driver doesn't have a flush
4930 * input routine for the driver, assuming all backed
4931 * up data is in the line disc. buffers. However,
4932 * we all know that's not the case. Here, we
4933 * act on the ioctl, but then lie and say we didn't
4934 * so the line discipline will process the flush
4935 * also.
4936 */
4937 rc = tty_check_change(tty);
4938 if (rc) {
4939 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4940 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
4941 return rc;
4942 }
b053bb86 4943
0b2cf5c8
DY
4944 if ((arg == TCIFLUSH) || (arg == TCIOFLUSH)) {
4945 if (!(un->un_type == DGAP_PRINT)) {
44209c93
IC
4946 head = readw(&ch->ch_bs->rx_head);
4947 writew(head, &ch->ch_bs->rx_tail);
4948 writeb(0, &ch->ch_bs->orun);
0b2cf5c8
DY
4949 }
4950 }
4951
4952 if ((arg != TCOFLUSH) && (arg != TCIOFLUSH)) {
4953 /* pretend we didn't recognize this IOCTL */
4954 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4955 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
4956
4957 return -ENOIOCTLCMD;
4958 }
4959
4960 ch->ch_flags &= ~CH_STOP;
44209c93 4961 head = readw(&ch->ch_bs->tx_head);
18122553 4962 dgap_cmdw(ch, FLUSHTX, (u16)head, 0);
0b2cf5c8 4963 dgap_cmdw(ch, RESUMETX, 0, 0);
a9108b71
IC
4964 if (ch->ch_tun.un_flags & (UN_LOW | UN_EMPTY)) {
4965 ch->ch_tun.un_flags &= ~(UN_LOW | UN_EMPTY);
0b2cf5c8
DY
4966 wake_up_interruptible(&ch->ch_tun.un_flags_wait);
4967 }
a9108b71
IC
4968 if (ch->ch_pun.un_flags & (UN_LOW | UN_EMPTY)) {
4969 ch->ch_pun.un_flags &= ~(UN_LOW | UN_EMPTY);
0b2cf5c8
DY
4970 wake_up_interruptible(&ch->ch_pun.un_flags_wait);
4971 }
4972 if (waitqueue_active(&tty->write_wait))
4973 wake_up_interruptible(&tty->write_wait);
b053bb86 4974
0b2cf5c8
DY
4975 /* Can't hold any locks when calling tty_wakeup! */
4976 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
4977 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
4978 tty_wakeup(tty);
4979
4980 /* pretend we didn't recognize this IOCTL */
4981 return -ENOIOCTLCMD;
4982
4983 case TCSETSF:
4984 case TCSETSW:
b053bb86 4985 /*
0b2cf5c8
DY
4986 * The linux tty driver doesn't have a flush
4987 * input routine for the driver, assuming all backed
4988 * up data is in the line disc. buffers. However,
4989 * we all know that's not the case. Here, we
4990 * act on the ioctl, but then lie and say we didn't
4991 * so the line discipline will process the flush
4992 * also.
b053bb86 4993 */
0b2cf5c8
DY
4994 if (cmd == TCSETSF) {
4995 /* flush rx */
4996 ch->ch_flags &= ~CH_STOP;
44209c93
IC
4997 head = readw(&ch->ch_bs->rx_head);
4998 writew(head, &ch->ch_bs->rx_tail);
0b2cf5c8 4999 }
b053bb86 5000
0b2cf5c8
DY
5001 /* now wait for all the output to drain */
5002 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
5003 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
5004 rc = dgap_wait_for_drain(tty);
5005 if (rc)
5006 return -EINTR;
b053bb86 5007
0b2cf5c8
DY
5008 /* pretend we didn't recognize this */
5009 return -ENOIOCTLCMD;
b053bb86 5010
0b2cf5c8
DY
5011 case TCSETAW:
5012
5013 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
5014 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
5015 rc = dgap_wait_for_drain(tty);
5016 if (rc)
5017 return -EINTR;
5018
5019 /* pretend we didn't recognize this */
5020 return -ENOIOCTLCMD;
b053bb86 5021
0b2cf5c8 5022 case TCXONC:
b053bb86 5023 /*
0b2cf5c8
DY
5024 * The Linux Line Discipline (LD) would do this for us if we
5025 * let it, but we have the special firmware options to do this
5026 * the "right way" regardless of hardware or software flow
5027 * control so we'll do it outselves instead of letting the LD
5028 * do it.
b053bb86 5029 */
0b2cf5c8
DY
5030 rc = tty_check_change(tty);
5031 if (rc) {
5032 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
5033 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
5034 return rc;
5035 }
b053bb86 5036
0b2cf5c8 5037 switch (arg) {
0b2cf5c8 5038 case TCOON:
c43846a9 5039 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
0b2cf5c8
DY
5040 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
5041 dgap_tty_start(tty);
5042 return 0;
5043 case TCOOFF:
5044 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
5045 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
5046 dgap_tty_stop(tty);
5047 return 0;
5048 case TCION:
5049 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
5050 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
5051 /* Make the ld do it */
5052 return -ENOIOCTLCMD;
5053 case TCIOFF:
5054 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
5055 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
5056 /* Make the ld do it */
5057 return -ENOIOCTLCMD;
5058 default:
5059 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
5060 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
5061 return -EINVAL;
b053bb86
MH
5062 }
5063
0b2cf5c8
DY
5064 case DIGI_GETA:
5065 /* get information for ditty */
5066 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
5067 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
5068 return dgap_tty_digigeta(ch, uarg);
5069
5070 case DIGI_SETAW:
5071 case DIGI_SETAF:
5072
5073 /* set information for ditty */
5074 if (cmd == (DIGI_SETAW)) {
0b2cf5c8
DY
5075 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
5076 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
5077 rc = dgap_wait_for_drain(tty);
5078 if (rc)
5079 return -EINTR;
5080 spin_lock_irqsave(&bd->bd_lock, lock_flags);
5081 spin_lock_irqsave(&ch->ch_lock, lock_flags2);
5082 } else
5083 tty_ldisc_flush(tty);
5084 /* fall thru */
5085
5086 case DIGI_SETA:
5087 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
5088 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
5089 return dgap_tty_digiseta(ch, bd, un, uarg);
5090
5091 case DIGI_GEDELAY:
5092 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
5093 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
5094 return dgap_tty_digigetedelay(tty, uarg);
5095
5096 case DIGI_SEDELAY:
5097 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
5098 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
5099 return dgap_tty_digisetedelay(ch, bd, un, uarg);
b053bb86 5100
0b2cf5c8
DY
5101 case DIGI_GETCUSTOMBAUD:
5102 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
5103 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
5104 return dgap_tty_digigetcustombaud(ch, un, uarg);
b053bb86 5105
0b2cf5c8
DY
5106 case DIGI_SETCUSTOMBAUD:
5107 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
5108 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
5109 return dgap_tty_digisetcustombaud(ch, bd, un, uarg);
b053bb86 5110
0b2cf5c8
DY
5111 case DIGI_RESET_PORT:
5112 dgap_firmware_reset_port(ch);
5113 dgap_param(ch, bd, un->un_type);
5114 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
5115 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
5116 return 0;
b053bb86 5117
0b2cf5c8
DY
5118 default:
5119 spin_unlock_irqrestore(&ch->ch_lock, lock_flags2);
5120 spin_unlock_irqrestore(&bd->bd_lock, lock_flags);
b053bb86 5121
0b2cf5c8
DY
5122 return -ENOIOCTLCMD;
5123 }
5124}
b053bb86 5125
0b2cf5c8
DY
5126static const struct tty_operations dgap_tty_ops = {
5127 .open = dgap_tty_open,
5128 .close = dgap_tty_close,
5129 .write = dgap_tty_write,
5130 .write_room = dgap_tty_write_room,
5131 .flush_buffer = dgap_tty_flush_buffer,
5132 .chars_in_buffer = dgap_tty_chars_in_buffer,
5133 .flush_chars = dgap_tty_flush_chars,
5134 .ioctl = dgap_tty_ioctl,
5135 .set_termios = dgap_tty_set_termios,
5136 .stop = dgap_tty_stop,
5137 .start = dgap_tty_start,
5138 .throttle = dgap_tty_throttle,
5139 .unthrottle = dgap_tty_unthrottle,
5140 .hangup = dgap_tty_hangup,
5141 .put_char = dgap_tty_put_char,
5142 .tiocmget = dgap_tty_tiocmget,
5143 .tiocmset = dgap_tty_tiocmset,
5144 .break_ctl = dgap_tty_send_break,
5145 .wait_until_sent = dgap_tty_wait_until_sent,
5146 .send_xchar = dgap_tty_send_xchar
5147};
b053bb86 5148
0b2cf5c8
DY
5149/************************************************************************
5150 *
5151 * TTY Initialization/Cleanup Functions
5152 *
5153 ************************************************************************/
b053bb86 5154
0b2cf5c8
DY
5155/*
5156 * dgap_tty_register()
5157 *
5158 * Init the tty subsystem for this board.
5159 */
5160static int dgap_tty_register(struct board_t *brd)
5161{
5162 int rc;
b053bb86 5163
dc3cfcd3
DY
5164 brd->serial_driver = tty_alloc_driver(MAXPORTS,
5165 TTY_DRIVER_REAL_RAW |
5166 TTY_DRIVER_DYNAMIC_DEV |
5167 TTY_DRIVER_HARDWARE_BREAK);
0b2cf5c8
DY
5168 if (IS_ERR(brd->serial_driver))
5169 return PTR_ERR(brd->serial_driver);
b053bb86 5170
0b2cf5c8
DY
5171 snprintf(brd->serial_name, MAXTTYNAMELEN, "tty_dgap_%d_",
5172 brd->boardnum);
5173 brd->serial_driver->name = brd->serial_name;
5174 brd->serial_driver->name_base = 0;
5175 brd->serial_driver->major = 0;
5176 brd->serial_driver->minor_start = 0;
5177 brd->serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
5178 brd->serial_driver->subtype = SERIAL_TYPE_NORMAL;
5179 brd->serial_driver->init_termios = dgap_default_termios;
5180 brd->serial_driver->driver_name = DRVSTR;
b053bb86 5181
0b2cf5c8
DY
5182 /*
5183 * Entry points for driver. Called by the kernel from
5184 * tty_io.c and n_tty.c.
5185 */
5186 tty_set_operations(brd->serial_driver, &dgap_tty_ops);
b053bb86 5187
0b2cf5c8
DY
5188 /*
5189 * If we're doing transparent print, we have to do all of the above
5190 * again, separately so we don't get the LD confused about what major
5191 * we are when we get into the dgap_tty_open() routine.
5192 */
dc3cfcd3
DY
5193 brd->print_driver = tty_alloc_driver(MAXPORTS,
5194 TTY_DRIVER_REAL_RAW |
5195 TTY_DRIVER_DYNAMIC_DEV |
5196 TTY_DRIVER_HARDWARE_BREAK);
0b2cf5c8
DY
5197 if (IS_ERR(brd->print_driver)) {
5198 rc = PTR_ERR(brd->print_driver);
5199 goto free_serial_drv;
b053bb86
MH
5200 }
5201
0b2cf5c8
DY
5202 snprintf(brd->print_name, MAXTTYNAMELEN, "pr_dgap_%d_",
5203 brd->boardnum);
5204 brd->print_driver->name = brd->print_name;
5205 brd->print_driver->name_base = 0;
5206 brd->print_driver->major = 0;
5207 brd->print_driver->minor_start = 0;
5208 brd->print_driver->type = TTY_DRIVER_TYPE_SERIAL;
5209 brd->print_driver->subtype = SERIAL_TYPE_NORMAL;
5210 brd->print_driver->init_termios = dgap_default_termios;
5211 brd->print_driver->driver_name = DRVSTR;
b053bb86 5212
0b2cf5c8
DY
5213 /*
5214 * Entry points for driver. Called by the kernel from
5215 * tty_io.c and n_tty.c.
5216 */
5217 tty_set_operations(brd->print_driver, &dgap_tty_ops);
7568f7d3 5218
0b2cf5c8
DY
5219 /* Register tty devices */
5220 rc = tty_register_driver(brd->serial_driver);
5221 if (rc < 0)
5222 goto free_print_drv;
7568f7d3 5223
0b2cf5c8
DY
5224 /* Register Transparent Print devices */
5225 rc = tty_register_driver(brd->print_driver);
5226 if (rc < 0)
5227 goto unregister_serial_drv;
7568f7d3 5228
0b2cf5c8 5229 return 0;
7568f7d3 5230
0b2cf5c8
DY
5231unregister_serial_drv:
5232 tty_unregister_driver(brd->serial_driver);
5233free_print_drv:
5234 put_tty_driver(brd->print_driver);
5235free_serial_drv:
5236 put_tty_driver(brd->serial_driver);
7568f7d3 5237
0b2cf5c8 5238 return rc;
7568f7d3
MH
5239}
5240
0b2cf5c8 5241static void dgap_tty_unregister(struct board_t *brd)
7568f7d3 5242{
0b2cf5c8
DY
5243 tty_unregister_driver(brd->print_driver);
5244 tty_unregister_driver(brd->serial_driver);
5245 put_tty_driver(brd->print_driver);
5246 put_tty_driver(brd->serial_driver);
7568f7d3 5247}
7568f7d3 5248
0b2cf5c8
DY
5249static int dgap_alloc_flipbuf(struct board_t *brd)
5250{
5251 /*
5252 * allocate flip buffer for board.
5253 */
5254 brd->flipbuf = kmalloc(MYFLIPLEN, GFP_KERNEL);
5255 if (!brd->flipbuf)
5256 return -ENOMEM;
7568f7d3 5257
0b2cf5c8
DY
5258 brd->flipflagbuf = kmalloc(MYFLIPLEN, GFP_KERNEL);
5259 if (!brd->flipflagbuf) {
5260 kfree(brd->flipbuf);
5261 return -ENOMEM;
5262 }
434b679b 5263
0b2cf5c8 5264 return 0;
7568f7d3
MH
5265}
5266
0b2cf5c8 5267static void dgap_free_flipbuf(struct board_t *brd)
7568f7d3 5268{
0b2cf5c8
DY
5269 kfree(brd->flipbuf);
5270 kfree(brd->flipflagbuf);
7568f7d3
MH
5271}
5272
3eb14151
MH
5273static struct board_t *dgap_verify_board(struct device *p)
5274{
5275 struct board_t *bd;
5276
5277 if (!p)
5278 return NULL;
5279
5280 bd = dev_get_drvdata(p);
5281 if (!bd || bd->magic != DGAP_BOARD_MAGIC || bd->state != BOARD_READY)
5282 return NULL;
5283
5284 return bd;
5285}
7568f7d3 5286
84e88287
MH
5287static ssize_t dgap_ports_state_show(struct device *p,
5288 struct device_attribute *attr,
5289 char *buf)
7568f7d3
MH
5290{
5291 struct board_t *bd;
5292 int count = 0;
ac2f46c3 5293 unsigned int i;
7568f7d3 5294
3eb14151
MH
5295 bd = dgap_verify_board(p);
5296 if (!bd)
5297 return 0;
7568f7d3
MH
5298
5299 for (i = 0; i < bd->nasync; i++) {
5300 count += snprintf(buf + count, PAGE_SIZE - count,
5301 "%d %s\n", bd->channels[i]->ch_portnum,
5302 bd->channels[i]->ch_open_count ? "Open" : "Closed");
5303 }
5304 return count;
5305}
5306static DEVICE_ATTR(ports_state, S_IRUSR, dgap_ports_state_show, NULL);
5307
84e88287
MH
5308static ssize_t dgap_ports_baud_show(struct device *p,
5309 struct device_attribute *attr,
5310 char *buf)
7568f7d3
MH
5311{
5312 struct board_t *bd;
5313 int count = 0;
ac2f46c3 5314 unsigned int i;
7568f7d3 5315
3eb14151
MH
5316 bd = dgap_verify_board(p);
5317 if (!bd)
5318 return 0;
7568f7d3
MH
5319
5320 for (i = 0; i < bd->nasync; i++) {
84e88287
MH
5321 count += snprintf(buf + count, PAGE_SIZE - count, "%d %d\n",
5322 bd->channels[i]->ch_portnum,
5323 bd->channels[i]->ch_baud_info);
7568f7d3
MH
5324 }
5325 return count;
5326}
5327static DEVICE_ATTR(ports_baud, S_IRUSR, dgap_ports_baud_show, NULL);
5328
84e88287
MH
5329static ssize_t dgap_ports_msignals_show(struct device *p,
5330 struct device_attribute *attr,
5331 char *buf)
7568f7d3
MH
5332{
5333 struct board_t *bd;
5334 int count = 0;
ac2f46c3 5335 unsigned int i;
7568f7d3 5336
3eb14151
MH
5337 bd = dgap_verify_board(p);
5338 if (!bd)
5339 return 0;
7568f7d3
MH
5340
5341 for (i = 0; i < bd->nasync; i++) {
305ec874 5342 if (bd->channels[i]->ch_open_count)
7568f7d3 5343 count += snprintf(buf + count, PAGE_SIZE - count,
84e88287
MH
5344 "%d %s %s %s %s %s %s\n",
5345 bd->channels[i]->ch_portnum,
5346 (bd->channels[i]->ch_mostat &
5347 UART_MCR_RTS) ? "RTS" : "",
5348 (bd->channels[i]->ch_mistat &
5349 UART_MSR_CTS) ? "CTS" : "",
5350 (bd->channels[i]->ch_mostat &
5351 UART_MCR_DTR) ? "DTR" : "",
5352 (bd->channels[i]->ch_mistat &
5353 UART_MSR_DSR) ? "DSR" : "",
5354 (bd->channels[i]->ch_mistat &
5355 UART_MSR_DCD) ? "DCD" : "",
5356 (bd->channels[i]->ch_mistat &
5357 UART_MSR_RI) ? "RI" : "");
305ec874 5358 else
7568f7d3
MH
5359 count += snprintf(buf + count, PAGE_SIZE - count,
5360 "%d\n", bd->channels[i]->ch_portnum);
7568f7d3
MH
5361 }
5362 return count;
5363}
5364static DEVICE_ATTR(ports_msignals, S_IRUSR, dgap_ports_msignals_show, NULL);
5365
84e88287
MH
5366static ssize_t dgap_ports_iflag_show(struct device *p,
5367 struct device_attribute *attr,
5368 char *buf)
7568f7d3
MH
5369{
5370 struct board_t *bd;
5371 int count = 0;
ac2f46c3 5372 unsigned int i;
7568f7d3 5373
3eb14151
MH
5374 bd = dgap_verify_board(p);
5375 if (!bd)
5376 return 0;
7568f7d3 5377
305ec874 5378 for (i = 0; i < bd->nasync; i++)
7568f7d3 5379 count += snprintf(buf + count, PAGE_SIZE - count, "%d %x\n",
84e88287
MH
5380 bd->channels[i]->ch_portnum,
5381 bd->channels[i]->ch_c_iflag);
7568f7d3
MH
5382 return count;
5383}
5384static DEVICE_ATTR(ports_iflag, S_IRUSR, dgap_ports_iflag_show, NULL);
5385
84e88287
MH
5386static ssize_t dgap_ports_cflag_show(struct device *p,
5387 struct device_attribute *attr,
5388 char *buf)
7568f7d3
MH
5389{
5390 struct board_t *bd;
5391 int count = 0;
ac2f46c3 5392 unsigned int i;
7568f7d3 5393
3eb14151
MH
5394 bd = dgap_verify_board(p);
5395 if (!bd)
5396 return 0;
7568f7d3 5397
305ec874 5398 for (i = 0; i < bd->nasync; i++)
7568f7d3 5399 count += snprintf(buf + count, PAGE_SIZE - count, "%d %x\n",
84e88287
MH
5400 bd->channels[i]->ch_portnum,
5401 bd->channels[i]->ch_c_cflag);
7568f7d3
MH
5402 return count;
5403}
5404static DEVICE_ATTR(ports_cflag, S_IRUSR, dgap_ports_cflag_show, NULL);
5405
84e88287
MH
5406static ssize_t dgap_ports_oflag_show(struct device *p,
5407 struct device_attribute *attr,
5408 char *buf)
7568f7d3
MH
5409{
5410 struct board_t *bd;
5411 int count = 0;
ac2f46c3 5412 unsigned int i;
7568f7d3 5413
3eb14151
MH
5414 bd = dgap_verify_board(p);
5415 if (!bd)
5416 return 0;
7568f7d3 5417
305ec874 5418 for (i = 0; i < bd->nasync; i++)
7568f7d3 5419 count += snprintf(buf + count, PAGE_SIZE - count, "%d %x\n",
84e88287
MH
5420 bd->channels[i]->ch_portnum,
5421 bd->channels[i]->ch_c_oflag);
7568f7d3
MH
5422 return count;
5423}
5424static DEVICE_ATTR(ports_oflag, S_IRUSR, dgap_ports_oflag_show, NULL);
5425
84e88287
MH
5426static ssize_t dgap_ports_lflag_show(struct device *p,
5427 struct device_attribute *attr,
5428 char *buf)
7568f7d3
MH
5429{
5430 struct board_t *bd;
5431 int count = 0;
ac2f46c3 5432 unsigned int i;
7568f7d3 5433
3eb14151
MH
5434 bd = dgap_verify_board(p);
5435 if (!bd)
5436 return 0;
7568f7d3 5437
305ec874 5438 for (i = 0; i < bd->nasync; i++)
7568f7d3 5439 count += snprintf(buf + count, PAGE_SIZE - count, "%d %x\n",
84e88287
MH
5440 bd->channels[i]->ch_portnum,
5441 bd->channels[i]->ch_c_lflag);
7568f7d3
MH
5442 return count;
5443}
5444static DEVICE_ATTR(ports_lflag, S_IRUSR, dgap_ports_lflag_show, NULL);
5445
84e88287
MH
5446static ssize_t dgap_ports_digi_flag_show(struct device *p,
5447 struct device_attribute *attr,
5448 char *buf)
7568f7d3
MH
5449{
5450 struct board_t *bd;
5451 int count = 0;
ac2f46c3 5452 unsigned int i;
7568f7d3 5453
3eb14151
MH
5454 bd = dgap_verify_board(p);
5455 if (!bd)
5456 return 0;
7568f7d3 5457
305ec874 5458 for (i = 0; i < bd->nasync; i++)
7568f7d3 5459 count += snprintf(buf + count, PAGE_SIZE - count, "%d %x\n",
84e88287
MH
5460 bd->channels[i]->ch_portnum,
5461 bd->channels[i]->ch_digi.digi_flags);
7568f7d3
MH
5462 return count;
5463}
5464static DEVICE_ATTR(ports_digi_flag, S_IRUSR, dgap_ports_digi_flag_show, NULL);
5465
84e88287
MH
5466static ssize_t dgap_ports_rxcount_show(struct device *p,
5467 struct device_attribute *attr,
5468 char *buf)
7568f7d3
MH
5469{
5470 struct board_t *bd;
5471 int count = 0;
ac2f46c3 5472 unsigned int i;
7568f7d3 5473
3eb14151
MH
5474 bd = dgap_verify_board(p);
5475 if (!bd)
5476 return 0;
7568f7d3 5477
305ec874 5478 for (i = 0; i < bd->nasync; i++)
7568f7d3 5479 count += snprintf(buf + count, PAGE_SIZE - count, "%d %ld\n",
84e88287
MH
5480 bd->channels[i]->ch_portnum,
5481 bd->channels[i]->ch_rxcount);
7568f7d3
MH
5482 return count;
5483}
5484static DEVICE_ATTR(ports_rxcount, S_IRUSR, dgap_ports_rxcount_show, NULL);
5485
84e88287
MH
5486static ssize_t dgap_ports_txcount_show(struct device *p,
5487 struct device_attribute *attr,
5488 char *buf)
7568f7d3
MH
5489{
5490 struct board_t *bd;
5491 int count = 0;
ac2f46c3 5492 unsigned int i;
7568f7d3 5493
3eb14151
MH
5494 bd = dgap_verify_board(p);
5495 if (!bd)
5496 return 0;
7568f7d3 5497
305ec874 5498 for (i = 0; i < bd->nasync; i++)
7568f7d3 5499 count += snprintf(buf + count, PAGE_SIZE - count, "%d %ld\n",
84e88287
MH
5500 bd->channels[i]->ch_portnum,
5501 bd->channels[i]->ch_txcount);
7568f7d3
MH
5502 return count;
5503}
5504static DEVICE_ATTR(ports_txcount, S_IRUSR, dgap_ports_txcount_show, NULL);
5505
0b2cf5c8
DY
5506static ssize_t dgap_tty_state_show(struct device *d,
5507 struct device_attribute *attr,
5508 char *buf)
7568f7d3 5509{
0b2cf5c8
DY
5510 struct board_t *bd;
5511 struct channel_t *ch;
5512 struct un_t *un;
5513
5514 if (!d)
5515 return 0;
5516 un = dev_get_drvdata(d);
5517 if (!un || un->magic != DGAP_UNIT_MAGIC)
5518 return 0;
5519 ch = un->un_ch;
5520 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
5521 return 0;
5522 bd = ch->ch_bd;
5523 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
5524 return 0;
5525 if (bd->state != BOARD_READY)
5526 return 0;
5527
5528 return snprintf(buf, PAGE_SIZE, "%s", un->un_open_count ?
5529 "Open" : "Closed");
5530}
5531static DEVICE_ATTR(state, S_IRUSR, dgap_tty_state_show, NULL);
5532
5533static ssize_t dgap_tty_baud_show(struct device *d,
5534 struct device_attribute *attr,
5535 char *buf)
5536{
5537 struct board_t *bd;
5538 struct channel_t *ch;
5539 struct un_t *un;
5540
5541 if (!d)
5542 return 0;
5543 un = dev_get_drvdata(d);
5544 if (!un || un->magic != DGAP_UNIT_MAGIC)
5545 return 0;
5546 ch = un->un_ch;
5547 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
5548 return 0;
5549 bd = ch->ch_bd;
5550 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
5551 return 0;
5552 if (bd->state != BOARD_READY)
5553 return 0;
5554
5555 return snprintf(buf, PAGE_SIZE, "%d\n", ch->ch_baud_info);
5556}
5557static DEVICE_ATTR(baud, S_IRUSR, dgap_tty_baud_show, NULL);
5558
5559static ssize_t dgap_tty_msignals_show(struct device *d,
5560 struct device_attribute *attr,
5561 char *buf)
5562{
5563 struct board_t *bd;
5564 struct channel_t *ch;
5565 struct un_t *un;
5566
5567 if (!d)
5568 return 0;
5569 un = dev_get_drvdata(d);
5570 if (!un || un->magic != DGAP_UNIT_MAGIC)
5571 return 0;
5572 ch = un->un_ch;
5573 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
5574 return 0;
5575 bd = ch->ch_bd;
5576 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
5577 return 0;
5578 if (bd->state != BOARD_READY)
5579 return 0;
5580
5581 if (ch->ch_open_count) {
5582 return snprintf(buf, PAGE_SIZE, "%s %s %s %s %s %s\n",
5583 (ch->ch_mostat & UART_MCR_RTS) ? "RTS" : "",
5584 (ch->ch_mistat & UART_MSR_CTS) ? "CTS" : "",
5585 (ch->ch_mostat & UART_MCR_DTR) ? "DTR" : "",
5586 (ch->ch_mistat & UART_MSR_DSR) ? "DSR" : "",
5587 (ch->ch_mistat & UART_MSR_DCD) ? "DCD" : "",
5588 (ch->ch_mistat & UART_MSR_RI) ? "RI" : "");
5589 }
5590 return 0;
5591}
5592static DEVICE_ATTR(msignals, S_IRUSR, dgap_tty_msignals_show, NULL);
5593
5594static ssize_t dgap_tty_iflag_show(struct device *d,
5595 struct device_attribute *attr,
5596 char *buf)
5597{
5598 struct board_t *bd;
5599 struct channel_t *ch;
5600 struct un_t *un;
5601
5602 if (!d)
5603 return 0;
5604 un = dev_get_drvdata(d);
5605 if (!un || un->magic != DGAP_UNIT_MAGIC)
5606 return 0;
5607 ch = un->un_ch;
5608 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
5609 return 0;
5610 bd = ch->ch_bd;
5611 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
5612 return 0;
5613 if (bd->state != BOARD_READY)
5614 return 0;
5615
5616 return snprintf(buf, PAGE_SIZE, "%x\n", ch->ch_c_iflag);
5617}
5618static DEVICE_ATTR(iflag, S_IRUSR, dgap_tty_iflag_show, NULL);
5619
5620static ssize_t dgap_tty_cflag_show(struct device *d,
5621 struct device_attribute *attr,
5622 char *buf)
5623{
5624 struct board_t *bd;
5625 struct channel_t *ch;
5626 struct un_t *un;
5627
5628 if (!d)
5629 return 0;
5630 un = dev_get_drvdata(d);
5631 if (!un || un->magic != DGAP_UNIT_MAGIC)
5632 return 0;
5633 ch = un->un_ch;
5634 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
5635 return 0;
5636 bd = ch->ch_bd;
5637 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
5638 return 0;
5639 if (bd->state != BOARD_READY)
5640 return 0;
5641
5642 return snprintf(buf, PAGE_SIZE, "%x\n", ch->ch_c_cflag);
5643}
5644static DEVICE_ATTR(cflag, S_IRUSR, dgap_tty_cflag_show, NULL);
5645
5646static ssize_t dgap_tty_oflag_show(struct device *d,
5647 struct device_attribute *attr,
5648 char *buf)
5649{
5650 struct board_t *bd;
5651 struct channel_t *ch;
5652 struct un_t *un;
5653
5654 if (!d)
5655 return 0;
5656 un = dev_get_drvdata(d);
5657 if (!un || un->magic != DGAP_UNIT_MAGIC)
5658 return 0;
5659 ch = un->un_ch;
5660 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
5661 return 0;
5662 bd = ch->ch_bd;
5663 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
5664 return 0;
5665 if (bd->state != BOARD_READY)
5666 return 0;
5667
5668 return snprintf(buf, PAGE_SIZE, "%x\n", ch->ch_c_oflag);
5669}
5670static DEVICE_ATTR(oflag, S_IRUSR, dgap_tty_oflag_show, NULL);
5671
5672static ssize_t dgap_tty_lflag_show(struct device *d,
5673 struct device_attribute *attr,
5674 char *buf)
5675{
5676 struct board_t *bd;
5677 struct channel_t *ch;
5678 struct un_t *un;
5679
5680 if (!d)
5681 return 0;
5682 un = dev_get_drvdata(d);
5683 if (!un || un->magic != DGAP_UNIT_MAGIC)
5684 return 0;
5685 ch = un->un_ch;
5686 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
5687 return 0;
5688 bd = ch->ch_bd;
5689 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
5690 return 0;
5691 if (bd->state != BOARD_READY)
5692 return 0;
5693
5694 return snprintf(buf, PAGE_SIZE, "%x\n", ch->ch_c_lflag);
7568f7d3 5695}
0b2cf5c8
DY
5696static DEVICE_ATTR(lflag, S_IRUSR, dgap_tty_lflag_show, NULL);
5697
5698static ssize_t dgap_tty_digi_flag_show(struct device *d,
5699 struct device_attribute *attr,
5700 char *buf)
5701{
5702 struct board_t *bd;
5703 struct channel_t *ch;
5704 struct un_t *un;
5705
5706 if (!d)
5707 return 0;
5708 un = dev_get_drvdata(d);
5709 if (!un || un->magic != DGAP_UNIT_MAGIC)
5710 return 0;
5711 ch = un->un_ch;
5712 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
5713 return 0;
5714 bd = ch->ch_bd;
5715 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
5716 return 0;
5717 if (bd->state != BOARD_READY)
5718 return 0;
7568f7d3 5719
0b2cf5c8 5720 return snprintf(buf, PAGE_SIZE, "%x\n", ch->ch_digi.digi_flags);
7568f7d3 5721}
0b2cf5c8 5722static DEVICE_ATTR(digi_flag, S_IRUSR, dgap_tty_digi_flag_show, NULL);
7568f7d3 5723
0b2cf5c8
DY
5724static ssize_t dgap_tty_rxcount_show(struct device *d,
5725 struct device_attribute *attr,
5726 char *buf)
7568f7d3
MH
5727{
5728 struct board_t *bd;
5729 struct channel_t *ch;
5730 struct un_t *un;
5731
5732 if (!d)
cf42c34d 5733 return 0;
7568f7d3
MH
5734 un = dev_get_drvdata(d);
5735 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 5736 return 0;
7568f7d3
MH
5737 ch = un->un_ch;
5738 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 5739 return 0;
7568f7d3
MH
5740 bd = ch->ch_bd;
5741 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 5742 return 0;
7568f7d3 5743 if (bd->state != BOARD_READY)
cf42c34d 5744 return 0;
7568f7d3 5745
0b2cf5c8 5746 return snprintf(buf, PAGE_SIZE, "%ld\n", ch->ch_rxcount);
7568f7d3 5747}
0b2cf5c8 5748static DEVICE_ATTR(rxcount, S_IRUSR, dgap_tty_rxcount_show, NULL);
7568f7d3 5749
0b2cf5c8
DY
5750static ssize_t dgap_tty_txcount_show(struct device *d,
5751 struct device_attribute *attr,
5752 char *buf)
7568f7d3
MH
5753{
5754 struct board_t *bd;
5755 struct channel_t *ch;
5756 struct un_t *un;
5757
5758 if (!d)
cf42c34d 5759 return 0;
7568f7d3
MH
5760 un = dev_get_drvdata(d);
5761 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 5762 return 0;
7568f7d3
MH
5763 ch = un->un_ch;
5764 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 5765 return 0;
7568f7d3
MH
5766 bd = ch->ch_bd;
5767 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 5768 return 0;
7568f7d3 5769 if (bd->state != BOARD_READY)
cf42c34d 5770 return 0;
7568f7d3 5771
0b2cf5c8 5772 return snprintf(buf, PAGE_SIZE, "%ld\n", ch->ch_txcount);
7568f7d3 5773}
0b2cf5c8 5774static DEVICE_ATTR(txcount, S_IRUSR, dgap_tty_txcount_show, NULL);
7568f7d3 5775
0b2cf5c8
DY
5776static ssize_t dgap_tty_name_show(struct device *d,
5777 struct device_attribute *attr,
5778 char *buf)
7568f7d3
MH
5779{
5780 struct board_t *bd;
5781 struct channel_t *ch;
5782 struct un_t *un;
0b2cf5c8
DY
5783 int cn;
5784 int bn;
5785 struct cnode *cptr;
5786 int found = FALSE;
5787 int ncount = 0;
5788 int starto = 0;
5789 int i;
7568f7d3
MH
5790
5791 if (!d)
cf42c34d 5792 return 0;
7568f7d3
MH
5793 un = dev_get_drvdata(d);
5794 if (!un || un->magic != DGAP_UNIT_MAGIC)
cf42c34d 5795 return 0;
7568f7d3
MH
5796 ch = un->un_ch;
5797 if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
cf42c34d 5798 return 0;
7568f7d3
MH
5799 bd = ch->ch_bd;
5800 if (!bd || bd->magic != DGAP_BOARD_MAGIC)
cf42c34d 5801 return 0;
7568f7d3 5802 if (bd->state != BOARD_READY)
cf42c34d 5803 return 0;
7568f7d3 5804
0b2cf5c8
DY
5805 bn = bd->boardnum;
5806 cn = ch->ch_portnum;
5807
5808 for (cptr = bd->bd_config; cptr; cptr = cptr->next) {
0b2cf5c8
DY
5809 if ((cptr->type == BNODE) &&
5810 ((cptr->u.board.type == APORT2_920P) ||
5811 (cptr->u.board.type == APORT4_920P) ||
5812 (cptr->u.board.type == APORT8_920P) ||
5813 (cptr->u.board.type == PAPORT4) ||
5814 (cptr->u.board.type == PAPORT8))) {
0b2cf5c8
DY
5815 found = TRUE;
5816 if (cptr->u.board.v_start)
5817 starto = cptr->u.board.start;
5818 else
5819 starto = 1;
5820 }
5821
5822 if (cptr->type == TNODE && found == TRUE) {
5823 char *ptr1;
5824
5825 if (strstr(cptr->u.ttyname, "tty")) {
5826 ptr1 = cptr->u.ttyname;
5827 ptr1 += 3;
5828 } else
5829 ptr1 = cptr->u.ttyname;
5830
5831 for (i = 0; i < dgap_config_get_num_prts(bd); i++) {
5832 if (cn != i)
5833 continue;
5834
5835 return snprintf(buf, PAGE_SIZE, "%s%s%02d\n",
5836 (un->un_type == DGAP_PRINT) ?
5837 "pr" : "tty",
5838 ptr1, i + starto);
5839 }
5840 }
5841
5842 if (cptr->type == CNODE) {
0b2cf5c8
DY
5843 for (i = 0; i < cptr->u.conc.nport; i++) {
5844 if (cn != (i + ncount))
5845 continue;
5846
5847 return snprintf(buf, PAGE_SIZE, "%s%s%02ld\n",
5848 (un->un_type == DGAP_PRINT) ?
5849 "pr" : "tty",
5850 cptr->u.conc.id,
5851 i + (cptr->u.conc.v_start ?
5852 cptr->u.conc.start : 1));
5853 }
5854
5855 ncount += cptr->u.conc.nport;
5856 }
5857
5858 if (cptr->type == MNODE) {
0b2cf5c8
DY
5859 for (i = 0; i < cptr->u.module.nport; i++) {
5860 if (cn != (i + ncount))
5861 continue;
5862
5863 return snprintf(buf, PAGE_SIZE, "%s%s%02ld\n",
5864 (un->un_type == DGAP_PRINT) ?
5865 "pr" : "tty",
5866 cptr->u.module.id,
5867 i + (cptr->u.module.v_start ?
5868 cptr->u.module.start : 1));
5869 }
5870
5871 ncount += cptr->u.module.nport;
5872 }
7568f7d3 5873 }
0b2cf5c8
DY
5874
5875 return snprintf(buf, PAGE_SIZE, "%s_dgap_%d_%d\n",
5876 (un->un_type == DGAP_PRINT) ? "pr" : "tty", bn, cn);
5877}
5878static DEVICE_ATTR(custom_name, S_IRUSR, dgap_tty_name_show, NULL);
5879
5880static struct attribute *dgap_sysfs_tty_entries[] = {
5881 &dev_attr_state.attr,
5882 &dev_attr_baud.attr,
5883 &dev_attr_msignals.attr,
5884 &dev_attr_iflag.attr,
5885 &dev_attr_cflag.attr,
5886 &dev_attr_oflag.attr,
5887 &dev_attr_lflag.attr,
5888 &dev_attr_digi_flag.attr,
5889 &dev_attr_rxcount.attr,
5890 &dev_attr_txcount.attr,
5891 &dev_attr_custom_name.attr,
5892 NULL
5893};
5894
5895
5896/* this function creates the sys files that will export each signal status
5897 * to sysfs each value will be put in a separate filename
5898 */
5899static void dgap_create_ports_sysfiles(struct board_t *bd)
5900{
5901 dev_set_drvdata(&bd->pdev->dev, bd);
44209c93
IC
5902 device_create_file(&bd->pdev->dev, &dev_attr_ports_state);
5903 device_create_file(&bd->pdev->dev, &dev_attr_ports_baud);
5904 device_create_file(&bd->pdev->dev, &dev_attr_ports_msignals);
5905 device_create_file(&bd->pdev->dev, &dev_attr_ports_iflag);
5906 device_create_file(&bd->pdev->dev, &dev_attr_ports_cflag);
5907 device_create_file(&bd->pdev->dev, &dev_attr_ports_oflag);
5908 device_create_file(&bd->pdev->dev, &dev_attr_ports_lflag);
5909 device_create_file(&bd->pdev->dev, &dev_attr_ports_digi_flag);
5910 device_create_file(&bd->pdev->dev, &dev_attr_ports_rxcount);
5911 device_create_file(&bd->pdev->dev, &dev_attr_ports_txcount);
0b2cf5c8
DY
5912}
5913
5914/* removes all the sys files created for that port */
5915static void dgap_remove_ports_sysfiles(struct board_t *bd)
5916{
44209c93
IC
5917 device_remove_file(&bd->pdev->dev, &dev_attr_ports_state);
5918 device_remove_file(&bd->pdev->dev, &dev_attr_ports_baud);
5919 device_remove_file(&bd->pdev->dev, &dev_attr_ports_msignals);
5920 device_remove_file(&bd->pdev->dev, &dev_attr_ports_iflag);
5921 device_remove_file(&bd->pdev->dev, &dev_attr_ports_cflag);
5922 device_remove_file(&bd->pdev->dev, &dev_attr_ports_oflag);
5923 device_remove_file(&bd->pdev->dev, &dev_attr_ports_lflag);
5924 device_remove_file(&bd->pdev->dev, &dev_attr_ports_digi_flag);
5925 device_remove_file(&bd->pdev->dev, &dev_attr_ports_rxcount);
5926 device_remove_file(&bd->pdev->dev, &dev_attr_ports_txcount);
0b2cf5c8
DY
5927}
5928
5929/*
5930 * Copies the BIOS code from the user to the board,
5931 * and starts the BIOS running.
5932 */
5933static void dgap_do_bios_load(struct board_t *brd, const u8 *ubios, int len)
5934{
5935 u8 __iomem *addr;
5936 uint offset;
5937 unsigned int i;
5938
5939 if (!brd || (brd->magic != DGAP_BOARD_MAGIC) || !brd->re_map_membase)
5940 return;
5941
5942 addr = brd->re_map_membase;
5943
5944 /*
5945 * clear POST area
5946 */
5947 for (i = 0; i < 16; i++)
5948 writeb(0, addr + POSTAREA + i);
5949
5950 /*
5951 * Download bios
5952 */
5953 offset = 0x1000;
5954 memcpy_toio(addr + offset, ubios, len);
5955
5956 writel(0x0bf00401, addr);
5957 writel(0, (addr + 4));
5958
5959 /* Clear the reset, and change states. */
5960 writeb(FEPCLR, brd->re_map_port);
5961}
5962
5963/*
5964 * Checks to see if the BIOS completed running on the card.
5965 */
5966static int dgap_test_bios(struct board_t *brd)
5967{
5968 u8 __iomem *addr;
5969 u16 word;
5970 u16 err1;
5971 u16 err2;
5972
5973 if (!brd || (brd->magic != DGAP_BOARD_MAGIC) || !brd->re_map_membase)
5974 return -EINVAL;
5975
5976 addr = brd->re_map_membase;
5977 word = readw(addr + POSTAREA);
5978
5979 /*
5980 * It can take 5-6 seconds for a board to
5981 * pass the bios self test and post results.
5982 * Give it 10 seconds.
5983 */
5984 brd->wait_for_bios = 0;
5985 while (brd->wait_for_bios < 1000) {
5986 /* Check to see if BIOS thinks board is good. (GD). */
18122553 5987 if (word == *(u16 *)"GD")
0b2cf5c8
DY
5988 return 0;
5989 msleep_interruptible(10);
5990 brd->wait_for_bios++;
5991 word = readw(addr + POSTAREA);
5992 }
5993
5994 /* Gave up on board after too long of time taken */
5995 err1 = readw(addr + SEQUENCE);
5996 err2 = readw(addr + ERROR);
5997 dev_warn(&brd->pdev->dev, "%s failed diagnostics. Error #(%x,%x).\n",
629c7349 5998 brd->name, err1, err2);
0b2cf5c8
DY
5999 brd->state = BOARD_FAILED;
6000 brd->dpastatus = BD_NOBIOS;
6001
6002 return -EIO;
7568f7d3 6003}
7568f7d3 6004
0b2cf5c8
DY
6005/*
6006 * Copies the FEP code from the user to the board,
6007 * and starts the FEP running.
6008 */
6009static void dgap_do_fep_load(struct board_t *brd, const u8 *ufep, int len)
7568f7d3 6010{
0b2cf5c8
DY
6011 u8 __iomem *addr;
6012 uint offset;
7568f7d3 6013
0b2cf5c8
DY
6014 if (!brd || (brd->magic != DGAP_BOARD_MAGIC) || !brd->re_map_membase)
6015 return;
7568f7d3 6016
0b2cf5c8 6017 addr = brd->re_map_membase;
7568f7d3 6018
0b2cf5c8
DY
6019 /*
6020 * Download FEP
6021 */
6022 offset = 0x1000;
6023 memcpy_toio(addr + offset, ufep, len);
7568f7d3 6024
0b2cf5c8
DY
6025 /*
6026 * If board is a concentrator product, we need to give
6027 * it its config string describing how the concentrators look.
6028 */
6029 if ((brd->type == PCX) || (brd->type == PEPC)) {
6030 u8 string[100];
6031 u8 __iomem *config;
6032 u8 *xconfig;
6033 unsigned int i = 0;
7568f7d3 6034
0b2cf5c8 6035 xconfig = dgap_create_config_string(brd, string);
7568f7d3 6036
0b2cf5c8
DY
6037 /* Write string to board memory */
6038 config = addr + CONFIG;
6039 for (; i < CONFIGSIZE; i++, config++, xconfig++) {
6040 writeb(*xconfig, config);
6041 if ((*xconfig & 0xff) == 0xff)
6042 break;
6043 }
6044 }
7568f7d3 6045
0b2cf5c8
DY
6046 writel(0xbfc01004, (addr + 0xc34));
6047 writel(0x3, (addr + 0xc30));
7568f7d3 6048}
7568f7d3 6049
0b2cf5c8
DY
6050/*
6051 * Waits for the FEP to report thats its ready for us to use.
6052 */
6053static int dgap_test_fep(struct board_t *brd)
7568f7d3 6054{
0b2cf5c8
DY
6055 u8 __iomem *addr;
6056 u16 word;
6057 u16 err1;
6058 u16 err2;
7568f7d3 6059
0b2cf5c8
DY
6060 if (!brd || (brd->magic != DGAP_BOARD_MAGIC) || !brd->re_map_membase)
6061 return -EINVAL;
7568f7d3 6062
0b2cf5c8
DY
6063 addr = brd->re_map_membase;
6064 word = readw(addr + FEPSTAT);
7568f7d3 6065
0b2cf5c8
DY
6066 /*
6067 * It can take 2-3 seconds for the FEP to
6068 * be up and running. Give it 5 secs.
6069 */
6070 brd->wait_for_fep = 0;
6071 while (brd->wait_for_fep < 500) {
6072 /* Check to see if FEP is up and running now. */
18122553 6073 if (word == *(u16 *)"OS") {
0b2cf5c8
DY
6074 /*
6075 * Check to see if the board can support FEP5+ commands.
6076 */
6077 word = readw(addr + FEP5_PLUS);
18122553 6078 if (word == *(u16 *)"5A")
0b2cf5c8 6079 brd->bd_flags |= BD_FEP5PLUS;
7568f7d3 6080
0b2cf5c8
DY
6081 return 0;
6082 }
6083 msleep_interruptible(10);
6084 brd->wait_for_fep++;
6085 word = readw(addr + FEPSTAT);
6086 }
7568f7d3 6087
0b2cf5c8
DY
6088 /* Gave up on board after too long of time taken */
6089 err1 = readw(addr + SEQUENCE);
6090 err2 = readw(addr + ERROR);
6091 dev_warn(&brd->pdev->dev,
6092 "FEPOS for %s not functioning. Error #(%x,%x).\n",
6093 brd->name, err1, err2);
6094 brd->state = BOARD_FAILED;
6095 brd->dpastatus = BD_NOFEP;
6096
6097 return -EIO;
7568f7d3 6098}
7568f7d3 6099
0b2cf5c8
DY
6100/*
6101 * Physically forces the FEP5 card to reset itself.
6102 */
6103static void dgap_do_reset_board(struct board_t *brd)
7568f7d3 6104{
0b2cf5c8
DY
6105 u8 check;
6106 u32 check1;
6107 u32 check2;
6108 unsigned int i;
7568f7d3 6109
0b2cf5c8
DY
6110 if (!brd || (brd->magic != DGAP_BOARD_MAGIC) ||
6111 !brd->re_map_membase || !brd->re_map_port)
6112 return;
7568f7d3 6113
0b2cf5c8
DY
6114 /* FEPRST does not vary among supported boards */
6115 writeb(FEPRST, brd->re_map_port);
6116
6117 for (i = 0; i <= 1000; i++) {
6118 check = readb(brd->re_map_port) & 0xe;
6119 if (check == FEPRST)
6120 break;
6121 udelay(10);
0b2cf5c8
DY
6122 }
6123 if (i > 1000) {
6124 dev_warn(&brd->pdev->dev,
6125 "dgap: Board not resetting... Failing board.\n");
6126 brd->state = BOARD_FAILED;
6127 brd->dpastatus = BD_NOFEP;
6128 return;
6129 }
6130
6131 /*
6132 * Make sure there really is memory out there.
6133 */
6134 writel(0xa55a3cc3, (brd->re_map_membase + LOWMEM));
6135 writel(0x5aa5c33c, (brd->re_map_membase + HIGHMEM));
6136 check1 = readl(brd->re_map_membase + LOWMEM);
6137 check2 = readl(brd->re_map_membase + HIGHMEM);
6138
6139 if ((check1 != 0xa55a3cc3) || (check2 != 0x5aa5c33c)) {
6140 dev_warn(&brd->pdev->dev,
6141 "No memory at %p for board.\n",
6142 brd->re_map_membase);
6143 brd->state = BOARD_FAILED;
6144 brd->dpastatus = BD_NOFEP;
6145 return;
6146 }
7568f7d3 6147}
7568f7d3 6148
0b2cf5c8
DY
6149#ifdef DIGI_CONCENTRATORS_SUPPORTED
6150/*
6151 * Sends a concentrator image into the FEP5 board.
6152 */
6153static void dgap_do_conc_load(struct board_t *brd, u8 *uaddr, int len)
7568f7d3 6154{
0b2cf5c8
DY
6155 char __iomem *vaddr;
6156 u16 offset;
6157 struct downld_t *to_dp;
7568f7d3 6158
0b2cf5c8
DY
6159 if (!brd || (brd->magic != DGAP_BOARD_MAGIC) || !brd->re_map_membase)
6160 return;
7568f7d3 6161
0b2cf5c8
DY
6162 vaddr = brd->re_map_membase;
6163
18122553
IC
6164 offset = readw((u16 *)(vaddr + DOWNREQ));
6165 to_dp = (struct downld_t *)(vaddr + (int)offset);
0b2cf5c8
DY
6166 memcpy_toio(to_dp, uaddr, len);
6167
6168 /* Tell card we have data for it */
6169 writew(0, vaddr + (DOWNREQ));
6170
6171 brd->conc_dl_status = NO_PENDING_CONCENTRATOR_REQUESTS;
7568f7d3 6172}
0b2cf5c8 6173#endif
7568f7d3 6174
0b2cf5c8
DY
6175#define EXPANSION_ROM_SIZE (64 * 1024)
6176#define FEP5_ROM_MAGIC (0xFEFFFFFF)
6177
6178static void dgap_get_vpd(struct board_t *brd)
7568f7d3 6179{
0b2cf5c8
DY
6180 u32 magic;
6181 u32 base_offset;
6182 u16 rom_offset;
6183 u16 vpd_offset;
6184 u16 image_length;
6185 u16 i;
6186 u8 byte1;
6187 u8 byte2;
7568f7d3 6188
0b2cf5c8
DY
6189 /*
6190 * Poke the magic number at the PCI Rom Address location.
6191 * If VPD is supported, the value read from that address
6192 * will be non-zero.
6193 */
6194 magic = FEP5_ROM_MAGIC;
6195 pci_write_config_dword(brd->pdev, PCI_ROM_ADDRESS, magic);
6196 pci_read_config_dword(brd->pdev, PCI_ROM_ADDRESS, &magic);
7568f7d3 6197
0b2cf5c8
DY
6198 /* VPD not supported, bail */
6199 if (!magic)
6200 return;
7568f7d3 6201
0b2cf5c8
DY
6202 /*
6203 * To get to the OTPROM memory, we have to send the boards base
6204 * address or'ed with 1 into the PCI Rom Address location.
6205 */
6206 magic = brd->membase | 0x01;
6207 pci_write_config_dword(brd->pdev, PCI_ROM_ADDRESS, magic);
6208 pci_read_config_dword(brd->pdev, PCI_ROM_ADDRESS, &magic);
7568f7d3 6209
0b2cf5c8
DY
6210 byte1 = readb(brd->re_map_membase);
6211 byte2 = readb(brd->re_map_membase + 1);
7568f7d3 6212
0b2cf5c8
DY
6213 /*
6214 * If the board correctly swapped to the OTPROM memory,
6215 * the first 2 bytes (header) should be 0x55, 0xAA
6216 */
6217 if (byte1 == 0x55 && byte2 == 0xAA) {
0b2cf5c8 6218 base_offset = 0;
96045db8 6219
0b2cf5c8
DY
6220 /*
6221 * We have to run through all the OTPROM memory looking
6222 * for the VPD offset.
6223 */
6224 while (base_offset <= EXPANSION_ROM_SIZE) {
0b2cf5c8
DY
6225 /*
6226 * Lots of magic numbers here.
6227 *
6228 * The VPD offset is located inside the ROM Data
6229 * Structure.
6230 *
6231 * We also have to remember the length of each
6232 * ROM Data Structure, so we can "hop" to the next
6233 * entry if the VPD isn't in the current
6234 * ROM Data Structure.
6235 */
6236 rom_offset = readw(brd->re_map_membase +
6237 base_offset + 0x18);
6238 image_length = readw(brd->re_map_membase +
6239 rom_offset + 0x10) * 512;
6240 vpd_offset = readw(brd->re_map_membase +
6241 rom_offset + 0x08);
bbfbe832 6242
0b2cf5c8
DY
6243 /* Found the VPD entry */
6244 if (vpd_offset)
6245 break;
6246
6247 /* We didn't find a VPD entry, go to next ROM entry. */
6248 base_offset += image_length;
6249
6250 byte1 = readb(brd->re_map_membase + base_offset);
6251 byte2 = readb(brd->re_map_membase + base_offset + 1);
6252
6253 /*
6254 * If the new ROM offset doesn't have 0x55, 0xAA
6255 * as its header, we have run out of ROM.
6256 */
6257 if (byte1 != 0x55 || byte2 != 0xAA)
6258 break;
6259 }
6260
6261 /*
6262 * If we have a VPD offset, then mark the board
6263 * as having a valid VPD, and copy VPDSIZE (512) bytes of
6264 * that VPD to the buffer we have in our board structure.
6265 */
6266 if (vpd_offset) {
6267 brd->bd_flags |= BD_HAS_VPD;
6268 for (i = 0; i < VPDSIZE; i++) {
6269 brd->vpd[i] = readb(brd->re_map_membase +
6270 vpd_offset + i);
7568f7d3
MH
6271 }
6272 }
0b2cf5c8 6273 }
7568f7d3 6274
0b2cf5c8
DY
6275 /*
6276 * We MUST poke the magic number at the PCI Rom Address location again.
6277 * This makes the card report the regular board memory back to us,
6278 * rather than the OTPROM memory.
6279 */
6280 magic = FEP5_ROM_MAGIC;
6281 pci_write_config_dword(brd->pdev, PCI_ROM_ADDRESS, magic);
6282}
7568f7d3 6283
7568f7d3 6284
0b2cf5c8
DY
6285static ssize_t dgap_driver_version_show(struct device_driver *ddp, char *buf)
6286{
6287 return snprintf(buf, PAGE_SIZE, "%s\n", DG_PART);
6288}
6289static DRIVER_ATTR(version, S_IRUSR, dgap_driver_version_show, NULL);
7568f7d3 6290
7568f7d3 6291
0b2cf5c8
DY
6292static ssize_t dgap_driver_boards_show(struct device_driver *ddp, char *buf)
6293{
6294 return snprintf(buf, PAGE_SIZE, "%d\n", dgap_numboards);
6295}
6296static DRIVER_ATTR(boards, S_IRUSR, dgap_driver_boards_show, NULL);
7568f7d3 6297
bbfbe832 6298
0b2cf5c8
DY
6299static ssize_t dgap_driver_maxboards_show(struct device_driver *ddp, char *buf)
6300{
6301 return snprintf(buf, PAGE_SIZE, "%d\n", MAXBOARDS);
6302}
6303static DRIVER_ATTR(maxboards, S_IRUSR, dgap_driver_maxboards_show, NULL);
6304
6305
6306static ssize_t dgap_driver_pollcounter_show(struct device_driver *ddp,
6307 char *buf)
6308{
6309 return snprintf(buf, PAGE_SIZE, "%ld\n", dgap_poll_counter);
6310}
6311static DRIVER_ATTR(pollcounter, S_IRUSR, dgap_driver_pollcounter_show, NULL);
6312
6313static ssize_t dgap_driver_pollrate_show(struct device_driver *ddp, char *buf)
6314{
6315 return snprintf(buf, PAGE_SIZE, "%dms\n", dgap_poll_tick);
6316}
6317
6318static ssize_t dgap_driver_pollrate_store(struct device_driver *ddp,
6319 const char *buf, size_t count)
6320{
6321 if (sscanf(buf, "%d\n", &dgap_poll_tick) != 1)
6322 return -EINVAL;
6323 return count;
6324}
6325static DRIVER_ATTR(pollrate, (S_IRUSR | S_IWUSR), dgap_driver_pollrate_show,
6326 dgap_driver_pollrate_store);
7568f7d3 6327
7568f7d3 6328
0b2cf5c8
DY
6329static int dgap_create_driver_sysfiles(struct pci_driver *dgap_driver)
6330{
6331 int rc = 0;
6332 struct device_driver *driverfs = &dgap_driver->driver;
7568f7d3 6333
0b2cf5c8
DY
6334 rc |= driver_create_file(driverfs, &driver_attr_version);
6335 rc |= driver_create_file(driverfs, &driver_attr_boards);
6336 rc |= driver_create_file(driverfs, &driver_attr_maxboards);
6337 rc |= driver_create_file(driverfs, &driver_attr_pollrate);
6338 rc |= driver_create_file(driverfs, &driver_attr_pollcounter);
6339
6340 return rc;
7568f7d3 6341}
7568f7d3 6342
0b2cf5c8
DY
6343static void dgap_remove_driver_sysfiles(struct pci_driver *dgap_driver)
6344{
6345 struct device_driver *driverfs = &dgap_driver->driver;
6346
6347 driver_remove_file(driverfs, &driver_attr_version);
6348 driver_remove_file(driverfs, &driver_attr_boards);
6349 driver_remove_file(driverfs, &driver_attr_maxboards);
6350 driver_remove_file(driverfs, &driver_attr_pollrate);
6351 driver_remove_file(driverfs, &driver_attr_pollcounter);
6352}
7568f7d3 6353
7568f7d3
MH
6354static struct attribute_group dgap_tty_attribute_group = {
6355 .name = NULL,
6356 .attrs = dgap_sysfs_tty_entries,
6357};
6358
fe0ef8e6 6359static void dgap_create_tty_sysfs(struct un_t *un, struct device *c)
7568f7d3
MH
6360{
6361 int ret;
6362
6363 ret = sysfs_create_group(&c->kobj, &dgap_tty_attribute_group);
54794d19 6364 if (ret)
7568f7d3 6365 return;
7568f7d3
MH
6366
6367 dev_set_drvdata(c, un);
7568f7d3
MH
6368}
6369
fe0ef8e6 6370static void dgap_remove_tty_sysfs(struct device *c)
7568f7d3
MH
6371{
6372 sysfs_remove_group(&c->kobj, &dgap_tty_attribute_group);
6373}
69edaa21
MH
6374
6375/*
0b2cf5c8 6376 * Create pr and tty device entries
69edaa21 6377 */
0b2cf5c8 6378static int dgap_tty_register_ports(struct board_t *brd)
69edaa21 6379{
0b2cf5c8
DY
6380 struct channel_t *ch;
6381 int i;
6382 int ret;
69edaa21 6383
0b2cf5c8
DY
6384 brd->serial_ports = kcalloc(brd->nasync, sizeof(*brd->serial_ports),
6385 GFP_KERNEL);
6386 if (!brd->serial_ports)
6387 return -ENOMEM;
69edaa21 6388
0b2cf5c8
DY
6389 brd->printer_ports = kcalloc(brd->nasync, sizeof(*brd->printer_ports),
6390 GFP_KERNEL);
6391 if (!brd->printer_ports) {
6392 ret = -ENOMEM;
6393 goto free_serial_ports;
69edaa21
MH
6394 }
6395
0b2cf5c8
DY
6396 for (i = 0; i < brd->nasync; i++) {
6397 tty_port_init(&brd->serial_ports[i]);
6398 tty_port_init(&brd->printer_ports[i]);
6399 }
69edaa21 6400
0b2cf5c8
DY
6401 ch = brd->channels[0];
6402 for (i = 0; i < brd->nasync; i++, ch = brd->channels[i]) {
0b2cf5c8 6403 struct device *classp;
69edaa21 6404
0b2cf5c8
DY
6405 classp = tty_port_register_device(&brd->serial_ports[i],
6406 brd->serial_driver,
6407 i, NULL);
69edaa21 6408
0b2cf5c8
DY
6409 if (IS_ERR(classp)) {
6410 ret = PTR_ERR(classp);
6411 goto unregister_ttys;
6412 }
69edaa21 6413
0b2cf5c8
DY
6414 dgap_create_tty_sysfs(&ch->ch_tun, classp);
6415 ch->ch_tun.un_sysfs = classp;
69edaa21 6416
0b2cf5c8
DY
6417 classp = tty_port_register_device(&brd->printer_ports[i],
6418 brd->print_driver,
6419 i, NULL);
69edaa21 6420
0b2cf5c8
DY
6421 if (IS_ERR(classp)) {
6422 ret = PTR_ERR(classp);
6423 goto unregister_ttys;
6424 }
69edaa21 6425
0b2cf5c8
DY
6426 dgap_create_tty_sysfs(&ch->ch_pun, classp);
6427 ch->ch_pun.un_sysfs = classp;
6428 }
6429 dgap_create_ports_sysfiles(brd);
69edaa21 6430
0b2cf5c8 6431 return 0;
69edaa21 6432
0b2cf5c8
DY
6433unregister_ttys:
6434 while (i >= 0) {
6435 ch = brd->channels[i];
6436 if (ch->ch_tun.un_sysfs) {
6437 dgap_remove_tty_sysfs(ch->ch_tun.un_sysfs);
6438 tty_unregister_device(brd->serial_driver, i);
6439 }
69edaa21 6440
0b2cf5c8
DY
6441 if (ch->ch_pun.un_sysfs) {
6442 dgap_remove_tty_sysfs(ch->ch_pun.un_sysfs);
6443 tty_unregister_device(brd->print_driver, i);
6444 }
6445 i--;
6446 }
69edaa21 6447
0b2cf5c8
DY
6448 for (i = 0; i < brd->nasync; i++) {
6449 tty_port_destroy(&brd->serial_ports[i]);
6450 tty_port_destroy(&brd->printer_ports[i]);
6451 }
69edaa21 6452
0b2cf5c8
DY
6453 kfree(brd->printer_ports);
6454 brd->printer_ports = NULL;
69edaa21 6455
0b2cf5c8
DY
6456free_serial_ports:
6457 kfree(brd->serial_ports);
6458 brd->serial_ports = NULL;
82512235 6459
0b2cf5c8
DY
6460 return ret;
6461}
82512235 6462
0b2cf5c8
DY
6463/*
6464 * dgap_cleanup_tty()
6465 *
6466 * Uninitialize the TTY portion of this driver. Free all memory and
6467 * resources.
6468 */
6469static void dgap_cleanup_tty(struct board_t *brd)
6470{
6471 struct device *dev;
6472 unsigned int i;
82512235 6473
0b2cf5c8
DY
6474 for (i = 0; i < brd->nasync; i++) {
6475 tty_port_destroy(&brd->serial_ports[i]);
6476 dev = brd->channels[i]->ch_tun.un_sysfs;
6477 dgap_remove_tty_sysfs(dev);
6478 tty_unregister_device(brd->serial_driver, i);
6479 }
6480 tty_unregister_driver(brd->serial_driver);
6481 put_tty_driver(brd->serial_driver);
6482 kfree(brd->serial_ports);
6c66843d 6483
0b2cf5c8
DY
6484 for (i = 0; i < brd->nasync; i++) {
6485 tty_port_destroy(&brd->printer_ports[i]);
6486 dev = brd->channels[i]->ch_pun.un_sysfs;
6487 dgap_remove_tty_sysfs(dev);
6488 tty_unregister_device(brd->print_driver, i);
6489 }
6490 tty_unregister_driver(brd->print_driver);
6491 put_tty_driver(brd->print_driver);
6492 kfree(brd->printer_ports);
6493}
69edaa21 6494
0b2cf5c8
DY
6495static int dgap_request_irq(struct board_t *brd)
6496{
6497 int rc;
82512235 6498
0b2cf5c8
DY
6499 if (!brd || brd->magic != DGAP_BOARD_MAGIC)
6500 return -ENODEV;
82512235 6501
0b2cf5c8
DY
6502 /*
6503 * Set up our interrupt handler if we are set to do interrupts.
6504 */
6505 if (dgap_config_get_useintr(brd) && brd->irq) {
0b2cf5c8 6506 rc = request_irq(brd->irq, dgap_intr, IRQF_SHARED, "DGAP", brd);
6c66843d 6507
0b2cf5c8
DY
6508 if (!rc)
6509 brd->intr_used = 1;
6510 }
6511 return 0;
6512}
69edaa21 6513
0b2cf5c8
DY
6514static void dgap_free_irq(struct board_t *brd)
6515{
6516 if (brd->intr_used && brd->irq)
6517 free_irq(brd->irq, brd);
6518}
6519
6520static int dgap_firmware_load(struct pci_dev *pdev, int card_type,
6521 struct board_t *brd)
6522{
6523 const struct firmware *fw;
6524 char *tmp_ptr;
6525 int ret;
6526 char *dgap_config_buf;
6527
6528 dgap_get_vpd(brd);
6529 dgap_do_reset_board(brd);
6530
6531 if (fw_info[card_type].conf_name) {
6532 ret = request_firmware(&fw, fw_info[card_type].conf_name,
629c7349 6533 &pdev->dev);
0b2cf5c8
DY
6534 if (ret) {
6535 dev_err(&pdev->dev, "config file %s not found\n",
6536 fw_info[card_type].conf_name);
6537 return ret;
6538 }
82512235 6539
0b2cf5c8
DY
6540 dgap_config_buf = kzalloc(fw->size + 1, GFP_KERNEL);
6541 if (!dgap_config_buf) {
6542 release_firmware(fw);
6543 return -ENOMEM;
6544 }
82512235 6545
0b2cf5c8
DY
6546 memcpy(dgap_config_buf, fw->data, fw->size);
6547 release_firmware(fw);
69edaa21 6548
0b2cf5c8
DY
6549 /*
6550 * preserve dgap_config_buf
6551 * as dgap_parsefile would
6552 * otherwise alter it.
6553 */
6554 tmp_ptr = dgap_config_buf;
82512235 6555
0b2cf5c8
DY
6556 if (dgap_parsefile(&tmp_ptr) != 0) {
6557 kfree(dgap_config_buf);
6558 return -EINVAL;
6559 }
6560 kfree(dgap_config_buf);
6561 }
82512235 6562
0b2cf5c8
DY
6563 /*
6564 * Match this board to a config the user created for us.
6565 */
6566 brd->bd_config =
6567 dgap_find_config(brd->type, brd->pci_bus, brd->pci_slot);
82512235 6568
0b2cf5c8
DY
6569 /*
6570 * Because the 4 port Xr products share the same PCI ID
6571 * as the 8 port Xr products, if we receive a NULL config
6572 * back, and this is a PAPORT8 board, retry with a
6573 * PAPORT4 attempt as well.
6574 */
6575 if (brd->type == PAPORT8 && !brd->bd_config)
6576 brd->bd_config =
6577 dgap_find_config(PAPORT4, brd->pci_bus, brd->pci_slot);
69edaa21 6578
0b2cf5c8
DY
6579 if (!brd->bd_config) {
6580 dev_err(&pdev->dev, "No valid configuration found\n");
6581 return -EINVAL;
6582 }
69edaa21 6583
0b2cf5c8
DY
6584 if (fw_info[card_type].bios_name) {
6585 ret = request_firmware(&fw, fw_info[card_type].bios_name,
629c7349 6586 &pdev->dev);
0b2cf5c8
DY
6587 if (ret) {
6588 dev_err(&pdev->dev, "bios file %s not found\n",
6589 fw_info[card_type].bios_name);
6590 return ret;
6591 }
6592 dgap_do_bios_load(brd, fw->data, fw->size);
6593 release_firmware(fw);
f6aa0164 6594
0b2cf5c8
DY
6595 /* Wait for BIOS to test board... */
6596 ret = dgap_test_bios(brd);
6597 if (ret)
6598 return ret;
6599 }
69edaa21 6600
0b2cf5c8
DY
6601 if (fw_info[card_type].fep_name) {
6602 ret = request_firmware(&fw, fw_info[card_type].fep_name,
629c7349 6603 &pdev->dev);
0b2cf5c8
DY
6604 if (ret) {
6605 dev_err(&pdev->dev, "dgap: fep file %s not found\n",
6606 fw_info[card_type].fep_name);
6607 return ret;
6608 }
6609 dgap_do_fep_load(brd, fw->data, fw->size);
6610 release_firmware(fw);
82512235 6611
0b2cf5c8
DY
6612 /* Wait for FEP to load on board... */
6613 ret = dgap_test_fep(brd);
6614 if (ret)
6615 return ret;
6616 }
6c66843d 6617
0b2cf5c8
DY
6618#ifdef DIGI_CONCENTRATORS_SUPPORTED
6619 /*
6620 * If this is a CX or EPCX, we need to see if the firmware
6621 * is requesting a concentrator image from us.
6622 */
6623 if ((bd->type == PCX) || (bd->type == PEPC)) {
18122553 6624 chk_addr = (u16 *)(vaddr + DOWNREQ);
0b2cf5c8
DY
6625 /* Nonzero if FEP is requesting concentrator image. */
6626 check = readw(chk_addr);
6627 vaddr = brd->re_map_membase;
6628 }
82512235 6629
0b2cf5c8
DY
6630 if (fw_info[card_type].con_name && check && vaddr) {
6631 ret = request_firmware(&fw, fw_info[card_type].con_name,
629c7349 6632 &pdev->dev);
0b2cf5c8
DY
6633 if (ret) {
6634 dev_err(&pdev->dev, "conc file %s not found\n",
6635 fw_info[card_type].con_name);
6636 return ret;
6637 }
6638 /* Put concentrator firmware loading code here */
18122553 6639 offset = readw((u16 *)(vaddr + DOWNREQ));
0b2cf5c8 6640 memcpy_toio(offset, fw->data, fw->size);
69edaa21 6641
0b2cf5c8
DY
6642 dgap_do_conc_load(brd, (char *)fw->data, fw->size)
6643 release_firmware(fw);
6644 }
6645#endif
69edaa21 6646
0b2cf5c8
DY
6647 return 0;
6648}
3cfa648b 6649
0b2cf5c8
DY
6650/*
6651 * dgap_tty_init()
6652 *
6653 * Init the tty subsystem. Called once per board after board has been
6654 * downloaded and init'ed.
6655 */
6656static int dgap_tty_init(struct board_t *brd)
6657{
6658 int i;
6659 int tlw;
6660 uint true_count;
6661 u8 __iomem *vaddr;
6662 u8 modem;
6663 struct channel_t *ch;
6664 struct bs_t __iomem *bs;
6665 struct cm_t __iomem *cm;
6666 int ret;
69edaa21 6667
0b2cf5c8
DY
6668 /*
6669 * Initialize board structure elements.
6670 */
69edaa21 6671
0b2cf5c8
DY
6672 vaddr = brd->re_map_membase;
6673 true_count = readw((vaddr + NCHAN));
69edaa21 6674
0b2cf5c8 6675 brd->nasync = dgap_config_get_num_prts(brd);
82512235 6676
0b2cf5c8
DY
6677 if (!brd->nasync)
6678 brd->nasync = brd->maxports;
82512235 6679
0b2cf5c8
DY
6680 if (brd->nasync > brd->maxports)
6681 brd->nasync = brd->maxports;
6682
6683 if (true_count != brd->nasync) {
6684 dev_warn(&brd->pdev->dev,
6685 "%s configured for %d ports, has %d ports.\n",
6686 brd->name, brd->nasync, true_count);
6687
6688 if ((brd->type == PPCM) &&
6689 (true_count == 64 || true_count == 0)) {
6690 dev_warn(&brd->pdev->dev,
6691 "Please make SURE the EBI cable running from the card\n");
6692 dev_warn(&brd->pdev->dev,
6693 "to each EM module is plugged into EBI IN!\n");
6694 }
82512235 6695
0b2cf5c8 6696 brd->nasync = true_count;
6c66843d 6697
0b2cf5c8
DY
6698 /* If no ports, don't bother going any further */
6699 if (!brd->nasync) {
6700 brd->state = BOARD_FAILED;
6701 brd->dpastatus = BD_NOFEP;
6702 return -EIO;
6703 }
6704 }
69edaa21 6705
0b2cf5c8
DY
6706 /*
6707 * Allocate channel memory that might not have been allocated
6708 * when the driver was first loaded.
6709 */
6710 for (i = 0; i < brd->nasync; i++) {
6711 brd->channels[i] =
6712 kzalloc(sizeof(struct channel_t), GFP_KERNEL);
6713 if (!brd->channels[i]) {
6714 ret = -ENOMEM;
6715 goto free_chan;
6716 }
6717 }
82512235 6718
0b2cf5c8
DY
6719 ch = brd->channels[0];
6720 vaddr = brd->re_map_membase;
82512235 6721
18122553
IC
6722 bs = (struct bs_t __iomem *)((ulong)vaddr + CHANBUF);
6723 cm = (struct cm_t __iomem *)((ulong)vaddr + CMDBUF);
82512235 6724
0b2cf5c8 6725 brd->bd_bs = bs;
69edaa21 6726
0b2cf5c8
DY
6727 /* Set up channel variables */
6728 for (i = 0; i < brd->nasync; i++, ch = brd->channels[i], bs++) {
0b2cf5c8 6729 spin_lock_init(&ch->ch_lock);
82512235 6730
0b2cf5c8
DY
6731 /* Store all our magic numbers */
6732 ch->magic = DGAP_CHANNEL_MAGIC;
6733 ch->ch_tun.magic = DGAP_UNIT_MAGIC;
6734 ch->ch_tun.un_type = DGAP_SERIAL;
6735 ch->ch_tun.un_ch = ch;
6736 ch->ch_tun.un_dev = i;
82512235 6737
0b2cf5c8
DY
6738 ch->ch_pun.magic = DGAP_UNIT_MAGIC;
6739 ch->ch_pun.un_type = DGAP_PRINT;
6740 ch->ch_pun.un_ch = ch;
6741 ch->ch_pun.un_dev = i;
69edaa21 6742
0b2cf5c8
DY
6743 ch->ch_vaddr = vaddr;
6744 ch->ch_bs = bs;
6745 ch->ch_cm = cm;
6746 ch->ch_bd = brd;
6747 ch->ch_portnum = i;
6748 ch->ch_digi = dgap_digi_init;
82512235 6749
0b2cf5c8
DY
6750 /*
6751 * Set up digi dsr and dcd bits based on altpin flag.
6752 */
6753 if (dgap_config_get_altpin(brd)) {
6754 ch->ch_dsr = DM_CD;
6755 ch->ch_cd = DM_DSR;
6756 ch->ch_digi.digi_flags |= DIGI_ALTPIN;
6757 } else {
6758 ch->ch_cd = DM_CD;
6759 ch->ch_dsr = DM_DSR;
6760 }
6c66843d 6761
44209c93
IC
6762 ch->ch_taddr = vaddr + (ioread16(&ch->ch_bs->tx_seg) << 4);
6763 ch->ch_raddr = vaddr + (ioread16(&ch->ch_bs->rx_seg) << 4);
0b2cf5c8
DY
6764 ch->ch_tx_win = 0;
6765 ch->ch_rx_win = 0;
44209c93
IC
6766 ch->ch_tsize = readw(&ch->ch_bs->tx_max) + 1;
6767 ch->ch_rsize = readw(&ch->ch_bs->rx_max) + 1;
0b2cf5c8
DY
6768 ch->ch_tstart = 0;
6769 ch->ch_rstart = 0;
69edaa21 6770
0b2cf5c8
DY
6771 /*
6772 * Set queue water marks, interrupt mask,
6773 * and general tty parameters.
6774 */
6775 tlw = ch->ch_tsize >= 2000 ? ((ch->ch_tsize * 5) / 8) :
6776 ch->ch_tsize / 2;
6777 ch->ch_tlw = tlw;
82512235 6778
0b2cf5c8 6779 dgap_cmdw(ch, STLOW, tlw, 0);
82512235 6780
0b2cf5c8 6781 dgap_cmdw(ch, SRLOW, ch->ch_rsize / 2, 0);
82512235 6782
0b2cf5c8 6783 dgap_cmdw(ch, SRHIGH, 7 * ch->ch_rsize / 8, 0);
69edaa21 6784
44209c93 6785 ch->ch_mistat = readb(&ch->ch_bs->m_stat);
82512235 6786
0b2cf5c8
DY
6787 init_waitqueue_head(&ch->ch_flags_wait);
6788 init_waitqueue_head(&ch->ch_tun.un_flags_wait);
6789 init_waitqueue_head(&ch->ch_pun.un_flags_wait);
82512235 6790
0b2cf5c8
DY
6791 /* Turn on all modem interrupts for now */
6792 modem = (DM_CD | DM_DSR | DM_CTS | DM_RI);
44209c93 6793 writeb(modem, &ch->ch_bs->m_int);
82512235 6794
0b2cf5c8
DY
6795 /*
6796 * Set edelay to 0 if interrupts are turned on,
6797 * otherwise set edelay to the usual 100.
6798 */
6799 if (brd->intr_used)
44209c93 6800 writew(0, &ch->ch_bs->edelay);
0b2cf5c8 6801 else
44209c93 6802 writew(100, &ch->ch_bs->edelay);
69edaa21 6803
44209c93 6804 writeb(1, &ch->ch_bs->idata);
0b2cf5c8 6805 }
82512235 6806
0b2cf5c8 6807 return 0;
82512235 6808
0b2cf5c8
DY
6809free_chan:
6810 while (--i >= 0) {
6811 kfree(brd->channels[i]);
6812 brd->channels[i] = NULL;
6813 }
6814 return ret;
6815}
82512235 6816
0b2cf5c8
DY
6817/*
6818 * dgap_tty_free()
6819 *
6820 * Free the channles which are allocated in dgap_tty_init().
6821 */
6822static void dgap_tty_free(struct board_t *brd)
6823{
6824 int i;
69edaa21 6825
0b2cf5c8
DY
6826 for (i = 0; i < brd->nasync; i++)
6827 kfree(brd->channels[i]);
6828}
82512235 6829
0b2cf5c8
DY
6830static int dgap_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
6831{
6832 int rc;
6833 struct board_t *brd;
82512235 6834
0b2cf5c8
DY
6835 if (dgap_numboards >= MAXBOARDS)
6836 return -EPERM;
82512235 6837
0b2cf5c8
DY
6838 rc = pci_enable_device(pdev);
6839 if (rc)
6840 return -EIO;
69edaa21 6841
0b2cf5c8
DY
6842 brd = dgap_found_board(pdev, ent->driver_data, dgap_numboards);
6843 if (IS_ERR(brd))
6844 return PTR_ERR(brd);
82512235 6845
0b2cf5c8
DY
6846 rc = dgap_firmware_load(pdev, ent->driver_data, brd);
6847 if (rc)
6848 goto cleanup_brd;
82512235 6849
0b2cf5c8
DY
6850 rc = dgap_alloc_flipbuf(brd);
6851 if (rc)
6852 goto cleanup_brd;
82512235 6853
0b2cf5c8
DY
6854 rc = dgap_tty_register(brd);
6855 if (rc)
6856 goto free_flipbuf;
69edaa21 6857
0b2cf5c8
DY
6858 rc = dgap_request_irq(brd);
6859 if (rc)
6860 goto unregister_tty;
82512235 6861
0b2cf5c8
DY
6862 /*
6863 * Do tty device initialization.
6864 */
6865 rc = dgap_tty_init(brd);
6866 if (rc < 0)
6867 goto free_irq;
82512235 6868
0b2cf5c8
DY
6869 rc = dgap_tty_register_ports(brd);
6870 if (rc)
6871 goto tty_free;
82512235 6872
0b2cf5c8
DY
6873 brd->state = BOARD_READY;
6874 brd->dpastatus = BD_RUNNING;
69edaa21 6875
0b2cf5c8 6876 dgap_board[dgap_numboards++] = brd;
69edaa21 6877
0b2cf5c8 6878 return 0;
69edaa21 6879
0b2cf5c8
DY
6880tty_free:
6881 dgap_tty_free(brd);
6882free_irq:
6883 dgap_free_irq(brd);
6884unregister_tty:
6885 dgap_tty_unregister(brd);
6886free_flipbuf:
6887 dgap_free_flipbuf(brd);
6888cleanup_brd:
6889 dgap_cleanup_nodes();
6890 dgap_unmap(brd);
6891 kfree(brd);
69edaa21 6892
0b2cf5c8
DY
6893 return rc;
6894}
6895
d1c9f3ef
SM
6896/*
6897 * dgap_cleanup_board()
6898 *
6899 * Free all the memory associated with a board
6900 */
6901static void dgap_cleanup_board(struct board_t *brd)
6902{
6903 unsigned int i;
6904
6905 if (!brd || brd->magic != DGAP_BOARD_MAGIC)
6906 return;
6907
6908 dgap_free_irq(brd);
6909
6910 tasklet_kill(&brd->helper_tasklet);
6911
6912 dgap_unmap(brd);
6913
6914 /* Free all allocated channels structs */
6915 for (i = 0; i < MAXPORTS ; i++)
6916 kfree(brd->channels[i]);
6917
6918 kfree(brd->flipbuf);
6919 kfree(brd->flipflagbuf);
6920
6921 dgap_board[brd->boardnum] = NULL;
6922
6923 kfree(brd);
6924}
6925
174b83c0 6926static void dgap_stop(bool removesys, struct pci_driver *drv)
eda03951
SM
6927{
6928 unsigned long lock_flags;
6929
6930 spin_lock_irqsave(&dgap_poll_lock, lock_flags);
6931 dgap_poll_stop = 1;
6932 spin_unlock_irqrestore(&dgap_poll_lock, lock_flags);
6933
6934 del_timer_sync(&dgap_poll_timer);
174b83c0
SM
6935 if (removesys)
6936 dgap_remove_driver_sysfiles(drv);
eda03951
SM
6937
6938 device_destroy(dgap_class, MKDEV(DIGI_DGAP_MAJOR, 0));
6939 class_destroy(dgap_class);
6940 unregister_chrdev(DIGI_DGAP_MAJOR, "dgap");
6941}
6942
0b2cf5c8
DY
6943static void dgap_remove_one(struct pci_dev *dev)
6944{
1397e2fd 6945 unsigned int i;
1397e2fd
SM
6946 struct pci_driver *drv = to_pci_driver(dev->dev.driver);
6947
b8d1f261 6948 dgap_stop(true, drv);
1397e2fd
SM
6949 for (i = 0; i < dgap_numboards; ++i) {
6950 dgap_remove_ports_sysfiles(dgap_board[i]);
6951 dgap_cleanup_tty(dgap_board[i]);
6952 dgap_cleanup_board(dgap_board[i]);
6953 }
6954
6955 dgap_cleanup_nodes();
69edaa21
MH
6956}
6957
0b2cf5c8
DY
6958static struct pci_driver dgap_driver = {
6959 .name = "dgap",
6960 .probe = dgap_init_one,
6961 .id_table = dgap_pci_tbl,
6962 .remove = dgap_remove_one,
6963};
6964
69edaa21 6965/*
0b2cf5c8 6966 * Start of driver.
69edaa21 6967 */
0b2cf5c8 6968static int dgap_start(void)
69edaa21 6969{
0b2cf5c8
DY
6970 int rc;
6971 unsigned long flags;
6972 struct device *device;
69edaa21 6973
0b2cf5c8 6974 dgap_numboards = 0;
69edaa21 6975
0b2cf5c8 6976 pr_info("For the tools package please visit http://www.digi.com\n");
69edaa21 6977
0b2cf5c8
DY
6978 /*
6979 * Register our base character device into the kernel.
6980 */
6981
6982 /*
6983 * Register management/dpa devices
6984 */
6985 rc = register_chrdev(DIGI_DGAP_MAJOR, "dgap", &dgap_board_fops);
6986 if (rc < 0)
6987 return rc;
6988
6989 dgap_class = class_create(THIS_MODULE, "dgap_mgmt");
6990 if (IS_ERR(dgap_class)) {
6991 rc = PTR_ERR(dgap_class);
6992 goto failed_class;
69edaa21
MH
6993 }
6994
0b2cf5c8 6995 device = device_create(dgap_class, NULL,
629c7349
IC
6996 MKDEV(DIGI_DGAP_MAJOR, 0),
6997 NULL, "dgap_mgmt");
0b2cf5c8
DY
6998 if (IS_ERR(device)) {
6999 rc = PTR_ERR(device);
7000 goto failed_device;
7001 }
69edaa21 7002
0b2cf5c8
DY
7003 /* Start the poller */
7004 spin_lock_irqsave(&dgap_poll_lock, flags);
2049f1ea 7005 setup_timer(&dgap_poll_timer, dgap_poll_handler, 0);
0b2cf5c8
DY
7006 dgap_poll_timer.data = 0;
7007 dgap_poll_time = jiffies + dgap_jiffies_from_ms(dgap_poll_tick);
7008 dgap_poll_timer.expires = dgap_poll_time;
7009 spin_unlock_irqrestore(&dgap_poll_lock, flags);
69edaa21 7010
0b2cf5c8 7011 add_timer(&dgap_poll_timer);
69edaa21 7012
0b2cf5c8
DY
7013 return rc;
7014
7015failed_device:
7016 class_destroy(dgap_class);
7017failed_class:
7018 unregister_chrdev(DIGI_DGAP_MAJOR, "dgap");
7019 return rc;
69edaa21
MH
7020}
7021
0b2cf5c8
DY
7022/************************************************************************
7023 *
7024 * Driver load/unload functions
7025 *
7026 ************************************************************************/
7027
69edaa21 7028/*
0b2cf5c8
DY
7029 * init_module()
7030 *
7031 * Module load. This is where it all starts.
69edaa21 7032 */
0b2cf5c8 7033static int dgap_init_module(void)
69edaa21 7034{
0b2cf5c8 7035 int rc;
69edaa21 7036
0b2cf5c8 7037 pr_info("%s, Digi International Part Number %s\n", DG_NAME, DG_PART);
69edaa21 7038
0b2cf5c8
DY
7039 rc = dgap_start();
7040 if (rc)
7041 return rc;
69edaa21 7042
0b2cf5c8 7043 rc = pci_register_driver(&dgap_driver);
ac4e504a 7044 if (rc) {
174b83c0 7045 dgap_stop(false, NULL);
ac4e504a
SM
7046 return rc;
7047 }
0be048cb 7048
0b2cf5c8
DY
7049 rc = dgap_create_driver_sysfiles(&dgap_driver);
7050 if (rc)
7051 goto err_unregister;
0be048cb 7052
0b2cf5c8 7053 dgap_driver_state = DRIVER_READY;
0be048cb 7054
0b2cf5c8 7055 return 0;
0be048cb 7056
0b2cf5c8
DY
7057err_unregister:
7058 pci_unregister_driver(&dgap_driver);
0b2cf5c8 7059 return rc;
69edaa21
MH
7060}
7061
7062/*
0b2cf5c8
DY
7063 * dgap_cleanup_module()
7064 *
7065 * Module unload. This is where it all ends.
69edaa21 7066 */
0b2cf5c8 7067static void dgap_cleanup_module(void)
69edaa21 7068{
0b2cf5c8
DY
7069 if (dgap_numboards)
7070 pci_unregister_driver(&dgap_driver);
7071}
69edaa21 7072
0b2cf5c8
DY
7073module_init(dgap_init_module);
7074module_exit(dgap_cleanup_module);
69edaa21 7075
0b2cf5c8
DY
7076MODULE_LICENSE("GPL");
7077MODULE_AUTHOR("Digi International, http://www.digi.com");
7078MODULE_DESCRIPTION("Driver for the Digi International EPCA PCI based product line");
7079MODULE_SUPPORTED_DEVICE("dgap");
This page took 0.836088 seconds and 5 git commands to generate.