[deliverable/linux.git] / drivers / staging / et131x / et131x_adapter.h

/*
 * Agere Systems Inc.
 * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
 *
 * Copyright © 2005 Agere Systems Inc.
 * All rights reserved.
 *   http://www.agere.com
 *
 *------------------------------------------------------------------------------
 *
 * et131x_adapter.h - Header which includes the private adapter structure, along
 *                    with related support structures, macros, definitions, etc.
 *
 *------------------------------------------------------------------------------
 *
 * SOFTWARE LICENSE
 *
 * This software is provided subject to the following terms and conditions,
 * which you should read carefully before using the software.  Using this
 * software indicates your acceptance of these terms and conditions.  If you do
 * not agree with these terms and conditions, do not use the software.
 *
 * Copyright © 2005 Agere Systems Inc.
 * All rights reserved.
 *
 * Redistribution and use in source or binary forms, with or without
 * modifications, are permitted provided that the following conditions are met:
 *
 * . Redistributions of source code must retain the above copyright notice, this
 *    list of conditions and the following Disclaimer as comments in the code as
 *    well as in the documentation and/or other materials provided with the
 *    distribution.
 *
 * . Redistributions in binary form must reproduce the above copyright notice,
 *    this list of conditions and the following Disclaimer in the documentation
 *    and/or other materials provided with the distribution.
 *
 * . Neither the name of Agere Systems Inc. nor the names of the contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * Disclaimer
 *
 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  ANY
 * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
 * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 *
 */

#ifndef __ET131X_ADAPTER_H__
#define __ET131X_ADAPTER_H__

#include "et1310_address_map.h"
#include "et1310_tx.h"
#include "et1310_rx.h"

/*
 * Do not change these values: if changed, then change also in respective
 * TXdma and Rxdma engines
 */
#define NUM_DESC_PER_RING_TX         512	/* TX Do not change these values */
#define NUM_TCB                      64

/*
 * These values are all superseded by registry entries to facilitate tuning.
 * Once the desired performance has been achieved, the optimal registry values
 * should be re-populated to these #defines:
 */
#define NUM_TRAFFIC_CLASSES          1

/*
 * There are three ways of counting errors - if there are more than X errors
 * in Y packets (represented by the "SAMPLE" macros), if there are more than
 * N errors in a S mSec time period (the "PERIOD" macros), or if there are
 * consecutive packets with errors (CONSEC_ERRORED_THRESH).  This last covers
 * for "Bursty" errors, and the errored packets may well not be contiguous,
 * but several errors where the packet counter has changed by less than a
 * small amount will cause this count to increment.
 */
#define TX_PACKETS_IN_SAMPLE        10000
#define TX_MAX_ERRORS_IN_SAMPLE     50

#define TX_ERROR_PERIOD             1000
#define TX_MAX_ERRORS_IN_PERIOD     10

#define LINK_DETECTION_TIMER        5000

#define TX_CONSEC_RANGE             5
#define TX_CONSEC_ERRORED_THRESH    10

#define LO_MARK_PERCENT_FOR_PSR     15
#define LO_MARK_PERCENT_FOR_RX      15

/* Macros specific to the private adapter structure */
#define MP_TCB_RESOURCES_AVAILABLE(_M) ((_M)->TxRing.nBusySend < NUM_TCB)
#define MP_TCB_RESOURCES_NOT_AVAILABLE(_M) ((_M)->TxRing.nBusySend >= NUM_TCB)

#define MP_SHOULD_FAIL_SEND(_M)   ((_M)->Flags & fMP_ADAPTER_FAIL_SEND_MASK)

/* Counters for error rate monitoring */
typedef struct _MP_ERR_COUNTERS {
	u32 PktCountTxPackets;
	u32 PktCountTxErrors;
	u32 TimerBasedTxErrors;
	u32 PktCountLastError;
	u32 ErredConsecPackets;
} MP_ERR_COUNTERS, *PMP_ERR_COUNTERS;

/* RFD (Receive Frame Descriptor) */
typedef struct _MP_RFD {
	struct list_head list_node;
	struct sk_buff *Packet;
	u32 PacketSize;	/* total size of receive frame */
	u16 bufferindex;
	u8 ringindex;
} MP_RFD, *PMP_RFD;

/* Enum for Flow Control */
typedef enum _eflow_control_t {
	Both = 0,
	TxOnly = 1,
	RxOnly = 2,
	None = 3
} eFLOW_CONTROL_t, *PeFLOW_CONTROL_t;

/* Struct to define some device statistics */
typedef struct _ce_stats_t {
	/* Link Input/Output stats */
	uint64_t ipackets;	/* # of in packets */
	uint64_t opackets;	/* # of out packets */

	/* MIB II variables
	 *
	 * NOTE: atomic_t types are only guaranteed to store 24-bits; if we
	 * MUST have 32, then we'll need another way to perform atomic
	 * operations
	 */
	u32 unircv;	/* # multicast packets received */
	atomic_t unixmt;	/* # multicast packets for Tx */
	u32 multircv;	/* # multicast packets received */
	atomic_t multixmt;	/* # multicast packets for Tx */
	u32 brdcstrcv;	/* # broadcast packets received */
	atomic_t brdcstxmt;	/* # broadcast packets for Tx */
	u32 norcvbuf;	/* # Rx packets discarded */
	u32 noxmtbuf;	/* # Tx packets discarded */

	/* Transciever state informations. */
	u8 xcvr_addr;
	u32 xcvr_id;

	/* Tx Statistics. */
	u32 tx_uflo;		/* Tx Underruns */

	u32 collisions;
	u32 excessive_collisions;
	u32 first_collision;
	u32 late_collisions;
	u32 max_pkt_error;
	u32 tx_deferred;

	/* Rx Statistics. */
	u32 rx_ov_flow;	/* Rx Over Flow */

	u32 length_err;
	u32 alignment_err;
	u32 crc_err;
	u32 code_violations;
	u32 other_errors;

	u32 SynchrounousIterations;
	u32 InterruptStatus;
} CE_STATS_t, *PCE_STATS_t;

/* The private adapter structure */
struct et131x_adapter {
	struct net_device *netdev;
	struct pci_dev *pdev;

	struct work_struct task;

	/* Flags that indicate current state of the adapter */
	u32 Flags;
	u32 HwErrCount;

	/* Configuration  */
	u8 PermanentAddress[ETH_ALEN];
	u8 CurrentAddress[ETH_ALEN];
	bool has_eeprom;
	u8 eepromData[2];

	/* Spinlocks */
	spinlock_t Lock;

	spinlock_t TCBSendQLock;
	spinlock_t TCBReadyQLock;
	spinlock_t SendHWLock;
	spinlock_t SendWaitLock;

	spinlock_t RcvLock;
	spinlock_t RcvPendLock;
	spinlock_t FbrLock;

	spinlock_t PHYLock;

	/* Packet Filter and look ahead size */
	u32 PacketFilter;
	u32 linkspeed;
	u32 duplex_mode;

	/* multicast list */
	u32 MCAddressCount;
	u8 MCList[NIC_MAX_MCAST_LIST][ETH_ALEN];

	/* MAC test */
	TXMAC_TXTEST_t TxMacTest;

	/* Pointer to the device's PCI register space */
	ADDRESS_MAP_t __iomem *regs;

	/* Registry parameters */
	u8 SpeedDuplex;		/* speed/duplex */
	eFLOW_CONTROL_t RegistryFlowControl;	/* for 802.3x flow control */
	u8 RegistryPhyComa;	/* Phy Coma mode enable/disable */

	u32 RegistryRxMemEnd;	/* Size of internal rx memory */
	u32 RegistryJumboPacket;	/* Max supported ethernet packet size */

	/* Validation helpers */
	u8 RegistryNMIDisable;
	u8 RegistryPhyLoopbk;	/* Enable Phy loopback */

	/* Derived from the registry: */
	u8 AiForceDpx;		/* duplex setting */
	u16 AiForceSpeed;		/* 'Speed', user over-ride of line speed */
	eFLOW_CONTROL_t FlowControl;	/* flow control validated by the far-end */
	enum {
		NETIF_STATUS_INVALID = 0,
		NETIF_STATUS_MEDIA_CONNECT,
		NETIF_STATUS_MEDIA_DISCONNECT,
		NETIF_STATUS_MAX
	} MediaState;
	u8 DriverNoPhyAccess;

	/* Minimize init-time */
	struct timer_list ErrorTimer;
	MP_POWER_MGMT PoMgmt;
	u32 CachedMaskValue;

	/* Xcvr status at last poll */
	MI_BMSR_t Bmsr;

	/* Tx Memory Variables */
	TX_RING_t TxRing;

	/* Rx Memory Variables */
	RX_RING_t RxRing;

	/* Loopback specifics */
	u8 ReplicaPhyLoopbk;	/* Replica Enable */
	u8 ReplicaPhyLoopbkPF;	/* Replica Enable Pass/Fail */

	/* Stats */
	CE_STATS_t Stats;

	struct net_device_stats net_stats;
	struct net_device_stats net_stats_prev;
};

#endif /* __ET131X_ADAPTER_H__ */
Commit	Line	Data
cfb739b4 GKH	1	/*
	2	* Agere Systems Inc.
	3	* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
	4	*
64f93036	5	* Copyright © 2005 Agere Systems Inc.
cfb739b4 GKH	6	* All rights reserved.
	7	* http://www.agere.com
	8	*
	9	*------------------------------------------------------------------------------
	10	*
	11	* et131x_adapter.h - Header which includes the private adapter structure, along
	12	* with related support structures, macros, definitions, etc.
	13	*
	14	*------------------------------------------------------------------------------
	15	*
	16	* SOFTWARE LICENSE
	17	*
	18	* This software is provided subject to the following terms and conditions,
	19	* which you should read carefully before using the software. Using this
	20	* software indicates your acceptance of these terms and conditions. If you do
	21	* not agree with these terms and conditions, do not use the software.
	22	*
64f93036	23	* Copyright © 2005 Agere Systems Inc.
cfb739b4 GKH	24	* All rights reserved.
	25	*
	26	* Redistribution and use in source or binary forms, with or without
	27	* modifications, are permitted provided that the following conditions are met:
	28	*
	29	* . Redistributions of source code must retain the above copyright notice, this
	30	* list of conditions and the following Disclaimer as comments in the code as
	31	* well as in the documentation and/or other materials provided with the
	32	* distribution.
	33	*
	34	* . Redistributions in binary form must reproduce the above copyright notice,
	35	* this list of conditions and the following Disclaimer in the documentation
	36	* and/or other materials provided with the distribution.
	37	*
	38	* . Neither the name of Agere Systems Inc. nor the names of the contributors
	39	* may be used to endorse or promote products derived from this software
	40	* without specific prior written permission.
	41	*
	42	* Disclaimer
	43	*
64f93036	44	* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
cfb739b4 GKH	45	* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
	46	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
	47	* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
	48	* RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
	49	* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
	50	* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
	51	* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
	52	* ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
	53	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
	54	* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
	55	* DAMAGE.
	56	*
	57	*/
	58
	59	#ifndef __ET131X_ADAPTER_H__
	60	#define __ET131X_ADAPTER_H__
	61
	62	#include "et1310_address_map.h"
	63	#include "et1310_tx.h"
	64	#include "et1310_rx.h"
	65
	66	/*
	67	* Do not change these values: if changed, then change also in respective
	68	* TXdma and Rxdma engines
	69	*/
64f93036	70	#define NUM_DESC_PER_RING_TX 512 /* TX Do not change these values */
cfb739b4 GKH	71	#define NUM_TCB 64
	72
	73	/*
	74	* These values are all superseded by registry entries to facilitate tuning.
	75	* Once the desired performance has been achieved, the optimal registry values
	76	* should be re-populated to these #defines:
	77	*/
	78	#define NUM_TRAFFIC_CLASSES 1
	79
	80	/*
	81	* There are three ways of counting errors - if there are more than X errors
	82	* in Y packets (represented by the "SAMPLE" macros), if there are more than
	83	* N errors in a S mSec time period (the "PERIOD" macros), or if there are
	84	* consecutive packets with errors (CONSEC_ERRORED_THRESH). This last covers
	85	* for "Bursty" errors, and the errored packets may well not be contiguous,
	86	* but several errors where the packet counter has changed by less than a
	87	* small amount will cause this count to increment.
	88	*/
	89	#define TX_PACKETS_IN_SAMPLE 10000
	90	#define TX_MAX_ERRORS_IN_SAMPLE 50
	91
	92	#define TX_ERROR_PERIOD 1000
	93	#define TX_MAX_ERRORS_IN_PERIOD 10
	94
	95	#define LINK_DETECTION_TIMER 5000
	96
	97	#define TX_CONSEC_RANGE 5
	98	#define TX_CONSEC_ERRORED_THRESH 10
	99
	100	#define LO_MARK_PERCENT_FOR_PSR 15
	101	#define LO_MARK_PERCENT_FOR_RX 15
	102
cfb739b4 GKH	103	/* Macros specific to the private adapter structure */
	104	#define MP_TCB_RESOURCES_AVAILABLE(_M) ((_M)->TxRing.nBusySend < NUM_TCB)
	105	#define MP_TCB_RESOURCES_NOT_AVAILABLE(_M) ((_M)->TxRing.nBusySend >= NUM_TCB)
	106
	107	#define MP_SHOULD_FAIL_SEND(_M) ((_M)->Flags & fMP_ADAPTER_FAIL_SEND_MASK)
cfb739b4 GKH	108
	109	/* Counters for error rate monitoring */
	110	typedef struct _MP_ERR_COUNTERS {
	111	u32 PktCountTxPackets;
	112	u32 PktCountTxErrors;
	113	u32 TimerBasedTxErrors;
	114	u32 PktCountLastError;
	115	u32 ErredConsecPackets;
	116	} MP_ERR_COUNTERS, *PMP_ERR_COUNTERS;
	117
	118	/* RFD (Receive Frame Descriptor) */
	119	typedef struct _MP_RFD {
	120	struct list_head list_node;
	121	struct sk_buff *Packet;
64f93036	122	u32 PacketSize; /* total size of receive frame */
9fa81099 AC	123	u16 bufferindex;
9fa81099 AC	124	u8 ringindex;
cfb739b4 GKH	125	} MP_RFD, *PMP_RFD;
	126
	127	/* Enum for Flow Control */
	128	typedef enum _eflow_control_t {
	129	Both = 0,
	130	TxOnly = 1,
	131	RxOnly = 2,
	132	None = 3
	133	} eFLOW_CONTROL_t, *PeFLOW_CONTROL_t;
	134
	135	/* Struct to define some device statistics */
	136	typedef struct _ce_stats_t {
	137	/* Link Input/Output stats */
64f93036 AC	138	uint64_t ipackets; /* # of in packets */
64f93036 AC	139	uint64_t opackets; /* # of out packets */
cfb739b4 GKH	140
	141	/* MIB II variables
	142	*
	143	* NOTE: atomic_t types are only guaranteed to store 24-bits; if we
	144	* MUST have 32, then we'll need another way to perform atomic
	145	* operations
	146	*/
64f93036 AC	147	u32 unircv; /* # multicast packets received */
	148	atomic_t unixmt; /* # multicast packets for Tx */
	149	u32 multircv; /* # multicast packets received */
	150	atomic_t multixmt; /* # multicast packets for Tx */
	151	u32 brdcstrcv; /* # broadcast packets received */
	152	atomic_t brdcstxmt; /* # broadcast packets for Tx */
	153	u32 norcvbuf; /* # Rx packets discarded */
	154	u32 noxmtbuf; /* # Tx packets discarded */
cfb739b4 GKH	155
	156	/* Transciever state informations. */
	157	u8 xcvr_addr;
	158	u32 xcvr_id;
	159
	160	/* Tx Statistics. */
64f93036	161	u32 tx_uflo; /* Tx Underruns */
cfb739b4 GKH	162
	163	u32 collisions;
	164	u32 excessive_collisions;
	165	u32 first_collision;
	166	u32 late_collisions;
	167	u32 max_pkt_error;
	168	u32 tx_deferred;
	169
	170	/* Rx Statistics. */
64f93036	171	u32 rx_ov_flow; /* Rx Over Flow */
cfb739b4 GKH	172
	173	u32 length_err;
	174	u32 alignment_err;
	175	u32 crc_err;
	176	u32 code_violations;
	177	u32 other_errors;
	178
cfb739b4	179	u32 SynchrounousIterations;
2211b732	180	u32 InterruptStatus;
cfb739b4 GKH	181	} CE_STATS_t, *PCE_STATS_t;
	182
	183	/* The private adapter structure */
	184	struct et131x_adapter {
	185	struct net_device *netdev;
	186	struct pci_dev *pdev;
	187
	188	struct work_struct task;
	189
	190	/* Flags that indicate current state of the adapter */
	191	u32 Flags;
	192	u32 HwErrCount;
	193
	194	/* Configuration */
	195	u8 PermanentAddress[ETH_ALEN];
	196	u8 CurrentAddress[ETH_ALEN];
9fa81099	197	bool has_eeprom;
cfb739b4 GKH	198	u8 eepromData[2];
	199
	200	/* Spinlocks */
	201	spinlock_t Lock;
	202
	203	spinlock_t TCBSendQLock;
	204	spinlock_t TCBReadyQLock;
	205	spinlock_t SendHWLock;
	206	spinlock_t SendWaitLock;
	207
	208	spinlock_t RcvLock;
	209	spinlock_t RcvPendLock;
	210	spinlock_t FbrLock;
	211
	212	spinlock_t PHYLock;
	213
	214	/* Packet Filter and look ahead size */
	215	u32 PacketFilter;
9fa81099 AC	216	u32 linkspeed;
9fa81099 AC	217	u32 duplex_mode;
cfb739b4 GKH	218
	219	/* multicast list */
	220	u32 MCAddressCount;
	221	u8 MCList[NIC_MAX_MCAST_LIST][ETH_ALEN];
	222
	223	/* MAC test */
	224	TXMAC_TXTEST_t TxMacTest;
	225
	226	/* Pointer to the device's PCI register space */
f3f415a3	227	ADDRESS_MAP_t __iomem *regs;
cfb739b4	228
cfb739b4	229	/* Registry parameters */
64f93036 AC	230	u8 SpeedDuplex; /* speed/duplex */
64f93036 AC	231	eFLOW_CONTROL_t RegistryFlowControl; /* for 802.3x flow control */
64f93036	232	u8 RegistryPhyComa; /* Phy Coma mode enable/disable */
cfb739b4	233
64f93036	234	u32 RegistryRxMemEnd; /* Size of internal rx memory */
64f93036	235	u32 RegistryJumboPacket; /* Max supported ethernet packet size */
cfb739b4	236
cfb739b4	237	/* Validation helpers */
cfb739b4	238	u8 RegistryNMIDisable;
64f93036	239	u8 RegistryPhyLoopbk; /* Enable Phy loopback */
cfb739b4 GKH	240
cfb739b4 GKH	241	/* Derived from the registry: */
64f93036 AC	242	u8 AiForceDpx; /* duplex setting */
	243	u16 AiForceSpeed; /* 'Speed', user over-ride of line speed */
	244	eFLOW_CONTROL_t FlowControl; /* flow control validated by the far-end */
cfb739b4 GKH	245	enum {
	246	NETIF_STATUS_INVALID = 0,
	247	NETIF_STATUS_MEDIA_CONNECT,
	248	NETIF_STATUS_MEDIA_DISCONNECT,
	249	NETIF_STATUS_MAX
	250	} MediaState;
	251	u8 DriverNoPhyAccess;
	252
	253	/* Minimize init-time */
cfb739b4	254	struct timer_list ErrorTimer;
cfb739b4	255	MP_POWER_MGMT PoMgmt;
2211b732	256	u32 CachedMaskValue;
cfb739b4	257
cfb739b4 GKH	258	/* Xcvr status at last poll */
	259	MI_BMSR_t Bmsr;
	260
	261	/* Tx Memory Variables */
	262	TX_RING_t TxRing;
	263
	264	/* Rx Memory Variables */
	265	RX_RING_t RxRing;
	266
cfb739b4	267	/* Loopback specifics */
64f93036 AC	268	u8 ReplicaPhyLoopbk; /* Replica Enable */
64f93036 AC	269	u8 ReplicaPhyLoopbkPF; /* Replica Enable Pass/Fail */
cfb739b4 GKH	270
	271	/* Stats */
	272	CE_STATS_t Stats;
	273
	274	struct net_device_stats net_stats;
	275	struct net_device_stats net_stats_prev;
	276	};
	277
cfb739b4	278	#endif /* __ET131X_ADAPTER_H__ */