[deliverable/linux.git] / drivers / staging / fbtft / fb_pcd8544.c

/*
 * FB driver for the PCD8544 LCD Controller
 *
 * The display is monochrome and the video memory is RGB565.
 * Any pixel value except 0 turns the pixel on.
 *
 * Copyright (C) 2013 Noralf Tronnes
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/spi/spi.h>
#include <linux/delay.h>

#include "fbtft.h"

#define DRVNAME	       "fb_pcd8544"
#define WIDTH          84
#define HEIGHT         48
#define TXBUFLEN       (84*6)
#define DEFAULT_GAMMA  "40" /* gamma is used to control contrast in this driver */

static unsigned tc;
module_param(tc, uint, 0);
MODULE_PARM_DESC(tc, "TC[1:0] Temperature coefficient: 0-3 (default: 0)");

static unsigned bs = 4;
module_param(bs, uint, 0);
MODULE_PARM_DESC(bs, "BS[2:0] Bias voltage level: 0-7 (default: 4)");


static int init_display(struct fbtft_par *par)
{
	fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);

	par->fbtftops.reset(par);

	/* Function set */
	write_reg(par, 0x21); /* 5:1  1
	                         2:0  PD - Powerdown control: chip is active
							 1:0  V  - Entry mode: horizontal addressing
							 0:1  H  - Extended instruction set control: extended
						  */

	/* H=1 Temperature control */
	write_reg(par, 0x04 | (tc & 0x3)); /*
	                         2:1  1
	                         1:x  TC1 - Temperature Coefficient: 0x10
							 0:x  TC0
						  */

	/* H=1 Bias system */
	write_reg(par, 0x10 | (bs & 0x7)); /*
	                         4:1  1
	                         3:0  0
							 2:x  BS2 - Bias System
							 1:x  BS1
							 0:x  BS0
	                      */

	/* Function set */
	write_reg(par, 0x22); /* 5:1  1
	                         2:0  PD - Powerdown control: chip is active
							 1:1  V  - Entry mode: vertical addressing
							 0:0  H  - Extended instruction set control: basic
						  */

	/* H=0 Display control */
	write_reg(par, 0x08 | 4); /*
	                         3:1  1
	                         2:1  D  - DE: 10=normal mode
							 1:0  0
							 0:0  E
						  */

	return 0;
}

static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
{
	fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par, "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n",
		      __func__, xs, ys, xe, ye);

	/* H=0 Set X address of RAM */
	write_reg(par, 0x80); /* 7:1  1
	                         6-0: X[6:0] - 0x00
	                      */

	/* H=0 Set Y address of RAM */
	write_reg(par, 0x40); /* 7:0  0
	                         6:1  1
	                         2-0: Y[2:0] - 0x0
	                      */
}

static int write_vmem(struct fbtft_par *par, size_t offset, size_t len)
{
	u16 *vmem16 = (u16 *)par->info->screen_base;
	u8 *buf = par->txbuf.buf;
	int x, y, i;
	int ret = 0;

	fbtft_par_dbg(DEBUG_WRITE_VMEM, par, "%s()\n", __func__);

	for (x = 0; x < 84; x++) {
		for (y = 0; y < 6; y++) {
			*buf = 0x00;
			for (i = 0; i < 8; i++)
				*buf |= (vmem16[(y*8+i)*84+x] ? 1 : 0) << i;
			buf++;
		}
	}

	/* Write data */
	gpio_set_value(par->gpio.dc, 1);
	ret = par->fbtftops.write(par, par->txbuf.buf, 6*84);
	if (ret < 0)
		dev_err(par->info->device, "write failed and returned: %d\n",
			ret);

	return ret;
}

static int set_gamma(struct fbtft_par *par, unsigned long *curves)
{
	fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);

	/* apply mask */
	curves[0] &= 0x7F;

	write_reg(par, 0x23); /* turn on extended instruction set */
	write_reg(par, 0x80 | curves[0]);
	write_reg(par, 0x22); /* turn off extended instruction set */

	return 0;
}


static struct fbtft_display display = {
	.regwidth = 8,
	.width = WIDTH,
	.height = HEIGHT,
	.txbuflen = TXBUFLEN,
	.gamma_num = 1,
	.gamma_len = 1,
	.gamma = DEFAULT_GAMMA,
	.fbtftops = {
		.init_display = init_display,
		.set_addr_win = set_addr_win,
		.write_vmem = write_vmem,
		.set_gamma = set_gamma,
	},
	.backlight = 1,
};
FBTFT_REGISTER_DRIVER(DRVNAME, "philips,pdc8544", &display);

MODULE_ALIAS("spi:" DRVNAME);
MODULE_ALIAS("spi:pdc8544");

MODULE_DESCRIPTION("FB driver for the PCD8544 LCD Controller");
MODULE_AUTHOR("Noralf Tronnes");
MODULE_LICENSE("GPL");
Commit	Line	Data
39c39072 TP	1	/*
	2	* FB driver for the PCD8544 LCD Controller
	3	*
	4	* The display is monochrome and the video memory is RGB565.
	5	* Any pixel value except 0 turns the pixel on.
	6	*
	7	* Copyright (C) 2013 Noralf Tronnes
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	22	*/
	23
	24	#include <linux/module.h>
	25	#include <linux/kernel.h>
	26	#include <linux/init.h>
	27	#include <linux/gpio.h>
	28	#include <linux/spi/spi.h>
	29	#include <linux/delay.h>
	30
	31	#include "fbtft.h"
	32
	33	#define DRVNAME "fb_pcd8544"
	34	#define WIDTH 84
	35	#define HEIGHT 48
8ccf1553	36	#define TXBUFLEN (84*6)
39c39072 TP	37	#define DEFAULT_GAMMA "40" /* gamma is used to control contrast in this driver */
39c39072 TP	38
9b37a8a7	39	static unsigned tc;
39c39072 TP	40	module_param(tc, uint, 0);
	41	MODULE_PARM_DESC(tc, "TC[1:0] Temperature coefficient: 0-3 (default: 0)");
	42
	43	static unsigned bs = 4;
	44	module_param(bs, uint, 0);
	45	MODULE_PARM_DESC(bs, "BS[2:0] Bias voltage level: 0-7 (default: 4)");
	46
	47
	48	static int init_display(struct fbtft_par *par)
	49	{
	50	fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
	51
	52	par->fbtftops.reset(par);
	53
	54	/* Function set */
	55	write_reg(par, 0x21); /* 5:1 1
	56	2:0 PD - Powerdown control: chip is active
	57	1:0 V - Entry mode: horizontal addressing
	58	0:1 H - Extended instruction set control: extended
	59	*/
	60
	61	/* H=1 Temperature control */
b5480f7e	62	write_reg(par, 0x04 \| (tc & 0x3)); /*
39c39072 TP	63	2:1 1
	64	1:x TC1 - Temperature Coefficient: 0x10
	65	0:x TC0
	66	*/
	67
	68	/* H=1 Bias system */
b5480f7e	69	write_reg(par, 0x10 \| (bs & 0x7)); /*
39c39072 TP	70	4:1 1
	71	3:0 0
	72	2:x BS2 - Bias System
	73	1:x BS1
	74	0:x BS0
	75	*/
	76
	77	/* Function set */
	78	write_reg(par, 0x22); /* 5:1 1
	79	2:0 PD - Powerdown control: chip is active
	80	1:1 V - Entry mode: vertical addressing
	81	0:0 H - Extended instruction set control: basic
	82	*/
	83
	84	/* H=0 Display control */
b5480f7e	85	write_reg(par, 0x08 \| 4); /*
39c39072 TP	86	3:1 1
	87	2:1 D - DE: 10=normal mode
	88	1:0 0
	89	0:0 E
	90	*/
	91
	92	return 0;
	93	}
	94
	95	static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
	96	{
14cf23b1 CM	97	fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par, "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n",
14cf23b1 CM	98	__func__, xs, ys, xe, ye);
39c39072 TP	99
	100	/* H=0 Set X address of RAM */
	101	write_reg(par, 0x80); /* 7:1 1
	102	6-0: X[6:0] - 0x00
	103	*/
	104
	105	/* H=0 Set Y address of RAM */
	106	write_reg(par, 0x40); /* 7:0 0
	107	6:1 1
	108	2-0: Y[2:0] - 0x0
	109	*/
	110	}
	111
	112	static int write_vmem(struct fbtft_par *par, size_t offset, size_t len)
	113	{
	114	u16 vmem16 = (u16 )par->info->screen_base;
	115	u8 *buf = par->txbuf.buf;
	116	int x, y, i;
	117	int ret = 0;
	118
	119	fbtft_par_dbg(DEBUG_WRITE_VMEM, par, "%s()\n", __func__);
	120
e82fb2b1 HA	121	for (x = 0; x < 84; x++) {
e82fb2b1 HA	122	for (y = 0; y < 6; y++) {
39c39072	123	*buf = 0x00;
9d1d0a38	124	for (i = 0; i < 8; i++)
39c39072	125	buf \|= (vmem16[(y8+i)*84+x] ? 1 : 0) << i;
39c39072 TP	126	buf++;
	127	}
	128	}
	129
	130	/* Write data */
	131	gpio_set_value(par->gpio.dc, 1);
	132	ret = par->fbtftops.write(par, par->txbuf.buf, 6*84);
	133	if (ret < 0)
aed1c72e HM	134	dev_err(par->info->device, "write failed and returned: %d\n",
aed1c72e HM	135	ret);
39c39072 TP	136
	137	return ret;
	138	}
	139
	140	static int set_gamma(struct fbtft_par par, unsigned long curves)
	141	{
	142	fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
	143
	144	/* apply mask */
	145	curves[0] &= 0x7F;
	146
	147	write_reg(par, 0x23); /* turn on extended instruction set */
	148	write_reg(par, 0x80 \| curves[0]);
	149	write_reg(par, 0x22); /* turn off extended instruction set */
	150
	151	return 0;
	152	}
	153
	154
	155	static struct fbtft_display display = {
	156	.regwidth = 8,
	157	.width = WIDTH,
	158	.height = HEIGHT,
	159	.txbuflen = TXBUFLEN,
	160	.gamma_num = 1,
	161	.gamma_len = 1,
	162	.gamma = DEFAULT_GAMMA,
	163	.fbtftops = {
	164	.init_display = init_display,
	165	.set_addr_win = set_addr_win,
	166	.write_vmem = write_vmem,
	167	.set_gamma = set_gamma,
	168	},
	169	.backlight = 1,
	170	};
	171	FBTFT_REGISTER_DRIVER(DRVNAME, "philips,pdc8544", &display);
	172
	173	MODULE_ALIAS("spi:" DRVNAME);
	174	MODULE_ALIAS("spi:pdc8544");
	175
	176	MODULE_DESCRIPTION("FB driver for the PCD8544 LCD Controller");
	177	MODULE_AUTHOR("Noralf Tronnes");
	178	MODULE_LICENSE("GPL");