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679c2c75 GR |
1 | /* |
2 | * Freescale Management Complex (MC) bus driver MSI support | |
3 | * | |
4 | * Copyright (C) 2015 Freescale Semiconductor, Inc. | |
5 | * Author: German Rivera <German.Rivera@freescale.com> | |
6 | * | |
7 | * This file is licensed under the terms of the GNU General Public | |
8 | * License version 2. This program is licensed "as is" without any | |
9 | * warranty of any kind, whether express or implied. | |
10 | */ | |
11 | ||
679c2c75 GR |
12 | #include <linux/of_device.h> |
13 | #include <linux/of_address.h> | |
14 | #include <linux/irqchip/arm-gic-v3.h> | |
15 | #include <linux/of_irq.h> | |
16 | #include <linux/irq.h> | |
17 | #include <linux/irqdomain.h> | |
18 | #include <linux/msi.h> | |
d4e75132 | 19 | #include "../include/mc-bus.h" |
679c2c75 | 20 | |
adf72b5b SY |
21 | /* |
22 | * Generate a unique ID identifying the interrupt (only used within the MSI | |
23 | * irqdomain. Combine the icid with the interrupt index. | |
24 | */ | |
25 | static irq_hw_number_t fsl_mc_domain_calc_hwirq(struct fsl_mc_device *dev, | |
26 | struct msi_desc *desc) | |
27 | { | |
28 | /* | |
29 | * Make the base hwirq value for ICID*10000 so it is readable | |
30 | * as a decimal value in /proc/interrupts. | |
31 | */ | |
32 | return (irq_hw_number_t)(desc->fsl_mc.msi_index + (dev->icid * 10000)); | |
33 | } | |
34 | ||
679c2c75 GR |
35 | static void fsl_mc_msi_set_desc(msi_alloc_info_t *arg, |
36 | struct msi_desc *desc) | |
37 | { | |
38 | arg->desc = desc; | |
adf72b5b SY |
39 | arg->hwirq = fsl_mc_domain_calc_hwirq(to_fsl_mc_device(desc->dev), |
40 | desc); | |
679c2c75 GR |
41 | } |
42 | ||
43 | static void fsl_mc_msi_update_dom_ops(struct msi_domain_info *info) | |
44 | { | |
45 | struct msi_domain_ops *ops = info->ops; | |
46 | ||
47 | if (WARN_ON(!ops)) | |
48 | return; | |
49 | ||
50 | /* | |
51 | * set_desc should not be set by the caller | |
52 | */ | |
33ea58a9 MB |
53 | if (ops->set_desc == NULL) |
54 | ops->set_desc = fsl_mc_msi_set_desc; | |
679c2c75 GR |
55 | } |
56 | ||
57 | static void __fsl_mc_msi_write_msg(struct fsl_mc_device *mc_bus_dev, | |
58 | struct fsl_mc_device_irq *mc_dev_irq) | |
59 | { | |
60 | int error; | |
61 | struct fsl_mc_device *owner_mc_dev = mc_dev_irq->mc_dev; | |
62 | struct msi_desc *msi_desc = mc_dev_irq->msi_desc; | |
63 | struct dprc_irq_cfg irq_cfg; | |
64 | ||
65 | /* | |
66 | * msi_desc->msg.address is 0x0 when this function is invoked in | |
67 | * the free_irq() code path. In this case, for the MC, we don't | |
68 | * really need to "unprogram" the MSI, so we just return. | |
69 | */ | |
70 | if (msi_desc->msg.address_lo == 0x0 && msi_desc->msg.address_hi == 0x0) | |
71 | return; | |
72 | ||
73 | if (WARN_ON(!owner_mc_dev)) | |
74 | return; | |
75 | ||
76 | irq_cfg.paddr = ((u64)msi_desc->msg.address_hi << 32) | | |
77 | msi_desc->msg.address_lo; | |
78 | irq_cfg.val = msi_desc->msg.data; | |
ac061998 | 79 | irq_cfg.irq_num = msi_desc->irq; |
679c2c75 GR |
80 | |
81 | if (owner_mc_dev == mc_bus_dev) { | |
82 | /* | |
83 | * IRQ is for the mc_bus_dev's DPRC itself | |
84 | */ | |
85 | error = dprc_set_irq(mc_bus_dev->mc_io, | |
86 | MC_CMD_FLAG_INTR_DIS | MC_CMD_FLAG_PRI, | |
87 | mc_bus_dev->mc_handle, | |
88 | mc_dev_irq->dev_irq_index, | |
89 | &irq_cfg); | |
90 | if (error < 0) { | |
91 | dev_err(&owner_mc_dev->dev, | |
92 | "dprc_set_irq() failed: %d\n", error); | |
93 | } | |
94 | } else { | |
95 | /* | |
96 | * IRQ is for for a child device of mc_bus_dev | |
97 | */ | |
98 | error = dprc_set_obj_irq(mc_bus_dev->mc_io, | |
99 | MC_CMD_FLAG_INTR_DIS | MC_CMD_FLAG_PRI, | |
100 | mc_bus_dev->mc_handle, | |
101 | owner_mc_dev->obj_desc.type, | |
102 | owner_mc_dev->obj_desc.id, | |
103 | mc_dev_irq->dev_irq_index, | |
104 | &irq_cfg); | |
105 | if (error < 0) { | |
106 | dev_err(&owner_mc_dev->dev, | |
107 | "dprc_obj_set_irq() failed: %d\n", error); | |
108 | } | |
109 | } | |
110 | } | |
111 | ||
112 | /* | |
113 | * NOTE: This function is invoked with interrupts disabled | |
114 | */ | |
115 | static void fsl_mc_msi_write_msg(struct irq_data *irq_data, | |
116 | struct msi_msg *msg) | |
117 | { | |
118 | struct msi_desc *msi_desc = irq_data_get_msi_desc(irq_data); | |
119 | struct fsl_mc_device *mc_bus_dev = to_fsl_mc_device(msi_desc->dev); | |
120 | struct fsl_mc_bus *mc_bus = to_fsl_mc_bus(mc_bus_dev); | |
121 | struct fsl_mc_device_irq *mc_dev_irq = | |
122 | &mc_bus->irq_resources[msi_desc->fsl_mc.msi_index]; | |
123 | ||
124 | WARN_ON(mc_dev_irq->msi_desc != msi_desc); | |
125 | msi_desc->msg = *msg; | |
126 | ||
127 | /* | |
128 | * Program the MSI (paddr, value) pair in the device: | |
129 | */ | |
130 | __fsl_mc_msi_write_msg(mc_bus_dev, mc_dev_irq); | |
131 | } | |
132 | ||
133 | static void fsl_mc_msi_update_chip_ops(struct msi_domain_info *info) | |
134 | { | |
135 | struct irq_chip *chip = info->chip; | |
136 | ||
137 | if (WARN_ON((!chip))) | |
138 | return; | |
139 | ||
140 | /* | |
141 | * irq_write_msi_msg should not be set by the caller | |
142 | */ | |
33ea58a9 MB |
143 | if (chip->irq_write_msi_msg == NULL) |
144 | chip->irq_write_msi_msg = fsl_mc_msi_write_msg; | |
679c2c75 GR |
145 | } |
146 | ||
147 | /** | |
148 | * fsl_mc_msi_create_irq_domain - Create a fsl-mc MSI interrupt domain | |
149 | * @np: Optional device-tree node of the interrupt controller | |
150 | * @info: MSI domain info | |
151 | * @parent: Parent irq domain | |
152 | * | |
153 | * Updates the domain and chip ops and creates a fsl-mc MSI | |
154 | * interrupt domain. | |
155 | * | |
156 | * Returns: | |
157 | * A domain pointer or NULL in case of failure. | |
158 | */ | |
159 | struct irq_domain *fsl_mc_msi_create_irq_domain(struct fwnode_handle *fwnode, | |
160 | struct msi_domain_info *info, | |
161 | struct irq_domain *parent) | |
162 | { | |
163 | struct irq_domain *domain; | |
164 | ||
165 | if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS) | |
166 | fsl_mc_msi_update_dom_ops(info); | |
167 | if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS) | |
168 | fsl_mc_msi_update_chip_ops(info); | |
169 | ||
170 | domain = msi_create_irq_domain(fwnode, info, parent); | |
171 | if (domain) | |
172 | domain->bus_token = DOMAIN_BUS_FSL_MC_MSI; | |
173 | ||
174 | return domain; | |
175 | } | |
176 | ||
177 | int fsl_mc_find_msi_domain(struct device *mc_platform_dev, | |
178 | struct irq_domain **mc_msi_domain) | |
179 | { | |
180 | struct irq_domain *msi_domain; | |
181 | struct device_node *mc_of_node = mc_platform_dev->of_node; | |
182 | ||
183 | msi_domain = of_msi_get_domain(mc_platform_dev, mc_of_node, | |
184 | DOMAIN_BUS_FSL_MC_MSI); | |
185 | if (!msi_domain) { | |
186 | pr_err("Unable to find fsl-mc MSI domain for %s\n", | |
187 | mc_of_node->full_name); | |
188 | ||
189 | return -ENOENT; | |
190 | } | |
191 | ||
192 | *mc_msi_domain = msi_domain; | |
193 | return 0; | |
194 | } | |
195 | ||
196 | static void fsl_mc_msi_free_descs(struct device *dev) | |
197 | { | |
198 | struct msi_desc *desc, *tmp; | |
199 | ||
200 | list_for_each_entry_safe(desc, tmp, dev_to_msi_list(dev), list) { | |
201 | list_del(&desc->list); | |
202 | free_msi_entry(desc); | |
203 | } | |
204 | } | |
205 | ||
206 | static int fsl_mc_msi_alloc_descs(struct device *dev, unsigned int irq_count) | |
207 | ||
208 | { | |
209 | unsigned int i; | |
210 | int error; | |
211 | struct msi_desc *msi_desc; | |
212 | ||
213 | for (i = 0; i < irq_count; i++) { | |
214 | msi_desc = alloc_msi_entry(dev); | |
215 | if (!msi_desc) { | |
216 | dev_err(dev, "Failed to allocate msi entry\n"); | |
217 | error = -ENOMEM; | |
218 | goto cleanup_msi_descs; | |
219 | } | |
220 | ||
221 | msi_desc->fsl_mc.msi_index = i; | |
222 | msi_desc->nvec_used = 1; | |
223 | INIT_LIST_HEAD(&msi_desc->list); | |
224 | list_add_tail(&msi_desc->list, dev_to_msi_list(dev)); | |
225 | } | |
226 | ||
227 | return 0; | |
228 | ||
229 | cleanup_msi_descs: | |
230 | fsl_mc_msi_free_descs(dev); | |
231 | return error; | |
232 | } | |
233 | ||
234 | int fsl_mc_msi_domain_alloc_irqs(struct device *dev, | |
235 | unsigned int irq_count) | |
236 | { | |
237 | struct irq_domain *msi_domain; | |
238 | int error; | |
239 | ||
240 | if (WARN_ON(!list_empty(dev_to_msi_list(dev)))) | |
241 | return -EINVAL; | |
242 | ||
243 | error = fsl_mc_msi_alloc_descs(dev, irq_count); | |
244 | if (error < 0) | |
245 | return error; | |
246 | ||
247 | msi_domain = dev_get_msi_domain(dev); | |
248 | if (WARN_ON(!msi_domain)) { | |
249 | error = -EINVAL; | |
250 | goto cleanup_msi_descs; | |
251 | } | |
252 | ||
253 | /* | |
254 | * NOTE: Calling this function will trigger the invocation of the | |
255 | * its_fsl_mc_msi_prepare() callback | |
256 | */ | |
257 | error = msi_domain_alloc_irqs(msi_domain, dev, irq_count); | |
258 | ||
259 | if (error) { | |
260 | dev_err(dev, "Failed to allocate IRQs\n"); | |
261 | goto cleanup_msi_descs; | |
262 | } | |
263 | ||
264 | return 0; | |
265 | ||
266 | cleanup_msi_descs: | |
267 | fsl_mc_msi_free_descs(dev); | |
268 | return error; | |
269 | } | |
270 | ||
271 | void fsl_mc_msi_domain_free_irqs(struct device *dev) | |
272 | { | |
273 | struct irq_domain *msi_domain; | |
274 | ||
275 | msi_domain = dev_get_msi_domain(dev); | |
276 | if (WARN_ON(!msi_domain)) | |
277 | return; | |
278 | ||
279 | msi_domain_free_irqs(msi_domain, dev); | |
280 | ||
281 | if (WARN_ON(list_empty(dev_to_msi_list(dev)))) | |
282 | return; | |
283 | ||
284 | fsl_mc_msi_free_descs(dev); | |
285 | } |