Commit | Line | Data |
---|---|---|
ddaecd5b | 1 | /* |
f22c1cf0 | 2 | * AD7291 8-Channel, I2C, 12-Bit SAR ADC with Temperature Sensor |
ddaecd5b | 3 | * |
f22c1cf0 | 4 | * Copyright 2010-2011 Analog Devices Inc. |
ddaecd5b SZ |
5 | * |
6 | * Licensed under the GPL-2 or later. | |
7 | */ | |
8 | ||
9 | #include <linux/interrupt.h> | |
ddaecd5b SZ |
10 | #include <linux/device.h> |
11 | #include <linux/kernel.h> | |
12 | #include <linux/slab.h> | |
13 | #include <linux/sysfs.h> | |
ddaecd5b | 14 | #include <linux/i2c.h> |
99c97852 | 15 | #include <linux/module.h> |
4fd24247 | 16 | #include <linux/mutex.h> |
ddaecd5b SZ |
17 | |
18 | #include "../iio.h" | |
19 | #include "../sysfs.h" | |
20 | ||
4fd24247 JC |
21 | /* |
22 | * Simplified handling | |
23 | * | |
24 | * If no events enabled - single polled channel read | |
25 | * If event enabled direct reads disable unless channel | |
26 | * is in the read mask. | |
27 | * | |
28 | * The noise-delayed bit as per datasheet suggestion is always enabled. | |
29 | * | |
30 | * Extref control should be based on regulator provision - not handled. | |
31 | */ | |
ddaecd5b SZ |
32 | /* |
33 | * AD7291 registers definition | |
34 | */ | |
35 | #define AD7291_COMMAND 0 | |
36 | #define AD7291_VOLTAGE 1 | |
37 | #define AD7291_T_SENSE 2 | |
38 | #define AD7291_T_AVERAGE 3 | |
39 | #define AD7291_VOLTAGE_LIMIT_BASE 4 | |
40 | #define AD7291_VOLTAGE_LIMIT_COUNT 8 | |
00feefbb MH |
41 | #define AD7291_T_SENSE_HIGH 0x1C |
42 | #define AD7291_T_SENSE_LOW 0x1D | |
43 | #define AD7291_T_SENSE_HYST 0x1E | |
44 | #define AD7291_VOLTAGE_ALERT_STATUS 0x1F | |
ddaecd5b SZ |
45 | #define AD7291_T_ALERT_STATUS 0x20 |
46 | ||
47 | /* | |
48 | * AD7291 command | |
49 | */ | |
00feefbb MH |
50 | #define AD7291_AUTOCYCLE (1 << 0) |
51 | #define AD7291_RESET (1 << 1) | |
52 | #define AD7291_ALERT_CLEAR (1 << 2) | |
53 | #define AD7291_ALERT_POLARITY (1 << 3) | |
54 | #define AD7291_EXT_REF (1 << 4) | |
55 | #define AD7291_NOISE_DELAY (1 << 5) | |
56 | #define AD7291_T_SENSE_MASK (1 << 7) | |
57 | #define AD7291_VOLTAGE_MASK 0xFF00 | |
ddaecd5b SZ |
58 | #define AD7291_VOLTAGE_OFFSET 0x8 |
59 | ||
60 | /* | |
61 | * AD7291 value masks | |
62 | */ | |
00feefbb MH |
63 | #define AD7291_CHANNEL_MASK 0xF000 |
64 | #define AD7291_VALUE_MASK 0xFFF | |
ddaecd5b SZ |
65 | #define AD7291_T_VALUE_SIGN 0x400 |
66 | #define AD7291_T_VALUE_FLOAT_OFFSET 2 | |
67 | #define AD7291_T_VALUE_FLOAT_MASK 0x2 | |
68 | ||
ddaecd5b | 69 | struct ad7291_chip_info { |
ddaecd5b | 70 | struct i2c_client *client; |
ddaecd5b | 71 | u16 command; |
4fd24247 JC |
72 | u8 c_mask; /* Active voltage channels for events */ |
73 | struct mutex state_lock; | |
ddaecd5b SZ |
74 | }; |
75 | ||
ddaecd5b SZ |
76 | static int ad7291_i2c_read(struct ad7291_chip_info *chip, u8 reg, u16 *data) |
77 | { | |
78 | struct i2c_client *client = chip->client; | |
79 | int ret = 0; | |
80 | ||
81 | ret = i2c_smbus_read_word_data(client, reg); | |
82 | if (ret < 0) { | |
83 | dev_err(&client->dev, "I2C read error\n"); | |
84 | return ret; | |
85 | } | |
86 | ||
87 | *data = swab16((u16)ret); | |
88 | ||
89 | return 0; | |
90 | } | |
91 | ||
92 | static int ad7291_i2c_write(struct ad7291_chip_info *chip, u8 reg, u16 data) | |
93 | { | |
4fd24247 | 94 | return i2c_smbus_write_word_data(chip->client, reg, swab16(data)); |
ddaecd5b SZ |
95 | } |
96 | ||
ddaecd5b SZ |
97 | static ssize_t ad7291_store_reset(struct device *dev, |
98 | struct device_attribute *attr, | |
99 | const char *buf, | |
100 | size_t len) | |
101 | { | |
102 | struct iio_dev *dev_info = dev_get_drvdata(dev); | |
d4397972 | 103 | struct ad7291_chip_info *chip = iio_priv(dev_info); |
ddaecd5b | 104 | |
4fd24247 JC |
105 | return ad7291_i2c_write(chip, AD7291_COMMAND, |
106 | chip->command | AD7291_RESET); | |
ddaecd5b SZ |
107 | } |
108 | ||
4fd24247 | 109 | static IIO_DEVICE_ATTR(reset, S_IWUSR, NULL, ad7291_store_reset, 0); |
ddaecd5b | 110 | |
ddaecd5b | 111 | static struct attribute *ad7291_attributes[] = { |
ddaecd5b | 112 | &iio_dev_attr_reset.dev_attr.attr, |
ddaecd5b SZ |
113 | NULL, |
114 | }; | |
115 | ||
116 | static const struct attribute_group ad7291_attribute_group = { | |
117 | .attrs = ad7291_attributes, | |
118 | }; | |
119 | ||
58c0323c | 120 | static irqreturn_t ad7291_event_handler(int irq, void *private) |
ddaecd5b | 121 | { |
58c0323c | 122 | struct iio_dev *indio_dev = private; |
d4397972 | 123 | struct ad7291_chip_info *chip = iio_priv(private); |
ddaecd5b SZ |
124 | u16 t_status, v_status; |
125 | u16 command; | |
126 | int i; | |
58c0323c | 127 | s64 timestamp = iio_get_time_ns(); |
ddaecd5b SZ |
128 | |
129 | if (ad7291_i2c_read(chip, AD7291_T_ALERT_STATUS, &t_status)) | |
58c0323c | 130 | return IRQ_HANDLED; |
ddaecd5b SZ |
131 | |
132 | if (ad7291_i2c_read(chip, AD7291_VOLTAGE_ALERT_STATUS, &v_status)) | |
58c0323c | 133 | return IRQ_HANDLED; |
ddaecd5b SZ |
134 | |
135 | if (!(t_status || v_status)) | |
58c0323c | 136 | return IRQ_HANDLED; |
ddaecd5b | 137 | |
f22c1cf0 | 138 | command = chip->command | AD7291_ALERT_CLEAR; |
ddaecd5b SZ |
139 | ad7291_i2c_write(chip, AD7291_COMMAND, command); |
140 | ||
f22c1cf0 | 141 | command = chip->command & ~AD7291_ALERT_CLEAR; |
ddaecd5b SZ |
142 | ad7291_i2c_write(chip, AD7291_COMMAND, command); |
143 | ||
4fd24247 JC |
144 | /* For now treat t_sense and t_sense_average the same */ |
145 | if ((t_status & (1 << 0)) || (t_status & (1 << 2))) | |
5aa96188 | 146 | iio_push_event(indio_dev, |
b206c3bb JC |
147 | IIO_UNMOD_EVENT_CODE(IIO_TEMP, |
148 | 0, | |
149 | IIO_EV_TYPE_THRESH, | |
150 | IIO_EV_DIR_FALLING), | |
151 | timestamp); | |
4fd24247 | 152 | if ((t_status & (1 << 1)) || (t_status & (1 << 3))) |
5aa96188 | 153 | iio_push_event(indio_dev, |
b206c3bb JC |
154 | IIO_UNMOD_EVENT_CODE(IIO_TEMP, |
155 | 0, | |
156 | IIO_EV_TYPE_THRESH, | |
157 | IIO_EV_DIR_RISING), | |
158 | timestamp); | |
159 | ||
160 | for (i = 0; i < AD7291_VOLTAGE_LIMIT_COUNT*2; i += 2) { | |
ddaecd5b | 161 | if (v_status & (1 << i)) |
5aa96188 | 162 | iio_push_event(indio_dev, |
b206c3bb JC |
163 | IIO_UNMOD_EVENT_CODE(IIO_IN, |
164 | i/2, | |
165 | IIO_EV_TYPE_THRESH, | |
166 | IIO_EV_DIR_FALLING), | |
167 | timestamp); | |
168 | if (v_status & (1 << (i + 1))) | |
5aa96188 | 169 | iio_push_event(indio_dev, |
b206c3bb JC |
170 | IIO_UNMOD_EVENT_CODE(IIO_IN, |
171 | i/2, | |
172 | IIO_EV_TYPE_THRESH, | |
173 | IIO_EV_DIR_RISING), | |
174 | timestamp); | |
ddaecd5b | 175 | } |
ddaecd5b | 176 | |
58c0323c | 177 | return IRQ_HANDLED; |
ddaecd5b SZ |
178 | } |
179 | ||
4fd24247 | 180 | static inline ssize_t ad7291_show_hyst(struct device *dev, |
ddaecd5b | 181 | struct device_attribute *attr, |
ddaecd5b SZ |
182 | char *buf) |
183 | { | |
184 | struct iio_dev *dev_info = dev_get_drvdata(dev); | |
d4397972 | 185 | struct ad7291_chip_info *chip = iio_priv(dev_info); |
58c0323c | 186 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
ddaecd5b | 187 | u16 data; |
ddaecd5b SZ |
188 | int ret; |
189 | ||
58c0323c | 190 | ret = ad7291_i2c_read(chip, this_attr->address, &data); |
4fd24247 JC |
191 | if (ret < 0) |
192 | return ret; | |
ddaecd5b | 193 | |
4fd24247 | 194 | return sprintf(buf, "%d\n", data & 0x0FFF); |
ddaecd5b SZ |
195 | } |
196 | ||
4fd24247 JC |
197 | static inline ssize_t ad7291_set_hyst(struct device *dev, |
198 | struct device_attribute *attr, | |
199 | const char *buf, | |
200 | size_t len) | |
ddaecd5b SZ |
201 | { |
202 | struct iio_dev *dev_info = dev_get_drvdata(dev); | |
d4397972 | 203 | struct ad7291_chip_info *chip = iio_priv(dev_info); |
58c0323c | 204 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
ddaecd5b | 205 | u16 data; |
ddaecd5b SZ |
206 | int ret; |
207 | ||
4fd24247 | 208 | ret = kstrtou16(buf, 10, &data); |
ddaecd5b | 209 | |
4fd24247 JC |
210 | if (ret < 0) |
211 | return ret; | |
212 | if (data < 4096) | |
ddaecd5b SZ |
213 | return -EINVAL; |
214 | ||
4fd24247 JC |
215 | return ad7291_i2c_write(chip, this_attr->address, data); |
216 | } | |
ddaecd5b | 217 | |
4fd24247 JC |
218 | static IIO_DEVICE_ATTR(in_temp0_thresh_both_hyst_raw, |
219 | S_IRUGO | S_IWUSR, | |
220 | ad7291_show_hyst, ad7291_set_hyst, | |
221 | AD7291_T_SENSE_HYST); | |
222 | static IIO_DEVICE_ATTR(in_voltage0_thresh_both_hyst_raw, | |
223 | S_IRUGO | S_IWUSR, | |
224 | ad7291_show_hyst, ad7291_set_hyst, 0x06); | |
225 | static IIO_DEVICE_ATTR(in_voltage1_thresh_both_hyst_raw, | |
226 | S_IRUGO | S_IWUSR, | |
227 | ad7291_show_hyst, ad7291_set_hyst, 0x09); | |
228 | static IIO_DEVICE_ATTR(in_voltage2_thresh_both_hyst_raw, | |
229 | S_IRUGO | S_IWUSR, | |
230 | ad7291_show_hyst, ad7291_set_hyst, 0x0C); | |
231 | static IIO_DEVICE_ATTR(in_voltage3_thresh_both_hyst_raw, | |
232 | S_IRUGO | S_IWUSR, | |
233 | ad7291_show_hyst, ad7291_set_hyst, 0x0F); | |
234 | static IIO_DEVICE_ATTR(in_voltage4_thresh_both_hyst_raw, | |
235 | S_IRUGO | S_IWUSR, | |
236 | ad7291_show_hyst, ad7291_set_hyst, 0x12); | |
237 | static IIO_DEVICE_ATTR(in_voltage5_thresh_both_hyst_raw, | |
238 | S_IRUGO | S_IWUSR, | |
239 | ad7291_show_hyst, ad7291_set_hyst, 0x15); | |
240 | static IIO_DEVICE_ATTR(in_voltage6_thresh_both_hyst_raw, | |
241 | S_IRUGO | S_IWUSR, | |
242 | ad7291_show_hyst, ad7291_set_hyst, 0x18); | |
243 | static IIO_DEVICE_ATTR(in_voltage7_thresh_both_hyst_raw, | |
244 | S_IRUGO | S_IWUSR, | |
245 | ad7291_show_hyst, ad7291_set_hyst, 0x1B); | |
ddaecd5b | 246 | |
4fd24247 JC |
247 | static struct attribute *ad7291_event_attributes[] = { |
248 | &iio_dev_attr_in_temp0_thresh_both_hyst_raw.dev_attr.attr, | |
249 | &iio_dev_attr_in_voltage0_thresh_both_hyst_raw.dev_attr.attr, | |
250 | &iio_dev_attr_in_voltage1_thresh_both_hyst_raw.dev_attr.attr, | |
251 | &iio_dev_attr_in_voltage2_thresh_both_hyst_raw.dev_attr.attr, | |
252 | &iio_dev_attr_in_voltage3_thresh_both_hyst_raw.dev_attr.attr, | |
253 | &iio_dev_attr_in_voltage4_thresh_both_hyst_raw.dev_attr.attr, | |
254 | &iio_dev_attr_in_voltage5_thresh_both_hyst_raw.dev_attr.attr, | |
255 | &iio_dev_attr_in_voltage6_thresh_both_hyst_raw.dev_attr.attr, | |
256 | &iio_dev_attr_in_voltage7_thresh_both_hyst_raw.dev_attr.attr, | |
257 | NULL, | |
258 | }; | |
ddaecd5b | 259 | |
4fd24247 JC |
260 | /* high / low */ |
261 | static u8 ad7291_limit_regs[9][2] = { | |
262 | { 0x04, 0x05 }, | |
263 | { 0x07, 0x08 }, | |
264 | { 0x0A, 0x0B }, | |
265 | { 0x0E, 0x0D }, /* note reversed order */ | |
266 | { 0x10, 0x11 }, | |
267 | { 0x13, 0x14 }, | |
268 | { 0x16, 0x17 }, | |
269 | { 0x19, 0x1A }, | |
270 | /* temp */ | |
271 | { 0x1C, 0x1D }, | |
272 | }; | |
ddaecd5b | 273 | |
4fd24247 JC |
274 | static int ad7291_read_event_value(struct iio_dev *indio_dev, |
275 | u64 event_code, | |
276 | int *val) | |
ddaecd5b | 277 | { |
4fd24247 | 278 | struct ad7291_chip_info *chip = iio_priv(indio_dev); |
ddaecd5b | 279 | |
4fd24247 JC |
280 | int ret; |
281 | u8 reg; | |
282 | u16 uval; | |
283 | s16 signval; | |
284 | ||
285 | switch (IIO_EVENT_CODE_EXTRACT_TYPE(event_code)) { | |
286 | case IIO_VOLTAGE: | |
287 | reg = ad7291_limit_regs[IIO_EVENT_CODE_EXTRACT_NUM(event_code)] | |
288 | [!(IIO_EVENT_CODE_EXTRACT_DIR(event_code) == | |
289 | IIO_EV_DIR_RISING)]; | |
290 | ||
291 | ret = ad7291_i2c_read(chip, reg, &uval); | |
292 | if (ret < 0) | |
293 | return ret; | |
294 | *val = swab16(uval) & 0x0FFF; | |
295 | return 0; | |
296 | ||
297 | case IIO_TEMP: | |
298 | reg = ad7291_limit_regs[8] | |
299 | [!(IIO_EVENT_CODE_EXTRACT_DIR(event_code) == | |
300 | IIO_EV_DIR_RISING)]; | |
301 | ||
302 | ret = ad7291_i2c_read(chip, reg, &signval); | |
303 | if (ret < 0) | |
304 | return ret; | |
305 | signval = (s16)((swab16(signval) & 0x0FFF) << 4) >> 4; | |
306 | *val = signval; | |
307 | return 0; | |
308 | default: | |
ddaecd5b | 309 | return -EINVAL; |
4fd24247 JC |
310 | }; |
311 | } | |
ddaecd5b | 312 | |
4fd24247 JC |
313 | static int ad7291_write_event_value(struct iio_dev *indio_dev, |
314 | u64 event_code, | |
315 | int val) | |
316 | { | |
317 | struct ad7291_chip_info *chip = iio_priv(indio_dev); | |
318 | u8 reg; | |
319 | s16 signval; | |
320 | ||
321 | switch (IIO_EVENT_CODE_EXTRACT_TYPE(event_code)) { | |
322 | case IIO_VOLTAGE: | |
323 | if (val > 0xFFF || val < 0) | |
324 | return -EINVAL; | |
325 | reg = ad7291_limit_regs[IIO_EVENT_CODE_EXTRACT_NUM(event_code)] | |
326 | [!(IIO_EVENT_CODE_EXTRACT_DIR(event_code) == | |
327 | IIO_EV_DIR_RISING)]; | |
ddaecd5b | 328 | |
4fd24247 | 329 | return ad7291_i2c_write(chip, reg, val); |
ddaecd5b | 330 | |
4fd24247 JC |
331 | case IIO_TEMP: |
332 | if (val > 2047 || val < -2048) | |
333 | return -EINVAL; | |
334 | reg = ad7291_limit_regs[8] | |
335 | [!(IIO_EVENT_CODE_EXTRACT_DIR(event_code) == | |
336 | IIO_EV_DIR_RISING)]; | |
337 | signval = val; | |
338 | return ad7291_i2c_write(chip, reg, *(u16 *)&signval); | |
339 | default: | |
340 | return -EINVAL; | |
341 | }; | |
ddaecd5b SZ |
342 | } |
343 | ||
4fd24247 JC |
344 | static int ad7291_read_event_config(struct iio_dev *indio_dev, |
345 | u64 event_code) | |
ddaecd5b | 346 | { |
4fd24247 JC |
347 | struct ad7291_chip_info *chip = iio_priv(indio_dev); |
348 | /* To be enabled the channel must simply be on. If any are enabled | |
349 | we are in continuous sampling mode */ | |
350 | ||
351 | switch (IIO_EVENT_CODE_EXTRACT_TYPE(event_code)) { | |
352 | case IIO_VOLTAGE: | |
353 | if (chip->c_mask & | |
354 | (1 << IIO_EVENT_CODE_EXTRACT_NUM(event_code))) | |
355 | return 1; | |
356 | else | |
357 | return 0; | |
358 | case IIO_TEMP: | |
359 | /* always on */ | |
360 | return 1; | |
361 | default: | |
ddaecd5b | 362 | return -EINVAL; |
4fd24247 | 363 | } |
ddaecd5b | 364 | |
4fd24247 | 365 | } |
ddaecd5b | 366 | |
4fd24247 JC |
367 | static int ad7291_write_event_config(struct iio_dev *indio_dev, |
368 | u64 event_code, | |
369 | int state) | |
370 | { | |
371 | int ret = 0; | |
372 | struct ad7291_chip_info *chip = iio_priv(indio_dev); | |
373 | u16 regval; | |
374 | ||
375 | mutex_lock(&chip->state_lock); | |
376 | regval = chip->command; | |
377 | /* | |
378 | * To be enabled the channel must simply be on. If any are enabled | |
379 | * use continuous sampling mode. | |
380 | * Possible to disable temp as well but that makes single read tricky. | |
381 | */ | |
382 | switch (IIO_EVENT_CODE_EXTRACT_TYPE(event_code)) { | |
383 | case IIO_VOLTAGE: | |
384 | if ((!state) && (chip->c_mask & | |
385 | (1 << IIO_EVENT_CODE_EXTRACT_NUM(event_code)))) | |
386 | chip->c_mask &= | |
387 | ~(1 << IIO_EVENT_CODE_EXTRACT_NUM(event_code)); | |
388 | else if (state && (!(chip->c_mask & | |
389 | (1 << IIO_EVENT_CODE_EXTRACT_NUM(event_code))))) | |
390 | chip->c_mask &= | |
391 | (1 << IIO_EVENT_CODE_EXTRACT_NUM(event_code)); | |
392 | else | |
393 | break; | |
394 | ||
395 | regval &= 0xFFFE; | |
396 | regval |= ((u16)chip->c_mask << 8); | |
397 | if (chip->c_mask) /* Enable autocycle? */ | |
398 | regval |= AD7291_AUTOCYCLE; | |
399 | ||
400 | ret = ad7291_i2c_write(chip, AD7291_COMMAND, regval); | |
401 | if (ret < 0) | |
402 | goto error_ret; | |
403 | ||
404 | chip->command = regval; | |
405 | break; | |
406 | default: | |
407 | ret = -EINVAL; | |
408 | } | |
ddaecd5b | 409 | |
4fd24247 JC |
410 | error_ret: |
411 | mutex_unlock(&chip->state_lock); | |
ddaecd5b SZ |
412 | return ret; |
413 | } | |
414 | ||
4fd24247 JC |
415 | static int ad7291_read_raw(struct iio_dev *indio_dev, |
416 | struct iio_chan_spec const *chan, | |
417 | int *val, | |
418 | int *val2, | |
419 | long mask) | |
420 | { | |
421 | int ret; | |
422 | struct ad7291_chip_info *chip = iio_priv(indio_dev); | |
423 | u16 regval; | |
424 | s16 signval; | |
425 | ||
426 | switch (mask) { | |
427 | case 0: | |
428 | switch (chan->type) { | |
429 | case IIO_VOLTAGE: | |
430 | mutex_lock(&chip->state_lock); | |
431 | /* If in autocycle mode drop through */ | |
432 | if (chip->command & 0x1) { | |
433 | mutex_unlock(&chip->state_lock); | |
434 | return -EBUSY; | |
435 | } | |
436 | /* Enable this channel alone */ | |
437 | regval = chip->command & (~AD7291_VOLTAGE_MASK); | |
e70ab218 | 438 | regval |= 1 << (15 - chan->channel); |
4fd24247 JC |
439 | ret = ad7291_i2c_write(chip, AD7291_COMMAND, regval); |
440 | if (ret < 0) { | |
441 | mutex_unlock(&chip->state_lock); | |
442 | return ret; | |
443 | } | |
444 | /* Read voltage */ | |
445 | ret = i2c_smbus_read_word_data(chip->client, | |
446 | AD7291_VOLTAGE); | |
447 | if (ret < 0) { | |
448 | mutex_unlock(&chip->state_lock); | |
449 | return ret; | |
450 | } | |
451 | *val = swab16((u16)ret) & 0x0FFF; | |
452 | mutex_unlock(&chip->state_lock); | |
453 | return IIO_VAL_INT; | |
454 | case IIO_TEMP: | |
455 | /* Assumes tsense bit of command register always set */ | |
456 | ret = i2c_smbus_read_word_data(chip->client, | |
457 | AD7291_T_SENSE); | |
458 | if (ret < 0) | |
459 | return ret; | |
460 | signval = (s16)((swab16((u16)ret) & 0x0FFF) << 4) >> 4; | |
461 | *val = signval; | |
462 | return IIO_VAL_INT; | |
463 | default: | |
464 | return -EINVAL; | |
465 | } | |
466 | case (1 << IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE): | |
467 | ret = i2c_smbus_read_word_data(chip->client, | |
468 | AD7291_T_AVERAGE); | |
469 | if (ret < 0) | |
470 | return ret; | |
471 | signval = (s16)((swab16((u16)ret) & 0x0FFF) << 4) >> 4; | |
472 | *val = signval; | |
473 | return IIO_VAL_INT; | |
474 | default: | |
475 | return -EINVAL; | |
476 | } | |
477 | } | |
ddaecd5b | 478 | |
4fd24247 JC |
479 | #define AD7291_VOLTAGE_CHAN(_chan) \ |
480 | { \ | |
481 | .type = IIO_VOLTAGE, \ | |
482 | .indexed = 1, \ | |
483 | .channel = _chan, \ | |
484 | .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING)|\ | |
485 | IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING) \ | |
486 | } | |
487 | ||
488 | static const struct iio_chan_spec ad7291_channels[] = { | |
489 | AD7291_VOLTAGE_CHAN(0), | |
490 | AD7291_VOLTAGE_CHAN(1), | |
491 | AD7291_VOLTAGE_CHAN(2), | |
492 | AD7291_VOLTAGE_CHAN(3), | |
493 | AD7291_VOLTAGE_CHAN(4), | |
494 | AD7291_VOLTAGE_CHAN(5), | |
495 | AD7291_VOLTAGE_CHAN(6), | |
496 | AD7291_VOLTAGE_CHAN(7), | |
497 | { | |
498 | .type = IIO_TEMP, | |
499 | .info_mask = (1 << IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE), | |
500 | .indexed = 1, | |
501 | .channel = 0, | |
502 | .event_mask = | |
503 | IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING)| | |
504 | IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING) | |
505 | } | |
ddaecd5b SZ |
506 | }; |
507 | ||
508 | static struct attribute_group ad7291_event_attribute_group = { | |
509 | .attrs = ad7291_event_attributes, | |
510 | }; | |
511 | ||
6fe8135f JC |
512 | static const struct iio_info ad7291_info = { |
513 | .attrs = &ad7291_attribute_group, | |
4fd24247 JC |
514 | .read_raw = &ad7291_read_raw, |
515 | .read_event_config = &ad7291_read_event_config, | |
516 | .write_event_config = &ad7291_write_event_config, | |
517 | .read_event_value = &ad7291_read_event_value, | |
518 | .write_event_value = &ad7291_write_event_value, | |
6fe8135f JC |
519 | .event_attrs = &ad7291_event_attribute_group, |
520 | }; | |
521 | ||
ddaecd5b SZ |
522 | static int __devinit ad7291_probe(struct i2c_client *client, |
523 | const struct i2c_device_id *id) | |
524 | { | |
525 | struct ad7291_chip_info *chip; | |
d4397972 | 526 | struct iio_dev *indio_dev; |
ddaecd5b SZ |
527 | int ret = 0; |
528 | ||
d4397972 JC |
529 | indio_dev = iio_allocate_device(sizeof(*chip)); |
530 | if (indio_dev == NULL) { | |
531 | ret = -ENOMEM; | |
532 | goto error_ret; | |
533 | } | |
03bda05d | 534 | chip = iio_priv(indio_dev); |
4fd24247 | 535 | mutex_init(&chip->state_lock); |
ddaecd5b | 536 | /* this is only used for device removal purposes */ |
d4397972 | 537 | i2c_set_clientdata(client, indio_dev); |
ddaecd5b SZ |
538 | |
539 | chip->client = client; | |
4fd24247 | 540 | /* Tsense always enabled */ |
ddaecd5b SZ |
541 | chip->command = AD7291_NOISE_DELAY | AD7291_T_SENSE_MASK; |
542 | ||
d4397972 | 543 | indio_dev->name = id->name; |
4fd24247 JC |
544 | indio_dev->channels = ad7291_channels; |
545 | indio_dev->num_channels = ARRAY_SIZE(ad7291_channels); | |
546 | ||
d4397972 JC |
547 | indio_dev->dev.parent = &client->dev; |
548 | indio_dev->info = &ad7291_info; | |
549 | indio_dev->modes = INDIO_DIRECT_MODE; | |
ddaecd5b | 550 | |
ddaecd5b | 551 | if (client->irq > 0) { |
58c0323c JC |
552 | ret = request_threaded_irq(client->irq, |
553 | NULL, | |
554 | &ad7291_event_handler, | |
555 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | |
845bd12a | 556 | id->name, |
d4397972 | 557 | indio_dev); |
ddaecd5b | 558 | if (ret) |
26d25ae3 | 559 | goto error_free_dev; |
ddaecd5b | 560 | |
ddaecd5b | 561 | /* set irq polarity low level */ |
f22c1cf0 | 562 | chip->command |= AD7291_ALERT_POLARITY; |
ddaecd5b SZ |
563 | } |
564 | ||
565 | ret = ad7291_i2c_write(chip, AD7291_COMMAND, chip->command); | |
566 | if (ret) { | |
567 | ret = -EIO; | |
568 | goto error_unreg_irq; | |
569 | } | |
570 | ||
26d25ae3 JC |
571 | ret = iio_device_register(indio_dev); |
572 | if (ret) | |
573 | goto error_unreg_irq; | |
574 | ||
ddaecd5b SZ |
575 | dev_info(&client->dev, "%s temperature sensor registered.\n", |
576 | id->name); | |
577 | ||
578 | return 0; | |
579 | ||
580 | error_unreg_irq: | |
4fd24247 JC |
581 | if (client->irq) |
582 | free_irq(client->irq, indio_dev); | |
ddaecd5b | 583 | error_free_dev: |
d4397972 JC |
584 | iio_free_device(indio_dev); |
585 | error_ret: | |
ddaecd5b SZ |
586 | return ret; |
587 | } | |
588 | ||
589 | static int __devexit ad7291_remove(struct i2c_client *client) | |
590 | { | |
d4397972 | 591 | struct iio_dev *indio_dev = i2c_get_clientdata(client); |
ddaecd5b SZ |
592 | |
593 | if (client->irq) | |
d4397972 | 594 | free_irq(client->irq, indio_dev); |
ddaecd5b | 595 | iio_device_unregister(indio_dev); |
ddaecd5b SZ |
596 | |
597 | return 0; | |
598 | } | |
599 | ||
600 | static const struct i2c_device_id ad7291_id[] = { | |
601 | { "ad7291", 0 }, | |
602 | {} | |
603 | }; | |
604 | ||
605 | MODULE_DEVICE_TABLE(i2c, ad7291_id); | |
606 | ||
607 | static struct i2c_driver ad7291_driver = { | |
608 | .driver = { | |
609 | .name = "ad7291", | |
610 | }, | |
611 | .probe = ad7291_probe, | |
612 | .remove = __devexit_p(ad7291_remove), | |
613 | .id_table = ad7291_id, | |
614 | }; | |
615 | ||
616 | static __init int ad7291_init(void) | |
617 | { | |
618 | return i2c_add_driver(&ad7291_driver); | |
619 | } | |
620 | ||
621 | static __exit void ad7291_exit(void) | |
622 | { | |
623 | i2c_del_driver(&ad7291_driver); | |
624 | } | |
625 | ||
626 | MODULE_AUTHOR("Sonic Zhang <sonic.zhang@analog.com>"); | |
627 | MODULE_DESCRIPTION("Analog Devices AD7291 digital" | |
628 | " temperature sensor driver"); | |
629 | MODULE_LICENSE("GPL v2"); | |
630 | ||
631 | module_init(ad7291_init); | |
632 | module_exit(ad7291_exit); |