Commit | Line | Data |
---|---|---|
eecb3e4e AS |
1 | /* |
2 | * Mainly by David Woodhouse, somewhat modified by Jordan Crouse | |
3 | * | |
4 | * Copyright © 2006-2007 Red Hat, Inc. | |
5 | * Copyright © 2006-2007 Advanced Micro Devices, Inc. | |
6 | * Copyright © 2009 VIA Technology, Inc. | |
097cd83a | 7 | * Copyright (c) 2010-2011 Andres Salomon <dilinger@queued.net> |
eecb3e4e AS |
8 | * |
9 | * This program is free software. You can redistribute it and/or | |
10 | * modify it under the terms of version 2 of the GNU General Public | |
11 | * License as published by the Free Software Foundation. | |
12 | */ | |
13 | ||
ac9bbd08 | 14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
eecb3e4e AS |
15 | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/fb.h> | |
18 | #include <linux/console.h> | |
19 | #include <linux/i2c.h> | |
20 | #include <linux/platform_device.h> | |
eecb3e4e AS |
21 | #include <linux/interrupt.h> |
22 | #include <linux/delay.h> | |
99c97852 | 23 | #include <linux/module.h> |
eecb3e4e AS |
24 | #include <linux/backlight.h> |
25 | #include <linux/device.h> | |
e107e6eb | 26 | #include <linux/uaccess.h> |
eecb3e4e AS |
27 | #include <linux/ctype.h> |
28 | #include <linux/reboot.h> | |
3bf9428f | 29 | #include <linux/olpc-ec.h> |
eecb3e4e AS |
30 | #include <asm/tsc.h> |
31 | #include <asm/olpc.h> | |
32 | ||
33 | #include "olpc_dcon.h" | |
34 | ||
35 | /* Module definitions */ | |
36 | ||
c542341d VR |
37 | static ushort resumeline = 898; |
38 | module_param(resumeline, ushort, 0444); | |
eecb3e4e | 39 | |
eecb3e4e AS |
40 | static struct dcon_platform_data *pdata; |
41 | ||
42 | /* I2C structures */ | |
43 | ||
eecb3e4e AS |
44 | /* Platform devices */ |
45 | static struct platform_device *dcon_device; | |
46 | ||
eecb3e4e AS |
47 | static unsigned short normal_i2c[] = { 0x0d, I2C_CLIENT_END }; |
48 | ||
8d2d3dd1 AS |
49 | static s32 dcon_write(struct dcon_priv *dcon, u8 reg, u16 val) |
50 | { | |
51 | return i2c_smbus_write_word_data(dcon->client, reg, val); | |
52 | } | |
53 | ||
54 | static s32 dcon_read(struct dcon_priv *dcon, u8 reg) | |
55 | { | |
56 | return i2c_smbus_read_word_data(dcon->client, reg); | |
57 | } | |
eecb3e4e | 58 | |
eecb3e4e AS |
59 | /* ===== API functions - these are called by a variety of users ==== */ |
60 | ||
8d2d3dd1 | 61 | static int dcon_hw_init(struct dcon_priv *dcon, int is_init) |
eecb3e4e | 62 | { |
bdf4b881 | 63 | u16 ver; |
eecb3e4e AS |
64 | int rc = 0; |
65 | ||
0b7a41eb | 66 | ver = dcon_read(dcon, DCON_REG_ID); |
eecb3e4e | 67 | if ((ver >> 8) != 0xDC) { |
ac9bbd08 | 68 | pr_err("DCON ID not 0xDCxx: 0x%04x instead.\n", ver); |
eecb3e4e AS |
69 | rc = -ENXIO; |
70 | goto err; | |
71 | } | |
72 | ||
73 | if (is_init) { | |
ac9bbd08 | 74 | pr_info("Discovered DCON version %x\n", ver & 0xFF); |
bbe963f1 | 75 | rc = pdata->init(dcon); |
e107e6eb | 76 | if (rc != 0) { |
ac9bbd08 | 77 | pr_err("Unable to init.\n"); |
eecb3e4e AS |
78 | goto err; |
79 | } | |
80 | } | |
81 | ||
24e26170 | 82 | if (ver < 0xdc02) { |
1b995ac2 AS |
83 | dev_err(&dcon->client->dev, |
84 | "DCON v1 is unsupported, giving up..\n"); | |
85 | rc = -ENODEV; | |
86 | goto err; | |
eecb3e4e AS |
87 | } |
88 | ||
1b995ac2 | 89 | /* SDRAM setup/hold time */ |
0b7a41eb | 90 | dcon_write(dcon, 0x3a, 0xc040); |
98d4f93c JF |
91 | dcon_write(dcon, DCON_REG_MEM_OPT_A, 0x0000); /* clear option bits */ |
92 | dcon_write(dcon, DCON_REG_MEM_OPT_A, | |
93 | MEM_DLL_CLOCK_DELAY | MEM_POWER_DOWN); | |
94 | dcon_write(dcon, DCON_REG_MEM_OPT_B, MEM_SOFT_RESET); | |
1b995ac2 | 95 | |
eecb3e4e AS |
96 | /* Colour swizzle, AA, no passthrough, backlight */ |
97 | if (is_init) { | |
bada46e5 | 98 | dcon->disp_mode = MODE_PASSTHRU | MODE_BL_ENABLE | |
80256280 | 99 | MODE_CSWIZZLE | MODE_COL_AA; |
eecb3e4e | 100 | } |
0b7a41eb | 101 | dcon_write(dcon, DCON_REG_MODE, dcon->disp_mode); |
eecb3e4e | 102 | |
eecb3e4e | 103 | /* Set the scanline to interrupt on during resume */ |
0b7a41eb | 104 | dcon_write(dcon, DCON_REG_SCAN_INT, resumeline); |
eecb3e4e AS |
105 | |
106 | err: | |
107 | return rc; | |
108 | } | |
109 | ||
110 | /* | |
111 | * The smbus doesn't always come back due to what is believed to be | |
112 | * hardware (power rail) bugs. For older models where this is known to | |
113 | * occur, our solution is to attempt to wait for the bus to stabilize; | |
114 | * if it doesn't happen, cut power to the dcon, repower it, and wait | |
115 | * for the bus to stabilize. Rinse, repeat until we have a working | |
116 | * smbus. For newer models, we simply BUG(); we want to know if this | |
117 | * still happens despite the power fixes that have been made! | |
118 | */ | |
8d2d3dd1 | 119 | static int dcon_bus_stabilize(struct dcon_priv *dcon, int is_powered_down) |
eecb3e4e AS |
120 | { |
121 | unsigned long timeout; | |
24b7ed47 | 122 | u8 pm; |
eecb3e4e AS |
123 | int x; |
124 | ||
125 | power_up: | |
126 | if (is_powered_down) { | |
24b7ed47 JF |
127 | pm = 1; |
128 | x = olpc_ec_cmd(EC_DCON_POWER_MODE, &pm, 1, NULL, 0); | |
e107e6eb | 129 | if (x) { |
ac9bbd08 | 130 | pr_warn("unable to force dcon to power up: %d!\n", x); |
eecb3e4e AS |
131 | return x; |
132 | } | |
5607ce90 | 133 | usleep_range(10000, 11000); /* we'll be conservative */ |
eecb3e4e | 134 | } |
e107e6eb | 135 | |
eecb3e4e AS |
136 | pdata->bus_stabilize_wiggle(); |
137 | ||
138 | for (x = -1, timeout = 50; timeout && x < 0; timeout--) { | |
5607ce90 | 139 | usleep_range(1000, 1100); |
8d2d3dd1 | 140 | x = dcon_read(dcon, DCON_REG_ID); |
eecb3e4e AS |
141 | } |
142 | if (x < 0) { | |
ac9bbd08 | 143 | pr_err("unable to stabilize dcon's smbus, reasserting power and praying.\n"); |
316604be | 144 | BUG_ON(olpc_board_at_least(olpc_board(0xc2))); |
24b7ed47 JF |
145 | pm = 0; |
146 | olpc_ec_cmd(EC_DCON_POWER_MODE, &pm, 1, NULL, 0); | |
eecb3e4e AS |
147 | msleep(100); |
148 | is_powered_down = 1; | |
149 | goto power_up; /* argh, stupid hardware.. */ | |
150 | } | |
151 | ||
152 | if (is_powered_down) | |
8d2d3dd1 | 153 | return dcon_hw_init(dcon, 0); |
eecb3e4e AS |
154 | return 0; |
155 | } | |
156 | ||
c59eef17 | 157 | static void dcon_set_backlight(struct dcon_priv *dcon, u8 level) |
eecb3e4e | 158 | { |
c59eef17 AS |
159 | dcon->bl_val = level; |
160 | dcon_write(dcon, DCON_REG_BRIGHT, dcon->bl_val); | |
eecb3e4e AS |
161 | |
162 | /* Purposely turn off the backlight when we go to level 0 */ | |
c59eef17 | 163 | if (dcon->bl_val == 0) { |
bada46e5 AS |
164 | dcon->disp_mode &= ~MODE_BL_ENABLE; |
165 | dcon_write(dcon, DCON_REG_MODE, dcon->disp_mode); | |
166 | } else if (!(dcon->disp_mode & MODE_BL_ENABLE)) { | |
167 | dcon->disp_mode |= MODE_BL_ENABLE; | |
168 | dcon_write(dcon, DCON_REG_MODE, dcon->disp_mode); | |
eecb3e4e AS |
169 | } |
170 | } | |
171 | ||
eecb3e4e | 172 | /* Set the output type to either color or mono */ |
bb410354 | 173 | static int dcon_set_mono_mode(struct dcon_priv *dcon, bool enable_mono) |
eecb3e4e | 174 | { |
bb410354 | 175 | if (dcon->mono == enable_mono) |
eecb3e4e AS |
176 | return 0; |
177 | ||
bb410354 | 178 | dcon->mono = enable_mono; |
eecb3e4e | 179 | |
bb410354 | 180 | if (enable_mono) { |
bada46e5 AS |
181 | dcon->disp_mode &= ~(MODE_CSWIZZLE | MODE_COL_AA); |
182 | dcon->disp_mode |= MODE_MONO_LUMA; | |
e107e6eb | 183 | } else { |
bada46e5 | 184 | dcon->disp_mode &= ~(MODE_MONO_LUMA); |
80256280 | 185 | dcon->disp_mode |= MODE_CSWIZZLE | MODE_COL_AA; |
eecb3e4e AS |
186 | } |
187 | ||
bada46e5 | 188 | dcon_write(dcon, DCON_REG_MODE, dcon->disp_mode); |
eecb3e4e AS |
189 | return 0; |
190 | } | |
191 | ||
192 | /* For now, this will be really stupid - we need to address how | |
193 | * DCONLOAD works in a sleep and account for it accordingly | |
194 | */ | |
195 | ||
bada46e5 | 196 | static void dcon_sleep(struct dcon_priv *dcon, bool sleep) |
eecb3e4e AS |
197 | { |
198 | int x; | |
199 | ||
200 | /* Turn off the backlight and put the DCON to sleep */ | |
201 | ||
bada46e5 | 202 | if (dcon->asleep == sleep) |
eecb3e4e AS |
203 | return; |
204 | ||
316604be | 205 | if (!olpc_board_at_least(olpc_board(0xc2))) |
eecb3e4e AS |
206 | return; |
207 | ||
bada46e5 | 208 | if (sleep) { |
24b7ed47 | 209 | u8 pm = 0; |
7949f30a | 210 | |
24b7ed47 | 211 | x = olpc_ec_cmd(EC_DCON_POWER_MODE, &pm, 1, NULL, 0); |
e107e6eb | 212 | if (x) |
ac9bbd08 | 213 | pr_warn("unable to force dcon to power down: %d!\n", x); |
eecb3e4e | 214 | else |
bada46e5 | 215 | dcon->asleep = sleep; |
e107e6eb | 216 | } else { |
eecb3e4e | 217 | /* Only re-enable the backlight if the backlight value is set */ |
c59eef17 | 218 | if (dcon->bl_val != 0) |
bada46e5 | 219 | dcon->disp_mode |= MODE_BL_ENABLE; |
8d2d3dd1 | 220 | x = dcon_bus_stabilize(dcon, 1); |
e107e6eb | 221 | if (x) |
ac9bbd08 | 222 | pr_warn("unable to reinit dcon hardware: %d!\n", x); |
eecb3e4e | 223 | else |
bada46e5 | 224 | dcon->asleep = sleep; |
eecb3e4e AS |
225 | |
226 | /* Restore backlight */ | |
c59eef17 | 227 | dcon_set_backlight(dcon, dcon->bl_val); |
eecb3e4e AS |
228 | } |
229 | ||
230 | /* We should turn off some stuff in the framebuffer - but what? */ | |
231 | } | |
232 | ||
233 | /* the DCON seems to get confused if we change DCONLOAD too | |
e107e6eb | 234 | * frequently -- i.e., approximately faster than frame time. |
eecb3e4e AS |
235 | * normally we don't change it this fast, so in general we won't |
236 | * delay here. | |
237 | */ | |
309ef2a2 | 238 | static void dcon_load_holdoff(struct dcon_priv *dcon) |
eecb3e4e | 239 | { |
851f7c0e | 240 | ktime_t delta_t, now; |
7949f30a | 241 | |
e107e6eb | 242 | while (1) { |
851f7c0e KS |
243 | now = ktime_get(); |
244 | delta_t = ktime_sub(now, dcon->load_time); | |
cea07e52 | 245 | if (ktime_to_ns(delta_t) > NSEC_PER_MSEC * 20) |
eecb3e4e | 246 | break; |
eecb3e4e AS |
247 | mdelay(4); |
248 | } | |
249 | } | |
eecb3e4e | 250 | |
45bfe972 AS |
251 | static bool dcon_blank_fb(struct dcon_priv *dcon, bool blank) |
252 | { | |
253 | int err; | |
254 | ||
fc0524b0 | 255 | console_lock(); |
45bfe972 | 256 | if (!lock_fb_info(dcon->fbinfo)) { |
fc0524b0 | 257 | console_unlock(); |
45bfe972 AS |
258 | dev_err(&dcon->client->dev, "unable to lock framebuffer\n"); |
259 | return false; | |
260 | } | |
fc0524b0 | 261 | |
45bfe972 AS |
262 | dcon->ignore_fb_events = true; |
263 | err = fb_blank(dcon->fbinfo, | |
264 | blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK); | |
265 | dcon->ignore_fb_events = false; | |
45bfe972 | 266 | unlock_fb_info(dcon->fbinfo); |
fc0524b0 | 267 | console_unlock(); |
45bfe972 AS |
268 | |
269 | if (err) { | |
270 | dev_err(&dcon->client->dev, "couldn't %sblank framebuffer\n", | |
271 | blank ? "" : "un"); | |
272 | return false; | |
273 | } | |
274 | return true; | |
275 | } | |
276 | ||
277 | /* Set the source of the display (CPU or DCON) */ | |
eecb3e4e AS |
278 | static void dcon_source_switch(struct work_struct *work) |
279 | { | |
8d2d3dd1 AS |
280 | struct dcon_priv *dcon = container_of(work, struct dcon_priv, |
281 | switch_source); | |
bbe963f1 | 282 | int source = dcon->pending_src; |
eecb3e4e | 283 | |
bbe963f1 | 284 | if (dcon->curr_src == source) |
eecb3e4e AS |
285 | return; |
286 | ||
309ef2a2 | 287 | dcon_load_holdoff(dcon); |
eecb3e4e | 288 | |
309ef2a2 | 289 | dcon->switched = false; |
eecb3e4e AS |
290 | |
291 | switch (source) { | |
292 | case DCON_SOURCE_CPU: | |
ac9bbd08 | 293 | pr_info("dcon_source_switch to CPU\n"); |
eecb3e4e | 294 | /* Enable the scanline interrupt bit */ |
8d2d3dd1 | 295 | if (dcon_write(dcon, DCON_REG_MODE, |
bada46e5 | 296 | dcon->disp_mode | MODE_SCAN_INT)) |
ac9bbd08 | 297 | pr_err("couldn't enable scanline interrupt!\n"); |
c40f20da | 298 | else |
eecb3e4e | 299 | /* Wait up to one second for the scanline interrupt */ |
c40f20da | 300 | wait_event_timeout(dcon->waitq, dcon->switched, HZ); |
eecb3e4e | 301 | |
309ef2a2 | 302 | if (!dcon->switched) |
ac9bbd08 | 303 | pr_err("Timeout entering CPU mode; expect a screen glitch.\n"); |
eecb3e4e AS |
304 | |
305 | /* Turn off the scanline interrupt */ | |
bada46e5 | 306 | if (dcon_write(dcon, DCON_REG_MODE, dcon->disp_mode)) |
ac9bbd08 | 307 | pr_err("couldn't disable scanline interrupt!\n"); |
eecb3e4e AS |
308 | |
309 | /* | |
310 | * Ideally we'd like to disable interrupts here so that the | |
311 | * fb unblanking and DCON turn on happen at a known time value; | |
312 | * however, we can't do that right now with fb_blank | |
313 | * messing with semaphores. | |
314 | * | |
315 | * For now, we just hope.. | |
316 | */ | |
45bfe972 | 317 | if (!dcon_blank_fb(dcon, false)) { |
ac9bbd08 | 318 | pr_err("Failed to enter CPU mode\n"); |
bbe963f1 | 319 | dcon->pending_src = DCON_SOURCE_DCON; |
eecb3e4e AS |
320 | return; |
321 | } | |
eecb3e4e AS |
322 | |
323 | /* And turn off the DCON */ | |
324 | pdata->set_dconload(1); | |
851f7c0e | 325 | dcon->load_time = ktime_get(); |
eecb3e4e | 326 | |
ac9bbd08 | 327 | pr_info("The CPU has control\n"); |
eecb3e4e AS |
328 | break; |
329 | case DCON_SOURCE_DCON: | |
330 | { | |
851f7c0e | 331 | ktime_t delta_t; |
eecb3e4e | 332 | |
ac9bbd08 | 333 | pr_info("dcon_source_switch to DCON\n"); |
eecb3e4e | 334 | |
eecb3e4e AS |
335 | /* Clear DCONLOAD - this implies that the DCON is in control */ |
336 | pdata->set_dconload(0); | |
851f7c0e | 337 | dcon->load_time = ktime_get(); |
eecb3e4e | 338 | |
c40f20da | 339 | wait_event_timeout(dcon->waitq, dcon->switched, HZ/2); |
eecb3e4e | 340 | |
309ef2a2 | 341 | if (!dcon->switched) { |
ac9bbd08 | 342 | pr_err("Timeout entering DCON mode; expect a screen glitch.\n"); |
eecb3e4e AS |
343 | } else { |
344 | /* sometimes the DCON doesn't follow its own rules, | |
345 | * and doesn't wait for two vsync pulses before | |
346 | * ack'ing the frame load with an IRQ. the result | |
347 | * is that the display shows the *previously* | |
348 | * loaded frame. we can detect this by looking at | |
349 | * the time between asserting DCONLOAD and the IRQ -- | |
350 | * if it's less than 20msec, then the DCON couldn't | |
351 | * have seen two VSYNC pulses. in that case we | |
e107e6eb | 352 | * deassert and reassert, and hope for the best. |
eecb3e4e AS |
353 | * see http://dev.laptop.org/ticket/9664 |
354 | */ | |
851f7c0e KS |
355 | delta_t = ktime_sub(dcon->irq_time, dcon->load_time); |
356 | if (dcon->switched && ktime_to_ns(delta_t) | |
357 | < NSEC_PER_MSEC * 20) { | |
ac9bbd08 | 358 | pr_err("missed loading, retrying\n"); |
eecb3e4e AS |
359 | pdata->set_dconload(1); |
360 | mdelay(41); | |
361 | pdata->set_dconload(0); | |
851f7c0e | 362 | dcon->load_time = ktime_get(); |
eecb3e4e AS |
363 | mdelay(41); |
364 | } | |
365 | } | |
366 | ||
45bfe972 | 367 | dcon_blank_fb(dcon, true); |
ac9bbd08 | 368 | pr_info("The DCON has control\n"); |
eecb3e4e AS |
369 | break; |
370 | } | |
371 | default: | |
372 | BUG(); | |
373 | } | |
374 | ||
bbe963f1 | 375 | dcon->curr_src = source; |
eecb3e4e AS |
376 | } |
377 | ||
8d2d3dd1 | 378 | static void dcon_set_source(struct dcon_priv *dcon, int arg) |
eecb3e4e | 379 | { |
bbe963f1 | 380 | if (dcon->pending_src == arg) |
eecb3e4e AS |
381 | return; |
382 | ||
bbe963f1 | 383 | dcon->pending_src = arg; |
eecb3e4e | 384 | |
14ab3daa | 385 | if (dcon->curr_src != arg) |
8d2d3dd1 | 386 | schedule_work(&dcon->switch_source); |
eecb3e4e AS |
387 | } |
388 | ||
8d2d3dd1 | 389 | static void dcon_set_source_sync(struct dcon_priv *dcon, int arg) |
eecb3e4e | 390 | { |
8d2d3dd1 | 391 | dcon_set_source(dcon, arg); |
eecb3e4e AS |
392 | flush_scheduled_work(); |
393 | } | |
394 | ||
eecb3e4e AS |
395 | static ssize_t dcon_mode_show(struct device *dev, |
396 | struct device_attribute *attr, char *buf) | |
397 | { | |
bada46e5 | 398 | struct dcon_priv *dcon = dev_get_drvdata(dev); |
7949f30a | 399 | |
bada46e5 | 400 | return sprintf(buf, "%4.4X\n", dcon->disp_mode); |
eecb3e4e AS |
401 | } |
402 | ||
403 | static ssize_t dcon_sleep_show(struct device *dev, | |
404 | struct device_attribute *attr, char *buf) | |
405 | { | |
bada46e5 | 406 | struct dcon_priv *dcon = dev_get_drvdata(dev); |
7949f30a | 407 | |
9ed62423 | 408 | return sprintf(buf, "%d\n", dcon->asleep); |
eecb3e4e AS |
409 | } |
410 | ||
411 | static ssize_t dcon_freeze_show(struct device *dev, | |
412 | struct device_attribute *attr, char *buf) | |
413 | { | |
bbe963f1 | 414 | struct dcon_priv *dcon = dev_get_drvdata(dev); |
7949f30a | 415 | |
bbe963f1 | 416 | return sprintf(buf, "%d\n", dcon->curr_src == DCON_SOURCE_DCON ? 1 : 0); |
eecb3e4e AS |
417 | } |
418 | ||
bb410354 | 419 | static ssize_t dcon_mono_show(struct device *dev, |
eecb3e4e AS |
420 | struct device_attribute *attr, char *buf) |
421 | { | |
bb410354 | 422 | struct dcon_priv *dcon = dev_get_drvdata(dev); |
7949f30a | 423 | |
9ed62423 | 424 | return sprintf(buf, "%d\n", dcon->mono); |
eecb3e4e AS |
425 | } |
426 | ||
427 | static ssize_t dcon_resumeline_show(struct device *dev, | |
428 | struct device_attribute *attr, char *buf) | |
429 | { | |
430 | return sprintf(buf, "%d\n", resumeline); | |
431 | } | |
432 | ||
bb410354 | 433 | static ssize_t dcon_mono_store(struct device *dev, |
eecb3e4e AS |
434 | struct device_attribute *attr, const char *buf, size_t count) |
435 | { | |
31a3da41 MB |
436 | unsigned long enable_mono; |
437 | int rc; | |
eecb3e4e | 438 | |
88e09a5e | 439 | rc = kstrtoul(buf, 10, &enable_mono); |
31a3da41 MB |
440 | if (rc) |
441 | return rc; | |
eecb3e4e | 442 | |
9ed62423 | 443 | dcon_set_mono_mode(dev_get_drvdata(dev), enable_mono ? true : false); |
eecb3e4e | 444 | |
31a3da41 | 445 | return count; |
eecb3e4e AS |
446 | } |
447 | ||
448 | static ssize_t dcon_freeze_store(struct device *dev, | |
449 | struct device_attribute *attr, const char *buf, size_t count) | |
450 | { | |
8d2d3dd1 | 451 | struct dcon_priv *dcon = dev_get_drvdata(dev); |
31a3da41 MB |
452 | unsigned long output; |
453 | int ret; | |
eecb3e4e | 454 | |
88e09a5e | 455 | ret = kstrtoul(buf, 10, &output); |
31a3da41 MB |
456 | if (ret) |
457 | return ret; | |
eecb3e4e | 458 | |
ac9bbd08 | 459 | pr_info("dcon_freeze_store: %lu\n", output); |
eecb3e4e AS |
460 | |
461 | switch (output) { | |
462 | case 0: | |
8d2d3dd1 | 463 | dcon_set_source(dcon, DCON_SOURCE_CPU); |
eecb3e4e AS |
464 | break; |
465 | case 1: | |
8d2d3dd1 | 466 | dcon_set_source_sync(dcon, DCON_SOURCE_DCON); |
eecb3e4e | 467 | break; |
e107e6eb | 468 | case 2: /* normally unused */ |
8d2d3dd1 | 469 | dcon_set_source(dcon, DCON_SOURCE_DCON); |
eecb3e4e AS |
470 | break; |
471 | default: | |
472 | return -EINVAL; | |
473 | } | |
474 | ||
475 | return count; | |
476 | } | |
477 | ||
478 | static ssize_t dcon_resumeline_store(struct device *dev, | |
479 | struct device_attribute *attr, const char *buf, size_t count) | |
480 | { | |
c542341d | 481 | unsigned short rl; |
31a3da41 | 482 | int rc; |
eecb3e4e | 483 | |
c542341d | 484 | rc = kstrtou16(buf, 10, &rl); |
31a3da41 | 485 | if (rc) |
eecb3e4e AS |
486 | return rc; |
487 | ||
488 | resumeline = rl; | |
8d2d3dd1 | 489 | dcon_write(dev_get_drvdata(dev), DCON_REG_SCAN_INT, resumeline); |
eecb3e4e | 490 | |
31a3da41 | 491 | return count; |
eecb3e4e AS |
492 | } |
493 | ||
494 | static ssize_t dcon_sleep_store(struct device *dev, | |
495 | struct device_attribute *attr, const char *buf, size_t count) | |
496 | { | |
31a3da41 MB |
497 | unsigned long output; |
498 | int ret; | |
eecb3e4e | 499 | |
88e09a5e | 500 | ret = kstrtoul(buf, 10, &output); |
31a3da41 MB |
501 | if (ret) |
502 | return ret; | |
eecb3e4e | 503 | |
bada46e5 | 504 | dcon_sleep(dev_get_drvdata(dev), output ? true : false); |
eecb3e4e AS |
505 | return count; |
506 | } | |
507 | ||
508 | static struct device_attribute dcon_device_files[] = { | |
509 | __ATTR(mode, 0444, dcon_mode_show, NULL), | |
510 | __ATTR(sleep, 0644, dcon_sleep_show, dcon_sleep_store), | |
511 | __ATTR(freeze, 0644, dcon_freeze_show, dcon_freeze_store), | |
bb410354 | 512 | __ATTR(monochrome, 0644, dcon_mono_show, dcon_mono_store), |
eecb3e4e AS |
513 | __ATTR(resumeline, 0644, dcon_resumeline_show, dcon_resumeline_store), |
514 | }; | |
515 | ||
c59eef17 AS |
516 | static int dcon_bl_update(struct backlight_device *dev) |
517 | { | |
518 | struct dcon_priv *dcon = bl_get_data(dev); | |
519 | u8 level = dev->props.brightness & 0x0F; | |
520 | ||
521 | if (dev->props.power != FB_BLANK_UNBLANK) | |
522 | level = 0; | |
523 | ||
524 | if (level != dcon->bl_val) | |
525 | dcon_set_backlight(dcon, level); | |
526 | ||
20b27c61 AS |
527 | /* power down the DCON when the screen is blanked */ |
528 | if (!dcon->ignore_fb_events) | |
529 | dcon_sleep(dcon, !!(dev->props.state & BL_CORE_FBBLANK)); | |
530 | ||
c59eef17 AS |
531 | return 0; |
532 | } | |
533 | ||
534 | static int dcon_bl_get(struct backlight_device *dev) | |
535 | { | |
536 | struct dcon_priv *dcon = bl_get_data(dev); | |
7949f30a | 537 | |
c59eef17 AS |
538 | return dcon->bl_val; |
539 | } | |
540 | ||
acc2472e | 541 | static const struct backlight_ops dcon_bl_ops = { |
c59eef17 AS |
542 | .update_status = dcon_bl_update, |
543 | .get_brightness = dcon_bl_get, | |
eecb3e4e AS |
544 | }; |
545 | ||
c59eef17 AS |
546 | static struct backlight_properties dcon_bl_props = { |
547 | .max_brightness = 15, | |
bb7ca747 | 548 | .type = BACKLIGHT_RAW, |
c59eef17 AS |
549 | .power = FB_BLANK_UNBLANK, |
550 | }; | |
eecb3e4e | 551 | |
e107e6eb MB |
552 | static int dcon_reboot_notify(struct notifier_block *nb, |
553 | unsigned long foo, void *bar) | |
eecb3e4e | 554 | { |
8d2d3dd1 AS |
555 | struct dcon_priv *dcon = container_of(nb, struct dcon_priv, reboot_nb); |
556 | ||
557 | if (!dcon || !dcon->client) | |
2cc5939d | 558 | return NOTIFY_DONE; |
eecb3e4e AS |
559 | |
560 | /* Turn off the DCON. Entirely. */ | |
8d2d3dd1 AS |
561 | dcon_write(dcon, DCON_REG_MODE, 0x39); |
562 | dcon_write(dcon, DCON_REG_MODE, 0x32); | |
2cc5939d | 563 | return NOTIFY_DONE; |
eecb3e4e AS |
564 | } |
565 | ||
e107e6eb MB |
566 | static int unfreeze_on_panic(struct notifier_block *nb, |
567 | unsigned long e, void *p) | |
eecb3e4e AS |
568 | { |
569 | pdata->set_dconload(1); | |
570 | return NOTIFY_DONE; | |
571 | } | |
572 | ||
573 | static struct notifier_block dcon_panic_nb = { | |
574 | .notifier_call = unfreeze_on_panic, | |
575 | }; | |
576 | ||
eecb3e4e AS |
577 | static int dcon_detect(struct i2c_client *client, struct i2c_board_info *info) |
578 | { | |
579 | strlcpy(info->type, "olpc_dcon", I2C_NAME_SIZE); | |
580 | ||
581 | return 0; | |
582 | } | |
583 | ||
584 | static int dcon_probe(struct i2c_client *client, const struct i2c_device_id *id) | |
585 | { | |
8d2d3dd1 | 586 | struct dcon_priv *dcon; |
a90dcd4f | 587 | int rc, i, j; |
eecb3e4e | 588 | |
097cd83a AS |
589 | if (!pdata) |
590 | return -ENXIO; | |
591 | ||
8d2d3dd1 AS |
592 | dcon = kzalloc(sizeof(*dcon), GFP_KERNEL); |
593 | if (!dcon) | |
594 | return -ENOMEM; | |
595 | ||
596 | dcon->client = client; | |
c40f20da | 597 | init_waitqueue_head(&dcon->waitq); |
8d2d3dd1 AS |
598 | INIT_WORK(&dcon->switch_source, dcon_source_switch); |
599 | dcon->reboot_nb.notifier_call = dcon_reboot_notify; | |
600 | dcon->reboot_nb.priority = -1; | |
601 | ||
602 | i2c_set_clientdata(client, dcon); | |
603 | ||
45bfe972 AS |
604 | if (num_registered_fb < 1) { |
605 | dev_err(&client->dev, "DCON driver requires a registered fb\n"); | |
606 | rc = -EIO; | |
607 | goto einit; | |
608 | } | |
609 | dcon->fbinfo = registered_fb[0]; | |
eecb3e4e | 610 | |
8d2d3dd1 | 611 | rc = dcon_hw_init(dcon, 1); |
eecb3e4e AS |
612 | if (rc) |
613 | goto einit; | |
614 | ||
615 | /* Add the DCON device */ | |
616 | ||
617 | dcon_device = platform_device_alloc("dcon", -1); | |
618 | ||
5e6731c8 | 619 | if (!dcon_device) { |
ac9bbd08 | 620 | pr_err("Unable to create the DCON device\n"); |
eecb3e4e AS |
621 | rc = -ENOMEM; |
622 | goto eirq; | |
623 | } | |
e107e6eb | 624 | rc = platform_device_add(dcon_device); |
8d2d3dd1 | 625 | platform_set_drvdata(dcon_device, dcon); |
eecb3e4e | 626 | |
e107e6eb | 627 | if (rc) { |
ac9bbd08 | 628 | pr_err("Unable to add the DCON device\n"); |
eecb3e4e AS |
629 | goto edev; |
630 | } | |
631 | ||
e107e6eb | 632 | for (i = 0; i < ARRAY_SIZE(dcon_device_files); i++) { |
a90dcd4f MB |
633 | rc = device_create_file(&dcon_device->dev, |
634 | &dcon_device_files[i]); | |
635 | if (rc) { | |
636 | dev_err(&dcon_device->dev, "Cannot create sysfs file\n"); | |
637 | goto ecreate; | |
638 | } | |
639 | } | |
eecb3e4e | 640 | |
c59eef17 | 641 | dcon->bl_val = dcon_read(dcon, DCON_REG_BRIGHT) & 0x0F; |
eecb3e4e | 642 | |
c59eef17 AS |
643 | /* Add the backlight device for the DCON */ |
644 | dcon_bl_props.brightness = dcon->bl_val; | |
645 | dcon->bl_dev = backlight_device_register("dcon-bl", &dcon_device->dev, | |
646 | dcon, &dcon_bl_ops, &dcon_bl_props); | |
647 | if (IS_ERR(dcon->bl_dev)) { | |
648 | dev_err(&client->dev, "cannot register backlight dev (%ld)\n", | |
649 | PTR_ERR(dcon->bl_dev)); | |
650 | dcon->bl_dev = NULL; | |
eecb3e4e AS |
651 | } |
652 | ||
8d2d3dd1 | 653 | register_reboot_notifier(&dcon->reboot_nb); |
eecb3e4e | 654 | atomic_notifier_chain_register(&panic_notifier_list, &dcon_panic_nb); |
eecb3e4e AS |
655 | |
656 | return 0; | |
657 | ||
a90dcd4f MB |
658 | ecreate: |
659 | for (j = 0; j < i; j++) | |
660 | device_remove_file(&dcon_device->dev, &dcon_device_files[j]); | |
eecb3e4e AS |
661 | edev: |
662 | platform_device_unregister(dcon_device); | |
663 | dcon_device = NULL; | |
eecb3e4e | 664 | eirq: |
bbe963f1 | 665 | free_irq(DCON_IRQ, dcon); |
eecb3e4e | 666 | einit: |
8d2d3dd1 | 667 | kfree(dcon); |
eecb3e4e AS |
668 | return rc; |
669 | } | |
670 | ||
671 | static int dcon_remove(struct i2c_client *client) | |
672 | { | |
8d2d3dd1 AS |
673 | struct dcon_priv *dcon = i2c_get_clientdata(client); |
674 | ||
8d2d3dd1 | 675 | unregister_reboot_notifier(&dcon->reboot_nb); |
eecb3e4e AS |
676 | atomic_notifier_chain_unregister(&panic_notifier_list, &dcon_panic_nb); |
677 | ||
bbe963f1 | 678 | free_irq(DCON_IRQ, dcon); |
eecb3e4e | 679 | |
16ceb728 | 680 | backlight_device_unregister(dcon->bl_dev); |
eecb3e4e | 681 | |
5e6731c8 | 682 | if (dcon_device) |
eecb3e4e | 683 | platform_device_unregister(dcon_device); |
8d2d3dd1 AS |
684 | cancel_work_sync(&dcon->switch_source); |
685 | ||
686 | kfree(dcon); | |
eecb3e4e | 687 | |
eecb3e4e AS |
688 | return 0; |
689 | } | |
690 | ||
691 | #ifdef CONFIG_PM | |
3e5e624b | 692 | static int dcon_suspend(struct device *dev) |
eecb3e4e | 693 | { |
3e5e624b | 694 | struct i2c_client *client = to_i2c_client(dev); |
8d2d3dd1 AS |
695 | struct dcon_priv *dcon = i2c_get_clientdata(client); |
696 | ||
bada46e5 | 697 | if (!dcon->asleep) { |
eecb3e4e | 698 | /* Set up the DCON to have the source */ |
8d2d3dd1 | 699 | dcon_set_source_sync(dcon, DCON_SOURCE_DCON); |
eecb3e4e AS |
700 | } |
701 | ||
702 | return 0; | |
703 | } | |
704 | ||
3e5e624b | 705 | static int dcon_resume(struct device *dev) |
eecb3e4e | 706 | { |
3e5e624b | 707 | struct i2c_client *client = to_i2c_client(dev); |
8d2d3dd1 AS |
708 | struct dcon_priv *dcon = i2c_get_clientdata(client); |
709 | ||
bada46e5 | 710 | if (!dcon->asleep) { |
8d2d3dd1 AS |
711 | dcon_bus_stabilize(dcon, 0); |
712 | dcon_set_source(dcon, DCON_SOURCE_CPU); | |
eecb3e4e AS |
713 | } |
714 | ||
715 | return 0; | |
716 | } | |
717 | ||
3e5e624b AS |
718 | #else |
719 | ||
720 | #define dcon_suspend NULL | |
721 | #define dcon_resume NULL | |
722 | ||
723 | #endif /* CONFIG_PM */ | |
eecb3e4e | 724 | |
097cd83a | 725 | irqreturn_t dcon_interrupt(int irq, void *id) |
eecb3e4e | 726 | { |
bbe963f1 | 727 | struct dcon_priv *dcon = id; |
91762057 | 728 | u8 status; |
eecb3e4e | 729 | |
91762057 | 730 | if (pdata->read_status(&status)) |
eecb3e4e AS |
731 | return IRQ_NONE; |
732 | ||
733 | switch (status & 3) { | |
734 | case 3: | |
ac9bbd08 | 735 | pr_debug("DCONLOAD_MISSED interrupt\n"); |
eecb3e4e AS |
736 | break; |
737 | ||
738 | case 2: /* switch to DCON mode */ | |
739 | case 1: /* switch to CPU mode */ | |
309ef2a2 | 740 | dcon->switched = true; |
851f7c0e | 741 | dcon->irq_time = ktime_get(); |
c40f20da | 742 | wake_up(&dcon->waitq); |
eecb3e4e AS |
743 | break; |
744 | ||
745 | case 0: | |
746 | /* workaround resume case: the DCON (on 1.5) doesn't | |
747 | * ever assert status 0x01 when switching to CPU mode | |
748 | * during resume. this is because DCONLOAD is de-asserted | |
749 | * _immediately_ upon exiting S3, so the actual release | |
750 | * of the DCON happened long before this point. | |
751 | * see http://dev.laptop.org/ticket/9869 | |
752 | */ | |
309ef2a2 AS |
753 | if (dcon->curr_src != dcon->pending_src && !dcon->switched) { |
754 | dcon->switched = true; | |
851f7c0e | 755 | dcon->irq_time = ktime_get(); |
c40f20da | 756 | wake_up(&dcon->waitq); |
ac9bbd08 | 757 | pr_debug("switching w/ status 0/0\n"); |
eecb3e4e | 758 | } else { |
ac9bbd08 | 759 | pr_debug("scanline interrupt w/CPU\n"); |
eecb3e4e AS |
760 | } |
761 | } | |
762 | ||
763 | return IRQ_HANDLED; | |
764 | } | |
765 | ||
3e5e624b AS |
766 | static const struct dev_pm_ops dcon_pm_ops = { |
767 | .suspend = dcon_suspend, | |
768 | .resume = dcon_resume, | |
769 | }; | |
770 | ||
56463de0 | 771 | static const struct i2c_device_id dcon_idtable[] = { |
eecb3e4e AS |
772 | { "olpc_dcon", 0 }, |
773 | { } | |
774 | }; | |
eecb3e4e AS |
775 | MODULE_DEVICE_TABLE(i2c, dcon_idtable); |
776 | ||
4e8e8716 | 777 | static struct i2c_driver dcon_driver = { |
eecb3e4e AS |
778 | .driver = { |
779 | .name = "olpc_dcon", | |
3e5e624b | 780 | .pm = &dcon_pm_ops, |
eecb3e4e AS |
781 | }, |
782 | .class = I2C_CLASS_DDC | I2C_CLASS_HWMON, | |
783 | .id_table = dcon_idtable, | |
784 | .probe = dcon_probe, | |
c8ddc220 | 785 | .remove = dcon_remove, |
eecb3e4e AS |
786 | .detect = dcon_detect, |
787 | .address_list = normal_i2c, | |
eecb3e4e AS |
788 | }; |
789 | ||
eecb3e4e AS |
790 | static int __init olpc_dcon_init(void) |
791 | { | |
097cd83a AS |
792 | #ifdef CONFIG_FB_OLPC_DCON_1_5 |
793 | /* XO-1.5 */ | |
794 | if (olpc_board_at_least(olpc_board(0xd0))) | |
795 | pdata = &dcon_pdata_xo_1_5; | |
796 | #endif | |
797 | #ifdef CONFIG_FB_OLPC_DCON_1 | |
798 | if (!pdata) | |
799 | pdata = &dcon_pdata_xo_1; | |
800 | #endif | |
eecb3e4e | 801 | |
56463de0 | 802 | return i2c_add_driver(&dcon_driver); |
eecb3e4e AS |
803 | } |
804 | ||
805 | static void __exit olpc_dcon_exit(void) | |
806 | { | |
807 | i2c_del_driver(&dcon_driver); | |
808 | } | |
809 | ||
810 | module_init(olpc_dcon_init); | |
811 | module_exit(olpc_dcon_exit); | |
812 | ||
813 | MODULE_LICENSE("GPL"); |