staging/rdma/hfi1: Split multiple assignments
[deliverable/linux.git] / drivers / staging / rdma / hfi1 / mad.c
CommitLineData
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1/*
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
91ab4ed3 8 * Copyright(c) 2015, 2016 Intel Corporation.
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9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * BSD LICENSE
20 *
91ab4ed3 21 * Copyright(c) 2015, 2016 Intel Corporation.
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22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 *
27 * - Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * - Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in
31 * the documentation and/or other materials provided with the
32 * distribution.
33 * - Neither the name of Intel Corporation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 *
49 */
50
51#include <linux/net.h>
52#define OPA_NUM_PKEY_BLOCKS_PER_SMP (OPA_SMP_DR_DATA_SIZE \
53 / (OPA_PARTITION_TABLE_BLK_SIZE * sizeof(u16)))
54
55#include "hfi.h"
56#include "mad.h"
57#include "trace.h"
0ec79e87 58#include "qp.h"
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59
60/* the reset value from the FM is supposed to be 0xffff, handle both */
61#define OPA_LINK_WIDTH_RESET_OLD 0x0fff
62#define OPA_LINK_WIDTH_RESET 0xffff
63
64static int reply(struct ib_mad_hdr *smp)
65{
66 /*
67 * The verbs framework will handle the directed/LID route
68 * packet changes.
69 */
70 smp->method = IB_MGMT_METHOD_GET_RESP;
71 if (smp->mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
72 smp->status |= IB_SMP_DIRECTION;
73 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
74}
75
76static inline void clear_opa_smp_data(struct opa_smp *smp)
77{
78 void *data = opa_get_smp_data(smp);
79 size_t size = opa_get_smp_data_size(smp);
80
81 memset(data, 0, size);
82}
83
84static void send_trap(struct hfi1_ibport *ibp, void *data, unsigned len)
85{
86 struct ib_mad_send_buf *send_buf;
87 struct ib_mad_agent *agent;
5cd24119 88 struct opa_smp *smp;
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89 int ret;
90 unsigned long flags;
91 unsigned long timeout;
92 int pkey_idx;
93 u32 qpn = ppd_from_ibp(ibp)->sm_trap_qp;
94
4eb06882 95 agent = ibp->rvp.send_agent;
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96 if (!agent)
97 return;
98
99 /* o14-3.2.1 */
100 if (ppd_from_ibp(ibp)->lstate != IB_PORT_ACTIVE)
101 return;
102
103 /* o14-2 */
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104 if (ibp->rvp.trap_timeout && time_before(jiffies,
105 ibp->rvp.trap_timeout))
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106 return;
107
108 pkey_idx = hfi1_lookup_pkey_idx(ibp, LIM_MGMT_P_KEY);
109 if (pkey_idx < 0) {
110 pr_warn("%s: failed to find limited mgmt pkey, defaulting 0x%x\n",
111 __func__, hfi1_get_pkey(ibp, 1));
112 pkey_idx = 1;
113 }
114
115 send_buf = ib_create_send_mad(agent, qpn, pkey_idx, 0,
116 IB_MGMT_MAD_HDR, IB_MGMT_MAD_DATA,
117 GFP_ATOMIC, IB_MGMT_BASE_VERSION);
118 if (IS_ERR(send_buf))
119 return;
120
121 smp = send_buf->mad;
5cd24119 122 smp->base_version = OPA_MGMT_BASE_VERSION;
77241056 123 smp->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
5cd24119 124 smp->class_version = OPA_SMI_CLASS_VERSION;
77241056 125 smp->method = IB_MGMT_METHOD_TRAP;
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126 ibp->rvp.tid++;
127 smp->tid = cpu_to_be64(ibp->rvp.tid);
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128 smp->attr_id = IB_SMP_ATTR_NOTICE;
129 /* o14-1: smp->mkey = 0; */
5cd24119 130 memcpy(smp->route.lid.data, data, len);
77241056 131
4eb06882 132 spin_lock_irqsave(&ibp->rvp.lock, flags);
9c4a311e 133 if (!ibp->rvp.sm_ah) {
4eb06882 134 if (ibp->rvp.sm_lid != be16_to_cpu(IB_LID_PERMISSIVE)) {
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135 struct ib_ah *ah;
136
4eb06882 137 ah = hfi1_create_qp0_ah(ibp, ibp->rvp.sm_lid);
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138 if (IS_ERR(ah))
139 ret = PTR_ERR(ah);
140 else {
141 send_buf->ah = ah;
9c4a311e 142 ibp->rvp.sm_ah = ibah_to_rvtah(ah);
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143 ret = 0;
144 }
145 } else
146 ret = -EINVAL;
147 } else {
9c4a311e 148 send_buf->ah = &ibp->rvp.sm_ah->ibah;
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149 ret = 0;
150 }
4eb06882 151 spin_unlock_irqrestore(&ibp->rvp.lock, flags);
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152
153 if (!ret)
154 ret = ib_post_send_mad(send_buf, NULL);
155 if (!ret) {
156 /* 4.096 usec. */
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157 timeout = (4096 * (1UL << ibp->rvp.subnet_timeout)) / 1000;
158 ibp->rvp.trap_timeout = jiffies + usecs_to_jiffies(timeout);
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159 } else {
160 ib_free_send_mad(send_buf);
4eb06882 161 ibp->rvp.trap_timeout = 0;
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162 }
163}
164
165/*
166 * Send a bad [PQ]_Key trap (ch. 14.3.8).
167 */
168void hfi1_bad_pqkey(struct hfi1_ibport *ibp, __be16 trap_num, u32 key, u32 sl,
5cd24119 169 u32 qp1, u32 qp2, u16 lid1, u16 lid2)
77241056 170{
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171 struct opa_mad_notice_attr data;
172 u32 lid = ppd_from_ibp(ibp)->lid;
173 u32 _lid1 = lid1;
174 u32 _lid2 = lid2;
77241056 175
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176 memset(&data, 0, sizeof(data));
177
178 if (trap_num == OPA_TRAP_BAD_P_KEY)
4eb06882 179 ibp->rvp.pkey_violations++;
77241056 180 else
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181 ibp->rvp.qkey_violations++;
182 ibp->rvp.n_pkt_drops++;
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183
184 /* Send violation trap */
185 data.generic_type = IB_NOTICE_TYPE_SECURITY;
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186 data.prod_type_lsb = IB_NOTICE_PROD_CA;
187 data.trap_num = trap_num;
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188 data.issuer_lid = cpu_to_be32(lid);
189 data.ntc_257_258.lid1 = cpu_to_be32(_lid1);
190 data.ntc_257_258.lid2 = cpu_to_be32(_lid2);
191 data.ntc_257_258.key = cpu_to_be32(key);
192 data.ntc_257_258.sl = sl << 3;
193 data.ntc_257_258.qp1 = cpu_to_be32(qp1);
194 data.ntc_257_258.qp2 = cpu_to_be32(qp2);
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195
196 send_trap(ibp, &data, sizeof(data));
197}
198
199/*
200 * Send a bad M_Key trap (ch. 14.3.9).
201 */
202static void bad_mkey(struct hfi1_ibport *ibp, struct ib_mad_hdr *mad,
203 __be64 mkey, __be32 dr_slid, u8 return_path[], u8 hop_cnt)
204{
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205 struct opa_mad_notice_attr data;
206 u32 lid = ppd_from_ibp(ibp)->lid;
77241056 207
5cd24119 208 memset(&data, 0, sizeof(data));
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209 /* Send violation trap */
210 data.generic_type = IB_NOTICE_TYPE_SECURITY;
77241056 211 data.prod_type_lsb = IB_NOTICE_PROD_CA;
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212 data.trap_num = OPA_TRAP_BAD_M_KEY;
213 data.issuer_lid = cpu_to_be32(lid);
214 data.ntc_256.lid = data.issuer_lid;
215 data.ntc_256.method = mad->method;
216 data.ntc_256.attr_id = mad->attr_id;
217 data.ntc_256.attr_mod = mad->attr_mod;
218 data.ntc_256.mkey = mkey;
77241056 219 if (mad->mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
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220 data.ntc_256.dr_slid = dr_slid;
221 data.ntc_256.dr_trunc_hop = IB_NOTICE_TRAP_DR_NOTICE;
222 if (hop_cnt > ARRAY_SIZE(data.ntc_256.dr_rtn_path)) {
223 data.ntc_256.dr_trunc_hop |=
77241056 224 IB_NOTICE_TRAP_DR_TRUNC;
5cd24119 225 hop_cnt = ARRAY_SIZE(data.ntc_256.dr_rtn_path);
77241056 226 }
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227 data.ntc_256.dr_trunc_hop |= hop_cnt;
228 memcpy(data.ntc_256.dr_rtn_path, return_path,
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229 hop_cnt);
230 }
231
232 send_trap(ibp, &data, sizeof(data));
233}
234
235/*
236 * Send a Port Capability Mask Changed trap (ch. 14.3.11).
237 */
45b59eef 238void hfi1_cap_mask_chg(struct rvt_dev_info *rdi, u8 port_num)
77241056 239{
5cd24119 240 struct opa_mad_notice_attr data;
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241 struct hfi1_ibdev *verbs_dev = dev_from_rdi(rdi);
242 struct hfi1_devdata *dd = dd_from_dev(verbs_dev);
243 struct hfi1_ibport *ibp = &dd->pport[port_num - 1].ibport_data;
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244 u32 lid = ppd_from_ibp(ibp)->lid;
245
246 memset(&data, 0, sizeof(data));
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247
248 data.generic_type = IB_NOTICE_TYPE_INFO;
77241056 249 data.prod_type_lsb = IB_NOTICE_PROD_CA;
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250 data.trap_num = OPA_TRAP_CHANGE_CAPABILITY;
251 data.issuer_lid = cpu_to_be32(lid);
252 data.ntc_144.lid = data.issuer_lid;
4eb06882 253 data.ntc_144.new_cap_mask = cpu_to_be32(ibp->rvp.port_cap_flags);
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254
255 send_trap(ibp, &data, sizeof(data));
256}
257
258/*
259 * Send a System Image GUID Changed trap (ch. 14.3.12).
260 */
261void hfi1_sys_guid_chg(struct hfi1_ibport *ibp)
262{
5cd24119
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263 struct opa_mad_notice_attr data;
264 u32 lid = ppd_from_ibp(ibp)->lid;
265
266 memset(&data, 0, sizeof(data));
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267
268 data.generic_type = IB_NOTICE_TYPE_INFO;
77241056 269 data.prod_type_lsb = IB_NOTICE_PROD_CA;
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270 data.trap_num = OPA_TRAP_CHANGE_SYSGUID;
271 data.issuer_lid = cpu_to_be32(lid);
272 data.ntc_145.new_sys_guid = ib_hfi1_sys_image_guid;
273 data.ntc_145.lid = data.issuer_lid;
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274
275 send_trap(ibp, &data, sizeof(data));
276}
277
278/*
279 * Send a Node Description Changed trap (ch. 14.3.13).
280 */
281void hfi1_node_desc_chg(struct hfi1_ibport *ibp)
282{
5cd24119
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283 struct opa_mad_notice_attr data;
284 u32 lid = ppd_from_ibp(ibp)->lid;
285
286 memset(&data, 0, sizeof(data));
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287
288 data.generic_type = IB_NOTICE_TYPE_INFO;
77241056 289 data.prod_type_lsb = IB_NOTICE_PROD_CA;
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290 data.trap_num = OPA_TRAP_CHANGE_CAPABILITY;
291 data.issuer_lid = cpu_to_be32(lid);
292 data.ntc_144.lid = data.issuer_lid;
293 data.ntc_144.change_flags =
294 cpu_to_be16(OPA_NOTICE_TRAP_NODE_DESC_CHG);
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295
296 send_trap(ibp, &data, sizeof(data));
297}
298
299static int __subn_get_opa_nodedesc(struct opa_smp *smp, u32 am,
300 u8 *data, struct ib_device *ibdev,
301 u8 port, u32 *resp_len)
302{
303 struct opa_node_description *nd;
304
305 if (am) {
306 smp->status |= IB_SMP_INVALID_FIELD;
307 return reply((struct ib_mad_hdr *)smp);
308 }
309
310 nd = (struct opa_node_description *)data;
311
312 memcpy(nd->data, ibdev->node_desc, sizeof(nd->data));
313
314 if (resp_len)
315 *resp_len += sizeof(*nd);
316
317 return reply((struct ib_mad_hdr *)smp);
318}
319
320static int __subn_get_opa_nodeinfo(struct opa_smp *smp, u32 am, u8 *data,
321 struct ib_device *ibdev, u8 port,
322 u32 *resp_len)
323{
324 struct opa_node_info *ni;
325 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
326 unsigned pidx = port - 1; /* IB number port from 1, hw from 0 */
327
328 ni = (struct opa_node_info *)data;
329
330 /* GUID 0 is illegal */
331 if (am || pidx >= dd->num_pports || dd->pport[pidx].guid == 0) {
332 smp->status |= IB_SMP_INVALID_FIELD;
333 return reply((struct ib_mad_hdr *)smp);
334 }
335
336 ni->port_guid = cpu_to_be64(dd->pport[pidx].guid);
337 ni->base_version = OPA_MGMT_BASE_VERSION;
338 ni->class_version = OPA_SMI_CLASS_VERSION;
339 ni->node_type = 1; /* channel adapter */
340 ni->num_ports = ibdev->phys_port_cnt;
341 /* This is already in network order */
342 ni->system_image_guid = ib_hfi1_sys_image_guid;
343 /* Use first-port GUID as node */
344 ni->node_guid = cpu_to_be64(dd->pport->guid);
345 ni->partition_cap = cpu_to_be16(hfi1_get_npkeys(dd));
346 ni->device_id = cpu_to_be16(dd->pcidev->device);
347 ni->revision = cpu_to_be32(dd->minrev);
348 ni->local_port_num = port;
349 ni->vendor_id[0] = dd->oui1;
350 ni->vendor_id[1] = dd->oui2;
351 ni->vendor_id[2] = dd->oui3;
352
353 if (resp_len)
354 *resp_len += sizeof(*ni);
355
356 return reply((struct ib_mad_hdr *)smp);
357}
358
359static int subn_get_nodeinfo(struct ib_smp *smp, struct ib_device *ibdev,
360 u8 port)
361{
362 struct ib_node_info *nip = (struct ib_node_info *)&smp->data;
363 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
364 unsigned pidx = port - 1; /* IB number port from 1, hw from 0 */
365
366 /* GUID 0 is illegal */
367 if (smp->attr_mod || pidx >= dd->num_pports ||
368 dd->pport[pidx].guid == 0)
369 smp->status |= IB_SMP_INVALID_FIELD;
370 else
371 nip->port_guid = cpu_to_be64(dd->pport[pidx].guid);
372
373 nip->base_version = OPA_MGMT_BASE_VERSION;
374 nip->class_version = OPA_SMI_CLASS_VERSION;
375 nip->node_type = 1; /* channel adapter */
376 nip->num_ports = ibdev->phys_port_cnt;
377 /* This is already in network order */
378 nip->sys_guid = ib_hfi1_sys_image_guid;
379 /* Use first-port GUID as node */
380 nip->node_guid = cpu_to_be64(dd->pport->guid);
381 nip->partition_cap = cpu_to_be16(hfi1_get_npkeys(dd));
382 nip->device_id = cpu_to_be16(dd->pcidev->device);
383 nip->revision = cpu_to_be32(dd->minrev);
384 nip->local_port_num = port;
385 nip->vendor_id[0] = dd->oui1;
386 nip->vendor_id[1] = dd->oui2;
387 nip->vendor_id[2] = dd->oui3;
388
389 return reply((struct ib_mad_hdr *)smp);
390}
391
392static void set_link_width_enabled(struct hfi1_pportdata *ppd, u32 w)
393{
394 (void)hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_LWID_ENB, w);
395}
396
397static void set_link_width_downgrade_enabled(struct hfi1_pportdata *ppd, u32 w)
398{
399 (void)hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_LWID_DG_ENB, w);
400}
401
402static void set_link_speed_enabled(struct hfi1_pportdata *ppd, u32 s)
403{
404 (void)hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_SPD_ENB, s);
405}
406
407static int check_mkey(struct hfi1_ibport *ibp, struct ib_mad_hdr *mad,
408 int mad_flags, __be64 mkey, __be32 dr_slid,
409 u8 return_path[], u8 hop_cnt)
410{
411 int valid_mkey = 0;
412 int ret = 0;
413
414 /* Is the mkey in the process of expiring? */
4eb06882
DD
415 if (ibp->rvp.mkey_lease_timeout &&
416 time_after_eq(jiffies, ibp->rvp.mkey_lease_timeout)) {
77241056 417 /* Clear timeout and mkey protection field. */
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DD
418 ibp->rvp.mkey_lease_timeout = 0;
419 ibp->rvp.mkeyprot = 0;
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420 }
421
4eb06882
DD
422 if ((mad_flags & IB_MAD_IGNORE_MKEY) || ibp->rvp.mkey == 0 ||
423 ibp->rvp.mkey == mkey)
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424 valid_mkey = 1;
425
426 /* Unset lease timeout on any valid Get/Set/TrapRepress */
4eb06882 427 if (valid_mkey && ibp->rvp.mkey_lease_timeout &&
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428 (mad->method == IB_MGMT_METHOD_GET ||
429 mad->method == IB_MGMT_METHOD_SET ||
430 mad->method == IB_MGMT_METHOD_TRAP_REPRESS))
4eb06882 431 ibp->rvp.mkey_lease_timeout = 0;
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432
433 if (!valid_mkey) {
434 switch (mad->method) {
435 case IB_MGMT_METHOD_GET:
436 /* Bad mkey not a violation below level 2 */
4eb06882 437 if (ibp->rvp.mkeyprot < 2)
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438 break;
439 case IB_MGMT_METHOD_SET:
440 case IB_MGMT_METHOD_TRAP_REPRESS:
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DD
441 if (ibp->rvp.mkey_violations != 0xFFFF)
442 ++ibp->rvp.mkey_violations;
443 if (!ibp->rvp.mkey_lease_timeout &&
444 ibp->rvp.mkey_lease_period)
445 ibp->rvp.mkey_lease_timeout = jiffies +
446 ibp->rvp.mkey_lease_period * HZ;
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447 /* Generate a trap notice. */
448 bad_mkey(ibp, mad, mkey, dr_slid, return_path,
449 hop_cnt);
450 ret = 1;
451 }
452 }
453
454 return ret;
455}
456
457/*
458 * The SMA caches reads from LCB registers in case the LCB is unavailable.
459 * (The LCB is unavailable in certain link states, for example.)
460 */
461struct lcb_datum {
462 u32 off;
463 u64 val;
464};
465
466static struct lcb_datum lcb_cache[] = {
467 { DC_LCB_STS_ROUND_TRIP_LTP_CNT, 0 },
468};
469
470static int write_lcb_cache(u32 off, u64 val)
471{
472 int i;
473
474 for (i = 0; i < ARRAY_SIZE(lcb_cache); i++) {
475 if (lcb_cache[i].off == off) {
476 lcb_cache[i].val = val;
477 return 0;
478 }
479 }
480
481 pr_warn("%s bad offset 0x%x\n", __func__, off);
482 return -1;
483}
484
485static int read_lcb_cache(u32 off, u64 *val)
486{
487 int i;
488
489 for (i = 0; i < ARRAY_SIZE(lcb_cache); i++) {
490 if (lcb_cache[i].off == off) {
491 *val = lcb_cache[i].val;
492 return 0;
493 }
494 }
495
496 pr_warn("%s bad offset 0x%x\n", __func__, off);
497 return -1;
498}
499
500void read_ltp_rtt(struct hfi1_devdata *dd)
501{
502 u64 reg;
503
504 if (read_lcb_csr(dd, DC_LCB_STS_ROUND_TRIP_LTP_CNT, &reg))
505 dd_dev_err(dd, "%s: unable to read LTP RTT\n", __func__);
506 else
507 write_lcb_cache(DC_LCB_STS_ROUND_TRIP_LTP_CNT, reg);
508}
509
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510static int __subn_get_opa_portinfo(struct opa_smp *smp, u32 am, u8 *data,
511 struct ib_device *ibdev, u8 port,
512 u32 *resp_len)
513{
514 int i;
515 struct hfi1_devdata *dd;
516 struct hfi1_pportdata *ppd;
517 struct hfi1_ibport *ibp;
518 struct opa_port_info *pi = (struct opa_port_info *)data;
519 u8 mtu;
520 u8 credit_rate;
521 u32 state;
522 u32 num_ports = OPA_AM_NPORT(am);
523 u32 start_of_sm_config = OPA_AM_START_SM_CFG(am);
524 u32 buffer_units;
525 u64 tmp = 0;
526
527 if (num_ports != 1) {
528 smp->status |= IB_SMP_INVALID_FIELD;
529 return reply((struct ib_mad_hdr *)smp);
530 }
531
532 dd = dd_from_ibdev(ibdev);
533 /* IB numbers ports from 1, hw from 0 */
534 ppd = dd->pport + (port - 1);
535 ibp = &ppd->ibport_data;
536
8638b77f 537 if (ppd->vls_supported / 2 > ARRAY_SIZE(pi->neigh_mtu.pvlx_to_mtu) ||
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538 ppd->vls_supported > ARRAY_SIZE(dd->vld)) {
539 smp->status |= IB_SMP_INVALID_FIELD;
540 return reply((struct ib_mad_hdr *)smp);
541 }
542
543 pi->lid = cpu_to_be32(ppd->lid);
544
545 /* Only return the mkey if the protection field allows it. */
546 if (!(smp->method == IB_MGMT_METHOD_GET &&
4eb06882
DD
547 ibp->rvp.mkey != smp->mkey &&
548 ibp->rvp.mkeyprot == 1))
549 pi->mkey = ibp->rvp.mkey;
550
551 pi->subnet_prefix = ibp->rvp.gid_prefix;
552 pi->sm_lid = cpu_to_be32(ibp->rvp.sm_lid);
553 pi->ib_cap_mask = cpu_to_be32(ibp->rvp.port_cap_flags);
554 pi->mkey_lease_period = cpu_to_be16(ibp->rvp.mkey_lease_period);
77241056
MM
555 pi->sm_trap_qp = cpu_to_be32(ppd->sm_trap_qp);
556 pi->sa_qp = cpu_to_be32(ppd->sa_qp);
557
558 pi->link_width.enabled = cpu_to_be16(ppd->link_width_enabled);
559 pi->link_width.supported = cpu_to_be16(ppd->link_width_supported);
560 pi->link_width.active = cpu_to_be16(ppd->link_width_active);
561
562 pi->link_width_downgrade.supported =
563 cpu_to_be16(ppd->link_width_downgrade_supported);
564 pi->link_width_downgrade.enabled =
565 cpu_to_be16(ppd->link_width_downgrade_enabled);
566 pi->link_width_downgrade.tx_active =
567 cpu_to_be16(ppd->link_width_downgrade_tx_active);
568 pi->link_width_downgrade.rx_active =
569 cpu_to_be16(ppd->link_width_downgrade_rx_active);
570
571 pi->link_speed.supported = cpu_to_be16(ppd->link_speed_supported);
572 pi->link_speed.active = cpu_to_be16(ppd->link_speed_active);
573 pi->link_speed.enabled = cpu_to_be16(ppd->link_speed_enabled);
574
575 state = driver_lstate(ppd);
576
577 if (start_of_sm_config && (state == IB_PORT_INIT))
578 ppd->is_sm_config_started = 1;
579
1d01cf33 580 pi->port_phys_conf = (ppd->port_type & 0xf);
77241056
MM
581
582#if PI_LED_ENABLE_SUP
583 pi->port_states.ledenable_offlinereason = ppd->neighbor_normal << 4;
584 pi->port_states.ledenable_offlinereason |=
585 ppd->is_sm_config_started << 5;
586 pi->port_states.ledenable_offlinereason |=
a9c05e35 587 ppd->offline_disabled_reason;
77241056
MM
588#else
589 pi->port_states.offline_reason = ppd->neighbor_normal << 4;
590 pi->port_states.offline_reason |= ppd->is_sm_config_started << 5;
a9c05e35 591 pi->port_states.offline_reason |= ppd->offline_disabled_reason;
77241056
MM
592#endif /* PI_LED_ENABLE_SUP */
593
594 pi->port_states.portphysstate_portstate =
595 (hfi1_ibphys_portstate(ppd) << 4) | state;
596
4eb06882 597 pi->mkeyprotect_lmc = (ibp->rvp.mkeyprot << 6) | ppd->lmc;
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MM
598
599 memset(pi->neigh_mtu.pvlx_to_mtu, 0, sizeof(pi->neigh_mtu.pvlx_to_mtu));
600 for (i = 0; i < ppd->vls_supported; i++) {
601 mtu = mtu_to_enum(dd->vld[i].mtu, HFI1_DEFAULT_ACTIVE_MTU);
602 if ((i % 2) == 0)
8638b77f 603 pi->neigh_mtu.pvlx_to_mtu[i / 2] |= (mtu << 4);
77241056 604 else
8638b77f 605 pi->neigh_mtu.pvlx_to_mtu[i / 2] |= mtu;
77241056
MM
606 }
607 /* don't forget VL 15 */
608 mtu = mtu_to_enum(dd->vld[15].mtu, 2048);
8638b77f 609 pi->neigh_mtu.pvlx_to_mtu[15 / 2] |= mtu;
4eb06882 610 pi->smsl = ibp->rvp.sm_sl & OPA_PI_MASK_SMSL;
77241056
MM
611 pi->operational_vls = hfi1_get_ib_cfg(ppd, HFI1_IB_CFG_OP_VLS);
612 pi->partenforce_filterraw |=
613 (ppd->linkinit_reason & OPA_PI_MASK_LINKINIT_REASON);
614 if (ppd->part_enforce & HFI1_PART_ENFORCE_IN)
615 pi->partenforce_filterraw |= OPA_PI_MASK_PARTITION_ENFORCE_IN;
616 if (ppd->part_enforce & HFI1_PART_ENFORCE_OUT)
617 pi->partenforce_filterraw |= OPA_PI_MASK_PARTITION_ENFORCE_OUT;
4eb06882 618 pi->mkey_violations = cpu_to_be16(ibp->rvp.mkey_violations);
77241056 619 /* P_KeyViolations are counted by hardware. */
4eb06882
DD
620 pi->pkey_violations = cpu_to_be16(ibp->rvp.pkey_violations);
621 pi->qkey_violations = cpu_to_be16(ibp->rvp.qkey_violations);
77241056
MM
622
623 pi->vl.cap = ppd->vls_supported;
4eb06882 624 pi->vl.high_limit = cpu_to_be16(ibp->rvp.vl_high_limit);
77241056
MM
625 pi->vl.arb_high_cap = (u8)hfi1_get_ib_cfg(ppd, HFI1_IB_CFG_VL_HIGH_CAP);
626 pi->vl.arb_low_cap = (u8)hfi1_get_ib_cfg(ppd, HFI1_IB_CFG_VL_LOW_CAP);
627
4eb06882 628 pi->clientrereg_subnettimeout = ibp->rvp.subnet_timeout;
77241056
MM
629
630 pi->port_link_mode = cpu_to_be16(OPA_PORT_LINK_MODE_OPA << 10 |
631 OPA_PORT_LINK_MODE_OPA << 5 |
632 OPA_PORT_LINK_MODE_OPA);
633
634 pi->port_ltp_crc_mode = cpu_to_be16(ppd->port_ltp_crc_mode);
635
636 pi->port_mode = cpu_to_be16(
637 ppd->is_active_optimize_enabled ?
638 OPA_PI_MASK_PORT_ACTIVE_OPTOMIZE : 0);
639
640 pi->port_packet_format.supported =
641 cpu_to_be16(OPA_PORT_PACKET_FORMAT_9B);
642 pi->port_packet_format.enabled =
643 cpu_to_be16(OPA_PORT_PACKET_FORMAT_9B);
644
645 /* flit_control.interleave is (OPA V1, version .76):
646 * bits use
647 * ---- ---
648 * 2 res
649 * 2 DistanceSupported
650 * 2 DistanceEnabled
651 * 5 MaxNextLevelTxEnabled
652 * 5 MaxNestLevelRxSupported
653 *
654 * HFI supports only "distance mode 1" (see OPA V1, version .76,
655 * section 9.6.2), so set DistanceSupported, DistanceEnabled
656 * to 0x1.
657 */
658 pi->flit_control.interleave = cpu_to_be16(0x1400);
659
660 pi->link_down_reason = ppd->local_link_down_reason.sma;
661 pi->neigh_link_down_reason = ppd->neigh_link_down_reason.sma;
662 pi->port_error_action = cpu_to_be32(ppd->port_error_action);
663 pi->mtucap = mtu_to_enum(hfi1_max_mtu, IB_MTU_4096);
664
665 /* 32.768 usec. response time (guessing) */
666 pi->resptimevalue = 3;
667
668 pi->local_port_num = port;
669
670 /* buffer info for FM */
671 pi->overall_buffer_space = cpu_to_be16(dd->link_credits);
672
673 pi->neigh_node_guid = cpu_to_be64(ppd->neighbor_guid);
674 pi->neigh_port_num = ppd->neighbor_port_number;
675 pi->port_neigh_mode =
676 (ppd->neighbor_type & OPA_PI_MASK_NEIGH_NODE_TYPE) |
677 (ppd->mgmt_allowed ? OPA_PI_MASK_NEIGH_MGMT_ALLOWED : 0) |
678 (ppd->neighbor_fm_security ?
679 OPA_PI_MASK_NEIGH_FW_AUTH_BYPASS : 0);
680
681 /* HFIs shall always return VL15 credits to their
682 * neighbor in a timely manner, without any credit return pacing.
683 */
684 credit_rate = 0;
685 buffer_units = (dd->vau) & OPA_PI_MASK_BUF_UNIT_BUF_ALLOC;
686 buffer_units |= (dd->vcu << 3) & OPA_PI_MASK_BUF_UNIT_CREDIT_ACK;
687 buffer_units |= (credit_rate << 6) &
688 OPA_PI_MASK_BUF_UNIT_VL15_CREDIT_RATE;
689 buffer_units |= (dd->vl15_init << 11) & OPA_PI_MASK_BUF_UNIT_VL15_INIT;
690 pi->buffer_units = cpu_to_be32(buffer_units);
691
692 pi->opa_cap_mask = cpu_to_be16(OPA_CAP_MASK3_IsSharedSpaceSupported);
693
694 /* HFI supports a replay buffer 128 LTPs in size */
695 pi->replay_depth.buffer = 0x80;
696 /* read the cached value of DC_LCB_STS_ROUND_TRIP_LTP_CNT */
697 read_lcb_cache(DC_LCB_STS_ROUND_TRIP_LTP_CNT, &tmp);
698
699 /* this counter is 16 bits wide, but the replay_depth.wire
700 * variable is only 8 bits */
701 if (tmp > 0xff)
702 tmp = 0xff;
703 pi->replay_depth.wire = tmp;
704
705 if (resp_len)
706 *resp_len += sizeof(struct opa_port_info);
707
708 return reply((struct ib_mad_hdr *)smp);
709}
710
711/**
712 * get_pkeys - return the PKEY table
713 * @dd: the hfi1_ib device
714 * @port: the IB port number
715 * @pkeys: the pkey table is placed here
716 */
717static int get_pkeys(struct hfi1_devdata *dd, u8 port, u16 *pkeys)
718{
719 struct hfi1_pportdata *ppd = dd->pport + port - 1;
720
721 memcpy(pkeys, ppd->pkeys, sizeof(ppd->pkeys));
722
723 return 0;
724}
725
726static int __subn_get_opa_pkeytable(struct opa_smp *smp, u32 am, u8 *data,
727 struct ib_device *ibdev, u8 port,
728 u32 *resp_len)
729{
730 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
731 u32 n_blocks_req = OPA_AM_NBLK(am);
732 u32 start_block = am & 0x7ff;
733 __be16 *p;
734 u16 *q;
735 int i;
736 u16 n_blocks_avail;
737 unsigned npkeys = hfi1_get_npkeys(dd);
738 size_t size;
739
740 if (n_blocks_req == 0) {
741 pr_warn("OPA Get PKey AM Invalid : P = %d; B = 0x%x; N = 0x%x\n",
742 port, start_block, n_blocks_req);
743 smp->status |= IB_SMP_INVALID_FIELD;
744 return reply((struct ib_mad_hdr *)smp);
745 }
746
50e5dcbe 747 n_blocks_avail = (u16)(npkeys / OPA_PARTITION_TABLE_BLK_SIZE) + 1;
77241056
MM
748
749 size = (n_blocks_req * OPA_PARTITION_TABLE_BLK_SIZE) * sizeof(u16);
750
751 if (start_block + n_blocks_req > n_blocks_avail ||
752 n_blocks_req > OPA_NUM_PKEY_BLOCKS_PER_SMP) {
753 pr_warn("OPA Get PKey AM Invalid : s 0x%x; req 0x%x; "
754 "avail 0x%x; blk/smp 0x%lx\n",
755 start_block, n_blocks_req, n_blocks_avail,
756 OPA_NUM_PKEY_BLOCKS_PER_SMP);
757 smp->status |= IB_SMP_INVALID_FIELD;
758 return reply((struct ib_mad_hdr *)smp);
759 }
760
50e5dcbe 761 p = (__be16 *)data;
77241056
MM
762 q = (u16 *)data;
763 /* get the real pkeys if we are requesting the first block */
764 if (start_block == 0) {
765 get_pkeys(dd, port, q);
766 for (i = 0; i < npkeys; i++)
767 p[i] = cpu_to_be16(q[i]);
768 if (resp_len)
769 *resp_len += size;
770 } else
771 smp->status |= IB_SMP_INVALID_FIELD;
772
773 return reply((struct ib_mad_hdr *)smp);
774}
775
776enum {
777 HFI_TRANSITION_DISALLOWED,
778 HFI_TRANSITION_IGNORED,
779 HFI_TRANSITION_ALLOWED,
780 HFI_TRANSITION_UNDEFINED,
781};
782
783/*
784 * Use shortened names to improve readability of
785 * {logical,physical}_state_transitions
786 */
787enum {
788 __D = HFI_TRANSITION_DISALLOWED,
789 __I = HFI_TRANSITION_IGNORED,
790 __A = HFI_TRANSITION_ALLOWED,
791 __U = HFI_TRANSITION_UNDEFINED,
792};
793
794/*
795 * IB_PORTPHYSSTATE_POLLING (2) through OPA_PORTPHYSSTATE_MAX (11) are
796 * represented in physical_state_transitions.
797 */
798#define __N_PHYSTATES (OPA_PORTPHYSSTATE_MAX - IB_PORTPHYSSTATE_POLLING + 1)
799
800/*
801 * Within physical_state_transitions, rows represent "old" states,
802 * columns "new" states, and physical_state_transitions.allowed[old][new]
803 * indicates if the transition from old state to new state is legal (see
804 * OPAg1v1, Table 6-4).
805 */
806static const struct {
807 u8 allowed[__N_PHYSTATES][__N_PHYSTATES];
808} physical_state_transitions = {
809 {
810 /* 2 3 4 5 6 7 8 9 10 11 */
811 /* 2 */ { __A, __A, __D, __D, __D, __D, __D, __D, __D, __D },
812 /* 3 */ { __A, __I, __D, __D, __D, __D, __D, __D, __D, __A },
813 /* 4 */ { __U, __U, __U, __U, __U, __U, __U, __U, __U, __U },
814 /* 5 */ { __A, __A, __D, __I, __D, __D, __D, __D, __D, __D },
815 /* 6 */ { __U, __U, __U, __U, __U, __U, __U, __U, __U, __U },
816 /* 7 */ { __D, __A, __D, __D, __D, __I, __D, __D, __D, __D },
817 /* 8 */ { __U, __U, __U, __U, __U, __U, __U, __U, __U, __U },
818 /* 9 */ { __I, __A, __D, __D, __D, __D, __D, __I, __D, __D },
819 /*10 */ { __U, __U, __U, __U, __U, __U, __U, __U, __U, __U },
820 /*11 */ { __D, __A, __D, __D, __D, __D, __D, __D, __D, __I },
821 }
822};
823
824/*
825 * IB_PORT_DOWN (1) through IB_PORT_ACTIVE_DEFER (5) are represented
826 * logical_state_transitions
827 */
828
829#define __N_LOGICAL_STATES (IB_PORT_ACTIVE_DEFER - IB_PORT_DOWN + 1)
830
831/*
832 * Within logical_state_transitions rows represent "old" states,
833 * columns "new" states, and logical_state_transitions.allowed[old][new]
834 * indicates if the transition from old state to new state is legal (see
835 * OPAg1v1, Table 9-12).
836 */
837static const struct {
838 u8 allowed[__N_LOGICAL_STATES][__N_LOGICAL_STATES];
839} logical_state_transitions = {
840 {
841 /* 1 2 3 4 5 */
842 /* 1 */ { __I, __D, __D, __D, __U},
843 /* 2 */ { __D, __I, __A, __D, __U},
844 /* 3 */ { __D, __D, __I, __A, __U},
845 /* 4 */ { __D, __D, __I, __I, __U},
846 /* 5 */ { __U, __U, __U, __U, __U},
847 }
848};
849
850static int logical_transition_allowed(int old, int new)
851{
852 if (old < IB_PORT_NOP || old > IB_PORT_ACTIVE_DEFER ||
853 new < IB_PORT_NOP || new > IB_PORT_ACTIVE_DEFER) {
854 pr_warn("invalid logical state(s) (old %d new %d)\n",
855 old, new);
856 return HFI_TRANSITION_UNDEFINED;
857 }
858
859 if (new == IB_PORT_NOP)
860 return HFI_TRANSITION_ALLOWED; /* always allowed */
861
862 /* adjust states for indexing into logical_state_transitions */
863 old -= IB_PORT_DOWN;
864 new -= IB_PORT_DOWN;
865
866 if (old < 0 || new < 0)
867 return HFI_TRANSITION_UNDEFINED;
868 return logical_state_transitions.allowed[old][new];
869}
870
871static int physical_transition_allowed(int old, int new)
872{
873 if (old < IB_PORTPHYSSTATE_NOP || old > OPA_PORTPHYSSTATE_MAX ||
874 new < IB_PORTPHYSSTATE_NOP || new > OPA_PORTPHYSSTATE_MAX) {
875 pr_warn("invalid physical state(s) (old %d new %d)\n",
876 old, new);
877 return HFI_TRANSITION_UNDEFINED;
878 }
879
880 if (new == IB_PORTPHYSSTATE_NOP)
881 return HFI_TRANSITION_ALLOWED; /* always allowed */
882
883 /* adjust states for indexing into physical_state_transitions */
884 old -= IB_PORTPHYSSTATE_POLLING;
885 new -= IB_PORTPHYSSTATE_POLLING;
886
887 if (old < 0 || new < 0)
888 return HFI_TRANSITION_UNDEFINED;
889 return physical_state_transitions.allowed[old][new];
890}
891
892static int port_states_transition_allowed(struct hfi1_pportdata *ppd,
893 u32 logical_new, u32 physical_new)
894{
895 u32 physical_old = driver_physical_state(ppd);
896 u32 logical_old = driver_logical_state(ppd);
897 int ret, logical_allowed, physical_allowed;
898
f3ff8189
JJ
899 ret = logical_transition_allowed(logical_old, logical_new);
900 logical_allowed = ret;
77241056
MM
901
902 if (ret == HFI_TRANSITION_DISALLOWED ||
903 ret == HFI_TRANSITION_UNDEFINED) {
904 pr_warn("invalid logical state transition %s -> %s\n",
905 opa_lstate_name(logical_old),
906 opa_lstate_name(logical_new));
907 return ret;
908 }
909
f3ff8189
JJ
910 ret = physical_transition_allowed(physical_old, physical_new);
911 physical_allowed = ret;
77241056
MM
912
913 if (ret == HFI_TRANSITION_DISALLOWED ||
914 ret == HFI_TRANSITION_UNDEFINED) {
915 pr_warn("invalid physical state transition %s -> %s\n",
916 opa_pstate_name(physical_old),
917 opa_pstate_name(physical_new));
918 return ret;
919 }
920
921 if (logical_allowed == HFI_TRANSITION_IGNORED &&
922 physical_allowed == HFI_TRANSITION_IGNORED)
923 return HFI_TRANSITION_IGNORED;
924
a9c05e35
BM
925 /*
926 * A change request of Physical Port State from
927 * 'Offline' to 'Polling' should be ignored.
928 */
929 if ((physical_old == OPA_PORTPHYSSTATE_OFFLINE) &&
930 (physical_new == IB_PORTPHYSSTATE_POLLING))
931 return HFI_TRANSITION_IGNORED;
932
77241056
MM
933 /*
934 * Either physical_allowed or logical_allowed is
935 * HFI_TRANSITION_ALLOWED.
936 */
937 return HFI_TRANSITION_ALLOWED;
938}
939
940static int set_port_states(struct hfi1_pportdata *ppd, struct opa_smp *smp,
941 u32 logical_state, u32 phys_state,
942 int suppress_idle_sma)
943{
944 struct hfi1_devdata *dd = ppd->dd;
945 u32 link_state;
946 int ret;
947
948 ret = port_states_transition_allowed(ppd, logical_state, phys_state);
949 if (ret == HFI_TRANSITION_DISALLOWED ||
950 ret == HFI_TRANSITION_UNDEFINED) {
951 /* error message emitted above */
952 smp->status |= IB_SMP_INVALID_FIELD;
953 return 0;
954 }
955
956 if (ret == HFI_TRANSITION_IGNORED)
957 return 0;
958
959 if ((phys_state != IB_PORTPHYSSTATE_NOP) &&
960 !(logical_state == IB_PORT_DOWN ||
961 logical_state == IB_PORT_NOP)){
962 pr_warn("SubnSet(OPA_PortInfo) port state invalid: logical_state 0x%x physical_state 0x%x\n",
963 logical_state, phys_state);
964 smp->status |= IB_SMP_INVALID_FIELD;
965 }
966
967 /*
968 * Logical state changes are summarized in OPAv1g1 spec.,
969 * Table 9-12; physical state changes are summarized in
970 * OPAv1g1 spec., Table 6.4.
971 */
972 switch (logical_state) {
973 case IB_PORT_NOP:
974 if (phys_state == IB_PORTPHYSSTATE_NOP)
975 break;
976 /* FALLTHROUGH */
977 case IB_PORT_DOWN:
978 if (phys_state == IB_PORTPHYSSTATE_NOP)
979 link_state = HLS_DN_DOWNDEF;
980 else if (phys_state == IB_PORTPHYSSTATE_POLLING) {
981 link_state = HLS_DN_POLL;
982 set_link_down_reason(ppd,
983 OPA_LINKDOWN_REASON_FM_BOUNCE, 0,
984 OPA_LINKDOWN_REASON_FM_BOUNCE);
985 } else if (phys_state == IB_PORTPHYSSTATE_DISABLED)
986 link_state = HLS_DN_DISABLE;
987 else {
988 pr_warn("SubnSet(OPA_PortInfo) invalid physical state 0x%x\n",
989 phys_state);
990 smp->status |= IB_SMP_INVALID_FIELD;
991 break;
992 }
993
994 set_link_state(ppd, link_state);
995 if (link_state == HLS_DN_DISABLE &&
996 (ppd->offline_disabled_reason >
a9c05e35 997 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_SMA_DISABLED) ||
77241056 998 ppd->offline_disabled_reason ==
a9c05e35 999 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_NONE)))
77241056 1000 ppd->offline_disabled_reason =
a9c05e35 1001 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_SMA_DISABLED);
77241056
MM
1002 /*
1003 * Don't send a reply if the response would be sent
1004 * through the disabled port.
1005 */
1006 if (link_state == HLS_DN_DISABLE && smp->hop_cnt)
1007 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
1008 break;
1009 case IB_PORT_ARMED:
1010 ret = set_link_state(ppd, HLS_UP_ARMED);
1011 if ((ret == 0) && (suppress_idle_sma == 0))
1012 send_idle_sma(dd, SMA_IDLE_ARM);
1013 break;
1014 case IB_PORT_ACTIVE:
1015 if (ppd->neighbor_normal) {
1016 ret = set_link_state(ppd, HLS_UP_ACTIVE);
1017 if (ret == 0)
1018 send_idle_sma(dd, SMA_IDLE_ACTIVE);
1019 } else {
1020 pr_warn("SubnSet(OPA_PortInfo) Cannot move to Active with NeighborNormal 0\n");
1021 smp->status |= IB_SMP_INVALID_FIELD;
1022 }
1023 break;
1024 default:
1025 pr_warn("SubnSet(OPA_PortInfo) invalid logical state 0x%x\n",
1026 logical_state);
1027 smp->status |= IB_SMP_INVALID_FIELD;
1028 }
1029
1030 return 0;
1031}
1032
1033/**
1034 * subn_set_opa_portinfo - set port information
1035 * @smp: the incoming SM packet
1036 * @ibdev: the infiniband device
1037 * @port: the port on the device
1038 *
1039 */
1040static int __subn_set_opa_portinfo(struct opa_smp *smp, u32 am, u8 *data,
1041 struct ib_device *ibdev, u8 port,
1042 u32 *resp_len)
1043{
1044 struct opa_port_info *pi = (struct opa_port_info *)data;
1045 struct ib_event event;
1046 struct hfi1_devdata *dd;
1047 struct hfi1_pportdata *ppd;
1048 struct hfi1_ibport *ibp;
1049 u8 clientrereg;
1050 unsigned long flags;
1051 u32 smlid, opa_lid; /* tmp vars to hold LID values */
1052 u16 lid;
1053 u8 ls_old, ls_new, ps_new;
1054 u8 vls;
1055 u8 msl;
1056 u8 crc_enabled;
1057 u16 lse, lwe, mtu;
1058 u32 num_ports = OPA_AM_NPORT(am);
1059 u32 start_of_sm_config = OPA_AM_START_SM_CFG(am);
1060 int ret, i, invalid = 0, call_set_mtu = 0;
1061 int call_link_downgrade_policy = 0;
1062
1063 if (num_ports != 1) {
1064 smp->status |= IB_SMP_INVALID_FIELD;
1065 return reply((struct ib_mad_hdr *)smp);
1066 }
1067
1068 opa_lid = be32_to_cpu(pi->lid);
1069 if (opa_lid & 0xFFFF0000) {
1070 pr_warn("OPA_PortInfo lid out of range: %X\n", opa_lid);
1071 smp->status |= IB_SMP_INVALID_FIELD;
1072 goto get_only;
1073 }
1074
1075 lid = (u16)(opa_lid & 0x0000FFFF);
1076
1077 smlid = be32_to_cpu(pi->sm_lid);
1078 if (smlid & 0xFFFF0000) {
1079 pr_warn("OPA_PortInfo SM lid out of range: %X\n", smlid);
1080 smp->status |= IB_SMP_INVALID_FIELD;
1081 goto get_only;
1082 }
1083 smlid &= 0x0000FFFF;
1084
1085 clientrereg = (pi->clientrereg_subnettimeout &
1086 OPA_PI_MASK_CLIENT_REREGISTER);
1087
1088 dd = dd_from_ibdev(ibdev);
1089 /* IB numbers ports from 1, hw from 0 */
1090 ppd = dd->pport + (port - 1);
1091 ibp = &ppd->ibport_data;
1092 event.device = ibdev;
1093 event.element.port_num = port;
1094
1095 ls_old = driver_lstate(ppd);
1096
4eb06882
DD
1097 ibp->rvp.mkey = pi->mkey;
1098 ibp->rvp.gid_prefix = pi->subnet_prefix;
1099 ibp->rvp.mkey_lease_period = be16_to_cpu(pi->mkey_lease_period);
77241056
MM
1100
1101 /* Must be a valid unicast LID address. */
1102 if ((lid == 0 && ls_old > IB_PORT_INIT) ||
8859b4a6 1103 lid >= be16_to_cpu(IB_MULTICAST_LID_BASE)) {
77241056
MM
1104 smp->status |= IB_SMP_INVALID_FIELD;
1105 pr_warn("SubnSet(OPA_PortInfo) lid invalid 0x%x\n",
1106 lid);
1107 } else if (ppd->lid != lid ||
1108 ppd->lmc != (pi->mkeyprotect_lmc & OPA_PI_MASK_LMC)) {
1109 if (ppd->lid != lid)
1110 hfi1_set_uevent_bits(ppd, _HFI1_EVENT_LID_CHANGE_BIT);
1111 if (ppd->lmc != (pi->mkeyprotect_lmc & OPA_PI_MASK_LMC))
1112 hfi1_set_uevent_bits(ppd, _HFI1_EVENT_LMC_CHANGE_BIT);
1113 hfi1_set_lid(ppd, lid, pi->mkeyprotect_lmc & OPA_PI_MASK_LMC);
1114 event.event = IB_EVENT_LID_CHANGE;
1115 ib_dispatch_event(&event);
1116 }
1117
1118 msl = pi->smsl & OPA_PI_MASK_SMSL;
1119 if (pi->partenforce_filterraw & OPA_PI_MASK_LINKINIT_REASON)
1120 ppd->linkinit_reason =
1121 (pi->partenforce_filterraw &
1122 OPA_PI_MASK_LINKINIT_REASON);
1123 /* enable/disable SW pkey checking as per FM control */
1124 if (pi->partenforce_filterraw & OPA_PI_MASK_PARTITION_ENFORCE_IN)
1125 ppd->part_enforce |= HFI1_PART_ENFORCE_IN;
1126 else
1127 ppd->part_enforce &= ~HFI1_PART_ENFORCE_IN;
1128
1129 if (pi->partenforce_filterraw & OPA_PI_MASK_PARTITION_ENFORCE_OUT)
1130 ppd->part_enforce |= HFI1_PART_ENFORCE_OUT;
1131 else
1132 ppd->part_enforce &= ~HFI1_PART_ENFORCE_OUT;
1133
1134 /* Must be a valid unicast LID address. */
1135 if ((smlid == 0 && ls_old > IB_PORT_INIT) ||
8859b4a6 1136 smlid >= be16_to_cpu(IB_MULTICAST_LID_BASE)) {
77241056
MM
1137 smp->status |= IB_SMP_INVALID_FIELD;
1138 pr_warn("SubnSet(OPA_PortInfo) smlid invalid 0x%x\n", smlid);
4eb06882 1139 } else if (smlid != ibp->rvp.sm_lid || msl != ibp->rvp.sm_sl) {
77241056 1140 pr_warn("SubnSet(OPA_PortInfo) smlid 0x%x\n", smlid);
4eb06882 1141 spin_lock_irqsave(&ibp->rvp.lock, flags);
9c4a311e 1142 if (ibp->rvp.sm_ah) {
4eb06882 1143 if (smlid != ibp->rvp.sm_lid)
9c4a311e 1144 ibp->rvp.sm_ah->attr.dlid = smlid;
4eb06882 1145 if (msl != ibp->rvp.sm_sl)
9c4a311e 1146 ibp->rvp.sm_ah->attr.sl = msl;
77241056 1147 }
4eb06882
DD
1148 spin_unlock_irqrestore(&ibp->rvp.lock, flags);
1149 if (smlid != ibp->rvp.sm_lid)
1150 ibp->rvp.sm_lid = smlid;
1151 if (msl != ibp->rvp.sm_sl)
1152 ibp->rvp.sm_sl = msl;
77241056
MM
1153 event.event = IB_EVENT_SM_CHANGE;
1154 ib_dispatch_event(&event);
1155 }
1156
1157 if (pi->link_down_reason == 0) {
1158 ppd->local_link_down_reason.sma = 0;
1159 ppd->local_link_down_reason.latest = 0;
1160 }
1161
1162 if (pi->neigh_link_down_reason == 0) {
1163 ppd->neigh_link_down_reason.sma = 0;
1164 ppd->neigh_link_down_reason.latest = 0;
1165 }
1166
1167 ppd->sm_trap_qp = be32_to_cpu(pi->sm_trap_qp);
1168 ppd->sa_qp = be32_to_cpu(pi->sa_qp);
1169
1170 ppd->port_error_action = be32_to_cpu(pi->port_error_action);
1171 lwe = be16_to_cpu(pi->link_width.enabled);
1172 if (lwe) {
d0d236ea
JJ
1173 if (lwe == OPA_LINK_WIDTH_RESET ||
1174 lwe == OPA_LINK_WIDTH_RESET_OLD)
77241056
MM
1175 set_link_width_enabled(ppd, ppd->link_width_supported);
1176 else if ((lwe & ~ppd->link_width_supported) == 0)
1177 set_link_width_enabled(ppd, lwe);
1178 else
1179 smp->status |= IB_SMP_INVALID_FIELD;
1180 }
1181 lwe = be16_to_cpu(pi->link_width_downgrade.enabled);
1182 /* LWD.E is always applied - 0 means "disabled" */
d0d236ea
JJ
1183 if (lwe == OPA_LINK_WIDTH_RESET ||
1184 lwe == OPA_LINK_WIDTH_RESET_OLD) {
77241056
MM
1185 set_link_width_downgrade_enabled(ppd,
1186 ppd->link_width_downgrade_supported);
1187 } else if ((lwe & ~ppd->link_width_downgrade_supported) == 0) {
1188 /* only set and apply if something changed */
1189 if (lwe != ppd->link_width_downgrade_enabled) {
1190 set_link_width_downgrade_enabled(ppd, lwe);
1191 call_link_downgrade_policy = 1;
1192 }
1193 } else
1194 smp->status |= IB_SMP_INVALID_FIELD;
1195
1196 lse = be16_to_cpu(pi->link_speed.enabled);
1197 if (lse) {
1198 if (lse & be16_to_cpu(pi->link_speed.supported))
1199 set_link_speed_enabled(ppd, lse);
1200 else
1201 smp->status |= IB_SMP_INVALID_FIELD;
1202 }
1203
4eb06882
DD
1204 ibp->rvp.mkeyprot =
1205 (pi->mkeyprotect_lmc & OPA_PI_MASK_MKEY_PROT_BIT) >> 6;
1206 ibp->rvp.vl_high_limit = be16_to_cpu(pi->vl.high_limit) & 0xFF;
77241056 1207 (void)hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_VL_HIGH_LIMIT,
4eb06882 1208 ibp->rvp.vl_high_limit);
77241056 1209
8638b77f 1210 if (ppd->vls_supported / 2 > ARRAY_SIZE(pi->neigh_mtu.pvlx_to_mtu) ||
77241056
MM
1211 ppd->vls_supported > ARRAY_SIZE(dd->vld)) {
1212 smp->status |= IB_SMP_INVALID_FIELD;
1213 return reply((struct ib_mad_hdr *)smp);
1214 }
1215 for (i = 0; i < ppd->vls_supported; i++) {
1216 if ((i % 2) == 0)
8638b77f 1217 mtu = enum_to_mtu((pi->neigh_mtu.pvlx_to_mtu[i / 2] >> 4)
77241056
MM
1218 & 0xF);
1219 else
8638b77f 1220 mtu = enum_to_mtu(pi->neigh_mtu.pvlx_to_mtu[i / 2] & 0xF);
77241056
MM
1221 if (mtu == 0xffff) {
1222 pr_warn("SubnSet(OPA_PortInfo) mtu invalid %d (0x%x)\n",
1223 mtu,
1224 (pi->neigh_mtu.pvlx_to_mtu[0] >> 4) & 0xF);
1225 smp->status |= IB_SMP_INVALID_FIELD;
1226 mtu = hfi1_max_mtu; /* use a valid MTU */
1227 }
1228 if (dd->vld[i].mtu != mtu) {
1229 dd_dev_info(dd,
1230 "MTU change on vl %d from %d to %d\n",
1231 i, dd->vld[i].mtu, mtu);
1232 dd->vld[i].mtu = mtu;
1233 call_set_mtu++;
1234 }
1235 }
1236 /* As per OPAV1 spec: VL15 must support and be configured
1237 * for operation with a 2048 or larger MTU.
1238 */
8638b77f 1239 mtu = enum_to_mtu(pi->neigh_mtu.pvlx_to_mtu[15 / 2] & 0xF);
77241056
MM
1240 if (mtu < 2048 || mtu == 0xffff)
1241 mtu = 2048;
1242 if (dd->vld[15].mtu != mtu) {
1243 dd_dev_info(dd,
1244 "MTU change on vl 15 from %d to %d\n",
1245 dd->vld[15].mtu, mtu);
1246 dd->vld[15].mtu = mtu;
1247 call_set_mtu++;
1248 }
1249 if (call_set_mtu)
1250 set_mtu(ppd);
1251
1252 /* Set operational VLs */
1253 vls = pi->operational_vls & OPA_PI_MASK_OPERATIONAL_VL;
1254 if (vls) {
1255 if (vls > ppd->vls_supported) {
1256 pr_warn("SubnSet(OPA_PortInfo) VL's supported invalid %d\n",
1257 pi->operational_vls);
1258 smp->status |= IB_SMP_INVALID_FIELD;
1259 } else {
1260 if (hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_OP_VLS,
1261 vls) == -EINVAL)
1262 smp->status |= IB_SMP_INVALID_FIELD;
1263 }
1264 }
1265
1266 if (pi->mkey_violations == 0)
4eb06882 1267 ibp->rvp.mkey_violations = 0;
77241056
MM
1268
1269 if (pi->pkey_violations == 0)
4eb06882 1270 ibp->rvp.pkey_violations = 0;
77241056
MM
1271
1272 if (pi->qkey_violations == 0)
4eb06882 1273 ibp->rvp.qkey_violations = 0;
77241056 1274
4eb06882 1275 ibp->rvp.subnet_timeout =
77241056
MM
1276 pi->clientrereg_subnettimeout & OPA_PI_MASK_SUBNET_TIMEOUT;
1277
1278 crc_enabled = be16_to_cpu(pi->port_ltp_crc_mode);
1279 crc_enabled >>= 4;
1280 crc_enabled &= 0xf;
1281
1282 if (crc_enabled != 0)
1283 ppd->port_crc_mode_enabled = port_ltp_to_cap(crc_enabled);
1284
1285 ppd->is_active_optimize_enabled =
1286 !!(be16_to_cpu(pi->port_mode)
1287 & OPA_PI_MASK_PORT_ACTIVE_OPTOMIZE);
1288
1289 ls_new = pi->port_states.portphysstate_portstate &
1290 OPA_PI_MASK_PORT_STATE;
1291 ps_new = (pi->port_states.portphysstate_portstate &
1292 OPA_PI_MASK_PORT_PHYSICAL_STATE) >> 4;
1293
1294 if (ls_old == IB_PORT_INIT) {
1295 if (start_of_sm_config) {
1296 if (ls_new == ls_old || (ls_new == IB_PORT_ARMED))
1297 ppd->is_sm_config_started = 1;
1298 } else if (ls_new == IB_PORT_ARMED) {
1299 if (ppd->is_sm_config_started == 0)
1300 invalid = 1;
1301 }
1302 }
1303
1304 /* Handle CLIENT_REREGISTER event b/c SM asked us for it */
1305 if (clientrereg) {
1306 event.event = IB_EVENT_CLIENT_REREGISTER;
1307 ib_dispatch_event(&event);
1308 }
1309
1310 /*
1311 * Do the port state change now that the other link parameters
1312 * have been set.
1313 * Changing the port physical state only makes sense if the link
1314 * is down or is being set to down.
1315 */
1316
1317 ret = set_port_states(ppd, smp, ls_new, ps_new, invalid);
1318 if (ret)
1319 return ret;
1320
1321 ret = __subn_get_opa_portinfo(smp, am, data, ibdev, port, resp_len);
1322
1323 /* restore re-reg bit per o14-12.2.1 */
1324 pi->clientrereg_subnettimeout |= clientrereg;
1325
1326 /*
1327 * Apply the new link downgrade policy. This may result in a link
1328 * bounce. Do this after everything else so things are settled.
1329 * Possible problem: if setting the port state above fails, then
1330 * the policy change is not applied.
1331 */
1332 if (call_link_downgrade_policy)
1333 apply_link_downgrade_policy(ppd, 0);
1334
1335 return ret;
1336
1337get_only:
1338 return __subn_get_opa_portinfo(smp, am, data, ibdev, port, resp_len);
1339}
1340
1341/**
1342 * set_pkeys - set the PKEY table for ctxt 0
1343 * @dd: the hfi1_ib device
1344 * @port: the IB port number
1345 * @pkeys: the PKEY table
1346 */
1347static int set_pkeys(struct hfi1_devdata *dd, u8 port, u16 *pkeys)
1348{
1349 struct hfi1_pportdata *ppd;
1350 int i;
1351 int changed = 0;
1352 int update_includes_mgmt_partition = 0;
1353
1354 /*
1355 * IB port one/two always maps to context zero/one,
1356 * always a kernel context, no locking needed
1357 * If we get here with ppd setup, no need to check
1358 * that rcd is valid.
1359 */
1360 ppd = dd->pport + (port - 1);
1361 /*
1362 * If the update does not include the management pkey, don't do it.
1363 */
1364 for (i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
1365 if (pkeys[i] == LIM_MGMT_P_KEY) {
1366 update_includes_mgmt_partition = 1;
1367 break;
1368 }
1369 }
1370
1371 if (!update_includes_mgmt_partition)
1372 return 1;
1373
1374 for (i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
1375 u16 key = pkeys[i];
1376 u16 okey = ppd->pkeys[i];
1377
1378 if (key == okey)
1379 continue;
1380 /*
1381 * The SM gives us the complete PKey table. We have
1382 * to ensure that we put the PKeys in the matching
1383 * slots.
1384 */
1385 ppd->pkeys[i] = key;
1386 changed = 1;
1387 }
1388
1389 if (changed) {
1390 struct ib_event event;
1391
1392 (void)hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_PKEYS, 0);
1393
1394 event.event = IB_EVENT_PKEY_CHANGE;
ec3f2c12 1395 event.device = &dd->verbs_dev.rdi.ibdev;
77241056
MM
1396 event.element.port_num = port;
1397 ib_dispatch_event(&event);
1398 }
1399 return 0;
1400}
1401
1402static int __subn_set_opa_pkeytable(struct opa_smp *smp, u32 am, u8 *data,
1403 struct ib_device *ibdev, u8 port,
1404 u32 *resp_len)
1405{
1406 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
1407 u32 n_blocks_sent = OPA_AM_NBLK(am);
1408 u32 start_block = am & 0x7ff;
50e5dcbe 1409 u16 *p = (u16 *)data;
77241056
MM
1410 __be16 *q = (__be16 *)data;
1411 int i;
1412 u16 n_blocks_avail;
1413 unsigned npkeys = hfi1_get_npkeys(dd);
1414
1415 if (n_blocks_sent == 0) {
1416 pr_warn("OPA Get PKey AM Invalid : P = %d; B = 0x%x; N = 0x%x\n",
1417 port, start_block, n_blocks_sent);
1418 smp->status |= IB_SMP_INVALID_FIELD;
1419 return reply((struct ib_mad_hdr *)smp);
1420 }
1421
8638b77f 1422 n_blocks_avail = (u16)(npkeys / OPA_PARTITION_TABLE_BLK_SIZE) + 1;
77241056
MM
1423
1424 if (start_block + n_blocks_sent > n_blocks_avail ||
1425 n_blocks_sent > OPA_NUM_PKEY_BLOCKS_PER_SMP) {
1426 pr_warn("OPA Set PKey AM Invalid : s 0x%x; req 0x%x; avail 0x%x; blk/smp 0x%lx\n",
1427 start_block, n_blocks_sent, n_blocks_avail,
1428 OPA_NUM_PKEY_BLOCKS_PER_SMP);
1429 smp->status |= IB_SMP_INVALID_FIELD;
1430 return reply((struct ib_mad_hdr *)smp);
1431 }
1432
1433 for (i = 0; i < n_blocks_sent * OPA_PARTITION_TABLE_BLK_SIZE; i++)
1434 p[i] = be16_to_cpu(q[i]);
1435
1436 if (start_block == 0 && set_pkeys(dd, port, p) != 0) {
1437 smp->status |= IB_SMP_INVALID_FIELD;
1438 return reply((struct ib_mad_hdr *)smp);
1439 }
1440
1441 return __subn_get_opa_pkeytable(smp, am, data, ibdev, port, resp_len);
1442}
1443
1444static int get_sc2vlt_tables(struct hfi1_devdata *dd, void *data)
1445{
a787bde8 1446 u64 *val = data;
77241056
MM
1447
1448 *val++ = read_csr(dd, SEND_SC2VLT0);
1449 *val++ = read_csr(dd, SEND_SC2VLT1);
1450 *val++ = read_csr(dd, SEND_SC2VLT2);
1451 *val++ = read_csr(dd, SEND_SC2VLT3);
1452 return 0;
1453}
1454
1455#define ILLEGAL_VL 12
1456/*
1457 * filter_sc2vlt changes mappings to VL15 to ILLEGAL_VL (except
1458 * for SC15, which must map to VL15). If we don't remap things this
1459 * way it is possible for VL15 counters to increment when we try to
1460 * send on a SC which is mapped to an invalid VL.
1461 */
1462static void filter_sc2vlt(void *data)
1463{
1464 int i;
a787bde8 1465 u8 *pd = data;
77241056
MM
1466
1467 for (i = 0; i < OPA_MAX_SCS; i++) {
1468 if (i == 15)
1469 continue;
1470 if ((pd[i] & 0x1f) == 0xf)
1471 pd[i] = ILLEGAL_VL;
1472 }
1473}
1474
1475static int set_sc2vlt_tables(struct hfi1_devdata *dd, void *data)
1476{
a787bde8 1477 u64 *val = data;
77241056
MM
1478
1479 filter_sc2vlt(data);
1480
1481 write_csr(dd, SEND_SC2VLT0, *val++);
1482 write_csr(dd, SEND_SC2VLT1, *val++);
1483 write_csr(dd, SEND_SC2VLT2, *val++);
1484 write_csr(dd, SEND_SC2VLT3, *val++);
1485 write_seqlock_irq(&dd->sc2vl_lock);
a787bde8 1486 memcpy(dd->sc2vl, data, sizeof(dd->sc2vl));
77241056
MM
1487 write_sequnlock_irq(&dd->sc2vl_lock);
1488 return 0;
1489}
1490
1491static int __subn_get_opa_sl_to_sc(struct opa_smp *smp, u32 am, u8 *data,
1492 struct ib_device *ibdev, u8 port,
1493 u32 *resp_len)
1494{
1495 struct hfi1_ibport *ibp = to_iport(ibdev, port);
6618c051 1496 u8 *p = data;
77241056
MM
1497 size_t size = ARRAY_SIZE(ibp->sl_to_sc); /* == 32 */
1498 unsigned i;
1499
1500 if (am) {
1501 smp->status |= IB_SMP_INVALID_FIELD;
1502 return reply((struct ib_mad_hdr *)smp);
1503 }
1504
1505 for (i = 0; i < ARRAY_SIZE(ibp->sl_to_sc); i++)
1506 *p++ = ibp->sl_to_sc[i];
1507
1508 if (resp_len)
1509 *resp_len += size;
1510
1511 return reply((struct ib_mad_hdr *)smp);
1512}
1513
1514static int __subn_set_opa_sl_to_sc(struct opa_smp *smp, u32 am, u8 *data,
1515 struct ib_device *ibdev, u8 port,
1516 u32 *resp_len)
1517{
1518 struct hfi1_ibport *ibp = to_iport(ibdev, port);
6618c051 1519 u8 *p = data;
77241056 1520 int i;
0ec79e87 1521 u8 sc;
77241056
MM
1522
1523 if (am) {
1524 smp->status |= IB_SMP_INVALID_FIELD;
1525 return reply((struct ib_mad_hdr *)smp);
1526 }
1527
0ec79e87
KW
1528 for (i = 0; i < ARRAY_SIZE(ibp->sl_to_sc); i++) {
1529 sc = *p++;
1530 if (ibp->sl_to_sc[i] != sc) {
1531 ibp->sl_to_sc[i] = sc;
1532
1533 /* Put all stale qps into error state */
1534 hfi1_error_port_qps(ibp, i);
1535 }
1536 }
77241056
MM
1537
1538 return __subn_get_opa_sl_to_sc(smp, am, data, ibdev, port, resp_len);
1539}
1540
1541static int __subn_get_opa_sc_to_sl(struct opa_smp *smp, u32 am, u8 *data,
1542 struct ib_device *ibdev, u8 port,
1543 u32 *resp_len)
1544{
1545 struct hfi1_ibport *ibp = to_iport(ibdev, port);
6618c051 1546 u8 *p = data;
77241056
MM
1547 size_t size = ARRAY_SIZE(ibp->sc_to_sl); /* == 32 */
1548 unsigned i;
1549
1550 if (am) {
1551 smp->status |= IB_SMP_INVALID_FIELD;
1552 return reply((struct ib_mad_hdr *)smp);
1553 }
1554
1555 for (i = 0; i < ARRAY_SIZE(ibp->sc_to_sl); i++)
1556 *p++ = ibp->sc_to_sl[i];
1557
1558 if (resp_len)
1559 *resp_len += size;
1560
1561 return reply((struct ib_mad_hdr *)smp);
1562}
1563
1564static int __subn_set_opa_sc_to_sl(struct opa_smp *smp, u32 am, u8 *data,
1565 struct ib_device *ibdev, u8 port,
1566 u32 *resp_len)
1567{
1568 struct hfi1_ibport *ibp = to_iport(ibdev, port);
6618c051 1569 u8 *p = data;
77241056
MM
1570 int i;
1571
1572 if (am) {
1573 smp->status |= IB_SMP_INVALID_FIELD;
1574 return reply((struct ib_mad_hdr *)smp);
1575 }
1576
1577 for (i = 0; i < ARRAY_SIZE(ibp->sc_to_sl); i++)
1578 ibp->sc_to_sl[i] = *p++;
1579
1580 return __subn_get_opa_sc_to_sl(smp, am, data, ibdev, port, resp_len);
1581}
1582
1583static int __subn_get_opa_sc_to_vlt(struct opa_smp *smp, u32 am, u8 *data,
1584 struct ib_device *ibdev, u8 port,
1585 u32 *resp_len)
1586{
1587 u32 n_blocks = OPA_AM_NBLK(am);
1588 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
50e5dcbe 1589 void *vp = (void *)data;
77241056
MM
1590 size_t size = 4 * sizeof(u64);
1591
1592 if (n_blocks != 1) {
1593 smp->status |= IB_SMP_INVALID_FIELD;
1594 return reply((struct ib_mad_hdr *)smp);
1595 }
1596
1597 get_sc2vlt_tables(dd, vp);
1598
1599 if (resp_len)
1600 *resp_len += size;
1601
1602 return reply((struct ib_mad_hdr *)smp);
1603}
1604
1605static int __subn_set_opa_sc_to_vlt(struct opa_smp *smp, u32 am, u8 *data,
1606 struct ib_device *ibdev, u8 port,
1607 u32 *resp_len)
1608{
1609 u32 n_blocks = OPA_AM_NBLK(am);
1610 int async_update = OPA_AM_ASYNC(am);
1611 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
50e5dcbe 1612 void *vp = (void *)data;
77241056
MM
1613 struct hfi1_pportdata *ppd;
1614 int lstate;
1615
1616 if (n_blocks != 1 || async_update) {
1617 smp->status |= IB_SMP_INVALID_FIELD;
1618 return reply((struct ib_mad_hdr *)smp);
1619 }
1620
1621 /* IB numbers ports from 1, hw from 0 */
1622 ppd = dd->pport + (port - 1);
1623 lstate = driver_lstate(ppd);
1624 /* it's known that async_update is 0 by this point, but include
1625 * the explicit check for clarity */
1626 if (!async_update &&
1627 (lstate == IB_PORT_ARMED || lstate == IB_PORT_ACTIVE)) {
1628 smp->status |= IB_SMP_INVALID_FIELD;
1629 return reply((struct ib_mad_hdr *)smp);
1630 }
1631
1632 set_sc2vlt_tables(dd, vp);
1633
1634 return __subn_get_opa_sc_to_vlt(smp, am, data, ibdev, port, resp_len);
1635}
1636
1637static int __subn_get_opa_sc_to_vlnt(struct opa_smp *smp, u32 am, u8 *data,
1638 struct ib_device *ibdev, u8 port,
1639 u32 *resp_len)
1640{
1641 u32 n_blocks = OPA_AM_NPORT(am);
1642 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
1643 struct hfi1_pportdata *ppd;
50e5dcbe 1644 void *vp = (void *)data;
77241056
MM
1645 int size;
1646
1647 if (n_blocks != 1) {
1648 smp->status |= IB_SMP_INVALID_FIELD;
1649 return reply((struct ib_mad_hdr *)smp);
1650 }
1651
1652 ppd = dd->pport + (port - 1);
1653
1654 size = fm_get_table(ppd, FM_TBL_SC2VLNT, vp);
1655
1656 if (resp_len)
1657 *resp_len += size;
1658
1659 return reply((struct ib_mad_hdr *)smp);
1660}
1661
1662static int __subn_set_opa_sc_to_vlnt(struct opa_smp *smp, u32 am, u8 *data,
1663 struct ib_device *ibdev, u8 port,
1664 u32 *resp_len)
1665{
1666 u32 n_blocks = OPA_AM_NPORT(am);
1667 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
1668 struct hfi1_pportdata *ppd;
50e5dcbe 1669 void *vp = (void *)data;
77241056
MM
1670 int lstate;
1671
1672 if (n_blocks != 1) {
1673 smp->status |= IB_SMP_INVALID_FIELD;
1674 return reply((struct ib_mad_hdr *)smp);
1675 }
1676
1677 /* IB numbers ports from 1, hw from 0 */
1678 ppd = dd->pport + (port - 1);
1679 lstate = driver_lstate(ppd);
1680 if (lstate == IB_PORT_ARMED || lstate == IB_PORT_ACTIVE) {
1681 smp->status |= IB_SMP_INVALID_FIELD;
1682 return reply((struct ib_mad_hdr *)smp);
1683 }
1684
1685 ppd = dd->pport + (port - 1);
1686
1687 fm_set_table(ppd, FM_TBL_SC2VLNT, vp);
1688
1689 return __subn_get_opa_sc_to_vlnt(smp, am, data, ibdev, port,
1690 resp_len);
1691}
1692
1693static int __subn_get_opa_psi(struct opa_smp *smp, u32 am, u8 *data,
1694 struct ib_device *ibdev, u8 port,
1695 u32 *resp_len)
1696{
1697 u32 nports = OPA_AM_NPORT(am);
1698 u32 start_of_sm_config = OPA_AM_START_SM_CFG(am);
1699 u32 lstate;
1700 struct hfi1_ibport *ibp;
1701 struct hfi1_pportdata *ppd;
50e5dcbe 1702 struct opa_port_state_info *psi = (struct opa_port_state_info *)data;
77241056
MM
1703
1704 if (nports != 1) {
1705 smp->status |= IB_SMP_INVALID_FIELD;
1706 return reply((struct ib_mad_hdr *)smp);
1707 }
1708
1709 ibp = to_iport(ibdev, port);
1710 ppd = ppd_from_ibp(ibp);
1711
1712 lstate = driver_lstate(ppd);
1713
1714 if (start_of_sm_config && (lstate == IB_PORT_INIT))
1715 ppd->is_sm_config_started = 1;
1716
1717#if PI_LED_ENABLE_SUP
1718 psi->port_states.ledenable_offlinereason = ppd->neighbor_normal << 4;
1719 psi->port_states.ledenable_offlinereason |=
1720 ppd->is_sm_config_started << 5;
1721 psi->port_states.ledenable_offlinereason |=
a9c05e35 1722 ppd->offline_disabled_reason;
77241056
MM
1723#else
1724 psi->port_states.offline_reason = ppd->neighbor_normal << 4;
1725 psi->port_states.offline_reason |= ppd->is_sm_config_started << 5;
a9c05e35 1726 psi->port_states.offline_reason |= ppd->offline_disabled_reason;
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MM
1727#endif /* PI_LED_ENABLE_SUP */
1728
1729 psi->port_states.portphysstate_portstate =
1730 (hfi1_ibphys_portstate(ppd) << 4) | (lstate & 0xf);
1731 psi->link_width_downgrade_tx_active =
aadfc3b2 1732 cpu_to_be16(ppd->link_width_downgrade_tx_active);
77241056 1733 psi->link_width_downgrade_rx_active =
aadfc3b2 1734 cpu_to_be16(ppd->link_width_downgrade_rx_active);
77241056
MM
1735 if (resp_len)
1736 *resp_len += sizeof(struct opa_port_state_info);
1737
1738 return reply((struct ib_mad_hdr *)smp);
1739}
1740
1741static int __subn_set_opa_psi(struct opa_smp *smp, u32 am, u8 *data,
1742 struct ib_device *ibdev, u8 port,
1743 u32 *resp_len)
1744{
1745 u32 nports = OPA_AM_NPORT(am);
1746 u32 start_of_sm_config = OPA_AM_START_SM_CFG(am);
1747 u32 ls_old;
1748 u8 ls_new, ps_new;
1749 struct hfi1_ibport *ibp;
1750 struct hfi1_pportdata *ppd;
50e5dcbe 1751 struct opa_port_state_info *psi = (struct opa_port_state_info *)data;
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MM
1752 int ret, invalid = 0;
1753
1754 if (nports != 1) {
1755 smp->status |= IB_SMP_INVALID_FIELD;
1756 return reply((struct ib_mad_hdr *)smp);
1757 }
1758
1759 ibp = to_iport(ibdev, port);
1760 ppd = ppd_from_ibp(ibp);
1761
1762 ls_old = driver_lstate(ppd);
1763
1764 ls_new = port_states_to_logical_state(&psi->port_states);
1765 ps_new = port_states_to_phys_state(&psi->port_states);
1766
1767 if (ls_old == IB_PORT_INIT) {
1768 if (start_of_sm_config) {
1769 if (ls_new == ls_old || (ls_new == IB_PORT_ARMED))
1770 ppd->is_sm_config_started = 1;
1771 } else if (ls_new == IB_PORT_ARMED) {
1772 if (ppd->is_sm_config_started == 0)
1773 invalid = 1;
1774 }
1775 }
1776
1777 ret = set_port_states(ppd, smp, ls_new, ps_new, invalid);
1778 if (ret)
1779 return ret;
1780
1781 if (invalid)
1782 smp->status |= IB_SMP_INVALID_FIELD;
1783
1784 return __subn_get_opa_psi(smp, am, data, ibdev, port, resp_len);
1785}
1786
1787static int __subn_get_opa_cable_info(struct opa_smp *smp, u32 am, u8 *data,
1788 struct ib_device *ibdev, u8 port,
1789 u32 *resp_len)
1790{
1791 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
1792 u32 addr = OPA_AM_CI_ADDR(am);
1793 u32 len = OPA_AM_CI_LEN(am) + 1;
1794 int ret;
1795
349ac71f 1796#define __CI_PAGE_SIZE BIT(7) /* 128 bytes */
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MM
1797#define __CI_PAGE_MASK ~(__CI_PAGE_SIZE - 1)
1798#define __CI_PAGE_NUM(a) ((a) & __CI_PAGE_MASK)
1799
1800 /* check that addr is within spec, and
1801 * addr and (addr + len - 1) are on the same "page" */
1802 if (addr >= 4096 ||
1803 (__CI_PAGE_NUM(addr) != __CI_PAGE_NUM(addr + len - 1))) {
1804 smp->status |= IB_SMP_INVALID_FIELD;
1805 return reply((struct ib_mad_hdr *)smp);
1806 }
1807
1808 ret = get_cable_info(dd, port, addr, len, data);
1809
1810 if (ret == -ENODEV) {
1811 smp->status |= IB_SMP_UNSUP_METH_ATTR;
1812 return reply((struct ib_mad_hdr *)smp);
1813 }
1814
1815 /* The address range for the CableInfo SMA query is wider than the
1816 * memory available on the QSFP cable. We want to return a valid
1817 * response, albeit zeroed out, for address ranges beyond available
1818 * memory but that are within the CableInfo query spec
1819 */
1820 if (ret < 0 && ret != -ERANGE) {
1821 smp->status |= IB_SMP_INVALID_FIELD;
1822 return reply((struct ib_mad_hdr *)smp);
1823 }
1824
1825 if (resp_len)
1826 *resp_len += len;
1827
1828 return reply((struct ib_mad_hdr *)smp);
1829}
1830
1831static int __subn_get_opa_bct(struct opa_smp *smp, u32 am, u8 *data,
1832 struct ib_device *ibdev, u8 port, u32 *resp_len)
1833{
1834 u32 num_ports = OPA_AM_NPORT(am);
1835 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
1836 struct hfi1_pportdata *ppd;
50e5dcbe 1837 struct buffer_control *p = (struct buffer_control *)data;
77241056
MM
1838 int size;
1839
1840 if (num_ports != 1) {
1841 smp->status |= IB_SMP_INVALID_FIELD;
1842 return reply((struct ib_mad_hdr *)smp);
1843 }
1844
1845 ppd = dd->pport + (port - 1);
1846 size = fm_get_table(ppd, FM_TBL_BUFFER_CONTROL, p);
1847 trace_bct_get(dd, p);
1848 if (resp_len)
1849 *resp_len += size;
1850
1851 return reply((struct ib_mad_hdr *)smp);
1852}
1853
1854static int __subn_set_opa_bct(struct opa_smp *smp, u32 am, u8 *data,
1855 struct ib_device *ibdev, u8 port, u32 *resp_len)
1856{
1857 u32 num_ports = OPA_AM_NPORT(am);
1858 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
1859 struct hfi1_pportdata *ppd;
50e5dcbe 1860 struct buffer_control *p = (struct buffer_control *)data;
77241056
MM
1861
1862 if (num_ports != 1) {
1863 smp->status |= IB_SMP_INVALID_FIELD;
1864 return reply((struct ib_mad_hdr *)smp);
1865 }
1866 ppd = dd->pport + (port - 1);
1867 trace_bct_set(dd, p);
1868 if (fm_set_table(ppd, FM_TBL_BUFFER_CONTROL, p) < 0) {
1869 smp->status |= IB_SMP_INVALID_FIELD;
1870 return reply((struct ib_mad_hdr *)smp);
1871 }
1872
1873 return __subn_get_opa_bct(smp, am, data, ibdev, port, resp_len);
1874}
1875
1876static int __subn_get_opa_vl_arb(struct opa_smp *smp, u32 am, u8 *data,
1877 struct ib_device *ibdev, u8 port,
1878 u32 *resp_len)
1879{
1880 struct hfi1_pportdata *ppd = ppd_from_ibp(to_iport(ibdev, port));
1881 u32 num_ports = OPA_AM_NPORT(am);
1882 u8 section = (am & 0x00ff0000) >> 16;
1883 u8 *p = data;
1884 int size = 0;
1885
1886 if (num_ports != 1) {
1887 smp->status |= IB_SMP_INVALID_FIELD;
1888 return reply((struct ib_mad_hdr *)smp);
1889 }
1890
1891 switch (section) {
1892 case OPA_VLARB_LOW_ELEMENTS:
1893 size = fm_get_table(ppd, FM_TBL_VL_LOW_ARB, p);
1894 break;
1895 case OPA_VLARB_HIGH_ELEMENTS:
1896 size = fm_get_table(ppd, FM_TBL_VL_HIGH_ARB, p);
1897 break;
1898 case OPA_VLARB_PREEMPT_ELEMENTS:
1899 size = fm_get_table(ppd, FM_TBL_VL_PREEMPT_ELEMS, p);
1900 break;
1901 case OPA_VLARB_PREEMPT_MATRIX:
1902 size = fm_get_table(ppd, FM_TBL_VL_PREEMPT_MATRIX, p);
1903 break;
1904 default:
1905 pr_warn("OPA SubnGet(VL Arb) AM Invalid : 0x%x\n",
1906 be32_to_cpu(smp->attr_mod));
1907 smp->status |= IB_SMP_INVALID_FIELD;
1908 break;
1909 }
1910
1911 if (size > 0 && resp_len)
1912 *resp_len += size;
1913
1914 return reply((struct ib_mad_hdr *)smp);
1915}
1916
1917static int __subn_set_opa_vl_arb(struct opa_smp *smp, u32 am, u8 *data,
1918 struct ib_device *ibdev, u8 port,
1919 u32 *resp_len)
1920{
1921 struct hfi1_pportdata *ppd = ppd_from_ibp(to_iport(ibdev, port));
1922 u32 num_ports = OPA_AM_NPORT(am);
1923 u8 section = (am & 0x00ff0000) >> 16;
1924 u8 *p = data;
1925
1926 if (num_ports != 1) {
1927 smp->status |= IB_SMP_INVALID_FIELD;
1928 return reply((struct ib_mad_hdr *)smp);
1929 }
1930
1931 switch (section) {
1932 case OPA_VLARB_LOW_ELEMENTS:
50e5dcbe 1933 (void)fm_set_table(ppd, FM_TBL_VL_LOW_ARB, p);
77241056
MM
1934 break;
1935 case OPA_VLARB_HIGH_ELEMENTS:
50e5dcbe 1936 (void)fm_set_table(ppd, FM_TBL_VL_HIGH_ARB, p);
77241056
MM
1937 break;
1938 /* neither OPA_VLARB_PREEMPT_ELEMENTS, or OPA_VLARB_PREEMPT_MATRIX
1939 * can be changed from the default values */
1940 case OPA_VLARB_PREEMPT_ELEMENTS:
1941 /* FALLTHROUGH */
1942 case OPA_VLARB_PREEMPT_MATRIX:
1943 smp->status |= IB_SMP_UNSUP_METH_ATTR;
1944 break;
1945 default:
1946 pr_warn("OPA SubnSet(VL Arb) AM Invalid : 0x%x\n",
1947 be32_to_cpu(smp->attr_mod));
1948 smp->status |= IB_SMP_INVALID_FIELD;
1949 break;
1950 }
1951
1952 return __subn_get_opa_vl_arb(smp, am, data, ibdev, port, resp_len);
1953}
1954
1955struct opa_pma_mad {
1956 struct ib_mad_hdr mad_hdr;
1957 u8 data[2024];
1958} __packed;
1959
1960struct opa_class_port_info {
1961 u8 base_version;
1962 u8 class_version;
1963 __be16 cap_mask;
1964 __be32 cap_mask2_resp_time;
1965
1966 u8 redirect_gid[16];
1967 __be32 redirect_tc_fl;
1968 __be32 redirect_lid;
1969 __be32 redirect_sl_qp;
1970 __be32 redirect_qkey;
1971
1972 u8 trap_gid[16];
1973 __be32 trap_tc_fl;
1974 __be32 trap_lid;
1975 __be32 trap_hl_qp;
1976 __be32 trap_qkey;
1977
1978 __be16 trap_pkey;
1979 __be16 redirect_pkey;
1980
1981 u8 trap_sl_rsvd;
1982 u8 reserved[3];
1983} __packed;
1984
1985struct opa_port_status_req {
1986 __u8 port_num;
1987 __u8 reserved[3];
1988 __be32 vl_select_mask;
1989};
1990
1991#define VL_MASK_ALL 0x000080ff
1992
1993struct opa_port_status_rsp {
1994 __u8 port_num;
1995 __u8 reserved[3];
1996 __be32 vl_select_mask;
1997
1998 /* Data counters */
1999 __be64 port_xmit_data;
2000 __be64 port_rcv_data;
2001 __be64 port_xmit_pkts;
2002 __be64 port_rcv_pkts;
2003 __be64 port_multicast_xmit_pkts;
2004 __be64 port_multicast_rcv_pkts;
2005 __be64 port_xmit_wait;
2006 __be64 sw_port_congestion;
2007 __be64 port_rcv_fecn;
2008 __be64 port_rcv_becn;
2009 __be64 port_xmit_time_cong;
2010 __be64 port_xmit_wasted_bw;
2011 __be64 port_xmit_wait_data;
2012 __be64 port_rcv_bubble;
2013 __be64 port_mark_fecn;
2014 /* Error counters */
2015 __be64 port_rcv_constraint_errors;
2016 __be64 port_rcv_switch_relay_errors;
2017 __be64 port_xmit_discards;
2018 __be64 port_xmit_constraint_errors;
2019 __be64 port_rcv_remote_physical_errors;
2020 __be64 local_link_integrity_errors;
2021 __be64 port_rcv_errors;
2022 __be64 excessive_buffer_overruns;
2023 __be64 fm_config_errors;
2024 __be32 link_error_recovery;
2025 __be32 link_downed;
2026 u8 uncorrectable_errors;
2027
2028 u8 link_quality_indicator; /* 5res, 3bit */
2029 u8 res2[6];
2030 struct _vls_pctrs {
2031 /* per-VL Data counters */
2032 __be64 port_vl_xmit_data;
2033 __be64 port_vl_rcv_data;
2034 __be64 port_vl_xmit_pkts;
2035 __be64 port_vl_rcv_pkts;
2036 __be64 port_vl_xmit_wait;
2037 __be64 sw_port_vl_congestion;
2038 __be64 port_vl_rcv_fecn;
2039 __be64 port_vl_rcv_becn;
2040 __be64 port_xmit_time_cong;
2041 __be64 port_vl_xmit_wasted_bw;
2042 __be64 port_vl_xmit_wait_data;
2043 __be64 port_vl_rcv_bubble;
2044 __be64 port_vl_mark_fecn;
2045 __be64 port_vl_xmit_discards;
2046 } vls[0]; /* real array size defined by # bits set in vl_select_mask */
2047};
2048
2049enum counter_selects {
2050 CS_PORT_XMIT_DATA = (1 << 31),
2051 CS_PORT_RCV_DATA = (1 << 30),
2052 CS_PORT_XMIT_PKTS = (1 << 29),
2053 CS_PORT_RCV_PKTS = (1 << 28),
2054 CS_PORT_MCAST_XMIT_PKTS = (1 << 27),
2055 CS_PORT_MCAST_RCV_PKTS = (1 << 26),
2056 CS_PORT_XMIT_WAIT = (1 << 25),
2057 CS_SW_PORT_CONGESTION = (1 << 24),
2058 CS_PORT_RCV_FECN = (1 << 23),
2059 CS_PORT_RCV_BECN = (1 << 22),
2060 CS_PORT_XMIT_TIME_CONG = (1 << 21),
2061 CS_PORT_XMIT_WASTED_BW = (1 << 20),
2062 CS_PORT_XMIT_WAIT_DATA = (1 << 19),
2063 CS_PORT_RCV_BUBBLE = (1 << 18),
2064 CS_PORT_MARK_FECN = (1 << 17),
2065 CS_PORT_RCV_CONSTRAINT_ERRORS = (1 << 16),
2066 CS_PORT_RCV_SWITCH_RELAY_ERRORS = (1 << 15),
2067 CS_PORT_XMIT_DISCARDS = (1 << 14),
2068 CS_PORT_XMIT_CONSTRAINT_ERRORS = (1 << 13),
2069 CS_PORT_RCV_REMOTE_PHYSICAL_ERRORS = (1 << 12),
2070 CS_LOCAL_LINK_INTEGRITY_ERRORS = (1 << 11),
2071 CS_PORT_RCV_ERRORS = (1 << 10),
2072 CS_EXCESSIVE_BUFFER_OVERRUNS = (1 << 9),
2073 CS_FM_CONFIG_ERRORS = (1 << 8),
2074 CS_LINK_ERROR_RECOVERY = (1 << 7),
2075 CS_LINK_DOWNED = (1 << 6),
2076 CS_UNCORRECTABLE_ERRORS = (1 << 5),
2077};
2078
2079struct opa_clear_port_status {
2080 __be64 port_select_mask[4];
2081 __be32 counter_select_mask;
2082};
2083
2084struct opa_aggregate {
2085 __be16 attr_id;
2086 __be16 err_reqlength; /* 1 bit, 8 res, 7 bit */
2087 __be32 attr_mod;
2088 u8 data[0];
2089};
2090
f0852922
AL
2091#define MSK_LLI 0x000000f0
2092#define MSK_LLI_SFT 4
2093#define MSK_LER 0x0000000f
2094#define MSK_LER_SFT 0
2095#define ADD_LLI 8
2096#define ADD_LER 2
2097
2098/* Request contains first three fields, response contains those plus the rest */
77241056
MM
2099struct opa_port_data_counters_msg {
2100 __be64 port_select_mask[4];
2101 __be32 vl_select_mask;
f0852922 2102 __be32 resolution;
77241056
MM
2103
2104 /* Response fields follow */
77241056
MM
2105 struct _port_dctrs {
2106 u8 port_number;
2107 u8 reserved2[3];
2108 __be32 link_quality_indicator; /* 29res, 3bit */
2109
2110 /* Data counters */
2111 __be64 port_xmit_data;
2112 __be64 port_rcv_data;
2113 __be64 port_xmit_pkts;
2114 __be64 port_rcv_pkts;
2115 __be64 port_multicast_xmit_pkts;
2116 __be64 port_multicast_rcv_pkts;
2117 __be64 port_xmit_wait;
2118 __be64 sw_port_congestion;
2119 __be64 port_rcv_fecn;
2120 __be64 port_rcv_becn;
2121 __be64 port_xmit_time_cong;
2122 __be64 port_xmit_wasted_bw;
2123 __be64 port_xmit_wait_data;
2124 __be64 port_rcv_bubble;
2125 __be64 port_mark_fecn;
2126
2127 __be64 port_error_counter_summary;
2128 /* Sum of error counts/port */
2129
2130 struct _vls_dctrs {
2131 /* per-VL Data counters */
2132 __be64 port_vl_xmit_data;
2133 __be64 port_vl_rcv_data;
2134 __be64 port_vl_xmit_pkts;
2135 __be64 port_vl_rcv_pkts;
2136 __be64 port_vl_xmit_wait;
2137 __be64 sw_port_vl_congestion;
2138 __be64 port_vl_rcv_fecn;
2139 __be64 port_vl_rcv_becn;
2140 __be64 port_xmit_time_cong;
2141 __be64 port_vl_xmit_wasted_bw;
2142 __be64 port_vl_xmit_wait_data;
2143 __be64 port_vl_rcv_bubble;
2144 __be64 port_vl_mark_fecn;
2145 } vls[0];
2146 /* array size defined by #bits set in vl_select_mask*/
2147 } port[1]; /* array size defined by #ports in attribute modifier */
2148};
2149
2150struct opa_port_error_counters64_msg {
2151 /* Request contains first two fields, response contains the
2152 * whole magilla */
2153 __be64 port_select_mask[4];
2154 __be32 vl_select_mask;
2155
2156 /* Response-only fields follow */
2157 __be32 reserved1;
2158 struct _port_ectrs {
2159 u8 port_number;
2160 u8 reserved2[7];
2161 __be64 port_rcv_constraint_errors;
2162 __be64 port_rcv_switch_relay_errors;
2163 __be64 port_xmit_discards;
2164 __be64 port_xmit_constraint_errors;
2165 __be64 port_rcv_remote_physical_errors;
2166 __be64 local_link_integrity_errors;
2167 __be64 port_rcv_errors;
2168 __be64 excessive_buffer_overruns;
2169 __be64 fm_config_errors;
2170 __be32 link_error_recovery;
2171 __be32 link_downed;
2172 u8 uncorrectable_errors;
2173 u8 reserved3[7];
2174 struct _vls_ectrs {
2175 __be64 port_vl_xmit_discards;
2176 } vls[0];
2177 /* array size defined by #bits set in vl_select_mask */
2178 } port[1]; /* array size defined by #ports in attribute modifier */
2179};
2180
2181struct opa_port_error_info_msg {
2182 __be64 port_select_mask[4];
2183 __be32 error_info_select_mask;
2184 __be32 reserved1;
2185 struct _port_ei {
77241056
MM
2186 u8 port_number;
2187 u8 reserved2[7];
2188
2189 /* PortRcvErrorInfo */
2190 struct {
2191 u8 status_and_code;
2192 union {
2193 u8 raw[17];
2194 struct {
2195 /* EI1to12 format */
2196 u8 packet_flit1[8];
2197 u8 packet_flit2[8];
2198 u8 remaining_flit_bits12;
2199 } ei1to12;
2200 struct {
2201 u8 packet_bytes[8];
2202 u8 remaining_flit_bits;
2203 } ei13;
2204 } ei;
2205 u8 reserved3[6];
2206 } __packed port_rcv_ei;
2207
2208 /* ExcessiveBufferOverrunInfo */
2209 struct {
2210 u8 status_and_sc;
2211 u8 reserved4[7];
2212 } __packed excessive_buffer_overrun_ei;
2213
2214 /* PortXmitConstraintErrorInfo */
2215 struct {
2216 u8 status;
2217 u8 reserved5;
2218 __be16 pkey;
2219 __be32 slid;
2220 } __packed port_xmit_constraint_ei;
2221
2222 /* PortRcvConstraintErrorInfo */
2223 struct {
2224 u8 status;
2225 u8 reserved6;
2226 __be16 pkey;
2227 __be32 slid;
2228 } __packed port_rcv_constraint_ei;
2229
2230 /* PortRcvSwitchRelayErrorInfo */
2231 struct {
2232 u8 status_and_code;
2233 u8 reserved7[3];
2234 __u32 error_info;
2235 } __packed port_rcv_switch_relay_ei;
2236
2237 /* UncorrectableErrorInfo */
2238 struct {
2239 u8 status_and_code;
2240 u8 reserved8;
2241 } __packed uncorrectable_ei;
2242
2243 /* FMConfigErrorInfo */
2244 struct {
2245 u8 status_and_code;
2246 u8 error_info;
2247 } __packed fm_config_ei;
2248 __u32 reserved9;
2249 } port[1]; /* actual array size defined by #ports in attr modifier */
2250};
2251
2252/* opa_port_error_info_msg error_info_select_mask bit definitions */
2253enum error_info_selects {
2254 ES_PORT_RCV_ERROR_INFO = (1 << 31),
2255 ES_EXCESSIVE_BUFFER_OVERRUN_INFO = (1 << 30),
2256 ES_PORT_XMIT_CONSTRAINT_ERROR_INFO = (1 << 29),
2257 ES_PORT_RCV_CONSTRAINT_ERROR_INFO = (1 << 28),
2258 ES_PORT_RCV_SWITCH_RELAY_ERROR_INFO = (1 << 27),
2259 ES_UNCORRECTABLE_ERROR_INFO = (1 << 26),
2260 ES_FM_CONFIG_ERROR_INFO = (1 << 25)
2261};
2262
2263static int pma_get_opa_classportinfo(struct opa_pma_mad *pmp,
2264 struct ib_device *ibdev, u32 *resp_len)
2265{
2266 struct opa_class_port_info *p =
2267 (struct opa_class_port_info *)pmp->data;
2268
2269 memset(pmp->data, 0, sizeof(pmp->data));
2270
2271 if (pmp->mad_hdr.attr_mod != 0)
2272 pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
2273
2274 p->base_version = OPA_MGMT_BASE_VERSION;
2275 p->class_version = OPA_SMI_CLASS_VERSION;
2276 /*
2277 * Expected response time is 4.096 usec. * 2^18 == 1.073741824 sec.
2278 */
2279 p->cap_mask2_resp_time = cpu_to_be32(18);
2280
2281 if (resp_len)
2282 *resp_len += sizeof(*p);
2283
2284 return reply((struct ib_mad_hdr *)pmp);
2285}
2286
2287static void a0_portstatus(struct hfi1_pportdata *ppd,
2288 struct opa_port_status_rsp *rsp, u32 vl_select_mask)
2289{
2290 if (!is_bx(ppd->dd)) {
2291 unsigned long vl;
f4ddedf4 2292 u64 sum_vl_xmit_wait = 0;
77241056 2293 u32 vl_all_mask = VL_MASK_ALL;
77241056
MM
2294
2295 for_each_set_bit(vl, (unsigned long *)&(vl_all_mask),
2296 8 * sizeof(vl_all_mask)) {
f4ddedf4
IW
2297 u64 tmp = sum_vl_xmit_wait +
2298 read_port_cntr(ppd, C_TX_WAIT_VL,
2299 idx_from_vl(vl));
2300 if (tmp < sum_vl_xmit_wait) {
2301 /* we wrapped */
2302 sum_vl_xmit_wait = (u64)~0;
2303 break;
2304 }
2305 sum_vl_xmit_wait = tmp;
77241056 2306 }
f4ddedf4
IW
2307 if (be64_to_cpu(rsp->port_xmit_wait) > sum_vl_xmit_wait)
2308 rsp->port_xmit_wait = cpu_to_be64(sum_vl_xmit_wait);
77241056
MM
2309 }
2310}
2311
77241056
MM
2312static int pma_get_opa_portstatus(struct opa_pma_mad *pmp,
2313 struct ib_device *ibdev, u8 port, u32 *resp_len)
2314{
2315 struct opa_port_status_req *req =
2316 (struct opa_port_status_req *)pmp->data;
2317 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
2318 struct opa_port_status_rsp *rsp;
2319 u32 vl_select_mask = be32_to_cpu(req->vl_select_mask);
2320 unsigned long vl;
2321 size_t response_data_size;
2322 u32 nports = be32_to_cpu(pmp->mad_hdr.attr_mod) >> 24;
2323 u8 port_num = req->port_num;
2324 u8 num_vls = hweight32(vl_select_mask);
2325 struct _vls_pctrs *vlinfo;
2326 struct hfi1_ibport *ibp = to_iport(ibdev, port);
2327 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
2328 int vfi;
2329 u64 tmp, tmp2;
2330
2331 response_data_size = sizeof(struct opa_port_status_rsp) +
2332 num_vls * sizeof(struct _vls_pctrs);
2333 if (response_data_size > sizeof(pmp->data)) {
2334 pmp->mad_hdr.status |= OPA_PM_STATUS_REQUEST_TOO_LARGE;
2335 return reply((struct ib_mad_hdr *)pmp);
2336 }
2337
d0d236ea
JJ
2338 if (nports != 1 || (port_num && port_num != port) ||
2339 num_vls > OPA_MAX_VLS || (vl_select_mask & ~VL_MASK_ALL)) {
77241056
MM
2340 pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
2341 return reply((struct ib_mad_hdr *)pmp);
2342 }
2343
2344 memset(pmp->data, 0, sizeof(pmp->data));
2345
2346 rsp = (struct opa_port_status_rsp *)pmp->data;
2347 if (port_num)
2348 rsp->port_num = port_num;
2349 else
2350 rsp->port_num = port;
2351
2352 rsp->port_rcv_constraint_errors =
2353 cpu_to_be64(read_port_cntr(ppd, C_SW_RCV_CSTR_ERR,
2354 CNTR_INVALID_VL));
2355
2356 hfi1_read_link_quality(dd, &rsp->link_quality_indicator);
2357
2358 rsp->vl_select_mask = cpu_to_be32(vl_select_mask);
2359 rsp->port_xmit_data = cpu_to_be64(read_dev_cntr(dd, C_DC_XMIT_FLITS,
2360 CNTR_INVALID_VL));
2361 rsp->port_rcv_data = cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_FLITS,
2362 CNTR_INVALID_VL));
77241056
MM
2363 rsp->port_xmit_pkts = cpu_to_be64(read_dev_cntr(dd, C_DC_XMIT_PKTS,
2364 CNTR_INVALID_VL));
2365 rsp->port_rcv_pkts = cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_PKTS,
2366 CNTR_INVALID_VL));
2367 rsp->port_multicast_xmit_pkts =
2368 cpu_to_be64(read_dev_cntr(dd, C_DC_MC_XMIT_PKTS,
2369 CNTR_INVALID_VL));
2370 rsp->port_multicast_rcv_pkts =
2371 cpu_to_be64(read_dev_cntr(dd, C_DC_MC_RCV_PKTS,
2372 CNTR_INVALID_VL));
2373 rsp->port_xmit_wait =
2374 cpu_to_be64(read_port_cntr(ppd, C_TX_WAIT, CNTR_INVALID_VL));
2375 rsp->port_rcv_fecn =
2376 cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_FCN, CNTR_INVALID_VL));
2377 rsp->port_rcv_becn =
2378 cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_BCN, CNTR_INVALID_VL));
2379 rsp->port_xmit_discards =
2380 cpu_to_be64(read_port_cntr(ppd, C_SW_XMIT_DSCD,
2381 CNTR_INVALID_VL));
2382 rsp->port_xmit_constraint_errors =
2383 cpu_to_be64(read_port_cntr(ppd, C_SW_XMIT_CSTR_ERR,
2384 CNTR_INVALID_VL));
2385 rsp->port_rcv_remote_physical_errors =
2386 cpu_to_be64(read_dev_cntr(dd, C_DC_RMT_PHY_ERR,
2387 CNTR_INVALID_VL));
2388 tmp = read_dev_cntr(dd, C_DC_RX_REPLAY, CNTR_INVALID_VL);
2389 tmp2 = tmp + read_dev_cntr(dd, C_DC_TX_REPLAY, CNTR_INVALID_VL);
2390 if (tmp2 < tmp) {
2391 /* overflow/wrapped */
2392 rsp->local_link_integrity_errors = cpu_to_be64(~0);
2393 } else {
2394 rsp->local_link_integrity_errors = cpu_to_be64(tmp2);
2395 }
2396 tmp = read_dev_cntr(dd, C_DC_SEQ_CRC_CNT, CNTR_INVALID_VL);
2397 tmp2 = tmp + read_dev_cntr(dd, C_DC_REINIT_FROM_PEER_CNT,
2398 CNTR_INVALID_VL);
2399 if (tmp2 > (u32)UINT_MAX || tmp2 < tmp) {
2400 /* overflow/wrapped */
2401 rsp->link_error_recovery = cpu_to_be32(~0);
2402 } else {
2403 rsp->link_error_recovery = cpu_to_be32(tmp2);
2404 }
2405 rsp->port_rcv_errors =
2406 cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_ERR, CNTR_INVALID_VL));
2407 rsp->excessive_buffer_overruns =
2408 cpu_to_be64(read_dev_cntr(dd, C_RCV_OVF, CNTR_INVALID_VL));
2409 rsp->fm_config_errors =
2410 cpu_to_be64(read_dev_cntr(dd, C_DC_FM_CFG_ERR,
2411 CNTR_INVALID_VL));
2412 rsp->link_downed = cpu_to_be32(read_port_cntr(ppd, C_SW_LINK_DOWN,
2413 CNTR_INVALID_VL));
2414
2415 /* rsp->uncorrectable_errors is 8 bits wide, and it pegs at 0xff */
2416 tmp = read_dev_cntr(dd, C_DC_UNC_ERR, CNTR_INVALID_VL);
2417 rsp->uncorrectable_errors = tmp < 0x100 ? (tmp & 0xff) : 0xff;
2418
58721b8f 2419 vlinfo = &rsp->vls[0];
77241056
MM
2420 vfi = 0;
2421 /* The vl_select_mask has been checked above, and we know
2422 * that it contains only entries which represent valid VLs.
2423 * So in the for_each_set_bit() loop below, we don't need
2424 * any additional checks for vl.
2425 */
2426 for_each_set_bit(vl, (unsigned long *)&(vl_select_mask),
2427 8 * sizeof(vl_select_mask)) {
2428 memset(vlinfo, 0, sizeof(*vlinfo));
2429
2430 tmp = read_dev_cntr(dd, C_DC_RX_FLIT_VL, idx_from_vl(vl));
2431 rsp->vls[vfi].port_vl_rcv_data = cpu_to_be64(tmp);
77241056
MM
2432
2433 rsp->vls[vfi].port_vl_rcv_pkts =
2434 cpu_to_be64(read_dev_cntr(dd, C_DC_RX_PKT_VL,
2435 idx_from_vl(vl)));
2436
2437 rsp->vls[vfi].port_vl_xmit_data =
2438 cpu_to_be64(read_port_cntr(ppd, C_TX_FLIT_VL,
2439 idx_from_vl(vl)));
2440
2441 rsp->vls[vfi].port_vl_xmit_pkts =
2442 cpu_to_be64(read_port_cntr(ppd, C_TX_PKT_VL,
2443 idx_from_vl(vl)));
2444
2445 rsp->vls[vfi].port_vl_xmit_wait =
2446 cpu_to_be64(read_port_cntr(ppd, C_TX_WAIT_VL,
2447 idx_from_vl(vl)));
2448
2449 rsp->vls[vfi].port_vl_rcv_fecn =
2450 cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_FCN_VL,
2451 idx_from_vl(vl)));
2452
2453 rsp->vls[vfi].port_vl_rcv_becn =
2454 cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_BCN_VL,
2455 idx_from_vl(vl)));
2456
2457 vlinfo++;
2458 vfi++;
2459 }
2460
2461 a0_portstatus(ppd, rsp, vl_select_mask);
2462
2463 if (resp_len)
2464 *resp_len += response_data_size;
2465
2466 return reply((struct ib_mad_hdr *)pmp);
2467}
2468
f0852922
AL
2469static u64 get_error_counter_summary(struct ib_device *ibdev, u8 port,
2470 u8 res_lli, u8 res_ler)
77241056
MM
2471{
2472 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
2473 struct hfi1_ibport *ibp = to_iport(ibdev, port);
2474 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
2475 u64 error_counter_summary = 0, tmp;
2476
2477 error_counter_summary += read_port_cntr(ppd, C_SW_RCV_CSTR_ERR,
2478 CNTR_INVALID_VL);
2479 /* port_rcv_switch_relay_errors is 0 for HFIs */
2480 error_counter_summary += read_port_cntr(ppd, C_SW_XMIT_DSCD,
2481 CNTR_INVALID_VL);
2482 error_counter_summary += read_port_cntr(ppd, C_SW_XMIT_CSTR_ERR,
2483 CNTR_INVALID_VL);
2484 error_counter_summary += read_dev_cntr(dd, C_DC_RMT_PHY_ERR,
2485 CNTR_INVALID_VL);
f0852922
AL
2486 /* local link integrity must be right-shifted by the lli resolution */
2487 tmp = read_dev_cntr(dd, C_DC_RX_REPLAY, CNTR_INVALID_VL);
2488 tmp += read_dev_cntr(dd, C_DC_TX_REPLAY, CNTR_INVALID_VL);
2489 error_counter_summary += (tmp >> res_lli);
2490 /* link error recovery must b right-shifted by the ler resolution */
2491 tmp = read_dev_cntr(dd, C_DC_SEQ_CRC_CNT, CNTR_INVALID_VL);
2492 tmp += read_dev_cntr(dd, C_DC_REINIT_FROM_PEER_CNT, CNTR_INVALID_VL);
2493 error_counter_summary += (tmp >> res_ler);
77241056
MM
2494 error_counter_summary += read_dev_cntr(dd, C_DC_RCV_ERR,
2495 CNTR_INVALID_VL);
2496 error_counter_summary += read_dev_cntr(dd, C_RCV_OVF, CNTR_INVALID_VL);
2497 error_counter_summary += read_dev_cntr(dd, C_DC_FM_CFG_ERR,
2498 CNTR_INVALID_VL);
2499 /* ppd->link_downed is a 32-bit value */
2500 error_counter_summary += read_port_cntr(ppd, C_SW_LINK_DOWN,
2501 CNTR_INVALID_VL);
2502 tmp = read_dev_cntr(dd, C_DC_UNC_ERR, CNTR_INVALID_VL);
2503 /* this is an 8-bit quantity */
2504 error_counter_summary += tmp < 0x100 ? (tmp & 0xff) : 0xff;
2505
2506 return error_counter_summary;
2507}
2508
f4ddedf4 2509static void a0_datacounters(struct hfi1_pportdata *ppd, struct _port_dctrs *rsp,
77241056
MM
2510 u32 vl_select_mask)
2511{
f4ddedf4 2512 if (!is_bx(ppd->dd)) {
77241056 2513 unsigned long vl;
db00a055 2514 u64 sum_vl_xmit_wait = 0;
f4ddedf4 2515 u32 vl_all_mask = VL_MASK_ALL;
db00a055 2516
f4ddedf4
IW
2517 for_each_set_bit(vl, (unsigned long *)&(vl_all_mask),
2518 8 * sizeof(vl_all_mask)) {
77241056 2519 u64 tmp = sum_vl_xmit_wait +
f4ddedf4
IW
2520 read_port_cntr(ppd, C_TX_WAIT_VL,
2521 idx_from_vl(vl));
77241056
MM
2522 if (tmp < sum_vl_xmit_wait) {
2523 /* we wrapped */
50e5dcbe 2524 sum_vl_xmit_wait = (u64)~0;
77241056
MM
2525 break;
2526 }
2527 sum_vl_xmit_wait = tmp;
2528 }
2529 if (be64_to_cpu(rsp->port_xmit_wait) > sum_vl_xmit_wait)
2530 rsp->port_xmit_wait = cpu_to_be64(sum_vl_xmit_wait);
2531 }
2532}
2533
b8d114eb
SS
2534static void pma_get_opa_port_dctrs(struct ib_device *ibdev,
2535 struct _port_dctrs *rsp)
2536{
2537 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
2538
2539 rsp->port_xmit_data = cpu_to_be64(read_dev_cntr(dd, C_DC_XMIT_FLITS,
2540 CNTR_INVALID_VL));
2541 rsp->port_rcv_data = cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_FLITS,
2542 CNTR_INVALID_VL));
2543 rsp->port_xmit_pkts = cpu_to_be64(read_dev_cntr(dd, C_DC_XMIT_PKTS,
2544 CNTR_INVALID_VL));
2545 rsp->port_rcv_pkts = cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_PKTS,
2546 CNTR_INVALID_VL));
2547 rsp->port_multicast_xmit_pkts =
2548 cpu_to_be64(read_dev_cntr(dd, C_DC_MC_XMIT_PKTS,
2549 CNTR_INVALID_VL));
2550 rsp->port_multicast_rcv_pkts =
2551 cpu_to_be64(read_dev_cntr(dd, C_DC_MC_RCV_PKTS,
2552 CNTR_INVALID_VL));
2553}
2554
77241056
MM
2555static int pma_get_opa_datacounters(struct opa_pma_mad *pmp,
2556 struct ib_device *ibdev, u8 port, u32 *resp_len)
2557{
2558 struct opa_port_data_counters_msg *req =
2559 (struct opa_port_data_counters_msg *)pmp->data;
2560 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
2561 struct hfi1_ibport *ibp = to_iport(ibdev, port);
2562 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
2563 struct _port_dctrs *rsp;
2564 struct _vls_dctrs *vlinfo;
2565 size_t response_data_size;
2566 u32 num_ports;
2567 u8 num_pslm;
2568 u8 lq, num_vls;
f0852922 2569 u8 res_lli, res_ler;
77241056
MM
2570 u64 port_mask;
2571 unsigned long port_num;
2572 unsigned long vl;
2573 u32 vl_select_mask;
2574 int vfi;
2575
2576 num_ports = be32_to_cpu(pmp->mad_hdr.attr_mod) >> 24;
2577 num_pslm = hweight64(be64_to_cpu(req->port_select_mask[3]));
2578 num_vls = hweight32(be32_to_cpu(req->vl_select_mask));
2579 vl_select_mask = be32_to_cpu(req->vl_select_mask);
f0852922
AL
2580 res_lli = (u8)(be32_to_cpu(req->resolution) & MSK_LLI) >> MSK_LLI_SFT;
2581 res_lli = res_lli ? res_lli + ADD_LLI : 0;
2582 res_ler = (u8)(be32_to_cpu(req->resolution) & MSK_LER) >> MSK_LER_SFT;
2583 res_ler = res_ler ? res_ler + ADD_LER : 0;
77241056
MM
2584
2585 if (num_ports != 1 || (vl_select_mask & ~VL_MASK_ALL)) {
2586 pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
2587 return reply((struct ib_mad_hdr *)pmp);
2588 }
2589
2590 /* Sanity check */
2591 response_data_size = sizeof(struct opa_port_data_counters_msg) +
2592 num_vls * sizeof(struct _vls_dctrs);
2593
2594 if (response_data_size > sizeof(pmp->data)) {
2595 pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
2596 return reply((struct ib_mad_hdr *)pmp);
2597 }
2598
2599 /*
2600 * The bit set in the mask needs to be consistent with the
2601 * port the request came in on.
2602 */
2603 port_mask = be64_to_cpu(req->port_select_mask[3]);
2604 port_num = find_first_bit((unsigned long *)&port_mask,
2605 sizeof(port_mask));
2606
2607 if ((u8)port_num != port) {
2608 pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
2609 return reply((struct ib_mad_hdr *)pmp);
2610 }
2611
58721b8f 2612 rsp = (struct _port_dctrs *)&req->port[0];
77241056
MM
2613 memset(rsp, 0, sizeof(*rsp));
2614
2615 rsp->port_number = port;
2616 /*
2617 * Note that link_quality_indicator is a 32 bit quantity in
2618 * 'datacounters' queries (as opposed to 'portinfo' queries,
2619 * where it's a byte).
2620 */
2621 hfi1_read_link_quality(dd, &lq);
2622 rsp->link_quality_indicator = cpu_to_be32((u32)lq);
b8d114eb 2623 pma_get_opa_port_dctrs(ibdev, rsp);
77241056 2624
77241056
MM
2625 rsp->port_xmit_wait =
2626 cpu_to_be64(read_port_cntr(ppd, C_TX_WAIT, CNTR_INVALID_VL));
2627 rsp->port_rcv_fecn =
2628 cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_FCN, CNTR_INVALID_VL));
2629 rsp->port_rcv_becn =
2630 cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_BCN, CNTR_INVALID_VL));
77241056 2631 rsp->port_error_counter_summary =
f0852922
AL
2632 cpu_to_be64(get_error_counter_summary(ibdev, port,
2633 res_lli, res_ler));
77241056 2634
58721b8f 2635 vlinfo = &rsp->vls[0];
77241056
MM
2636 vfi = 0;
2637 /* The vl_select_mask has been checked above, and we know
2638 * that it contains only entries which represent valid VLs.
2639 * So in the for_each_set_bit() loop below, we don't need
2640 * any additional checks for vl.
2641 */
2642 for_each_set_bit(vl, (unsigned long *)&(vl_select_mask),
2643 8 * sizeof(req->vl_select_mask)) {
2644 memset(vlinfo, 0, sizeof(*vlinfo));
2645
2646 rsp->vls[vfi].port_vl_xmit_data =
2647 cpu_to_be64(read_port_cntr(ppd, C_TX_FLIT_VL,
2648 idx_from_vl(vl)));
2649
2650 rsp->vls[vfi].port_vl_rcv_data =
2651 cpu_to_be64(read_dev_cntr(dd, C_DC_RX_FLIT_VL,
2652 idx_from_vl(vl)));
77241056
MM
2653
2654 rsp->vls[vfi].port_vl_xmit_pkts =
2655 cpu_to_be64(read_port_cntr(ppd, C_TX_PKT_VL,
2656 idx_from_vl(vl)));
2657
2658 rsp->vls[vfi].port_vl_rcv_pkts =
2659 cpu_to_be64(read_dev_cntr(dd, C_DC_RX_PKT_VL,
2660 idx_from_vl(vl)));
2661
2662 rsp->vls[vfi].port_vl_xmit_wait =
2663 cpu_to_be64(read_port_cntr(ppd, C_TX_WAIT_VL,
2664 idx_from_vl(vl)));
2665
2666 rsp->vls[vfi].port_vl_rcv_fecn =
2667 cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_FCN_VL,
2668 idx_from_vl(vl)));
2669 rsp->vls[vfi].port_vl_rcv_becn =
2670 cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_BCN_VL,
2671 idx_from_vl(vl)));
2672
2673 /* rsp->port_vl_xmit_time_cong is 0 for HFIs */
2674 /* rsp->port_vl_xmit_wasted_bw ??? */
2675 /* port_vl_xmit_wait_data - TXE (table 13-9 HFI spec) ???
2676 * does this differ from rsp->vls[vfi].port_vl_xmit_wait */
2677 /*rsp->vls[vfi].port_vl_mark_fecn =
2678 cpu_to_be64(read_csr(dd, DCC_PRF_PORT_VL_MARK_FECN_CNT
2679 + offset));
2680 */
2681 vlinfo++;
2682 vfi++;
2683 }
2684
f4ddedf4 2685 a0_datacounters(ppd, rsp, vl_select_mask);
77241056
MM
2686
2687 if (resp_len)
2688 *resp_len += response_data_size;
2689
2690 return reply((struct ib_mad_hdr *)pmp);
2691}
2692
b8d114eb
SS
2693static int pma_get_ib_portcounters_ext(struct ib_pma_mad *pmp,
2694 struct ib_device *ibdev, u8 port)
2695{
2696 struct ib_pma_portcounters_ext *p = (struct ib_pma_portcounters_ext *)
2697 pmp->data;
2698 struct _port_dctrs rsp;
2699
2700 if (pmp->mad_hdr.attr_mod != 0 || p->port_select != port) {
2701 pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
2702 goto bail;
2703 }
2704
2705 memset(&rsp, 0, sizeof(rsp));
2706 pma_get_opa_port_dctrs(ibdev, &rsp);
2707
2708 p->port_xmit_data = rsp.port_xmit_data;
2709 p->port_rcv_data = rsp.port_rcv_data;
2710 p->port_xmit_packets = rsp.port_xmit_pkts;
2711 p->port_rcv_packets = rsp.port_rcv_pkts;
2712 p->port_unicast_xmit_packets = 0;
2713 p->port_unicast_rcv_packets = 0;
2714 p->port_multicast_xmit_packets = rsp.port_multicast_xmit_pkts;
2715 p->port_multicast_rcv_packets = rsp.port_multicast_rcv_pkts;
2716
2717bail:
2718 return reply((struct ib_mad_hdr *)pmp);
2719}
2720
2721static void pma_get_opa_port_ectrs(struct ib_device *ibdev,
2722 struct _port_ectrs *rsp, u8 port)
2723{
2724 u64 tmp, tmp2;
2725 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
2726 struct hfi1_ibport *ibp = to_iport(ibdev, port);
2727 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
2728
2729 tmp = read_dev_cntr(dd, C_DC_SEQ_CRC_CNT, CNTR_INVALID_VL);
2730 tmp2 = tmp + read_dev_cntr(dd, C_DC_REINIT_FROM_PEER_CNT,
2731 CNTR_INVALID_VL);
2732 if (tmp2 > (u32)UINT_MAX || tmp2 < tmp) {
2733 /* overflow/wrapped */
2734 rsp->link_error_recovery = cpu_to_be32(~0);
2735 } else {
2736 rsp->link_error_recovery = cpu_to_be32(tmp2);
2737 }
2738
2739 rsp->link_downed = cpu_to_be32(read_port_cntr(ppd, C_SW_LINK_DOWN,
2740 CNTR_INVALID_VL));
2741 rsp->port_rcv_errors =
2742 cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_ERR, CNTR_INVALID_VL));
2743 rsp->port_rcv_remote_physical_errors =
2744 cpu_to_be64(read_dev_cntr(dd, C_DC_RMT_PHY_ERR,
2745 CNTR_INVALID_VL));
2746 rsp->port_rcv_switch_relay_errors = 0;
2747 rsp->port_xmit_discards =
2748 cpu_to_be64(read_port_cntr(ppd, C_SW_XMIT_DSCD,
2749 CNTR_INVALID_VL));
2750 rsp->port_xmit_constraint_errors =
2751 cpu_to_be64(read_port_cntr(ppd, C_SW_XMIT_CSTR_ERR,
2752 CNTR_INVALID_VL));
2753 rsp->port_rcv_constraint_errors =
2754 cpu_to_be64(read_port_cntr(ppd, C_SW_RCV_CSTR_ERR,
2755 CNTR_INVALID_VL));
2756 tmp = read_dev_cntr(dd, C_DC_RX_REPLAY, CNTR_INVALID_VL);
2757 tmp2 = tmp + read_dev_cntr(dd, C_DC_TX_REPLAY, CNTR_INVALID_VL);
2758 if (tmp2 < tmp) {
2759 /* overflow/wrapped */
2760 rsp->local_link_integrity_errors = cpu_to_be64(~0);
2761 } else {
2762 rsp->local_link_integrity_errors = cpu_to_be64(tmp2);
2763 }
2764 rsp->excessive_buffer_overruns =
2765 cpu_to_be64(read_dev_cntr(dd, C_RCV_OVF, CNTR_INVALID_VL));
2766}
2767
77241056
MM
2768static int pma_get_opa_porterrors(struct opa_pma_mad *pmp,
2769 struct ib_device *ibdev, u8 port, u32 *resp_len)
2770{
2771 size_t response_data_size;
2772 struct _port_ectrs *rsp;
eb2e557c 2773 u8 port_num;
77241056
MM
2774 struct opa_port_error_counters64_msg *req;
2775 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
2776 u32 num_ports;
2777 u8 num_pslm;
2778 u8 num_vls;
2779 struct hfi1_ibport *ibp;
2780 struct hfi1_pportdata *ppd;
2781 struct _vls_ectrs *vlinfo;
2782 unsigned long vl;
b8d114eb 2783 u64 port_mask, tmp;
77241056
MM
2784 u32 vl_select_mask;
2785 int vfi;
2786
2787 req = (struct opa_port_error_counters64_msg *)pmp->data;
2788
2789 num_ports = be32_to_cpu(pmp->mad_hdr.attr_mod) >> 24;
2790
2791 num_pslm = hweight64(be64_to_cpu(req->port_select_mask[3]));
2792 num_vls = hweight32(be32_to_cpu(req->vl_select_mask));
2793
2794 if (num_ports != 1 || num_ports != num_pslm) {
2795 pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
2796 return reply((struct ib_mad_hdr *)pmp);
2797 }
2798
2799 response_data_size = sizeof(struct opa_port_error_counters64_msg) +
2800 num_vls * sizeof(struct _vls_ectrs);
2801
2802 if (response_data_size > sizeof(pmp->data)) {
2803 pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
2804 return reply((struct ib_mad_hdr *)pmp);
2805 }
2806 /*
2807 * The bit set in the mask needs to be consistent with the
2808 * port the request came in on.
2809 */
2810 port_mask = be64_to_cpu(req->port_select_mask[3]);
2811 port_num = find_first_bit((unsigned long *)&port_mask,
2812 sizeof(port_mask));
2813
eb2e557c 2814 if (port_num != port) {
77241056
MM
2815 pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
2816 return reply((struct ib_mad_hdr *)pmp);
2817 }
2818
58721b8f 2819 rsp = (struct _port_ectrs *)&req->port[0];
77241056
MM
2820
2821 ibp = to_iport(ibdev, port_num);
2822 ppd = ppd_from_ibp(ibp);
2823
2824 memset(rsp, 0, sizeof(*rsp));
eb2e557c 2825 rsp->port_number = port_num;
77241056 2826
b8d114eb
SS
2827 pma_get_opa_port_ectrs(ibdev, rsp, port_num);
2828
77241056
MM
2829 rsp->port_rcv_remote_physical_errors =
2830 cpu_to_be64(read_dev_cntr(dd, C_DC_RMT_PHY_ERR,
b8d114eb 2831 CNTR_INVALID_VL));
77241056
MM
2832 rsp->fm_config_errors =
2833 cpu_to_be64(read_dev_cntr(dd, C_DC_FM_CFG_ERR,
2834 CNTR_INVALID_VL));
77241056 2835 tmp = read_dev_cntr(dd, C_DC_UNC_ERR, CNTR_INVALID_VL);
b8d114eb 2836
77241056
MM
2837 rsp->uncorrectable_errors = tmp < 0x100 ? (tmp & 0xff) : 0xff;
2838
58721b8f 2839 vlinfo = (struct _vls_ectrs *)&rsp->vls[0];
77241056
MM
2840 vfi = 0;
2841 vl_select_mask = be32_to_cpu(req->vl_select_mask);
2842 for_each_set_bit(vl, (unsigned long *)&(vl_select_mask),
2843 8 * sizeof(req->vl_select_mask)) {
2844 memset(vlinfo, 0, sizeof(*vlinfo));
2845 /* vlinfo->vls[vfi].port_vl_xmit_discards ??? */
2846 vlinfo += 1;
2847 vfi++;
2848 }
2849
2850 if (resp_len)
2851 *resp_len += response_data_size;
2852
2853 return reply((struct ib_mad_hdr *)pmp);
2854}
2855
b8d114eb
SS
2856static int pma_get_ib_portcounters(struct ib_pma_mad *pmp,
2857 struct ib_device *ibdev, u8 port)
2858{
2859 struct ib_pma_portcounters *p = (struct ib_pma_portcounters *)
2860 pmp->data;
2861 struct _port_ectrs rsp;
2862 u64 temp_link_overrun_errors;
2863 u64 temp_64;
2864 u32 temp_32;
2865
2866 memset(&rsp, 0, sizeof(rsp));
2867 pma_get_opa_port_ectrs(ibdev, &rsp, port);
2868
2869 if (pmp->mad_hdr.attr_mod != 0 || p->port_select != port) {
2870 pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
2871 goto bail;
2872 }
2873
2874 p->symbol_error_counter = 0; /* N/A for OPA */
2875
2876 temp_32 = be32_to_cpu(rsp.link_error_recovery);
2877 if (temp_32 > 0xFFUL)
2878 p->link_error_recovery_counter = 0xFF;
2879 else
2880 p->link_error_recovery_counter = (u8)temp_32;
2881
2882 temp_32 = be32_to_cpu(rsp.link_downed);
2883 if (temp_32 > 0xFFUL)
2884 p->link_downed_counter = 0xFF;
2885 else
2886 p->link_downed_counter = (u8)temp_32;
2887
2888 temp_64 = be64_to_cpu(rsp.port_rcv_errors);
2889 if (temp_64 > 0xFFFFUL)
2890 p->port_rcv_errors = cpu_to_be16(0xFFFF);
2891 else
2892 p->port_rcv_errors = cpu_to_be16((u16)temp_64);
2893
2894 temp_64 = be64_to_cpu(rsp.port_rcv_remote_physical_errors);
2895 if (temp_64 > 0xFFFFUL)
2896 p->port_rcv_remphys_errors = cpu_to_be16(0xFFFF);
2897 else
2898 p->port_rcv_remphys_errors = cpu_to_be16((u16)temp_64);
2899
2900 temp_64 = be64_to_cpu(rsp.port_rcv_switch_relay_errors);
2901 p->port_rcv_switch_relay_errors = cpu_to_be16((u16)temp_64);
2902
2903 temp_64 = be64_to_cpu(rsp.port_xmit_discards);
2904 if (temp_64 > 0xFFFFUL)
2905 p->port_xmit_discards = cpu_to_be16(0xFFFF);
2906 else
2907 p->port_xmit_discards = cpu_to_be16((u16)temp_64);
2908
2909 temp_64 = be64_to_cpu(rsp.port_xmit_constraint_errors);
2910 if (temp_64 > 0xFFUL)
2911 p->port_xmit_constraint_errors = 0xFF;
2912 else
2913 p->port_xmit_constraint_errors = (u8)temp_64;
2914
2915 temp_64 = be64_to_cpu(rsp.port_rcv_constraint_errors);
2916 if (temp_64 > 0xFFUL)
2917 p->port_rcv_constraint_errors = 0xFFUL;
2918 else
2919 p->port_rcv_constraint_errors = (u8)temp_64;
2920
2921 /* LocalLink: 7:4, BufferOverrun: 3:0 */
2922 temp_64 = be64_to_cpu(rsp.local_link_integrity_errors);
2923 if (temp_64 > 0xFUL)
2924 temp_64 = 0xFUL;
2925
2926 temp_link_overrun_errors = temp_64 << 4;
2927
2928 temp_64 = be64_to_cpu(rsp.excessive_buffer_overruns);
2929 if (temp_64 > 0xFUL)
2930 temp_64 = 0xFUL;
2931 temp_link_overrun_errors |= temp_64;
2932
2933 p->link_overrun_errors = (u8)temp_link_overrun_errors;
2934
2935 p->vl15_dropped = 0; /* N/A for OPA */
2936
2937bail:
2938 return reply((struct ib_mad_hdr *)pmp);
2939}
2940
77241056
MM
2941static int pma_get_opa_errorinfo(struct opa_pma_mad *pmp,
2942 struct ib_device *ibdev, u8 port, u32 *resp_len)
2943{
2944 size_t response_data_size;
2945 struct _port_ei *rsp;
2946 struct opa_port_error_info_msg *req;
2947 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
2948 u64 port_mask;
2949 u32 num_ports;
eb2e557c 2950 u8 port_num;
77241056
MM
2951 u8 num_pslm;
2952 u64 reg;
2953
2954 req = (struct opa_port_error_info_msg *)pmp->data;
58721b8f 2955 rsp = (struct _port_ei *)&req->port[0];
77241056
MM
2956
2957 num_ports = OPA_AM_NPORT(be32_to_cpu(pmp->mad_hdr.attr_mod));
2958 num_pslm = hweight64(be64_to_cpu(req->port_select_mask[3]));
2959
2960 memset(rsp, 0, sizeof(*rsp));
2961
2962 if (num_ports != 1 || num_ports != num_pslm) {
2963 pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
2964 return reply((struct ib_mad_hdr *)pmp);
2965 }
2966
2967 /* Sanity check */
2968 response_data_size = sizeof(struct opa_port_error_info_msg);
2969
2970 if (response_data_size > sizeof(pmp->data)) {
2971 pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
2972 return reply((struct ib_mad_hdr *)pmp);
2973 }
2974
2975 /*
2976 * The bit set in the mask needs to be consistent with the port
2977 * the request came in on.
2978 */
2979 port_mask = be64_to_cpu(req->port_select_mask[3]);
2980 port_num = find_first_bit((unsigned long *)&port_mask,
2981 sizeof(port_mask));
2982
eb2e557c 2983 if (port_num != port) {
77241056
MM
2984 pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
2985 return reply((struct ib_mad_hdr *)pmp);
2986 }
2987
2988 /* PortRcvErrorInfo */
2989 rsp->port_rcv_ei.status_and_code =
2990 dd->err_info_rcvport.status_and_code;
2991 memcpy(&rsp->port_rcv_ei.ei.ei1to12.packet_flit1,
2992 &dd->err_info_rcvport.packet_flit1, sizeof(u64));
2993 memcpy(&rsp->port_rcv_ei.ei.ei1to12.packet_flit2,
2994 &dd->err_info_rcvport.packet_flit2, sizeof(u64));
2995
2996 /* ExcessiverBufferOverrunInfo */
2997 reg = read_csr(dd, RCV_ERR_INFO);
2998 if (reg & RCV_ERR_INFO_RCV_EXCESS_BUFFER_OVERRUN_SMASK) {
2999 /* if the RcvExcessBufferOverrun bit is set, save SC of
3000 * first pkt that encountered an excess buffer overrun */
3001 u8 tmp = (u8)reg;
3002
3003 tmp &= RCV_ERR_INFO_RCV_EXCESS_BUFFER_OVERRUN_SC_SMASK;
3004 tmp <<= 2;
3005 rsp->excessive_buffer_overrun_ei.status_and_sc = tmp;
3006 /* set the status bit */
3007 rsp->excessive_buffer_overrun_ei.status_and_sc |= 0x80;
3008 }
3009
3010 rsp->port_xmit_constraint_ei.status =
3011 dd->err_info_xmit_constraint.status;
3012 rsp->port_xmit_constraint_ei.pkey =
3013 cpu_to_be16(dd->err_info_xmit_constraint.pkey);
3014 rsp->port_xmit_constraint_ei.slid =
3015 cpu_to_be32(dd->err_info_xmit_constraint.slid);
3016
3017 rsp->port_rcv_constraint_ei.status =
3018 dd->err_info_rcv_constraint.status;
3019 rsp->port_rcv_constraint_ei.pkey =
3020 cpu_to_be16(dd->err_info_rcv_constraint.pkey);
3021 rsp->port_rcv_constraint_ei.slid =
3022 cpu_to_be32(dd->err_info_rcv_constraint.slid);
3023
3024 /* UncorrectableErrorInfo */
3025 rsp->uncorrectable_ei.status_and_code = dd->err_info_uncorrectable;
3026
3027 /* FMConfigErrorInfo */
3028 rsp->fm_config_ei.status_and_code = dd->err_info_fmconfig;
3029
3030 if (resp_len)
3031 *resp_len += response_data_size;
3032
3033 return reply((struct ib_mad_hdr *)pmp);
3034}
3035
3036static int pma_set_opa_portstatus(struct opa_pma_mad *pmp,
3037 struct ib_device *ibdev, u8 port, u32 *resp_len)
3038{
3039 struct opa_clear_port_status *req =
3040 (struct opa_clear_port_status *)pmp->data;
3041 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
3042 struct hfi1_ibport *ibp = to_iport(ibdev, port);
3043 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
3044 u32 nports = be32_to_cpu(pmp->mad_hdr.attr_mod) >> 24;
3045 u64 portn = be64_to_cpu(req->port_select_mask[3]);
3046 u32 counter_select = be32_to_cpu(req->counter_select_mask);
3047 u32 vl_select_mask = VL_MASK_ALL; /* clear all per-vl cnts */
3048 unsigned long vl;
3049
3050 if ((nports != 1) || (portn != 1 << port)) {
3051 pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
3052 return reply((struct ib_mad_hdr *)pmp);
3053 }
3054 /*
3055 * only counters returned by pma_get_opa_portstatus() are
3056 * handled, so when pma_get_opa_portstatus() gets a fix,
3057 * the corresponding change should be made here as well.
3058 */
3059
3060 if (counter_select & CS_PORT_XMIT_DATA)
3061 write_dev_cntr(dd, C_DC_XMIT_FLITS, CNTR_INVALID_VL, 0);
3062
3063 if (counter_select & CS_PORT_RCV_DATA)
3064 write_dev_cntr(dd, C_DC_RCV_FLITS, CNTR_INVALID_VL, 0);
3065
3066 if (counter_select & CS_PORT_XMIT_PKTS)
3067 write_dev_cntr(dd, C_DC_XMIT_PKTS, CNTR_INVALID_VL, 0);
3068
3069 if (counter_select & CS_PORT_RCV_PKTS)
3070 write_dev_cntr(dd, C_DC_RCV_PKTS, CNTR_INVALID_VL, 0);
3071
3072 if (counter_select & CS_PORT_MCAST_XMIT_PKTS)
3073 write_dev_cntr(dd, C_DC_MC_XMIT_PKTS, CNTR_INVALID_VL, 0);
3074
3075 if (counter_select & CS_PORT_MCAST_RCV_PKTS)
3076 write_dev_cntr(dd, C_DC_MC_RCV_PKTS, CNTR_INVALID_VL, 0);
3077
3078 if (counter_select & CS_PORT_XMIT_WAIT)
3079 write_port_cntr(ppd, C_TX_WAIT, CNTR_INVALID_VL, 0);
3080
3081 /* ignore cs_sw_portCongestion for HFIs */
3082
3083 if (counter_select & CS_PORT_RCV_FECN)
3084 write_dev_cntr(dd, C_DC_RCV_FCN, CNTR_INVALID_VL, 0);
3085
3086 if (counter_select & CS_PORT_RCV_BECN)
3087 write_dev_cntr(dd, C_DC_RCV_BCN, CNTR_INVALID_VL, 0);
3088
3089 /* ignore cs_port_xmit_time_cong for HFIs */
3090 /* ignore cs_port_xmit_wasted_bw for now */
3091 /* ignore cs_port_xmit_wait_data for now */
3092 if (counter_select & CS_PORT_RCV_BUBBLE)
3093 write_dev_cntr(dd, C_DC_RCV_BBL, CNTR_INVALID_VL, 0);
3094
3095 /* Only applicable for switch */
3096 /*if (counter_select & CS_PORT_MARK_FECN)
3097 write_csr(dd, DCC_PRF_PORT_MARK_FECN_CNT, 0);*/
3098
3099 if (counter_select & CS_PORT_RCV_CONSTRAINT_ERRORS)
3100 write_port_cntr(ppd, C_SW_RCV_CSTR_ERR, CNTR_INVALID_VL, 0);
3101
3102 /* ignore cs_port_rcv_switch_relay_errors for HFIs */
3103 if (counter_select & CS_PORT_XMIT_DISCARDS)
3104 write_port_cntr(ppd, C_SW_XMIT_DSCD, CNTR_INVALID_VL, 0);
3105
3106 if (counter_select & CS_PORT_XMIT_CONSTRAINT_ERRORS)
3107 write_port_cntr(ppd, C_SW_XMIT_CSTR_ERR, CNTR_INVALID_VL, 0);
3108
3109 if (counter_select & CS_PORT_RCV_REMOTE_PHYSICAL_ERRORS)
3110 write_dev_cntr(dd, C_DC_RMT_PHY_ERR, CNTR_INVALID_VL, 0);
3111
3112 if (counter_select & CS_LOCAL_LINK_INTEGRITY_ERRORS) {
3113 write_dev_cntr(dd, C_DC_TX_REPLAY, CNTR_INVALID_VL, 0);
3114 write_dev_cntr(dd, C_DC_RX_REPLAY, CNTR_INVALID_VL, 0);
3115 }
3116
3117 if (counter_select & CS_LINK_ERROR_RECOVERY) {
3118 write_dev_cntr(dd, C_DC_SEQ_CRC_CNT, CNTR_INVALID_VL, 0);
3119 write_dev_cntr(dd, C_DC_REINIT_FROM_PEER_CNT,
3120 CNTR_INVALID_VL, 0);
3121 }
3122
3123 if (counter_select & CS_PORT_RCV_ERRORS)
3124 write_dev_cntr(dd, C_DC_RCV_ERR, CNTR_INVALID_VL, 0);
3125
3126 if (counter_select & CS_EXCESSIVE_BUFFER_OVERRUNS) {
3127 write_dev_cntr(dd, C_RCV_OVF, CNTR_INVALID_VL, 0);
3128 dd->rcv_ovfl_cnt = 0;
3129 }
3130
3131 if (counter_select & CS_FM_CONFIG_ERRORS)
3132 write_dev_cntr(dd, C_DC_FM_CFG_ERR, CNTR_INVALID_VL, 0);
3133
3134 if (counter_select & CS_LINK_DOWNED)
3135 write_port_cntr(ppd, C_SW_LINK_DOWN, CNTR_INVALID_VL, 0);
3136
3137 if (counter_select & CS_UNCORRECTABLE_ERRORS)
3138 write_dev_cntr(dd, C_DC_UNC_ERR, CNTR_INVALID_VL, 0);
3139
3140 for_each_set_bit(vl, (unsigned long *)&(vl_select_mask),
3141 8 * sizeof(vl_select_mask)) {
77241056
MM
3142 if (counter_select & CS_PORT_XMIT_DATA)
3143 write_port_cntr(ppd, C_TX_FLIT_VL, idx_from_vl(vl), 0);
3144
3145 if (counter_select & CS_PORT_RCV_DATA)
3146 write_dev_cntr(dd, C_DC_RX_FLIT_VL, idx_from_vl(vl), 0);
3147
3148 if (counter_select & CS_PORT_XMIT_PKTS)
3149 write_port_cntr(ppd, C_TX_PKT_VL, idx_from_vl(vl), 0);
3150
3151 if (counter_select & CS_PORT_RCV_PKTS)
3152 write_dev_cntr(dd, C_DC_RX_PKT_VL, idx_from_vl(vl), 0);
3153
3154 if (counter_select & CS_PORT_XMIT_WAIT)
3155 write_port_cntr(ppd, C_TX_WAIT_VL, idx_from_vl(vl), 0);
3156
3157 /* sw_port_vl_congestion is 0 for HFIs */
3158 if (counter_select & CS_PORT_RCV_FECN)
3159 write_dev_cntr(dd, C_DC_RCV_FCN_VL, idx_from_vl(vl), 0);
3160
3161 if (counter_select & CS_PORT_RCV_BECN)
3162 write_dev_cntr(dd, C_DC_RCV_BCN_VL, idx_from_vl(vl), 0);
3163
3164 /* port_vl_xmit_time_cong is 0 for HFIs */
3165 /* port_vl_xmit_wasted_bw ??? */
3166 /* port_vl_xmit_wait_data - TXE (table 13-9 HFI spec) ??? */
3167 if (counter_select & CS_PORT_RCV_BUBBLE)
3168 write_dev_cntr(dd, C_DC_RCV_BBL_VL, idx_from_vl(vl), 0);
3169
3170 /*if (counter_select & CS_PORT_MARK_FECN)
3171 write_csr(dd, DCC_PRF_PORT_VL_MARK_FECN_CNT + offset, 0);
3172 */
3173 /* port_vl_xmit_discards ??? */
3174 }
3175
3176 if (resp_len)
3177 *resp_len += sizeof(*req);
3178
3179 return reply((struct ib_mad_hdr *)pmp);
3180}
3181
3182static int pma_set_opa_errorinfo(struct opa_pma_mad *pmp,
3183 struct ib_device *ibdev, u8 port, u32 *resp_len)
3184{
3185 struct _port_ei *rsp;
3186 struct opa_port_error_info_msg *req;
3187 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
3188 u64 port_mask;
3189 u32 num_ports;
eb2e557c 3190 u8 port_num;
77241056
MM
3191 u8 num_pslm;
3192 u32 error_info_select;
3193
3194 req = (struct opa_port_error_info_msg *)pmp->data;
58721b8f 3195 rsp = (struct _port_ei *)&req->port[0];
77241056
MM
3196
3197 num_ports = OPA_AM_NPORT(be32_to_cpu(pmp->mad_hdr.attr_mod));
3198 num_pslm = hweight64(be64_to_cpu(req->port_select_mask[3]));
3199
3200 memset(rsp, 0, sizeof(*rsp));
3201
3202 if (num_ports != 1 || num_ports != num_pslm) {
3203 pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
3204 return reply((struct ib_mad_hdr *)pmp);
3205 }
3206
3207 /*
3208 * The bit set in the mask needs to be consistent with the port
3209 * the request came in on.
3210 */
3211 port_mask = be64_to_cpu(req->port_select_mask[3]);
3212 port_num = find_first_bit((unsigned long *)&port_mask,
3213 sizeof(port_mask));
3214
eb2e557c 3215 if (port_num != port) {
77241056
MM
3216 pmp->mad_hdr.status |= IB_SMP_INVALID_FIELD;
3217 return reply((struct ib_mad_hdr *)pmp);
3218 }
3219
3220 error_info_select = be32_to_cpu(req->error_info_select_mask);
3221
3222 /* PortRcvErrorInfo */
3223 if (error_info_select & ES_PORT_RCV_ERROR_INFO)
3224 /* turn off status bit */
3225 dd->err_info_rcvport.status_and_code &= ~OPA_EI_STATUS_SMASK;
3226
3227 /* ExcessiverBufferOverrunInfo */
3228 if (error_info_select & ES_EXCESSIVE_BUFFER_OVERRUN_INFO)
3229 /* status bit is essentially kept in the h/w - bit 5 of
3230 * RCV_ERR_INFO */
3231 write_csr(dd, RCV_ERR_INFO,
3232 RCV_ERR_INFO_RCV_EXCESS_BUFFER_OVERRUN_SMASK);
3233
3234 if (error_info_select & ES_PORT_XMIT_CONSTRAINT_ERROR_INFO)
3235 dd->err_info_xmit_constraint.status &= ~OPA_EI_STATUS_SMASK;
3236
3237 if (error_info_select & ES_PORT_RCV_CONSTRAINT_ERROR_INFO)
3238 dd->err_info_rcv_constraint.status &= ~OPA_EI_STATUS_SMASK;
3239
3240 /* UncorrectableErrorInfo */
3241 if (error_info_select & ES_UNCORRECTABLE_ERROR_INFO)
3242 /* turn off status bit */
3243 dd->err_info_uncorrectable &= ~OPA_EI_STATUS_SMASK;
3244
3245 /* FMConfigErrorInfo */
3246 if (error_info_select & ES_FM_CONFIG_ERROR_INFO)
3247 /* turn off status bit */
3248 dd->err_info_fmconfig &= ~OPA_EI_STATUS_SMASK;
3249
3250 if (resp_len)
3251 *resp_len += sizeof(*req);
3252
3253 return reply((struct ib_mad_hdr *)pmp);
3254}
3255
3256struct opa_congestion_info_attr {
3257 __be16 congestion_info;
3258 u8 control_table_cap; /* Multiple of 64 entry unit CCTs */
3259 u8 congestion_log_length;
3260} __packed;
3261
3262static int __subn_get_opa_cong_info(struct opa_smp *smp, u32 am, u8 *data,
3263 struct ib_device *ibdev, u8 port,
3264 u32 *resp_len)
3265{
3266 struct opa_congestion_info_attr *p =
3267 (struct opa_congestion_info_attr *)data;
3268 struct hfi1_ibport *ibp = to_iport(ibdev, port);
3269 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
3270
3271 p->congestion_info = 0;
3272 p->control_table_cap = ppd->cc_max_table_entries;
3273 p->congestion_log_length = OPA_CONG_LOG_ELEMS;
3274
3275 if (resp_len)
3276 *resp_len += sizeof(*p);
3277
3278 return reply((struct ib_mad_hdr *)smp);
3279}
3280
3281static int __subn_get_opa_cong_setting(struct opa_smp *smp, u32 am,
3282 u8 *data,
3283 struct ib_device *ibdev,
3284 u8 port, u32 *resp_len)
3285{
3286 int i;
3287 struct opa_congestion_setting_attr *p =
50e5dcbe 3288 (struct opa_congestion_setting_attr *)data;
77241056
MM
3289 struct hfi1_ibport *ibp = to_iport(ibdev, port);
3290 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
3291 struct opa_congestion_setting_entry_shadow *entries;
3292 struct cc_state *cc_state;
3293
3294 rcu_read_lock();
3295
3296 cc_state = get_cc_state(ppd);
3297
d125a6c6 3298 if (!cc_state) {
77241056
MM
3299 rcu_read_unlock();
3300 return reply((struct ib_mad_hdr *)smp);
3301 }
3302
3303 entries = cc_state->cong_setting.entries;
3304 p->port_control = cpu_to_be16(cc_state->cong_setting.port_control);
3305 p->control_map = cpu_to_be32(cc_state->cong_setting.control_map);
3306 for (i = 0; i < OPA_MAX_SLS; i++) {
3307 p->entries[i].ccti_increase = entries[i].ccti_increase;
3308 p->entries[i].ccti_timer = cpu_to_be16(entries[i].ccti_timer);
3309 p->entries[i].trigger_threshold =
3310 entries[i].trigger_threshold;
3311 p->entries[i].ccti_min = entries[i].ccti_min;
3312 }
3313
3314 rcu_read_unlock();
3315
3316 if (resp_len)
3317 *resp_len += sizeof(*p);
3318
3319 return reply((struct ib_mad_hdr *)smp);
3320}
3321
3322static int __subn_set_opa_cong_setting(struct opa_smp *smp, u32 am, u8 *data,
3323 struct ib_device *ibdev, u8 port,
3324 u32 *resp_len)
3325{
3326 struct opa_congestion_setting_attr *p =
50e5dcbe 3327 (struct opa_congestion_setting_attr *)data;
77241056
MM
3328 struct hfi1_ibport *ibp = to_iport(ibdev, port);
3329 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
3330 struct opa_congestion_setting_entry_shadow *entries;
3331 int i;
3332
3333 ppd->cc_sl_control_map = be32_to_cpu(p->control_map);
3334
3335 entries = ppd->congestion_entries;
3336 for (i = 0; i < OPA_MAX_SLS; i++) {
3337 entries[i].ccti_increase = p->entries[i].ccti_increase;
3338 entries[i].ccti_timer = be16_to_cpu(p->entries[i].ccti_timer);
3339 entries[i].trigger_threshold =
3340 p->entries[i].trigger_threshold;
3341 entries[i].ccti_min = p->entries[i].ccti_min;
3342 }
3343
3344 return __subn_get_opa_cong_setting(smp, am, data, ibdev, port,
3345 resp_len);
3346}
3347
3348static int __subn_get_opa_hfi1_cong_log(struct opa_smp *smp, u32 am,
3349 u8 *data, struct ib_device *ibdev,
3350 u8 port, u32 *resp_len)
3351{
3352 struct hfi1_ibport *ibp = to_iport(ibdev, port);
3353 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
3354 struct opa_hfi1_cong_log *cong_log = (struct opa_hfi1_cong_log *)data;
3355 s64 ts;
3356 int i;
3357
3358 if (am != 0) {
3359 smp->status |= IB_SMP_INVALID_FIELD;
3360 return reply((struct ib_mad_hdr *)smp);
3361 }
3362
b77d713a 3363 spin_lock_irq(&ppd->cc_log_lock);
77241056
MM
3364
3365 cong_log->log_type = OPA_CC_LOG_TYPE_HFI;
3366 cong_log->congestion_flags = 0;
3367 cong_log->threshold_event_counter =
3368 cpu_to_be16(ppd->threshold_event_counter);
3369 memcpy(cong_log->threshold_cong_event_map,
3370 ppd->threshold_cong_event_map,
3371 sizeof(cong_log->threshold_cong_event_map));
3372 /* keep timestamp in units of 1.024 usec */
3373 ts = ktime_to_ns(ktime_get()) / 1024;
3374 cong_log->current_time_stamp = cpu_to_be32(ts);
3375 for (i = 0; i < OPA_CONG_LOG_ELEMS; i++) {
3376 struct opa_hfi1_cong_log_event_internal *cce =
3377 &ppd->cc_events[ppd->cc_mad_idx++];
3378 if (ppd->cc_mad_idx == OPA_CONG_LOG_ELEMS)
3379 ppd->cc_mad_idx = 0;
3380 /*
3381 * Entries which are older than twice the time
3382 * required to wrap the counter are supposed to
3383 * be zeroed (CA10-49 IBTA, release 1.2.1, V1).
3384 */
3385 if ((u64)(ts - cce->timestamp) > (2 * UINT_MAX))
3386 continue;
3387 memcpy(cong_log->events[i].local_qp_cn_entry, &cce->lqpn, 3);
3388 memcpy(cong_log->events[i].remote_qp_number_cn_entry,
3389 &cce->rqpn, 3);
3390 cong_log->events[i].sl_svc_type_cn_entry =
3391 ((cce->sl & 0x1f) << 3) | (cce->svc_type & 0x7);
3392 cong_log->events[i].remote_lid_cn_entry =
3393 cpu_to_be32(cce->rlid);
3394 cong_log->events[i].timestamp_cn_entry =
3395 cpu_to_be32(cce->timestamp);
3396 }
3397
3398 /*
3399 * Reset threshold_cong_event_map, and threshold_event_counter
3400 * to 0 when log is read.
3401 */
3402 memset(ppd->threshold_cong_event_map, 0x0,
3403 sizeof(ppd->threshold_cong_event_map));
3404 ppd->threshold_event_counter = 0;
3405
b77d713a 3406 spin_unlock_irq(&ppd->cc_log_lock);
77241056
MM
3407
3408 if (resp_len)
3409 *resp_len += sizeof(struct opa_hfi1_cong_log);
3410
3411 return reply((struct ib_mad_hdr *)smp);
3412}
3413
3414static int __subn_get_opa_cc_table(struct opa_smp *smp, u32 am, u8 *data,
3415 struct ib_device *ibdev, u8 port,
3416 u32 *resp_len)
3417{
3418 struct ib_cc_table_attr *cc_table_attr =
50e5dcbe 3419 (struct ib_cc_table_attr *)data;
77241056
MM
3420 struct hfi1_ibport *ibp = to_iport(ibdev, port);
3421 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
3422 u32 start_block = OPA_AM_START_BLK(am);
3423 u32 n_blocks = OPA_AM_NBLK(am);
3424 struct ib_cc_table_entry_shadow *entries;
3425 int i, j;
3426 u32 sentry, eentry;
3427 struct cc_state *cc_state;
3428
3429 /* sanity check n_blocks, start_block */
3430 if (n_blocks == 0 ||
3431 start_block + n_blocks > ppd->cc_max_table_entries) {
3432 smp->status |= IB_SMP_INVALID_FIELD;
3433 return reply((struct ib_mad_hdr *)smp);
3434 }
3435
3436 rcu_read_lock();
3437
3438 cc_state = get_cc_state(ppd);
3439
d125a6c6 3440 if (!cc_state) {
77241056
MM
3441 rcu_read_unlock();
3442 return reply((struct ib_mad_hdr *)smp);
3443 }
3444
3445 sentry = start_block * IB_CCT_ENTRIES;
3446 eentry = sentry + (IB_CCT_ENTRIES * n_blocks);
3447
3448 cc_table_attr->ccti_limit = cpu_to_be16(cc_state->cct.ccti_limit);
3449
3450 entries = cc_state->cct.entries;
3451
3452 /* return n_blocks, though the last block may not be full */
3453 for (j = 0, i = sentry; i < eentry; j++, i++)
3454 cc_table_attr->ccti_entries[j].entry =
3455 cpu_to_be16(entries[i].entry);
3456
3457 rcu_read_unlock();
3458
3459 if (resp_len)
8638b77f 3460 *resp_len += sizeof(u16) * (IB_CCT_ENTRIES * n_blocks + 1);
77241056
MM
3461
3462 return reply((struct ib_mad_hdr *)smp);
3463}
3464
3465void cc_state_reclaim(struct rcu_head *rcu)
3466{
3467 struct cc_state *cc_state = container_of(rcu, struct cc_state, rcu);
3468
3469 kfree(cc_state);
3470}
3471
3472static int __subn_set_opa_cc_table(struct opa_smp *smp, u32 am, u8 *data,
3473 struct ib_device *ibdev, u8 port,
3474 u32 *resp_len)
3475{
50e5dcbe 3476 struct ib_cc_table_attr *p = (struct ib_cc_table_attr *)data;
77241056
MM
3477 struct hfi1_ibport *ibp = to_iport(ibdev, port);
3478 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
3479 u32 start_block = OPA_AM_START_BLK(am);
3480 u32 n_blocks = OPA_AM_NBLK(am);
3481 struct ib_cc_table_entry_shadow *entries;
3482 int i, j;
3483 u32 sentry, eentry;
3484 u16 ccti_limit;
3485 struct cc_state *old_cc_state, *new_cc_state;
3486
3487 /* sanity check n_blocks, start_block */
3488 if (n_blocks == 0 ||
3489 start_block + n_blocks > ppd->cc_max_table_entries) {
3490 smp->status |= IB_SMP_INVALID_FIELD;
3491 return reply((struct ib_mad_hdr *)smp);
3492 }
3493
3494 sentry = start_block * IB_CCT_ENTRIES;
3495 eentry = sentry + ((n_blocks - 1) * IB_CCT_ENTRIES) +
3496 (be16_to_cpu(p->ccti_limit)) % IB_CCT_ENTRIES + 1;
3497
3498 /* sanity check ccti_limit */
3499 ccti_limit = be16_to_cpu(p->ccti_limit);
3500 if (ccti_limit + 1 > eentry) {
3501 smp->status |= IB_SMP_INVALID_FIELD;
3502 return reply((struct ib_mad_hdr *)smp);
3503 }
3504
3505 new_cc_state = kzalloc(sizeof(*new_cc_state), GFP_KERNEL);
d125a6c6 3506 if (!new_cc_state)
77241056
MM
3507 goto getit;
3508
3509 spin_lock(&ppd->cc_state_lock);
3510
3511 old_cc_state = get_cc_state(ppd);
3512
d125a6c6 3513 if (!old_cc_state) {
77241056
MM
3514 spin_unlock(&ppd->cc_state_lock);
3515 kfree(new_cc_state);
3516 return reply((struct ib_mad_hdr *)smp);
3517 }
3518
3519 *new_cc_state = *old_cc_state;
3520
3521 new_cc_state->cct.ccti_limit = ccti_limit;
3522
3523 entries = ppd->ccti_entries;
3524 ppd->total_cct_entry = ccti_limit + 1;
3525
3526 for (j = 0, i = sentry; i < eentry; j++, i++)
3527 entries[i].entry = be16_to_cpu(p->ccti_entries[j].entry);
3528
3529 memcpy(new_cc_state->cct.entries, entries,
3530 eentry * sizeof(struct ib_cc_table_entry));
3531
3532 new_cc_state->cong_setting.port_control = IB_CC_CCS_PC_SL_BASED;
3533 new_cc_state->cong_setting.control_map = ppd->cc_sl_control_map;
3534 memcpy(new_cc_state->cong_setting.entries, ppd->congestion_entries,
3535 OPA_MAX_SLS * sizeof(struct opa_congestion_setting_entry));
3536
3537 rcu_assign_pointer(ppd->cc_state, new_cc_state);
3538
3539 spin_unlock(&ppd->cc_state_lock);
3540
3541 call_rcu(&old_cc_state->rcu, cc_state_reclaim);
3542
3543getit:
3544 return __subn_get_opa_cc_table(smp, am, data, ibdev, port, resp_len);
3545}
3546
3547struct opa_led_info {
3548 __be32 rsvd_led_mask;
3549 __be32 rsvd;
3550};
3551
3552#define OPA_LED_SHIFT 31
349ac71f 3553#define OPA_LED_MASK BIT(OPA_LED_SHIFT)
77241056
MM
3554
3555static int __subn_get_opa_led_info(struct opa_smp *smp, u32 am, u8 *data,
3556 struct ib_device *ibdev, u8 port,
3557 u32 *resp_len)
3558{
3559 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
50e5dcbe 3560 struct opa_led_info *p = (struct opa_led_info *)data;
77241056
MM
3561 u32 nport = OPA_AM_NPORT(am);
3562 u64 reg;
3563
801cfd6d 3564 if (nport != 1) {
77241056
MM
3565 smp->status |= IB_SMP_INVALID_FIELD;
3566 return reply((struct ib_mad_hdr *)smp);
3567 }
3568
3569 reg = read_csr(dd, DCC_CFG_LED_CNTRL);
3570 if ((reg & DCC_CFG_LED_CNTRL_LED_CNTRL_SMASK) &&
3571 ((reg & DCC_CFG_LED_CNTRL_LED_SW_BLINK_RATE_SMASK) == 0xf))
3572 p->rsvd_led_mask = cpu_to_be32(OPA_LED_MASK);
3573
3574 if (resp_len)
3575 *resp_len += sizeof(struct opa_led_info);
3576
3577 return reply((struct ib_mad_hdr *)smp);
3578}
3579
3580static int __subn_set_opa_led_info(struct opa_smp *smp, u32 am, u8 *data,
3581 struct ib_device *ibdev, u8 port,
3582 u32 *resp_len)
3583{
3584 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
50e5dcbe 3585 struct opa_led_info *p = (struct opa_led_info *)data;
77241056
MM
3586 u32 nport = OPA_AM_NPORT(am);
3587 int on = !!(be32_to_cpu(p->rsvd_led_mask) & OPA_LED_MASK);
3588
801cfd6d 3589 if (nport != 1) {
77241056
MM
3590 smp->status |= IB_SMP_INVALID_FIELD;
3591 return reply((struct ib_mad_hdr *)smp);
3592 }
3593
91ab4ed3
EH
3594 if (on)
3595 hfi1_set_led_override(dd->pport, 2000, 1500);
3596 else
3597 hfi1_set_led_override(dd->pport, 0, 0);
77241056
MM
3598
3599 return __subn_get_opa_led_info(smp, am, data, ibdev, port, resp_len);
3600}
3601
3602static int subn_get_opa_sma(__be16 attr_id, struct opa_smp *smp, u32 am,
3603 u8 *data, struct ib_device *ibdev, u8 port,
3604 u32 *resp_len)
3605{
3606 int ret;
3607 struct hfi1_ibport *ibp = to_iport(ibdev, port);
3608
3609 switch (attr_id) {
3610 case IB_SMP_ATTR_NODE_DESC:
3611 ret = __subn_get_opa_nodedesc(smp, am, data, ibdev, port,
3612 resp_len);
3613 break;
3614 case IB_SMP_ATTR_NODE_INFO:
3615 ret = __subn_get_opa_nodeinfo(smp, am, data, ibdev, port,
3616 resp_len);
3617 break;
3618 case IB_SMP_ATTR_PORT_INFO:
3619 ret = __subn_get_opa_portinfo(smp, am, data, ibdev, port,
3620 resp_len);
3621 break;
3622 case IB_SMP_ATTR_PKEY_TABLE:
3623 ret = __subn_get_opa_pkeytable(smp, am, data, ibdev, port,
3624 resp_len);
3625 break;
3626 case OPA_ATTRIB_ID_SL_TO_SC_MAP:
3627 ret = __subn_get_opa_sl_to_sc(smp, am, data, ibdev, port,
3628 resp_len);
3629 break;
3630 case OPA_ATTRIB_ID_SC_TO_SL_MAP:
3631 ret = __subn_get_opa_sc_to_sl(smp, am, data, ibdev, port,
3632 resp_len);
3633 break;
3634 case OPA_ATTRIB_ID_SC_TO_VLT_MAP:
3635 ret = __subn_get_opa_sc_to_vlt(smp, am, data, ibdev, port,
3636 resp_len);
3637 break;
3638 case OPA_ATTRIB_ID_SC_TO_VLNT_MAP:
3639 ret = __subn_get_opa_sc_to_vlnt(smp, am, data, ibdev, port,
3640 resp_len);
3641 break;
3642 case OPA_ATTRIB_ID_PORT_STATE_INFO:
3643 ret = __subn_get_opa_psi(smp, am, data, ibdev, port,
3644 resp_len);
3645 break;
3646 case OPA_ATTRIB_ID_BUFFER_CONTROL_TABLE:
3647 ret = __subn_get_opa_bct(smp, am, data, ibdev, port,
3648 resp_len);
3649 break;
3650 case OPA_ATTRIB_ID_CABLE_INFO:
3651 ret = __subn_get_opa_cable_info(smp, am, data, ibdev, port,
3652 resp_len);
3653 break;
3654 case IB_SMP_ATTR_VL_ARB_TABLE:
3655 ret = __subn_get_opa_vl_arb(smp, am, data, ibdev, port,
3656 resp_len);
3657 break;
3658 case OPA_ATTRIB_ID_CONGESTION_INFO:
3659 ret = __subn_get_opa_cong_info(smp, am, data, ibdev, port,
3660 resp_len);
3661 break;
3662 case OPA_ATTRIB_ID_HFI_CONGESTION_SETTING:
3663 ret = __subn_get_opa_cong_setting(smp, am, data, ibdev,
3664 port, resp_len);
3665 break;
3666 case OPA_ATTRIB_ID_HFI_CONGESTION_LOG:
3667 ret = __subn_get_opa_hfi1_cong_log(smp, am, data, ibdev,
3668 port, resp_len);
3669 break;
3670 case OPA_ATTRIB_ID_CONGESTION_CONTROL_TABLE:
3671 ret = __subn_get_opa_cc_table(smp, am, data, ibdev, port,
3672 resp_len);
3673 break;
3674 case IB_SMP_ATTR_LED_INFO:
3675 ret = __subn_get_opa_led_info(smp, am, data, ibdev, port,
3676 resp_len);
3677 break;
3678 case IB_SMP_ATTR_SM_INFO:
4eb06882 3679 if (ibp->rvp.port_cap_flags & IB_PORT_SM_DISABLED)
77241056 3680 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
4eb06882 3681 if (ibp->rvp.port_cap_flags & IB_PORT_SM)
77241056
MM
3682 return IB_MAD_RESULT_SUCCESS;
3683 /* FALLTHROUGH */
3684 default:
3685 smp->status |= IB_SMP_UNSUP_METH_ATTR;
3686 ret = reply((struct ib_mad_hdr *)smp);
3687 break;
3688 }
3689 return ret;
3690}
3691
3692static int subn_set_opa_sma(__be16 attr_id, struct opa_smp *smp, u32 am,
3693 u8 *data, struct ib_device *ibdev, u8 port,
3694 u32 *resp_len)
3695{
3696 int ret;
3697 struct hfi1_ibport *ibp = to_iport(ibdev, port);
3698
3699 switch (attr_id) {
3700 case IB_SMP_ATTR_PORT_INFO:
3701 ret = __subn_set_opa_portinfo(smp, am, data, ibdev, port,
3702 resp_len);
3703 break;
3704 case IB_SMP_ATTR_PKEY_TABLE:
3705 ret = __subn_set_opa_pkeytable(smp, am, data, ibdev, port,
3706 resp_len);
3707 break;
3708 case OPA_ATTRIB_ID_SL_TO_SC_MAP:
3709 ret = __subn_set_opa_sl_to_sc(smp, am, data, ibdev, port,
3710 resp_len);
3711 break;
3712 case OPA_ATTRIB_ID_SC_TO_SL_MAP:
3713 ret = __subn_set_opa_sc_to_sl(smp, am, data, ibdev, port,
3714 resp_len);
3715 break;
3716 case OPA_ATTRIB_ID_SC_TO_VLT_MAP:
3717 ret = __subn_set_opa_sc_to_vlt(smp, am, data, ibdev, port,
3718 resp_len);
3719 break;
3720 case OPA_ATTRIB_ID_SC_TO_VLNT_MAP:
3721 ret = __subn_set_opa_sc_to_vlnt(smp, am, data, ibdev, port,
3722 resp_len);
3723 break;
3724 case OPA_ATTRIB_ID_PORT_STATE_INFO:
3725 ret = __subn_set_opa_psi(smp, am, data, ibdev, port,
3726 resp_len);
3727 break;
3728 case OPA_ATTRIB_ID_BUFFER_CONTROL_TABLE:
3729 ret = __subn_set_opa_bct(smp, am, data, ibdev, port,
3730 resp_len);
3731 break;
3732 case IB_SMP_ATTR_VL_ARB_TABLE:
3733 ret = __subn_set_opa_vl_arb(smp, am, data, ibdev, port,
3734 resp_len);
3735 break;
3736 case OPA_ATTRIB_ID_HFI_CONGESTION_SETTING:
3737 ret = __subn_set_opa_cong_setting(smp, am, data, ibdev,
3738 port, resp_len);
3739 break;
3740 case OPA_ATTRIB_ID_CONGESTION_CONTROL_TABLE:
3741 ret = __subn_set_opa_cc_table(smp, am, data, ibdev, port,
3742 resp_len);
3743 break;
3744 case IB_SMP_ATTR_LED_INFO:
3745 ret = __subn_set_opa_led_info(smp, am, data, ibdev, port,
3746 resp_len);
3747 break;
3748 case IB_SMP_ATTR_SM_INFO:
4eb06882 3749 if (ibp->rvp.port_cap_flags & IB_PORT_SM_DISABLED)
77241056 3750 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
4eb06882 3751 if (ibp->rvp.port_cap_flags & IB_PORT_SM)
77241056
MM
3752 return IB_MAD_RESULT_SUCCESS;
3753 /* FALLTHROUGH */
3754 default:
3755 smp->status |= IB_SMP_UNSUP_METH_ATTR;
3756 ret = reply((struct ib_mad_hdr *)smp);
3757 break;
3758 }
3759 return ret;
3760}
3761
3762static inline void set_aggr_error(struct opa_aggregate *ag)
3763{
3764 ag->err_reqlength |= cpu_to_be16(0x8000);
3765}
3766
3767static int subn_get_opa_aggregate(struct opa_smp *smp,
3768 struct ib_device *ibdev, u8 port,
3769 u32 *resp_len)
3770{
3771 int i;
3772 u32 num_attr = be32_to_cpu(smp->attr_mod) & 0x000000ff;
3773 u8 *next_smp = opa_get_smp_data(smp);
3774
3775 if (num_attr < 1 || num_attr > 117) {
3776 smp->status |= IB_SMP_INVALID_FIELD;
3777 return reply((struct ib_mad_hdr *)smp);
3778 }
3779
3780 for (i = 0; i < num_attr; i++) {
3781 struct opa_aggregate *agg;
3782 size_t agg_data_len;
3783 size_t agg_size;
3784 u32 am;
3785
3786 agg = (struct opa_aggregate *)next_smp;
3787 agg_data_len = (be16_to_cpu(agg->err_reqlength) & 0x007f) * 8;
3788 agg_size = sizeof(*agg) + agg_data_len;
3789 am = be32_to_cpu(agg->attr_mod);
3790
3791 *resp_len += agg_size;
3792
3793 if (next_smp + agg_size > ((u8 *)smp) + sizeof(*smp)) {
3794 smp->status |= IB_SMP_INVALID_FIELD;
3795 return reply((struct ib_mad_hdr *)smp);
3796 }
3797
3798 /* zero the payload for this segment */
3799 memset(next_smp + sizeof(*agg), 0, agg_data_len);
3800
50e5dcbe 3801 (void)subn_get_opa_sma(agg->attr_id, smp, am, agg->data,
77241056
MM
3802 ibdev, port, NULL);
3803 if (smp->status & ~IB_SMP_DIRECTION) {
3804 set_aggr_error(agg);
3805 return reply((struct ib_mad_hdr *)smp);
3806 }
3807 next_smp += agg_size;
77241056
MM
3808 }
3809
3810 return reply((struct ib_mad_hdr *)smp);
3811}
3812
3813static int subn_set_opa_aggregate(struct opa_smp *smp,
3814 struct ib_device *ibdev, u8 port,
3815 u32 *resp_len)
3816{
3817 int i;
3818 u32 num_attr = be32_to_cpu(smp->attr_mod) & 0x000000ff;
3819 u8 *next_smp = opa_get_smp_data(smp);
3820
3821 if (num_attr < 1 || num_attr > 117) {
3822 smp->status |= IB_SMP_INVALID_FIELD;
3823 return reply((struct ib_mad_hdr *)smp);
3824 }
3825
3826 for (i = 0; i < num_attr; i++) {
3827 struct opa_aggregate *agg;
3828 size_t agg_data_len;
3829 size_t agg_size;
3830 u32 am;
3831
3832 agg = (struct opa_aggregate *)next_smp;
3833 agg_data_len = (be16_to_cpu(agg->err_reqlength) & 0x007f) * 8;
3834 agg_size = sizeof(*agg) + agg_data_len;
3835 am = be32_to_cpu(agg->attr_mod);
3836
3837 *resp_len += agg_size;
3838
3839 if (next_smp + agg_size > ((u8 *)smp) + sizeof(*smp)) {
3840 smp->status |= IB_SMP_INVALID_FIELD;
3841 return reply((struct ib_mad_hdr *)smp);
3842 }
3843
50e5dcbe 3844 (void)subn_set_opa_sma(agg->attr_id, smp, am, agg->data,
77241056
MM
3845 ibdev, port, NULL);
3846 if (smp->status & ~IB_SMP_DIRECTION) {
3847 set_aggr_error(agg);
3848 return reply((struct ib_mad_hdr *)smp);
3849 }
3850 next_smp += agg_size;
77241056
MM
3851 }
3852
3853 return reply((struct ib_mad_hdr *)smp);
3854}
3855
3856/*
3857 * OPAv1 specifies that, on the transition to link up, these counters
3858 * are cleared:
3859 * PortRcvErrors [*]
3860 * LinkErrorRecovery
3861 * LocalLinkIntegrityErrors
3862 * ExcessiveBufferOverruns [*]
3863 *
3864 * [*] Error info associated with these counters is retained, but the
3865 * error info status is reset to 0.
3866 */
3867void clear_linkup_counters(struct hfi1_devdata *dd)
3868{
3869 /* PortRcvErrors */
3870 write_dev_cntr(dd, C_DC_RCV_ERR, CNTR_INVALID_VL, 0);
3871 dd->err_info_rcvport.status_and_code &= ~OPA_EI_STATUS_SMASK;
3872 /* LinkErrorRecovery */
3873 write_dev_cntr(dd, C_DC_SEQ_CRC_CNT, CNTR_INVALID_VL, 0);
3874 write_dev_cntr(dd, C_DC_REINIT_FROM_PEER_CNT, CNTR_INVALID_VL, 0);
3875 /* LocalLinkIntegrityErrors */
3876 write_dev_cntr(dd, C_DC_TX_REPLAY, CNTR_INVALID_VL, 0);
3877 write_dev_cntr(dd, C_DC_RX_REPLAY, CNTR_INVALID_VL, 0);
3878 /* ExcessiveBufferOverruns */
3879 write_dev_cntr(dd, C_RCV_OVF, CNTR_INVALID_VL, 0);
3880 dd->rcv_ovfl_cnt = 0;
3881 dd->err_info_xmit_constraint.status &= ~OPA_EI_STATUS_SMASK;
3882}
3883
3884/*
3885 * is_local_mad() returns 1 if 'mad' is sent from, and destined to the
3886 * local node, 0 otherwise.
3887 */
3888static int is_local_mad(struct hfi1_ibport *ibp, const struct opa_mad *mad,
3889 const struct ib_wc *in_wc)
3890{
3891 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
3892 const struct opa_smp *smp = (const struct opa_smp *)mad;
3893
3894 if (smp->mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
3895 return (smp->hop_cnt == 0 &&
3896 smp->route.dr.dr_slid == OPA_LID_PERMISSIVE &&
3897 smp->route.dr.dr_dlid == OPA_LID_PERMISSIVE);
3898 }
3899
3900 return (in_wc->slid == ppd->lid);
3901}
3902
3903/*
3904 * opa_local_smp_check() should only be called on MADs for which
3905 * is_local_mad() returns true. It applies the SMP checks that are
3906 * specific to SMPs which are sent from, and destined to this node.
3907 * opa_local_smp_check() returns 0 if the SMP passes its checks, 1
3908 * otherwise.
3909 *
3910 * SMPs which arrive from other nodes are instead checked by
3911 * opa_smp_check().
3912 */
3913static int opa_local_smp_check(struct hfi1_ibport *ibp,
3914 const struct ib_wc *in_wc)
3915{
3916 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
3917 u16 slid = in_wc->slid;
3918 u16 pkey;
3919
3920 if (in_wc->pkey_index >= ARRAY_SIZE(ppd->pkeys))
3921 return 1;
3922
3923 pkey = ppd->pkeys[in_wc->pkey_index];
3924 /*
3925 * We need to do the "node-local" checks specified in OPAv1,
3926 * rev 0.90, section 9.10.26, which are:
3927 * - pkey is 0x7fff, or 0xffff
3928 * - Source QPN == 0 || Destination QPN == 0
3929 * - the MAD header's management class is either
3930 * IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE or
3931 * IB_MGMT_CLASS_SUBN_LID_ROUTED
3932 * - SLID != 0
3933 *
3934 * However, we know (and so don't need to check again) that,
3935 * for local SMPs, the MAD stack passes MADs with:
3936 * - Source QPN of 0
3937 * - MAD mgmt_class is IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE
3938 * - SLID is either: OPA_LID_PERMISSIVE (0xFFFFFFFF), or
3939 * our own port's lid
3940 *
3941 */
3942 if (pkey == LIM_MGMT_P_KEY || pkey == FULL_MGMT_P_KEY)
3943 return 0;
3944 ingress_pkey_table_fail(ppd, pkey, slid);
3945 return 1;
3946}
3947
3948static int process_subn_opa(struct ib_device *ibdev, int mad_flags,
3949 u8 port, const struct opa_mad *in_mad,
3950 struct opa_mad *out_mad,
3951 u32 *resp_len)
3952{
3953 struct opa_smp *smp = (struct opa_smp *)out_mad;
3954 struct hfi1_ibport *ibp = to_iport(ibdev, port);
3955 u8 *data;
3956 u32 am;
3957 __be16 attr_id;
3958 int ret;
3959
3960 *out_mad = *in_mad;
3961 data = opa_get_smp_data(smp);
3962
3963 am = be32_to_cpu(smp->attr_mod);
3964 attr_id = smp->attr_id;
3965 if (smp->class_version != OPA_SMI_CLASS_VERSION) {
3966 smp->status |= IB_SMP_UNSUP_VERSION;
3967 ret = reply((struct ib_mad_hdr *)smp);
5950e9b1 3968 return ret;
77241056
MM
3969 }
3970 ret = check_mkey(ibp, (struct ib_mad_hdr *)smp, mad_flags, smp->mkey,
3971 smp->route.dr.dr_slid, smp->route.dr.return_path,
3972 smp->hop_cnt);
3973 if (ret) {
3974 u32 port_num = be32_to_cpu(smp->attr_mod);
3975
3976 /*
3977 * If this is a get/set portinfo, we already check the
3978 * M_Key if the MAD is for another port and the M_Key
3979 * is OK on the receiving port. This check is needed
3980 * to increment the error counters when the M_Key
3981 * fails to match on *both* ports.
3982 */
3983 if (attr_id == IB_SMP_ATTR_PORT_INFO &&
3984 (smp->method == IB_MGMT_METHOD_GET ||
3985 smp->method == IB_MGMT_METHOD_SET) &&
3986 port_num && port_num <= ibdev->phys_port_cnt &&
3987 port != port_num)
50e5dcbe 3988 (void)check_mkey(to_iport(ibdev, port_num),
77241056
MM
3989 (struct ib_mad_hdr *)smp, 0,
3990 smp->mkey, smp->route.dr.dr_slid,
3991 smp->route.dr.return_path,
3992 smp->hop_cnt);
3993 ret = IB_MAD_RESULT_FAILURE;
5950e9b1 3994 return ret;
77241056
MM
3995 }
3996
3997 *resp_len = opa_get_smp_header_size(smp);
3998
3999 switch (smp->method) {
4000 case IB_MGMT_METHOD_GET:
4001 switch (attr_id) {
4002 default:
4003 clear_opa_smp_data(smp);
4004 ret = subn_get_opa_sma(attr_id, smp, am, data,
4005 ibdev, port, resp_len);
5950e9b1 4006 break;
77241056
MM
4007 case OPA_ATTRIB_ID_AGGREGATE:
4008 ret = subn_get_opa_aggregate(smp, ibdev, port,
4009 resp_len);
5950e9b1 4010 break;
77241056 4011 }
5950e9b1 4012 break;
77241056
MM
4013 case IB_MGMT_METHOD_SET:
4014 switch (attr_id) {
4015 default:
4016 ret = subn_set_opa_sma(attr_id, smp, am, data,
4017 ibdev, port, resp_len);
5950e9b1 4018 break;
77241056
MM
4019 case OPA_ATTRIB_ID_AGGREGATE:
4020 ret = subn_set_opa_aggregate(smp, ibdev, port,
4021 resp_len);
5950e9b1 4022 break;
77241056 4023 }
5950e9b1 4024 break;
77241056
MM
4025 case IB_MGMT_METHOD_TRAP:
4026 case IB_MGMT_METHOD_REPORT:
4027 case IB_MGMT_METHOD_REPORT_RESP:
4028 case IB_MGMT_METHOD_GET_RESP:
4029 /*
4030 * The ib_mad module will call us to process responses
4031 * before checking for other consumers.
4032 * Just tell the caller to process it normally.
4033 */
4034 ret = IB_MAD_RESULT_SUCCESS;
5950e9b1 4035 break;
77241056
MM
4036 default:
4037 smp->status |= IB_SMP_UNSUP_METHOD;
4038 ret = reply((struct ib_mad_hdr *)smp);
5950e9b1 4039 break;
77241056
MM
4040 }
4041
77241056
MM
4042 return ret;
4043}
4044
4045static int process_subn(struct ib_device *ibdev, int mad_flags,
4046 u8 port, const struct ib_mad *in_mad,
4047 struct ib_mad *out_mad)
4048{
4049 struct ib_smp *smp = (struct ib_smp *)out_mad;
4050 struct hfi1_ibport *ibp = to_iport(ibdev, port);
4051 int ret;
4052
4053 *out_mad = *in_mad;
4054 if (smp->class_version != 1) {
4055 smp->status |= IB_SMP_UNSUP_VERSION;
4056 ret = reply((struct ib_mad_hdr *)smp);
5950e9b1 4057 return ret;
77241056
MM
4058 }
4059
4060 ret = check_mkey(ibp, (struct ib_mad_hdr *)smp, mad_flags,
4061 smp->mkey, (__force __be32)smp->dr_slid,
4062 smp->return_path, smp->hop_cnt);
4063 if (ret) {
4064 u32 port_num = be32_to_cpu(smp->attr_mod);
4065
4066 /*
4067 * If this is a get/set portinfo, we already check the
4068 * M_Key if the MAD is for another port and the M_Key
4069 * is OK on the receiving port. This check is needed
4070 * to increment the error counters when the M_Key
4071 * fails to match on *both* ports.
4072 */
4073 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
4074 (smp->method == IB_MGMT_METHOD_GET ||
4075 smp->method == IB_MGMT_METHOD_SET) &&
4076 port_num && port_num <= ibdev->phys_port_cnt &&
4077 port != port_num)
50e5dcbe 4078 (void)check_mkey(to_iport(ibdev, port_num),
77241056
MM
4079 (struct ib_mad_hdr *)smp, 0,
4080 smp->mkey,
4081 (__force __be32)smp->dr_slid,
4082 smp->return_path, smp->hop_cnt);
4083 ret = IB_MAD_RESULT_FAILURE;
5950e9b1 4084 return ret;
77241056
MM
4085 }
4086
4087 switch (smp->method) {
4088 case IB_MGMT_METHOD_GET:
4089 switch (smp->attr_id) {
4090 case IB_SMP_ATTR_NODE_INFO:
4091 ret = subn_get_nodeinfo(smp, ibdev, port);
5950e9b1 4092 break;
77241056
MM
4093 default:
4094 smp->status |= IB_SMP_UNSUP_METH_ATTR;
4095 ret = reply((struct ib_mad_hdr *)smp);
5950e9b1 4096 break;
77241056 4097 }
5950e9b1 4098 break;
77241056
MM
4099 }
4100
77241056
MM
4101 return ret;
4102}
4103
b8d114eb
SS
4104static int process_perf(struct ib_device *ibdev, u8 port,
4105 const struct ib_mad *in_mad,
4106 struct ib_mad *out_mad)
4107{
4108 struct ib_pma_mad *pmp = (struct ib_pma_mad *)out_mad;
4109 struct ib_class_port_info *cpi = (struct ib_class_port_info *)
4110 &pmp->data;
4111 int ret = IB_MAD_RESULT_FAILURE;
4112
4113 *out_mad = *in_mad;
4114 if (pmp->mad_hdr.class_version != 1) {
4115 pmp->mad_hdr.status |= IB_SMP_UNSUP_VERSION;
4116 ret = reply((struct ib_mad_hdr *)pmp);
4117 return ret;
4118 }
4119
4120 switch (pmp->mad_hdr.method) {
4121 case IB_MGMT_METHOD_GET:
4122 switch (pmp->mad_hdr.attr_id) {
4123 case IB_PMA_PORT_COUNTERS:
4124 ret = pma_get_ib_portcounters(pmp, ibdev, port);
4125 break;
4126 case IB_PMA_PORT_COUNTERS_EXT:
4127 ret = pma_get_ib_portcounters_ext(pmp, ibdev, port);
4128 break;
4129 case IB_PMA_CLASS_PORT_INFO:
4130 cpi->capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
4131 ret = reply((struct ib_mad_hdr *)pmp);
4132 break;
4133 default:
4134 pmp->mad_hdr.status |= IB_SMP_UNSUP_METH_ATTR;
4135 ret = reply((struct ib_mad_hdr *)pmp);
4136 break;
4137 }
4138 break;
4139
4140 case IB_MGMT_METHOD_SET:
4141 if (pmp->mad_hdr.attr_id) {
4142 pmp->mad_hdr.status |= IB_SMP_UNSUP_METH_ATTR;
4143 ret = reply((struct ib_mad_hdr *)pmp);
4144 }
4145 break;
4146
4147 case IB_MGMT_METHOD_TRAP:
4148 case IB_MGMT_METHOD_GET_RESP:
4149 /*
4150 * The ib_mad module will call us to process responses
4151 * before checking for other consumers.
4152 * Just tell the caller to process it normally.
4153 */
4154 ret = IB_MAD_RESULT_SUCCESS;
4155 break;
4156
4157 default:
4158 pmp->mad_hdr.status |= IB_SMP_UNSUP_METHOD;
4159 ret = reply((struct ib_mad_hdr *)pmp);
4160 break;
4161 }
4162
4163 return ret;
4164}
4165
77241056
MM
4166static int process_perf_opa(struct ib_device *ibdev, u8 port,
4167 const struct opa_mad *in_mad,
4168 struct opa_mad *out_mad, u32 *resp_len)
4169{
4170 struct opa_pma_mad *pmp = (struct opa_pma_mad *)out_mad;
4171 int ret;
4172
4173 *out_mad = *in_mad;
4174
4175 if (pmp->mad_hdr.class_version != OPA_SMI_CLASS_VERSION) {
4176 pmp->mad_hdr.status |= IB_SMP_UNSUP_VERSION;
4177 return reply((struct ib_mad_hdr *)pmp);
4178 }
4179
4180 *resp_len = sizeof(pmp->mad_hdr);
4181
4182 switch (pmp->mad_hdr.method) {
4183 case IB_MGMT_METHOD_GET:
4184 switch (pmp->mad_hdr.attr_id) {
4185 case IB_PMA_CLASS_PORT_INFO:
4186 ret = pma_get_opa_classportinfo(pmp, ibdev, resp_len);
5950e9b1 4187 break;
77241056
MM
4188 case OPA_PM_ATTRIB_ID_PORT_STATUS:
4189 ret = pma_get_opa_portstatus(pmp, ibdev, port,
4190 resp_len);
5950e9b1 4191 break;
77241056
MM
4192 case OPA_PM_ATTRIB_ID_DATA_PORT_COUNTERS:
4193 ret = pma_get_opa_datacounters(pmp, ibdev, port,
4194 resp_len);
5950e9b1 4195 break;
77241056
MM
4196 case OPA_PM_ATTRIB_ID_ERROR_PORT_COUNTERS:
4197 ret = pma_get_opa_porterrors(pmp, ibdev, port,
4198 resp_len);
5950e9b1 4199 break;
77241056
MM
4200 case OPA_PM_ATTRIB_ID_ERROR_INFO:
4201 ret = pma_get_opa_errorinfo(pmp, ibdev, port,
4202 resp_len);
5950e9b1 4203 break;
77241056
MM
4204 default:
4205 pmp->mad_hdr.status |= IB_SMP_UNSUP_METH_ATTR;
4206 ret = reply((struct ib_mad_hdr *)pmp);
5950e9b1 4207 break;
77241056 4208 }
5950e9b1 4209 break;
77241056
MM
4210
4211 case IB_MGMT_METHOD_SET:
4212 switch (pmp->mad_hdr.attr_id) {
4213 case OPA_PM_ATTRIB_ID_CLEAR_PORT_STATUS:
4214 ret = pma_set_opa_portstatus(pmp, ibdev, port,
4215 resp_len);
5950e9b1 4216 break;
77241056
MM
4217 case OPA_PM_ATTRIB_ID_ERROR_INFO:
4218 ret = pma_set_opa_errorinfo(pmp, ibdev, port,
4219 resp_len);
5950e9b1 4220 break;
77241056
MM
4221 default:
4222 pmp->mad_hdr.status |= IB_SMP_UNSUP_METH_ATTR;
4223 ret = reply((struct ib_mad_hdr *)pmp);
5950e9b1 4224 break;
77241056 4225 }
5950e9b1 4226 break;
77241056
MM
4227
4228 case IB_MGMT_METHOD_TRAP:
4229 case IB_MGMT_METHOD_GET_RESP:
4230 /*
4231 * The ib_mad module will call us to process responses
4232 * before checking for other consumers.
4233 * Just tell the caller to process it normally.
4234 */
4235 ret = IB_MAD_RESULT_SUCCESS;
5950e9b1 4236 break;
77241056
MM
4237
4238 default:
4239 pmp->mad_hdr.status |= IB_SMP_UNSUP_METHOD;
4240 ret = reply((struct ib_mad_hdr *)pmp);
5950e9b1 4241 break;
77241056
MM
4242 }
4243
77241056
MM
4244 return ret;
4245}
4246
4247static int hfi1_process_opa_mad(struct ib_device *ibdev, int mad_flags,
a724648e
JB
4248 u8 port, const struct ib_wc *in_wc,
4249 const struct ib_grh *in_grh,
4250 const struct opa_mad *in_mad,
4251 struct opa_mad *out_mad, size_t *out_mad_size,
4252 u16 *out_mad_pkey_index)
77241056
MM
4253{
4254 int ret;
4255 int pkey_idx;
4256 u32 resp_len = 0;
4257 struct hfi1_ibport *ibp = to_iport(ibdev, port);
4258
4259 pkey_idx = hfi1_lookup_pkey_idx(ibp, LIM_MGMT_P_KEY);
4260 if (pkey_idx < 0) {
4261 pr_warn("failed to find limited mgmt pkey, defaulting 0x%x\n",
4262 hfi1_get_pkey(ibp, 1));
4263 pkey_idx = 1;
4264 }
4265 *out_mad_pkey_index = (u16)pkey_idx;
4266
4267 switch (in_mad->mad_hdr.mgmt_class) {
4268 case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
4269 case IB_MGMT_CLASS_SUBN_LID_ROUTED:
4270 if (is_local_mad(ibp, in_mad, in_wc)) {
4271 ret = opa_local_smp_check(ibp, in_wc);
4272 if (ret)
4273 return IB_MAD_RESULT_FAILURE;
4274 }
4275 ret = process_subn_opa(ibdev, mad_flags, port, in_mad,
4276 out_mad, &resp_len);
4277 goto bail;
4278 case IB_MGMT_CLASS_PERF_MGMT:
4279 ret = process_perf_opa(ibdev, port, in_mad, out_mad,
4280 &resp_len);
4281 goto bail;
4282
4283 default:
4284 ret = IB_MAD_RESULT_SUCCESS;
4285 }
4286
4287bail:
4288 if (ret & IB_MAD_RESULT_REPLY)
4289 *out_mad_size = round_up(resp_len, 8);
4290 else if (ret & IB_MAD_RESULT_SUCCESS)
4291 *out_mad_size = in_wc->byte_len - sizeof(struct ib_grh);
4292
4293 return ret;
4294}
4295
4296static int hfi1_process_ib_mad(struct ib_device *ibdev, int mad_flags, u8 port,
4297 const struct ib_wc *in_wc,
4298 const struct ib_grh *in_grh,
4299 const struct ib_mad *in_mad,
4300 struct ib_mad *out_mad)
4301{
4302 int ret;
4303
4304 switch (in_mad->mad_hdr.mgmt_class) {
4305 case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
4306 case IB_MGMT_CLASS_SUBN_LID_ROUTED:
4307 ret = process_subn(ibdev, mad_flags, port, in_mad, out_mad);
5950e9b1 4308 break;
b8d114eb
SS
4309 case IB_MGMT_CLASS_PERF_MGMT:
4310 ret = process_perf(ibdev, port, in_mad, out_mad);
4311 break;
77241056
MM
4312 default:
4313 ret = IB_MAD_RESULT_SUCCESS;
5950e9b1 4314 break;
77241056
MM
4315 }
4316
77241056
MM
4317 return ret;
4318}
4319
4320/**
4321 * hfi1_process_mad - process an incoming MAD packet
4322 * @ibdev: the infiniband device this packet came in on
4323 * @mad_flags: MAD flags
4324 * @port: the port number this packet came in on
4325 * @in_wc: the work completion entry for this packet
4326 * @in_grh: the global route header for this packet
4327 * @in_mad: the incoming MAD
4328 * @out_mad: any outgoing MAD reply
4329 *
4330 * Returns IB_MAD_RESULT_SUCCESS if this is a MAD that we are not
4331 * interested in processing.
4332 *
4333 * Note that the verbs framework has already done the MAD sanity checks,
4334 * and hop count/pointer updating for IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE
4335 * MADs.
4336 *
4337 * This is called by the ib_mad module.
4338 */
4339int hfi1_process_mad(struct ib_device *ibdev, int mad_flags, u8 port,
4340 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
4341 const struct ib_mad_hdr *in_mad, size_t in_mad_size,
4342 struct ib_mad_hdr *out_mad, size_t *out_mad_size,
4343 u16 *out_mad_pkey_index)
4344{
4345 switch (in_mad->base_version) {
4346 case OPA_MGMT_BASE_VERSION:
4347 if (unlikely(in_mad_size != sizeof(struct opa_mad))) {
4348 dev_err(ibdev->dma_device, "invalid in_mad_size\n");
4349 return IB_MAD_RESULT_FAILURE;
4350 }
4351 return hfi1_process_opa_mad(ibdev, mad_flags, port,
4352 in_wc, in_grh,
4353 (struct opa_mad *)in_mad,
4354 (struct opa_mad *)out_mad,
4355 out_mad_size,
4356 out_mad_pkey_index);
4357 case IB_MGMT_BASE_VERSION:
4358 return hfi1_process_ib_mad(ibdev, mad_flags, port,
4359 in_wc, in_grh,
4360 (const struct ib_mad *)in_mad,
4361 (struct ib_mad *)out_mad);
4362 default:
4363 break;
4364 }
4365
4366 return IB_MAD_RESULT_FAILURE;
4367}
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