rtl8188eu : BIT() macro cleanup
[deliverable/linux.git] / drivers / staging / rtl8188eu / hal / odm_HWConfig.c
CommitLineData
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1/******************************************************************************
2 *
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 *
19 ******************************************************************************/
20
21/* include files */
22
23#include "odm_precomp.h"
24
25#define READ_AND_CONFIG READ_AND_CONFIG_MP
26
27#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm))
28#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(dm_odm))
29
30static u8 odm_QueryRxPwrPercentage(s8 AntPower)
31{
32 if ((AntPower <= -100) || (AntPower >= 20))
33 return 0;
34 else if (AntPower >= 0)
35 return 100;
36 else
37 return 100+AntPower;
38}
39
40/* 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */
41/* IF other SW team do not support the feature, remove this section.?? */
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42static s32 odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s32 CurrSig)
43{
44 s32 RetSig = 0;
45
f395036d
LF
46 if (CurrSig >= 51 && CurrSig <= 100)
47 RetSig = 100;
48 else if (CurrSig >= 41 && CurrSig <= 50)
49 RetSig = 80 + ((CurrSig - 40)*2);
50 else if (CurrSig >= 31 && CurrSig <= 40)
51 RetSig = 66 + (CurrSig - 30);
52 else if (CurrSig >= 21 && CurrSig <= 30)
53 RetSig = 54 + (CurrSig - 20);
54 else if (CurrSig >= 10 && CurrSig <= 20)
55 RetSig = 42 + (((CurrSig - 10) * 2) / 3);
56 else if (CurrSig >= 5 && CurrSig <= 9)
57 RetSig = 22 + (((CurrSig - 5) * 3) / 2);
58 else if (CurrSig >= 1 && CurrSig <= 4)
59 RetSig = 6 + (((CurrSig - 1) * 3) / 2);
60 else
61 RetSig = CurrSig;
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62 return RetSig;
63}
64
65static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig)
66{
0735ea67 67 return odm_SignalScaleMapping_92CSeries(dm_odm, CurrSig);
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68}
69
70static u8 odm_EVMdbToPercentage(s8 Value)
71{
72 /* -33dB~0dB to 0%~99% */
73 s8 ret_val;
74
75 ret_val = Value;
76
77 if (ret_val >= 0)
78 ret_val = 0;
79 if (ret_val <= -33)
80 ret_val = -33;
81
82 ret_val = 0 - ret_val;
83 ret_val *= 3;
84
85 if (ret_val == 99)
86 ret_val = 100;
87 return ret_val;
88}
89
90static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
91 struct odm_phy_status_info *pPhyInfo,
92 u8 *pPhyStatus,
93 struct odm_per_pkt_info *pPktinfo)
94{
95 struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table;
96 u8 i, Max_spatial_stream;
97 s8 rx_pwr[4], rx_pwr_all = 0;
98 u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
99 u8 RSSI, total_rssi = 0;
100 u8 isCCKrate = 0;
101 u8 rf_rx_num = 0;
102 u8 cck_highpwr = 0;
103 u8 LNA_idx, VGA_idx;
104
105 struct phy_status_rpt *pPhyStaRpt = (struct phy_status_rpt *)pPhyStatus;
106
107 isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
108
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109 pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = -1;
110 pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
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111
112 if (isCCKrate) {
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113 u8 cck_agc_rpt;
114
115 dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
116 /* (1)Hardware does not provide RSSI for CCK */
117 /* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
118
119 cck_highpwr = dm_odm->bCckHighPower;
120
7be921a2 121 cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a;
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122
123 /* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
124 /* The RSSI formula should be modified according to the gain table */
125 /* In 88E, cck_highpwr is always set to 1 */
07add2d3 126 LNA_idx = (cck_agc_rpt & 0xE0) >> 5;
adb3d770 127 VGA_idx = cck_agc_rpt & 0x1F;
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128 switch (LNA_idx) {
129 case 7:
130 if (VGA_idx <= 27)
131 rx_pwr_all = -100 + 2*(27-VGA_idx); /* VGA_idx = 27~2 */
132 else
133 rx_pwr_all = -100;
134 break;
135 case 6:
136 rx_pwr_all = -48 + 2*(2-VGA_idx); /* VGA_idx = 2~0 */
137 break;
138 case 5:
139 rx_pwr_all = -42 + 2*(7-VGA_idx); /* VGA_idx = 7~5 */
140 break;
141 case 4:
142 rx_pwr_all = -36 + 2*(7-VGA_idx); /* VGA_idx = 7~4 */
143 break;
144 case 3:
145 rx_pwr_all = -24 + 2*(7-VGA_idx); /* VGA_idx = 7~0 */
146 break;
147 case 2:
148 if (cck_highpwr)
149 rx_pwr_all = -12 + 2*(5-VGA_idx); /* VGA_idx = 5~0 */
150 else
151 rx_pwr_all = -6 + 2*(5-VGA_idx);
152 break;
153 case 1:
154 rx_pwr_all = 8-2*VGA_idx;
155 break;
156 case 0:
157 rx_pwr_all = 14-2*VGA_idx;
158 break;
159 default:
160 break;
161 }
162 rx_pwr_all += 6;
163 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
164 if (!cck_highpwr) {
165 if (PWDB_ALL >= 80)
166 PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;
167 else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
168 PWDB_ALL += 3;
169 if (PWDB_ALL > 100)
170 PWDB_ALL = 100;
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171 }
172
173 pPhyInfo->RxPWDBAll = PWDB_ALL;
174 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
175 pPhyInfo->RecvSignalPower = rx_pwr_all;
176 /* (3) Get Signal Quality (EVM) */
177 if (pPktinfo->bPacketMatchBSSID) {
178 u8 SQ, SQ_rpt;
179
0735ea67 180 if (pPhyInfo->RxPWDBAll > 40 && !dm_odm->bInHctTest) {
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181 SQ = 100;
182 } else {
183 SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
184
185 if (SQ_rpt > 64)
186 SQ = 0;
187 else if (SQ_rpt < 20)
188 SQ = 100;
189 else
190 SQ = ((64-SQ_rpt) * 100) / 44;
191 }
192 pPhyInfo->SignalQuality = SQ;
cc25137f
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193 pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = SQ;
194 pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
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195 }
196 } else { /* is OFDM rate */
197 dm_odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
198
199 /* (1)Get RSSI for HT rate */
200
cc25137f 201 for (i = RF_PATH_A; i < RF_PATH_MAX; i++) {
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202 /* 2008/01/30 MH we will judge RF RX path now. */
203 if (dm_odm->RFPathRxEnable & BIT(i))
204 rf_rx_num++;
205
206 rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain & 0x3F)*2) - 110;
207
208 pPhyInfo->RxPwr[i] = rx_pwr[i];
209
210 /* Translate DBM to percentage. */
211 RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
212 total_rssi += RSSI;
213
214 /* Modification for ext-LNA board */
215 if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
216 if ((pPhyStaRpt->path_agc[i].trsw) == 1)
217 RSSI = (RSSI > 94) ? 100 : (RSSI + 6);
218 else
219 RSSI = (RSSI <= 16) ? (RSSI >> 3) : (RSSI - 16);
220
221 if ((RSSI <= 34) && (RSSI >= 4))
222 RSSI -= 4;
223 }
224
225 pPhyInfo->RxMIMOSignalStrength[i] = (u8)RSSI;
226
227 /* Get Rx snr value in DB */
228 pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
229 dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
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230 }
231 /* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
232 rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110;
233
234 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
235 PWDB_ALL_BT = PWDB_ALL;
236
237 pPhyInfo->RxPWDBAll = PWDB_ALL;
238 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;
239 pPhyInfo->RxPower = rx_pwr_all;
240 pPhyInfo->RecvSignalPower = rx_pwr_all;
241
0735ea67
LF
242 /* (3)EVM of HT rate */
243 if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15)
244 Max_spatial_stream = 2; /* both spatial stream make sense */
245 else
246 Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
247
248 for (i = 0; i < Max_spatial_stream; i++) {
249 /* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
250 /* fill most significant bit to "zero" when doing shifting operation which may change a negative */
251 /* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */
252 EVM = odm_EVMdbToPercentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */
253
254 if (pPktinfo->bPacketMatchBSSID) {
cc25137f 255 if (i == RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */
0735ea67
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256 pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
257 pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
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258 }
259 }
260 }
261 /* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */
262 /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */
263 if (isCCKrate) {
264 pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, PWDB_ALL));/* PWDB_ALL; */
265 } else {
266 if (rf_rx_num != 0)
267 pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, total_rssi /= rf_rx_num));
268 }
269
270 /* For 92C/92D HW (Hybrid) Antenna Diversity */
271 pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;
272 /* For 88E HW Antenna Diversity */
273 dm_odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;
274 dm_odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;
275 dm_odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;
276}
277
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278static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
279 struct odm_phy_status_info *pPhyInfo,
280 struct odm_per_pkt_info *pPktinfo)
281{
282 s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK;
283 s32 UndecoratedSmoothedOFDM, RSSI_Ave;
284 u8 isCCKrate = 0;
285 u8 RSSI_max, RSSI_min, i;
286 u32 OFDM_pkt = 0;
287 u32 Weighting = 0;
288 struct sta_info *pEntry;
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289 u8 antsel_tr_mux;
290 struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable;
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291
292 if (pPktinfo->StationID == 0xFF)
293 return;
294 pEntry = dm_odm->pODM_StaInfo[pPktinfo->StationID];
295 if (!IS_STA_VALID(pEntry))
296 return;
297 if ((!pPktinfo->bPacketMatchBSSID))
298 return;
299
300 isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
301
302 /* Smart Antenna Debug Message------------------ */
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303
304 if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) {
305 if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) {
306 if (pPktinfo->bPacketToSelf) {
6c984c81 307 antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
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LF
308 (pDM_FatTable->antsel_rx_keep_1<<1) |
309 pDM_FatTable->antsel_rx_keep_0;
310 pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll;
311 pDM_FatTable->antRSSIcnt[antsel_tr_mux]++;
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312 }
313 }
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314 } else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) {
315 if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
316 antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
317 (pDM_FatTable->antsel_rx_keep_1<<1) | pDM_FatTable->antsel_rx_keep_0;
5c45dde4 318 rtl88eu_dm_ant_sel_statistics(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll);
6c0a555e 319 }
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320 }
321 /* Smart Antenna Debug Message------------------ */
322
323 UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK;
324 UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;
325 UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
326
327 if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
328 if (!isCCKrate) { /* ofdm rate */
cc25137f
LF
329 if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_B] == 0) {
330 RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
6c984c81 331 } else {
cc25137f
LF
332 if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[RF_PATH_B]) {
333 RSSI_max = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
334 RSSI_min = pPhyInfo->RxMIMOSignalStrength[RF_PATH_B];
6c984c81 335 } else {
cc25137f
LF
336 RSSI_max = pPhyInfo->RxMIMOSignalStrength[RF_PATH_B];
337 RSSI_min = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
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LF
338 }
339 if ((RSSI_max - RSSI_min) < 3)
340 RSSI_Ave = RSSI_max;
341 else if ((RSSI_max - RSSI_min) < 6)
342 RSSI_Ave = RSSI_max - 1;
343 else if ((RSSI_max - RSSI_min) < 10)
344 RSSI_Ave = RSSI_max - 2;
345 else
346 RSSI_Ave = RSSI_max - 3;
347 }
348
349 /* 1 Process OFDM RSSI */
350 if (UndecoratedSmoothedOFDM <= 0) { /* initialize */
351 UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll;
352 } else {
353 if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedOFDM) {
354 UndecoratedSmoothedOFDM =
355 (((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
356 (RSSI_Ave)) / (Rx_Smooth_Factor);
357 UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;
358 } else {
359 UndecoratedSmoothedOFDM =
360 (((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
361 (RSSI_Ave)) / (Rx_Smooth_Factor);
362 }
363 }
364
9c68ed09 365 pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT(0);
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LF
366
367 } else {
368 RSSI_Ave = pPhyInfo->RxPWDBAll;
369
370 /* 1 Process CCK RSSI */
371 if (UndecoratedSmoothedCCK <= 0) { /* initialize */
372 UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll;
373 } else {
374 if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedCCK) {
375 UndecoratedSmoothedCCK =
376 ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) +
377 pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
378 UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
379 } else {
380 UndecoratedSmoothedCCK =
381 ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) +
382 pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
383 }
384 }
385 pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1;
386 }
387 /* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */
388 if (pEntry->rssi_stat.ValidBit >= 64)
389 pEntry->rssi_stat.ValidBit = 64;
390 else
391 pEntry->rssi_stat.ValidBit++;
392
393 for (i = 0; i < pEntry->rssi_stat.ValidBit; i++)
9c68ed09 394 OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap>>i) & BIT(0);
6c984c81
LF
395
396 if (pEntry->rssi_stat.ValidBit == 64) {
397 Weighting = ((OFDM_pkt<<4) > 64) ? 64 : (OFDM_pkt<<4);
398 UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6;
399 } else {
400 if (pEntry->rssi_stat.ValidBit != 0)
401 UndecoratedSmoothedPWDB = (OFDM_pkt * UndecoratedSmoothedOFDM +
402 (pEntry->rssi_stat.ValidBit-OFDM_pkt) *
403 UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit;
404 else
405 UndecoratedSmoothedPWDB = 0;
406 }
407 pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
408 pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM;
409 pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
410 }
411}
412
413/* Endianness before calling this API */
414static void ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct *dm_odm,
415 struct odm_phy_status_info *pPhyInfo,
416 u8 *pPhyStatus,
417 struct odm_per_pkt_info *pPktinfo)
418{
419 odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus,
420 pPktinfo);
421 if (dm_odm->RSSI_test) {
e96031d0 422 ;/* Select the packets to do RSSI checking for antenna switching. */
6c984c81
LF
423 } else {
424 odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo);
425 }
426}
427
428void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm,
429 struct odm_phy_status_info *pPhyInfo,
430 u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo)
431{
432 ODM_PhyStatusQuery_92CSeries(dm_odm, pPhyInfo, pPhyStatus, pPktinfo);
433}
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