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Merge remote-tracking branch 'staging/staging-next'
[deliverable/linux.git] / drivers / staging / rtl8188eu / hal / rtl8188e_hal_init.c
CommitLineData
615a4d12
LF		 1/******************************************************************************
2 *
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
615a4d12
LF		 14 ******************************************************************************/
15#define _HAL_INIT_C_
16
691dd0b7 17#include <linux/firmware.h>
f42f52aa 18#include <linux/vmalloc.h>
615a4d12
LF		 19#include <drv_types.h>
20#include <rtw_efuse.h>
41b77d26 21#include <phy.h>
615a4d12
LF		 22#include <rtl8188e_hal.h>
23
24#include <rtw_iol.h>
25
ee5f8a43 26void iol_mode_enable(struct adapter *padapter, u8 enable)
615a4d12
LF		 27{
28 u8 reg_0xf0 = 0;
29
30 if (enable) {
31 /* Enable initial offload */
c7b2e995 32 reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
e76484d0 33 usb_write8(padapter, REG_SYS_CFG, reg_0xf0|SW_OFFLOAD_EN);
615a4d12
LF		 34
35 if (!padapter->bFWReady) {
36 DBG_88E("bFWReady == false call reset 8051...\n");
37 _8051Reset88E(padapter);
38 }
39
40 } else {
41 /* disable initial offload */
c7b2e995 42 reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
e76484d0 43 usb_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN);
615a4d12
LF		 44 }
45}
46
ee5f8a43 47s32 iol_execute(struct adapter *padapter, u8 control)
615a4d12
LF		 48{
49 s32 status = _FAIL;
50 u8 reg_0x88 = 0;
ed737494 51 unsigned long start = 0;
615a4d12
LF		 52
53 control = control&0x0f;
c7b2e995 54 reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
e76484d0 55 usb_write8(padapter, REG_HMEBOX_E0, reg_0x88|control);
615a4d12 56
c01fb496 57 start = jiffies;
c7b2e995 58 while ((reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0)) & control &&
ed737494 59 jiffies_to_msecs(jiffies - start) < 1000) {
3913c19a 60 udelay(5);
615a4d12
LF		 61 }
62
c7b2e995 63 reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
615a4d12
LF		 64 status = (reg_0x88 & control) ? _FAIL : _SUCCESS;
65 if (reg_0x88 & control<<4)
66 status = _FAIL;
67 return status;
68}
69
70static s32 iol_InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
71{
72 s32 rst = _SUCCESS;
73 iol_mode_enable(padapter, 1);
e76484d0 74 usb_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy);
615a4d12
LF		 75 rst = iol_execute(padapter, CMD_INIT_LLT);
76 iol_mode_enable(padapter, 0);
77 return rst;
78}
79
615a4d12
LF		 80
81s32 rtl8188e_iol_efuse_patch(struct adapter *padapter)
82{
83 s32 result = _SUCCESS;
84
85 DBG_88E("==> %s\n", __func__);
86 if (rtw_IOL_applied(padapter)) {
87 iol_mode_enable(padapter, 1);
88 result = iol_execute(padapter, CMD_READ_EFUSE_MAP);
89 if (result == _SUCCESS)
90 result = iol_execute(padapter, CMD_EFUSE_PATCH);
91
92 iol_mode_enable(padapter, 0);
93 }
94 return result;
95}
96
615a4d12
LF		 97#define MAX_REG_BOLCK_SIZE 196
98
615a4d12
LF		 99void _8051Reset88E(struct adapter *padapter)
100{
101 u8 u1bTmp;
102
c7b2e995 103 u1bTmp = usb_read8(padapter, REG_SYS_FUNC_EN+1);
9c68ed09
AB		 104 usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT(2)));
105 usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT(2)));
615a4d12
LF		 106 DBG_88E("=====> _8051Reset88E(): 8051 reset success .\n");
107}
108
615a4d12
LF		 109void rtl8188e_InitializeFirmwareVars(struct adapter *padapter)
110{
111 struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
112
113 /* Init Fw LPS related. */
114 padapter->pwrctrlpriv.bFwCurrentInPSMode = false;
115
116 /* Init H2C counter. by tynli. 2009.12.09. */
117 pHalData->LastHMEBoxNum = 0;
118}
119
2490fbf7 120void rtw_hal_free_data(struct adapter *padapter)
615a4d12 121{
615a4d12
LF		 122 kfree(padapter->HalData);
123 padapter->HalData = NULL;
615a4d12
LF		 124}
125
f86fc9b0 126void rtw_hal_read_chip_version(struct adapter *padapter)
615a4d12
LF		 127{
128 u32 value32;
129 struct HAL_VERSION ChipVersion;
130 struct hal_data_8188e *pHalData;
131
132 pHalData = GET_HAL_DATA(padapter);
133
99ecfb06 134 value32 = usb_read32(padapter, REG_SYS_CFG);
615a4d12 135 ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
615a4d12
LF		 136 ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
137 ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; /* IC version (CUT) */
138
615a4d12
LF		 139 dump_chip_info(ChipVersion);
140
141 pHalData->VersionID = ChipVersion;
3c71dd6c
JS		 142 pHalData->rf_type = RF_1T1R;
143 pHalData->NumTotalRFPath = 1;
615a4d12
LF		 144
145 MSG_88E("RF_Type is %x!!\n", pHalData->rf_type);
615a4d12
LF		 146}
147
685adf8a 148void rtw_hal_set_odm_var(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet)
615a4d12
LF		 149{
150 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
151 struct odm_dm_struct *podmpriv = &pHalData->odmpriv;
152 switch (eVariable) {
153 case HAL_ODM_STA_INFO:
154 {
08a3d85a 155 struct sta_info *psta = pValue1;
8b21696c 156
615a4d12
LF		 157 if (bSet) {
158 DBG_88E("### Set STA_(%d) info\n", psta->mac_id);
159 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta);
160 ODM_RAInfo_Init(podmpriv, psta->mac_id);
161 } else {
162 DBG_88E("### Clean STA_(%d) info\n", psta->mac_id);
163 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL);
164 }
165 }
166 break;
167 case HAL_ODM_P2P_STATE:
168 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DIRECT, bSet);
169 break;
170 case HAL_ODM_WIFI_DISPLAY_STATE:
171 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet);
172 break;
173 default:
174 break;
175 }
176}
177
91d06962 178void rtw_hal_notch_filter(struct adapter *adapter, bool enable)
615a4d12
LF		 179{
180 if (enable) {
181 DBG_88E("Enable notch filter\n");
9c68ed09 182 usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) | BIT(1));
615a4d12
LF		 183 } else {
184 DBG_88E("Disable notch filter\n");
9c68ed09 185 usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) & ~BIT(1));
615a4d12
LF		 186 }
187}
615a4d12 188
615a4d12
LF		 189/* */
190/* */
191/* LLT R/W/Init function */
192/* */
193/* */
194static s32 _LLTWrite(struct adapter *padapter, u32 address, u32 data)
195{
196 s32 status = _SUCCESS;
197 s32 count = 0;
198 u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
199 u16 LLTReg = REG_LLT_INIT;
200
fc158079 201 usb_write32(padapter, LLTReg, value);
615a4d12
LF		 202
203 /* polling */
204 do {
99ecfb06 205 value = usb_read32(padapter, LLTReg);
615a4d12
LF		 206 if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
207 break;
208
209 if (count > POLLING_LLT_THRESHOLD) {
210 RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling write LLT done at address %d!\n", address));
211 status = _FAIL;
212 break;
213 }
3913c19a 214 udelay(5);
615a4d12
LF		 215 } while (count++);
216
217 return status;
218}
219
220s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
221{
222 s32 status = _FAIL;
223 u32 i;
224 u32 Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER;/* 176, 22k */
225
226 if (rtw_IOL_applied(padapter)) {
227 status = iol_InitLLTTable(padapter, txpktbuf_bndy);
228 } else {
229 for (i = 0; i < (txpktbuf_bndy - 1); i++) {
230 status = _LLTWrite(padapter, i, i + 1);
231 if (_SUCCESS != status)
232 return status;
233 }
234
235 /* end of list */
236 status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF);
237 if (_SUCCESS != status)
238 return status;
239
240 /* Make the other pages as ring buffer */
241 /* This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. */
242 /* Otherwise used as local loopback buffer. */
243 for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) {
244 status = _LLTWrite(padapter, i, (i + 1));
245 if (_SUCCESS != status)
246 return status;
247 }
248
249 /* Let last entry point to the start entry of ring buffer */
250 status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy);
251 if (_SUCCESS != status) {
252 return status;
253 }
254 }
255
256 return status;
257}
258
259void
260Hal_InitPGData88E(struct adapter *padapter)
261{
262 struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
263
264 if (!pEEPROM->bautoload_fail_flag) { /* autoload OK. */
265 if (!is_boot_from_eeprom(padapter)) {
266 /* Read EFUSE real map to shadow. */
b0d255c7 267 EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI);
615a4d12
LF		 268 }
269 } else {/* autoload fail */
270 RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n"));
271 /* update to default value 0xFF */
272 if (!is_boot_from_eeprom(padapter))
b0d255c7 273 EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI);
615a4d12
LF		 274 }
275}
276
277void
278Hal_EfuseParseIDCode88E(
279 struct adapter *padapter,
280 u8 *hwinfo
281 )
282{
283 struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
284 u16 EEPROMId;
285
286 /* Checl 0x8129 again for making sure autoload status!! */
287 EEPROMId = le16_to_cpu(*((__le16 *)hwinfo));
288 if (EEPROMId != RTL_EEPROM_ID) {
289 DBG_88E("EEPROM ID(%#x) is invalid!!\n", EEPROMId);
290 pEEPROM->bautoload_fail_flag = true;
291 } else {
292 pEEPROM->bautoload_fail_flag = false;
293 }
294
295 DBG_88E("EEPROM ID = 0x%04x\n", EEPROMId);
296}
297
298static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, u8 *PROMContent, bool AutoLoadFail)
299{
300 u32 rfPath, eeAddr = EEPROM_TX_PWR_INX_88E, group, TxCount = 0;
301
1ce39848 302 memset(pwrInfo24G, 0, sizeof(struct txpowerinfo24g));
615a4d12
LF		 303
304 if (AutoLoadFail) {
305 for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
306 /* 2.4G default value */
307 for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
308 pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
309 pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
310 }
311 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
312 if (TxCount == 0) {
313 pwrInfo24G->BW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF;
314 pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF;
315 } else {
316 pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
317 pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
318 pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
319 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
320 }
321 }
322 }
323 return;
324 }
325
326 for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
327 /* 2.4G default value */
328 for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
329 pwrInfo24G->IndexCCK_Base[rfPath][group] = PROMContent[eeAddr++];
330 if (pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF)
331 pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
332 }
333 for (group = 0; group < MAX_CHNL_GROUP_24G-1; group++) {
334 pwrInfo24G->IndexBW40_Base[rfPath][group] = PROMContent[eeAddr++];
335 if (pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF)
336 pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
337 }
338 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
339 if (TxCount == 0) {
340 pwrInfo24G->BW40_Diff[rfPath][TxCount] = 0;
341 if (PROMContent[eeAddr] == 0xFF) {
342 pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF;
343 } else {
344 pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
9c68ed09 345 if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
615a4d12
LF		 346 pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
347 }
348
349 if (PROMContent[eeAddr] == 0xFF) {
350 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_OFDM_DIFF;
351 } else {
352 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
9c68ed09 353 if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
615a4d12
LF		 354 pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
355 }
356 pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0;
357 eeAddr++;
358 } else {
359 if (PROMContent[eeAddr] == 0xFF) {
360 pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
361 } else {
362 pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
9c68ed09 363 if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
615a4d12
LF		 364 pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0;
365 }
366
367 if (PROMContent[eeAddr] == 0xFF) {
368 pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
369 } else {
370 pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
9c68ed09 371 if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
615a4d12
LF		 372 pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
373 }
374 eeAddr++;
375
376 if (PROMContent[eeAddr] == 0xFF) {
377 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
378 } else {
379 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
9c68ed09 380 if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
615a4d12
LF		 381 pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
382 }
383
384 if (PROMContent[eeAddr] == 0xFF) {
385 pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
386 } else {
387 pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
9c68ed09 388 if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
615a4d12
LF		 389 pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0;
390 }
391 eeAddr++;
392 }
393 }
394 }
395}
396
397static u8 Hal_GetChnlGroup88E(u8 chnl, u8 *pGroup)
398{
399 u8 bIn24G = true;
400
401 if (chnl <= 14) {
402 bIn24G = true;
403
5e809e50 404 if (chnl < 3) /* Channel 1-2 */
615a4d12
LF		 405 *pGroup = 0;
406 else if (chnl < 6) /* Channel 3-5 */
407 *pGroup = 1;
408 else if (chnl < 9) /* Channel 6-8 */
409 *pGroup = 2;
410 else if (chnl < 12) /* Channel 9-11 */
411 *pGroup = 3;
412 else if (chnl < 14) /* Channel 12-13 */
413 *pGroup = 4;
414 else if (chnl == 14) /* Channel 14 */
415 *pGroup = 5;
416 } else {
32b5844e
IS		 417
418 /* probably, this branch is suitable only for 5 GHz */
419
615a4d12
LF		 420 bIn24G = false;
421
422 if (chnl <= 40)
423 *pGroup = 0;
424 else if (chnl <= 48)
425 *pGroup = 1;
426 else if (chnl <= 56)
427 *pGroup = 2;
428 else if (chnl <= 64)
429 *pGroup = 3;
430 else if (chnl <= 104)
431 *pGroup = 4;
432 else if (chnl <= 112)
433 *pGroup = 5;
434 else if (chnl <= 120)
435 *pGroup = 5;
436 else if (chnl <= 128)
437 *pGroup = 6;
438 else if (chnl <= 136)
439 *pGroup = 7;
440 else if (chnl <= 144)
441 *pGroup = 8;
442 else if (chnl <= 153)
443 *pGroup = 9;
444 else if (chnl <= 161)
445 *pGroup = 10;
446 else if (chnl <= 177)
447 *pGroup = 11;
448 }
449 return bIn24G;
450}
451
452void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
453{
454 if (AutoLoadFail) {
455 padapter->pwrctrlpriv.bHWPowerdown = false;
456 padapter->pwrctrlpriv.bSupportRemoteWakeup = false;
457 } else {
458 /* hw power down mode selection , 0:rf-off / 1:power down */
459
460 if (padapter->registrypriv.hwpdn_mode == 2)
9c68ed09 461 padapter->pwrctrlpriv.bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT(4));
615a4d12
LF		 462 else
463 padapter->pwrctrlpriv.bHWPowerdown = padapter->registrypriv.hwpdn_mode;
464
465 /* decide hw if support remote wakeup function */
466 /* if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */
9c68ed09 467 padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT(1)) ? true : false;
615a4d12
LF		 468
469 DBG_88E("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) , bSupportRemoteWakeup(%x)\n", __func__,
470 padapter->pwrctrlpriv.bHWPwrPindetect, padapter->pwrctrlpriv.bHWPowerdown , padapter->pwrctrlpriv.bSupportRemoteWakeup);
471
472 DBG_88E("### PS params => power_mgnt(%x), usbss_enable(%x) ###\n", padapter->registrypriv.power_mgnt, padapter->registrypriv.usbss_enable);
473 }
474}
475
476void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool AutoLoadFail)
477{
478 struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
479 struct txpowerinfo24g pwrInfo24G;
480 u8 rfPath, ch, group;
481 u8 bIn24G, TxCount;
482
483 Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail);
484
485 if (!AutoLoadFail)
486 pHalData->bTXPowerDataReadFromEEPORM = true;
487
488 for (rfPath = 0; rfPath < pHalData->NumTotalRFPath; rfPath++) {
1ad866e7 489 for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
615a4d12
LF		 490 bIn24G = Hal_GetChnlGroup88E(ch, &group);
491 if (bIn24G) {
492 pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group];
493 if (ch == 14)
494 pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][4];
495 else
496 pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group];
497 }
498 if (bIn24G) {
499 DBG_88E("======= Path %d, Channel %d =======\n", rfPath, ch);
500 DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", rfPath, ch , pHalData->Index24G_CCK_Base[rfPath][ch]);
501 DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", rfPath, ch , pHalData->Index24G_BW40_Base[rfPath][ch]);
502 }
503 }
504 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
505 pHalData->CCK_24G_Diff[rfPath][TxCount] = pwrInfo24G.CCK_Diff[rfPath][TxCount];
506 pHalData->OFDM_24G_Diff[rfPath][TxCount] = pwrInfo24G.OFDM_Diff[rfPath][TxCount];
507 pHalData->BW20_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW20_Diff[rfPath][TxCount];
508 pHalData->BW40_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW40_Diff[rfPath][TxCount];
509 DBG_88E("======= TxCount %d =======\n", TxCount);
510 DBG_88E("CCK_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->CCK_24G_Diff[rfPath][TxCount]);
511 DBG_88E("OFDM_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->OFDM_24G_Diff[rfPath][TxCount]);
512 DBG_88E("BW20_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW20_24G_Diff[rfPath][TxCount]);
513 DBG_88E("BW40_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW40_24G_Diff[rfPath][TxCount]);
514 }
515 }
516
517 /* 2010/10/19 MH Add Regulator recognize for CU. */
518 if (!AutoLoadFail) {
519 pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x7); /* bit0~2 */
520 if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
521 pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION&0x7); /* bit0~2 */
522 } else {
523 pHalData->EEPROMRegulatory = 0;
524 }
525 DBG_88E("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory);
526}
527
528void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
529{
530 struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
531
532 if (!AutoLoadFail) {
533 pHalData->CrystalCap = hwinfo[EEPROM_XTAL_88E];
534 if (pHalData->CrystalCap == 0xFF)
535 pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
536 } else {
537 pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
538 }
539 DBG_88E("CrystalCap: 0x%2x\n", pHalData->CrystalCap);
540}
541
542void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
543{
544 struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
545
546 if (!AutoLoadFail)
07add2d3
AM		 547 pHalData->BoardType = (hwinfo[EEPROM_RF_BOARD_OPTION_88E]
548 & 0xE0) >> 5;
615a4d12
LF		 549 else
550 pHalData->BoardType = 0;
551 DBG_88E("Board Type: 0x%2x\n", pHalData->BoardType);
552}
553
554void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
555{
556 struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
557
558 if (!AutoLoadFail) {
559 pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E];
560 if (pHalData->EEPROMVersion == 0xFF)
561 pHalData->EEPROMVersion = EEPROM_Default_Version;
562 } else {
563 pHalData->EEPROMVersion = 1;
564 }
565 RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
566 ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n",
567 pHalData->EEPROMVersion));
568}
569
570void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
571{
572 padapter->mlmepriv.ChannelPlan =
573 hal_com_get_channel_plan(padapter,
574 hwinfo ? hwinfo[EEPROM_ChannelPlan_88E] : 0xFF,
575 padapter->registrypriv.channel_plan,
576 RT_CHANNEL_DOMAIN_WORLD_WIDE_13, AutoLoadFail);
577
578 DBG_88E("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan);
579}
580
581void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
582{
583 struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
584
585 if (!AutoLoadFail) {
586 pHalData->EEPROMCustomerID = hwinfo[EEPROM_CUSTOMERID_88E];
587 } else {
588 pHalData->EEPROMCustomerID = 0;
589 pHalData->EEPROMSubCustomerID = 0;
590 }
591 DBG_88E("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID);
592}
593
594void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool AutoLoadFail)
595{
596 struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
597 struct registry_priv *registry_par = &pAdapter->registrypriv;
598
599 if (!AutoLoadFail) {
600 /* Antenna Diversity setting. */
601 if (registry_par->antdiv_cfg == 2) { /* 2:By EFUSE */
602 pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x18)>>3;
603 if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
74772fcf 604 pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION&0x18)>>3;
615a4d12
LF		 605 } else {
606 pHalData->AntDivCfg = registry_par->antdiv_cfg; /* 0:OFF , 1:ON, 2:By EFUSE */
607 }
608
609 if (registry_par->antdiv_type == 0) {
610 /* If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. */
611 pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E];
612 if (pHalData->TRxAntDivType == 0xFF)
613 pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; /* For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */
614 } else {
615 pHalData->TRxAntDivType = registry_par->antdiv_type;
616 }
617
618 if (pHalData->TRxAntDivType == CG_TRX_HW_ANTDIV || pHalData->TRxAntDivType == CGCS_RX_HW_ANTDIV)
619 pHalData->AntDivCfg = 1; /* 0xC1[3] is ignored. */
620 } else {
621 pHalData->AntDivCfg = 0;
622 pHalData->TRxAntDivType = pHalData->TRxAntDivType; /* The value in the driver setting of device manager. */
623 }
624 DBG_88E("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType);
625}
626
627void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail)
628{
629 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
630
631 /* ThermalMeter from EEPROM */
632 if (!AutoloadFail)
633 pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_88E];
634 else
635 pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
636
637 if (pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) {
638 pHalData->bAPKThermalMeterIgnore = true;
639 pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
640 }
641 DBG_88E("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter);
642}
Linux kernel - Deliverables
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